diff --git a/.azure-pipelines/azure-pipelines-build-vs-and-test.yml b/.azure-pipelines/azure-pipelines-build-vs-and-test.yml new file mode 100644 index 00000000000..26c1d7c855d --- /dev/null +++ b/.azure-pipelines/azure-pipelines-build-vs-and-test.yml @@ -0,0 +1,125 @@ +pr: none +trigger: none + + +name: $(TeamProject)_$(Build.DefinitionName)_$(SourceBranchName)_$(Date:yyyyMMdd)$(Rev:.r) + +resources: + repositories: + - repository: sonic-mgmt + type: github + name: sonic-net/sonic-mgmt + ref: master + endpoint: sonic-net + - repository: buildimage + type: github + name: sonic-net/sonic-buildimage + endpoint: sonic-net + ref: master + + +variables: +- template: .azure-pipelines/azure-pipelines-repd-build-variables.yml@buildimage +- template: .azure-pipelines/template-variables.yml@buildimage +- name: CACHE_MODE + value: rcache +- name: ENABLE_FIPS + value: y +- name: BUILD_BRANCH + ${{ if eq(variables['Build.Reason'], 'PullRequest') }}: + value: $(System.PullRequest.TargetBranch) + ${{ else }}: + value: $(Build.SourceBranchName) + + +parameters: + - name: SUBMODULE + type: string + default: ' ' + + - name: COMMIT_ID + type: string + default: ' ' + + - name: MGMT_BRANCH + type: string + default: 'master' + + - name: TOPOLOGY + type: string + default: '' + values: + - t0 + - t0-64-32 + - t1-lag + - multi-asic-t1-lag + - dualtor + - dpu + + - name: DEPLOY_MG_EXTRA_PARAMS + type: string + default: ' ' + + - name: SCRIPTS + type: string + default: ' ' + + - name: FEATURES + type: string + default: ' ' + + - name: MIN_WORKER + type: string + default: '1' + + - name: MAX_WORKER + type: string + default: '1' + + - name: STOP_ON_FAILURE + type: string + default: 'False' + values: + - 'True' + - 'False' + +stages: + - stage: BuildVS + pool: sonicbld-1es + jobs: + - template: azure-pipelines-build.yml + parameters: + buildOptions: 'USERNAME=admin SONIC_BUILD_JOBS=$(nproc) BUILD_MULTIASIC_KVM=y INCLUDE_DHCP_SERVER=y ${{ variables. VERSION_CONTROL_OPTIONS }}' + jobGroups: + - name: vs + SUBMODULE: ${{ parameters.SUBMODULE }} + COMMIT_ID: ${{ parameters.COMMIT_ID }} + + - stage: Test + dependsOn: BuildVS + condition: and(succeeded(), and(ne(stageDependencies.BuildVS.outputs['vs.SetVar.SKIP_VSTEST'], 'YES'), in(dependencies.BuildVS.result, 'Succeeded', 'SucceededWithIssues'))) + variables: + - group: SONiC-Elastictest + - name: inventory + value: veos_vtb + - name: testbed_file + value: vtestbed.yaml + + jobs: + - job: KVMTEST + displayName: "kvmtest by Elastictest" + timeoutInMinutes: 240 + continueOnError: false + pool: sonic-ubuntu-1c + steps: + - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt + parameters: + TOPOLOGY: ${{ parameters.TOPOLOGY }} + MIN_WORKER: ${{ parameters.MIN_WORKER }} + MAX_WORKER: ${{ parameters.MAX_WORKER }} + KVM_IMAGE_BRANCH: $(BUILD_BRANCH) + MGMT_BRANCH: ${{ parameters.MGMT_BRANCH }} + SCRIPTS: ${{ parameters.SCRIPTS }} + FEATURES: ${{ parameters.FEATURES }} + DEPLOY_MG_EXTRA_PARAMS: ${{ parameters.DEPLOY_MG_EXTRA_PARAMS }} + STOP_ON_FAILURE: ${{ parameters.STOP_ON_FAILURE }} diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml index fd6c805cf35..f75023b0a17 100644 --- a/.azure-pipelines/azure-pipelines-build.yml +++ b/.azure-pipelines/azure-pipelines-build.yml @@ -19,6 +19,12 @@ parameters: - name: 'qemuOrCrossBuild' type: boolean default: false +- name: SUBMODULE + type: string + default: '' +- name: COMMIT_ID + type: string + default: '' jobs: - template: azure-pipelines-image-template.yml @@ -26,6 +32,8 @@ jobs: jobFilters: ${{ parameters.jobFilters }} preSteps: ${{ parameters.preSteps }} postSteps: ${{ parameters.postSteps }} + SUBMODULE: ${{ parameters.SUBMODULE }} + COMMIT_ID: ${{ parameters.COMMIT_ID }} jobVariables: PLATFORM_AZP: $(GROUP_NAME) PLATFORM_ARCH: amd64 @@ -82,7 +90,7 @@ jobs: variables: dbg_image: yes - - name: innovium + - name: marvell-teralynx variables: dbg_image: yes @@ -163,7 +171,8 @@ jobs: if [ $(dbg_image) == yes ]; then make $BUILD_OPTIONS INSTALL_DEBUG_TOOLS=y target/sonic-$(GROUP_NAME).bin mv target/sonic-$(GROUP_NAME).bin target/sonic-$(GROUP_NAME)-dbg.bin - elif [ $(ss_image) == yes ]; then + fi + if [ $(ss_image) == yes ]; then make $BUILD_OPTIONS SMARTSWITCH=1 INCLUDE_DHCP_SERVER=y target/sonic-$(GROUP_NAME).bin mv target/sonic-$(GROUP_NAME).bin target/sonic-$(GROUP_NAME)-smartswitch.bin fi diff --git a/.azure-pipelines/azure-pipelines-image-template.yml b/.azure-pipelines/azure-pipelines-image-template.yml index f934bf36648..9d9662bb0ad 100644 --- a/.azure-pipelines/azure-pipelines-image-template.yml +++ b/.azure-pipelines/azure-pipelines-image-template.yml @@ -19,6 +19,12 @@ parameters: - name: jobVariables type: object default: [] +- name: SUBMODULE + type: string + default: '' +- name: COMMIT_ID + type: string + default: '' jobs: - template: azure-pipelines-job-groups.yml parameters: @@ -42,6 +48,17 @@ jobs: fetchDepth: 0 condition: and(succeeded(), eq(variables.SKIP_CHECKOUT, '')) displayName: 'Checkout code' + - script: | + if [ -n "${{ parameters.COMMIT_ID }}" ]; then + if [ -n "${{ parameters.SUBMODULE }}" ]; then + git submodule update --init --recursive + cd src/${{ parameters.SUBMODULE }} + fi + git checkout ${{ parameters.COMMIT_ID }} + else + echo "No specific commit id provided, checkout to latest commit" + fi + displayName: 'Checkout commit' - script: | set -x sudo setfacl -R -b $(Agent.BuildDirectory) diff --git a/.azure-pipelines/azure-pipelines-repd-build-variables.yml b/.azure-pipelines/azure-pipelines-repd-build-variables.yml index b5b83afcd98..8261105de0c 100644 --- a/.azure-pipelines/azure-pipelines-repd-build-variables.yml +++ b/.azure-pipelines/azure-pipelines-repd-build-variables.yml @@ -1,2 +1,2 @@ variables: - VERSION_CONTROL_OPTIONS: 'SONIC_VERSION_CONTROL_COMPONENTS=deb,py2,py3,web,git,docker' + VERSION_CONTROL_OPTIONS: 'SONIC_VERSION_CONTROL_COMPONENTS=py2,py3,web,git,docker' diff --git a/.azure-pipelines/template-variables.yml b/.azure-pipelines/template-variables.yml index 93469319680..e8aa4f60c60 100644 --- a/.azure-pipelines/template-variables.yml +++ b/.azure-pipelines/template-variables.yml @@ -1,6 +1,6 @@ variables: DEFAULT_CONTAINER_REGISTRY: 'publicmirror.azurecr.io' - COMMON_LIB_BUILD_ENVS: 'bullseye' + COMMON_LIB_BUILD_ENVS: 'bookworm' SONIC_SLAVE_DOCKER_DRIVER: 'overlay2' SONIC_BUILD_RETRY_COUNT: 3 SONIC_BUILD_RETRY_INTERVAL: 600 diff --git a/.github/workflows/protect-file.yml b/.github/workflows/protect-file.yml new file mode 100644 index 00000000000..bc7e0ae1de1 --- /dev/null +++ b/.github/workflows/protect-file.yml @@ -0,0 +1,37 @@ +name: Protect certain files to avoid further changes + +on: + push: + branches: + - 'master' + - '202[2-9][0-9][0-9]' + pull_request: + branches: + - 'master' + - '202[2-9][0-9][0-9]' + +jobs: + check-file: + runs-on: ubuntu-latest + steps: + - name: Checkout repository + uses: actions/checkout@v3 + + - name: Fetch base branch + run: | + git fetch origin ${GITHUB_BASE_REF} + + - name: Check protected files + run: | + echo "Starting file check step" + protected_files=('src/sonic-config-engine/minigraph.py' 'files/build_templates/init_cfg.json.j2') + base_branch=$(git rev-parse origin/${GITHUB_BASE_REF}) + + for protected_file in "${protected_files[@]}"; do + echo "Checking ${protected_file}" + if git diff --name-only $base_branch | grep -q "^${protected_file}\$"; then + echo "Error: You are trying to modify ${protected_file}, which is protected." + exit 1 + fi + done + echo "No changes detected in protected files" diff --git a/.gitmodules b/.gitmodules index 487cf6d8a4a..f8d10f3af4a 100644 --- a/.gitmodules +++ b/.gitmodules @@ -46,7 +46,7 @@ [submodule "src/sonic-frr/frr"] path = src/sonic-frr/frr url = https://github.com/sonic-net/sonic-frr.git - branch = frr/8.5 + branch = frr-10.0.1 [submodule "platform/p4/p4-hlir/p4-hlir-v1.1"] path = platform/p4/p4-hlir/p4-hlir-v1.1 url = https://github.com/p4lang/p4-hlir.git @@ -124,6 +124,12 @@ [submodule "platform/marvell/sonic-platform-marvell"] path = platform/marvell/sonic-platform-marvell url = https://github.com/Marvell-switching/sonic-platform-arm64.git -[submodule "platform/innovium/sonic-platform-marvell"] - path = platform/innovium/sonic-platform-marvell - url = https://github.com/Marvell-switching/sonic-platform-marvell +[submodule "src/sonic-stp"] + path = src/sonic-stp + url = https://github.com/sonic-net/sonic-stp +[submodule "platform/marvell-teralynx/sonic-platform-marvell-teralynx"] + path = platform/marvell-teralynx/sonic-platform-marvell-teralynx + url = https://github.com/Marvell-switching/sonic-platform-marvell.git +[submodule "platform/vpp"] + path = platform/vpp + url = https://github.com/sonic-net/sonic-platform-vpp.git \ No newline at end of file diff --git a/Makefile.work b/Makefile.work index e6cddad289b..fe14eebaedc 100644 --- a/Makefile.work +++ b/Makefile.work @@ -61,6 +61,9 @@ # * SONIC_PTF_ENV_PY_VER: Python version for PTF image # * Default: mixed # * Values: mixed,py3 +# * ENABLE_MULTIDB: Enable multiple redis database instances. +# * Default: unset +# * Values: y ############################################################################### SHELL = /bin/bash @@ -532,6 +535,7 @@ SONIC_BUILD_INSTRUCTION := $(MAKE) \ SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD=$(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD) \ SONIC_INCLUDE_SYSTEM_TELEMETRY=$(INCLUDE_SYSTEM_TELEMETRY) \ SONIC_INCLUDE_SYSTEM_GNMI=$(INCLUDE_SYSTEM_GNMI) \ + SONIC_INCLUDE_SYSTEM_BMP=$(INCLUDE_SYSTEM_BMP) \ SONIC_INCLUDE_SYSTEM_EVENTD=$(INCLUDE_SYSTEM_EVENTD) \ INCLUDE_DHCP_RELAY=$(INCLUDE_DHCP_RELAY) \ INCLUDE_DHCP_SERVER=$(INCLUDE_DHCP_SERVER) \ @@ -571,6 +575,7 @@ SONIC_BUILD_INSTRUCTION := $(MAKE) \ BUILD_PROCESS_TIMEOUT=$(BUILD_PROCESS_TIMEOUT) \ LEGACY_SONIC_MGMT_DOCKER=$(LEGACY_SONIC_MGMT_DOCKER) \ SONIC_PTF_ENV_PY_VER=$(SONIC_PTF_ENV_PY_VER) \ + ENABLE_MULTIDB=$(ENABLE_MULTIDB) \ $(SONIC_OVERRIDE_BUILD_VARS) .PHONY: sonic-slave-build sonic-slave-bash init reset diff --git a/README.md b/README.md index 2488f972df4..37406f0d67d 100644 --- a/README.md +++ b/README.md @@ -3,7 +3,7 @@ [![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=master&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=master) [![Centec](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec?branchName=master&label=Centec)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=143&branchName=master) [![Centec(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec-arm64?branchName=master&label=Centec-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=140&branchName=master) -[![Innovium](https://dev.azure.com/mssonic/build/_apis/build/status/innovium/Azure.sonic-buildimage.official.innovium?branchName=master&label=Innovium)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=148&branchName=master) +[![Marvell-Teralynx](https://dev.azure.com/mssonic/build/_apis/build/status/innovium/Azure.sonic-buildimage.official.marvell-teralynx?branchName=master&label=Marvell-Teralynx)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=148&branchName=master) [![Mellanox](https://dev.azure.com/mssonic/build/_apis/build/status/mellanox/Azure.sonic-buildimage.official.mellanox?branchName=master&label=Mellanox)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=139&branchName=master) [![Marvell(armhf)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-armhf?branchName=master&label=Marvell-armhf)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=141&branchName=master) [![Marvell(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-arm64?branchName=master&label=Marvell-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=999&branchName=master) @@ -215,7 +215,7 @@ The supported ASIC vendors are: * PLATFORM=centec * PLATFORM=nephos * PLATFORM=nvidia-bluefield -* PLATFORM=innovium +* PLATFORM=marvell-teralynx * PLATFORM=vs ## Usage for ARM Architecture @@ -373,8 +373,8 @@ on the SAI version for each SONiC release. and Mellanox switch ASIC (gzip tar archive) * docker-syncd-nephos.gz: docker image for the daemon to sync database and Nephos switch ASIC (gzip tar archive) - * docker-syncd-invm.gz: docker image for the daemon to sync database - and Innovium switch ASIC (gzip tar archive) + * docker-syncd-mrvl-teralynx.gz: docker image for the daemon to sync database + and Marvell-Teralynx switch ASIC (gzip tar archive) * docker-sonic-p4.gz: docker image for all-in-one for p4 software switch (gzip tar archive) * docker-sonic-vs.gz: docker image for all-in-one for software virtual switch diff --git a/azure-pipelines.yml b/azure-pipelines.yml index 3956a7c9444..d6eb20d31d7 100644 --- a/azure-pipelines.yml +++ b/azure-pipelines.yml @@ -70,6 +70,8 @@ stages: - name: broadcom variables: swi_image: yes + docker_syncd_rpc_image: yes + platform_rpc: brcm INCLUDE_RESTAPI: y - name: mellanox variables: @@ -107,6 +109,7 @@ stages: - job: pool: sonictest displayName: "vstest" + condition: false # agent pool don't work. disable this job to unblock PRs. timeoutInMinutes: 60 steps: - template: .azure-pipelines/cleanup.yml diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8/BALANCED/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8/BALANCED/buffers_defaults_t0.j2 index 57a7fb13146..f62d89115a6 100644 --- a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8/BALANCED/buffers_defaults_t0.j2 +++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8/BALANCED/buffers_defaults_t0.j2 @@ -8,10 +8,17 @@ {%- endfor %} {%- endmacro %} +{%- set ingress_lossless_pool_size = '32689152' %} +{%- set egress_lossless_pool_size = '32340992' %} +{%- if (DEVICE_METADATA is defined) and ('localhost' in DEVICE_METADATA) and ('subtype' in DEVICE_METADATA['localhost']) and (DEVICE_METADATA['localhost']['subtype'] == 'DualToR') %} + {%- set ingress_lossless_pool_size = '32441856' %} + {%- set egress_lossless_pool_size = '32441856' %} +{%- endif %} + {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "32689152", + "size": "{{ingress_lossless_pool_size }}", "type": "ingress", "mode": "dynamic", "xoff": "2058240" @@ -22,7 +29,7 @@ "mode": "dynamic" }, "egress_lossless_pool": { - "size": "32340992", + "size": "{{egress_lossless_pool_size }}", "type": "egress", "mode": "static" } @@ -31,12 +38,12 @@ "ingress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"32689152" + "static_th":"{{ingress_lossless_pool_size }}" }, "egress_lossless_profile": { "pool":"egress_lossless_pool", "size":"0", - "static_th":"32340992" + "static_th":"{{egress_lossless_pool_size }}" }, "egress_lossy_profile": { "pool":"egress_lossy_pool", diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/th4-a7060dx5-32-200Gx48-100Gx32.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/th4-a7060dx5-32-200Gx48-100Gx32.config.bcm index ae51822fc61..027509541e2 100644 --- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/th4-a7060dx5-32-200Gx48-100Gx32.config.bcm +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/th4-a7060dx5-32-200Gx48-100Gx32.config.bcm @@ -19,6 +19,7 @@ bcm_device: 0: global: pktio_mode: 1 + default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 shared_block_mask_section: uc_bc diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/th4-a7060dx5-32-25Gx96-100Gx8-200Gx8.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/th4-a7060dx5-32-25Gx96-100Gx8-200Gx8.config.bcm index b1f52418589..a196ad2a2bc 100644 --- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/th4-a7060dx5-32-25Gx96-100Gx8-200Gx8.config.bcm +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/th4-a7060dx5-32-25Gx96-100Gx8-200Gx8.config.bcm @@ -23,6 +23,7 @@ bcm_device: 0: global: pktio_mode: 1 + default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 shared_block_mask_section: uc_bc diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/BALANCED b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/BALANCED deleted file mode 120000 index 2c9506a909f..00000000000 --- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/BALANCED +++ /dev/null @@ -1 +0,0 @@ -../../../common/profiles/th4/gen/BALANCED \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm index 65b289963d7..0c7dd34d35b 100644 --- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm @@ -23,6 +23,7 @@ bcm_device: 0: global: pktio_mode: 1 + default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 shared_block_mask_section: uc_bc @@ -646,998 +647,3 @@ device: FP_CONFIG: FP_ING_OPERMODE: GLOBAL_PIPE_AWARE ... ---- -device: - 0: - TM_THD_CONFIG: - SKIP_BUFFER_RESERVATION: 1 - THRESHOLD_MODE: LOSSY_AND_LOSSLESS - - TM_SCHEDULER_CONFIG: - NUM_MC_Q: NUM_MC_Q_2 -... ---- -device: - 0: - TM_ING_THD_PORT_PRI_GRP: - ? - PORT_ID: [[0,67], [204,219], [221,253],[255,271]] - TM_PRI_GRP_ID: [[0,7]] - : - MIN_GUARANTEE_CELLS: 0 - DYNAMIC_SHARED_LIMITS: 0 - SHARED_LIMIT_CELLS_STATIC: 0 - HEADROOM_LIMIT_CELLS: 0 - - TM_ING_THD_PORT_SERVICE_POOL: - ? - PORT_ID: [[0,67], [204,219], [221,253],[255,271]] - TM_ING_SERVICE_POOL_ID: [[0,3]] - : - MIN_GUARANTEE_CELLS: 0 - SHARED_LIMIT_CELLS: 0 - - TM_ING_THD_HEADROOM_POOL: - ? - BUFFER_POOL: 0 - TM_HEADROOM_POOL_ID: [[0,3]] - : - LIMIT_CELLS: 0 - - TM_THD_UC_Q: - ? - PORT_ID: [[1,67], [204,219], [221,253],[255,271]] - TM_UC_Q_ID: [[0,11]] - : - MIN_GUARANTEE_CELLS: 0 - SHARED_LIMITS: 1 - DYNAMIC_SHARED_LIMITS: 0 - SHARED_LIMIT_CELLS_STATIC: 0 - - TM_THD_MC_Q: - ? - PORT_ID: 0 - TM_MC_Q_ID: [[0,47]] - : - MIN_GUARANTEE_CELLS: 0 - ? - PORT_ID: [[1,67], [204,219], [221,253],[255,271]] - TM_MC_Q_ID: [[0,5]] - : - MIN_GUARANTEE_CELLS: 0 - SHARED_LIMITS: 1 - DYNAMIC_SHARED_LIMITS: 0 - SHARED_LIMIT_CELLS_STATIC: 0 - - TM_THD_Q_GRP: - ? - PORT_ID: [[0,67], [204,219], [221,253],[255,271]] - : - UC_Q_GRP_MIN_GUARANTEE_CELLS: 0 - MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 -... ---- -device: - 0: - TM_ING_PORT: - ? - PORT_ID: [[0,67], [204,219], [221,253],[255,271]] - : - PAUSE: 0 - - TM_ING_PORT_PRI_GRP: - ? - PORT_ID: [[0,67], [204,219], [221,253],[255,271]] - TM_PRI_GRP_ID: [[0,7]] - : - PFC: 0 - LOSSLESS: 0 - ING_MIN_MODE: USE_PRI_GRP_MIN - - TM_PORT_UC_Q_TO_SERVICE_POOL: - ? - PORT_ID: [[1,67], [204,219], [221,253],[255,271]] - TM_UC_Q_ID: [[0,11]] - : - USE_QGROUP_MIN: 0 - - TM_PORT_MC_Q_TO_SERVICE_POOL: - ? - PORT_ID: 0 - TM_MC_Q_ID: [[0,47]] - : - USE_QGROUP_MIN: 0 - ? - PORT_ID: [[1,67], [204,219], [221,253],[255,271]] - TM_MC_Q_ID: [[0,5]] - : - USE_QGROUP_MIN: 0 -... ---- -device: - 0: - TM_ING_THD_HEADROOM_POOL: - ? - BUFFER_POOL: 0 - TM_HEADROOM_POOL_ID: [[0,3]] - : - LIMIT_CELLS: 0 - - TM_ING_THD_SERVICE_POOL: - ? - BUFFER_POOL: 0 - TM_ING_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_OFFSET_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - - TM_EGR_THD_SERVICE_POOL: - ? - BUFFER_POOL: 0 - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 - - TM_THD_MC_EGR_SERVICE_POOL: - ? - BUFFER_POOL: 0 - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 -... - -### Mapping ---- -device: - 0: - TM_ING_UC_ING_PRI_MAP: - ? - # Profile 1 - TM_ING_UC_ING_PRI_MAP_ID: 1 - ING_PRI: [0, 1, 2, 5, 6, [8,15]] - : - TM_PRI_GRP_ID: 0 - ? - TM_ING_UC_ING_PRI_MAP_ID: 1 - ING_PRI: 3 - : - TM_PRI_GRP_ID: 3 - ? - TM_ING_UC_ING_PRI_MAP_ID: 1 - ING_PRI: 4 - : - TM_PRI_GRP_ID: 4 - ? - TM_ING_UC_ING_PRI_MAP_ID: 1 - ING_PRI: 7 - : - TM_PRI_GRP_ID: 7 - ? - # Profile 2 - TM_ING_UC_ING_PRI_MAP_ID: 1 - ING_PRI: [0, 1, 5, [8,15]] - : - TM_PRI_GRP_ID: 0 - ? - TM_ING_UC_ING_PRI_MAP_ID: 2 - ING_PRI: 2 - : - TM_PRI_GRP_ID: 2 - ? - TM_ING_UC_ING_PRI_MAP_ID: 2 - ING_PRI: 3 - : - TM_PRI_GRP_ID: 3 - ? - TM_ING_UC_ING_PRI_MAP_ID: 2 - ING_PRI: 4 - : - TM_PRI_GRP_ID: 4 - ? - TM_ING_UC_ING_PRI_MAP_ID: 2 - ING_PRI: 6 - : - TM_PRI_GRP_ID: 6 - ? - TM_ING_UC_ING_PRI_MAP_ID: 2 - ING_PRI: 7 - : - TM_PRI_GRP_ID: 7 - ? - # Profile 3 - TM_ING_UC_ING_PRI_MAP_ID: 3 - ING_PRI: [[0,15]] - : - TM_PRI_GRP_ID: 7 - - TM_ING_NONUC_ING_PRI_MAP: - ? - # Profile 1 - TM_ING_NONUC_ING_PRI_MAP_ID: 1 - ING_PRI: [0, 1, 2, 5, 6, [8,15]] - : - TM_PRI_GRP_ID: 0 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 1 - ING_PRI: 3 - : - TM_PRI_GRP_ID: 3 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 1 - ING_PRI: 4 - : - TM_PRI_GRP_ID: 4 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 1 - ING_PRI: 7 - : - TM_PRI_GRP_ID: 7 - ? - # Profile 2 - TM_ING_NONUC_ING_PRI_MAP_ID: 1 - ING_PRI: [0, 1, 5, [8,15]] - : - TM_PRI_GRP_ID: 0 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 2 - ING_PRI: 2 - : - TM_PRI_GRP_ID: 2 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 2 - ING_PRI: 3 - : - TM_PRI_GRP_ID: 3 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 2 - ING_PRI: 4 - : - TM_PRI_GRP_ID: 4 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 2 - ING_PRI: 6 - : - TM_PRI_GRP_ID: 6 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 2 - ING_PRI: 7 - : - TM_PRI_GRP_ID: 7 - ? - # Profile 3 - TM_ING_NONUC_ING_PRI_MAP_ID: 3 - ING_PRI: [[0,15]] - : - TM_PRI_GRP_ID: 7 - - TM_PRI_GRP_POOL_MAP: - ? - TM_PRI_GRP_POOL_MAP_ID: 1 - TM_PRI_GRP_ID: [[0,6]] - : - TM_ING_SERVICE_POOL_ID: 0 - TM_HEADROOM_POOL_ID: 0 - ? - TM_PRI_GRP_POOL_MAP_ID: 1 - TM_PRI_GRP_ID: 7 - : - TM_ING_SERVICE_POOL_ID: 1 - TM_HEADROOM_POOL_ID: 1 - - TM_ING_PORT: - ? - PORT_ID: [0] - : - ING_PRI_MAP_ID: 3 - PRI_GRP_MAP_ID: 1 - ? - PORT_ID: [[1,4], [204,207]] - : - ING_PRI_MAP_ID: 1 - PRI_GRP_MAP_ID: 1 - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - ING_PRI_MAP_ID: 2 - PRI_GRP_MAP_ID: 1 - ? - PORT_ID: [50] - : - ING_PRI_MAP_ID: 1 - PRI_GRP_MAP_ID: 1 - ? - PORT_ID: [33, 67, 237, 271] - : - ING_PRI_MAP_ID: 1 - PRI_GRP_MAP_ID: 1 - - TM_PORT_UC_Q_TO_SERVICE_POOL: - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_UC_Q_ID: [[0,6], [8,9]] - : - TM_EGR_SERVICE_POOL_ID: 0 - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_UC_Q_ID: 7 - : - TM_EGR_SERVICE_POOL_ID: 1 - - TM_PORT_MC_Q_TO_SERVICE_POOL: - ? - PORT_ID: [0] - TM_MC_Q_ID: [[0,47]] - : - TM_EGR_SERVICE_POOL_ID: 1 - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_MC_Q_ID: [[0,1]] - : - TM_EGR_SERVICE_POOL_ID: 0 -... - -### Scheduler ---- -device: - 0: - TM_SCHEDULER_PROFILE: - ? - TM_SCHEDULER_PROFILE_ID: 1 - TM_SCHEDULER_NODE_ID: [0, 1] - : - NUM_UC_Q: 1 - NUM_MC_Q: 1 - FLOW_CTRL_UC: 0 - ? - TM_SCHEDULER_PROFILE_ID: 1 - TM_SCHEDULER_NODE_ID: [2, 5, 6, 7, 8, 9] - : - NUM_UC_Q: 1 - NUM_MC_Q: 0 - FLOW_CTRL_UC: 0 - ? - TM_SCHEDULER_PROFILE_ID: 1 - TM_SCHEDULER_NODE_ID: [3, 4] - : - NUM_UC_Q: 1 - NUM_MC_Q: 0 - FLOW_CTRL_UC: 1 - ? - TM_SCHEDULER_PROFILE_ID: 1 - TM_SCHEDULER_NODE_ID: [10, 11] - : - NUM_UC_Q: 0 - NUM_MC_Q: 0 - FLOW_CTRL_UC: 0 - - TM_SCHEDULER_PROFILE: - ? - TM_SCHEDULER_PROFILE_ID: 2 - TM_SCHEDULER_NODE_ID: [0, 1] - : - NUM_UC_Q: 1 - NUM_MC_Q: 1 - FLOW_CTRL_UC: 0 - ? - TM_SCHEDULER_PROFILE_ID: 2 - TM_SCHEDULER_NODE_ID: [5, 7, 8, 9] - : - NUM_UC_Q: 1 - NUM_MC_Q: 0 - FLOW_CTRL_UC: 0 - ? - TM_SCHEDULER_PROFILE_ID: 2 - TM_SCHEDULER_NODE_ID: [2, 3, 4, 6] - : - NUM_UC_Q: 1 - NUM_MC_Q: 0 - FLOW_CTRL_UC: 1 - ? - TM_SCHEDULER_PROFILE_ID: 2 - TM_SCHEDULER_NODE_ID: [10, 11] - : - NUM_UC_Q: 0 - NUM_MC_Q: 0 - FLOW_CTRL_UC: 0 -... ---- -device: - 0: - TM_SCHEDULER_PORT_PROFILE: - ? - PORT_ID: [[1,4], [204,207]] - : - TM_SCHEDULER_PROFILE_ID: 1 - WRR: 0 - TM_SCHEDULER_PORT_PROFILE: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - TM_SCHEDULER_PROFILE_ID: 2 - WRR: 0 -... - -### Pools -### hard code service pool size for TH4 per architecture requirement. ---- -device: - 0: - TM_ING_THD_HEADROOM_POOL: - ? - BUFFER_POOL: 0 - TM_HEADROOM_POOL_ID: 0 - : - LIMIT_CELLS: 45696 - - TM_ING_THD_SERVICE_POOL: - ? - BUFFER_POOL: 0 - TM_ING_SERVICE_POOL_ID: 0 - : - SHARED_LIMIT_CELLS: 173222 - SHARED_RESUME_OFFSET_CELLS: 74 - COLOR_SPECIFIC_LIMITS: 0 - ? - BUFFER_POOL: 0 - TM_ING_SERVICE_POOL_ID: 1 - : - SHARED_LIMIT_CELLS: 605 - SHARED_RESUME_OFFSET_CELLS: 74 - COLOR_SPECIFIC_LIMITS: 0 - - TM_EGR_THD_SERVICE_POOL: - ? - BUFFER_POOL: 0 - TM_EGR_SERVICE_POOL_ID: 0 - : - SHARED_LIMIT_CELLS: 173222 - SHARED_RESUME_LIMIT_CELLS: 21643 - COLOR_SPECIFIC_LIMITS: 1 - YELLOW_SHARED_LIMIT_CELLS: 16240 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 16230 - RED_SHARED_LIMIT_CELLS: 13533 - RED_SHARED_RESUME_LIMIT_CELLS: 13523 - ? - BUFFER_POOL: 0 - TM_EGR_SERVICE_POOL_ID: 1 - : - SHARED_LIMIT_CELLS: 605 - SHARED_RESUME_LIMIT_CELLS: 73 - COLOR_SPECIFIC_LIMITS: 1 - YELLOW_SHARED_LIMIT_CELLS: 57 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 55 - RED_SHARED_LIMIT_CELLS: 48 - RED_SHARED_RESUME_LIMIT_CELLS: 46 - - TM_THD_MC_EGR_SERVICE_POOL: - ? - BUFFER_POOL: 0 - TM_EGR_SERVICE_POOL_ID: 0 - : - SHARED_LIMIT_CELLS: 15779 - SHARED_RESUME_LIMIT_CELLS: 1962 - COLOR_SPECIFIC_LIMITS: 1 - YELLOW_SHARED_LIMIT_CELLS: 1480 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 1470 - RED_SHARED_LIMIT_CELLS: 1233 - RED_SHARED_RESUME_LIMIT_CELLS: 1223 - ? - BUFFER_POOL: 0 - TM_EGR_SERVICE_POOL_ID: 1 - : - SHARED_LIMIT_CELLS: 605 - SHARED_RESUME_LIMIT_CELLS: 73 - COLOR_SPECIFIC_LIMITS: 1 - YELLOW_SHARED_LIMIT_CELLS: 57 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 55 - RED_SHARED_LIMIT_CELLS: 46 - RED_SHARED_RESUME_LIMIT_CELLS: 46 -... - -### Thresholds -###################################### ---- -device: - 0: - TM_ING_THD_PORT_PRI_GRP: - ? - PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_PRI_GRP_ID: [0, 1, 5, 7] - : - SHARED_LIMIT_CELLS_STATIC: 227317 - MIN_GUARANTEE_CELLS: 0 - DYNAMIC_SHARED_LIMITS: 0 - RESUME_OFFSET_CELLS: 0 - RESUME_FLOOR_CELLS: 0 - HEADROOM_LIMIT_AUTO: 0 - HEADROOM_LIMIT_CELLS: 0 - ? - PORT_ID: [[1,4], [204,207]] - TM_PRI_GRP_ID: [2, 3, 4, 6] - : - MIN_GUARANTEE_CELLS: 18 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1_4 - RESUME_OFFSET_CELLS: 18 - RESUME_FLOOR_CELLS: 0 - HEADROOM_LIMIT_AUTO: 0 - HEADROOM_LIMIT_CELLS: 2874 - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - TM_PRI_GRP_ID: [2, 3, 4, 6] - : - MIN_GUARANTEE_CELLS: 18 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1_4 - RESUME_OFFSET_CELLS: 18 - RESUME_FLOOR_CELLS: 0 - HEADROOM_LIMIT_AUTO: 0 - HEADROOM_LIMIT_CELLS: 675 - ? - PORT_ID: [50] - TM_PRI_GRP_ID: [2, 3, 4, 6] - : - MIN_GUARANTEE_CELLS: 0 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1_4 - RESUME_OFFSET_CELLS: 0 - RESUME_FLOOR_CELLS: 0 - HEADROOM_LIMIT_AUTO: 0 - ? - PORT_ID: [33, 67, 237, 271] - TM_PRI_GRP_ID: [2, 3, 4, 6] - : - MIN_GUARANTEE_CELLS: 0 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1_4 - RESUME_OFFSET_CELLS: 0 - RESUME_FLOOR_CELLS: 0 - HEADROOM_LIMIT_AUTO: 0 - ? - PORT_ID: [0] - TM_PRI_GRP_ID: [2, 3, 4, 6] - : - MIN_GUARANTEE_CELLS: 0 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1_4 - RESUME_OFFSET_CELLS: 0 - RESUME_FLOOR_CELLS: 0 - HEADROOM_LIMIT_AUTO: 0 - - TM_ING_THD_PORT_SERVICE_POOL: - ? - PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_ING_SERVICE_POOL_ID: [0, 1] - : - MIN_GUARANTEE_CELLS: 0 - SHARED_LIMIT_CELLS: 227317 - RESUME_LIMIT_CELLS: 227317 - - TM_THD_UC_Q: - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_UC_Q_ID: [0, 1, 5, 7, 8, 9] - : - SHARED_LIMITS: 1 - COLOR_SPECIFIC_LIMITS: 1 - RED_LIMIT_DYNAMIC: PERCENTAGE_675 - YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 - COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 - MIN_GUARANTEE_CELLS: 7 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1 - RESUME_OFFSET_CELLS: 2 - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_UC_Q_ID: [2, 3, 4, 6] - : - SHARED_LIMITS: 0 - COLOR_SPECIFIC_LIMITS: 0 - COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 - MIN_GUARANTEE_CELLS: 0 - DYNAMIC_SHARED_LIMITS: 0 - SHARED_LIMIT_CELLS_STATIC: 227317 - RESUME_OFFSET_CELLS: 2 - - TM_THD_MC_Q: - ? - PORT_ID: [0] - TM_MC_Q_ID: [0, 1, 2, 3] - : - MIN_GUARANTEE_CELLS: 37 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_2 - COLOR_SPECIFIC_LIMITS: 1 - COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 - YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 - RED_LIMIT_DYNAMIC: PERCENTAGE_675 - RESUME_OFFSET_CELLS: 2 - ? - PORT_ID: [0] - TM_MC_Q_ID: [4, 5, 6, 7, 8, 9] - : - MIN_GUARANTEE_CELLS: 7 - SHARED_LIMITS: 1 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1_4 - COLOR_SPECIFIC_LIMITS: 1 - COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 - YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 - RED_LIMIT_DYNAMIC: PERCENTAGE_675 - RESUME_OFFSET_CELLS: 2 - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_MC_Q_ID: [0, 1] - : - SHARED_LIMITS: 1 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1 - COLOR_SPECIFIC_LIMITS: 1 - COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 - YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 - RED_LIMIT_DYNAMIC: PERCENTAGE_675 - RESUME_OFFSET_CELLS: 2 - - TM_EGR_THD_UC_PORT_SERVICE_POOL: - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_EGR_SERVICE_POOL_ID: 0 - : - SHARED_LIMIT_CELLS: 173222 - SHARED_RESUME_LIMIT_CELLS: 21651 - COLOR_SPECIFIC_LIMITS: 1 - YELLOW_SHARED_LIMIT_CELLS: 16239 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 16237 - RED_SHARED_LIMIT_CELLS: 13532 - RED_SHARED_RESUME_LIMIT_CELLS: 13530 - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_EGR_SERVICE_POOL_ID: 1 - : - SHARED_LIMIT_CELLS: 605 - SHARED_RESUME_LIMIT_CELLS: 73 - COLOR_SPECIFIC_LIMITS: 1 - YELLOW_SHARED_LIMIT_CELLS: 56 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 54 - RED_SHARED_LIMIT_CELLS: 47 - RED_SHARED_RESUME_LIMIT_CELLS: 45 - - TM_EGR_THD_MC_PORT_SERVICE_POOL: - ? - PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_EGR_SERVICE_POOL_ID: 0 - : - COLOR_SPECIFIC_LIMITS: 1 - RED_SHARED_LIMIT_CELLS: 1232 - YELLOW_SHARED_LIMIT_CELLS: 1479 - SHARED_LIMIT_CELLS: 15779 - RED_SHARED_RESUME_LIMIT_CELLS: 1230 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 1477 - SHARED_RESUME_LIMIT_CELLS: 1970 - ? - PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_EGR_SERVICE_POOL_ID: 1 - : - COLOR_SPECIFIC_LIMITS: 1 - RED_SHARED_LIMIT_CELLS: 47 - YELLOW_SHARED_LIMIT_CELLS: 56 - SHARED_LIMIT_CELLS: 605 - RED_SHARED_RESUME_LIMIT_CELLS: 45 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 54 - SHARED_RESUME_LIMIT_CELLS: 73 - - -... -### THDR Limits ---- -device: - 0: - TM_THD_REPL_SERVICE_POOL: - COLOR_SPECIFIC_LIMITS: 1 - SHARED_LIMIT_CELLS: 2961 - SHARED_RESUME_LIMIT_CELLS: 2947 - YELLOW_SHARED_LIMIT_CELLS: 2220 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 2206 - RED_SHARED_LIMIT_CELLS: 1850 - RED_SHARED_RESUME_LIMIT_CELLS: 1836 - - TM_THD_REPL_Q: - ? - REPL_Q_NUM: [0,8] - : - COLOR_SPECIFIC_LIMITS: 1 - COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 - SHARED_LIMITS: 1 - DYNAMIC_SHARED_LIMITS: 1 - RESUME_OFFSET_CELLS: 14 - SHARED_LIMIT_DYNAMIC: ALPHA_1 - YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 - RED_LIMIT_DYNAMIC: PERCENTAGE_675 - RESUME_OFFSET_YELLOW_CELLS: 14 - RESUME_OFFSET_RED_CELLS: 14 - - TM_THD_REPL_Q: - ? - REPL_Q_NUM: [0,5] - : - MIN_GUARANTEE_CELLS: 0 - ? - REPL_Q_NUM: [6,8] - : - MIN_GUARANTEE_CELLS: 37 - -... -### Mirror-on-drop ---- -device: - 0: - TM_MIRROR_ON_DROP_CONTROL: - RESERVED_LIMIT_CELLS: 2580 - - TM_MIRROR_ON_DROP_PROFILE: - ? - TM_MIRROR_ON_DROP_PROFILE_ID: 0 - : - PERCENTAGE_0_25: 65535 - PERCENTAGE_25_50: 65535 - PERCENTAGE_50_75: 65535 - PERCENTAGE_75_100: 65535 - - TM_MIRROR_ON_DROP_DESTINATION: - ? - TM_MIRROR_ON_DROP_DESTINATION_ID: 0 - : - TM_MC_Q_ID: 1 - PORT_ID: 1 -... - -### OBM ---- -device: - 0: - TM_OBM_PORT_PKT_PARSE: - ? - PORT_ID: [[1,4], [204,207]] - : - DSCP_MAP: 1 - HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET - DEFAULT_PKT_PRI: 0 - - TM_OBM_PORT_PKT_PARSE: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - DSCP_MAP: 1 - HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET - DEFAULT_PKT_PRI: 0 - - TM_OBM_PORT_PKT_PRI_TC_MAP: - ? - PORT_ID: [[1,4], [204,207]] - PKT_PRI_TYPE: PKT_PRI_TYPE_DSCP - PKT_PRI: [3, 4] - : - TRAFFIC_CLASS: OBM_TC_LOSSLESS0 - - TM_OBM_PORT_PKT_PRI_TC_MAP: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - PKT_PRI_TYPE: PKT_PRI_TYPE_DSCP - PKT_PRI: [2, 3, 4, 6] - : - TRAFFIC_CLASS: OBM_TC_LOSSLESS0 - - TM_OBM_THD_PORT: - ? - PORT_ID: [[1,4], [204,207]] - : - THD_AUTO: 0 - LOSSY_LOW_MAX_BYTES: 37376 - LOSSLESS0_MAX_BYTES: 235264 - MAX_BYTES: 235264 - - TM_OBM_THD_PORT: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - THD_AUTO: 0 - LOSSY_LOW_MAX_BYTES: 37376 - LOSSLESS0_MAX_BYTES: 235264 - MAX_BYTES: 235264 - - TM_OBM_THD_PORT_FLOW_CTRL: - ? - PORT_ID: [[1,4], [204,207]] - : - THD_AUTO: 0 - LOSSLESS0_XOFF_BYTES: 5184 - LOSSLESS0_XON_BYTES: 4672 - XOFF_BYTES: 5184 - XON_BYTES: 4672 - - TM_OBM_THD_PORT_FLOW_CTRL: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - THD_AUTO: 0 - LOSSLESS0_XOFF_BYTES: 5184 - LOSSLESS0_XON_BYTES: 4672 - XOFF_BYTES: 5184 - XON_BYTES: 4672 - - TM_OBM_PORT_FLOW_CTRL: - ? - PORT_ID: [[1,4], [204,207]] - : - FLOW_CTRL: 1 - FLOW_CTRL_TYPE: PFC - LOSSLESS0_FLOW_CTRL: 1 - - TM_OBM_PORT_FLOW_CTRL: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - FLOW_CTRL: 1 - FLOW_CTRL_TYPE: PFC - LOSSLESS0_FLOW_CTRL: 1 -... - -### PFC ---- -device: - 0: - PC_MAC_CONTROL: - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - : - PAUSE_TX: 0 - PAUSE_RX: 0 - - TM_PFC_EGR: - ? - PORT_ID: [[1,4], [204,207]] - : - TM_PFC_PRI_PROFILE_ID: 1 - - TM_PFC_EGR: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - TM_PFC_PRI_PROFILE_ID: 2 -... ---- -device: - 0: - TM_PFC_PRI_TO_PRI_GRP_MAP: - ? - TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 1 - PFC_PRI: 3 - : - TM_PRI_GRP_ID: 3 - - TM_PFC_PRI_TO_PRI_GRP_MAP: - ? - TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 1 - PFC_PRI: 4 - : - TM_PRI_GRP_ID: 4 - - TM_PFC_PRI_TO_PRI_GRP_MAP: - ? - TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2 - PFC_PRI: 2 - : - TM_PRI_GRP_ID: 2 - - TM_PFC_PRI_TO_PRI_GRP_MAP: - ? - TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2 - PFC_PRI: 3 - : - TM_PRI_GRP_ID: 3 - - TM_PFC_PRI_TO_PRI_GRP_MAP: - ? - TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2 - PFC_PRI: 4 - : - TM_PRI_GRP_ID: 4 - - TM_PFC_PRI_TO_PRI_GRP_MAP: - ? - TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2 - PFC_PRI: 6 - : - TM_PRI_GRP_ID: 6 - - TM_PFC_PRI_PROFILE: - ? - TM_PFC_PRI_PROFILE_ID: 1 - PFC_PRI: 3 - : - PFC: 1 - COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0] - - TM_PFC_PRI_PROFILE: - ? - TM_PFC_PRI_PROFILE_ID: 1 - PFC_PRI: 4 - : - PFC: 1 - COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0] - - TM_PFC_PRI_PROFILE: - ? - TM_PFC_PRI_PROFILE_ID: 2 - PFC_PRI: 2 - : - PFC: 1 - COS_LIST: [0, 0, 1, 0, 0, 0, 0, 0, 0, 0] - - TM_PFC_PRI_PROFILE: - ? - TM_PFC_PRI_PROFILE_ID: 2 - PFC_PRI: 3 - : - PFC: 1 - COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0] - - TM_PFC_PRI_PROFILE: - ? - TM_PFC_PRI_PROFILE_ID: 2 - PFC_PRI: 4 - : - PFC: 1 - COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0] - - TM_PFC_PRI_PROFILE: - ? - TM_PFC_PRI_PROFILE_ID: 2 - PFC_PRI: 6 - : - PFC: 1 - COS_LIST: [0, 0, 0, 0, 0, 0, 1, 0, 0, 0] - - TM_ING_PORT_PRI_GRP: - ? - PORT_ID: [[1,4], [204,207]] - TM_PRI_GRP_ID: [3, 4] - : - PFC: 1 - LOSSLESS: 1 - - TM_ING_PORT_PRI_GRP: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - TM_PRI_GRP_ID: [2, 3, 4, 6] - : - PFC: 1 - LOSSLESS: 1 - - PC_PFC: - ? - PORT_ID: [[1,4], [204,207]] - : - ENABLE_RX: 1 - ENABLE_TX: 1 - - PC_PFC: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - ENABLE_RX: 1 - ENABLE_TX: 1 -... diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml deleted file mode 120000 index d8e2cb69d23..00000000000 --- a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml +++ /dev/null @@ -1 +0,0 @@ -../../x86_64-arista_7060px5_64s/Arista-7060PX5-64S/blackhawk.xml \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml new file mode 100644 index 00000000000..11bfbc5b681 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml @@ -0,0 +1,379 @@ + + + CSDK-BH + retimer + + 0 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + bypass + + + + + + + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + bypass + + + + + + + 2 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + bypass + + + + + + + 3 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + bypass + + + + + + + 4 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + bypass + + + + + + + 5 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + bypass + + + + + + + 6 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + bypass + + + + + + + 7 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + bypass + + + + + + diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/media_settings.json b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/media_settings.json new file mode 100644 index 00000000000..2ec71a30a6c --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/media_settings.json @@ -0,0 +1,4790 @@ +{ + "PORT_MEDIA_SETTINGS": { + "1": { + "Default": { + "main": { + "lane0": "0x9a", + "lane1": "0x9a", + "lane2": "0x9a", + "lane3": "0x9a", + "lane4": "0x9a", + "lane5": "0x9a", + "lane6": "0x9a", + "lane7": "0x9a" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "2": { + "Default": { + "main": { + "lane0": "0x9a", + "lane1": "0x9a", + "lane2": "0x9a", + "lane3": "0x9a", + "lane4": "0x9a", + "lane5": "0x9a", + "lane6": "0x9a", + "lane7": "0x9a" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "3": { + "Default": { + "main": { + "lane0": "0x8a", + "lane1": "0x8b", + "lane2": "0x8b", + "lane3": "0x8a", + "lane4": "0x8a", + "lane5": "0x8b", + "lane6": "0x8a", + "lane7": "0x8b" + }, + "post1": { + "lane0": "0xfffffff6", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff6", + "lane4": "0xfffffff6", + "lane5": "0xfffffff5", + "lane6": "0xfffffff6", + "lane7": "0xfffffff5" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xffffffff", + "lane6": "0xfffffffe", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x2", + "lane4": "0x2", + "lane5": "0x1", + "lane6": "0x2", + "lane7": "0x1" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "4": { + "Default": { + "main": { + "lane0": "0x96", + "lane1": "0x8b", + "lane2": "0x96", + "lane3": "0x8b", + "lane4": "0x8b", + "lane5": "0x8b", + "lane6": "0x8b", + "lane7": "0x8b" + }, + "post1": { + "lane0": "0x0", + "lane1": "0xfffffff5", + "lane2": "0x0", + "lane3": "0xfffffff5", + "lane4": "0xfffffff5", + "lane5": "0xfffffff5", + "lane6": "0xfffffff5", + "lane7": "0xfffffff5" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xfffffffe", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff1", + "lane2": "0xfffffff2", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "5": { + "Default": { + "main": { + "lane0": "0x8a", + "lane1": "0x8b", + "lane2": "0x8b", + "lane3": "0x8a", + "lane4": "0x8a", + "lane5": "0x8b", + "lane6": "0x8a", + "lane7": "0x8b" + }, + "post1": { + "lane0": "0xfffffff6", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff6", + "lane4": "0xfffffff6", + "lane5": "0xfffffff5", + "lane6": "0xfffffff6", + "lane7": "0xfffffff5" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xffffffff", + "lane6": "0xfffffffe", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x2", + "lane4": "0x2", + "lane5": "0x1", + "lane6": "0x2", + "lane7": "0x1" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "6": { + "Default": { + "main": { + "lane0": "0x96", + "lane1": "0x8b", + "lane2": "0x96", + "lane3": "0x8b", + "lane4": "0x8b", + "lane5": "0x96", + "lane6": "0x8b", + "lane7": "0x96" + }, + "post1": { + "lane0": "0x0", + "lane1": "0xfffffff5", + "lane2": "0x0", + "lane3": "0xfffffff5", + "lane4": "0xfffffff5", + "lane5": "0x0", + "lane6": "0xfffffff5", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xfffffffe", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xfffffffe", + "lane6": "0xffffffff", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff1", + "lane2": "0xfffffff2", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff2", + "lane6": "0xfffffff1", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "7": { + "Default": { + "main": { + "lane0": "0x9f", + "lane1": "0x8b", + "lane2": "0x9f", + "lane3": "0x8a", + "lane4": "0x9f", + "lane5": "0x8b", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0x0", + "lane1": "0xfffffff5", + "lane2": "0x0", + "lane3": "0xfffffff6", + "lane4": "0x0", + "lane5": "0xfffffff5", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xffffffff", + "lane2": "0xfffffffd", + "lane3": "0xfffffffe", + "lane4": "0xfffffffd", + "lane5": "0xffffffff", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0x0", + "lane1": "0xfffffffd", + "lane2": "0x0", + "lane3": "0xfffffffd", + "lane4": "0x0", + "lane5": "0xfffffffd", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff1", + "lane2": "0xfffffff8", + "lane3": "0xfffffff1", + "lane4": "0xfffffff8", + "lane5": "0xfffffff1", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x2", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "8": { + "Default": { + "main": { + "lane0": "0x96", + "lane1": "0x8b", + "lane2": "0x96", + "lane3": "0x8b", + "lane4": "0x96", + "lane5": "0x96", + "lane6": "0x96", + "lane7": "0x96" + }, + "post1": { + "lane0": "0x0", + "lane1": "0xfffffff5", + "lane2": "0x0", + "lane3": "0xfffffff5", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xfffffffe", + "lane3": "0xffffffff", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff1", + "lane2": "0xfffffff2", + "lane3": "0xfffffff1", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "9": { + "Default": { + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "10": { + "Default": { + "main": { + "lane0": "0x96", + "lane1": "0x96", + "lane2": "0x96", + "lane3": "0x96", + "lane4": "0x96", + "lane5": "0x96", + "lane6": "0x96", + "lane7": "0x96" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "11": { + "Default": { + "main": { + "lane0": "0x90", + "lane1": "0x9f", + "lane2": "0x90", + "lane3": "0x9f", + "lane4": "0x90", + "lane5": "0x9f", + "lane6": "0x90", + "lane7": "0x90" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0x0", + "lane2": "0xfffffff4", + "lane3": "0x0", + "lane4": "0xfffffff4", + "lane5": "0x0", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffd", + "lane2": "0xfffffffe", + "lane3": "0xfffffffd", + "lane4": "0xfffffffe", + "lane5": "0xfffffffd", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0x0", + "lane2": "0xfffffffd", + "lane3": "0x0", + "lane4": "0xfffffffd", + "lane5": "0x0", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff8", + "lane2": "0xfffffff7", + "lane3": "0xfffffff8", + "lane4": "0xfffffff7", + "lane5": "0xfffffff8", + "lane6": "0xfffffff7", + "lane7": "0xfffffff7" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "12": { + "Default": { + "main": { + "lane0": "0x8f", + "lane1": "0x96", + "lane2": "0x8f", + "lane3": "0x96", + "lane4": "0x8f", + "lane5": "0x96", + "lane6": "0x8f", + "lane7": "0x96" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0x0", + "lane2": "0xfffffff9", + "lane3": "0x0", + "lane4": "0xfffffff9", + "lane5": "0x0", + "lane6": "0xfffffff9", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xfffffffe", + "lane2": "0xffffffff", + "lane3": "0xfffffffe", + "lane4": "0xffffffff", + "lane5": "0xfffffffe", + "lane6": "0xffffffff", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff2", + "lane2": "0xfffffff3", + "lane3": "0xfffffff2", + "lane4": "0xfffffff3", + "lane5": "0xfffffff2", + "lane6": "0xfffffff3", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x1", + "lane2": "0x3", + "lane3": "0x1", + "lane4": "0x3", + "lane5": "0x1", + "lane6": "0x3", + "lane7": "0x1" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "13": { + "Default": { + "main": { + "lane0": "0x90", + "lane1": "0x90", + "lane2": "0x90", + "lane3": "0x90", + "lane4": "0x90", + "lane5": "0x90", + "lane6": "0x90", + "lane7": "0x90" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", + "lane4": "0xfffffff7", + "lane5": "0xfffffff7", + "lane6": "0xfffffff7", + "lane7": "0xfffffff7" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "14": { + "Default": { + "main": { + "lane0": "0x8f", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x8f", + "lane4": "0x8f", + "lane5": "0x8f", + "lane6": "0x8f", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "15": { + "Default": { + "main": { + "lane0": "0x90", + "lane1": "0x90", + "lane2": "0x90", + "lane3": "0x90", + "lane4": "0x90", + "lane5": "0x90", + "lane6": "0x90", + "lane7": "0x90" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", + "lane4": "0xfffffff7", + "lane5": "0xfffffff7", + "lane6": "0xfffffff7", + "lane7": "0xfffffff7" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "16": { + "Default": { + "main": { + "lane0": "0x8f", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x8f", + "lane4": "0x8f", + "lane5": "0x8f", + "lane6": "0x8f", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "17": { + "Default": { + "main": { + "lane0": "0x90", + "lane1": "0x90", + "lane2": "0x90", + "lane3": "0x90", + "lane4": "0x90", + "lane5": "0x90", + "lane6": "0x90", + "lane7": "0x90" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", + "lane4": "0xfffffff7", + "lane5": "0xfffffff7", + "lane6": "0xfffffff7", + "lane7": "0xfffffff7" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "18": { + "Default": { + "main": { + "lane0": "0x8f", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x8f", + "lane4": "0x8f", + "lane5": "0x8f", + "lane6": "0x8f", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "19": { + "Default": { + "main": { + "lane0": "0x90", + "lane1": "0x90", + "lane2": "0x90", + "lane3": "0x90", + "lane4": "0x90", + "lane5": "0x90", + "lane6": "0x90", + "lane7": "0x90" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", + "lane4": "0xfffffff7", + "lane5": "0xfffffff7", + "lane6": "0xfffffff7", + "lane7": "0xfffffff7" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "20": { + "Default": { + "main": { + "lane0": "0x8f", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x8f", + "lane4": "0x8f", + "lane5": "0x8f", + "lane6": "0x8f", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "21": { + "Default": { + "main": { + "lane0": "0x90", + "lane1": "0x90", + "lane2": "0x90", + "lane3": "0x90", + "lane4": "0x90", + "lane5": "0x90", + "lane6": "0x90", + "lane7": "0x90" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", + "lane4": "0xfffffff7", + "lane5": "0xfffffff7", + "lane6": "0xfffffff7", + "lane7": "0xfffffff7" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "22": { + "Default": { + "main": { + "lane0": "0x8f", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x8f", + "lane4": "0x8f", + "lane5": "0x8f", + "lane6": "0x8f", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "23": { + "Default": { + "main": { + "lane0": "0x90", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x90", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0xfffffff4", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffe", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0xfffffffd", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff7", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "24": { + "Default": { + "main": { + "lane0": "0x8f", + "lane1": "0x96", + "lane2": "0x96", + "lane3": "0x96", + "lane4": "0x96", + "lane5": "0x96", + "lane6": "0x96", + "lane7": "0x96" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "25": { + "Default": { + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "26": { + "Default": { + "main": { + "lane0": "0x96", + "lane1": "0x96", + "lane2": "0x96", + "lane3": "0x96", + "lane4": "0x96", + "lane5": "0x96", + "lane6": "0x96", + "lane7": "0x96" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "27": { + "Default": { + "main": { + "lane0": "0x9f", + "lane1": "0x8b", + "lane2": "0x8b", + "lane3": "0x8a", + "lane4": "0x9f", + "lane5": "0x8b", + "lane6": "0x8a", + "lane7": "0x8b" + }, + "post1": { + "lane0": "0x0", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff6", + "lane4": "0x0", + "lane5": "0xfffffff5", + "lane6": "0xfffffff6", + "lane7": "0xfffffff5" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xfffffffe", + "lane4": "0xfffffffd", + "lane5": "0xffffffff", + "lane6": "0xfffffffe", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0x0", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0x0", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff8", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x2", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x2", + "lane7": "0x1" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "28": { + "Default": { + "main": { + "lane0": "0x96", + "lane1": "0x8b", + "lane2": "0x96", + "lane3": "0x8b", + "lane4": "0x96", + "lane5": "0x96", + "lane6": "0x8b", + "lane7": "0x96" + }, + "post1": { + "lane0": "0x0", + "lane1": "0xfffffff5", + "lane2": "0x0", + "lane3": "0xfffffff5", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0xfffffff5", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xfffffffe", + "lane3": "0xffffffff", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xffffffff", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff1", + "lane2": "0xfffffff2", + "lane3": "0xfffffff1", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff1", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "29": { + "Default": { + "main": { + "lane0": "0x8a", + "lane1": "0x8b", + "lane2": "0x8b", + "lane3": "0x8a", + "lane4": "0x8a", + "lane5": "0x8b", + "lane6": "0x8a", + "lane7": "0x8b" + }, + "post1": { + "lane0": "0xfffffff6", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff6", + "lane4": "0xfffffff6", + "lane5": "0xfffffff5", + "lane6": "0xfffffff6", + "lane7": "0xfffffff5" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xffffffff", + "lane6": "0xfffffffe", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x2", + "lane4": "0x2", + "lane5": "0x1", + "lane6": "0x2", + "lane7": "0x1" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "30": { + "Default": { + "main": { + "lane0": "0x96", + "lane1": "0x8b", + "lane2": "0x96", + "lane3": "0x8b", + "lane4": "0x8b", + "lane5": "0x96", + "lane6": "0x8b", + "lane7": "0x96" + }, + "post1": { + "lane0": "0x0", + "lane1": "0xfffffff5", + "lane2": "0x0", + "lane3": "0xfffffff5", + "lane4": "0xfffffff5", + "lane5": "0x0", + "lane6": "0xfffffff5", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xfffffffe", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xfffffffe", + "lane6": "0xffffffff", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff1", + "lane2": "0xfffffff2", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff2", + "lane6": "0xfffffff1", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "31": { + "Default": { + "main": { + "lane0": "0x9a", + "lane1": "0x9a", + "lane2": "0x9a", + "lane3": "0x9a", + "lane4": "0x9a", + "lane5": "0x9a", + "lane6": "0x9a", + "lane7": "0x9a" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "32": { + "Default": { + "main": { + "lane0": "0x9a", + "lane1": "0x9a", + "lane2": "0x9a", + "lane3": "0x9a", + "lane4": "0x9a", + "lane5": "0x9a", + "lane6": "0x9a", + "lane7": "0x9a" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "33": { + "Default": { + "main": { + "lane0": "0x9a", + "lane1": "0x9a", + "lane2": "0x9a", + "lane3": "0x9a", + "lane4": "0x9a", + "lane5": "0x9a", + "lane6": "0x9a", + "lane7": "0x9a" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "34": { + "Default": { + "main": { + "lane0": "0x9a", + "lane1": "0x9a", + "lane2": "0x9a", + "lane3": "0x9a", + "lane4": "0x9a", + "lane5": "0x9a", + "lane6": "0x9a", + "lane7": "0x9a" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "35": { + "Default": { + "main": { + "lane0": "0x8e", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x8e", + "lane4": "0x8e", + "lane5": "0x8f", + "lane6": "0x8e", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffd", + "lane6": "0xfffffffb", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffd", + "lane6": "0xfffffffc", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffc", + "lane6": "0xfffffffe", + "lane7": "0xfffffffc" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff1", + "lane6": "0xfffffff0", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x2", + "lane6": "0x1", + "lane7": "0x2" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "36": { + "Default": { + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "37": { + "Default": { + "main": { + "lane0": "0x8e", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x8e", + "lane4": "0x8e", + "lane5": "0x8f", + "lane6": "0x8e", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffd", + "lane6": "0xfffffffb", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffd", + "lane6": "0xfffffffc", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffc", + "lane6": "0xfffffffe", + "lane7": "0xfffffffc" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff1", + "lane6": "0xfffffff0", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x2", + "lane6": "0x1", + "lane7": "0x2" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "38": { + "Default": { + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "39": { + "Default": { + "main": { + "lane0": "0x99", + "lane1": "0x99", + "lane2": "0x99", + "lane3": "0x99", + "lane4": "0x99", + "lane5": "0x99", + "lane6": "0x99", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffc" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x2" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "40": { + "Default": { + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "41": { + "Default": { + "main": { + "lane0": "0x99", + "lane1": "0x99", + "lane2": "0x99", + "lane3": "0x99", + "lane4": "0x99", + "lane5": "0x99", + "lane6": "0x99", + "lane7": "0x99" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "42": { + "Default": { + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "43": { + "Default": { + "main": { + "lane0": "0x8f", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x8f", + "lane4": "0x8f", + "lane5": "0x8f", + "lane6": "0x8f", + "lane7": "0x99" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "44": { + "Default": { + "main": { + "lane0": "0x91", + "lane1": "0x91", + "lane2": "0x91", + "lane3": "0x91", + "lane4": "0x91", + "lane5": "0x91", + "lane6": "0x91", + "lane7": "0x91" + }, + "post1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "45": { + "Default": { + "main": { + "lane0": "0x8f", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x8f", + "lane4": "0x8f", + "lane5": "0x8f", + "lane6": "0x8f", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "46": { + "Default": { + "main": { + "lane0": "0x91", + "lane1": "0x91", + "lane2": "0x91", + "lane3": "0x91", + "lane4": "0x91", + "lane5": "0x91", + "lane6": "0x91", + "lane7": "0x91" + }, + "post1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "47": { + "Default": { + "main": { + "lane0": "0x8f", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x8f", + "lane4": "0x8f", + "lane5": "0x8f", + "lane6": "0x8f", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "48": { + "Default": { + "main": { + "lane0": "0x91", + "lane1": "0x91", + "lane2": "0x91", + "lane3": "0x91", + "lane4": "0x91", + "lane5": "0x91", + "lane6": "0x91", + "lane7": "0x91" + }, + "post1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "49": { + "Default": { + "main": { + "lane0": "0x8f", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x8f", + "lane4": "0x8f", + "lane5": "0x8f", + "lane6": "0x8f", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "50": { + "Default": { + "main": { + "lane0": "0x91", + "lane1": "0x91", + "lane2": "0x91", + "lane3": "0x91", + "lane4": "0x91", + "lane5": "0x91", + "lane6": "0x91", + "lane7": "0x91" + }, + "post1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "51": { + "Default": { + "main": { + "lane0": "0x8f", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x99", + "lane4": "0x8f", + "lane5": "0x8f", + "lane6": "0x8f", + "lane7": "0x99" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0x0", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xfffffffe", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff4", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x0", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "52": { + "Default": { + "main": { + "lane0": "0x91", + "lane1": "0x91", + "lane2": "0x91", + "lane3": "0x91", + "lane4": "0x91", + "lane5": "0x91", + "lane6": "0x91", + "lane7": "0x91" + }, + "post1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "53": { + "Default": { + "main": { + "lane0": "0x8f", + "lane1": "0x99", + "lane2": "0x8f", + "lane3": "0x99", + "lane4": "0x99", + "lane5": "0x8f", + "lane6": "0x8f", + "lane7": "0x99" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0x0", + "lane2": "0xfffffff9", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xfffffffe", + "lane2": "0xffffffff", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff4", + "lane2": "0xfffffff3", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x0", + "lane2": "0x3", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "54": { + "Default": { + "main": { + "lane0": "0x91", + "lane1": "0x91", + "lane2": "0x91", + "lane3": "0x9f", + "lane4": "0x91", + "lane5": "0x91", + "lane6": "0x91", + "lane7": "0x91" + }, + "post1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0x0", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xfffffffd", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xffffffff", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff9", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x0", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "55": { + "Default": { + "main": { + "lane0": "0x99", + "lane1": "0x99", + "lane2": "0x99", + "lane3": "0x99", + "lane4": "0x99", + "lane5": "0x99", + "lane6": "0x99", + "lane7": "0x99" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "56": { + "Default": { + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "57": { + "Default": { + "main": { + "lane0": "0x99", + "lane1": "0x8f", + "lane2": "0x99", + "lane3": "0x8e", + "lane4": "0x99", + "lane5": "0x99", + "lane6": "0x99", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0x0", + "lane1": "0xfffffffd", + "lane2": "0x0", + "lane3": "0xfffffffb", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffd", + "lane2": "0xfffffffe", + "lane3": "0xfffffffc", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffc", + "lane2": "0xfffffffd", + "lane3": "0xfffffffe", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffc" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff1", + "lane2": "0xfffffff4", + "lane3": "0xfffffff0", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x2", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x2" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "58": { + "Default": { + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "59": { + "Default": { + "main": { + "lane0": "0x8e", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x8e", + "lane4": "0x8e", + "lane5": "0x8f", + "lane6": "0x8e", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffd", + "lane6": "0xfffffffb", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffd", + "lane6": "0xfffffffc", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffc", + "lane6": "0xfffffffe", + "lane7": "0xfffffffc" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff1", + "lane6": "0xfffffff0", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x2", + "lane6": "0x1", + "lane7": "0x2" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "60": { + "Default": { + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "61": { + "Default": { + "main": { + "lane0": "0x8e", + "lane1": "0x8f", + "lane2": "0x8f", + "lane3": "0x8e", + "lane4": "0x8e", + "lane5": "0x8f", + "lane6": "0x8e", + "lane7": "0x8f" + }, + "post1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffd", + "lane6": "0xfffffffb", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffd", + "lane6": "0xfffffffc", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffc", + "lane6": "0xfffffffe", + "lane7": "0xfffffffc" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff1", + "lane6": "0xfffffff0", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x2", + "lane6": "0x1", + "lane7": "0x2" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "62": { + "Default": { + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "63": { + "Default": { + "main": { + "lane0": "0x9a", + "lane1": "0x9a", + "lane2": "0x9a", + "lane3": "0x9a", + "lane4": "0x9a", + "lane5": "0x9a", + "lane6": "0x9a", + "lane7": "0x9a" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "64": { + "Default": { + "main": { + "lane0": "0x9a", + "lane1": "0x9a", + "lane2": "0x9a", + "lane3": "0x9a", + "lane4": "0x9a", + "lane5": "0x9a", + "lane6": "0x9a", + "lane7": "0x9a" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "65": { + "Default": { + "main": { + "lane0": "0x32" + }, + "post1": { + "lane0": "0x5" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + }, + "pre1": { + "lane0": "0x5" + }, + "pre2": { + "lane0": "0x0" + }, + "pre3": { + "lane0": "0x0" + } + } + }, + "66": { + "Default": { + "main": { + "lane0": "0x32" + }, + "post1": { + "lane0": "0x5" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + }, + "pre1": { + "lane0": "0x5" + }, + "pre2": { + "lane0": "0x0" + }, + "pre3": { + "lane0": "0x0" + } + } + } + } +} \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/port_config.ini b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/port_config.ini index c7bdcf79be6..ef35708de11 100644 --- a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/port_config.ini +++ b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/port_config.ini @@ -1,67 +1,67 @@ # name lanes alias index speed fec -Ethernet0 9,10,11,12,13,14,15,16 Ethernet1/1 1 400000 rs -Ethernet8 5,6,7,8,9,10,11,12 Ethernet2/1 2 400000 rs -Ethernet16 25,26,27,28,29,30,31,32 Ethernet3/1 3 400000 rs -Ethernet24 17,18,19,20,21,22,23,24 Ethernet4/1 4 400000 rs -Ethernet32 41,42,43,44,45,46,47,48 Ethernet5/1 5 400000 rs -Ethernet40 33,34,35,36,37,38,39,40 Ethernet6/1 6 400000 rs -Ethernet48 57,58,59,60,61,62,63,64 Ethernet7/1 7 400000 rs -Ethernet56 49,50,51,52,53,54,55,56 Ethernet8/1 8 400000 rs -Ethernet64 73,74,75,76,77,78,79,80 Ethernet9/1 9 400000 rs -Ethernet72 65,66,67,68,69,70,71,72 Ethernet10/1 10 400000 rs -Ethernet80 89,90,91,92,93,94,95,96 Ethernet11/1 11 400000 rs -Ethernet88 81,82,83,84,85,86,87,88 Ethernet12/1 12 400000 rs -Ethernet96 105,106,107,108,109,110,111,112 Ethernet13/1 13 400000 rs -Ethernet104 97,98,99,100,101,102,103,104 Ethernet14/1 14 400000 rs -Ethernet112 121,122,123,124,125,126,127,128 Ethernet15/1 15 400000 rs -Ethernet120 117,118,119,120,121,122,123,124 Ethernet16/1 16 400000 rs -Ethernet128 141,142,143,144,145,146,147,148 Ethernet17/1 17 400000 rs -Ethernet136 129,130,131,132,133,134,135,136 Ethernet18/1 18 400000 rs -Ethernet144 153,154,155,156,157,158,159,160 Ethernet19/1 19 400000 rs -Ethernet152 145,146,147,148,149,150,151,152 Ethernet20/1 20 400000 rs -Ethernet160 169,170,171,172,173,174,175,176 Ethernet21/1 21 400000 rs -Ethernet168 161,162,163,164,165,166,167,168 Ethernet22/1 22 400000 rs -Ethernet176 185,186,187,188,189,190,191,192 Ethernet23/1 23 400000 rs -Ethernet184 177,178,179,180,181,182,183,184 Ethernet24/1 24 400000 rs -Ethernet192 201,202,203,204,205,206,207,208 Ethernet25/1 25 400000 rs -Ethernet200 193,194,195,196,197,198,199,200 Ethernet26/1 26 400000 rs -Ethernet208 217,218,219,220,221,222,223,224 Ethernet27/1 27 400000 rs -Ethernet216 209,210,211,212,213,214,215,216 Ethernet28/1 28 400000 rs -Ethernet224 233,234,235,236,237,238,239,240 Ethernet29/1 29 400000 rs -Ethernet232 225,226,227,228,229,230,231,232 Ethernet30/1 30 400000 rs -Ethernet240 241,242,243,244,245,246,247,248 Ethernet31/1 31 400000 rs -Ethernet248 253,254,255,256,257,258,259,260 Ethernet32/1 32 400000 rs +Ethernet0 17,18,19,20,21,22,23,24 Ethernet1/1 1 400000 rs +Ethernet8 9,10,11,12,13,14,15,16 Ethernet2/1 2 400000 rs +Ethernet16 49,50,51,52,53,54,55,56 Ethernet3/1 3 400000 rs +Ethernet24 33,34,35,36,37,38,39,40 Ethernet4/1 4 400000 rs +Ethernet32 81,82,83,84,85,86,87,88 Ethernet5/1 5 400000 rs +Ethernet40 65,66,67,68,69,70,71,72 Ethernet6/1 6 400000 rs +Ethernet48 113,114,115,116,117,118,119,120 Ethernet7/1 7 400000 rs +Ethernet56 97,98,99,100,101,102,103,104 Ethernet8/1 8 400000 rs +Ethernet64 145,146,147,148,149,150,151,152 Ethernet9/1 9 400000 rs +Ethernet72 129,130,131,132,133,134,135,136 Ethernet10/1 10 400000 rs +Ethernet80 177,178,179,180,181,182,183,184 Ethernet11/1 11 400000 rs +Ethernet88 161,162,163,164,165,166,167,168 Ethernet12/1 12 400000 rs +Ethernet96 209,210,211,212,213,214,215,216 Ethernet13/1 13 400000 rs +Ethernet104 193,194,195,196,197,198,199,200 Ethernet14/1 14 400000 rs +Ethernet112 241,242,243,244,245,246,247,248 Ethernet15/1 15 400000 rs +Ethernet120 233,234,235,236,237,238,239,240 Ethernet16/1 16 400000 rs +Ethernet128 281,282,283,284,285,286,287,288 Ethernet17/1 17 400000 rs +Ethernet136 257,258,259,260,261,262,263,264 Ethernet18/1 18 400000 rs +Ethernet144 305,306,307,308,309,310,311,312 Ethernet19/1 19 400000 rs +Ethernet152 289,290,291,292,293,294,295,296 Ethernet20/1 20 400000 rs +Ethernet160 337,338,339,340,341,342,343,344 Ethernet21/1 21 400000 rs +Ethernet168 321,322,323,324,325,326,327,328 Ethernet22/1 22 400000 rs +Ethernet176 369,370,371,372,373,374,375,376 Ethernet23/1 23 400000 rs +Ethernet184 353,354,355,356,357,358,359,360 Ethernet24/1 24 400000 rs +Ethernet192 401,402,403,404,405,406,407,408 Ethernet25/1 25 400000 rs +Ethernet200 385,386,387,388,389,390,391,392 Ethernet26/1 26 400000 rs +Ethernet208 433,434,435,436,437,438,439,440 Ethernet27/1 27 400000 rs +Ethernet216 417,418,419,420,421,422,423,424 Ethernet28/1 28 400000 rs +Ethernet224 465,466,467,468,469,470,471,472 Ethernet29/1 29 400000 rs +Ethernet232 449,450,451,452,453,454,455,456 Ethernet30/1 30 400000 rs +Ethernet240 481,482,483,484,485,486,487,488 Ethernet31/1 31 400000 rs +Ethernet248 505,506,507,508,509,510,511,512 Ethernet32/1 32 400000 rs Ethernet256 1,2,3,4,5,6,7,8 Ethernet33/1 33 400000 rs -Ethernet264 13,14,15,16,17,18,19,20 Ethernet34/1 34 400000 rs -Ethernet272 29,30,31,32,33,34,35,36 Ethernet35/1 35 400000 rs -Ethernet280 21,22,23,24,25,26,27,28 Ethernet36/1 36 400000 rs -Ethernet288 45,46,47,48,49,50,51,52 Ethernet37/1 37 400000 rs -Ethernet296 37,38,39,40,41,42,43,44 Ethernet38/1 38 400000 rs -Ethernet304 61,62,63,64,65,66,67,68 Ethernet39/1 39 400000 rs -Ethernet312 53,54,55,56,57,58,59,60 Ethernet40/1 40 400000 rs -Ethernet320 77,78,79,80,81,82,83,84 Ethernet41/1 41 400000 rs -Ethernet328 69,70,71,72,73,74,75,76 Ethernet42/1 42 400000 rs -Ethernet336 93,94,95,96,97,98,99,100 Ethernet43/1 43 400000 rs -Ethernet344 85,86,87,88,89,90,91,92 Ethernet44/1 44 400000 rs -Ethernet352 109,110,111,112,113,114,115,116 Ethernet45/1 45 400000 rs -Ethernet360 101,102,103,104,105,106,107,108 Ethernet46/1 46 400000 rs -Ethernet368 125,126,127,128,129,130,131,132 Ethernet47/1 47 400000 rs -Ethernet376 113,114,115,116,117,118,119,120 Ethernet48/1 48 400000 rs -Ethernet384 137,138,139,140,141,142,143,144 Ethernet49/1 49 400000 rs -Ethernet392 133,134,135,136,137,138,139,140 Ethernet50/1 50 400000 rs -Ethernet400 157,158,159,160,161,162,163,164 Ethernet51/1 51 400000 rs -Ethernet408 149,150,151,152,153,154,155,156 Ethernet52/1 52 400000 rs -Ethernet416 173,174,175,176,177,178,179,180 Ethernet53/1 53 400000 rs -Ethernet424 165,166,167,168,169,170,171,172 Ethernet54/1 54 400000 rs -Ethernet432 189,190,191,192,193,194,195,196 Ethernet55/1 55 400000 rs -Ethernet440 181,182,183,184,185,186,187,188 Ethernet56/1 56 400000 rs -Ethernet448 205,206,207,208,209,210,211,212 Ethernet57/1 57 400000 rs -Ethernet456 197,198,199,200,201,202,203,204 Ethernet58/1 58 400000 rs -Ethernet464 221,222,223,224,225,226,227,228 Ethernet59/1 59 400000 rs -Ethernet472 213,214,215,216,217,218,219,220 Ethernet60/1 60 400000 rs -Ethernet480 237,238,239,240,241,242,243,244 Ethernet61/1 61 400000 rs -Ethernet488 229,230,231,232,233,234,235,236 Ethernet62/1 62 400000 rs -Ethernet496 249,250,251,252,253,254,255,256 Ethernet63/1 63 400000 rs -Ethernet504 245,246,247,248,249,250,251,252 Ethernet64/1 64 400000 rs -Ethernet512 258 Ethernet65 65 10000 none -Ethernet513 257 Ethernet66 66 10000 none +Ethernet264 25,26,27,28,29,30,31,32 Ethernet34/1 34 400000 rs +Ethernet272 57,58,59,60,61,62,63,64 Ethernet35/1 35 400000 rs +Ethernet280 41,42,43,44,45,46,47,48 Ethernet36/1 36 400000 rs +Ethernet288 89,90,91,92,93,94,95,96 Ethernet37/1 37 400000 rs +Ethernet296 73,74,75,76,77,78,79,80 Ethernet38/1 38 400000 rs +Ethernet304 121,122,123,124,125,126,127,128 Ethernet39/1 39 400000 rs +Ethernet312 105,106,107,108,109,110,111,112 Ethernet40/1 40 400000 rs +Ethernet320 153,154,155,156,157,158,159,160 Ethernet41/1 41 400000 rs +Ethernet328 137,138,139,140,141,142,143,144 Ethernet42/1 42 400000 rs +Ethernet336 185,186,187,188,189,190,191,192 Ethernet43/1 43 400000 rs +Ethernet344 169,170,171,172,173,174,175,176 Ethernet44/1 44 400000 rs +Ethernet352 217,218,219,220,221,222,223,224 Ethernet45/1 45 400000 rs +Ethernet360 201,202,203,204,205,206,207,208 Ethernet46/1 46 400000 rs +Ethernet368 249,250,251,252,253,254,255,256 Ethernet47/1 47 400000 rs +Ethernet376 225,226,227,228,229,230,231,232 Ethernet48/1 48 400000 rs +Ethernet384 273,274,275,276,277,278,279,280 Ethernet49/1 49 400000 rs +Ethernet392 265,266,267,268,269,270,271,272 Ethernet50/1 50 400000 rs +Ethernet400 313,314,315,316,317,318,319,320 Ethernet51/1 51 400000 rs +Ethernet408 297,298,299,300,301,302,303,304 Ethernet52/1 52 400000 rs +Ethernet416 345,346,347,348,349,350,351,352 Ethernet53/1 53 400000 rs +Ethernet424 329,330,331,332,333,334,335,336 Ethernet54/1 54 400000 rs +Ethernet432 377,378,379,380,381,382,383,384 Ethernet55/1 55 400000 rs +Ethernet440 361,362,363,364,365,366,367,368 Ethernet56/1 56 400000 rs +Ethernet448 409,410,411,412,413,414,415,416 Ethernet57/1 57 400000 rs +Ethernet456 393,394,395,396,397,398,399,400 Ethernet58/1 58 400000 rs +Ethernet464 441,442,443,444,445,446,447,448 Ethernet59/1 59 400000 rs +Ethernet472 425,426,427,428,429,430,431,432 Ethernet60/1 60 400000 rs +Ethernet480 473,474,475,476,477,478,479,480 Ethernet61/1 61 400000 rs +Ethernet488 457,458,459,460,461,462,463,464 Ethernet62/1 62 400000 rs +Ethernet496 497,498,499,500,501,502,503,504 Ethernet63/1 63 400000 rs +Ethernet504 489,490,491,492,493,494,495,496 Ethernet64/1 64 400000 rs +Ethernet512 515 Ethernet65 65 10000 none +Ethernet513 513 Ethernet66 66 10000 none diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/th4-a7060dx5-64s.config.bcm b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/th4-a7060dx5-64s.config.bcm index 1d589449836..ec5f4d9f0f4 100644 --- a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/th4-a7060dx5-64s.config.bcm +++ b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/th4-a7060dx5-64s.config.bcm @@ -23,6 +23,7 @@ bcm_device: 0: global: pktio_mode: 1 + default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 shared_block_mask_section: uc_bc diff --git a/device/arista/x86_64-arista_7060dx5_64s/platform.json b/device/arista/x86_64-arista_7060dx5_64s/platform.json index fa89a17687b..a006f48dae4 100644 --- a/device/arista/x86_64-arista_7060dx5_64s/platform.json +++ b/device/arista/x86_64-arista_7060dx5_64s/platform.json @@ -1,7 +1,20 @@ { "chassis": { "name": "DCS-7060DX5-64S", - "components": [], + "components": [ + { + "name": "Aboot()" + }, + { + "name": "Scd(addr=0000:00:18.7)" + }, + { + "name": "Scd(addr=0000:01:00.0)" + }, + { + "name": "LorikeetSysCpld(addr=13-0023)" + } + ], "fans": [], "fan_drawers": [ { @@ -40,24 +53,30 @@ "psus": [ { "name": "psu1", - "fans": [] + "fans": [ + { + "name": "psu1/1", + "speed": { + "controllable": false + } + } + ] }, { "name": "psu2", - "fans": [] + "fans": [ + { + "name": "psu2/1", + "speed": { + "controllable": false + } + } + ] } ], "thermals": [ { - "name": "Board sensor", - "controllable": false - }, - { - "name": "TH4 exhaust temp sensor", - "controllable": false - }, - { - "name": "Inlet temp sensor", + "name": "Cpu temp sensor", "controllable": false }, { @@ -65,35 +84,23 @@ "controllable": false }, { - "name": "Back panel temp sensor", + "name": "Back-panel temp sensor", "controllable": false }, { - "name": "Front panel temp sensor", + "name": "Switch card", "controllable": false }, { - "name": "Power supply 1 hotspot sensor", + "name": "Air outlet", "controllable": false }, { - "name": "Power supply 1 inlet temp sensor", + "name": "Air inlet", "controllable": false }, { - "name": "Power supply 1 exhaust temp sensor", - "controllable": false - }, - { - "name": "Power supply 2 hotspot sensor", - "controllable": false - }, - { - "name": "Power supply 2 inlet temp sensor", - "controllable": false - }, - { - "name": "Power supply 2 exhaust temp sensor", + "name": "Front-panel temp sensor", "controllable": false } ], @@ -301,7 +308,7 @@ "interfaces": { "Ethernet0": { "index": "1,1,1,1,1,1,1,1", - "lanes": "9,10,11,12,13,14,15,16", + "lanes": "17,18,19,20,21,22,23,24", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet1/1" @@ -330,7 +337,7 @@ }, "Ethernet8": { "index": "2,2,2,2,2,2,2,2", - "lanes": "5,6,7,8,9,10,11,12", + "lanes": "9,10,11,12,13,14,15,16", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet2/1" @@ -359,7 +366,7 @@ }, "Ethernet16": { "index": "3,3,3,3,3,3,3,3", - "lanes": "25,26,27,28,29,30,31,32", + "lanes": "49,50,51,52,53,54,55,56", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet3/1" @@ -388,7 +395,7 @@ }, "Ethernet24": { "index": "4,4,4,4,4,4,4,4", - "lanes": "17,18,19,20,21,22,23,24", + "lanes": "33,34,35,36,37,38,39,40", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet4/1" @@ -417,7 +424,7 @@ }, "Ethernet32": { "index": "5,5,5,5,5,5,5,5", - "lanes": "41,42,43,44,45,46,47,48", + "lanes": "81,82,83,84,85,86,87,88", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet5/1" @@ -446,7 +453,7 @@ }, "Ethernet40": { "index": "6,6,6,6,6,6,6,6", - "lanes": "33,34,35,36,37,38,39,40", + "lanes": "65,66,67,68,69,70,71,72", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet6/1" @@ -475,7 +482,7 @@ }, "Ethernet48": { "index": "7,7,7,7,7,7,7,7", - "lanes": "57,58,59,60,61,62,63,64", + "lanes": "113,114,115,116,117,118,119,120", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet7/1" @@ -504,7 +511,7 @@ }, "Ethernet56": { "index": "8,8,8,8,8,8,8,8", - "lanes": "49,50,51,52,53,54,55,56", + "lanes": "97,98,99,100,101,102,103,104", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet8/1" @@ -533,7 +540,7 @@ }, "Ethernet64": { "index": "9,9,9,9,9,9,9,9", - "lanes": "73,74,75,76,77,78,79,80", + "lanes": "145,146,147,148,149,150,151,152", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet9/1" @@ -562,7 +569,7 @@ }, "Ethernet72": { "index": "10,10,10,10,10,10,10,10", - "lanes": "65,66,67,68,69,70,71,72", + "lanes": "129,130,131,132,133,134,135,136", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet10/1" @@ -591,7 +598,7 @@ }, "Ethernet80": { "index": "11,11,11,11,11,11,11,11", - "lanes": "89,90,91,92,93,94,95,96", + "lanes": "177,178,179,180,181,182,183,184", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet11/1" @@ -620,7 +627,7 @@ }, "Ethernet88": { "index": "12,12,12,12,12,12,12,12", - "lanes": "81,82,83,84,85,86,87,88", + "lanes": "161,162,163,164,165,166,167,168", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet12/1" @@ -649,7 +656,7 @@ }, "Ethernet96": { "index": "13,13,13,13,13,13,13,13", - "lanes": "105,106,107,108,109,110,111,112", + "lanes": "209,210,211,212,213,214,215,216", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet13/1" @@ -678,7 +685,7 @@ }, "Ethernet104": { "index": "14,14,14,14,14,14,14,14", - "lanes": "97,98,99,100,101,102,103,104", + "lanes": "193,194,195,196,197,198,199,200", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet14/1" @@ -707,7 +714,7 @@ }, "Ethernet112": { "index": "15,15,15,15,15,15,15,15", - "lanes": "121,122,123,124,125,126,127,128", + "lanes": "241,242,243,244,245,246,247,248", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet15/1" @@ -736,7 +743,7 @@ }, "Ethernet120": { "index": "16,16,16,16,16,16,16,16", - "lanes": "117,118,119,120,121,122,123,124", + "lanes": "233,234,235,236,237,238,239,240", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet16/1" @@ -765,7 +772,7 @@ }, "Ethernet128": { "index": "17,17,17,17,17,17,17,17", - "lanes": "141,142,143,144,145,146,147,148", + "lanes": "281,282,283,284,285,286,287,288", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet17/1" @@ -794,7 +801,7 @@ }, "Ethernet136": { "index": "18,18,18,18,18,18,18,18", - "lanes": "129,130,131,132,133,134,135,136", + "lanes": "257,258,259,260,261,262,263,264", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet18/1" @@ -823,7 +830,7 @@ }, "Ethernet144": { "index": "19,19,19,19,19,19,19,19", - "lanes": "153,154,155,156,157,158,159,160", + "lanes": "305,306,307,308,309,310,311,312", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet19/1" @@ -852,7 +859,7 @@ }, "Ethernet152": { "index": "20,20,20,20,20,20,20,20", - "lanes": "145,146,147,148,149,150,151,152", + "lanes": "289,290,291,292,293,294,295,296", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet20/1" @@ -881,7 +888,7 @@ }, "Ethernet160": { "index": "21,21,21,21,21,21,21,21", - "lanes": "169,170,171,172,173,174,175,176", + "lanes": "337,338,339,340,341,342,343,344", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet21/1" @@ -910,7 +917,7 @@ }, "Ethernet168": { "index": "22,22,22,22,22,22,22,22", - "lanes": "161,162,163,164,165,166,167,168", + "lanes": "321,322,323,324,325,326,327,328", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet22/1" @@ -939,7 +946,7 @@ }, "Ethernet176": { "index": "23,23,23,23,23,23,23,23", - "lanes": "185,186,187,188,189,190,191,192", + "lanes": "369,370,371,372,373,374,375,376", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet23/1" @@ -968,7 +975,7 @@ }, "Ethernet184": { "index": "24,24,24,24,24,24,24,24", - "lanes": "177,178,179,180,181,182,183,184", + "lanes": "353,354,355,356,357,358,359,360", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet24/1" @@ -997,7 +1004,7 @@ }, "Ethernet192": { "index": "25,25,25,25,25,25,25,25", - "lanes": "201,202,203,204,205,206,207,208", + "lanes": "401,402,403,404,405,406,407,408", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet25/1" @@ -1026,7 +1033,7 @@ }, "Ethernet200": { "index": "26,26,26,26,26,26,26,26", - "lanes": "193,194,195,196,197,198,199,200", + "lanes": "385,386,387,388,389,390,391,392", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet26/1" @@ -1055,7 +1062,7 @@ }, "Ethernet208": { "index": "27,27,27,27,27,27,27,27", - "lanes": "217,218,219,220,221,222,223,224", + "lanes": "433,434,435,436,437,438,439,440", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet27/1" @@ -1084,7 +1091,7 @@ }, "Ethernet216": { "index": "28,28,28,28,28,28,28,28", - "lanes": "209,210,211,212,213,214,215,216", + "lanes": "417,418,419,420,421,422,423,424", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet28/1" @@ -1113,7 +1120,7 @@ }, "Ethernet224": { "index": "29,29,29,29,29,29,29,29", - "lanes": "233,234,235,236,237,238,239,240", + "lanes": "465,466,467,468,469,470,471,472", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet29/1" @@ -1142,7 +1149,7 @@ }, "Ethernet232": { "index": "30,30,30,30,30,30,30,30", - "lanes": "225,226,227,228,229,230,231,232", + "lanes": "449,450,451,452,453,454,455,456", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet30/1" @@ -1171,7 +1178,7 @@ }, "Ethernet240": { "index": "31,31,31,31,31,31,31,31", - "lanes": "241,242,243,244,245,246,247,248", + "lanes": "481,482,483,484,485,486,487,488", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet31/1" @@ -1200,7 +1207,7 @@ }, "Ethernet248": { "index": "32,32,32,32,32,32,32,32", - "lanes": "253,254,255,256,257,258,259,260", + "lanes": "505,506,507,508,509,510,511,512", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet32/1" @@ -1258,7 +1265,7 @@ }, "Ethernet264": { "index": "34,34,34,34,34,34,34,34", - "lanes": "13,14,15,16,17,18,19,20", + "lanes": "25,26,27,28,29,30,31,32", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet34/1" @@ -1287,7 +1294,7 @@ }, "Ethernet272": { "index": "35,35,35,35,35,35,35,35", - "lanes": "29,30,31,32,33,34,35,36", + "lanes": "57,58,59,60,61,62,63,64", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet35/1" @@ -1316,7 +1323,7 @@ }, "Ethernet280": { "index": "36,36,36,36,36,36,36,36", - "lanes": "21,22,23,24,25,26,27,28", + "lanes": "41,42,43,44,45,46,47,48", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet36/1" @@ -1345,7 +1352,7 @@ }, "Ethernet288": { "index": "37,37,37,37,37,37,37,37", - "lanes": "45,46,47,48,49,50,51,52", + "lanes": "89,90,91,92,93,94,95,96", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet37/1" @@ -1374,7 +1381,7 @@ }, "Ethernet296": { "index": "38,38,38,38,38,38,38,38", - "lanes": "37,38,39,40,41,42,43,44", + "lanes": "73,74,75,76,77,78,79,80", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet38/1" @@ -1403,7 +1410,7 @@ }, "Ethernet304": { "index": "39,39,39,39,39,39,39,39", - "lanes": "61,62,63,64,65,66,67,68", + "lanes": "121,122,123,124,125,126,127,128", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet39/1" @@ -1432,7 +1439,7 @@ }, "Ethernet312": { "index": "40,40,40,40,40,40,40,40", - "lanes": "53,54,55,56,57,58,59,60", + "lanes": "105,106,107,108,109,110,111,112", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet40/1" @@ -1461,7 +1468,7 @@ }, "Ethernet320": { "index": "41,41,41,41,41,41,41,41", - "lanes": "77,78,79,80,81,82,83,84", + "lanes": "153,154,155,156,157,158,159,160", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet41/1" @@ -1490,7 +1497,7 @@ }, "Ethernet328": { "index": "42,42,42,42,42,42,42,42", - "lanes": "69,70,71,72,73,74,75,76", + "lanes": "137,138,139,140,141,142,143,144", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet42/1" @@ -1519,7 +1526,7 @@ }, "Ethernet336": { "index": "43,43,43,43,43,43,43,43", - "lanes": "93,94,95,96,97,98,99,100", + "lanes": "185,186,187,188,189,190,191,192", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet43/1" @@ -1548,7 +1555,7 @@ }, "Ethernet344": { "index": "44,44,44,44,44,44,44,44", - "lanes": "85,86,87,88,89,90,91,92", + "lanes": "169,170,171,172,173,174,175,176", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet44/1" @@ -1577,7 +1584,7 @@ }, "Ethernet352": { "index": "45,45,45,45,45,45,45,45", - "lanes": "109,110,111,112,113,114,115,116", + "lanes": "217,218,219,220,221,222,223,224", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet45/1" @@ -1606,7 +1613,7 @@ }, "Ethernet360": { "index": "46,46,46,46,46,46,46,46", - "lanes": "101,102,103,104,105,106,107,108", + "lanes": "201,202,203,204,205,206,207,208", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet46/1" @@ -1635,7 +1642,7 @@ }, "Ethernet368": { "index": "47,47,47,47,47,47,47,47", - "lanes": "125,126,127,128,129,130,131,132", + "lanes": "249,250,251,252,253,254,255,256", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet47/1" @@ -1664,7 +1671,7 @@ }, "Ethernet376": { "index": "48,48,48,48,48,48,48,48", - "lanes": "113,114,115,116,117,118,119,120", + "lanes": "225,226,227,228,229,230,231,232", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet48/1" @@ -1693,7 +1700,7 @@ }, "Ethernet384": { "index": "49,49,49,49,49,49,49,49", - "lanes": "137,138,139,140,141,142,143,144", + "lanes": "273,274,275,276,277,278,279,280", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet49/1" @@ -1722,7 +1729,7 @@ }, "Ethernet392": { "index": "50,50,50,50,50,50,50,50", - "lanes": "133,134,135,136,137,138,139,140", + "lanes": "265,266,267,268,269,270,271,272", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet50/1" @@ -1751,7 +1758,7 @@ }, "Ethernet400": { "index": "51,51,51,51,51,51,51,51", - "lanes": "157,158,159,160,161,162,163,164", + "lanes": "313,314,315,316,317,318,319,320", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet51/1" @@ -1780,7 +1787,7 @@ }, "Ethernet408": { "index": "52,52,52,52,52,52,52,52", - "lanes": "149,150,151,152,153,154,155,156", + "lanes": "297,298,299,300,301,302,303,304", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet52/1" @@ -1809,7 +1816,7 @@ }, "Ethernet416": { "index": "53,53,53,53,53,53,53,53", - "lanes": "173,174,175,176,177,178,179,180", + "lanes": "345,346,347,348,349,350,351,352", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet53/1" @@ -1838,7 +1845,7 @@ }, "Ethernet424": { "index": "54,54,54,54,54,54,54,54", - "lanes": "165,166,167,168,169,170,171,172", + "lanes": "329,330,331,332,333,334,335,336", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet54/1" @@ -1867,7 +1874,7 @@ }, "Ethernet432": { "index": "55,55,55,55,55,55,55,55", - "lanes": "189,190,191,192,193,194,195,196", + "lanes": "377,378,379,380,381,382,383,384", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet55/1" @@ -1896,7 +1903,7 @@ }, "Ethernet440": { "index": "56,56,56,56,56,56,56,56", - "lanes": "181,182,183,184,185,186,187,188", + "lanes": "361,362,363,364,365,366,367,368", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet56/1" @@ -1925,7 +1932,7 @@ }, "Ethernet448": { "index": "57,57,57,57,57,57,57,57", - "lanes": "205,206,207,208,209,210,211,212", + "lanes": "409,410,411,412,413,414,415,416", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet57/1" @@ -1954,7 +1961,7 @@ }, "Ethernet456": { "index": "58,58,58,58,58,58,58,58", - "lanes": "197,198,199,200,201,202,203,204", + "lanes": "393,394,395,396,397,398,399,400", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet58/1" @@ -1983,7 +1990,7 @@ }, "Ethernet464": { "index": "59,59,59,59,59,59,59,59", - "lanes": "221,222,223,224,225,226,227,228", + "lanes": "441,442,443,444,445,446,447,448", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet59/1" @@ -2012,7 +2019,7 @@ }, "Ethernet472": { "index": "60,60,60,60,60,60,60,60", - "lanes": "213,214,215,216,217,218,219,220", + "lanes": "425,426,427,428,429,430,431,432", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet60/1" @@ -2041,7 +2048,7 @@ }, "Ethernet480": { "index": "61,61,61,61,61,61,61,61", - "lanes": "237,238,239,240,241,242,243,244", + "lanes": "473,474,475,476,477,478,479,480", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet61/1" @@ -2070,7 +2077,7 @@ }, "Ethernet488": { "index": "62,62,62,62,62,62,62,62", - "lanes": "229,230,231,232,233,234,235,236", + "lanes": "457,458,459,460,461,462,463,464", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet62/1" @@ -2099,7 +2106,7 @@ }, "Ethernet496": { "index": "63,63,63,63,63,63,63,63", - "lanes": "249,250,251,252,253,254,255,256", + "lanes": "497,498,499,500,501,502,503,504", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet63/1" @@ -2128,7 +2135,7 @@ }, "Ethernet504": { "index": "64,64,64,64,64,64,64,64", - "lanes": "245,246,247,248,249,250,251,252", + "lanes": "489,490,491,492,493,494,495,496", "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": [ "Ethernet64/1" @@ -2157,7 +2164,7 @@ }, "Ethernet512": { "index": "65", - "lanes": "258", + "lanes": "515", "breakout_modes": { "1x10G": [ "Ethernet65" @@ -2166,7 +2173,7 @@ }, "Ethernet513": { "index": "66", - "lanes": "257", + "lanes": "513", "breakout_modes": { "1x10G": [ "Ethernet66" diff --git a/device/arista/x86_64-arista_7060dx5_64s/platform_components.json b/device/arista/x86_64-arista_7060dx5_64s/platform_components.json new file mode 100644 index 00000000000..2012dc63aa4 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_64s/platform_components.json @@ -0,0 +1,12 @@ +{ + "chassis": { + "DCS-7060DX5-64S": { + "component": { + "Aboot()": {}, + "Scd(addr=0000:00:18.7)": {}, + "Scd(addr=0000:01:00.0)": {}, + "LorikeetSysCpld(addr=13-0023)": {} + } + } + } +} diff --git a/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json b/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json index b6d090ec6ef..853ad935e8c 100644 --- a/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json +++ b/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json @@ -5,7 +5,7 @@ "name": "phy1_1", "address": "1", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin", + "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", "config_file": "/usr/share/sonic/hwsku/phy1_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -18,7 +18,7 @@ "name": "phy1_2", "address": "2", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin", + "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", "config_file": "/usr/share/sonic/hwsku/phy2_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -31,7 +31,7 @@ "name": "phy2_1", "address": "3", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin", + "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", "config_file": "/usr/share/sonic/hwsku/phy3_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -44,7 +44,7 @@ "name": "phy2_2", "address": "4", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin", + "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", "config_file": "/usr/share/sonic/hwsku/phy4_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -57,7 +57,7 @@ "name": "phy3_1", "address": "5", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin", + "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", "config_file": "/usr/share/sonic/hwsku/phy5_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -70,7 +70,7 @@ "name": "phy3_2", "address": "6", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin", + "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", "config_file": "/usr/share/sonic/hwsku/phy6_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -83,7 +83,7 @@ "name": "phy4_1", "address": "7", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin", + "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", "config_file": "/usr/share/sonic/hwsku/phy7_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -96,7 +96,7 @@ "name": "phy4_2", "address": "8", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin", + "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", "config_file": "/usr/share/sonic/hwsku/phy8_config.json", "sai_init_config_file": "", "phy_access": "mdio", diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/BALANCED b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/BALANCED new file mode 120000 index 00000000000..afd21766cc6 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/BALANCED @@ -0,0 +1 @@ +../../../common/profiles/th5/gen/BALANCED \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffer_ports.j2 new file mode 120000 index 00000000000..35b3dd5d135 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffer_ports.j2 @@ -0,0 +1 @@ +../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffer_ports.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers.json.j2 new file mode 120000 index 00000000000..8658b687e28 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers.json.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers_defaults_t0.j2 similarity index 100% rename from device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t0.j2 rename to device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers_defaults_t0.j2 diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers_defaults_t1.j2 similarity index 100% rename from device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t1.j2 rename to device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers_defaults_t1.j2 diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/hwsku.json b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/hwsku.json new file mode 100644 index 00000000000..63f4a05404e --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/hwsku.json @@ -0,0 +1,776 @@ +{ + "interfaces": { + "Ethernet0": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet4": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet8": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet12": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet16": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet20": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet24": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet28": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet32": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet36": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet40": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet44": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet48": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet52": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet56": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet60": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet64": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet68": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet72": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet76": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet80": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet84": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet88": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet92": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet96": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet100": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet104": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet108": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet112": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet116": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet120": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet124": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet128": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet132": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet136": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet140": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet144": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet148": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet152": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet156": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet160": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet164": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet168": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet172": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet176": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet180": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet184": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet188": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet192": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet196": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet200": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet204": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet208": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet212": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet216": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet220": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet224": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet228": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet232": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet236": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet240": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet244": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet248": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet252": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet256": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet260": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet264": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet268": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet272": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet276": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet280": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet284": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet288": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet292": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet296": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet300": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet304": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet308": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet312": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet316": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet320": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet324": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet328": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet332": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet336": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet340": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet344": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet348": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet352": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet356": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet360": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet364": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet368": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet372": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet376": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet380": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet384": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet388": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet392": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet396": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet400": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet404": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet408": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet412": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet416": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet420": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet424": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet428": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet432": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet436": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet440": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet444": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet448": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet452": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet456": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet460": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet464": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet468": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet472": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet476": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet480": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet484": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet488": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet492": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet496": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet500": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet504": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet508": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet512": { + "fec": "none", + "default_brkout_mode": "2x10G(2)" + } + } +} diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/pg_profile_lookup.ini similarity index 100% rename from device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/pg_profile_lookup.ini rename to device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/pg_profile_lookup.ini diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/port_config.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/port_config.ini new file mode 100644 index 00000000000..3bd85b913a6 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/port_config.ini @@ -0,0 +1,131 @@ +# name lanes alias index speed fec +Ethernet0 369,370,371,372 etp1a 1 400000 rs +Ethernet4 373,374,375,376 etp1b 1 400000 rs +Ethernet8 385,386,387,388 etp2a 2 400000 rs +Ethernet12 389,390,391,392 etp2b 2 400000 rs +Ethernet16 433,434,435,436 etp3a 3 400000 rs +Ethernet20 437,438,439,440 etp3b 3 400000 rs +Ethernet24 449,450,451,452 etp4a 4 400000 rs +Ethernet28 453,454,455,456 etp4b 4 400000 rs +Ethernet32 305,306,307,308 etp5a 5 400000 rs +Ethernet36 309,310,311,312 etp5b 5 400000 rs +Ethernet40 321,322,323,324 etp6a 6 400000 rs +Ethernet44 325,326,327,328 etp6b 6 400000 rs +Ethernet48 241,242,243,244 etp7a 7 400000 rs +Ethernet52 245,246,247,248 etp7b 7 400000 rs +Ethernet56 265,266,267,268 etp8a 8 400000 rs +Ethernet60 269,270,271,272 etp8b 8 400000 rs +Ethernet64 497,498,499,500 etp9a 9 400000 rs +Ethernet68 501,502,503,504 etp9b 9 400000 rs +Ethernet72 9,10,11,12 etp10a 10 400000 rs +Ethernet76 13,14,15,16 etp10b 10 400000 rs +Ethernet80 193,194,195,196 etp11a 11 400000 rs +Ethernet84 197,198,199,200 etp11b 11 400000 rs +Ethernet88 177,178,179,180 etp12a 12 400000 rs +Ethernet92 181,182,183,184 etp12b 12 400000 rs +Ethernet96 65,66,67,68 etp13a 13 400000 rs +Ethernet100 69,70,71,72 etp13b 13 400000 rs +Ethernet104 49,50,51,52 etp14a 14 400000 rs +Ethernet108 53,54,55,56 etp14b 14 400000 rs +Ethernet112 129,130,131,132 etp15a 15 400000 rs +Ethernet116 133,134,135,136 etp15b 15 400000 rs +Ethernet120 113,114,115,116 etp16a 16 400000 rs +Ethernet124 117,118,119,120 etp16b 16 400000 rs +Ethernet128 405,406,407,408 etp17a 17 400000 rs +Ethernet132 401,402,403,404 etp17b 17 400000 rs +Ethernet136 397,398,399,400 etp17c 17 400000 rs +Ethernet140 393,394,395,396 etp17d 17 400000 rs +Ethernet144 421,422,423,424 etp17e 17 400000 rs +Ethernet148 417,418,419,420 etp17f 17 400000 rs +Ethernet152 413,414,415,416 etp17g 17 400000 rs +Ethernet156 409,410,411,412 etp17h 17 400000 rs +Ethernet160 425,426,427,428 etp17i 17 400000 rs +Ethernet164 429,430,431,432 etp17j 17 400000 rs +Ethernet168 445,446,447,448 etp17k 17 400000 rs +Ethernet172 441,442,443,444 etp17l 17 400000 rs +Ethernet176 61,62,63,64 etp18a 18 400000 rs +Ethernet180 57,58,59,60 etp18b 18 400000 rs +Ethernet184 45,46,47,48 etp18c 18 400000 rs +Ethernet188 41,42,43,44 etp18d 18 400000 rs +Ethernet192 37,38,39,40 etp18e 18 400000 rs +Ethernet196 33,34,35,36 etp18f 18 400000 rs +Ethernet200 29,30,31,32 etp18g 18 400000 rs +Ethernet204 25,26,27,28 etp18h 18 400000 rs +Ethernet208 21,22,23,24 etp18i 18 400000 rs +Ethernet212 17,18,19,20 etp18j 18 400000 rs +Ethernet216 1,2,3,4 etp18k 18 400000 rs +Ethernet220 5,6,7,8 etp18l 18 400000 rs +Ethernet224 509,510,511,512 etp19a 19 400000 rs +Ethernet228 505,506,507,508 etp19b 19 400000 rs +Ethernet232 489,490,491,492 etp19c 19 400000 rs +Ethernet236 493,494,495,496 etp19d 19 400000 rs +Ethernet240 485,486,487,488 etp19e 19 400000 rs +Ethernet244 481,482,483,484 etp19f 19 400000 rs +Ethernet248 477,478,479,480 etp19g 19 400000 rs +Ethernet252 473,474,475,476 etp19h 19 400000 rs +Ethernet256 465,466,467,468 etp19i 19 400000 rs +Ethernet260 469,470,471,472 etp19j 19 400000 rs +Ethernet264 457,458,459,460 etp19k 19 400000 rs +Ethernet268 461,462,463,464 etp19l 19 400000 rs +Ethernet272 81,82,83,84 etp20a 20 400000 rs +Ethernet276 85,86,87,88 etp20b 20 400000 rs +Ethernet280 73,74,75,76 etp20c 20 400000 rs +Ethernet284 77,78,79,80 etp20d 20 400000 rs +Ethernet288 97,98,99,100 etp20e 20 400000 rs +Ethernet292 101,102,103,104 etp20f 20 400000 rs +Ethernet296 89,90,91,92 etp20g 20 400000 rs +Ethernet300 93,94,95,96 etp20h 20 400000 rs +Ethernet304 105,106,107,108 etp20i 20 400000 rs +Ethernet308 109,110,111,112 etp20j 20 400000 rs +Ethernet312 121,122,123,124 etp20k 20 400000 rs +Ethernet316 125,126,127,128 etp20l 20 400000 rs +Ethernet320 329,330,331,332 etp21a 21 400000 rs +Ethernet324 333,334,335,336 etp21b 21 400000 rs +Ethernet328 337,338,339,340 etp21c 21 400000 rs +Ethernet332 345,346,347,348 etp21d 21 400000 rs +Ethernet336 349,350,351,352 etp21e 21 400000 rs +Ethernet340 341,342,343,344 etp21f 21 400000 rs +Ethernet344 353,354,355,356 etp21g 21 400000 rs +Ethernet348 361,362,363,364 etp21h 21 400000 rs +Ethernet352 365,366,367,368 etp21i 21 400000 rs +Ethernet356 357,358,359,360 etp21j 21 400000 rs +Ethernet360 377,378,379,380 etp21k 21 400000 rs +Ethernet364 381,382,383,384 etp21l 21 400000 rs +Ethernet368 261,262,263,264 etp22a 22 400000 rs +Ethernet372 257,258,259,260 etp22b 22 400000 rs +Ethernet376 285,286,287,288 etp22c 22 400000 rs +Ethernet380 277,278,279,280 etp22d 22 400000 rs +Ethernet384 273,274,275,276 etp22e 22 400000 rs +Ethernet388 281,282,283,284 etp22f 22 400000 rs +Ethernet392 293,294,295,296 etp22g 22 400000 rs +Ethernet396 297,298,299,300 etp22h 22 400000 rs +Ethernet400 301,302,303,304 etp22i 22 400000 rs +Ethernet404 289,290,291,292 etp22j 22 400000 rs +Ethernet408 313,314,315,316 etp22k 22 400000 rs +Ethernet412 317,318,319,320 etp22l 22 400000 rs +Ethernet416 205,206,207,208 etp23a 23 400000 rs +Ethernet420 201,202,203,204 etp23b 23 400000 rs +Ethernet424 213,214,215,216 etp23c 23 400000 rs +Ethernet428 217,218,219,220 etp23d 23 400000 rs +Ethernet432 221,222,223,224 etp23e 23 400000 rs +Ethernet436 209,210,211,212 etp23f 23 400000 rs +Ethernet440 225,226,227,228 etp23g 23 400000 rs +Ethernet444 233,234,235,236 etp23h 23 400000 rs +Ethernet448 237,238,239,240 etp23i 23 400000 rs +Ethernet452 229,230,231,232 etp23j 23 400000 rs +Ethernet456 249,250,251,252 etp23k 23 400000 rs +Ethernet460 253,254,255,256 etp23l 23 400000 rs +Ethernet464 141,142,143,144 etp24a 24 400000 rs +Ethernet468 137,138,139,140 etp24b 24 400000 rs +Ethernet472 149,150,151,152 etp24c 24 400000 rs +Ethernet476 157,158,159,160 etp24d 24 400000 rs +Ethernet480 153,154,155,156 etp24e 24 400000 rs +Ethernet484 145,146,147,148 etp24f 24 400000 rs +Ethernet488 165,166,167,168 etp24g 24 400000 rs +Ethernet492 173,174,175,176 etp24h 24 400000 rs +Ethernet496 169,170,171,172 etp24i 24 400000 rs +Ethernet500 161,162,163,164 etp24j 24 400000 rs +Ethernet504 189,190,191,192 etp24k 24 400000 rs +Ethernet508 185,186,187,188 etp24l 24 400000 rs +Ethernet512 513 etp25a 25 10000 none +Ethernet513 514 etp25b 25 10000 none diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/qos.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/qos.json.j2 new file mode 120000 index 00000000000..1d89e90b055 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/qos.json.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/sai.profile b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/sai.profile new file mode 100644 index 00000000000..f299df75d26 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-16pe-384c.config.bcm diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/th5-a7060x6-16pe-384c.config.bcm new file mode 100644 index 00000000000..ed6f6155129 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/th5-a7060x6-16pe-384c.config.bcm @@ -0,0 +1,1448 @@ +# +# $Copyright: (c) 2022 Broadcom. +# Broadcom Proprietary and Confidential. All rights reserved.$ +# +# BCM78900 64x800g port configuration. +# +# configuration yaml file +# device: +# : +# : +# ? +# : +# : +# ... +# : +# : +# : +# : +# ... +# : +# + +--- +bcm_device: + 0: + global: + pktio_mode: 1 + default_cpu_tx_queue: 7 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 1 + sai_port_phy_time_sync_en : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress : 1 + pfc_deadlock_seq_control : 1 + sai_tunnel_support: 2 + bcm_tunnel_term_compatible_mode: 1 + l3_ecmp_member_first_lkup_mem_size: 12288 +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x45670123 + TX_LANE_MAP: 0x45670123 + RX_POLARITY_FLIP: 0x19 + TX_POLARITY_FLIP: 0xaa + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x13025746 + TX_LANE_MAP: 0x64752031 + RX_POLARITY_FLIP: 0x33 + TX_POLARITY_FLIP: 0x66 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01452367 + TX_LANE_MAP: 0x01452367 + RX_POLARITY_FLIP: 0xa5 + TX_POLARITY_FLIP: 0xaa + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x45016723 + TX_LANE_MAP: 0x45016723 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xa5 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01452367 + TX_LANE_MAP: 0x30542167 + RX_POLARITY_FLIP: 0x86 + TX_POLARITY_FLIP: 0x87 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x30271564 + TX_LANE_MAP: 0x47036152 + RX_POLARITY_FLIP: 0xd2 + TX_POLARITY_FLIP: 0x86 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57460123 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0xa6 + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x20315746 + TX_LANE_MAP: 0x65471023 + RX_POLARITY_FLIP: 0x65 + TX_POLARITY_FLIP: 0x6c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57460123 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0xa6 + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x67450123 + TX_LANE_MAP: 0x02136457 + RX_POLARITY_FLIP: 0x36 + TX_POLARITY_FLIP: 0x59 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x67450123 + TX_LANE_MAP: 0x03124657 + RX_POLARITY_FLIP: 0x36 + TX_POLARITY_FLIP: 0x55 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x67450123 + TX_LANE_MAP: 0x02136457 + RX_POLARITY_FLIP: 0x36 + TX_POLARITY_FLIP: 0x59 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x67450123 + TX_LANE_MAP: 0x03124657 + RX_POLARITY_FLIP: 0x36 + TX_POLARITY_FLIP: 0x55 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x45617023 + TX_LANE_MAP: 0x12076435 + RX_POLARITY_FLIP: 0xd2 + TX_POLARITY_FLIP: 0x5a + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01235746 + TX_LANE_MAP: 0x01324675 + RX_POLARITY_FLIP: 0x95 + TX_POLARITY_FLIP: 0x36 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x67450123 + TX_LANE_MAP: 0x13026475 + RX_POLARITY_FLIP: 0x36 + TX_POLARITY_FLIP: 0x5a + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75640123 + TX_LANE_MAP: 0x64750132 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0xc1 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x10325746 + TX_LANE_MAP: 0x75643201 + RX_POLARITY_FLIP: 0xd8 + TX_POLARITY_FLIP: 0x9b + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x10325764 + TX_LANE_MAP: 0x75643210 + RX_POLARITY_FLIP: 0xde + TX_POLARITY_FLIP: 0x9d + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57640123 + TX_LANE_MAP: 0x32105746 + RX_POLARITY_FLIP: 0xaf + TX_POLARITY_FLIP: 0x97 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x10237564 + TX_LANE_MAP: 0x75462310 + RX_POLARITY_FLIP: 0xeb + TX_POLARITY_FLIP: 0xa8 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57640123 + TX_LANE_MAP: 0x32105746 + RX_POLARITY_FLIP: 0xeb + TX_POLARITY_FLIP: 0xd3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75640123 + TX_LANE_MAP: 0x64750132 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0xc1 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01237564 + TX_LANE_MAP: 0x57462310 + RX_POLARITY_FLIP: 0xbe + TX_POLARITY_FLIP: 0x3d + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75640123 + TX_LANE_MAP: 0x64750132 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0xc1 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x10325746 + TX_LANE_MAP: 0x75643201 + RX_POLARITY_FLIP: 0x98 + TX_POLARITY_FLIP: 0x9b + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x10325764 + TX_LANE_MAP: 0x75643210 + RX_POLARITY_FLIP: 0xde + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x32017456 + TX_LANE_MAP: 0x01234576 + RX_POLARITY_FLIP: 0x09 + TX_POLARITY_FLIP: 0x00 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75461302 + TX_LANE_MAP: 0x75461302 + RX_POLARITY_FLIP: 0xeb + TX_POLARITY_FLIP: 0x36 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x31025746 + TX_LANE_MAP: 0x31025746 + RX_POLARITY_FLIP: 0x05 + TX_POLARITY_FLIP: 0x6f + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x31207564 + TX_LANE_MAP: 0x46570213 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x99 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57461302 + TX_LANE_MAP: 0x57461302 + RX_POLARITY_FLIP: 0x50 + TX_POLARITY_FLIP: 0xfa + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x13025746 + TX_LANE_MAP: 0x13025746 + RX_POLARITY_FLIP: 0x05 + TX_POLARITY_FLIP: 0xaf + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57461302 + TX_LANE_MAP: 0x20316475 + RX_POLARITY_FLIP: 0xbb + TX_POLARITY_FLIP: 0x99 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57643120 + TX_LANE_MAP: 0x57643120 + RX_POLARITY_FLIP: 0x41 + TX_POLARITY_FLIP: 0xd4 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x13025764 + TX_LANE_MAP: 0x13025764 + RX_POLARITY_FLIP: 0xed + TX_POLARITY_FLIP: 0x33 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x23104765 + TX_LANE_MAP: 0x10325467 + RX_POLARITY_FLIP: 0x81 + TX_POLARITY_FLIP: 0x87 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01325746 + TX_LANE_MAP: 0x57643201 + RX_POLARITY_FLIP: 0xd8 + TX_POLARITY_FLIP: 0x59 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01237564 + TX_LANE_MAP: 0x01326475 + RX_POLARITY_FLIP: 0xbb + TX_POLARITY_FLIP: 0xe3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57461032 + TX_LANE_MAP: 0x32017564 + RX_POLARITY_FLIP: 0x8d + TX_POLARITY_FLIP: 0xb9 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01237564 + TX_LANE_MAP: 0x01326475 + RX_POLARITY_FLIP: 0xbb + TX_POLARITY_FLIP: 0xe3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75640123 + TX_LANE_MAP: 0x23105746 + RX_POLARITY_FLIP: 0xeb + TX_POLARITY_FLIP: 0xd3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75640132 + TX_LANE_MAP: 0x23105764 + RX_POLARITY_FLIP: 0xed + TX_POLARITY_FLIP: 0xd5 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01325746 + TX_LANE_MAP: 0x57643201 + RX_POLARITY_FLIP: 0x9c + TX_POLARITY_FLIP: 0x1f + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75461032 + TX_LANE_MAP: 0x23017564 + RX_POLARITY_FLIP: 0xd8 + TX_POLARITY_FLIP: 0xec + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01325746 + TX_LANE_MAP: 0x57643201 + RX_POLARITY_FLIP: 0xd8 + TX_POLARITY_FLIP: 0x5b + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01237564 + TX_LANE_MAP: 0x01326475 + RX_POLARITY_FLIP: 0xbb + TX_POLARITY_FLIP: 0xe3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57461032 + TX_LANE_MAP: 0x32017564 + RX_POLARITY_FLIP: 0x8d + TX_POLARITY_FLIP: 0xb9 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57460123 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0xa6 + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x23014657 + TX_LANE_MAP: 0x64571023 + RX_POLARITY_FLIP: 0x65 + TX_POLARITY_FLIP: 0x6c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x32106475 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0x9a + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x23014657 + TX_LANE_MAP: 0x64571023 + RX_POLARITY_FLIP: 0x65 + TX_POLARITY_FLIP: 0x6c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x32106475 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0x9a + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x34152607 + TX_LANE_MAP: 0x46720153 + RX_POLARITY_FLIP: 0x87 + TX_POLARITY_FLIP: 0x8e + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01235746 + TX_LANE_MAP: 0x01324675 + RX_POLARITY_FLIP: 0x95 + TX_POLARITY_FLIP: 0x36 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x23014657 + TX_LANE_MAP: 0x64571023 + RX_POLARITY_FLIP: 0x65 + TX_POLARITY_FLIP: 0x6c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01235746 + TX_LANE_MAP: 0x01324675 + RX_POLARITY_FLIP: 0x95 + TX_POLARITY_FLIP: 0x36 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x45670123 + TX_LANE_MAP: 0x12034675 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x56 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x45670123 + TX_LANE_MAP: 0x12036457 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x79 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x23016745 + TX_LANE_MAP: 0x32016754 + RX_POLARITY_FLIP: 0x97 + TX_POLARITY_FLIP: 0x63 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x03214567 + TX_LANE_MAP: 0x23016745 + RX_POLARITY_FLIP: 0xaa + TX_POLARITY_FLIP: 0x99 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x23670145 + TX_LANE_MAP: 0x23670145 + RX_POLARITY_FLIP: 0xa5 + TX_POLARITY_FLIP: 0x55 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75643120 + TX_LANE_MAP: 0x02134657 + RX_POLARITY_FLIP: 0xcc + TX_POLARITY_FLIP: 0x66 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01234567 + TX_LANE_MAP: 0x01234567 + RX_POLARITY_FLIP: 0x6e + TX_POLARITY_FLIP: 0x55 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 65 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x00003210 + TX_LANE_MAP: 0x00003210 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 11 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 12 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 14 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 24 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 35 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 36 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 45 + : + PC_PHYS_PORT_ID: 69 + ? + PORT_ID: 46 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 47 + : + PC_PHYS_PORT_ID: 77 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 85 + ? + PORT_ID: 57 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 58 + : + PC_PHYS_PORT_ID: 93 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 101 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 69 + : + PC_PHYS_PORT_ID: 109 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 78 + : + PC_PHYS_PORT_ID: 117 + ? + PORT_ID: 79 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 80 + : + PC_PHYS_PORT_ID: 125 + ? + PORT_ID: 88 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 89 + : + PC_PHYS_PORT_ID: 133 + ? + PORT_ID: 90 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 91 + : + PC_PHYS_PORT_ID: 141 + ? + PORT_ID: 99 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 100 + : + PC_PHYS_PORT_ID: 149 + ? + PORT_ID: 101 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 157 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 165 + ? + PORT_ID: 112 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 113 + : + PC_PHYS_PORT_ID: 173 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 181 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 124 + : + PC_PHYS_PORT_ID: 189 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 133 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 134 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 135 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 145 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 146 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 154 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 155 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 156 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 157 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 166 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 167 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 168 + : + PC_PHYS_PORT_ID: 253 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 261 + ? + PORT_ID: 178 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 179 + : + PC_PHYS_PORT_ID: 269 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 188 + : + PC_PHYS_PORT_ID: 277 + ? + PORT_ID: 189 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 190 + : + PC_PHYS_PORT_ID: 285 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 293 + ? + PORT_ID: 200 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 201 + : + PC_PHYS_PORT_ID: 301 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 309 + ? + PORT_ID: 211 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 317 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 325 + ? + PORT_ID: 222 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 223 + : + PC_PHYS_PORT_ID: 333 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 232 + : + PC_PHYS_PORT_ID: 341 + ? + PORT_ID: 233 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 234 + : + PC_PHYS_PORT_ID: 349 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 243 + : + PC_PHYS_PORT_ID: 357 + ? + PORT_ID: 244 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 245 + : + PC_PHYS_PORT_ID: 365 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 373 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 256 + : + PC_PHYS_PORT_ID: 381 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 389 + ? + PORT_ID: 266 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 397 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 276 + : + PC_PHYS_PORT_ID: 405 + ? + PORT_ID: 277 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 278 + : + PC_PHYS_PORT_ID: 413 + ? + PORT_ID: 286 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 287 + : + PC_PHYS_PORT_ID: 421 + ? + PORT_ID: 288 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 289 + : + PC_PHYS_PORT_ID: 429 + ? + PORT_ID: 297 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 298 + : + PC_PHYS_PORT_ID: 437 + ? + PORT_ID: 299 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 300 + : + PC_PHYS_PORT_ID: 445 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 453 + ? + PORT_ID: 310 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 311 + : + PC_PHYS_PORT_ID: 461 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 469 + ? + PORT_ID: 321 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 322 + : + PC_PHYS_PORT_ID: 477 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 331 + : + PC_PHYS_PORT_ID: 485 + ? + PORT_ID: 332 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 333 + : + PC_PHYS_PORT_ID: 493 + ? + PORT_ID: 341 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 501 + ? + PORT_ID: 343 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 344 + : + PC_PHYS_PORT_ID: 509 + ? + PORT_ID: 76 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 164 + : + PC_PHYS_PORT_ID: 514 +# ? +# PORT_ID: 274 +# : +# PC_PHYS_PORT_ID: 515 +# ? +# PORT_ID: 186 +# : +# PC_PHYS_PORT_ID: 516 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: [[1, 4], + [11, 14], + [22, 25], + [33, 36], + [44, 47], + [55, 58], + [66, 69], + [77, 80], + [88, 91], + [99, 102], + [110, 113], + [121, 124], + [132, 135], + [143, 146], + [154, 157], + [165, 168], + [176, 179], + [187, 190], + [198, 201], + [209, 212], + [220, 223], + [231, 234], + [242, 245], + [253, 256], + [264, 267], + [275, 278], + [286, 289], + [297, 300], + [308, 311], + [319, 322], + [330, 333], + [341, 344]] + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? +# PORT_ID: [[76, 76], [164, 164], [274, 274], [186, 186]] + PORT_ID: [[76, 76], [164, 164]] + : + ENABLE: 0 + MAX_FRAME_SIZE: 9416 + SPEED: 10000 + NUM_LANES: 1 +... +--- +bcm_device: + 0: + global: + ftem_mem_entries: 65536 + sai_stats_support_mask: 0 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/BALANCED b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/BALANCED new file mode 120000 index 00000000000..afd21766cc6 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/BALANCED @@ -0,0 +1 @@ +../../../common/profiles/th5/gen/BALANCED \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffer_ports.j2 new file mode 120000 index 00000000000..35b3dd5d135 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffer_ports.j2 @@ -0,0 +1 @@ +../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffer_ports.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers.json.j2 new file mode 120000 index 00000000000..8658b687e28 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers.json.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t0.j2 new file mode 120000 index 00000000000..9524e6a476a --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +BALANCED/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t1.j2 new file mode 120000 index 00000000000..c25cc95d6d5 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +BALANCED/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/hwsku.json b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/hwsku.json new file mode 100644 index 00000000000..6c2013a138d --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/hwsku.json @@ -0,0 +1,744 @@ +{ + "interfaces": { + "Ethernet0": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet4": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet8": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet12": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet16": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet20": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet24": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet28": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet32": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet36": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet40": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet44": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet48": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet52": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet56": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet60": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet64": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet68": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet72": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet76": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet80": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet84": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet88": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet92": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet96": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet100": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet104": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet108": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet112": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet116": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet120": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet124": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet128": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet132": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet136": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet140": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet144": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet148": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet152": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet156": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet160": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet164": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet168": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet172": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet176": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet180": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet184": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet188": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet192": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet196": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet200": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet204": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet208": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet212": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet216": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet220": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet224": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet228": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet232": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet236": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet240": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet244": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet248": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet252": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet256": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet260": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet264": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet268": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet272": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet276": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet280": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet284": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet288": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet292": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet296": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet300": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet304": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet308": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet312": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet316": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet320": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet324": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet328": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet332": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet336": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet340": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet344": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet348": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet352": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet356": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet360": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet364": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet368": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet372": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet376": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet380": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet384": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet388": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet392": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet396": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet400": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet404": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet408": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet412": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet416": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet420": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet424": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet428": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet432": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet436": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet440": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet444": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet448": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet452": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet456": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet460": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet464": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet468": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet472": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet476": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet480": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet484": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet488": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet492": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet496": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet500": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet504": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet508": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet512": { + "fec": "none", + "default_brkout_mode": "2x10G(2)" + } + } +} diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/pg_profile_lookup.ini new file mode 120000 index 00000000000..297cddb2d22 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/pg_profile_lookup.ini @@ -0,0 +1 @@ +BALANCED/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/port_config.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/port_config.ini new file mode 100644 index 00000000000..3bd85b913a6 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/port_config.ini @@ -0,0 +1,131 @@ +# name lanes alias index speed fec +Ethernet0 369,370,371,372 etp1a 1 400000 rs +Ethernet4 373,374,375,376 etp1b 1 400000 rs +Ethernet8 385,386,387,388 etp2a 2 400000 rs +Ethernet12 389,390,391,392 etp2b 2 400000 rs +Ethernet16 433,434,435,436 etp3a 3 400000 rs +Ethernet20 437,438,439,440 etp3b 3 400000 rs +Ethernet24 449,450,451,452 etp4a 4 400000 rs +Ethernet28 453,454,455,456 etp4b 4 400000 rs +Ethernet32 305,306,307,308 etp5a 5 400000 rs +Ethernet36 309,310,311,312 etp5b 5 400000 rs +Ethernet40 321,322,323,324 etp6a 6 400000 rs +Ethernet44 325,326,327,328 etp6b 6 400000 rs +Ethernet48 241,242,243,244 etp7a 7 400000 rs +Ethernet52 245,246,247,248 etp7b 7 400000 rs +Ethernet56 265,266,267,268 etp8a 8 400000 rs +Ethernet60 269,270,271,272 etp8b 8 400000 rs +Ethernet64 497,498,499,500 etp9a 9 400000 rs +Ethernet68 501,502,503,504 etp9b 9 400000 rs +Ethernet72 9,10,11,12 etp10a 10 400000 rs +Ethernet76 13,14,15,16 etp10b 10 400000 rs +Ethernet80 193,194,195,196 etp11a 11 400000 rs +Ethernet84 197,198,199,200 etp11b 11 400000 rs +Ethernet88 177,178,179,180 etp12a 12 400000 rs +Ethernet92 181,182,183,184 etp12b 12 400000 rs +Ethernet96 65,66,67,68 etp13a 13 400000 rs +Ethernet100 69,70,71,72 etp13b 13 400000 rs +Ethernet104 49,50,51,52 etp14a 14 400000 rs +Ethernet108 53,54,55,56 etp14b 14 400000 rs +Ethernet112 129,130,131,132 etp15a 15 400000 rs +Ethernet116 133,134,135,136 etp15b 15 400000 rs +Ethernet120 113,114,115,116 etp16a 16 400000 rs +Ethernet124 117,118,119,120 etp16b 16 400000 rs +Ethernet128 405,406,407,408 etp17a 17 400000 rs +Ethernet132 401,402,403,404 etp17b 17 400000 rs +Ethernet136 397,398,399,400 etp17c 17 400000 rs +Ethernet140 393,394,395,396 etp17d 17 400000 rs +Ethernet144 421,422,423,424 etp17e 17 400000 rs +Ethernet148 417,418,419,420 etp17f 17 400000 rs +Ethernet152 413,414,415,416 etp17g 17 400000 rs +Ethernet156 409,410,411,412 etp17h 17 400000 rs +Ethernet160 425,426,427,428 etp17i 17 400000 rs +Ethernet164 429,430,431,432 etp17j 17 400000 rs +Ethernet168 445,446,447,448 etp17k 17 400000 rs +Ethernet172 441,442,443,444 etp17l 17 400000 rs +Ethernet176 61,62,63,64 etp18a 18 400000 rs +Ethernet180 57,58,59,60 etp18b 18 400000 rs +Ethernet184 45,46,47,48 etp18c 18 400000 rs +Ethernet188 41,42,43,44 etp18d 18 400000 rs +Ethernet192 37,38,39,40 etp18e 18 400000 rs +Ethernet196 33,34,35,36 etp18f 18 400000 rs +Ethernet200 29,30,31,32 etp18g 18 400000 rs +Ethernet204 25,26,27,28 etp18h 18 400000 rs +Ethernet208 21,22,23,24 etp18i 18 400000 rs +Ethernet212 17,18,19,20 etp18j 18 400000 rs +Ethernet216 1,2,3,4 etp18k 18 400000 rs +Ethernet220 5,6,7,8 etp18l 18 400000 rs +Ethernet224 509,510,511,512 etp19a 19 400000 rs +Ethernet228 505,506,507,508 etp19b 19 400000 rs +Ethernet232 489,490,491,492 etp19c 19 400000 rs +Ethernet236 493,494,495,496 etp19d 19 400000 rs +Ethernet240 485,486,487,488 etp19e 19 400000 rs +Ethernet244 481,482,483,484 etp19f 19 400000 rs +Ethernet248 477,478,479,480 etp19g 19 400000 rs +Ethernet252 473,474,475,476 etp19h 19 400000 rs +Ethernet256 465,466,467,468 etp19i 19 400000 rs +Ethernet260 469,470,471,472 etp19j 19 400000 rs +Ethernet264 457,458,459,460 etp19k 19 400000 rs +Ethernet268 461,462,463,464 etp19l 19 400000 rs +Ethernet272 81,82,83,84 etp20a 20 400000 rs +Ethernet276 85,86,87,88 etp20b 20 400000 rs +Ethernet280 73,74,75,76 etp20c 20 400000 rs +Ethernet284 77,78,79,80 etp20d 20 400000 rs +Ethernet288 97,98,99,100 etp20e 20 400000 rs +Ethernet292 101,102,103,104 etp20f 20 400000 rs +Ethernet296 89,90,91,92 etp20g 20 400000 rs +Ethernet300 93,94,95,96 etp20h 20 400000 rs +Ethernet304 105,106,107,108 etp20i 20 400000 rs +Ethernet308 109,110,111,112 etp20j 20 400000 rs +Ethernet312 121,122,123,124 etp20k 20 400000 rs +Ethernet316 125,126,127,128 etp20l 20 400000 rs +Ethernet320 329,330,331,332 etp21a 21 400000 rs +Ethernet324 333,334,335,336 etp21b 21 400000 rs +Ethernet328 337,338,339,340 etp21c 21 400000 rs +Ethernet332 345,346,347,348 etp21d 21 400000 rs +Ethernet336 349,350,351,352 etp21e 21 400000 rs +Ethernet340 341,342,343,344 etp21f 21 400000 rs +Ethernet344 353,354,355,356 etp21g 21 400000 rs +Ethernet348 361,362,363,364 etp21h 21 400000 rs +Ethernet352 365,366,367,368 etp21i 21 400000 rs +Ethernet356 357,358,359,360 etp21j 21 400000 rs +Ethernet360 377,378,379,380 etp21k 21 400000 rs +Ethernet364 381,382,383,384 etp21l 21 400000 rs +Ethernet368 261,262,263,264 etp22a 22 400000 rs +Ethernet372 257,258,259,260 etp22b 22 400000 rs +Ethernet376 285,286,287,288 etp22c 22 400000 rs +Ethernet380 277,278,279,280 etp22d 22 400000 rs +Ethernet384 273,274,275,276 etp22e 22 400000 rs +Ethernet388 281,282,283,284 etp22f 22 400000 rs +Ethernet392 293,294,295,296 etp22g 22 400000 rs +Ethernet396 297,298,299,300 etp22h 22 400000 rs +Ethernet400 301,302,303,304 etp22i 22 400000 rs +Ethernet404 289,290,291,292 etp22j 22 400000 rs +Ethernet408 313,314,315,316 etp22k 22 400000 rs +Ethernet412 317,318,319,320 etp22l 22 400000 rs +Ethernet416 205,206,207,208 etp23a 23 400000 rs +Ethernet420 201,202,203,204 etp23b 23 400000 rs +Ethernet424 213,214,215,216 etp23c 23 400000 rs +Ethernet428 217,218,219,220 etp23d 23 400000 rs +Ethernet432 221,222,223,224 etp23e 23 400000 rs +Ethernet436 209,210,211,212 etp23f 23 400000 rs +Ethernet440 225,226,227,228 etp23g 23 400000 rs +Ethernet444 233,234,235,236 etp23h 23 400000 rs +Ethernet448 237,238,239,240 etp23i 23 400000 rs +Ethernet452 229,230,231,232 etp23j 23 400000 rs +Ethernet456 249,250,251,252 etp23k 23 400000 rs +Ethernet460 253,254,255,256 etp23l 23 400000 rs +Ethernet464 141,142,143,144 etp24a 24 400000 rs +Ethernet468 137,138,139,140 etp24b 24 400000 rs +Ethernet472 149,150,151,152 etp24c 24 400000 rs +Ethernet476 157,158,159,160 etp24d 24 400000 rs +Ethernet480 153,154,155,156 etp24e 24 400000 rs +Ethernet484 145,146,147,148 etp24f 24 400000 rs +Ethernet488 165,166,167,168 etp24g 24 400000 rs +Ethernet492 173,174,175,176 etp24h 24 400000 rs +Ethernet496 169,170,171,172 etp24i 24 400000 rs +Ethernet500 161,162,163,164 etp24j 24 400000 rs +Ethernet504 189,190,191,192 etp24k 24 400000 rs +Ethernet508 185,186,187,188 etp24l 24 400000 rs +Ethernet512 513 etp25a 25 10000 none +Ethernet513 514 etp25b 25 10000 none diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/qos.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/qos.json.j2 new file mode 120000 index 00000000000..1d89e90b055 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/qos.json.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/sai.profile b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/sai.profile new file mode 100644 index 00000000000..f299df75d26 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-16pe-384c.config.bcm diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm new file mode 100644 index 00000000000..ed6f6155129 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm @@ -0,0 +1,1448 @@ +# +# $Copyright: (c) 2022 Broadcom. +# Broadcom Proprietary and Confidential. All rights reserved.$ +# +# BCM78900 64x800g port configuration. +# +# configuration yaml file +# device: +# : +#
: +# ? +# : +# : +# ... +# : +# : +# : +# : +# ... +# : +# + +--- +bcm_device: + 0: + global: + pktio_mode: 1 + default_cpu_tx_queue: 7 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 1 + sai_port_phy_time_sync_en : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress : 1 + pfc_deadlock_seq_control : 1 + sai_tunnel_support: 2 + bcm_tunnel_term_compatible_mode: 1 + l3_ecmp_member_first_lkup_mem_size: 12288 +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x45670123 + TX_LANE_MAP: 0x45670123 + RX_POLARITY_FLIP: 0x19 + TX_POLARITY_FLIP: 0xaa + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x13025746 + TX_LANE_MAP: 0x64752031 + RX_POLARITY_FLIP: 0x33 + TX_POLARITY_FLIP: 0x66 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01452367 + TX_LANE_MAP: 0x01452367 + RX_POLARITY_FLIP: 0xa5 + TX_POLARITY_FLIP: 0xaa + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x45016723 + TX_LANE_MAP: 0x45016723 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xa5 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01452367 + TX_LANE_MAP: 0x30542167 + RX_POLARITY_FLIP: 0x86 + TX_POLARITY_FLIP: 0x87 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x30271564 + TX_LANE_MAP: 0x47036152 + RX_POLARITY_FLIP: 0xd2 + TX_POLARITY_FLIP: 0x86 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57460123 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0xa6 + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x20315746 + TX_LANE_MAP: 0x65471023 + RX_POLARITY_FLIP: 0x65 + TX_POLARITY_FLIP: 0x6c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57460123 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0xa6 + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x67450123 + TX_LANE_MAP: 0x02136457 + RX_POLARITY_FLIP: 0x36 + TX_POLARITY_FLIP: 0x59 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x67450123 + TX_LANE_MAP: 0x03124657 + RX_POLARITY_FLIP: 0x36 + TX_POLARITY_FLIP: 0x55 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x67450123 + TX_LANE_MAP: 0x02136457 + RX_POLARITY_FLIP: 0x36 + TX_POLARITY_FLIP: 0x59 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x67450123 + TX_LANE_MAP: 0x03124657 + RX_POLARITY_FLIP: 0x36 + TX_POLARITY_FLIP: 0x55 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x45617023 + TX_LANE_MAP: 0x12076435 + RX_POLARITY_FLIP: 0xd2 + TX_POLARITY_FLIP: 0x5a + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01235746 + TX_LANE_MAP: 0x01324675 + RX_POLARITY_FLIP: 0x95 + TX_POLARITY_FLIP: 0x36 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x67450123 + TX_LANE_MAP: 0x13026475 + RX_POLARITY_FLIP: 0x36 + TX_POLARITY_FLIP: 0x5a + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75640123 + TX_LANE_MAP: 0x64750132 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0xc1 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x10325746 + TX_LANE_MAP: 0x75643201 + RX_POLARITY_FLIP: 0xd8 + TX_POLARITY_FLIP: 0x9b + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x10325764 + TX_LANE_MAP: 0x75643210 + RX_POLARITY_FLIP: 0xde + TX_POLARITY_FLIP: 0x9d + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57640123 + TX_LANE_MAP: 0x32105746 + RX_POLARITY_FLIP: 0xaf + TX_POLARITY_FLIP: 0x97 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x10237564 + TX_LANE_MAP: 0x75462310 + RX_POLARITY_FLIP: 0xeb + TX_POLARITY_FLIP: 0xa8 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57640123 + TX_LANE_MAP: 0x32105746 + RX_POLARITY_FLIP: 0xeb + TX_POLARITY_FLIP: 0xd3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75640123 + TX_LANE_MAP: 0x64750132 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0xc1 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01237564 + TX_LANE_MAP: 0x57462310 + RX_POLARITY_FLIP: 0xbe + TX_POLARITY_FLIP: 0x3d + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75640123 + TX_LANE_MAP: 0x64750132 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0xc1 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x10325746 + TX_LANE_MAP: 0x75643201 + RX_POLARITY_FLIP: 0x98 + TX_POLARITY_FLIP: 0x9b + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x10325764 + TX_LANE_MAP: 0x75643210 + RX_POLARITY_FLIP: 0xde + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x32017456 + TX_LANE_MAP: 0x01234576 + RX_POLARITY_FLIP: 0x09 + TX_POLARITY_FLIP: 0x00 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75461302 + TX_LANE_MAP: 0x75461302 + RX_POLARITY_FLIP: 0xeb + TX_POLARITY_FLIP: 0x36 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x31025746 + TX_LANE_MAP: 0x31025746 + RX_POLARITY_FLIP: 0x05 + TX_POLARITY_FLIP: 0x6f + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x31207564 + TX_LANE_MAP: 0x46570213 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x99 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57461302 + TX_LANE_MAP: 0x57461302 + RX_POLARITY_FLIP: 0x50 + TX_POLARITY_FLIP: 0xfa + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x13025746 + TX_LANE_MAP: 0x13025746 + RX_POLARITY_FLIP: 0x05 + TX_POLARITY_FLIP: 0xaf + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57461302 + TX_LANE_MAP: 0x20316475 + RX_POLARITY_FLIP: 0xbb + TX_POLARITY_FLIP: 0x99 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57643120 + TX_LANE_MAP: 0x57643120 + RX_POLARITY_FLIP: 0x41 + TX_POLARITY_FLIP: 0xd4 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x13025764 + TX_LANE_MAP: 0x13025764 + RX_POLARITY_FLIP: 0xed + TX_POLARITY_FLIP: 0x33 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x23104765 + TX_LANE_MAP: 0x10325467 + RX_POLARITY_FLIP: 0x81 + TX_POLARITY_FLIP: 0x87 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01325746 + TX_LANE_MAP: 0x57643201 + RX_POLARITY_FLIP: 0xd8 + TX_POLARITY_FLIP: 0x59 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01237564 + TX_LANE_MAP: 0x01326475 + RX_POLARITY_FLIP: 0xbb + TX_POLARITY_FLIP: 0xe3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57461032 + TX_LANE_MAP: 0x32017564 + RX_POLARITY_FLIP: 0x8d + TX_POLARITY_FLIP: 0xb9 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01237564 + TX_LANE_MAP: 0x01326475 + RX_POLARITY_FLIP: 0xbb + TX_POLARITY_FLIP: 0xe3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75640123 + TX_LANE_MAP: 0x23105746 + RX_POLARITY_FLIP: 0xeb + TX_POLARITY_FLIP: 0xd3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75640132 + TX_LANE_MAP: 0x23105764 + RX_POLARITY_FLIP: 0xed + TX_POLARITY_FLIP: 0xd5 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01325746 + TX_LANE_MAP: 0x57643201 + RX_POLARITY_FLIP: 0x9c + TX_POLARITY_FLIP: 0x1f + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75461032 + TX_LANE_MAP: 0x23017564 + RX_POLARITY_FLIP: 0xd8 + TX_POLARITY_FLIP: 0xec + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01325746 + TX_LANE_MAP: 0x57643201 + RX_POLARITY_FLIP: 0xd8 + TX_POLARITY_FLIP: 0x5b + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01237564 + TX_LANE_MAP: 0x01326475 + RX_POLARITY_FLIP: 0xbb + TX_POLARITY_FLIP: 0xe3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57461032 + TX_LANE_MAP: 0x32017564 + RX_POLARITY_FLIP: 0x8d + TX_POLARITY_FLIP: 0xb9 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57460123 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0xa6 + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x23014657 + TX_LANE_MAP: 0x64571023 + RX_POLARITY_FLIP: 0x65 + TX_POLARITY_FLIP: 0x6c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x32106475 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0x9a + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x23014657 + TX_LANE_MAP: 0x64571023 + RX_POLARITY_FLIP: 0x65 + TX_POLARITY_FLIP: 0x6c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x32106475 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0x9a + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x34152607 + TX_LANE_MAP: 0x46720153 + RX_POLARITY_FLIP: 0x87 + TX_POLARITY_FLIP: 0x8e + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01235746 + TX_LANE_MAP: 0x01324675 + RX_POLARITY_FLIP: 0x95 + TX_POLARITY_FLIP: 0x36 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x23014657 + TX_LANE_MAP: 0x64571023 + RX_POLARITY_FLIP: 0x65 + TX_POLARITY_FLIP: 0x6c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01235746 + TX_LANE_MAP: 0x01324675 + RX_POLARITY_FLIP: 0x95 + TX_POLARITY_FLIP: 0x36 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x45670123 + TX_LANE_MAP: 0x12034675 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x56 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x45670123 + TX_LANE_MAP: 0x12036457 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0x79 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x23016745 + TX_LANE_MAP: 0x32016754 + RX_POLARITY_FLIP: 0x97 + TX_POLARITY_FLIP: 0x63 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x03214567 + TX_LANE_MAP: 0x23016745 + RX_POLARITY_FLIP: 0xaa + TX_POLARITY_FLIP: 0x99 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x23670145 + TX_LANE_MAP: 0x23670145 + RX_POLARITY_FLIP: 0xa5 + TX_POLARITY_FLIP: 0x55 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75643120 + TX_LANE_MAP: 0x02134657 + RX_POLARITY_FLIP: 0xcc + TX_POLARITY_FLIP: 0x66 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01234567 + TX_LANE_MAP: 0x01234567 + RX_POLARITY_FLIP: 0x6e + TX_POLARITY_FLIP: 0x55 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 65 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x00003210 + TX_LANE_MAP: 0x00003210 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 11 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 12 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 14 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 24 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 35 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 36 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 45 + : + PC_PHYS_PORT_ID: 69 + ? + PORT_ID: 46 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 47 + : + PC_PHYS_PORT_ID: 77 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 85 + ? + PORT_ID: 57 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 58 + : + PC_PHYS_PORT_ID: 93 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 101 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 69 + : + PC_PHYS_PORT_ID: 109 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 78 + : + PC_PHYS_PORT_ID: 117 + ? + PORT_ID: 79 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 80 + : + PC_PHYS_PORT_ID: 125 + ? + PORT_ID: 88 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 89 + : + PC_PHYS_PORT_ID: 133 + ? + PORT_ID: 90 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 91 + : + PC_PHYS_PORT_ID: 141 + ? + PORT_ID: 99 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 100 + : + PC_PHYS_PORT_ID: 149 + ? + PORT_ID: 101 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 157 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 165 + ? + PORT_ID: 112 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 113 + : + PC_PHYS_PORT_ID: 173 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 181 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 124 + : + PC_PHYS_PORT_ID: 189 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 133 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 134 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 135 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 145 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 146 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 154 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 155 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 156 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 157 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 166 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 167 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 168 + : + PC_PHYS_PORT_ID: 253 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 261 + ? + PORT_ID: 178 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 179 + : + PC_PHYS_PORT_ID: 269 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 188 + : + PC_PHYS_PORT_ID: 277 + ? + PORT_ID: 189 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 190 + : + PC_PHYS_PORT_ID: 285 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 293 + ? + PORT_ID: 200 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 201 + : + PC_PHYS_PORT_ID: 301 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 309 + ? + PORT_ID: 211 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 317 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 325 + ? + PORT_ID: 222 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 223 + : + PC_PHYS_PORT_ID: 333 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 232 + : + PC_PHYS_PORT_ID: 341 + ? + PORT_ID: 233 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 234 + : + PC_PHYS_PORT_ID: 349 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 243 + : + PC_PHYS_PORT_ID: 357 + ? + PORT_ID: 244 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 245 + : + PC_PHYS_PORT_ID: 365 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 373 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 256 + : + PC_PHYS_PORT_ID: 381 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 389 + ? + PORT_ID: 266 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 397 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 276 + : + PC_PHYS_PORT_ID: 405 + ? + PORT_ID: 277 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 278 + : + PC_PHYS_PORT_ID: 413 + ? + PORT_ID: 286 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 287 + : + PC_PHYS_PORT_ID: 421 + ? + PORT_ID: 288 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 289 + : + PC_PHYS_PORT_ID: 429 + ? + PORT_ID: 297 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 298 + : + PC_PHYS_PORT_ID: 437 + ? + PORT_ID: 299 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 300 + : + PC_PHYS_PORT_ID: 445 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 453 + ? + PORT_ID: 310 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 311 + : + PC_PHYS_PORT_ID: 461 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 469 + ? + PORT_ID: 321 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 322 + : + PC_PHYS_PORT_ID: 477 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 331 + : + PC_PHYS_PORT_ID: 485 + ? + PORT_ID: 332 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 333 + : + PC_PHYS_PORT_ID: 493 + ? + PORT_ID: 341 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 501 + ? + PORT_ID: 343 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 344 + : + PC_PHYS_PORT_ID: 509 + ? + PORT_ID: 76 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 164 + : + PC_PHYS_PORT_ID: 514 +# ? +# PORT_ID: 274 +# : +# PC_PHYS_PORT_ID: 515 +# ? +# PORT_ID: 186 +# : +# PC_PHYS_PORT_ID: 516 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: [[1, 4], + [11, 14], + [22, 25], + [33, 36], + [44, 47], + [55, 58], + [66, 69], + [77, 80], + [88, 91], + [99, 102], + [110, 113], + [121, 124], + [132, 135], + [143, 146], + [154, 157], + [165, 168], + [176, 179], + [187, 190], + [198, 201], + [209, 212], + [220, 223], + [231, 234], + [242, 245], + [253, 256], + [264, 267], + [275, 278], + [286, 289], + [297, 300], + [308, 311], + [319, 322], + [330, 333], + [341, 344]] + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? +# PORT_ID: [[76, 76], [164, 164], [274, 274], [186, 186]] + PORT_ID: [[76, 76], [164, 164]] + : + ENABLE: 0 + MAX_FRAME_SIZE: 9416 + SPEED: 10000 + NUM_LANES: 1 +... +--- +bcm_device: + 0: + global: + ftem_mem_entries: 65536 + sai_stats_support_mask: 0 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/BALANCED b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/BALANCED new file mode 120000 index 00000000000..afd21766cc6 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/BALANCED @@ -0,0 +1 @@ +../../../common/profiles/th5/gen/BALANCED \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffer_ports.j2 new file mode 120000 index 00000000000..35b3dd5d135 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffer_ports.j2 @@ -0,0 +1 @@ +../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffer_ports.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers.json.j2 new file mode 120000 index 00000000000..8658b687e28 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers.json.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t0.j2 new file mode 120000 index 00000000000..9524e6a476a --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +BALANCED/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t1.j2 new file mode 120000 index 00000000000..c25cc95d6d5 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +BALANCED/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/hwsku.json b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/hwsku.json new file mode 100644 index 00000000000..6c2013a138d --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/hwsku.json @@ -0,0 +1,744 @@ +{ + "interfaces": { + "Ethernet0": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet4": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet8": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet12": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet16": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet20": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet24": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet28": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet32": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet36": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet40": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet44": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet48": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet52": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet56": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet60": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet64": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet68": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet72": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet76": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet80": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet84": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet88": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet92": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet96": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet100": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet104": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet108": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet112": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet116": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet120": { + "fec": "rs", + "subport": "1", + "default_brkout_mode": "1x400G" + }, + "Ethernet124": { + "fec": "rs", + "subport": "2", + "default_brkout_mode": "1x400G" + }, + "Ethernet128": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet132": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet136": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet140": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet144": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet148": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet152": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet156": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet160": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet164": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet168": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet172": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet176": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet180": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet184": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet188": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet192": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet196": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet200": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet204": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet208": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet212": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet216": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet220": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet224": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet228": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet232": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet236": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet240": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet244": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet248": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet252": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet256": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet260": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet264": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet268": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet272": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet276": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet280": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet284": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet288": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet292": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet296": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet300": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet304": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet308": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet312": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet316": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet320": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet324": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet328": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet332": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet336": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet340": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet344": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet348": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet352": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet356": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet360": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet364": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet368": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet372": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet376": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet380": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet384": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet388": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet392": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet396": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet400": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet404": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet408": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet412": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet416": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet420": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet424": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet428": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet432": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet436": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet440": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet444": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet448": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet452": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet456": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet460": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet464": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet468": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet472": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet476": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet480": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet484": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet488": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet492": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet496": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet500": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet504": { + "fec": "rs", + "subport": "1", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet508": { + "fec": "rs", + "subport": "2", + "autoneg": "on", + "default_brkout_mode": "1x400G" + }, + "Ethernet512": { + "fec": "none", + "default_brkout_mode": "2x10G(2)" + } + } +} diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/pg_profile_lookup.ini new file mode 120000 index 00000000000..297cddb2d22 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/pg_profile_lookup.ini @@ -0,0 +1 @@ +BALANCED/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/port_config.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/port_config.ini new file mode 100644 index 00000000000..3bd85b913a6 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/port_config.ini @@ -0,0 +1,131 @@ +# name lanes alias index speed fec +Ethernet0 369,370,371,372 etp1a 1 400000 rs +Ethernet4 373,374,375,376 etp1b 1 400000 rs +Ethernet8 385,386,387,388 etp2a 2 400000 rs +Ethernet12 389,390,391,392 etp2b 2 400000 rs +Ethernet16 433,434,435,436 etp3a 3 400000 rs +Ethernet20 437,438,439,440 etp3b 3 400000 rs +Ethernet24 449,450,451,452 etp4a 4 400000 rs +Ethernet28 453,454,455,456 etp4b 4 400000 rs +Ethernet32 305,306,307,308 etp5a 5 400000 rs +Ethernet36 309,310,311,312 etp5b 5 400000 rs +Ethernet40 321,322,323,324 etp6a 6 400000 rs +Ethernet44 325,326,327,328 etp6b 6 400000 rs +Ethernet48 241,242,243,244 etp7a 7 400000 rs +Ethernet52 245,246,247,248 etp7b 7 400000 rs +Ethernet56 265,266,267,268 etp8a 8 400000 rs +Ethernet60 269,270,271,272 etp8b 8 400000 rs +Ethernet64 497,498,499,500 etp9a 9 400000 rs +Ethernet68 501,502,503,504 etp9b 9 400000 rs +Ethernet72 9,10,11,12 etp10a 10 400000 rs +Ethernet76 13,14,15,16 etp10b 10 400000 rs +Ethernet80 193,194,195,196 etp11a 11 400000 rs +Ethernet84 197,198,199,200 etp11b 11 400000 rs +Ethernet88 177,178,179,180 etp12a 12 400000 rs +Ethernet92 181,182,183,184 etp12b 12 400000 rs +Ethernet96 65,66,67,68 etp13a 13 400000 rs +Ethernet100 69,70,71,72 etp13b 13 400000 rs +Ethernet104 49,50,51,52 etp14a 14 400000 rs +Ethernet108 53,54,55,56 etp14b 14 400000 rs +Ethernet112 129,130,131,132 etp15a 15 400000 rs +Ethernet116 133,134,135,136 etp15b 15 400000 rs +Ethernet120 113,114,115,116 etp16a 16 400000 rs +Ethernet124 117,118,119,120 etp16b 16 400000 rs +Ethernet128 405,406,407,408 etp17a 17 400000 rs +Ethernet132 401,402,403,404 etp17b 17 400000 rs +Ethernet136 397,398,399,400 etp17c 17 400000 rs +Ethernet140 393,394,395,396 etp17d 17 400000 rs +Ethernet144 421,422,423,424 etp17e 17 400000 rs +Ethernet148 417,418,419,420 etp17f 17 400000 rs +Ethernet152 413,414,415,416 etp17g 17 400000 rs +Ethernet156 409,410,411,412 etp17h 17 400000 rs +Ethernet160 425,426,427,428 etp17i 17 400000 rs +Ethernet164 429,430,431,432 etp17j 17 400000 rs +Ethernet168 445,446,447,448 etp17k 17 400000 rs +Ethernet172 441,442,443,444 etp17l 17 400000 rs +Ethernet176 61,62,63,64 etp18a 18 400000 rs +Ethernet180 57,58,59,60 etp18b 18 400000 rs +Ethernet184 45,46,47,48 etp18c 18 400000 rs +Ethernet188 41,42,43,44 etp18d 18 400000 rs +Ethernet192 37,38,39,40 etp18e 18 400000 rs +Ethernet196 33,34,35,36 etp18f 18 400000 rs +Ethernet200 29,30,31,32 etp18g 18 400000 rs +Ethernet204 25,26,27,28 etp18h 18 400000 rs +Ethernet208 21,22,23,24 etp18i 18 400000 rs +Ethernet212 17,18,19,20 etp18j 18 400000 rs +Ethernet216 1,2,3,4 etp18k 18 400000 rs +Ethernet220 5,6,7,8 etp18l 18 400000 rs +Ethernet224 509,510,511,512 etp19a 19 400000 rs +Ethernet228 505,506,507,508 etp19b 19 400000 rs +Ethernet232 489,490,491,492 etp19c 19 400000 rs +Ethernet236 493,494,495,496 etp19d 19 400000 rs +Ethernet240 485,486,487,488 etp19e 19 400000 rs +Ethernet244 481,482,483,484 etp19f 19 400000 rs +Ethernet248 477,478,479,480 etp19g 19 400000 rs +Ethernet252 473,474,475,476 etp19h 19 400000 rs +Ethernet256 465,466,467,468 etp19i 19 400000 rs +Ethernet260 469,470,471,472 etp19j 19 400000 rs +Ethernet264 457,458,459,460 etp19k 19 400000 rs +Ethernet268 461,462,463,464 etp19l 19 400000 rs +Ethernet272 81,82,83,84 etp20a 20 400000 rs +Ethernet276 85,86,87,88 etp20b 20 400000 rs +Ethernet280 73,74,75,76 etp20c 20 400000 rs +Ethernet284 77,78,79,80 etp20d 20 400000 rs +Ethernet288 97,98,99,100 etp20e 20 400000 rs +Ethernet292 101,102,103,104 etp20f 20 400000 rs +Ethernet296 89,90,91,92 etp20g 20 400000 rs +Ethernet300 93,94,95,96 etp20h 20 400000 rs +Ethernet304 105,106,107,108 etp20i 20 400000 rs +Ethernet308 109,110,111,112 etp20j 20 400000 rs +Ethernet312 121,122,123,124 etp20k 20 400000 rs +Ethernet316 125,126,127,128 etp20l 20 400000 rs +Ethernet320 329,330,331,332 etp21a 21 400000 rs +Ethernet324 333,334,335,336 etp21b 21 400000 rs +Ethernet328 337,338,339,340 etp21c 21 400000 rs +Ethernet332 345,346,347,348 etp21d 21 400000 rs +Ethernet336 349,350,351,352 etp21e 21 400000 rs +Ethernet340 341,342,343,344 etp21f 21 400000 rs +Ethernet344 353,354,355,356 etp21g 21 400000 rs +Ethernet348 361,362,363,364 etp21h 21 400000 rs +Ethernet352 365,366,367,368 etp21i 21 400000 rs +Ethernet356 357,358,359,360 etp21j 21 400000 rs +Ethernet360 377,378,379,380 etp21k 21 400000 rs +Ethernet364 381,382,383,384 etp21l 21 400000 rs +Ethernet368 261,262,263,264 etp22a 22 400000 rs +Ethernet372 257,258,259,260 etp22b 22 400000 rs +Ethernet376 285,286,287,288 etp22c 22 400000 rs +Ethernet380 277,278,279,280 etp22d 22 400000 rs +Ethernet384 273,274,275,276 etp22e 22 400000 rs +Ethernet388 281,282,283,284 etp22f 22 400000 rs +Ethernet392 293,294,295,296 etp22g 22 400000 rs +Ethernet396 297,298,299,300 etp22h 22 400000 rs +Ethernet400 301,302,303,304 etp22i 22 400000 rs +Ethernet404 289,290,291,292 etp22j 22 400000 rs +Ethernet408 313,314,315,316 etp22k 22 400000 rs +Ethernet412 317,318,319,320 etp22l 22 400000 rs +Ethernet416 205,206,207,208 etp23a 23 400000 rs +Ethernet420 201,202,203,204 etp23b 23 400000 rs +Ethernet424 213,214,215,216 etp23c 23 400000 rs +Ethernet428 217,218,219,220 etp23d 23 400000 rs +Ethernet432 221,222,223,224 etp23e 23 400000 rs +Ethernet436 209,210,211,212 etp23f 23 400000 rs +Ethernet440 225,226,227,228 etp23g 23 400000 rs +Ethernet444 233,234,235,236 etp23h 23 400000 rs +Ethernet448 237,238,239,240 etp23i 23 400000 rs +Ethernet452 229,230,231,232 etp23j 23 400000 rs +Ethernet456 249,250,251,252 etp23k 23 400000 rs +Ethernet460 253,254,255,256 etp23l 23 400000 rs +Ethernet464 141,142,143,144 etp24a 24 400000 rs +Ethernet468 137,138,139,140 etp24b 24 400000 rs +Ethernet472 149,150,151,152 etp24c 24 400000 rs +Ethernet476 157,158,159,160 etp24d 24 400000 rs +Ethernet480 153,154,155,156 etp24e 24 400000 rs +Ethernet484 145,146,147,148 etp24f 24 400000 rs +Ethernet488 165,166,167,168 etp24g 24 400000 rs +Ethernet492 173,174,175,176 etp24h 24 400000 rs +Ethernet496 169,170,171,172 etp24i 24 400000 rs +Ethernet500 161,162,163,164 etp24j 24 400000 rs +Ethernet504 189,190,191,192 etp24k 24 400000 rs +Ethernet508 185,186,187,188 etp24l 24 400000 rs +Ethernet512 513 etp25a 25 10000 none +Ethernet513 514 etp25b 25 10000 none diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/qos.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/qos.json.j2 new file mode 120000 index 00000000000..1d89e90b055 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/qos.json.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/sai.profile b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/sai.profile new file mode 100644 index 00000000000..f299df75d26 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-16pe-384c.config.bcm diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/th5-a7060x6-16pe-384c.config.bcm new file mode 100644 index 00000000000..e1128c83404 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/th5-a7060x6-16pe-384c.config.bcm @@ -0,0 +1,1448 @@ +# +# $Copyright: (c) 2022 Broadcom. +# Broadcom Proprietary and Confidential. All rights reserved.$ +# +# BCM78900 64x800g port configuration. +# +# configuration yaml file +# device: +# : +#
: +# ? +# : +# : +# ... +# : +# : +# : +# : +# ... +# : +# + +--- +bcm_device: + 0: + global: + pktio_mode: 1 + default_cpu_tx_queue: 7 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 1 + sai_port_phy_time_sync_en : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress : 1 + pfc_deadlock_seq_control : 1 + sai_tunnel_support: 2 + bcm_tunnel_term_compatible_mode: 1 + l3_ecmp_member_first_lkup_mem_size: 12288 +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x46570213 + TX_LANE_MAP: 0x64752031 + RX_POLARITY_FLIP: 0xb3 + TX_POLARITY_FLIP: 0x66 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x13025746 + TX_LANE_MAP: 0x64752031 + RX_POLARITY_FLIP: 0x33 + TX_POLARITY_FLIP: 0x66 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x4152637 + TX_LANE_MAP: 0x40516273 + RX_POLARITY_FLIP: 0x69 + TX_POLARITY_FLIP: 0x66 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x40516273 + TX_LANE_MAP: 0x4152637 + RX_POLARITY_FLIP: 0x99 + TX_POLARITY_FLIP: 0x69 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x4152637 + TX_LANE_MAP: 0x53406271 + RX_POLARITY_FLIP: 0x2c + TX_POLARITY_FLIP: 0xe1 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x32071654 + TX_LANE_MAP: 0x4375621 + RX_POLARITY_FLIP: 0x1e + TX_POLARITY_FLIP: 0xe3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57460123 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0xa6 + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x23015476 + TX_LANE_MAP: 0x46752130 + RX_POLARITY_FLIP: 0xc9 + TX_POLARITY_FLIP: 0x3f + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57460123 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0xa6 + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x64750213 + TX_LANE_MAP: 0x10325674 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x64750213 + TX_LANE_MAP: 0x10235476 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0x99 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x64750213 + TX_LANE_MAP: 0x10325674 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x64750213 + TX_LANE_MAP: 0x10235476 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0x99 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x46517203 + TX_LANE_MAP: 0x1723654 + RX_POLARITY_FLIP: 0x1e + TX_POLARITY_FLIP: 0x96 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01235746 + TX_LANE_MAP: 0x01324675 + RX_POLARITY_FLIP: 0x95 + TX_POLARITY_FLIP: 0x36 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x64750213 + TX_LANE_MAP: 0x1237654 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0x96 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75640123 + TX_LANE_MAP: 0x64750132 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0xc1 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x13025476 + TX_LANE_MAP: 0x67450312 + RX_POLARITY_FLIP: 0x12 + TX_POLARITY_FLIP: 0xc4 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x13025674 + TX_LANE_MAP: 0x67451302 + RX_POLARITY_FLIP: 0x14 + TX_POLARITY_FLIP: 0xcd + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x2135674 + TX_LANE_MAP: 0x45671302 + RX_POLARITY_FLIP: 0x56 + TX_POLARITY_FLIP: 0x1c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x12037654 + TX_LANE_MAP: 0x47651203 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0x6e + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x2135674 + TX_LANE_MAP: 0x45671302 + RX_POLARITY_FLIP: 0x74 + TX_POLARITY_FLIP: 0xd + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75640123 + TX_LANE_MAP: 0x64750132 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0xc1 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x2137654 + TX_LANE_MAP: 0x45671203 + RX_POLARITY_FLIP: 0x74 + TX_POLARITY_FLIP: 0xd + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75640123 + TX_LANE_MAP: 0x64750132 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0xc1 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x13025476 + TX_LANE_MAP: 0x67450312 + RX_POLARITY_FLIP: 0x12 + TX_POLARITY_FLIP: 0xc4 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x13025674 + TX_LANE_MAP: 0x67451302 + RX_POLARITY_FLIP: 0x14 + TX_POLARITY_FLIP: 0xcf + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75463021 + TX_LANE_MAP: 0x74652031 + RX_POLARITY_FLIP: 0x3a + TX_POLARITY_FLIP: 0xaa + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x74561032 + TX_LANE_MAP: 0x47650123 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0x3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x54763012 + TX_LANE_MAP: 0x45670321 + RX_POLARITY_FLIP: 0x9a + TX_POLARITY_FLIP: 0x53 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x31207564 + TX_LANE_MAP: 0x46570213 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x99 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x54761032 + TX_LANE_MAP: 0x45670123 + RX_POLARITY_FLIP: 0x9a + TX_POLARITY_FLIP: 0x56 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x10325476 + TX_LANE_MAP: 0x1234567 + RX_POLARITY_FLIP: 0xa9 + TX_POLARITY_FLIP: 0x65 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57461302 + TX_LANE_MAP: 0x20316475 + RX_POLARITY_FLIP: 0xbb + TX_POLARITY_FLIP: 0x99 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x32105674 + TX_LANE_MAP: 0x23016547 + RX_POLARITY_FLIP: 0xb8 + TX_POLARITY_FLIP: 0xbd + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x10325674 + TX_LANE_MAP: 0x1236547 + RX_POLARITY_FLIP: 0x41 + TX_POLARITY_FLIP: 0x0 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x21304675 + TX_LANE_MAP: 0x31206574 + RX_POLARITY_FLIP: 0x2b + TX_POLARITY_FLIP: 0xe1 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x54760312 + TX_LANE_MAP: 0x3126547 + RX_POLARITY_FLIP: 0x21 + TX_POLARITY_FLIP: 0xc9 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01237564 + TX_LANE_MAP: 0x01326475 + RX_POLARITY_FLIP: 0xbb + TX_POLARITY_FLIP: 0xe3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x54761302 + TX_LANE_MAP: 0x3126745 + RX_POLARITY_FLIP: 0x21 + TX_POLARITY_FLIP: 0x4c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01237564 + TX_LANE_MAP: 0x01326475 + RX_POLARITY_FLIP: 0xbb + TX_POLARITY_FLIP: 0xe3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x76540213 + TX_LANE_MAP: 0x12034567 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0xd0 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x76540312 + TX_LANE_MAP: 0x12036547 + RX_POLARITY_FLIP: 0x41 + TX_POLARITY_FLIP: 0xd9 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x54760312 + TX_LANE_MAP: 0x3126547 + RX_POLARITY_FLIP: 0x3 + TX_POLARITY_FLIP: 0x58 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x74561302 + TX_LANE_MAP: 0x2136745 + RX_POLARITY_FLIP: 0x12 + TX_POLARITY_FLIP: 0x7f + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x54760312 + TX_LANE_MAP: 0x3126547 + RX_POLARITY_FLIP: 0x21 + TX_POLARITY_FLIP: 0x49 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01237564 + TX_LANE_MAP: 0x01326475 + RX_POLARITY_FLIP: 0xbb + TX_POLARITY_FLIP: 0xe3 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x54761302 + TX_LANE_MAP: 0x3126745 + RX_POLARITY_FLIP: 0x21 + TX_POLARITY_FLIP: 0x4c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x57460123 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0xa6 + TX_POLARITY_FLIP: 0x9c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x20314567 + TX_LANE_MAP: 0x56742130 + RX_POLARITY_FLIP: 0xc9 + TX_POLARITY_FLIP: 0x3f + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x31206745 + TX_LANE_MAP: 0x74563021 + RX_POLARITY_FLIP: 0x36 + TX_POLARITY_FLIP: 0xcf + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x20314567 + TX_LANE_MAP: 0x56742130 + RX_POLARITY_FLIP: 0xc9 + TX_POLARITY_FLIP: 0x3f + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x31206745 + TX_LANE_MAP: 0x74563021 + RX_POLARITY_FLIP: 0x36 + TX_POLARITY_FLIP: 0xcf + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x31452067 + TX_LANE_MAP: 0x74265031 + RX_POLARITY_FLIP: 0x2d + TX_POLARITY_FLIP: 0xe7 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01235746 + TX_LANE_MAP: 0x01324675 + RX_POLARITY_FLIP: 0x95 + TX_POLARITY_FLIP: 0x36 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x20314567 + TX_LANE_MAP: 0x56742130 + RX_POLARITY_FLIP: 0xc9 + TX_POLARITY_FLIP: 0x3f + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x01235746 + TX_LANE_MAP: 0x01324675 + RX_POLARITY_FLIP: 0x95 + TX_POLARITY_FLIP: 0x36 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x46570213 + TX_LANE_MAP: 0x1327456 + RX_POLARITY_FLIP: 0xc + TX_POLARITY_FLIP: 0x93 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x46570213 + TX_LANE_MAP: 0x1325674 + RX_POLARITY_FLIP: 0xc + TX_POLARITY_FLIP: 0x1c + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x20316475 + TX_LANE_MAP: 0x3125647 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x30 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x2314657 + TX_LANE_MAP: 0x2134657 + RX_POLARITY_FLIP: 0x66 + TX_POLARITY_FLIP: 0xcc + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x26370415 + TX_LANE_MAP: 0x62734051 + RX_POLARITY_FLIP: 0x69 + TX_POLARITY_FLIP: 0x99 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x75643120 + TX_LANE_MAP: 0x02134657 + RX_POLARITY_FLIP: 0xcc + TX_POLARITY_FLIP: 0x66 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x2134657 + TX_LANE_MAP: 0x20316475 + RX_POLARITY_FLIP: 0xc4 + TX_POLARITY_FLIP: 0x99 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + ? + PC_PM_ID: 65 + CORE_INDEX: 0 + : + RX_LANE_MAP: 0x00003210 + TX_LANE_MAP: 0x00003210 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 11 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 12 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 14 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 24 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 35 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 36 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 45 + : + PC_PHYS_PORT_ID: 69 + ? + PORT_ID: 46 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 47 + : + PC_PHYS_PORT_ID: 77 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 85 + ? + PORT_ID: 57 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 58 + : + PC_PHYS_PORT_ID: 93 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 101 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 69 + : + PC_PHYS_PORT_ID: 109 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 78 + : + PC_PHYS_PORT_ID: 117 + ? + PORT_ID: 79 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 80 + : + PC_PHYS_PORT_ID: 125 + ? + PORT_ID: 88 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 89 + : + PC_PHYS_PORT_ID: 133 + ? + PORT_ID: 90 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 91 + : + PC_PHYS_PORT_ID: 141 + ? + PORT_ID: 99 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 100 + : + PC_PHYS_PORT_ID: 149 + ? + PORT_ID: 101 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 157 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 165 + ? + PORT_ID: 112 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 113 + : + PC_PHYS_PORT_ID: 173 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 181 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 124 + : + PC_PHYS_PORT_ID: 189 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 133 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 134 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 135 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 145 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 146 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 154 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 155 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 156 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 157 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 166 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 167 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 168 + : + PC_PHYS_PORT_ID: 253 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 261 + ? + PORT_ID: 178 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 179 + : + PC_PHYS_PORT_ID: 269 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 188 + : + PC_PHYS_PORT_ID: 277 + ? + PORT_ID: 189 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 190 + : + PC_PHYS_PORT_ID: 285 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 293 + ? + PORT_ID: 200 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 201 + : + PC_PHYS_PORT_ID: 301 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 309 + ? + PORT_ID: 211 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 317 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 325 + ? + PORT_ID: 222 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 223 + : + PC_PHYS_PORT_ID: 333 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 232 + : + PC_PHYS_PORT_ID: 341 + ? + PORT_ID: 233 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 234 + : + PC_PHYS_PORT_ID: 349 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 243 + : + PC_PHYS_PORT_ID: 357 + ? + PORT_ID: 244 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 245 + : + PC_PHYS_PORT_ID: 365 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 373 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 256 + : + PC_PHYS_PORT_ID: 381 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 389 + ? + PORT_ID: 266 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 397 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 276 + : + PC_PHYS_PORT_ID: 405 + ? + PORT_ID: 277 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 278 + : + PC_PHYS_PORT_ID: 413 + ? + PORT_ID: 286 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 287 + : + PC_PHYS_PORT_ID: 421 + ? + PORT_ID: 288 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 289 + : + PC_PHYS_PORT_ID: 429 + ? + PORT_ID: 297 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 298 + : + PC_PHYS_PORT_ID: 437 + ? + PORT_ID: 299 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 300 + : + PC_PHYS_PORT_ID: 445 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 453 + ? + PORT_ID: 310 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 311 + : + PC_PHYS_PORT_ID: 461 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 469 + ? + PORT_ID: 321 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 322 + : + PC_PHYS_PORT_ID: 477 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 331 + : + PC_PHYS_PORT_ID: 485 + ? + PORT_ID: 332 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 333 + : + PC_PHYS_PORT_ID: 493 + ? + PORT_ID: 341 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 501 + ? + PORT_ID: 343 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 344 + : + PC_PHYS_PORT_ID: 509 + ? + PORT_ID: 76 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 164 + : + PC_PHYS_PORT_ID: 514 +# ? +# PORT_ID: 274 +# : +# PC_PHYS_PORT_ID: 515 +# ? +# PORT_ID: 186 +# : +# PC_PHYS_PORT_ID: 516 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: [[1, 4], + [11, 14], + [22, 25], + [33, 36], + [44, 47], + [55, 58], + [66, 69], + [77, 80], + [88, 91], + [99, 102], + [110, 113], + [121, 124], + [132, 135], + [143, 146], + [154, 157], + [165, 168], + [176, 179], + [187, 190], + [198, 201], + [209, 212], + [220, 223], + [231, 234], + [242, 245], + [253, 256], + [264, 267], + [275, 278], + [286, 289], + [297, 300], + [308, 311], + [319, 322], + [330, 333], + [341, 344]] + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? +# PORT_ID: [[76, 76], [164, 164], [274, 274], [186, 186]] + PORT_ID: [[76, 76], [164, 164]] + : + ENABLE: 0 + MAX_FRAME_SIZE: 9416 + SPEED: 10000 + NUM_LANES: 1 +... +--- +bcm_device: + 0: + global: + ftem_mem_entries: 65536 + sai_stats_support_mask: 0 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/default_sku b/device/arista/x86_64-arista_7060x6_16pe_384c/default_sku new file mode 100644 index 00000000000..f6fb98c50dd --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/default_sku @@ -0,0 +1 @@ +Arista-7060X6-16PE-384C-O128S2 l1 diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/pcie.yaml b/device/arista/x86_64-arista_7060x6_16pe_384c/pcie.yaml new file mode 120000 index 00000000000..df18a601d82 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/pcie.yaml @@ -0,0 +1 @@ +../x86_64-arista_common/pcie.yaml \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/platform.json b/device/arista/x86_64-arista_7060x6_16pe_384c/platform.json new file mode 100644 index 00000000000..d6d2e69f9e3 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/platform.json @@ -0,0 +1,1362 @@ +{ + "chassis": { + "name": "DCS-7060X6-16PE-384C", + "components": [ + { + "name": "Aboot()" + }, + { + "name": "Scd(addr=0000:04:00.0)" + }, + { + "name": "Scd(addr=0000:06:00.0)" + }, + { + "name": "Scd(addr=0000:08:00.0)" + }, + { + "name": "RedstartSysCpld(addr=13-0023)" + } + ], + "fans": [], + "fan_drawers": [ + { + "name": "slot1", + "fans": [ + { + "name": "fan1" + }, + { + "name": "fan2" + } + ] + }, + { + "name": "slot2", + "fans": [ + { + "name": "fan3" + }, + { + "name": "fan4" + } + ] + }, + { + "name": "slot3", + "fans": [ + { + "name": "fan5" + }, + { + "name": "fan6" + } + ] + } + ], + "psus": [ + { + "name": "psu1", + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "fans": [] + }, + { + "name": "psu2", + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "fans": [] + } + ], + "thermals": [ + { + "name": "Cpu temp sensor", + "controllable": false + }, + { + "name": "Inlet Ambiant Air", + "controllable": false + }, + { + "name": "Outlet", + "controllable": false + }, + { + "name": "Switch Card temp sensor", + "controllable": false + }, + { + "name": "TH5 Diode 1", + "controllable": false + }, + { + "name": "TH5 Diode 2", + "controllable": false + }, + { + "name": "TH5 PCB Left", + "controllable": false + }, + { + "name": "TH5 PCB Right", + "controllable": false + } + ], + "sfps": [ + { + "name": "osfp1" + }, + { + "name": "osfp2" + }, + { + "name": "osfp3" + }, + { + "name": "osfp4" + }, + { + "name": "osfp5" + }, + { + "name": "osfp6" + }, + { + "name": "osfp7" + }, + { + "name": "osfp8" + }, + { + "name": "osfp9" + }, + { + "name": "osfp10" + }, + { + "name": "osfp11" + }, + { + "name": "osfp12" + }, + { + "name": "osfp13" + }, + { + "name": "osfp14" + }, + { + "name": "osfp15" + }, + { + "name": "osfp16" + }, + { + "name": "back0" + }, + { + "name": "back1" + }, + { + "name": "back2" + }, + { + "name": "back3" + }, + { + "name": "back4" + }, + { + "name": "back5" + }, + { + "name": "back6" + }, + { + "name": "back7" + }, + { + "name": "qsfp25" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1", + "lanes": "369,370,371,372", + "breakout_modes": { + "1x400G": [ + "etp1a" + ] + } + }, + "Ethernet4": { + "index": "1,1,1,1", + "lanes": "373,374,375,376", + "breakout_modes": { + "1x400G": [ + "etp1b" + ] + } + }, + "Ethernet8": { + "index": "2,2,2,2", + "lanes": "385,386,387,388", + "breakout_modes": { + "1x400G": [ + "etp2a" + ] + } + }, + "Ethernet12": { + "index": "2,2,2,2", + "lanes": "389,390,391,392", + "breakout_modes": { + "1x400G": [ + "etp2b" + ] + } + }, + "Ethernet16": { + "index": "3,3,3,3", + "lanes": "433,434,435,436", + "breakout_modes": { + "1x400G": [ + "etp3a" + ] + } + }, + "Ethernet20": { + "index": "3,3,3,3", + "lanes": "437,438,439,440", + "breakout_modes": { + "1x400G": [ + "etp3b" + ] + } + }, + "Ethernet24": { + "index": "4,4,4,4", + "lanes": "449,450,451,452", + "breakout_modes": { + "1x400G": [ + "etp4a" + ] + } + }, + "Ethernet28": { + "index": "4,4,4,4", + "lanes": "453,454,455,456", + "breakout_modes": { + "1x400G": [ + "etp4b" + ] + } + }, + "Ethernet32": { + "index": "5,5,5,5", + "lanes": "305,306,307,308", + "breakout_modes": { + "1x400G": [ + "etp5a" + ] + } + }, + "Ethernet36": { + "index": "5,5,5,5", + "lanes": "309,310,311,312", + "breakout_modes": { + "1x400G": [ + "etp5b" + ] + } + }, + "Ethernet40": { + "index": "6,6,6,6", + "lanes": "321,322,323,324", + "breakout_modes": { + "1x400G": [ + "etp6a" + ] + } + }, + "Ethernet44": { + "index": "6,6,6,6", + "lanes": "325,326,327,328", + "breakout_modes": { + "1x400G": [ + "etp6b" + ] + } + }, + "Ethernet48": { + "index": "7,7,7,7", + "lanes": "241,242,243,244", + "breakout_modes": { + "1x400G": [ + "etp7a" + ] + } + }, + "Ethernet52": { + "index": "7,7,7,7", + "lanes": "245,246,247,248", + "breakout_modes": { + "1x400G": [ + "etp7b" + ] + } + }, + "Ethernet56": { + "index": "8,8,8,8", + "lanes": "265,266,267,268", + "breakout_modes": { + "1x400G": [ + "etp8a" + ] + } + }, + "Ethernet60": { + "index": "8,8,8,8", + "lanes": "269,270,271,272", + "breakout_modes": { + "1x400G": [ + "etp8b" + ] + } + }, + "Ethernet64": { + "index": "9,9,9,9", + "lanes": "497,498,499,500", + "breakout_modes": { + "1x400G": [ + "etp9a" + ] + } + }, + "Ethernet68": { + "index": "9,9,9,9", + "lanes": "501,502,503,504", + "breakout_modes": { + "1x400G": [ + "etp9b" + ] + } + }, + "Ethernet72": { + "index": "10,10,10,10", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x400G": [ + "etp10a" + ] + } + }, + "Ethernet76": { + "index": "10,10,10,10", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x400G": [ + "etp10b" + ] + } + }, + "Ethernet80": { + "index": "11,11,11,11", + "lanes": "193,194,195,196", + "breakout_modes": { + "1x400G": [ + "etp11a" + ] + } + }, + "Ethernet84": { + "index": "11,11,11,11", + "lanes": "197,198,199,200", + "breakout_modes": { + "1x400G": [ + "etp11b" + ] + } + }, + "Ethernet88": { + "index": "12,12,12,12", + "lanes": "177,178,179,180", + "breakout_modes": { + "1x400G": [ + "etp12a" + ] + } + }, + "Ethernet92": { + "index": "12,12,12,12", + "lanes": "181,182,183,184", + "breakout_modes": { + "1x400G": [ + "etp12b" + ] + } + }, + "Ethernet96": { + "index": "13,13,13,13", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x400G": [ + "etp13a" + ] + } + }, + "Ethernet100": { + "index": "13,13,13,13", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x400G": [ + "etp13b" + ] + } + }, + "Ethernet104": { + "index": "14,14,14,14", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x400G": [ + "etp14a" + ] + } + }, + "Ethernet108": { + "index": "14,14,14,14", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x400G": [ + "etp14b" + ] + } + }, + "Ethernet112": { + "index": "15,15,15,15", + "lanes": "129,130,131,132", + "breakout_modes": { + "1x400G": [ + "etp15a" + ] + } + }, + "Ethernet116": { + "index": "15,15,15,15", + "lanes": "133,134,135,136", + "breakout_modes": { + "1x400G": [ + "etp15b" + ] + } + }, + "Ethernet120": { + "index": "16,16,16,16", + "lanes": "113,114,115,116", + "breakout_modes": { + "1x400G": [ + "etp16a" + ] + } + }, + "Ethernet124": { + "index": "16,16,16,16", + "lanes": "117,118,119,120", + "breakout_modes": { + "1x400G": [ + "etp16b" + ] + } + }, + "Ethernet128": { + "index": "17,17,17,17", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x400G": [ + "etp17a" + ] + } + }, + "Ethernet132": { + "index": "17,17,17,17", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x400G": [ + "etp17b" + ] + } + }, + "Ethernet136": { + "index": "17,17,17,17", + "lanes": "81,82,83,84", + "breakout_modes": { + "1x400G": [ + "etp17c" + ] + } + }, + "Ethernet140": { + "index": "17,17,17,17", + "lanes": "85,86,87,88", + "breakout_modes": { + "1x400G": [ + "etp17d" + ] + } + }, + "Ethernet144": { + "index": "17,17,17,17", + "lanes": "89,90,91,92", + "breakout_modes": { + "1x400G": [ + "etp17e" + ] + } + }, + "Ethernet148": { + "index": "17,17,17,17", + "lanes": "93,94,95,96", + "breakout_modes": { + "1x400G": [ + "etp17f" + ] + } + }, + "Ethernet152": { + "index": "17,17,17,17", + "lanes": "97,98,99,100", + "breakout_modes": { + "1x400G": [ + "etp17g" + ] + } + }, + "Ethernet156": { + "index": "17,17,17,17", + "lanes": "101,102,103,104", + "breakout_modes": { + "1x400G": [ + "etp17h" + ] + } + }, + "Ethernet160": { + "index": "17,17,17,17", + "lanes": "105,106,107,108", + "breakout_modes": { + "1x400G": [ + "etp17i" + ] + } + }, + "Ethernet164": { + "index": "17,17,17,17", + "lanes": "109,110,111,112", + "breakout_modes": { + "1x400G": [ + "etp17j" + ] + } + }, + "Ethernet168": { + "index": "17,17,17,17", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x400G": [ + "etp17k" + ] + } + }, + "Ethernet172": { + "index": "17,17,17,17", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x400G": [ + "etp17l" + ] + } + }, + "Ethernet176": { + "index": "18,18,18,18", + "lanes": "137,138,139,140", + "breakout_modes": { + "1x400G": [ + "etp18a" + ] + } + }, + "Ethernet180": { + "index": "18,18,18,18", + "lanes": "141,142,143,144", + "breakout_modes": { + "1x400G": [ + "etp18b" + ] + } + }, + "Ethernet184": { + "index": "18,18,18,18", + "lanes": "145,146,147,148", + "breakout_modes": { + "1x400G": [ + "etp18c" + ] + } + }, + "Ethernet188": { + "index": "18,18,18,18", + "lanes": "149,150,151,152", + "breakout_modes": { + "1x400G": [ + "etp18d" + ] + } + }, + "Ethernet192": { + "index": "18,18,18,18", + "lanes": "153,154,155,156", + "breakout_modes": { + "1x400G": [ + "etp18e" + ] + } + }, + "Ethernet196": { + "index": "18,18,18,18", + "lanes": "157,158,159,160", + "breakout_modes": { + "1x400G": [ + "etp18f" + ] + } + }, + "Ethernet200": { + "index": "18,18,18,18", + "lanes": "161,162,163,164", + "breakout_modes": { + "1x400G": [ + "etp18g" + ] + } + }, + "Ethernet204": { + "index": "18,18,18,18", + "lanes": "165,166,167,168", + "breakout_modes": { + "1x400G": [ + "etp18h" + ] + } + }, + "Ethernet208": { + "index": "18,18,18,18", + "lanes": "169,170,171,172", + "breakout_modes": { + "1x400G": [ + "etp18i" + ] + } + }, + "Ethernet212": { + "index": "18,18,18,18", + "lanes": "173,174,175,176", + "breakout_modes": { + "1x400G": [ + "etp18j" + ] + } + }, + "Ethernet216": { + "index": "18,18,18,18", + "lanes": "185,186,187,188", + "breakout_modes": { + "1x400G": [ + "etp18k" + ] + } + }, + "Ethernet220": { + "index": "18,18,18,18", + "lanes": "189,190,191,192", + "breakout_modes": { + "1x400G": [ + "etp18l" + ] + } + }, + "Ethernet224": { + "index": "19,19,19,19", + "lanes": "457,458,459,460", + "breakout_modes": { + "1x400G": [ + "etp19a" + ] + } + }, + "Ethernet228": { + "index": "19,19,19,19", + "lanes": "461,462,463,464", + "breakout_modes": { + "1x400G": [ + "etp19b" + ] + } + }, + "Ethernet232": { + "index": "19,19,19,19", + "lanes": "465,466,467,468", + "breakout_modes": { + "1x400G": [ + "etp19c" + ] + } + }, + "Ethernet236": { + "index": "19,19,19,19", + "lanes": "469,470,471,472", + "breakout_modes": { + "1x400G": [ + "etp19d" + ] + } + }, + "Ethernet240": { + "index": "19,19,19,19", + "lanes": "473,474,475,476", + "breakout_modes": { + "1x400G": [ + "etp19e" + ] + } + }, + "Ethernet244": { + "index": "19,19,19,19", + "lanes": "477,478,479,480", + "breakout_modes": { + "1x400G": [ + "etp19f" + ] + } + }, + "Ethernet248": { + "index": "19,19,19,19", + "lanes": "481,482,483,484", + "breakout_modes": { + "1x400G": [ + "etp19g" + ] + } + }, + "Ethernet252": { + "index": "19,19,19,19", + "lanes": "485,486,487,488", + "breakout_modes": { + "1x400G": [ + "etp19h" + ] + } + }, + "Ethernet256": { + "index": "19,19,19,19", + "lanes": "489,490,491,492", + "breakout_modes": { + "1x400G": [ + "etp19i" + ] + } + }, + "Ethernet260": { + "index": "19,19,19,19", + "lanes": "493,494,495,496", + "breakout_modes": { + "1x400G": [ + "etp19j" + ] + } + }, + "Ethernet264": { + "index": "19,19,19,19", + "lanes": "505,506,507,508", + "breakout_modes": { + "1x400G": [ + "etp19k" + ] + } + }, + "Ethernet268": { + "index": "19,19,19,19", + "lanes": "509,510,511,512", + "breakout_modes": { + "1x400G": [ + "etp19l" + ] + } + }, + "Ethernet272": { + "index": "20,20,20,20", + "lanes": "201,202,203,204", + "breakout_modes": { + "1x400G": [ + "etp20a" + ] + } + }, + "Ethernet276": { + "index": "20,20,20,20", + "lanes": "205,206,207,208", + "breakout_modes": { + "1x400G": [ + "etp20b" + ] + } + }, + "Ethernet280": { + "index": "20,20,20,20", + "lanes": "209,210,211,212", + "breakout_modes": { + "1x400G": [ + "etp20c" + ] + } + }, + "Ethernet284": { + "index": "20,20,20,20", + "lanes": "213,214,215,216", + "breakout_modes": { + "1x400G": [ + "etp20d" + ] + } + }, + "Ethernet288": { + "index": "20,20,20,20", + "lanes": "217,218,219,220", + "breakout_modes": { + "1x400G": [ + "etp20e" + ] + } + }, + "Ethernet292": { + "index": "20,20,20,20", + "lanes": "221,222,223,224", + "breakout_modes": { + "1x400G": [ + "etp20f" + ] + } + }, + "Ethernet296": { + "index": "20,20,20,20", + "lanes": "225,226,227,228", + "breakout_modes": { + "1x400G": [ + "etp20g" + ] + } + }, + "Ethernet300": { + "index": "20,20,20,20", + "lanes": "229,230,231,232", + "breakout_modes": { + "1x400G": [ + "etp20h" + ] + } + }, + "Ethernet304": { + "index": "20,20,20,20", + "lanes": "233,234,235,236", + "breakout_modes": { + "1x400G": [ + "etp20i" + ] + } + }, + "Ethernet308": { + "index": "20,20,20,20", + "lanes": "237,238,239,240", + "breakout_modes": { + "1x400G": [ + "etp20j" + ] + } + }, + "Ethernet312": { + "index": "20,20,20,20", + "lanes": "249,250,251,252", + "breakout_modes": { + "1x400G": [ + "etp20k" + ] + } + }, + "Ethernet316": { + "index": "20,20,20,20", + "lanes": "253,254,255,256", + "breakout_modes": { + "1x400G": [ + "etp20l" + ] + } + }, + "Ethernet320": { + "index": "21,21,21,21", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x400G": [ + "etp21a" + ] + } + }, + "Ethernet324": { + "index": "21,21,21,21", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x400G": [ + "etp21b" + ] + } + }, + "Ethernet328": { + "index": "21,21,21,21", + "lanes": "17,18,19,20", + "breakout_modes": { + "1x400G": [ + "etp21c" + ] + } + }, + "Ethernet332": { + "index": "21,21,21,21", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x400G": [ + "etp21d" + ] + } + }, + "Ethernet336": { + "index": "21,21,21,21", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x400G": [ + "etp21e" + ] + } + }, + "Ethernet340": { + "index": "21,21,21,21", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x400G": [ + "etp21f" + ] + } + }, + "Ethernet344": { + "index": "21,21,21,21", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x400G": [ + "etp21g" + ] + } + }, + "Ethernet348": { + "index": "21,21,21,21", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x400G": [ + "etp21h" + ] + } + }, + "Ethernet352": { + "index": "21,21,21,21", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x400G": [ + "etp21i" + ] + } + }, + "Ethernet356": { + "index": "21,21,21,21", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x400G": [ + "etp21j" + ] + } + }, + "Ethernet360": { + "index": "21,21,21,21", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x400G": [ + "etp21k" + ] + } + }, + "Ethernet364": { + "index": "21,21,21,21", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x400G": [ + "etp21l" + ] + } + }, + "Ethernet368": { + "index": "22,22,22,22", + "lanes": "257,258,259,260", + "breakout_modes": { + "1x400G": [ + "etp22a" + ] + } + }, + "Ethernet372": { + "index": "22,22,22,22", + "lanes": "261,262,263,264", + "breakout_modes": { + "1x400G": [ + "etp22b" + ] + } + }, + "Ethernet376": { + "index": "22,22,22,22", + "lanes": "273,274,275,276", + "breakout_modes": { + "1x400G": [ + "etp22c" + ] + } + }, + "Ethernet380": { + "index": "22,22,22,22", + "lanes": "277,278,279,280", + "breakout_modes": { + "1x400G": [ + "etp22d" + ] + } + }, + "Ethernet384": { + "index": "22,22,22,22", + "lanes": "281,282,283,284", + "breakout_modes": { + "1x400G": [ + "etp22e" + ] + } + }, + "Ethernet388": { + "index": "22,22,22,22", + "lanes": "285,286,287,288", + "breakout_modes": { + "1x400G": [ + "etp22f" + ] + } + }, + "Ethernet392": { + "index": "22,22,22,22", + "lanes": "289,290,291,292", + "breakout_modes": { + "1x400G": [ + "etp22g" + ] + } + }, + "Ethernet396": { + "index": "22,22,22,22", + "lanes": "293,294,295,296", + "breakout_modes": { + "1x400G": [ + "etp22h" + ] + } + }, + "Ethernet400": { + "index": "22,22,22,22", + "lanes": "297,298,299,300", + "breakout_modes": { + "1x400G": [ + "etp22i" + ] + } + }, + "Ethernet404": { + "index": "22,22,22,22", + "lanes": "301,302,303,304", + "breakout_modes": { + "1x400G": [ + "etp22j" + ] + } + }, + "Ethernet408": { + "index": "22,22,22,22", + "lanes": "313,314,315,316", + "breakout_modes": { + "1x400G": [ + "etp22k" + ] + } + }, + "Ethernet412": { + "index": "22,22,22,22", + "lanes": "317,318,319,320", + "breakout_modes": { + "1x400G": [ + "etp22l" + ] + } + }, + "Ethernet416": { + "index": "23,23,23,23", + "lanes": "393,394,395,396", + "breakout_modes": { + "1x400G": [ + "etp23a" + ] + } + }, + "Ethernet420": { + "index": "23,23,23,23", + "lanes": "397,398,399,400", + "breakout_modes": { + "1x400G": [ + "etp23b" + ] + } + }, + "Ethernet424": { + "index": "23,23,23,23", + "lanes": "401,402,403,404", + "breakout_modes": { + "1x400G": [ + "etp23c" + ] + } + }, + "Ethernet428": { + "index": "23,23,23,23", + "lanes": "405,406,407,408", + "breakout_modes": { + "1x400G": [ + "etp23d" + ] + } + }, + "Ethernet432": { + "index": "23,23,23,23", + "lanes": "409,410,411,412", + "breakout_modes": { + "1x400G": [ + "etp23e" + ] + } + }, + "Ethernet436": { + "index": "23,23,23,23", + "lanes": "413,414,415,416", + "breakout_modes": { + "1x400G": [ + "etp23f" + ] + } + }, + "Ethernet440": { + "index": "23,23,23,23", + "lanes": "417,418,419,420", + "breakout_modes": { + "1x400G": [ + "etp23g" + ] + } + }, + "Ethernet444": { + "index": "23,23,23,23", + "lanes": "421,422,423,424", + "breakout_modes": { + "1x400G": [ + "etp23h" + ] + } + }, + "Ethernet448": { + "index": "23,23,23,23", + "lanes": "425,426,427,428", + "breakout_modes": { + "1x400G": [ + "etp23i" + ] + } + }, + "Ethernet452": { + "index": "23,23,23,23", + "lanes": "429,430,431,432", + "breakout_modes": { + "1x400G": [ + "etp23j" + ] + } + }, + "Ethernet456": { + "index": "23,23,23,23", + "lanes": "441,442,443,444", + "breakout_modes": { + "1x400G": [ + "etp23k" + ] + } + }, + "Ethernet460": { + "index": "23,23,23,23", + "lanes": "445,446,447,448", + "breakout_modes": { + "1x400G": [ + "etp23l" + ] + } + }, + "Ethernet464": { + "index": "24,24,24,24", + "lanes": "329,330,331,332", + "breakout_modes": { + "1x400G": [ + "etp24a" + ] + } + }, + "Ethernet468": { + "index": "24,24,24,24", + "lanes": "333,334,335,336", + "breakout_modes": { + "1x400G": [ + "etp24b" + ] + } + }, + "Ethernet472": { + "index": "24,24,24,24", + "lanes": "337,338,339,340", + "breakout_modes": { + "1x400G": [ + "etp24c" + ] + } + }, + "Ethernet476": { + "index": "24,24,24,24", + "lanes": "341,342,343,344", + "breakout_modes": { + "1x400G": [ + "etp24d" + ] + } + }, + "Ethernet480": { + "index": "24,24,24,24", + "lanes": "345,346,347,348", + "breakout_modes": { + "1x400G": [ + "etp24e" + ] + } + }, + "Ethernet484": { + "index": "24,24,24,24", + "lanes": "349,350,351,352", + "breakout_modes": { + "1x400G": [ + "etp24f" + ] + } + }, + "Ethernet488": { + "index": "24,24,24,24", + "lanes": "353,354,355,356", + "breakout_modes": { + "1x400G": [ + "etp24g" + ] + } + }, + "Ethernet492": { + "index": "24,24,24,24", + "lanes": "357,358,359,360", + "breakout_modes": { + "1x400G": [ + "etp24h" + ] + } + }, + "Ethernet496": { + "index": "24,24,24,24", + "lanes": "361,362,363,364", + "breakout_modes": { + "1x400G": [ + "etp24i" + ] + } + }, + "Ethernet500": { + "index": "24,24,24,24", + "lanes": "365,366,367,368", + "breakout_modes": { + "1x400G": [ + "etp24j" + ] + } + }, + "Ethernet504": { + "index": "24,24,24,24", + "lanes": "377,378,379,380", + "breakout_modes": { + "1x400G": [ + "etp24k" + ] + } + }, + "Ethernet508": { + "index": "24,24,24,24", + "lanes": "381,382,383,384", + "breakout_modes": { + "1x400G": [ + "etp24l" + ] + } + }, + "Ethernet512": { + "index": "25,25,25,25", + "lanes": "513,514,515,516", + "breakout_modes": { + "1x100G": [ + "etp25a" + ], + "4x25G": [ + "etp25a", + "etp25b", + "etp25c", + "etp25d" + ], + "4x10G": [ + "etp25a", + "etp25b", + "etp25c", + "etp25d" + ], + "2x10G(2)": [ + "etp25a", + "etp25b" + ] + } + } + } +} diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/platform_asic b/device/arista/x86_64-arista_7060x6_16pe_384c/platform_asic new file mode 100644 index 00000000000..96046765276 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/platform_components.json b/device/arista/x86_64-arista_7060x6_16pe_384c/platform_components.json new file mode 100644 index 00000000000..e5e49951284 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/platform_components.json @@ -0,0 +1,13 @@ +{ + "chassis": { + "DCS-7060X6-16PE-384C": { + "component": { + "Aboot()": {}, + "Scd(addr=0000:04:00.0)": {}, + "Scd(addr=0000:06:00.0)": {}, + "Scd(addr=0000:08:00.0)": {}, + "RedstartSysCpld(addr=13-0023)": {} + } + } + } +} diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/platform_env.conf b/device/arista/x86_64-arista_7060x6_16pe_384c/platform_env.conf new file mode 100644 index 00000000000..dd7cf4fe01c --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/platform_env.conf @@ -0,0 +1,2 @@ +SYNCD_SHM_SIZE=512m +is_ltsw_chip=1 diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/platform_reboot b/device/arista/x86_64-arista_7060x6_16pe_384c/platform_reboot new file mode 120000 index 00000000000..7f94a49e38b --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/platform_reboot @@ -0,0 +1 @@ +../x86_64-arista_common/platform_reboot \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/plugins b/device/arista/x86_64-arista_7060x6_16pe_384c/plugins new file mode 120000 index 00000000000..789a45fcace --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/pmon_daemon_control.json b/device/arista/x86_64-arista_7060x6_16pe_384c/pmon_daemon_control.json new file mode 120000 index 00000000000..51d5ab7b005 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-arista_common/pmon_daemon_control.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/sensors.conf b/device/arista/x86_64-arista_7060x6_16pe_384c/sensors.conf new file mode 100644 index 00000000000..2c6337e2308 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/sensors.conf @@ -0,0 +1,14 @@ +bus "i2c-19" "SCD 0000:06:00.0 SMBus master 0 bus 0" + +chip "max6581-i2c-19-4d" + ignore temp5 + ignore temp6 + +chip "nvme-pci-0400" + # TODO: sensors complaining about tempX_min and tempX_max + ignore temp2 + ignore temp3 + ignore temp4 + ignore temp5 + ignore temp6 + ignore temp7 diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/system_health_monitoring_config.json b/device/arista/x86_64-arista_7060x6_16pe_384c/system_health_monitoring_config.json new file mode 120000 index 00000000000..1185f771fa8 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/system_health_monitoring_config.json @@ -0,0 +1 @@ +../x86_64-arista_common/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/thermal_policy.json b/device/arista/x86_64-arista_7060x6_16pe_384c/thermal_policy.json new file mode 120000 index 00000000000..0991dc7f363 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/thermal_policy.json @@ -0,0 +1 @@ +../x86_64-arista_common/thermal_policy.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm index ba9dff7e73d..a932662ac44 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm @@ -1907,14 +1907,25 @@ bcm_device: 0: global: ftem_mem_entries: 65536 + sai_stats_support_mask: 0 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 ... --- device: 0: # Per pipe flex counter configuration CTR_EFLEX_CONFIG: - CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0 - CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0 + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 # IFP mode FP_CONFIG: diff --git a/device/arista/x86_64-arista_7800_sup/chassisdb.conf b/device/arista/x86_64-arista_7800_sup/chassisdb.conf index ebf71d01b16..f336d0cdb99 100644 --- a/device/arista/x86_64-arista_7800_sup/chassisdb.conf +++ b/device/arista/x86_64-arista_7800_sup/chassisdb.conf @@ -3,4 +3,4 @@ chassis_db_address=127.100.1.1 midplane_subnet=127.100.0.0/16 lag_id_start=1 -lag_id_end=1024 +lag_id_end=1023 diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 index b036683d1db..38ee97c304e 100644 --- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 @@ -22,7 +22,7 @@ "size": "6441610000", "type": "both", "mode": "dynamic", - "xoff": "20761804" + "xoff": "1056256819" } }, "BUFFER_PROFILE": { diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm index 43535d05b9b..7155183334c 100644 --- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm +++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm @@ -9,6 +9,7 @@ l4_protocols_load_balancing_enable=1 fabric_logical_port_base=512 trunk_group_max_members=16 num_olp_tm_ports.BCM8869X=1 +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc # nif port_init_cl72=0 diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/sai_postinit_cmd.soc new file mode 100644 index 00000000000..2fce7563d90 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/sai_postinit_cmd.soc @@ -0,0 +1,28 @@ +INTeRrupt ENAble id=1550 +INTeRrupt ENAble id=1551 +INTeRrupt ENAble id=1552 +INTeRrupt ENAble id=1553 +INTeRrupt ENAble id=1554 +INTeRrupt ENAble id=1555 +INTeRrupt ENAble id=1556 +INTeRrupt ENAble id=1557 +INTeRrupt ENAble id=1558 +INTeRrupt ENAble id=1559 +INTeRrupt ENAble id=1560 +INTeRrupt ENAble id=1561 +INTeRrupt ENAble id=1562 +INTeRrupt ENAble id=1563 +INTeRrupt ENAble id=1564 +INTeRrupt ENAble id=1565 +INTeRrupt ENAble id=1566 +INTeRrupt ENAble id=1567 + +INTeRrupt ENAble id=1296 +INTeRrupt ENAble id=1297 +INTeRrupt ENAble id=1298 +INTeRrupt ENAble id=1299 +INTeRrupt ENAble id=1661 +INTeRrupt ENAble id=1662 + +INTeRrupt ENAble id=1093 +debug intr error diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/services.conf b/device/arista/x86_64-arista_7800r3_48cq2_lc/services.conf new file mode 100644 index 00000000000..2a0a236a8af --- /dev/null +++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/services.conf @@ -0,0 +1 @@ +startup_tsa_tsb.service diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3_48cq2_lc/startup-tsa-tsb.conf new file mode 100644 index 00000000000..15033749325 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/startup-tsa-tsb.conf @@ -0,0 +1 @@ +STARTUP_TSB_TIMER=900 diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/sai_postinit_cmd.soc new file mode 100644 index 00000000000..2fce7563d90 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/sai_postinit_cmd.soc @@ -0,0 +1,28 @@ +INTeRrupt ENAble id=1550 +INTeRrupt ENAble id=1551 +INTeRrupt ENAble id=1552 +INTeRrupt ENAble id=1553 +INTeRrupt ENAble id=1554 +INTeRrupt ENAble id=1555 +INTeRrupt ENAble id=1556 +INTeRrupt ENAble id=1557 +INTeRrupt ENAble id=1558 +INTeRrupt ENAble id=1559 +INTeRrupt ENAble id=1560 +INTeRrupt ENAble id=1561 +INTeRrupt ENAble id=1562 +INTeRrupt ENAble id=1563 +INTeRrupt ENAble id=1564 +INTeRrupt ENAble id=1565 +INTeRrupt ENAble id=1566 +INTeRrupt ENAble id=1567 + +INTeRrupt ENAble id=1296 +INTeRrupt ENAble id=1297 +INTeRrupt ENAble id=1298 +INTeRrupt ENAble id=1299 +INTeRrupt ENAble id=1661 +INTeRrupt ENAble id=1662 + +INTeRrupt ENAble id=1093 +debug intr error diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/services.conf b/device/arista/x86_64-arista_7800r3_48cqm2_lc/services.conf new file mode 100644 index 00000000000..2a0a236a8af --- /dev/null +++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/services.conf @@ -0,0 +1 @@ +startup_tsa_tsb.service diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3_48cqm2_lc/startup-tsa-tsb.conf new file mode 100644 index 00000000000..15033749325 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/startup-tsa-tsb.conf @@ -0,0 +1 @@ +STARTUP_TSB_TIMER=900 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm index 473988f4e1b..547058e385b 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm @@ -3,7 +3,7 @@ system_ref_core_clock_khz=1600000 dpp_db_path=/usr/share/bcm/db programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt - +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc #################################################### ##Reference applications related properties - Start #################################################### diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/sai_postinit_cmd.soc new file mode 100644 index 00000000000..80338902b82 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/sai_postinit_cmd.soc @@ -0,0 +1,29 @@ +INTeRrupt ENAble id=2209 +INTeRrupt ENAble id=2210 +INTeRrupt ENAble id=2211 +INTeRrupt ENAble id=2212 +INTeRrupt ENAble id=2213 +INTeRrupt ENAble id=2214 +INTeRrupt ENAble id=2215 +INTeRrupt ENAble id=2216 +INTeRrupt ENAble id=2217 +INTeRrupt ENAble id=2218 +INTeRrupt ENAble id=2219 +INTeRrupt ENAble id=2220 +INTeRrupt ENAble id=2221 +INTeRrupt ENAble id=2222 +INTeRrupt ENAble id=2223 +INTeRrupt ENAble id=2224 +INTeRrupt ENAble id=2225 +INTeRrupt ENAble id=2226 + +INTeRrupt ENAble id=482 +INTeRrupt ENAble id=483 +INTeRrupt ENAble id=484 +INTeRrupt ENAble id=485 +INTeRrupt ENAble id=486 +INTeRrupt ENAble id=487 +INTeRrupt ENAble id=488 + +INTeRrupt ENAble id=1597 +debug intr error \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm index 54cfe519d0c..21b12b13fa6 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm @@ -3,7 +3,7 @@ system_ref_core_clock_khz=1600000 dpp_db_path=/usr/share/bcm/db programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt - +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc #################################################### ##Reference applications related properties - Start #################################################### diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/sai_postinit_cmd.soc new file mode 100644 index 00000000000..80338902b82 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/sai_postinit_cmd.soc @@ -0,0 +1,29 @@ +INTeRrupt ENAble id=2209 +INTeRrupt ENAble id=2210 +INTeRrupt ENAble id=2211 +INTeRrupt ENAble id=2212 +INTeRrupt ENAble id=2213 +INTeRrupt ENAble id=2214 +INTeRrupt ENAble id=2215 +INTeRrupt ENAble id=2216 +INTeRrupt ENAble id=2217 +INTeRrupt ENAble id=2218 +INTeRrupt ENAble id=2219 +INTeRrupt ENAble id=2220 +INTeRrupt ENAble id=2221 +INTeRrupt ENAble id=2222 +INTeRrupt ENAble id=2223 +INTeRrupt ENAble id=2224 +INTeRrupt ENAble id=2225 +INTeRrupt ENAble id=2226 + +INTeRrupt ENAble id=482 +INTeRrupt ENAble id=483 +INTeRrupt ENAble id=484 +INTeRrupt ENAble id=485 +INTeRrupt ENAble id=486 +INTeRrupt ENAble id=487 +INTeRrupt ENAble id=488 + +INTeRrupt ENAble id=1597 +debug intr error \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm index 1582449b6b2..0f267fe2306 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm @@ -3,7 +3,7 @@ system_ref_core_clock_khz=1600000 dpp_db_path=/usr/share/bcm/db programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt - +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc #################################################### ##Reference applications related properties - Start #################################################### diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/sai_postinit_cmd.soc new file mode 100644 index 00000000000..80338902b82 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/sai_postinit_cmd.soc @@ -0,0 +1,29 @@ +INTeRrupt ENAble id=2209 +INTeRrupt ENAble id=2210 +INTeRrupt ENAble id=2211 +INTeRrupt ENAble id=2212 +INTeRrupt ENAble id=2213 +INTeRrupt ENAble id=2214 +INTeRrupt ENAble id=2215 +INTeRrupt ENAble id=2216 +INTeRrupt ENAble id=2217 +INTeRrupt ENAble id=2218 +INTeRrupt ENAble id=2219 +INTeRrupt ENAble id=2220 +INTeRrupt ENAble id=2221 +INTeRrupt ENAble id=2222 +INTeRrupt ENAble id=2223 +INTeRrupt ENAble id=2224 +INTeRrupt ENAble id=2225 +INTeRrupt ENAble id=2226 + +INTeRrupt ENAble id=482 +INTeRrupt ENAble id=483 +INTeRrupt ENAble id=484 +INTeRrupt ENAble id=485 +INTeRrupt ENAble id=486 +INTeRrupt ENAble id=487 +INTeRrupt ENAble id=488 + +INTeRrupt ENAble id=1597 +debug intr error \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm index 820bbdf2ac9..371befcb7d8 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm @@ -3,7 +3,7 @@ system_ref_core_clock_khz=1600000 dpp_db_path=/usr/share/bcm/db programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt - +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc #################################################### ##Reference applications related properties - Start #################################################### diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/sai_postinit_cmd.soc new file mode 100644 index 00000000000..80338902b82 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/sai_postinit_cmd.soc @@ -0,0 +1,29 @@ +INTeRrupt ENAble id=2209 +INTeRrupt ENAble id=2210 +INTeRrupt ENAble id=2211 +INTeRrupt ENAble id=2212 +INTeRrupt ENAble id=2213 +INTeRrupt ENAble id=2214 +INTeRrupt ENAble id=2215 +INTeRrupt ENAble id=2216 +INTeRrupt ENAble id=2217 +INTeRrupt ENAble id=2218 +INTeRrupt ENAble id=2219 +INTeRrupt ENAble id=2220 +INTeRrupt ENAble id=2221 +INTeRrupt ENAble id=2222 +INTeRrupt ENAble id=2223 +INTeRrupt ENAble id=2224 +INTeRrupt ENAble id=2225 +INTeRrupt ENAble id=2226 + +INTeRrupt ENAble id=482 +INTeRrupt ENAble id=483 +INTeRrupt ENAble id=484 +INTeRrupt ENAble id=485 +INTeRrupt ENAble id=486 +INTeRrupt ENAble id=487 +INTeRrupt ENAble id=488 + +INTeRrupt ENAble id=1597 +debug intr error \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm index 3702d9b3a82..8a6ed4e8131 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm @@ -3,7 +3,7 @@ system_ref_core_clock_khz=1600000 dpp_db_path=/usr/share/bcm/db programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt - +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc #################################################### ##Reference applications related properties - Start #################################################### diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/sai_postinit_cmd.soc new file mode 100644 index 00000000000..80338902b82 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/sai_postinit_cmd.soc @@ -0,0 +1,29 @@ +INTeRrupt ENAble id=2209 +INTeRrupt ENAble id=2210 +INTeRrupt ENAble id=2211 +INTeRrupt ENAble id=2212 +INTeRrupt ENAble id=2213 +INTeRrupt ENAble id=2214 +INTeRrupt ENAble id=2215 +INTeRrupt ENAble id=2216 +INTeRrupt ENAble id=2217 +INTeRrupt ENAble id=2218 +INTeRrupt ENAble id=2219 +INTeRrupt ENAble id=2220 +INTeRrupt ENAble id=2221 +INTeRrupt ENAble id=2222 +INTeRrupt ENAble id=2223 +INTeRrupt ENAble id=2224 +INTeRrupt ENAble id=2225 +INTeRrupt ENAble id=2226 + +INTeRrupt ENAble id=482 +INTeRrupt ENAble id=483 +INTeRrupt ENAble id=484 +INTeRrupt ENAble id=485 +INTeRrupt ENAble id=486 +INTeRrupt ENAble id=487 +INTeRrupt ENAble id=488 + +INTeRrupt ENAble id=1597 +debug intr error \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm index 1f26bc66d50..b779ee4e91f 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm @@ -3,7 +3,7 @@ system_ref_core_clock_khz=1600000 dpp_db_path=/usr/share/bcm/db programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt - +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc #################################################### ##Reference applications related properties - Start #################################################### diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/sai_postinit_cmd.soc new file mode 100644 index 00000000000..80338902b82 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/sai_postinit_cmd.soc @@ -0,0 +1,29 @@ +INTeRrupt ENAble id=2209 +INTeRrupt ENAble id=2210 +INTeRrupt ENAble id=2211 +INTeRrupt ENAble id=2212 +INTeRrupt ENAble id=2213 +INTeRrupt ENAble id=2214 +INTeRrupt ENAble id=2215 +INTeRrupt ENAble id=2216 +INTeRrupt ENAble id=2217 +INTeRrupt ENAble id=2218 +INTeRrupt ENAble id=2219 +INTeRrupt ENAble id=2220 +INTeRrupt ENAble id=2221 +INTeRrupt ENAble id=2222 +INTeRrupt ENAble id=2223 +INTeRrupt ENAble id=2224 +INTeRrupt ENAble id=2225 +INTeRrupt ENAble id=2226 + +INTeRrupt ENAble id=482 +INTeRrupt ENAble id=483 +INTeRrupt ENAble id=484 +INTeRrupt ENAble id=485 +INTeRrupt ENAble id=486 +INTeRrupt ENAble id=487 +INTeRrupt ENAble id=488 + +INTeRrupt ENAble id=1597 +debug intr error \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/platform.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/platform.json index 2c91765fcfd..5e5c0a0371c 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/platform.json +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/platform.json @@ -1,6 +1,6 @@ { "chassis": { - "name": "7800R3A-36DM2-LC", + "name": "7800R3A-36D2-LC", "components": [ { "name": "Aboot()" diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/platform_components.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/platform_components.json index 9666c8e0b0c..74d42e7f171 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/platform_components.json +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/platform_components.json @@ -1,6 +1,6 @@ { "chassis": { - "7800R3A-36DM2-LC": { + "7800R3A-36D2-LC": { "component": { "Aboot()": {}, "Scd(addr=0000:00:18.7)": {}, diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/services.conf b/device/arista/x86_64-arista_7800r3a_36d2_lc/services.conf new file mode 100644 index 00000000000..2a0a236a8af --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/services.conf @@ -0,0 +1 @@ +startup_tsa_tsb.service diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf new file mode 100644 index 00000000000..15033749325 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf @@ -0,0 +1 @@ +STARTUP_TSB_TIMER=900 diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc b/device/arista/x86_64-arista_7800r3a_36d_lc deleted file mode 120000 index 50e843fb310..00000000000 --- a/device/arista/x86_64-arista_7800r3a_36d_lc +++ /dev/null @@ -1 +0,0 @@ -x86_64-arista_7800r3a_36d2_lc \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/Arista-7800R3A-36D-C36 b/device/arista/x86_64-arista_7800r3a_36d_lc/Arista-7800R3A-36D-C36 new file mode 120000 index 00000000000..58bdfdfebef --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/Arista-7800R3A-36D-C36 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D-C36 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/Arista-7800R3A-36D-C72 b/device/arista/x86_64-arista_7800r3a_36d_lc/Arista-7800R3A-36D-C72 new file mode 120000 index 00000000000..fcbe1e04cc2 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/Arista-7800R3A-36D-C72 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D-C72 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/Arista-7800R3A-36D-D36 b/device/arista/x86_64-arista_7800r3a_36d_lc/Arista-7800R3A-36D-D36 new file mode 120000 index 00000000000..66aca724e73 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/Arista-7800R3A-36D-D36 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D-D36 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/asic.conf b/device/arista/x86_64-arista_7800r3a_36d_lc/asic.conf new file mode 120000 index 00000000000..0922baf5956 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/asic.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/asic.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/chassisdb.conf b/device/arista/x86_64-arista_7800r3a_36d_lc/chassisdb.conf new file mode 120000 index 00000000000..eb5e665396b --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/chassisdb.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/chassisdb.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/default_sku b/device/arista/x86_64-arista_7800r3a_36d_lc/default_sku new file mode 100644 index 00000000000..1a1d0b42862 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/default_sku @@ -0,0 +1 @@ +Arista-7800R3A-36D-C72 t1 diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/media_settings.json b/device/arista/x86_64-arista_7800r3a_36d_lc/media_settings.json new file mode 120000 index 00000000000..bc7b4bb645f --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/media_settings.json @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/media_settings.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/pcie.yaml b/device/arista/x86_64-arista_7800r3a_36d_lc/pcie.yaml new file mode 120000 index 00000000000..ce2fa86b6b4 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/pcie.yaml @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/pcie.yaml \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/platform.json b/device/arista/x86_64-arista_7800r3a_36d_lc/platform.json new file mode 100644 index 00000000000..07e5af5ef13 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/platform.json @@ -0,0 +1,140 @@ +{ + "chassis": { + "name": "7800R3A-36D-LC", + "components": [ + { + "name": "Aboot()" + }, + { + "name": "Scd(addr=0000:00:18.7)" + }, + { + "name": "Scd(addr=0000:08:00.0)" + } + ], + "fans": [], + "fan_drawers": [], + "psus": [], + "thermals": [ + { + "name": "Cpu temp sensor", + "controllable": false + }, + { + "name": "Cpu SBTSI", + "controllable": false + } + ], + "sfps": [ + { + "name": "osfp1" + }, + { + "name": "osfp2" + }, + { + "name": "osfp3" + }, + { + "name": "osfp4" + }, + { + "name": "osfp5" + }, + { + "name": "osfp6" + }, + { + "name": "osfp7" + }, + { + "name": "osfp8" + }, + { + "name": "osfp9" + }, + { + "name": "osfp10" + }, + { + "name": "osfp11" + }, + { + "name": "osfp12" + }, + { + "name": "osfp13" + }, + { + "name": "osfp14" + }, + { + "name": "osfp15" + }, + { + "name": "osfp16" + }, + { + "name": "osfp17" + }, + { + "name": "osfp18" + }, + { + "name": "osfp19" + }, + { + "name": "osfp20" + }, + { + "name": "osfp21" + }, + { + "name": "osfp22" + }, + { + "name": "osfp23" + }, + { + "name": "osfp24" + }, + { + "name": "osfp25" + }, + { + "name": "osfp26" + }, + { + "name": "osfp27" + }, + { + "name": "osfp28" + }, + { + "name": "osfp29" + }, + { + "name": "osfp30" + }, + { + "name": "osfp31" + }, + { + "name": "osfp32" + }, + { + "name": "osfp33" + }, + { + "name": "osfp34" + }, + { + "name": "osfp35" + }, + { + "name": "osfp36" + } + ] + }, + "interfaces": {} +} diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/platform_asic b/device/arista/x86_64-arista_7800r3a_36d_lc/platform_asic new file mode 120000 index 00000000000..d7f2af0da6d --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/platform_asic @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/platform_asic \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/platform_components.json b/device/arista/x86_64-arista_7800r3a_36d_lc/platform_components.json new file mode 100644 index 00000000000..d9bb2d4f2b6 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/platform_components.json @@ -0,0 +1,11 @@ +{ + "chassis": { + "7800R3A-36D-LC": { + "component": { + "Aboot()": {}, + "Scd(addr=0000:00:18.7)": {}, + "Scd(addr=0000:08:00.0)": {} + } + } + } +} diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/platform_env.conf b/device/arista/x86_64-arista_7800r3a_36d_lc/platform_env.conf new file mode 120000 index 00000000000..2a8441dd464 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/platform_env.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/platform_env.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/plugins b/device/arista/x86_64-arista_7800r3a_36d_lc/plugins new file mode 120000 index 00000000000..789a45fcace --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/pmon_daemon_control.json b/device/arista/x86_64-arista_7800r3a_36d_lc/pmon_daemon_control.json new file mode 120000 index 00000000000..51d5ab7b005 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-arista_common/pmon_daemon_control.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/sensors.conf b/device/arista/x86_64-arista_7800r3a_36d_lc/sensors.conf new file mode 120000 index 00000000000..49f4bf6df41 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/sensors.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/sensors.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/services.conf b/device/arista/x86_64-arista_7800r3a_36d_lc/services.conf new file mode 120000 index 00000000000..1ec553b5b61 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/services.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/services.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3a_36d_lc/startup-tsa-tsb.conf new file mode 120000 index 00000000000..ef5f019a633 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/startup-tsa-tsb.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/system_health_monitoring_config.json b/device/arista/x86_64-arista_7800r3a_36d_lc/system_health_monitoring_config.json new file mode 120000 index 00000000000..1185f771fa8 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/system_health_monitoring_config.json @@ -0,0 +1 @@ +../x86_64-arista_common/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/thermal_policy.json b/device/arista/x86_64-arista_7800r3a_36d_lc/thermal_policy.json new file mode 120000 index 00000000000..0991dc7f363 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/thermal_policy.json @@ -0,0 +1 @@ +../x86_64-arista_common/thermal_policy.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/use_pci_id_chassis b/device/arista/x86_64-arista_7800r3a_36d_lc/use_pci_id_chassis new file mode 120000 index 00000000000..617e3cf6958 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36d_lc/use_pci_id_chassis @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/use_pci_id_chassis \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc b/device/arista/x86_64-arista_7800r3a_36dm2_lc deleted file mode 120000 index 50e843fb310..00000000000 --- a/device/arista/x86_64-arista_7800r3a_36dm2_lc +++ /dev/null @@ -1 +0,0 @@ -x86_64-arista_7800r3a_36d2_lc \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/Arista-7800R3A-36DM2-C36 b/device/arista/x86_64-arista_7800r3a_36dm2_lc/Arista-7800R3A-36DM2-C36 new file mode 120000 index 00000000000..c0ef8882146 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/Arista-7800R3A-36DM2-C36 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36DM2-C36 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/Arista-7800R3A-36DM2-C72 b/device/arista/x86_64-arista_7800r3a_36dm2_lc/Arista-7800R3A-36DM2-C72 new file mode 120000 index 00000000000..9728a130f95 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/Arista-7800R3A-36DM2-C72 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36DM2-C72 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/Arista-7800R3A-36DM2-D36 b/device/arista/x86_64-arista_7800r3a_36dm2_lc/Arista-7800R3A-36DM2-D36 new file mode 120000 index 00000000000..f3135e3dbe0 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/Arista-7800R3A-36DM2-D36 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36DM2-D36 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/asic.conf b/device/arista/x86_64-arista_7800r3a_36dm2_lc/asic.conf new file mode 120000 index 00000000000..0922baf5956 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/asic.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/asic.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/chassisdb.conf b/device/arista/x86_64-arista_7800r3a_36dm2_lc/chassisdb.conf new file mode 120000 index 00000000000..eb5e665396b --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/chassisdb.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/chassisdb.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/default_sku b/device/arista/x86_64-arista_7800r3a_36dm2_lc/default_sku new file mode 100644 index 00000000000..ff98731b7c6 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/default_sku @@ -0,0 +1 @@ +Arista-7800R3A-36DM2-C72 t1 diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/media_settings.json b/device/arista/x86_64-arista_7800r3a_36dm2_lc/media_settings.json new file mode 120000 index 00000000000..bc7b4bb645f --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/media_settings.json @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/media_settings.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/pcie.yaml b/device/arista/x86_64-arista_7800r3a_36dm2_lc/pcie.yaml new file mode 120000 index 00000000000..ce2fa86b6b4 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/pcie.yaml @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/pcie.yaml \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform.json b/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform.json new file mode 100644 index 00000000000..2c91765fcfd --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform.json @@ -0,0 +1,140 @@ +{ + "chassis": { + "name": "7800R3A-36DM2-LC", + "components": [ + { + "name": "Aboot()" + }, + { + "name": "Scd(addr=0000:00:18.7)" + }, + { + "name": "Scd(addr=0000:08:00.0)" + } + ], + "fans": [], + "fan_drawers": [], + "psus": [], + "thermals": [ + { + "name": "Cpu temp sensor", + "controllable": false + }, + { + "name": "Cpu SBTSI", + "controllable": false + } + ], + "sfps": [ + { + "name": "osfp1" + }, + { + "name": "osfp2" + }, + { + "name": "osfp3" + }, + { + "name": "osfp4" + }, + { + "name": "osfp5" + }, + { + "name": "osfp6" + }, + { + "name": "osfp7" + }, + { + "name": "osfp8" + }, + { + "name": "osfp9" + }, + { + "name": "osfp10" + }, + { + "name": "osfp11" + }, + { + "name": "osfp12" + }, + { + "name": "osfp13" + }, + { + "name": "osfp14" + }, + { + "name": "osfp15" + }, + { + "name": "osfp16" + }, + { + "name": "osfp17" + }, + { + "name": "osfp18" + }, + { + "name": "osfp19" + }, + { + "name": "osfp20" + }, + { + "name": "osfp21" + }, + { + "name": "osfp22" + }, + { + "name": "osfp23" + }, + { + "name": "osfp24" + }, + { + "name": "osfp25" + }, + { + "name": "osfp26" + }, + { + "name": "osfp27" + }, + { + "name": "osfp28" + }, + { + "name": "osfp29" + }, + { + "name": "osfp30" + }, + { + "name": "osfp31" + }, + { + "name": "osfp32" + }, + { + "name": "osfp33" + }, + { + "name": "osfp34" + }, + { + "name": "osfp35" + }, + { + "name": "osfp36" + } + ] + }, + "interfaces": {} +} diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform_asic b/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform_asic new file mode 120000 index 00000000000..d7f2af0da6d --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform_asic @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/platform_asic \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform_components.json b/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform_components.json new file mode 100644 index 00000000000..9666c8e0b0c --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform_components.json @@ -0,0 +1,11 @@ +{ + "chassis": { + "7800R3A-36DM2-LC": { + "component": { + "Aboot()": {}, + "Scd(addr=0000:00:18.7)": {}, + "Scd(addr=0000:08:00.0)": {} + } + } + } +} diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform_env.conf b/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform_env.conf new file mode 120000 index 00000000000..2a8441dd464 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform_env.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/platform_env.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/plugins b/device/arista/x86_64-arista_7800r3a_36dm2_lc/plugins new file mode 120000 index 00000000000..789a45fcace --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/pmon_daemon_control.json b/device/arista/x86_64-arista_7800r3a_36dm2_lc/pmon_daemon_control.json new file mode 120000 index 00000000000..51d5ab7b005 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-arista_common/pmon_daemon_control.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/sensors.conf b/device/arista/x86_64-arista_7800r3a_36dm2_lc/sensors.conf new file mode 120000 index 00000000000..49f4bf6df41 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/sensors.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/sensors.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/services.conf b/device/arista/x86_64-arista_7800r3a_36dm2_lc/services.conf new file mode 120000 index 00000000000..1ec553b5b61 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/services.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/services.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3a_36dm2_lc/startup-tsa-tsb.conf new file mode 120000 index 00000000000..ef5f019a633 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/startup-tsa-tsb.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/system_health_monitoring_config.json b/device/arista/x86_64-arista_7800r3a_36dm2_lc/system_health_monitoring_config.json new file mode 120000 index 00000000000..1185f771fa8 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/system_health_monitoring_config.json @@ -0,0 +1 @@ +../x86_64-arista_common/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/thermal_policy.json b/device/arista/x86_64-arista_7800r3a_36dm2_lc/thermal_policy.json new file mode 120000 index 00000000000..0991dc7f363 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/thermal_policy.json @@ -0,0 +1 @@ +../x86_64-arista_common/thermal_policy.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/use_pci_id_chassis b/device/arista/x86_64-arista_7800r3a_36dm2_lc/use_pci_id_chassis new file mode 120000 index 00000000000..617e3cf6958 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/use_pci_id_chassis @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/use_pci_id_chassis \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc b/device/arista/x86_64-arista_7800r3a_36p_lc deleted file mode 120000 index 50e843fb310..00000000000 --- a/device/arista/x86_64-arista_7800r3a_36p_lc +++ /dev/null @@ -1 +0,0 @@ -x86_64-arista_7800r3a_36d2_lc \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/Arista-7800R3A-36P-C36 b/device/arista/x86_64-arista_7800r3a_36p_lc/Arista-7800R3A-36P-C36 new file mode 120000 index 00000000000..be06b5243de --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/Arista-7800R3A-36P-C36 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36P-C36 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/Arista-7800R3A-36P-C72 b/device/arista/x86_64-arista_7800r3a_36p_lc/Arista-7800R3A-36P-C72 new file mode 120000 index 00000000000..dce0ce651f9 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/Arista-7800R3A-36P-C72 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36P-C72 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/Arista-7800R3A-36P-P36 b/device/arista/x86_64-arista_7800r3a_36p_lc/Arista-7800R3A-36P-P36 new file mode 120000 index 00000000000..20d01a73211 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/Arista-7800R3A-36P-P36 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36P-P36 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/asic.conf b/device/arista/x86_64-arista_7800r3a_36p_lc/asic.conf new file mode 120000 index 00000000000..0922baf5956 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/asic.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/asic.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/chassisdb.conf b/device/arista/x86_64-arista_7800r3a_36p_lc/chassisdb.conf new file mode 120000 index 00000000000..eb5e665396b --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/chassisdb.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/chassisdb.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/default_sku b/device/arista/x86_64-arista_7800r3a_36p_lc/default_sku new file mode 100644 index 00000000000..e907b99a5dd --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/default_sku @@ -0,0 +1 @@ +Arista-7800R3A-36P-C72 t1 diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/media_settings.json b/device/arista/x86_64-arista_7800r3a_36p_lc/media_settings.json new file mode 120000 index 00000000000..bc7b4bb645f --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/media_settings.json @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/media_settings.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/pcie.yaml b/device/arista/x86_64-arista_7800r3a_36p_lc/pcie.yaml new file mode 120000 index 00000000000..ce2fa86b6b4 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/pcie.yaml @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/pcie.yaml \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/platform.json b/device/arista/x86_64-arista_7800r3a_36p_lc/platform.json new file mode 100644 index 00000000000..84c8673f2b3 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/platform.json @@ -0,0 +1,140 @@ +{ + "chassis": { + "name": "7800R3A-36P-LC", + "components": [ + { + "name": "Aboot()" + }, + { + "name": "Scd(addr=0000:00:18.7)" + }, + { + "name": "Scd(addr=0000:08:00.0)" + } + ], + "fans": [], + "fan_drawers": [], + "psus": [], + "thermals": [ + { + "name": "Cpu temp sensor", + "controllable": false + }, + { + "name": "Cpu SBTSI", + "controllable": false + } + ], + "sfps": [ + { + "name": "osfp1" + }, + { + "name": "osfp2" + }, + { + "name": "osfp3" + }, + { + "name": "osfp4" + }, + { + "name": "osfp5" + }, + { + "name": "osfp6" + }, + { + "name": "osfp7" + }, + { + "name": "osfp8" + }, + { + "name": "osfp9" + }, + { + "name": "osfp10" + }, + { + "name": "osfp11" + }, + { + "name": "osfp12" + }, + { + "name": "osfp13" + }, + { + "name": "osfp14" + }, + { + "name": "osfp15" + }, + { + "name": "osfp16" + }, + { + "name": "osfp17" + }, + { + "name": "osfp18" + }, + { + "name": "osfp19" + }, + { + "name": "osfp20" + }, + { + "name": "osfp21" + }, + { + "name": "osfp22" + }, + { + "name": "osfp23" + }, + { + "name": "osfp24" + }, + { + "name": "osfp25" + }, + { + "name": "osfp26" + }, + { + "name": "osfp27" + }, + { + "name": "osfp28" + }, + { + "name": "osfp29" + }, + { + "name": "osfp30" + }, + { + "name": "osfp31" + }, + { + "name": "osfp32" + }, + { + "name": "osfp33" + }, + { + "name": "osfp34" + }, + { + "name": "osfp35" + }, + { + "name": "osfp36" + } + ] + }, + "interfaces": {} +} diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/platform_asic b/device/arista/x86_64-arista_7800r3a_36p_lc/platform_asic new file mode 120000 index 00000000000..d7f2af0da6d --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/platform_asic @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/platform_asic \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/platform_components.json b/device/arista/x86_64-arista_7800r3a_36p_lc/platform_components.json new file mode 100644 index 00000000000..b1eac87d541 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/platform_components.json @@ -0,0 +1,11 @@ +{ + "chassis": { + "7800R3A-36P-LC": { + "component": { + "Aboot()": {}, + "Scd(addr=0000:00:18.7)": {}, + "Scd(addr=0000:08:00.0)": {} + } + } + } +} diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/platform_env.conf b/device/arista/x86_64-arista_7800r3a_36p_lc/platform_env.conf new file mode 120000 index 00000000000..2a8441dd464 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/platform_env.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/platform_env.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/plugins b/device/arista/x86_64-arista_7800r3a_36p_lc/plugins new file mode 120000 index 00000000000..789a45fcace --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/pmon_daemon_control.json b/device/arista/x86_64-arista_7800r3a_36p_lc/pmon_daemon_control.json new file mode 120000 index 00000000000..51d5ab7b005 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-arista_common/pmon_daemon_control.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/sensors.conf b/device/arista/x86_64-arista_7800r3a_36p_lc/sensors.conf new file mode 120000 index 00000000000..49f4bf6df41 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/sensors.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/sensors.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/services.conf b/device/arista/x86_64-arista_7800r3a_36p_lc/services.conf new file mode 120000 index 00000000000..1ec553b5b61 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/services.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/services.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3a_36p_lc/startup-tsa-tsb.conf new file mode 120000 index 00000000000..ef5f019a633 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/startup-tsa-tsb.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/system_health_monitoring_config.json b/device/arista/x86_64-arista_7800r3a_36p_lc/system_health_monitoring_config.json new file mode 120000 index 00000000000..1185f771fa8 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/system_health_monitoring_config.json @@ -0,0 +1 @@ +../x86_64-arista_common/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/thermal_policy.json b/device/arista/x86_64-arista_7800r3a_36p_lc/thermal_policy.json new file mode 120000 index 00000000000..0991dc7f363 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/thermal_policy.json @@ -0,0 +1 @@ +../x86_64-arista_common/thermal_policy.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/use_pci_id_chassis b/device/arista/x86_64-arista_7800r3a_36p_lc/use_pci_id_chassis new file mode 120000 index 00000000000..617e3cf6958 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3a_36p_lc/use_pci_id_chassis @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/use_pci_id_chassis \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc b/device/arista/x86_64-arista_7800r3ak_36d2_lc deleted file mode 120000 index 50e843fb310..00000000000 --- a/device/arista/x86_64-arista_7800r3ak_36d2_lc +++ /dev/null @@ -1 +0,0 @@ -x86_64-arista_7800r3a_36d2_lc \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/Arista-7800R3AK-36D2-C36 b/device/arista/x86_64-arista_7800r3ak_36d2_lc/Arista-7800R3AK-36D2-C36 new file mode 120000 index 00000000000..d16ff236ec9 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/Arista-7800R3AK-36D2-C36 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3AK-36D2-C36 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/Arista-7800R3AK-36D2-C72 b/device/arista/x86_64-arista_7800r3ak_36d2_lc/Arista-7800R3AK-36D2-C72 new file mode 120000 index 00000000000..49b1d117184 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/Arista-7800R3AK-36D2-C72 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3AK-36D2-C72 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/Arista-7800R3AK-36D2-D36 b/device/arista/x86_64-arista_7800r3ak_36d2_lc/Arista-7800R3AK-36D2-D36 new file mode 120000 index 00000000000..49ae4e61ef5 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/Arista-7800R3AK-36D2-D36 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3AK-36D2-D36 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/asic.conf b/device/arista/x86_64-arista_7800r3ak_36d2_lc/asic.conf new file mode 120000 index 00000000000..0922baf5956 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/asic.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/asic.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/chassisdb.conf b/device/arista/x86_64-arista_7800r3ak_36d2_lc/chassisdb.conf new file mode 120000 index 00000000000..eb5e665396b --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/chassisdb.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/chassisdb.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/default_sku b/device/arista/x86_64-arista_7800r3ak_36d2_lc/default_sku new file mode 100644 index 00000000000..7605e566bf6 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/default_sku @@ -0,0 +1 @@ +Arista-7800R3AK-36D2-C72 t1 diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/media_settings.json b/device/arista/x86_64-arista_7800r3ak_36d2_lc/media_settings.json new file mode 120000 index 00000000000..bc7b4bb645f --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/media_settings.json @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/media_settings.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/pcie.yaml b/device/arista/x86_64-arista_7800r3ak_36d2_lc/pcie.yaml new file mode 120000 index 00000000000..ce2fa86b6b4 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/pcie.yaml @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/pcie.yaml \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform.json b/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform.json new file mode 100644 index 00000000000..965f8dbd94a --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform.json @@ -0,0 +1,140 @@ +{ + "chassis": { + "name": "7800R3AK-36D2-LC", + "components": [ + { + "name": "Aboot()" + }, + { + "name": "Scd(addr=0000:00:18.7)" + }, + { + "name": "Scd(addr=0000:08:00.0)" + } + ], + "fans": [], + "fan_drawers": [], + "psus": [], + "thermals": [ + { + "name": "Cpu temp sensor", + "controllable": false + }, + { + "name": "Cpu SBTSI", + "controllable": false + } + ], + "sfps": [ + { + "name": "osfp1" + }, + { + "name": "osfp2" + }, + { + "name": "osfp3" + }, + { + "name": "osfp4" + }, + { + "name": "osfp5" + }, + { + "name": "osfp6" + }, + { + "name": "osfp7" + }, + { + "name": "osfp8" + }, + { + "name": "osfp9" + }, + { + "name": "osfp10" + }, + { + "name": "osfp11" + }, + { + "name": "osfp12" + }, + { + "name": "osfp13" + }, + { + "name": "osfp14" + }, + { + "name": "osfp15" + }, + { + "name": "osfp16" + }, + { + "name": "osfp17" + }, + { + "name": "osfp18" + }, + { + "name": "osfp19" + }, + { + "name": "osfp20" + }, + { + "name": "osfp21" + }, + { + "name": "osfp22" + }, + { + "name": "osfp23" + }, + { + "name": "osfp24" + }, + { + "name": "osfp25" + }, + { + "name": "osfp26" + }, + { + "name": "osfp27" + }, + { + "name": "osfp28" + }, + { + "name": "osfp29" + }, + { + "name": "osfp30" + }, + { + "name": "osfp31" + }, + { + "name": "osfp32" + }, + { + "name": "osfp33" + }, + { + "name": "osfp34" + }, + { + "name": "osfp35" + }, + { + "name": "osfp36" + } + ] + }, + "interfaces": {} +} diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform_asic b/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform_asic new file mode 120000 index 00000000000..d7f2af0da6d --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform_asic @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/platform_asic \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform_components.json b/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform_components.json new file mode 100644 index 00000000000..645cf88333f --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform_components.json @@ -0,0 +1,11 @@ +{ + "chassis": { + "7800R3AK-36D2-LC": { + "component": { + "Aboot()": {}, + "Scd(addr=0000:00:18.7)": {}, + "Scd(addr=0000:08:00.0)": {} + } + } + } +} diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform_env.conf b/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform_env.conf new file mode 120000 index 00000000000..2a8441dd464 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform_env.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/platform_env.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/plugins b/device/arista/x86_64-arista_7800r3ak_36d2_lc/plugins new file mode 120000 index 00000000000..789a45fcace --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/pmon_daemon_control.json b/device/arista/x86_64-arista_7800r3ak_36d2_lc/pmon_daemon_control.json new file mode 120000 index 00000000000..51d5ab7b005 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-arista_common/pmon_daemon_control.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/sensors.conf b/device/arista/x86_64-arista_7800r3ak_36d2_lc/sensors.conf new file mode 120000 index 00000000000..49f4bf6df41 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/sensors.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/sensors.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/services.conf b/device/arista/x86_64-arista_7800r3ak_36d2_lc/services.conf new file mode 120000 index 00000000000..1ec553b5b61 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/services.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/services.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3ak_36d2_lc/startup-tsa-tsb.conf new file mode 120000 index 00000000000..ef5f019a633 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/startup-tsa-tsb.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/system_health_monitoring_config.json b/device/arista/x86_64-arista_7800r3ak_36d2_lc/system_health_monitoring_config.json new file mode 120000 index 00000000000..1185f771fa8 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/system_health_monitoring_config.json @@ -0,0 +1 @@ +../x86_64-arista_common/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/thermal_policy.json b/device/arista/x86_64-arista_7800r3ak_36d2_lc/thermal_policy.json new file mode 120000 index 00000000000..0991dc7f363 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/thermal_policy.json @@ -0,0 +1 @@ +../x86_64-arista_common/thermal_policy.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/use_pci_id_chassis b/device/arista/x86_64-arista_7800r3ak_36d2_lc/use_pci_id_chassis new file mode 120000 index 00000000000..617e3cf6958 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/use_pci_id_chassis @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/use_pci_id_chassis \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc b/device/arista/x86_64-arista_7800r3ak_36dm2_lc deleted file mode 120000 index 50e843fb310..00000000000 --- a/device/arista/x86_64-arista_7800r3ak_36dm2_lc +++ /dev/null @@ -1 +0,0 @@ -x86_64-arista_7800r3a_36d2_lc \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/Arista-7800R3AK-36DM2-C36 b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/Arista-7800R3AK-36DM2-C36 new file mode 120000 index 00000000000..34c2d621820 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/Arista-7800R3AK-36DM2-C36 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3AK-36DM2-C36 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/Arista-7800R3AK-36DM2-C72 b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/Arista-7800R3AK-36DM2-C72 new file mode 120000 index 00000000000..0d9df346d7c --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/Arista-7800R3AK-36DM2-C72 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3AK-36DM2-C72 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/Arista-7800R3AK-36DM2-D36 b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/Arista-7800R3AK-36DM2-D36 new file mode 120000 index 00000000000..470ba3961c4 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/Arista-7800R3AK-36DM2-D36 @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/Arista-7800R3AK-36DM2-D36 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/asic.conf b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/asic.conf new file mode 120000 index 00000000000..0922baf5956 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/asic.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/asic.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/chassisdb.conf b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/chassisdb.conf new file mode 120000 index 00000000000..eb5e665396b --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/chassisdb.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/chassisdb.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/default_sku b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/default_sku new file mode 100644 index 00000000000..dd5c11e5008 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/default_sku @@ -0,0 +1 @@ +Arista-7800R3AK-36DM2-C72 t1 diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/media_settings.json b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/media_settings.json new file mode 120000 index 00000000000..bc7b4bb645f --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/media_settings.json @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/media_settings.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/pcie.yaml b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/pcie.yaml new file mode 120000 index 00000000000..ce2fa86b6b4 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/pcie.yaml @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/pcie.yaml \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform.json b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform.json new file mode 100644 index 00000000000..7f54cb79887 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform.json @@ -0,0 +1,140 @@ +{ + "chassis": { + "name": "7800R3AK-36DM2-LC", + "components": [ + { + "name": "Aboot()" + }, + { + "name": "Scd(addr=0000:00:18.7)" + }, + { + "name": "Scd(addr=0000:08:00.0)" + } + ], + "fans": [], + "fan_drawers": [], + "psus": [], + "thermals": [ + { + "name": "Cpu temp sensor", + "controllable": false + }, + { + "name": "Cpu SBTSI", + "controllable": false + } + ], + "sfps": [ + { + "name": "osfp1" + }, + { + "name": "osfp2" + }, + { + "name": "osfp3" + }, + { + "name": "osfp4" + }, + { + "name": "osfp5" + }, + { + "name": "osfp6" + }, + { + "name": "osfp7" + }, + { + "name": "osfp8" + }, + { + "name": "osfp9" + }, + { + "name": "osfp10" + }, + { + "name": "osfp11" + }, + { + "name": "osfp12" + }, + { + "name": "osfp13" + }, + { + "name": "osfp14" + }, + { + "name": "osfp15" + }, + { + "name": "osfp16" + }, + { + "name": "osfp17" + }, + { + "name": "osfp18" + }, + { + "name": "osfp19" + }, + { + "name": "osfp20" + }, + { + "name": "osfp21" + }, + { + "name": "osfp22" + }, + { + "name": "osfp23" + }, + { + "name": "osfp24" + }, + { + "name": "osfp25" + }, + { + "name": "osfp26" + }, + { + "name": "osfp27" + }, + { + "name": "osfp28" + }, + { + "name": "osfp29" + }, + { + "name": "osfp30" + }, + { + "name": "osfp31" + }, + { + "name": "osfp32" + }, + { + "name": "osfp33" + }, + { + "name": "osfp34" + }, + { + "name": "osfp35" + }, + { + "name": "osfp36" + } + ] + }, + "interfaces": {} +} diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform_asic b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform_asic new file mode 120000 index 00000000000..d7f2af0da6d --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform_asic @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/platform_asic \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform_components.json b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform_components.json new file mode 100644 index 00000000000..0e7af8603d1 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform_components.json @@ -0,0 +1,11 @@ +{ + "chassis": { + "7800R3AK-36DM2-LC": { + "component": { + "Aboot()": {}, + "Scd(addr=0000:00:18.7)": {}, + "Scd(addr=0000:08:00.0)": {} + } + } + } +} diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform_env.conf b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform_env.conf new file mode 120000 index 00000000000..2a8441dd464 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform_env.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/platform_env.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/plugins b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/plugins new file mode 120000 index 00000000000..789a45fcace --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/pmon_daemon_control.json b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/pmon_daemon_control.json new file mode 120000 index 00000000000..51d5ab7b005 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-arista_common/pmon_daemon_control.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/sensors.conf b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/sensors.conf new file mode 120000 index 00000000000..49f4bf6df41 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/sensors.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/sensors.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/services.conf b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/services.conf new file mode 120000 index 00000000000..1ec553b5b61 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/services.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/services.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/startup-tsa-tsb.conf new file mode 120000 index 00000000000..ef5f019a633 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/startup-tsa-tsb.conf @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/system_health_monitoring_config.json b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/system_health_monitoring_config.json new file mode 120000 index 00000000000..1185f771fa8 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/system_health_monitoring_config.json @@ -0,0 +1 @@ +../x86_64-arista_common/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/thermal_policy.json b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/thermal_policy.json new file mode 120000 index 00000000000..0991dc7f363 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/thermal_policy.json @@ -0,0 +1 @@ +../x86_64-arista_common/thermal_policy.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/use_pci_id_chassis b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/use_pci_id_chassis new file mode 120000 index 00000000000..617e3cf6958 --- /dev/null +++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/use_pci_id_chassis @@ -0,0 +1 @@ +../x86_64-arista_7800r3a_36d2_lc/use_pci_id_chassis \ No newline at end of file diff --git a/device/arista/x86_64-arista_common/pmon_daemon_control_linecard.json b/device/arista/x86_64-arista_common/pmon_daemon_control_linecard.json index e31cf596f38..a5d08afdc36 100644 --- a/device/arista/x86_64-arista_common/pmon_daemon_control_linecard.json +++ b/device/arista/x86_64-arista_common/pmon_daemon_control_linecard.json @@ -1,5 +1,6 @@ { "skip_fancontrol": true, - "skip_pcied": true + "skip_pcied": true, + "enable_xcvrd_sff_mgr": true } diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b27/broadcom-sonic-td3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b27/broadcom-sonic-td3.config.bcm new file mode 100644 index 00000000000..18009ef9f3e --- /dev/null +++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b27/broadcom-sonic-td3.config.bcm @@ -0,0 +1,9 @@ +[Low Inheritance Precedence] +mem_cache_enable=1 +l3_mem_entries=16384 +l3_alpm_enable=0 +riot_enable=0 +l2xmsg_mode=1 +l2_mem_entries=32768 +lpm_scaling_enable=0 +ipv6_lpm_128b_enable=0x1 \ No newline at end of file diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b37/broadcom-sonic-td3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b37/broadcom-sonic-td3.config.bcm new file mode 100644 index 00000000000..574ba37ba09 --- /dev/null +++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b37/broadcom-sonic-td3.config.bcm @@ -0,0 +1,25 @@ +[Low Inheritance Precedence] +sai_tunnel_support=1 +flow_init_mode=1 +riot_enable=1 +vlan_xlate_1_mem_entries=16384 +vlan_xlate_2_mem_entries=2048 +mem_cache_enable=1 +sai_load_hw_config=/usr/lib/cancun/ +l2_entry_used_as_my_station=1 +core_clock_frequency=893 +use_all_splithorizon_groups=1 +riot_overlay_l3_intf_mem_size=4096 +riot_overlay_l3_egress_mem_size=8192 +l3_ecmp_levels=2 +riot_overlay_ecmp_resilient_hash_size=16384 +mpls_mem_entries=2048 +sai_fast_convergence_support=1 +bcm_num_cos=8 +sai_brcm_sonic_trap_group=1 +host_as_route_disable=1 +multi_hash_recurse_depth_l3=6 +sai_stats_support_mask=0x1 + +# CPU Tx HW replication +sai_hostif_netif_iff_up_set=1 diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b77/broadcom-sonic-td3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b77/broadcom-sonic-td3.config.bcm index 9dc71f839d1..0f71fda2432 100644 --- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b77/broadcom-sonic-td3.config.bcm +++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b77/broadcom-sonic-td3.config.bcm @@ -1,12 +1,32 @@ -mem_cache_enable=0 +[Low Inheritance Precedence] +mem_cache_enable=1 +flow_init_mode=1 +mpls_mem_entries=16384 +vlan_xlate_1_mem_entries=65536 +vlan_xlate_2_mem_entries=16384 +riot_enable=1 ifp_inports_support_enable=1 ipv6_lpm_128b_enable=0x1 l3_max_ecmp_mode=1 lpm_scaling_enable=0 bcm_num_cos=10 -default_cpu_tx_queue=9 mmu_lossless=0 host_as_route_disable=1 sai_eapp_config_file=/etc/broadcom/eapps_cfg.json sai_fast_convergence_support=1 -flow_init_mode=1 +sai_load_hw_config=/usr/lib/cancun/ +sai_nbr_bcast_ifp_optimized=1 +sai_brcm_sonic_acl_enhancements=1 +# Reduced Trap Group QSET for BRCM Sonic +sai_brcm_sonic_trap_group=1 +l2_entry_used_as_my_station=1 +multi_hash_recurse_depth_l3=3 +sai_stats_support_mask=0x1 + +#l3 common setting +riot_overlay_ecmp_resilient_hash_size=16384 +riot_overlay_l3_egress_mem_size=32768 +riot_overlay_l3_intf_mem_size=8192 + +l3_alpm_ipv6_128b_bkt_rsvd=1 +l3_ecmp_levels=2 diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b78/broadcom-sonic-td4.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b78/broadcom-sonic-td4.config.bcm new file mode 100644 index 00000000000..55f78671c2e --- /dev/null +++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b78/broadcom-sonic-td4.config.bcm @@ -0,0 +1,19 @@ +[Low Inheritance Precedence] +sai_tunnel_support: 1 +riot_enable: 1 +pktio_mode: 1 +vlan_flooding_l2mc_num_reserved: 0 +shared_block_mask_section: uc_bc +ctr_evict_enable: 0 +sai_brcm_sonic_acl_enhancements: 1 +sai_field_group_auto_prioritize: 1 +sai_modify_hash_flexdigest: 1 +sai_fast_convergence_support: 1 +sai_port_queue_ecn_counter: 1 +l2_table_default_view: 1 +flexctr_action_reserved_ipmc_hitbit: 1 +default_cpu_tx_queue: 7 +max_vp_lags: 1024 +multi_network_groups: 1 +bcm_tunnel_term_compatible_mode: 1 +use_all_splithorizon_groups: 1 \ No newline at end of file diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b85/broadcom-sonic-td2.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b85/broadcom-sonic-td2.config.bcm index 01d767530da..3093c2fce14 100644 --- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b85/broadcom-sonic-td2.config.bcm +++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b85/broadcom-sonic-td2.config.bcm @@ -1,6 +1,10 @@ +[Low Inheritance Precedence] mmu_lossless=0 #PTP -num_queues_pci=24 +num_queues_pci=30 num_queues_uc0=1 num_queues_uc1=19 sai_fast_convergence_support=1 +sai_nbr_bcast_ifp_optimized=1 +# Reduced Trap Group QSET for BRCM Sonic +sai_brcm_sonic_trap_group=1 \ No newline at end of file diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm index 1439c8d875a..84cc04f9e29 100644 --- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm +++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm @@ -1,8 +1,53 @@ -mem_cache_enable=0 +[Low Inheritance Precedence] +mem_cache_enable=1 +mpls_mem_entries=16384 +vlan_xlate_1_mem_entries=65536 +vlan_xlate_2_mem_entries=16384 +flow_init_mode=1 +sai_tunnel_support=1 ifp_inports_support_enable=1 ipv6_lpm_128b_enable=0x1 l3_max_ecmp_mode=1 lpm_scaling_enable=0 bcm_num_cos=10 -default_cpu_tx_queue=9 mmu_lossless=0 +sai_nbr_bcast_ifp_optimized=1 +l2_entry_used_as_my_station=1 +multi_hash_recurse_depth_l3=3 +# Drop monitor and IFA configuration +flowtracker_enable=2 +flowtracker_max_flows=48000 +flowtracker_drop_monitor_enable=1 +flowtracker_export_interval_usecs=1000000 +flowtracker_max_export_pkt_length=9000 +flowtracker_fsp_reinject_max_length=128 +host_as_route_disable=1 +num_queues_pci=46 +num_queues_uc0=1 +num_queues_uc1=1 +sai_eapp_config_file=/etc/broadcom/eapps_cfg.json +ifa_enable=1 +sai_load_hw_config=/usr/lib/cancun/ +sai_fast_convergence_support=1 +sai_brcm_sonic_acl_enhancements=1 +# Reduced Trap Group QSET for BRCM Sonic +sai_brcm_sonic_trap_group=1 +sai_stats_support_mask=0x1 + +# MMU Lossless configurations +sai_optimized_mmu=1 +sai_mmu_tc_to_pg_config=1 +buf.map.egress_pool0.ingress_pool=0 +buf.map.egress_pool1.ingress_pool=0 +buf.map.egress_pool2.ingress_pool=1 + +#Tunnels +use_all_splithorizon_groups=1 +bcm_tunnel_term_compatible_mode=1 + +#RIOT Enable +riot_enable=1 +riot_overlay_l3_intf_mem_size=8192 +riot_overlay_l3_egress_mem_size=32768 +l3_ecmp_levels=2 +riot_overlay_ecmp_resilient_hash_size=16384 \ No newline at end of file diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b88/broadcom-sonic-td4.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b88/broadcom-sonic-td4.config.bcm new file mode 100644 index 00000000000..39d8492228f --- /dev/null +++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b88/broadcom-sonic-td4.config.bcm @@ -0,0 +1,18 @@ +[Low Inheritance Precedence] +sai_tunnel_support: 1 +l2_table_default_view: 1 +riot_enable: 1 +pktio_mode: 1 +vlan_flooding_l2mc_num_reserved: 0 +shared_block_mask_section: uc_bc +ctr_evict_enable: 0 +sai_brcm_sonic_acl_enhancements: 1 +sai_field_group_auto_prioritize: 1 +sai_modify_hash_flexdigest: 1 +sai_fast_convergence_support: 1 +sai_port_queue_ecn_counter: 1 +flexctr_action_reserved_ipmc_hitbit: 1 +default_cpu_tx_queue: 7 +multi_network_groups: 1 +bcm_tunnel_term_compatible_mode: 1 +use_all_splithorizon_groups: 1 \ No newline at end of file diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b96/broadcom-sonic-th.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b96/broadcom-sonic-th.config.bcm index e8b5b7d8851..48c1330831e 100644 --- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b96/broadcom-sonic-th.config.bcm +++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b96/broadcom-sonic-th.config.bcm @@ -1,9 +1,13 @@ +[Low Inheritance Precedence] mmu_lossless=0 bcm_num_cos=10 default_cpu_tx_queue=9 #PTP -num_queues_pci=24 +num_queues_pci=30 num_queues_uc0=1 num_queues_uc1=1 sai_fast_convergence_support=1 - +sai_nbr_bcast_ifp_optimized=1 +# Reduced Trap Group QSET for BRCM Sonic +sai_brcm_sonic_trap_group=1 +sai_stats_support_mask=0x1 \ No newline at end of file diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b97/broadcom-sonic-th2.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b97/broadcom-sonic-th2.config.bcm index 039932b58f2..b9c9474190d 100644 --- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b97/broadcom-sonic-th2.config.bcm +++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b97/broadcom-sonic-th2.config.bcm @@ -1,5 +1,8 @@ -schan_intr_enable=0 +[Low Inheritance Precedence] l2xmsg_mode=1 +max_vp_lags=0 +flow_init_mode=1 +schan_intr_enable=0 mmu_lossless=0 arl_clean_timeout_usec=15000000 asf_mem_profile=2 @@ -9,12 +12,10 @@ cdma_timeout_usec=15000000 dma_desc_timeout_usec=15000000 ipv6_lpm_128b_enable=1 lpm_scaling_enable=0 -max_vp_lags=0 miim_intr_enable=0 module_64ports=1 oversubscribe_mode=1 bcm_num_cos=10 -default_cpu_tx_queue=9 # Drop monitor configuration flowtracker_enable=2 flowtracker_max_flows=48000 @@ -22,10 +23,12 @@ flowtracker_drop_monitor_enable=1 flowtracker_export_interval_usecs=1000000 flowtracker_max_export_pkt_length=9000 flowtracker_fsp_reinject_max_length=128 -flow_init_mode=1 num_queues_pci=46 num_queues_uc0=1 num_queues_uc1=1 sai_eapp_config_file=/etc/broadcom/eapps_cfg.json sai_fast_convergence_support=1 - +sai_nbr_bcast_ifp_optimized=1 +# Reduced Trap Group QSET for BRCM Sonic +sai_brcm_sonic_trap_group=1 +sai_stats_support_mask=0x1 \ No newline at end of file diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b98/broadcom-sonic-th3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b98/broadcom-sonic-th3.config.bcm index 460fb5186b4..4dad54ceb1a 100644 --- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b98/broadcom-sonic-th3.config.bcm +++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b98/broadcom-sonic-th3.config.bcm @@ -1,10 +1,12 @@ +[Low Inheritance Precedence] +l2xmsg_mode.0=1 +flow_init_mode=1 phy_null=1 pll_bypass=1 core_clock_frequency=1325 dpr_clock_frequency=1000 device_clock_frequency=1325 port_flex_enable=1 -l2xmsg_mode.0=1 mmu_port_num_mc_queue.0=1 module_64ports.0=1 multicast_l2_range.0=511 @@ -19,10 +21,14 @@ flowtracker_drop_monitor_enable=1 flowtracker_export_interval_usecs=1000000 flowtracker_max_export_pkt_length=9000 flowtracker_fsp_reinject_max_length=128 -flow_init_mode=1 num_queues_pci=46 num_queues_uc0=1 num_queues_uc1=1 sai_eapp_config_file=/etc/broadcom/eapps_cfg.json sai_fast_convergence_support=1 +sai_nbr_bcast_ifp_optimized=1 +# Reduced Trap Group QSET for BRCM Sonic +sai_brcm_sonic_trap_group=1 +# MMU Lossless configurations +sai_optimized_mmu=1 \ No newline at end of file diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b99/broadcom-sonic-th4.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b99/broadcom-sonic-th4.config.bcm new file mode 100644 index 00000000000..90954d6332f --- /dev/null +++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b99/broadcom-sonic-th4.config.bcm @@ -0,0 +1,19 @@ +[Low Inheritance Precedence] +sai_tunnel_support: 2 +#System Configs +pktio_mode: 1 +pfc_deadlock_seq_control : 1 +default_cpu_tx_queue: 7 +vlan_flooding_l2mc_num_reserved: 0 +shared_block_mask_section: uc_bc + +#L3 Configs +ipv6_lpm_128b_enable: 1 +skip_protocol_default_entries: 1 +l3_alpm_template: 1 +l3_alpm_hit_skip: 1 +l3_ecmp_member_first_lkup_mem_size: 12288 +l3_intf_vlan_split_egress : 1 +bcm_tunnel_term_compatible_mode: 1 +sai_field_group_auto_prioritize: 1 +sai_port_queue_ecn_counter: 1 diff --git a/device/celestica/x86_64-cel_midstone-r0/platform_asic b/device/celestica/x86_64-cel_midstone-r0/platform_asic index 84083a7415d..a657472d7ad 100644 --- a/device/celestica/x86_64-cel_midstone-r0/platform_asic +++ b/device/celestica/x86_64-cel_midstone-r0/platform_asic @@ -1 +1 @@ -innovium +marvell-teralynx diff --git a/device/delta/x86_64-delta_agc032-r0/platform_asic b/device/delta/x86_64-delta_agc032-r0/platform_asic index 84083a7415d..a657472d7ad 100644 --- a/device/delta/x86_64-delta_agc032-r0/platform_asic +++ b/device/delta/x86_64-delta_agc032-r0/platform_asic @@ -1 +1 @@ -innovium +marvell-teralynx diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.md5 new file mode 100644 index 00000000000..b9aabeb8706 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.md5 @@ -0,0 +1 @@ +e48527ad3f7bc5db09ec1fe078eba9a1 \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.xml new file mode 100644 index 00000000000..80434c00be6 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.xml @@ -0,0 +1,3990 @@ + + + + + + std-string + string + standard string. + 1 + 100 + + + board-callback-type + enumeration + Specifies os/ext drv callback types. + + linux-static + Linux Static + 0 + + + linux-shared + Linux Shared Lib mode + 1 + + + external + External Os + 3 + + + freeBsd + Free BSD + 4 + + + + board-pp-map-type + enumeration + Specifies pci info types. + + fixed + Fixed + 0 + + + autoscan + Auto scan + 1 + + + + board-pp-interface-channel-type + enumeration + Specifies channel interface type. + + pci + PCI + 0 + + + smi + SMI + 1 + + + twsi + TWSI + 2 + + + + board-pp-as-type + enumeration + Specifies Address space type. + + 4_regions + address-space 4 regions + 0 + + + 8_regions + address-space 8 regions + 1 + + + atu + address translation unit + 2 + + + + device-id-type + uint32 + Device ID 0..1 + 0 + 1 + + + port-mapping-type + enumeration + Specifies port map type. + + ethernet_mac + ETHERNET_MAC + 0 + + + cpu_sdma + CPU_SDMA + 1 + + + + interface-num-type + uint32 + Interface number + 0 + 1023 + + + txq-port-number-type + uint32 + TXq port number + 0 + 99 + + + phy-smi-interface-type + uint32 + Phy SMI interface type. + 0 + 3 + + + phy-xsmi-interface-type + uint32 + Phy XSMI interface type. + 0 + 15 + + + phy-type + enumeration + Specifies the PHY Part Identifier. + + NA + No Phy + 0 + + + alaska-88E1680 + Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G. + 1 + + + alaska-88E1780 + Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy +Efficient Ethernet Transceiver + 2 + + + alaska-88E2540 + Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet +Transceiver with IEEE 1588v2 PTP Support + 3 + + + alaska-88E2580 + Specifies PHY identifier 88E2580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver +with IEEE 1588v2 PTP Support + 4 + + + alaska-88E2780 + Specifies PHY identifier 88E2780, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver +with IEEE 1588v2 PTP Support + 5 + + + + physical-port-num-type + uint32 + PHYSICAL PORT NUM + 0 + 1023 + + + led-stream-port-type + enumeration + Specifies the ledstream port type. + + PORT_TYPE_TRI_SPEED + tri-speed port. + 1 + + + PORT_TYPE_XG + XG port. + 2 + + + + led-stream-blink-select-type + enumeration + Specifies the LED stream blink select type. + + BLINK_SELECT_0 + Blink 0 signal. + 1 + + + BLINK_SELECT_1 + Blink 1 signal + 2 + + + + led-stream-order-mode-type + enumeration + Specifies the LED stream ordering mode. + + ORDER_MODE_BY_PORT + the indication order is arranged by port. + 1 + + + ORDER_MODE_BY_CLASS + the indication order is arranged by class. + 2 + + + + led-stream-blink-duty-cycle-type + enumeration + Specifies the LED stream blink cycle duty cycle type. + + BLINK_DUTY_CYCLE_0 + 25% on, 75% off. + 1 + + + BLINK_DUTY_CYCLE_1 + 50% on, 50% off. + 2 + + + BLINK_DUTY_CYCLE_2 + 50% on, 50% off. + 3 + + + BLINK_DUTY_CYCLE_3 + 75% on, 25% off. + 4 + + + + led-stream-blink-duration-type + enumeration + Specifies the LED stream blink period type. + + BLINK_DURATION_0 + BLINK_DURATION_0. + 1 + + + BLINK_DURATION_1 + BLINK_DURATION_1. + 2 + + + BLINK_DURATION_2 + BLINK_DURATION_2. + 3 + + + BLINK_DURATION_3 + BLINK_DURATION_3. + 4 + + + BLINK_DURATION_4 + BLINK_DURATION_4. + 5 + + + BLINK_DURATION_5 + BLINK_DURATION_5. + 6 + + + BLINK_DURATION_6 + (APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) . + 7 + + + BLINK_DURATION_7 + APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe). + 8 + + + + led-stream-pulse-stretch-type + enumeration + Specifies the LED stream length of stretching for dynamic signals. + + PULSE_STRETCH_0_NO + PULSE_STRETCH_0_NO. + 1 + + + PULSE_STRETCH_1 + PULSE_STRETCH_1. + 2 + + + PULSE_STRETCH_2 + PULSE_STRETCH_2. + 3 + + + PULSE_STRETCH_3 + PULSE_STRETCH_3. + 4 + + + PULSE_STRETCH_4 + PULSE_STRETCH_4. + 5 + + + PULSE_STRETCH_5 + PULSE_STRETCH_5. + 6 + + + PULSE_STRETCH_6 + (APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe). + 7 + + + PULSE_STRETCH_7 + (APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe). + 8 + + + + led-stream-clock-out-frequency-type + enumeration + Specifies the LED stream blink cycle duty cycle type. + + _CLOCK_OUT_FREQUENCY_500 + 500 KHz LED clock frequency. + 1 + + + CLOCK_OUT_FREQUENCY_1000 + 1 MHz LED clock frequency. + 2 + + + CLOCK_OUT_FREQUENCY_2000 + 2 MHz LED clock frequency. + 3 + + + CLOCK_OUT_FREQUENCY_3000 + 3 MHz LED clock frequency. + 4 + + + + led-stream-class5-select-type + enumeration + Specifies the LED stream indication displayed on class5 (for dual-media port/phy). + + CLASS_5_SELECT_HALF_DUPLEX + Half Duplex is displayed on class5. + 1 + + + CLASS_5_SELECT_FIBER_LINK_UP + If port is a dual media port, Fiber Link Up is displayed on class5. + 2 + + + + led-stream-class13-select-type + enumeration + Specifies the LED stream indication displayed on class13 (for dual-media port/phy). + + CLASS_13_SELECT_LINK_DOWN + Link Down is displayed on class13. + 1 + + + CLASS_13_SELECT_COPPER_LINK_UP + If port is a dual media port, Copper Link Up is displayed on class13. + 2 + + + + led-class-num-type + uint32 + Led Class number + 0 + 11 + + + boolean-type + enumeration + Boolean 32 bits , due to bing endian + + false + False + 0 + + + true + True + 1 + + + + bus-id-type + uint32 + Bus Id Type, PCI/SMI + 0 + 255 + + + function-id-type + uint32 + Function Id Type, PCI/SMI + 0 + 255 + + + domain-type + uint32 + Domain, PCI/SMI + 0 + 255 + + + led-interface-type + uint32 + Led interface + 0 + 255 + + + led-position-type + uint32 + Led position + 0 + 63 + + + serdes-lane-type + uint32 + serdes lane + 0 + 7 + + + cpu-type + enumeration + The CPU Internal/External + + external + Extrenal connected CPU + 0 + + + internal + Internal CPU + 1 + + + + led-stream-clock-frequency-type + uint32 + Led Clock Frequency Sip6 + 500 + 80000 + + + led-unit-type + uint32 + Led units + 1 + 16 + + + led-unit-or-no-unit-type + uint32 + Led units, 0 for no Unit + 0 + 16 + + + led-group-type + uint32 + Led Group + 0 + 1 + + + led-stream-force-data-type + string + A hexadecimal string with octets represented as hex digits +separated by colons. The canonical representation uses +lowercase characters. + 3 + 11 + + + bit-type + uint32 + Bit range 0..31 + 0 + 31 + + + bit-size-type + uint32 + Bit leng 1..32 + 1 + 32 + + + led-sip-type + enumeration + The LED scehme + + na + NA + 0 + + + sip5 + SIP5: AC3x + 5 + + + sip6 + SIP6: Falcon, AC5x + 6 + + + + port-cscd-type + enumeration + Specifies the cascade port type. + + DSA_1_WORD + DSA Regular + 0 + + + DSA_2_WORDS + DSA Extended + 1 + + + NETWORK + Network. + 2 + + + DSA_3_WORDS + DSA 3 Words + 3 + + + DSA_4_WORD + DSA 4 Words + 4 + + + + trunk-cscd-type + uint32 + Specifies the Cascade Trunk id. + 0 + 127 + + + port-trunk-cscd-type + enumeration + Specifies the cascade port type. + + cscdPort + Cascade port + 0 + + + cscdTrunk + Csacde trunk + 1 + + + + hash-cscd-type + enumeration + Specifies the hash used by cascade trunk. + + pkt + Hash based on packet + 0 + + + srcPort + Hash based on source port + 1 + + + + asic-type + enumeration + ASIC Type + + ASIC_AC3X + AC3X + 0 + + + ASIC_AC5X + AC5X + 1 + + + ASIC_Falcon + FALCON + 2 + + + + mpp-num-type + uint8 + Specifies the MPP pin number. + 0 + 63 + + + mpp-select-type + uint8 + Specifies the MPP pin value. + 0 + 15 + + + ASIC_Falcon + Falcon-3.2T-128x25G + linux-static + linux-static + autoscan + external + pci + atu + + 0 + 0 + ASK-PP-F3_2T-128x25G.xml + ASK-L1-F3_2T-128x25G.xml + sip6 + + 0 + + ethernet_mac + 0 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 1 + + ethernet_mac + 1 + false + + + NA + + + + false + + + + 2 + + ethernet_mac + 2 + false + + + NA + + + + false + + + + 3 + + ethernet_mac + 3 + false + + + NA + + + + false + + + + 4 + + ethernet_mac + 4 + false + + + NA + + + + + 2 + true + + false + + + + 5 + + ethernet_mac + 5 + false + + + NA + + + + false + + + + 6 + + ethernet_mac + 6 + false + + + NA + + + + false + + + + 7 + + ethernet_mac + 7 + false + + + NA + + + + false + + + + 8 + + ethernet_mac + 8 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 9 + + ethernet_mac + 9 + false + + + NA + + + + + 2 + true + + false + + + + 10 + + ethernet_mac + 10 + false + + + NA + + + + + 2 + true + + false + + + + 11 + + ethernet_mac + 11 + false + + + NA + + + + + 2 + true + + false + + + + 12 + + ethernet_mac + 12 + false + + + NA + + + + + 2 + true + + false + + + + 13 + + ethernet_mac + 13 + false + + + NA + + + + + 2 + true + + false + + + + 14 + + ethernet_mac + 14 + false + + + NA + + + + + 2 + true + + false + + + + 15 + + ethernet_mac + 15 + false + + + NA + + + + + 2 + true + + false + + + + 16 + + ethernet_mac + 16 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 17 + + ethernet_mac + 17 + false + + + NA + + + + + 2 + true + + false + + + + 18 + + ethernet_mac + 18 + false + + + NA + + + + + 2 + true + + false + + + + 19 + + ethernet_mac + 19 + false + + + NA + + + + + 2 + true + + false + + + + 20 + + ethernet_mac + 20 + false + + + NA + + + + + 2 + true + + false + + + + 21 + + ethernet_mac + 21 + false + + + NA + + + + + 2 + true + + false + + + + 22 + + ethernet_mac + 22 + false + + + NA + + + + + 2 + true + + false + + + + 23 + + ethernet_mac + 23 + false + + + NA + + + + + 2 + true + + false + + + + 24 + + ethernet_mac + 24 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 25 + + ethernet_mac + 25 + false + + + NA + + + + + 2 + true + + false + + + + 26 + + ethernet_mac + 26 + false + + + NA + + + + + 2 + true + + false + + + + 27 + + ethernet_mac + 27 + false + + + NA + + + + + 2 + true + + false + + + + 28 + + ethernet_mac + 28 + false + + + NA + + + + + 2 + true + + false + + + + 29 + + ethernet_mac + 29 + false + + + NA + + + + + 2 + true + + false + + + + 30 + + ethernet_mac + 30 + false + + + NA + + + + + 2 + true + + false + + + + 31 + + ethernet_mac + 31 + false + + + NA + + + + + 2 + true + + false + + + + 32 + + ethernet_mac + 32 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 33 + + ethernet_mac + 33 + false + + + NA + + + + + 2 + true + + false + + + + 34 + + ethernet_mac + 34 + false + + + NA + + + + + 2 + true + + false + + + + 35 + + ethernet_mac + 35 + false + + + NA + + + + + 2 + true + + false + + + + 36 + + ethernet_mac + 36 + false + + + NA + + + + + 2 + true + + false + + + + 37 + + ethernet_mac + 37 + false + + + NA + + + + + 2 + true + + false + + + + 38 + + ethernet_mac + 38 + false + + + NA + + + + + 2 + true + + false + + + + 39 + + ethernet_mac + 39 + false + + + NA + + + + + 2 + true + + false + + + + 40 + + ethernet_mac + 40 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 41 + + ethernet_mac + 41 + false + + + NA + + + + + 2 + true + + false + + + + 42 + + ethernet_mac + 42 + false + + + NA + + + + + 2 + true + + false + + + + 43 + + ethernet_mac + 43 + false + + + NA + + + + + 2 + true + + false + + + + 44 + + ethernet_mac + 44 + false + + + NA + + + + + 2 + true + + false + + + + 45 + + ethernet_mac + 45 + false + + + NA + + + + + 2 + true + + false + + + + 46 + + ethernet_mac + 46 + false + + + NA + + + + + 2 + true + + false + + + + 47 + + ethernet_mac + 47 + false + + + NA + + + + + 2 + true + + false + + + + 48 + + ethernet_mac + 48 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 49 + + ethernet_mac + 49 + false + + + NA + + + + + 2 + true + + false + + + + 50 + + ethernet_mac + 50 + false + + + NA + + + + + 2 + true + + false + + + + 51 + + ethernet_mac + 51 + false + + + NA + + + + + 2 + true + + false + + + + 52 + + ethernet_mac + 52 + false + + + NA + + + + + 2 + true + + false + + + + 53 + + ethernet_mac + 53 + false + + + NA + + + + + 2 + true + + false + + + + 54 + + ethernet_mac + 54 + false + + + NA + + + + + 2 + true + + false + + + + 55 + + ethernet_mac + 55 + false + + + NA + + + + + 2 + true + + false + + + + 56 + + ethernet_mac + 56 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 57 + + ethernet_mac + 57 + false + + + NA + + + + + 2 + true + + false + + + + 58 + + ethernet_mac + 58 + false + + + NA + + + + + 2 + true + + false + + + + 59 + + ethernet_mac + 59 + false + + + NA + + + + + 2 + true + + false + + + + 60 + + ethernet_mac + 60 + false + + + NA + + + + + 2 + true + + false + + + + 64 + + ethernet_mac + 61 + false + + + NA + + + + + 2 + true + + false + + + + 65 + + ethernet_mac + 62 + false + + + NA + + + + + 2 + true + + false + + + + 66 + + ethernet_mac + 63 + false + + + NA + + + + + 2 + true + + false + + + + 67 + + ethernet_mac + 64 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 68 + + ethernet_mac + 65 + false + + + NA + + + + + 2 + true + + false + + + + 69 + + ethernet_mac + 66 + false + + + NA + + + + + 2 + true + + false + + + + 70 + + ethernet_mac + 67 + false + + + NA + + + + + 2 + true + + false + + + + 130 + + ethernet_mac + 127 + false + + + NA + + + + + 2 + true + + false + + + + 129 + + ethernet_mac + 126 + false + + + NA + + + + + 2 + true + + false + + + + 128 + + ethernet_mac + 125 + false + + + NA + + + + + 2 + true + + false + + + + 127 + + ethernet_mac + 124 + false + + + NA + + + + + 2 + true + + false + + + + 126 + + ethernet_mac + 123 + false + + + NA + + + + + 2 + true + + false + + + + 125 + + ethernet_mac + 122 + false + + + NA + + + + + 2 + true + + false + + + + 124 + + ethernet_mac + 121 + false + + + NA + + + + + 2 + true + + false + + + + 123 + + ethernet_mac + 120 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 122 + + ethernet_mac + 119 + false + + + NA + + + + + 2 + true + + false + + + + 121 + + ethernet_mac + 118 + false + + + NA + + + + + 2 + true + + false + + + + 120 + + ethernet_mac + 117 + false + + + NA + + + + + 2 + true + + false + + + + 119 + + ethernet_mac + 116 + false + + + NA + + + + + 2 + true + + false + + + + 118 + + ethernet_mac + 115 + false + + + NA + + + + + 2 + true + + false + + + + 117 + + ethernet_mac + 114 + false + + + NA + + + + + 2 + true + + false + + + + 116 + + ethernet_mac + 113 + false + + + NA + + + + + 2 + true + + false + + + + 115 + + ethernet_mac + 112 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 114 + + ethernet_mac + 111 + false + + + NA + + + + + 2 + true + + false + + + + 113 + + ethernet_mac + 110 + false + + + NA + + + + + 2 + true + + false + + + + 112 + + ethernet_mac + 109 + false + + + NA + + + + + 2 + true + + false + + + + 111 + + ethernet_mac + 108 + false + + + NA + + + + + 2 + true + + false + + + + 110 + + ethernet_mac + 107 + false + + + NA + + + + + 2 + true + + false + + + + 109 + + ethernet_mac + 106 + false + + + NA + + + + + 2 + true + + false + + + + 108 + + ethernet_mac + 105 + false + + + NA + + + + + 2 + true + + false + + + + 107 + + ethernet_mac + 104 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 106 + + ethernet_mac + 103 + false + + + NA + + + + + 2 + true + + false + + + + 105 + + ethernet_mac + 102 + false + + + NA + + + + + 2 + true + + false + + + + 104 + + ethernet_mac + 101 + false + + + NA + + + + + 2 + true + + false + + + + 103 + + ethernet_mac + 100 + false + + + NA + + + + + 2 + true + + false + + + + 102 + + ethernet_mac + 99 + false + + + NA + + + + + 2 + true + + false + + + + 101 + + ethernet_mac + 98 + false + + + NA + + + + + 2 + true + + false + + + + 100 + + ethernet_mac + 97 + false + + + NA + + + + + 2 + true + + false + + + + 99 + + ethernet_mac + 96 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 98 + + ethernet_mac + 95 + false + + + NA + + + + + 2 + true + + false + + + + 97 + + ethernet_mac + 94 + false + + + NA + + + + + 2 + true + + false + + + + 96 + + ethernet_mac + 93 + false + + + NA + + + + + 2 + true + + false + + + + 95 + + ethernet_mac + 92 + false + + + NA + + + + + 2 + true + + false + + + + 94 + + ethernet_mac + 91 + false + + + NA + + + + + 2 + true + + false + + + + 93 + + ethernet_mac + 90 + false + + + NA + + + + + 2 + true + + false + + + + 92 + + ethernet_mac + 89 + false + + + NA + + + + + 2 + true + + false + + + + 91 + + ethernet_mac + 88 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 90 + + ethernet_mac + 87 + false + + + NA + + + + + 2 + true + + false + + + + 89 + + ethernet_mac + 86 + false + + + NA + + + + + 2 + true + + false + + + + 88 + + ethernet_mac + 85 + false + + + NA + + + + + 2 + true + + false + + + + 87 + + ethernet_mac + 84 + false + + + NA + + + + + 2 + true + + false + + + + 86 + + ethernet_mac + 83 + false + + + NA + + + + + 2 + true + + false + + + + 85 + + ethernet_mac + 82 + false + + + NA + + + + + 2 + true + + false + + + + 84 + + ethernet_mac + 81 + false + + + NA + + + + + 2 + true + + false + + + + 83 + + ethernet_mac + 80 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 82 + + ethernet_mac + 79 + false + + + NA + + + + + 2 + true + + false + + + + 81 + + ethernet_mac + 78 + false + + + NA + + + + + 2 + true + + false + + + + 80 + + ethernet_mac + 77 + false + + + NA + + + + + 2 + true + + false + + + + 79 + + ethernet_mac + 76 + false + + + NA + + + + + 2 + true + + false + + + + 78 + + ethernet_mac + 75 + false + + + NA + + + + + 2 + true + + false + + + + 77 + + ethernet_mac + 74 + false + + + NA + + + + + 2 + true + + false + + + + 76 + + ethernet_mac + 73 + false + + + NA + + + + + 2 + true + + false + + + + 75 + + ethernet_mac + 72 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 74 + + ethernet_mac + 71 + false + + + NA + + + + + 2 + true + + false + + + + 73 + + ethernet_mac + 70 + false + + + NA + + + + + 2 + true + + false + + + + 72 + + ethernet_mac + 69 + false + + + NA + + + + + 2 + true + + false + + + + 71 + + ethernet_mac + 68 + false + + + NA + + + + + 2 + true + + false + + + + 131 + + ethernet_mac + 128 + false + + + NA + + + + + + 2 + true + + false + + + + 132 + + ethernet_mac + 135 + false + + + NA + + + + + 2 + true + + false + + + + 63 + + cpu_sdma + 136 + false + + + + 133 + + cpu_sdma + 137 + false + + + + 134 + + cpu_sdma + 138 + false + + + + 135 + + cpu_sdma + 139 + false + + + + 7 + true + false + + + 1 + true + false + + + 6 + true + true + + + 0 + true + false + + + 5 + true + false + + + 3 + true + true + + + 4 + true + true + + + 2 + false + false + + + 8 + false + true + + + 14 + false + false + + + 9 + false + false + + + 15 + false + true + + + 10 + false + true + + + 12 + false + true + + + 11 + true + false + + + 13 + false + true + + + 23 + false + false + + + 17 + false + false + + + 22 + true + false + + + 16 + false + true + + + 21 + false + false + + + 19 + true + true + + + 20 + true + false + + + 18 + false + true + + + 24 + false + false + + + 30 + false + false + + + 25 + false + true + + + 31 + false + false + + + 26 + true + false + + + 28 + false + true + + + 27 + false + true + + + 29 + false + true + + + 39 + false + false + + + 33 + true + false + + + 38 + false + false + + + 32 + false + false + + + 37 + true + false + + + 35 + true + true + + + 36 + true + false + + + 34 + false + false + + + 40 + false + false + + + 41 + true + true + + + 46 + true + true + + + 47 + true + true + + + 42 + true + false + + + 44 + false + false + + + 43 + false + true + + + 45 + true + false + + + 55 + false + false + + + 49 + true + false + + + 54 + true + true + + + 48 + false + true + + + 53 + true + false + + + 51 + false + true + + + 52 + false + true + + + 50 + false + true + + + 56 + false + false + + + 62 + true + false + + + 57 + false + true + + + 63 + true + true + + + 58 + false + false + + + 60 + false + true + + + 59 + false + true + + + 61 + false + true + + + 71 + false + false + + + 65 + true + false + + + 70 + false + true + + + 64 + true + true + + + 69 + true + false + + + 67 + true + true + + + 68 + true + true + + + 66 + true + true + + + 72 + true + false + + + 78 + false + false + + + 73 + false + true + + + 79 + true + true + + + 74 + true + false + + + 76 + true + true + + + 75 + true + true + + + 77 + false + true + + + 87 + false + false + + + 81 + false + false + + + 86 + false + false + + + 80 + true + false + + + 85 + false + true + + + 83 + true + true + + + 84 + true + false + + + 82 + false + false + + + 88 + true + false + + + 94 + true + false + + + 89 + false + false + + + 95 + true + false + + + 90 + true + false + + + 92 + false + true + + + 91 + false + false + + + 93 + false + false + + + 103 + true + false + + + 97 + true + false + + + 102 + true + false + + + 96 + true + true + + + 101 + true + false + + + 99 + true + true + + + 100 + true + true + + + 98 + false + true + + + 104 + true + false + + + 110 + false + false + + + 105 + true + true + + + 111 + true + false + + + 106 + true + false + + + 108 + false + false + + + 107 + false + true + + + 109 + true + false + + + 119 + true + false + + + 113 + true + true + + + 118 + true + true + + + 112 + true + false + + + 117 + true + false + + + 115 + false + false + + + 116 + true + false + + + 114 + false + false + + + 120 + false + false + + + 126 + false + false + + + 121 + false + true + + + 127 + false + true + + + 122 + true + false + + + 124 + false + true + + + 123 + false + true + + + 125 + false + true + + + 128 + false + true + + + 135 + true + false + + + 0 + + ORDER_MODE_BY_CLASS + BLINK_DUTY_CYCLE_0 + BLINK_DURATION_0 + BLINK_DUTY_CYCLE_0 + BLINK_DURATION_1 + PULSE_STRETCH_1 + false + 1627 + false + + 1 + 64 + 66 + false + + + 2 + 64 + 65 + false + + + 3 + 64 + 65 + false + + + 4 + 64 + 66 + false + + + 5 + 64 + 66 + false + + + 6 + 64 + 65 + false + + + 7 + 64 + 65 + false + + + 8 + 64 + 66 + false + + + + 0 + PORT_TYPE_XG + false + BLINK_SELECT_0 + false + true + false + + + 1 + PORT_TYPE_XG + false + BLINK_SELECT_0 + false + true + false + + + 2 + PORT_TYPE_XG + true + BLINK_SELECT_0 + false + true + true + + + 3 + PORT_TYPE_XG + false + BLINK_SELECT_0 + false + true + false + + + 4 + PORT_TYPE_XG + false + BLINK_SELECT_0 + false + true + false + + + 5 + PORT_TYPE_XG + false + BLINK_SELECT_0 + false + true + false + + + + /tmp/cpss_uds + + 8 + + MAP0 + + 7 + + + 1 + + + 6 + + + 0 + + + 5 + + + 3 + + + 4 + + + 2 + + + + MAP1 + + 0 + + + 6 + + + 1 + + + 7 + + + 2 + + + 4 + + + 3 + + + 5 + + + + + \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.md5 new file mode 100644 index 00000000000..084f63926d4 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.md5 @@ -0,0 +1 @@ +baf77e7f450def2266516782d159cbb4 \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.xml new file mode 100644 index 00000000000..7a2208bf90e --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.xml @@ -0,0 +1,1891 @@ + + + + + + asic-type + enumeration + ASIC Type + + ASIC_AC3X + AC3X + 0 + + + ASIC_AC5X + AC5X + 1 + + + ASIC_Falcon + FALCON + 2 + + + + interface-mode-type + enumeration + Specifies supported Interface modes + + 1000BASE_X + 1G + 6 + + + SGMII + 1G , 2.5G + 3 + + + QSGMII + 1G + 13 + + + KR + 10G, 12G, 20G, 40G, 100G + 16 + + + SR_LR + 5G, 10G, 12G, 20G, 40G + 20 + + + KR2 + + 27 + + + KR4 + + 28 + + + SR_LR2 + + 29 + + + SR_LR4 + 100G + 30 + + + KR_C + CONSORTIUM - 25G + 32 + + + CR_C + CONSORTIUM - 25G + 33 + + + KR2_C + CONSORTIUM - 50G + 34 + + + CR2_C + CONSORTIUM - 50G + 35 + + + CR + + 36 + + + CR2 + + 37 + + + CR4 + + 38 + + + KR_S + + 39 + + + CR_S + + 40 + + + KR8 + + 41 + + + CR8 + + 42 + + + SR_LR8 + + 43 + + + USX_10G_QXGMII + + 51 + + + USX_20G_QXGMII + + 52 + + + USX_OUSGMII + + 53 + + + USX_20G_OXGMII + + 54 + + + NA + + 57 + + + + port-speed-type + enumeration + Specifies supported speeds + + 1G + 1G + 2 + + + 10G + 10G + 3 + + + 2500M + 2.5G + 5 + + + 5G + 5G + 6 + + + 25G + 25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E + 21 + + + 40G + 40G + 9 + + + 50G + 50G + 14 + + + 100G + 100G + 13 + + + 200G + 200G + 24 + + + 400G + 400G + 25 + + + NA + NA + 35 + + + + fec-type + enumeration + Rx parameter type + + enabled + Enabled + 0 + + + disabled + Disabled + 1 + + + rs_enabled + RS FEC enabled + 2 + + + both_enabled + Both enabled + 3 + + + rs_544_514_enabled + RS FEC 544 and 514 + 4 + + + + physical-port-num-type + uint32 + PHYSICAL PORT NUM + 0 + 1023 + + + tx-param-type + enumeration + Tx parameter type + + pre + pre + 0 + + + post + post + 1 + + + peak + peak + 2 + + + + rx-param-type + enumeration + Rx parameter type + + dataRate + dataRate + 0 + + + res1Sel + res1Sel + 1 + + + res2Sel + res2Sel + 2 + + + cap1Sel + cap1Sel + 3 + + + cap2Sel + cap2Sel + 4 + + + minCap + minCap + 5 + + + minCapN + minCapN + 6 + + + sumfBoostTargetC0 + sumfBoostTargetC0 + 7 + + + sumfBoostTargetC1 + sumfBoostTargetC1 + 8 + + + sumfBoostTargetC2 + sumfBoostTargetC2 + 9 + + + midpointPhaseOs0 + midpointPhaseOs0 + 10 + + + midpointPhaseOs1 + midpointPhaseOs1 + 11 + + + midpointPhaseOs2 + midpointPhaseOs2 + 12 + + + selmufi + selmufi + 13 + + + selmuff + selmuff + 14 + + + selmupi + selmupi + 15 + + + selmupf + selmupf + 16 + + + midpointLargeThresKLane + midpointLargeThresKLane + 17 + + + midpointSmallThresKLane + midpointSmallThresKLane + 18 + + + midpointLargeThresCLane + midpointLargeThresCLane + 19 + + + midpointSmallThresCLane + midpointSmallThresCLane + 20 + + + inxSumfMidpointAdatptiveEnLane + inxSumfMidpointAdatptiveEnLane + 21 + + + dfeResF0aHighThresInitLane + dfeResF0aHighThresInitLane + 22 + + + dfeResF0aHighThresEndLane + dfeResF0aHighThresEndLane + 23 + + + squelch + squelch + 24 + + + align90 + align90 + 25 + + + sampler + sampler + 26 + + + slewRateCtrl0 + slewRateCtrl0 + 27 + + + slewRateCtrl1 + slewRateCtrl1 + 28 + + + EO + EO + 29 + + + minCap1 + minCap1 + 30 + + + maxCap1 + maxCap1 + 31 + + + minRes1 + minRes1 + 32 + + + maxRes1 + maxRes1 + 33 + + + + boolean-type + enumeration + Boolean 32 bits , due to big endian + + false + False + 0 + + + true + True + 1 + + + + serdes-type + enumeration + Serdes Type + + NA + No serdes + 0 + + + AVAGO + AVAGO + 1 + + + COMPHY + COMPHY + 2 + + + COMPHY_C12G + COMPHY_C12G + 3 + + + COMPHY_C28G + COMPHY_C28G + 4 + + + COMPHY_C112G + COMPHY_C112G + 5 + + + + phy-serdes-type + enumeration + Phy Serdes Type + + NA + No serdes + 0 + + + COMPHY + COMPHY + 1 + + + COMPHY_C28G + COMPHY_C28G + 2 + + + + port-interconnect-profile-type + enumeration + Enumerator of interconnect profile. + + profile_default + Profile Default + 0 + + + profile_1 + Profile 1 + 1 + + + profile_2 + Profile 2 + 2 + + + + ASIC_Falcon + + + 100GR2 + + CR2 + 100G + rs_544_514_enabled + + + KR2 + 100G + rs_544_514_enabled + + + SR_LR2 + 100G + rs_544_514_enabled + + + SR_LR2 + 50G + rs_enabled + + + CR2 + 50G + rs_enabled + + + KR2 + 50G + rs_enabled + + + CR2 + 100G + rs_544_514_enabled + rs_544_514_enabled + + + KR2 + 100G + rs_544_514_enabled + rs_544_514_enabled + + + CR2 + 50G + rs_enabled + rs_enabled + + + KR2 + 50G + rs_enabled + rs_enabled + + + + 100GR4 + + CR4 + 100G + rs_enabled + + + KR4 + 100G + rs_enabled + + + SR_LR4 + 100G + rs_enabled + + + CR4 + 100G + rs_enabled + rs_enabled + + + KR4 + 100G + rs_enabled + rs_enabled + + + + 10GR1 + + KR + 10G + enabled + + + SR_LR + 10G + enabled + + + KR + 10G + enabled + enabled + + + + 10GR1Fix + + KR + 10G + disabled + + + + 200GR4 + + CR4 + 200G + rs_544_514_enabled + + + SR_LR4 + 100G + rs_enabled + + + KR4 + 100G + rs_enabled + + + CR4 + 100G + rs_enabled + + + KR4 + 200G + rs_544_514_enabled + + + SR_LR4 + 200G + rs_544_514_enabled + + + CR4 + 200G + rs_544_514_enabled + rs_544_514_enabled + + + KR4 + 200G + rs_544_514_enabled + rs_544_514_enabled + + + CR4 + 100G + rs_enabled + rs_enabled + + + KR4 + 100G + rs_enabled + rs_enabled + + + + 25GR1 + + CR + 25G + rs_enabled + + + KR + 25G + rs_enabled + + + KR + 10G + enabled + + + SR_LR + 25G + rs_enabled + + + SR_LR + 10G + enabled + + + CR + 25G + rs_enabled + rs_enabled + + + KR + 25G + rs_enabled + rs_enabled + + + KR + 10G + enabled + enabled + + + + 400GR8 + + CR8 + 400G + rs_544_514_enabled + + + KR8 + 400G + rs_544_514_enabled + + + SR_LR8 + 400G + rs_544_514_enabled + + + CR8 + 400G + rs_544_514_enabled + rs_544_514_enabled + + + KR8 + 400G + rs_544_514_enabled + rs_544_514_enabled + + + + 50GR1 + + CR + 50G + rs_544_514_enabled + + + KR + 50G + rs_544_514_enabled + + + CR + 25G + rs_enabled + + + KR + 25G + rs_enabled + + + KR + 10G + enabled + + + SR_LR + 50G + rs_544_514_enabled + + + SR_LR + 25G + rs_enabled + + + SR_LR + 10G + enabled + + + CR + 50G + rs_544_514_enabled + rs_544_514_enabled + + + KR + 50G + rs_544_514_enabled + rs_544_514_enabled + + + CR + 25G + rs_enabled + rs_enabled + + + KR + 25G + rs_enabled + rs_enabled + + + KR + 10G + enabled + enabled + + + + + + 0 + AVAGO + profile_default + 100GR4 + true + + 0 + 25GR1 + + 100GR4 + + + + 1 + 25GR1 + + + + + + 2 + 25GR1 + + + + + + 3 + 25GR1 + + + + + + 4 + 25GR1 + + 100GR4 + + + + 5 + 25GR1 + + + + + + 6 + 25GR1 + + + + + + 7 + 25GR1 + + + + + + + 8 + AVAGO + profile_default + 100GR4 + true + + 8 + 25GR1 + + 100GR4 + + + + 9 + 25GR1 + + + + + + 10 + 25GR1 + + + + + + 11 + 25GR1 + + + + + + 12 + 25GR1 + + 100GR4 + + + + 13 + 25GR1 + + + + + + 14 + 25GR1 + + + + + + 15 + 25GR1 + + + + + + + 16 + AVAGO + profile_default + 100GR4 + true + + 16 + 25GR1 + + 100GR4 + + + + 17 + 25GR1 + + + + + + 18 + 25GR1 + + + + + + 19 + 25GR1 + + + + + + 20 + 25GR1 + + 100GR4 + + + + 21 + 25GR1 + + + + + + 22 + 25GR1 + + + + + + 23 + 25GR1 + + + + + + + 24 + AVAGO + profile_default + 100GR4 + true + + 24 + 25GR1 + + 100GR4 + + + + 25 + 25GR1 + + + + + + 26 + 25GR1 + + + + + + 27 + 25GR1 + + + + + + 28 + 25GR1 + + 100GR4 + + + + 29 + 25GR1 + + + + + + 30 + 25GR1 + + + + + + 31 + 25GR1 + + + + + + + 32 + AVAGO + profile_default + 100GR4 + true + + 32 + 25GR1 + + 100GR4 + + + + 33 + 25GR1 + + + + + + 34 + 25GR1 + + + + + + 35 + 25GR1 + + + + + + 36 + 25GR1 + + 100GR4 + + + + 37 + 25GR1 + + + + + + 38 + 25GR1 + + + + + + 39 + 25GR1 + + + + + + + 40 + AVAGO + profile_default + 100GR4 + true + + 40 + 25GR1 + + 100GR4 + + + + 41 + 25GR1 + + + + + + 42 + 25GR1 + + + + + + 43 + 25GR1 + + + + + + 44 + 25GR1 + + 100GR4 + + + + 45 + 25GR1 + + + + + + 46 + 25GR1 + + + + + + 47 + 25GR1 + + + + + + + 48 + AVAGO + profile_default + 100GR4 + true + + 48 + 25GR1 + + 100GR4 + + + + 49 + 25GR1 + + + + + + 50 + 25GR1 + + + + + + 51 + 25GR1 + + + + + + 52 + 25GR1 + + 100GR4 + + + + 53 + 25GR1 + + + + + + 54 + 25GR1 + + + + + + 55 + 25GR1 + + + + + + + 56 + AVAGO + profile_default + 100GR4 + true + + 56 + 25GR1 + + 100GR4 + + + + 57 + 25GR1 + + + + + + 58 + 25GR1 + + + + + + 59 + 25GR1 + + + + + + 60 + 25GR1 + + 100GR4 + + + + 64 + 25GR1 + + + + + + 65 + 25GR1 + + + + + + 66 + 25GR1 + + + + + + + 67 + AVAGO + profile_default + 100GR4 + true + + 67 + 25GR1 + + 100GR4 + + + + 68 + 25GR1 + + + + + + 69 + 25GR1 + + + + + + 70 + 25GR1 + + + + + + 71 + 25GR1 + + 100GR4 + + + + 72 + 25GR1 + + + + + + 73 + 25GR1 + + + + + + 74 + 25GR1 + + + + + + + 75 + AVAGO + profile_default + 100GR4 + true + + 75 + 25GR1 + + 100GR4 + + + + 76 + 25GR1 + + + + + + 77 + 25GR1 + + + + + + 78 + 25GR1 + + + + + + 79 + 25GR1 + + 100GR4 + + + + 80 + 25GR1 + + + + + + 81 + 25GR1 + + + + + + 82 + 25GR1 + + + + + + + 83 + AVAGO + profile_default + 100GR4 + true + + 83 + 25GR1 + + 100GR4 + + + + 84 + 25GR1 + + + + + + 85 + 25GR1 + + + + + + 86 + 25GR1 + + + + + + 87 + 25GR1 + + 100GR4 + + + + 88 + 25GR1 + + + + + + 89 + 25GR1 + + + + + + 90 + 25GR1 + + + + + + + 91 + AVAGO + profile_default + 100GR4 + true + + 91 + 25GR1 + + 100GR4 + + + + 92 + 25GR1 + + + + + + 93 + 25GR1 + + + + + + 94 + 25GR1 + + + + + + 95 + 25GR1 + + 100GR4 + + + + 96 + 25GR1 + + + + + + 97 + 25GR1 + + + + + + 98 + 25GR1 + + + + + + + 99 + AVAGO + profile_default + 100GR4 + true + + 99 + 25GR1 + + 100GR4 + + + + 100 + 25GR1 + + + + + + 101 + 25GR1 + + + + + + 102 + 25GR1 + + + + + + 103 + 25GR1 + + 100GR4 + + + + 104 + 25GR1 + + + + + + 105 + 25GR1 + + + + + + 106 + 25GR1 + + + + + + + 107 + AVAGO + profile_default + 100GR4 + true + + 107 + 25GR1 + + 100GR4 + + + + 108 + 25GR1 + + + + + + 109 + 25GR1 + + + + + + 110 + 25GR1 + + + + + + 111 + 25GR1 + + 100GR4 + + + + 112 + 25GR1 + + + + + + 113 + 25GR1 + + + + + + 114 + 25GR1 + + + + + + + 115 + AVAGO + profile_default + 100GR4 + true + + 115 + 25GR1 + + 100GR4 + + + + 116 + 25GR1 + + + + + + 117 + 25GR1 + + + + + + 118 + 25GR1 + + + + + + 119 + 25GR1 + + 100GR4 + + + + 120 + 25GR1 + + + + + + 121 + 25GR1 + + + + + + 122 + 25GR1 + + + + + + + 123 + AVAGO + profile_default + 100GR4 + true + + 123 + 25GR1 + + 100GR4 + + + + 124 + 25GR1 + + + + + + 125 + 25GR1 + + + + + + 126 + 25GR1 + + + + + + 127 + 25GR1 + + 100GR4 + + + + 128 + 25GR1 + + + + + + 129 + 25GR1 + + + + + + 130 + 25GR1 + + + + + + + 131 + AVAGO + profile_default + 10GR1Fix + false + + + 132 + AVAGO + profile_default + 10GR1Fix + false + + + + \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.md5 new file mode 100644 index 00000000000..4c6962b9691 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.md5 @@ -0,0 +1 @@ +9699d7ac6395ccab96dec333c782dc1d \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.xml new file mode 100644 index 00000000000..7cd85e01698 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.xml @@ -0,0 +1,1180 @@ + + + + + + std-string + string + standard string. + 1 + 100 + + + queue-id-type + uint32 + Queue id + 0 + 7 + + + precent-type + uint32 + Precent + 0 + 100 + + + phaThreadId-type + uint32 + Thread id + 1 + 255 + + + routing-mode-type + enumeration + Specifies routing mode. + + POLICY_BASED_ROUTING_ONLY + PBR only + 0 + + + TCAM_ROUTER_BASED + Router engine or PBR + 1 + + + + shared-table-mode-type + enumeration + Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match) + + MID_L3_MID_L2_NO_EM + MID_L3_MID_L2_NO_EM + 0 + + + MID_L3_MID_L2_MIN_EM + MID_L3_MID_L2_MIN_EM + 1 + + + LOW_MAX_L3_MID_LOW_L2_NO_EM + LOW_MAX_L3_MID_LOW_L2_NO_EM + 2 + + + MAX_L3_MIN_L2_NO_EM + MAX_L3_MIN_L2_NO_EM + 3 + + + + pha-firmware-image-id-type + enumeration + Specifies supported Pha image id + + DEFAULT + Default PHA firmware image ID + 0 + + + 01 + 01 firmware image ID + 1 + + + 02 + 02 PHA firmware image ID + 2 + + + + pha-firmware-thread-type + enumeration + Specifies supported Pha thread type + + IOAM_INGRESS_SWITCH_IPV4 + IOAM_INGRESS_SWITCH_IPV4 + 1 + + + IOAM_INGRESS_SWITCH_IPV6 + IOAM_INGRESS_SWITCH_IPV6 + 2 + + + IOAM_TRANSIT_SWITCH_IPV4 + IOAM_TRANSIT_SWITCH_IPV4 + 3 + + + IOAM_TRANSIT_SWITCH_IPV6 + IOAM_TRANSIT_SWITCH_IPV6 + 4 + + + INT_IOAM_MIRRORING + INT_IOAM_MIRRORING + 5 + + + INT_IOAM_EGRESS_SWITCH + INT_IOAM_EGRESS_SWITCH + 6 + + + MPLS_SR_NO_EL + MPLS_SR_NO_EL + 7 + + + MPLS_SR_ONE_EL + MPLS_SR_ONE_EL + 8 + + + MPLS_SR_TWO_EL + MPLS_SR_TWO_EL + 9 + + + MPLS_SR_THREE_EL + MPLS_SR_THREE_EL + 10 + + + UNIFIED_SR + UNIFIED_SR + 11 + + + CLASSIFIER_NSH_OVER_ETHERNET + CLASSIFIER_NSH_OVER_ETHERNET + 12 + + + CLASSIFIER_NSH_OVER_VXLAN_GPE + CLASSIFIER_NSH_OVER_VXLAN_GPE + 13 + + + SFF_NSH_VXLAN_GPE_TO_ETHERNET + SFF_NSH_VXLAN_GPE_TO_ETHERNET + 14 + + + SFF_NSH_ETHERNET_TO_VXLAN_GPE + SFF_NSH_ETHERNET_TO_VXLAN_GPE + 15 + + + IOAM_EGRESS_SWITCH_IPV6 + IOAM_EGRESS_SWITCH_IPV6 + 16 + + + SRV6_END_NODE + SRV6_END_NODE + 17 + + + SRV6_PENULTIMATE_END_NODE + SRV6_PENULTIMATE_END_NODE + 18 + + + SRV6_SRC_NODE_1_SEGMENT + SRV6_SRC_NODE_1_SEGMENT + 19 + + + SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS + SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS + 20 + + + SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS + SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS + 21 + + + SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS + SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS + 22 + + + SGT_NETWORK_ADD_MSB + SGT_NETWORK_ADD_MSB + 23 + + + SGT_NETWORK_FIX + SGT_NETWORK_FIX + 24 + + + SGT_NETWORK_REMOVE + SGT_NETWORK_REMOVE + 25 + + + SGT_EDSA_FIX + SGT_EDSA_FIX + 26 + + + SGT_EDSA_REMOVE + SGT_EDSA_REMOVE + 27 + + + SGT_GBP_FIX_IPV4 + SGT_GBP_FIX_IPV4 + 28 + + + SGT_GBP_FIX_IPV6 + SGT_GBP_FIX_IPV6 + 29 + + + SGT_GBP_REMOVE_IPV4 + SGT_GBP_REMOVE_IPV4 + 30 + + + SGT_GBP_REMOVE_IPV6 + SGT_GBP_REMOVE_IPV6 + 31 + + + PTP_PHY_1_STEP + PTP_PHY_1_STEP + 32 + + + EGRESS_MIRRORING_METADATA + EGRESS_MIRRORING_METADATA + 33 + + + CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4 + CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4 + 34 + + + CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6 + CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6 + 35 + + + CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4 + CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4 + 36 + + + CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6 + CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6 + 37 + + + CC_ERSPAN_TYPE_II_SRC_DEV + CC_ERSPAN_TYPE_II_SRC_DEV + 38 + + + VXLAN_GBP_SOURCE_GROUP_POLICY_ID + VXLAN_GBP_SOURCE_GROUP_POLICY_ID + 39 + + + SRV6_BEST_EFFORT + SRV6_BEST_EFFORT + 40 + + + SRV6_SRC_NODE_1_CONTAINER + SRV6_SRC_NODE_1_CONTAINER + 41 + + + SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS + SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS + 42 + + + SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS + SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS + 43 + + + SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS + SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS + 44 + + + SRV6_END_NODE_COC32_GSID + SRV6_END_NODE_COC32_GSID + 45 + + + IPV4_TTL_INCREMENT + IPV4_TTL_INCREMENT + 46 + + + IPV6_HOP_LIMIT_INCREMENT + IPV6_HOP_LIMIT_INCREMENT + 47 + + + CLEAR_OUTGOING_MTAG_COMMAND + CLEAR_OUTGOING_MTAG_COMMAND + 48 + + + SFLOW_V5_IPV4 + SFLOW_V5_IPV4 + 49 + + + SFLOW_V5_IPV6 + SFLOW_V5_IPV6 + 50 + + + SLS + SLS + 51 + + + + trunk-member-mode-type + enumeration + Specifies supported Pha image id + + NATIVE + NATIVE +* the trunk members are filled +* according to the order given by application. +* Regular trunk may hold max of 8 members. +* Cascade trunk may hold : +* max of 64 members + 0 + + + FLEX + FLEX +* A mode to allows flexibility for +* each Regular trunk to state it's max number of members (before starting to add members). +* (this mode not effect 'cascade trunk' members) +* Regular trunk may hold : max of 4K members. (each trunk set it's own limit) +* Cascade trunk may hold : max of 64 members. + 2 + + + + number-physical-port-type + enumeration + AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024 + + no-ports + no-ports + 0 + + + 64-ports + 64-ports + 64 + + + 128-ports + 128-ports + 128 + + + 256-ports + 256-ports + 256 + + + 512-ports + 512-ports + 512 + + + 1024-ports + 1024-ports + 1024 + + + + serdes-ref-clock-type + enumeration + Specifies serdes refernce clock. + + external_25_single_ended + EXTERNAL_25_SINGLE_ENDED + 0 + + + external_125_single_ended + EXTERNAL_125_SINGLE_ENDED + 1 + + + external_125_diff + EXTERNAL_125_DIFF + 2 + + + external_156_25_single_ended + EXTERNAL_156_25_SINGLE_ENDED + 3 + + + external_156_25_diff + EXTERNAL_156_25_DIFF + 4 + + + internal_125 + INTERNAL_125 + 5 + + + + cpu-port-id-type + uint32 + CPU port id + 0 + 7 + + + rx-buffer-size-type + uint32 + Rx Buffer size + 64 + 10240 + + + tx-sdma-queue-mode-type + enumeration + Specifies TX queue mode. + + Normal + Application + 0 + + + Packet_Generator + Traffic generator + 1 + + + + alloc-method-type + enumeration + Specifies Buffers allocation method. + + Dynamic_Alloc + Dynamic + 0 + + + Static_Alloc + Static + 1 + + + + au_mesage_lenght-type + enumeration + Specifies Buffers allocation method. + + 4_words + 4 Words + 0 + + + 8_words + 8 Words + 1 + + + + boolean-type + enumeration + Boolean 32 bits , due to bing endian + + false + False + 0 + + + true + True + 1 + + + + asic-type + enumeration + ASIC Type + + ASIC_AC3X + AC3X + 0 + + + ASIC_AC5X + AC5X + 1 + + + ASIC_Falcon + FALCON + 2 + + + + ASIC_Falcon + + Falcon-3.2 + + 4294967295 + external_25_single_ended + 2 + 60 + 256-ports + false + true + 0 + + + true + + 4096 + + + 2048 + + + + 0 + 0 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 7 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 6 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 5 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 4 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 3 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 2 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 1 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 0 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 7 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 6 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 5 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 4 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 3 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 2 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 1 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 0 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 7 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 6 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 5 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 4 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 3 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 2 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 1 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 0 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 7 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 6 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 5 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 4 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 3 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 2 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 1 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 0 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 1 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 2 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 3 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 4 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 5 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 6 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 7 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 0 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 1 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 2 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 3 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 4 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 5 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 6 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 7 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 0 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 1 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 2 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 3 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 4 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 5 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 6 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 7 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 0 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 1 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 2 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 3 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 4 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 5 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 6 + Static_Alloc + Packet_Generator + 256 + 256 + 144 + + + 3 + 7 + Static_Alloc + Packet_Generator + 1 + 1 + 3032 + + + + false + false + false + 0 + 8_words + false + + + + TCAM_ROUTER_BASED + 0 + MID_L3_MID_L2_NO_EM + false + + + true + true + true + true + true + true + + 1023 + FLEX + + true + true + true + true + + false + 02 + 0 + + + + + \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.md5 new file mode 100644 index 00000000000..cfa1a375d83 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.md5 @@ -0,0 +1 @@ +88cbf08802a5d41b605a8dd83f2c5139 \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.xml new file mode 100644 index 00000000000..635a099a35a --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.xml @@ -0,0 +1,900 @@ + + + + + + device-id-type + uint32 + Device ID 0..1 + 0 + 1 + + + port-id-type + uint32 + Interface number + 0 + 1023 + + + logDest-type + enumeration + Logging Feature Options + + SAI_LOG_SYSLOG + SYSLOG {Syslog service should be running to use this option} + 0 + + + SAI_LOG_CONSOLE + CONSOLE + 1 + + + SAI_LOG_FILE + FILE {Warning !!! Use with caution. Can cause disk full issues} + 2 + + + + InDropCounter-type + enumeration + Router In Drop Reason Feature Options + + TTL_HOPLIMIT_EXCEEDED + Router In Drop Counters track TTL & Hop Limit Exceeded Packets + 0 + + + ROUTE_BLACKHOLE + Router In Drop Counters track Route Black Hole Packets + 1 + + + + Feature-enable + enumeration + Feature Enabled/Disabled + + Disabled + Disabled + 0 + + + Enabled + Enabled + 1 + + + + log-dest-file-path-type + string + A string with path to file for logging feature + 2 + 30 + + + acl-feature-name-type + enumeration + + + port-sFlow + SFlow over Port + 0 + + + port-counters-ipv4-ipv6 + Port ipv4/ipv6 counters + 1 + + + control-acl + ACLs for control packet handling + 2 + + + debug-counter-acl + ACLs for Debug Counters + 3 + + + + ingress-acl-stage-type + enumeration + + + disabled + Feature not enabled + 0 + + + IPCL0 + Stage IPCL0 + 1 + + + IPCL1 + Stage IPCL1 + 2 + + + + egress-acl-stage-type + enumeration + + + disabled + Feature not enabled + 0 + + + EPCL0 + Stage EPCL0 + 2 + + + + feature-priority-type + uint32 + Feature priority + 2 + 15 + + + hit-number-type + uint32 + Hit/lookup number + 0 + 3 + + + asic-type + enumeration + ASIC Type + + ASIC_AC3X + AC3X + 0 + + + ASIC_AC5X + AC5X + 1 + + + ASIC_Falcon + FALCON + 2 + + + + ASIC_Falcon + ASK-Board-F3_2T-128x25G.xml + + + 0 + 0 + 0 + + + 1 + 0 + 1 + + + 2 + 0 + 2 + + + 3 + 0 + 3 + + + 4 + 0 + 4 + + + 5 + 0 + 5 + + + 6 + 0 + 6 + + + 7 + 0 + 7 + + + 8 + 0 + 8 + + + 9 + 0 + 9 + + + 10 + 0 + 10 + + + 11 + 0 + 11 + + + 12 + 0 + 12 + + + 13 + 0 + 13 + + + 14 + 0 + 14 + + + 15 + 0 + 15 + + + 16 + 0 + 16 + + + 17 + 0 + 17 + + + 18 + 0 + 18 + + + 19 + 0 + 19 + + + 20 + 0 + 20 + + + 21 + 0 + 21 + + + 22 + 0 + 22 + + + 23 + 0 + 23 + + + 24 + 0 + 24 + + + 25 + 0 + 25 + + + 26 + 0 + 26 + + + 27 + 0 + 27 + + + 28 + 0 + 28 + + + 29 + 0 + 29 + + + 30 + 0 + 30 + + + 31 + 0 + 31 + + + 32 + 0 + 32 + + + 33 + 0 + 33 + + + 34 + 0 + 34 + + + 35 + 0 + 35 + + + 36 + 0 + 36 + + + 37 + 0 + 37 + + + 38 + 0 + 38 + + + 39 + 0 + 39 + + + 40 + 0 + 40 + + + 41 + 0 + 41 + + + 42 + 0 + 42 + + + 43 + 0 + 43 + + + 44 + 0 + 44 + + + 45 + 0 + 45 + + + 46 + 0 + 46 + + + 47 + 0 + 47 + + + 48 + 0 + 48 + + + 49 + 0 + 49 + + + 50 + 0 + 50 + + + 51 + 0 + 51 + + + 52 + 0 + 52 + + + 53 + 0 + 53 + + + 54 + 0 + 54 + + + 55 + 0 + 55 + + + 56 + 0 + 56 + + + 57 + 0 + 57 + + + 58 + 0 + 58 + + + 59 + 0 + 59 + + + 60 + 0 + 60 + + + 61 + 0 + 64 + + + 62 + 0 + 65 + + + 63 + 0 + 66 + + + 64 + 0 + 67 + + + 65 + 0 + 68 + + + 66 + 0 + 69 + + + 67 + 0 + 70 + + + 68 + 0 + 71 + + + 69 + 0 + 72 + + + 70 + 0 + 73 + + + 71 + 0 + 74 + + + 72 + 0 + 75 + + + 73 + 0 + 76 + + + 74 + 0 + 77 + + + 75 + 0 + 78 + + + 76 + 0 + 79 + + + 77 + 0 + 80 + + + 78 + 0 + 81 + + + 79 + 0 + 82 + + + 80 + 0 + 83 + + + 81 + 0 + 84 + + + 82 + 0 + 85 + + + 83 + 0 + 86 + + + 84 + 0 + 87 + + + 85 + 0 + 88 + + + 86 + 0 + 89 + + + 87 + 0 + 90 + + + 88 + 0 + 91 + + + 89 + 0 + 92 + + + 90 + 0 + 93 + + + 91 + 0 + 94 + + + 92 + 0 + 95 + + + 93 + 0 + 96 + + + 94 + 0 + 97 + + + 95 + 0 + 98 + + + 96 + 0 + 99 + + + 97 + 0 + 100 + + + 98 + 0 + 101 + + + 99 + 0 + 102 + + + 100 + 0 + 103 + + + 101 + 0 + 104 + + + 102 + 0 + 105 + + + 103 + 0 + 106 + + + 104 + 0 + 107 + + + 105 + 0 + 108 + + + 106 + 0 + 109 + + + 107 + 0 + 110 + + + 108 + 0 + 111 + + + 109 + 0 + 112 + + + 110 + 0 + 113 + + + 111 + 0 + 114 + + + 112 + 0 + 115 + + + 113 + 0 + 116 + + + 114 + 0 + 117 + + + 115 + 0 + 118 + + + 116 + 0 + 119 + + + 117 + 0 + 120 + + + 118 + 0 + 121 + + + 119 + 0 + 122 + + + 120 + 0 + 123 + + + 121 + 0 + 124 + + + 122 + 0 + 125 + + + 123 + 0 + 126 + + + 124 + 0 + 127 + + + 125 + 0 + 128 + + + 126 + 0 + 129 + + + 127 + 0 + 130 + + + 128 + 0 + 131 + + + 129 + 0 + 132 + + + + 8 + 0 + 0 + 64 + 8 + 8 + 1024 + 0 + 0 + + + + 0 + + + Enabled + Enabled + + + Enabled + + + + SAI_LOG_SYSLOG + + + control-acl + 3 + + IPCL0 + 1 + + + EPCL0 + 0 + + + + port-sFlow + 4 + + IPCL0 + 0 + + + EPCL0 + 0 + + + + port-counters-ipv4-ipv6 + 5 + + IPCL0 + 3 + + + EPCL0 + 0 + + + + debug-counter-acl + 2 + + IPCL0 + 1 + + + EPCL0 + 0 + + + + \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..28e30dee8cc --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t0.j2 @@ -0,0 +1,49 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_pool1": { + "mode": "dynamic", + "size": "10500000", + "type": "ingress" + }, + "ingress_pool2": { + "mode": "dynamic", + "size": "1000000", + "type": "ingress" + }, + "egress_pool1": { + "mode": "dynamic", + "size": "10500000", + "type": "egress" + }, + "egress_pool2": { + "mode": "dynamic", + "size": "1000000", + "type": "egress" + } + }, + "BUFFER_PROFILE": { + "egress_lossless_profile": { + "pool": "egress_pool1", + "size": "0", + "dynamic_th": "1" + }, + "egress_lossy_profile": { + "pool": "egress_pool2", + "size": "0", + "dynamic_th": "1" + }, + "ingress_lossless_profile": { + "pool": "ingress_pool1", + "size": "0", + "dynamic_th": "-3" + }, + "ingress_lossy_profile": { + "pool": "ingress_pool2", + "size": "0", + "dynamic_th": "-3" + } + }, +{%- endmacro %} diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..28e30dee8cc --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t1.j2 @@ -0,0 +1,49 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_pool1": { + "mode": "dynamic", + "size": "10500000", + "type": "ingress" + }, + "ingress_pool2": { + "mode": "dynamic", + "size": "1000000", + "type": "ingress" + }, + "egress_pool1": { + "mode": "dynamic", + "size": "10500000", + "type": "egress" + }, + "egress_pool2": { + "mode": "dynamic", + "size": "1000000", + "type": "egress" + } + }, + "BUFFER_PROFILE": { + "egress_lossless_profile": { + "pool": "egress_pool1", + "size": "0", + "dynamic_th": "1" + }, + "egress_lossy_profile": { + "pool": "egress_pool2", + "size": "0", + "dynamic_th": "1" + }, + "ingress_lossless_profile": { + "pool": "ingress_pool1", + "size": "0", + "dynamic_th": "-3" + }, + "ingress_lossy_profile": { + "pool": "ingress_pool2", + "size": "0", + "dynamic_th": "-3" + } + }, +{%- endmacro %} diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/create_only_config_db_buffers.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/create_only_config_db_buffers.json new file mode 100644 index 00000000000..8bea3894c08 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/create_only_config_db_buffers.json @@ -0,0 +1,7 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "create_only_config_db_buffers": "true" + } + } +} \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/hwsku.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/hwsku.json new file mode 100644 index 00000000000..f6745e83605 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/hwsku.json @@ -0,0 +1,204 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet4": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet8": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet12": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet16": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet20": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet24": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet28": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet32": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet36": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet40": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet44": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet48": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet52": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet56": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet60": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet64": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet68": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet72": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet76": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet80": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet84": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet88": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet92": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet96": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet100": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet104": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet108": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet112": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet116": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet120": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet124": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet128": { + "default_brkout_mode": "1x10G", + "autoneg": "off" + }, + "Ethernet129": { + "default_brkout_mode": "1x10G", + "autoneg": "off" + } + } +} diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/port_config.ini b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/port_config.ini new file mode 100644 index 00000000000..85d256856fb --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/port_config.ini @@ -0,0 +1,131 @@ +# name lanes alias speed autoneg fec index +Ethernet0 0 Eth1/1 25000 on none 1 +Ethernet1 1 Eth1/2 25000 on none 1 +Ethernet2 2 Eth1/3 25000 on none 1 +Ethernet3 3 Eth1/4 25000 on none 1 +Ethernet4 4 Eth1/5 25000 on none 1 +Ethernet5 5 Eth1/6 25000 on none 1 +Ethernet6 6 Eth1/7 25000 on none 1 +Ethernet7 7 Eth1/8 25000 on none 1 +Ethernet8 8 Eth2/1 25000 on none 2 +Ethernet9 9 Eth2/2 25000 on none 2 +Ethernet10 10 Eth2/3 25000 on none 2 +Ethernet11 11 Eth2/4 25000 on none 2 +Ethernet12 12 Eth2/5 25000 on none 2 +Ethernet13 13 Eth2/6 25000 on none 2 +Ethernet14 14 Eth2/7 25000 on none 2 +Ethernet15 15 Eth2/8 25000 on none 2 +Ethernet16 16 Eth3/1 25000 on none 3 +Ethernet17 17 Eth3/2 25000 on none 3 +Ethernet18 18 Eth3/3 25000 on none 3 +Ethernet19 19 Eth3/4 25000 on none 3 +Ethernet20 20 Eth3/5 25000 on none 3 +Ethernet21 21 Eth3/6 25000 on none 3 +Ethernet22 22 Eth3/7 25000 on none 3 +Ethernet23 23 Eth3/8 25000 on none 3 +Ethernet24 24 Eth4/1 25000 on none 4 +Ethernet25 25 Eth4/2 25000 on none 4 +Ethernet26 26 Eth4/3 25000 on none 4 +Ethernet27 27 Eth4/4 25000 on none 4 +Ethernet28 28 Eth4/5 25000 on none 4 +Ethernet29 29 Eth4/6 25000 on none 4 +Ethernet30 30 Eth4/7 25000 on none 4 +Ethernet31 31 Eth4/8 25000 on none 4 +Ethernet32 32 Eth5/1 25000 on none 5 +Ethernet33 33 Eth5/2 25000 on none 5 +Ethernet34 34 Eth5/3 25000 on none 5 +Ethernet35 35 Eth5/4 25000 on none 5 +Ethernet36 36 Eth5/5 25000 on none 5 +Ethernet37 37 Eth5/6 25000 on none 5 +Ethernet38 38 Eth5/7 25000 on none 5 +Ethernet39 39 Eth5/8 25000 on none 5 +Ethernet40 40 Eth6/1 25000 on none 6 +Ethernet41 41 Eth6/2 25000 on none 6 +Ethernet42 42 Eth6/3 25000 on none 6 +Ethernet43 43 Eth6/4 25000 on none 6 +Ethernet44 44 Eth6/5 25000 on none 6 +Ethernet45 45 Eth6/6 25000 on none 6 +Ethernet46 46 Eth6/7 25000 on none 6 +Ethernet47 47 Eth6/8 25000 on none 6 +Ethernet48 48 Eth7/1 25000 on none 7 +Ethernet49 49 Eth7/2 25000 on none 7 +Ethernet50 50 Eth7/3 25000 on none 7 +Ethernet51 51 Eth7/4 25000 on none 7 +Ethernet52 52 Eth7/5 25000 on none 7 +Ethernet53 53 Eth7/6 25000 on none 7 +Ethernet54 54 Eth7/7 25000 on none 7 +Ethernet55 55 Eth7/8 25000 on none 7 +Ethernet56 56 Eth8/1 25000 on none 8 +Ethernet57 57 Eth8/2 25000 on none 8 +Ethernet58 58 Eth8/3 25000 on none 8 +Ethernet59 59 Eth8/4 25000 on none 8 +Ethernet60 60 Eth8/5 25000 on none 8 +Ethernet61 61 Eth8/6 25000 on none 8 +Ethernet62 62 Eth8/7 25000 on none 8 +Ethernet63 63 Eth8/8 25000 on none 8 +Ethernet64 64 Eth9/1 25000 on none 9 +Ethernet65 65 Eth9/2 25000 on none 9 +Ethernet66 66 Eth9/3 25000 on none 9 +Ethernet67 67 Eth9/4 25000 on none 9 +Ethernet68 68 Eth9/5 25000 on none 9 +Ethernet69 69 Eth9/6 25000 on none 9 +Ethernet70 70 Eth9/7 25000 on none 9 +Ethernet71 71 Eth9/8 25000 on none 9 +Ethernet72 72 Eth10/1 25000 on none 10 +Ethernet73 73 Eth10/2 25000 on none 10 +Ethernet74 74 Eth10/3 25000 on none 10 +Ethernet75 75 Eth10/4 25000 on none 10 +Ethernet76 76 Eth10/5 25000 on none 10 +Ethernet77 77 Eth10/6 25000 on none 10 +Ethernet78 78 Eth10/7 25000 on none 10 +Ethernet79 79 Eth10/8 25000 on none 10 +Ethernet80 80 Eth11/1 25000 on none 11 +Ethernet81 81 Eth11/2 25000 on none 11 +Ethernet82 82 Eth11/3 25000 on none 11 +Ethernet83 83 Eth11/4 25000 on none 11 +Ethernet84 84 Eth11/5 25000 on none 11 +Ethernet85 85 Eth11/6 25000 on none 11 +Ethernet86 86 Eth11/7 25000 on none 11 +Ethernet87 87 Eth11/8 25000 on none 11 +Ethernet88 88 Eth12/1 25000 on none 12 +Ethernet89 89 Eth12/2 25000 on none 12 +Ethernet90 90 Eth12/3 25000 on none 12 +Ethernet91 91 Eth12/4 25000 on none 12 +Ethernet92 92 Eth12/5 25000 on none 12 +Ethernet93 93 Eth12/6 25000 on none 12 +Ethernet94 94 Eth12/7 25000 on none 12 +Ethernet95 95 Eth12/8 25000 on none 12 +Ethernet96 96 Eth13/1 25000 on none 13 +Ethernet97 97 Eth13/2 25000 on none 13 +Ethernet98 98 Eth13/3 25000 on none 13 +Ethernet99 99 Eth13/4 25000 on none 13 +Ethernet100 100 Eth13/5 25000 on none 13 +Ethernet101 101 Eth13/6 25000 on none 13 +Ethernet102 102 Eth13/7 25000 on none 13 +Ethernet103 103 Eth13/8 25000 on none 13 +Ethernet104 104 Eth14/1 25000 on none 14 +Ethernet105 105 Eth14/2 25000 on none 14 +Ethernet106 106 Eth14/3 25000 on none 14 +Ethernet107 107 Eth14/4 25000 on none 14 +Ethernet108 108 Eth14/5 25000 on none 14 +Ethernet109 109 Eth14/6 25000 on none 14 +Ethernet110 110 Eth14/7 25000 on none 14 +Ethernet111 111 Eth14/8 25000 on none 14 +Ethernet112 112 Eth15/1 25000 on none 15 +Ethernet113 113 Eth15/2 25000 on none 15 +Ethernet114 114 Eth15/3 25000 on none 15 +Ethernet115 115 Eth15/4 25000 on none 15 +Ethernet116 116 Eth15/5 25000 on none 15 +Ethernet117 117 Eth15/6 25000 on none 15 +Ethernet118 118 Eth15/7 25000 on none 15 +Ethernet119 119 Eth15/8 25000 on none 15 +Ethernet120 120 Eth16/1 25000 on none 16 +Ethernet121 121 Eth16/2 25000 on none 16 +Ethernet122 122 Eth16/3 25000 on none 16 +Ethernet123 123 Eth16/4 25000 on none 16 +Ethernet124 124 Eth16/5 25000 on none 16 +Ethernet125 125 Eth16/6 25000 on none 16 +Ethernet126 126 Eth16/7 25000 on none 16 +Ethernet127 127 Eth16/8 25000 on none 16 +Ethernet128 128 Eth17 10000 off none 129 +Ethernet129 129 Eth17 10000 off none 130 diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/profile.ini b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/profile.ini new file mode 100644 index 00000000000..c2f77685ad0 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/profile.ini @@ -0,0 +1 @@ +switchMacAddress=00:01:02:03:04:05 diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/sai.profile b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/sai.profile new file mode 100644 index 00000000000..2477a839e09 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/sai.profile @@ -0,0 +1,4 @@ +mode=1 +hwId=FC128x25G +switchProfile=/usr/share/sonic/hwsku/SAI-F3_2T-128x25G.xml +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.md5 new file mode 100644 index 00000000000..b9aabeb8706 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.md5 @@ -0,0 +1 @@ +e48527ad3f7bc5db09ec1fe078eba9a1 \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.xml new file mode 100644 index 00000000000..80434c00be6 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.xml @@ -0,0 +1,3990 @@ + + + + + + std-string + string + standard string. + 1 + 100 + + + board-callback-type + enumeration + Specifies os/ext drv callback types. + + linux-static + Linux Static + 0 + + + linux-shared + Linux Shared Lib mode + 1 + + + external + External Os + 3 + + + freeBsd + Free BSD + 4 + + + + board-pp-map-type + enumeration + Specifies pci info types. + + fixed + Fixed + 0 + + + autoscan + Auto scan + 1 + + + + board-pp-interface-channel-type + enumeration + Specifies channel interface type. + + pci + PCI + 0 + + + smi + SMI + 1 + + + twsi + TWSI + 2 + + + + board-pp-as-type + enumeration + Specifies Address space type. + + 4_regions + address-space 4 regions + 0 + + + 8_regions + address-space 8 regions + 1 + + + atu + address translation unit + 2 + + + + device-id-type + uint32 + Device ID 0..1 + 0 + 1 + + + port-mapping-type + enumeration + Specifies port map type. + + ethernet_mac + ETHERNET_MAC + 0 + + + cpu_sdma + CPU_SDMA + 1 + + + + interface-num-type + uint32 + Interface number + 0 + 1023 + + + txq-port-number-type + uint32 + TXq port number + 0 + 99 + + + phy-smi-interface-type + uint32 + Phy SMI interface type. + 0 + 3 + + + phy-xsmi-interface-type + uint32 + Phy XSMI interface type. + 0 + 15 + + + phy-type + enumeration + Specifies the PHY Part Identifier. + + NA + No Phy + 0 + + + alaska-88E1680 + Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G. + 1 + + + alaska-88E1780 + Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy +Efficient Ethernet Transceiver + 2 + + + alaska-88E2540 + Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet +Transceiver with IEEE 1588v2 PTP Support + 3 + + + alaska-88E2580 + Specifies PHY identifier 88E2580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver +with IEEE 1588v2 PTP Support + 4 + + + alaska-88E2780 + Specifies PHY identifier 88E2780, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver +with IEEE 1588v2 PTP Support + 5 + + + + physical-port-num-type + uint32 + PHYSICAL PORT NUM + 0 + 1023 + + + led-stream-port-type + enumeration + Specifies the ledstream port type. + + PORT_TYPE_TRI_SPEED + tri-speed port. + 1 + + + PORT_TYPE_XG + XG port. + 2 + + + + led-stream-blink-select-type + enumeration + Specifies the LED stream blink select type. + + BLINK_SELECT_0 + Blink 0 signal. + 1 + + + BLINK_SELECT_1 + Blink 1 signal + 2 + + + + led-stream-order-mode-type + enumeration + Specifies the LED stream ordering mode. + + ORDER_MODE_BY_PORT + the indication order is arranged by port. + 1 + + + ORDER_MODE_BY_CLASS + the indication order is arranged by class. + 2 + + + + led-stream-blink-duty-cycle-type + enumeration + Specifies the LED stream blink cycle duty cycle type. + + BLINK_DUTY_CYCLE_0 + 25% on, 75% off. + 1 + + + BLINK_DUTY_CYCLE_1 + 50% on, 50% off. + 2 + + + BLINK_DUTY_CYCLE_2 + 50% on, 50% off. + 3 + + + BLINK_DUTY_CYCLE_3 + 75% on, 25% off. + 4 + + + + led-stream-blink-duration-type + enumeration + Specifies the LED stream blink period type. + + BLINK_DURATION_0 + BLINK_DURATION_0. + 1 + + + BLINK_DURATION_1 + BLINK_DURATION_1. + 2 + + + BLINK_DURATION_2 + BLINK_DURATION_2. + 3 + + + BLINK_DURATION_3 + BLINK_DURATION_3. + 4 + + + BLINK_DURATION_4 + BLINK_DURATION_4. + 5 + + + BLINK_DURATION_5 + BLINK_DURATION_5. + 6 + + + BLINK_DURATION_6 + (APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) . + 7 + + + BLINK_DURATION_7 + APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe). + 8 + + + + led-stream-pulse-stretch-type + enumeration + Specifies the LED stream length of stretching for dynamic signals. + + PULSE_STRETCH_0_NO + PULSE_STRETCH_0_NO. + 1 + + + PULSE_STRETCH_1 + PULSE_STRETCH_1. + 2 + + + PULSE_STRETCH_2 + PULSE_STRETCH_2. + 3 + + + PULSE_STRETCH_3 + PULSE_STRETCH_3. + 4 + + + PULSE_STRETCH_4 + PULSE_STRETCH_4. + 5 + + + PULSE_STRETCH_5 + PULSE_STRETCH_5. + 6 + + + PULSE_STRETCH_6 + (APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe). + 7 + + + PULSE_STRETCH_7 + (APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe). + 8 + + + + led-stream-clock-out-frequency-type + enumeration + Specifies the LED stream blink cycle duty cycle type. + + _CLOCK_OUT_FREQUENCY_500 + 500 KHz LED clock frequency. + 1 + + + CLOCK_OUT_FREQUENCY_1000 + 1 MHz LED clock frequency. + 2 + + + CLOCK_OUT_FREQUENCY_2000 + 2 MHz LED clock frequency. + 3 + + + CLOCK_OUT_FREQUENCY_3000 + 3 MHz LED clock frequency. + 4 + + + + led-stream-class5-select-type + enumeration + Specifies the LED stream indication displayed on class5 (for dual-media port/phy). + + CLASS_5_SELECT_HALF_DUPLEX + Half Duplex is displayed on class5. + 1 + + + CLASS_5_SELECT_FIBER_LINK_UP + If port is a dual media port, Fiber Link Up is displayed on class5. + 2 + + + + led-stream-class13-select-type + enumeration + Specifies the LED stream indication displayed on class13 (for dual-media port/phy). + + CLASS_13_SELECT_LINK_DOWN + Link Down is displayed on class13. + 1 + + + CLASS_13_SELECT_COPPER_LINK_UP + If port is a dual media port, Copper Link Up is displayed on class13. + 2 + + + + led-class-num-type + uint32 + Led Class number + 0 + 11 + + + boolean-type + enumeration + Boolean 32 bits , due to bing endian + + false + False + 0 + + + true + True + 1 + + + + bus-id-type + uint32 + Bus Id Type, PCI/SMI + 0 + 255 + + + function-id-type + uint32 + Function Id Type, PCI/SMI + 0 + 255 + + + domain-type + uint32 + Domain, PCI/SMI + 0 + 255 + + + led-interface-type + uint32 + Led interface + 0 + 255 + + + led-position-type + uint32 + Led position + 0 + 63 + + + serdes-lane-type + uint32 + serdes lane + 0 + 7 + + + cpu-type + enumeration + The CPU Internal/External + + external + Extrenal connected CPU + 0 + + + internal + Internal CPU + 1 + + + + led-stream-clock-frequency-type + uint32 + Led Clock Frequency Sip6 + 500 + 80000 + + + led-unit-type + uint32 + Led units + 1 + 16 + + + led-unit-or-no-unit-type + uint32 + Led units, 0 for no Unit + 0 + 16 + + + led-group-type + uint32 + Led Group + 0 + 1 + + + led-stream-force-data-type + string + A hexadecimal string with octets represented as hex digits +separated by colons. The canonical representation uses +lowercase characters. + 3 + 11 + + + bit-type + uint32 + Bit range 0..31 + 0 + 31 + + + bit-size-type + uint32 + Bit leng 1..32 + 1 + 32 + + + led-sip-type + enumeration + The LED scehme + + na + NA + 0 + + + sip5 + SIP5: AC3x + 5 + + + sip6 + SIP6: Falcon, AC5x + 6 + + + + port-cscd-type + enumeration + Specifies the cascade port type. + + DSA_1_WORD + DSA Regular + 0 + + + DSA_2_WORDS + DSA Extended + 1 + + + NETWORK + Network. + 2 + + + DSA_3_WORDS + DSA 3 Words + 3 + + + DSA_4_WORD + DSA 4 Words + 4 + + + + trunk-cscd-type + uint32 + Specifies the Cascade Trunk id. + 0 + 127 + + + port-trunk-cscd-type + enumeration + Specifies the cascade port type. + + cscdPort + Cascade port + 0 + + + cscdTrunk + Csacde trunk + 1 + + + + hash-cscd-type + enumeration + Specifies the hash used by cascade trunk. + + pkt + Hash based on packet + 0 + + + srcPort + Hash based on source port + 1 + + + + asic-type + enumeration + ASIC Type + + ASIC_AC3X + AC3X + 0 + + + ASIC_AC5X + AC5X + 1 + + + ASIC_Falcon + FALCON + 2 + + + + mpp-num-type + uint8 + Specifies the MPP pin number. + 0 + 63 + + + mpp-select-type + uint8 + Specifies the MPP pin value. + 0 + 15 + + + ASIC_Falcon + Falcon-3.2T-128x25G + linux-static + linux-static + autoscan + external + pci + atu + + 0 + 0 + ASK-PP-F3_2T-128x25G.xml + ASK-L1-F3_2T-128x25G.xml + sip6 + + 0 + + ethernet_mac + 0 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 1 + + ethernet_mac + 1 + false + + + NA + + + + false + + + + 2 + + ethernet_mac + 2 + false + + + NA + + + + false + + + + 3 + + ethernet_mac + 3 + false + + + NA + + + + false + + + + 4 + + ethernet_mac + 4 + false + + + NA + + + + + 2 + true + + false + + + + 5 + + ethernet_mac + 5 + false + + + NA + + + + false + + + + 6 + + ethernet_mac + 6 + false + + + NA + + + + false + + + + 7 + + ethernet_mac + 7 + false + + + NA + + + + false + + + + 8 + + ethernet_mac + 8 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 9 + + ethernet_mac + 9 + false + + + NA + + + + + 2 + true + + false + + + + 10 + + ethernet_mac + 10 + false + + + NA + + + + + 2 + true + + false + + + + 11 + + ethernet_mac + 11 + false + + + NA + + + + + 2 + true + + false + + + + 12 + + ethernet_mac + 12 + false + + + NA + + + + + 2 + true + + false + + + + 13 + + ethernet_mac + 13 + false + + + NA + + + + + 2 + true + + false + + + + 14 + + ethernet_mac + 14 + false + + + NA + + + + + 2 + true + + false + + + + 15 + + ethernet_mac + 15 + false + + + NA + + + + + 2 + true + + false + + + + 16 + + ethernet_mac + 16 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 17 + + ethernet_mac + 17 + false + + + NA + + + + + 2 + true + + false + + + + 18 + + ethernet_mac + 18 + false + + + NA + + + + + 2 + true + + false + + + + 19 + + ethernet_mac + 19 + false + + + NA + + + + + 2 + true + + false + + + + 20 + + ethernet_mac + 20 + false + + + NA + + + + + 2 + true + + false + + + + 21 + + ethernet_mac + 21 + false + + + NA + + + + + 2 + true + + false + + + + 22 + + ethernet_mac + 22 + false + + + NA + + + + + 2 + true + + false + + + + 23 + + ethernet_mac + 23 + false + + + NA + + + + + 2 + true + + false + + + + 24 + + ethernet_mac + 24 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 25 + + ethernet_mac + 25 + false + + + NA + + + + + 2 + true + + false + + + + 26 + + ethernet_mac + 26 + false + + + NA + + + + + 2 + true + + false + + + + 27 + + ethernet_mac + 27 + false + + + NA + + + + + 2 + true + + false + + + + 28 + + ethernet_mac + 28 + false + + + NA + + + + + 2 + true + + false + + + + 29 + + ethernet_mac + 29 + false + + + NA + + + + + 2 + true + + false + + + + 30 + + ethernet_mac + 30 + false + + + NA + + + + + 2 + true + + false + + + + 31 + + ethernet_mac + 31 + false + + + NA + + + + + 2 + true + + false + + + + 32 + + ethernet_mac + 32 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 33 + + ethernet_mac + 33 + false + + + NA + + + + + 2 + true + + false + + + + 34 + + ethernet_mac + 34 + false + + + NA + + + + + 2 + true + + false + + + + 35 + + ethernet_mac + 35 + false + + + NA + + + + + 2 + true + + false + + + + 36 + + ethernet_mac + 36 + false + + + NA + + + + + 2 + true + + false + + + + 37 + + ethernet_mac + 37 + false + + + NA + + + + + 2 + true + + false + + + + 38 + + ethernet_mac + 38 + false + + + NA + + + + + 2 + true + + false + + + + 39 + + ethernet_mac + 39 + false + + + NA + + + + + 2 + true + + false + + + + 40 + + ethernet_mac + 40 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 41 + + ethernet_mac + 41 + false + + + NA + + + + + 2 + true + + false + + + + 42 + + ethernet_mac + 42 + false + + + NA + + + + + 2 + true + + false + + + + 43 + + ethernet_mac + 43 + false + + + NA + + + + + 2 + true + + false + + + + 44 + + ethernet_mac + 44 + false + + + NA + + + + + 2 + true + + false + + + + 45 + + ethernet_mac + 45 + false + + + NA + + + + + 2 + true + + false + + + + 46 + + ethernet_mac + 46 + false + + + NA + + + + + 2 + true + + false + + + + 47 + + ethernet_mac + 47 + false + + + NA + + + + + 2 + true + + false + + + + 48 + + ethernet_mac + 48 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 49 + + ethernet_mac + 49 + false + + + NA + + + + + 2 + true + + false + + + + 50 + + ethernet_mac + 50 + false + + + NA + + + + + 2 + true + + false + + + + 51 + + ethernet_mac + 51 + false + + + NA + + + + + 2 + true + + false + + + + 52 + + ethernet_mac + 52 + false + + + NA + + + + + 2 + true + + false + + + + 53 + + ethernet_mac + 53 + false + + + NA + + + + + 2 + true + + false + + + + 54 + + ethernet_mac + 54 + false + + + NA + + + + + 2 + true + + false + + + + 55 + + ethernet_mac + 55 + false + + + NA + + + + + 2 + true + + false + + + + 56 + + ethernet_mac + 56 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 57 + + ethernet_mac + 57 + false + + + NA + + + + + 2 + true + + false + + + + 58 + + ethernet_mac + 58 + false + + + NA + + + + + 2 + true + + false + + + + 59 + + ethernet_mac + 59 + false + + + NA + + + + + 2 + true + + false + + + + 60 + + ethernet_mac + 60 + false + + + NA + + + + + 2 + true + + false + + + + 64 + + ethernet_mac + 61 + false + + + NA + + + + + 2 + true + + false + + + + 65 + + ethernet_mac + 62 + false + + + NA + + + + + 2 + true + + false + + + + 66 + + ethernet_mac + 63 + false + + + NA + + + + + 2 + true + + false + + + + 67 + + ethernet_mac + 64 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 68 + + ethernet_mac + 65 + false + + + NA + + + + + 2 + true + + false + + + + 69 + + ethernet_mac + 66 + false + + + NA + + + + + 2 + true + + false + + + + 70 + + ethernet_mac + 67 + false + + + NA + + + + + 2 + true + + false + + + + 130 + + ethernet_mac + 127 + false + + + NA + + + + + 2 + true + + false + + + + 129 + + ethernet_mac + 126 + false + + + NA + + + + + 2 + true + + false + + + + 128 + + ethernet_mac + 125 + false + + + NA + + + + + 2 + true + + false + + + + 127 + + ethernet_mac + 124 + false + + + NA + + + + + 2 + true + + false + + + + 126 + + ethernet_mac + 123 + false + + + NA + + + + + 2 + true + + false + + + + 125 + + ethernet_mac + 122 + false + + + NA + + + + + 2 + true + + false + + + + 124 + + ethernet_mac + 121 + false + + + NA + + + + + 2 + true + + false + + + + 123 + + ethernet_mac + 120 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 122 + + ethernet_mac + 119 + false + + + NA + + + + + 2 + true + + false + + + + 121 + + ethernet_mac + 118 + false + + + NA + + + + + 2 + true + + false + + + + 120 + + ethernet_mac + 117 + false + + + NA + + + + + 2 + true + + false + + + + 119 + + ethernet_mac + 116 + false + + + NA + + + + + 2 + true + + false + + + + 118 + + ethernet_mac + 115 + false + + + NA + + + + + 2 + true + + false + + + + 117 + + ethernet_mac + 114 + false + + + NA + + + + + 2 + true + + false + + + + 116 + + ethernet_mac + 113 + false + + + NA + + + + + 2 + true + + false + + + + 115 + + ethernet_mac + 112 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 114 + + ethernet_mac + 111 + false + + + NA + + + + + 2 + true + + false + + + + 113 + + ethernet_mac + 110 + false + + + NA + + + + + 2 + true + + false + + + + 112 + + ethernet_mac + 109 + false + + + NA + + + + + 2 + true + + false + + + + 111 + + ethernet_mac + 108 + false + + + NA + + + + + 2 + true + + false + + + + 110 + + ethernet_mac + 107 + false + + + NA + + + + + 2 + true + + false + + + + 109 + + ethernet_mac + 106 + false + + + NA + + + + + 2 + true + + false + + + + 108 + + ethernet_mac + 105 + false + + + NA + + + + + 2 + true + + false + + + + 107 + + ethernet_mac + 104 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 106 + + ethernet_mac + 103 + false + + + NA + + + + + 2 + true + + false + + + + 105 + + ethernet_mac + 102 + false + + + NA + + + + + 2 + true + + false + + + + 104 + + ethernet_mac + 101 + false + + + NA + + + + + 2 + true + + false + + + + 103 + + ethernet_mac + 100 + false + + + NA + + + + + 2 + true + + false + + + + 102 + + ethernet_mac + 99 + false + + + NA + + + + + 2 + true + + false + + + + 101 + + ethernet_mac + 98 + false + + + NA + + + + + 2 + true + + false + + + + 100 + + ethernet_mac + 97 + false + + + NA + + + + + 2 + true + + false + + + + 99 + + ethernet_mac + 96 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 98 + + ethernet_mac + 95 + false + + + NA + + + + + 2 + true + + false + + + + 97 + + ethernet_mac + 94 + false + + + NA + + + + + 2 + true + + false + + + + 96 + + ethernet_mac + 93 + false + + + NA + + + + + 2 + true + + false + + + + 95 + + ethernet_mac + 92 + false + + + NA + + + + + 2 + true + + false + + + + 94 + + ethernet_mac + 91 + false + + + NA + + + + + 2 + true + + false + + + + 93 + + ethernet_mac + 90 + false + + + NA + + + + + 2 + true + + false + + + + 92 + + ethernet_mac + 89 + false + + + NA + + + + + 2 + true + + false + + + + 91 + + ethernet_mac + 88 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 90 + + ethernet_mac + 87 + false + + + NA + + + + + 2 + true + + false + + + + 89 + + ethernet_mac + 86 + false + + + NA + + + + + 2 + true + + false + + + + 88 + + ethernet_mac + 85 + false + + + NA + + + + + 2 + true + + false + + + + 87 + + ethernet_mac + 84 + false + + + NA + + + + + 2 + true + + false + + + + 86 + + ethernet_mac + 83 + false + + + NA + + + + + 2 + true + + false + + + + 85 + + ethernet_mac + 82 + false + + + NA + + + + + 2 + true + + false + + + + 84 + + ethernet_mac + 81 + false + + + NA + + + + + 2 + true + + false + + + + 83 + + ethernet_mac + 80 + false + + + NA + + MAP0 + + 0 + + 2 + true + + false + + + + 82 + + ethernet_mac + 79 + false + + + NA + + + + + 2 + true + + false + + + + 81 + + ethernet_mac + 78 + false + + + NA + + + + + 2 + true + + false + + + + 80 + + ethernet_mac + 77 + false + + + NA + + + + + 2 + true + + false + + + + 79 + + ethernet_mac + 76 + false + + + NA + + + + + 2 + true + + false + + + + 78 + + ethernet_mac + 75 + false + + + NA + + + + + 2 + true + + false + + + + 77 + + ethernet_mac + 74 + false + + + NA + + + + + 2 + true + + false + + + + 76 + + ethernet_mac + 73 + false + + + NA + + + + + 2 + true + + false + + + + 75 + + ethernet_mac + 72 + false + + + NA + + MAP1 + + 1 + + 2 + true + + false + + + + 74 + + ethernet_mac + 71 + false + + + NA + + + + + 2 + true + + false + + + + 73 + + ethernet_mac + 70 + false + + + NA + + + + + 2 + true + + false + + + + 72 + + ethernet_mac + 69 + false + + + NA + + + + + 2 + true + + false + + + + 71 + + ethernet_mac + 68 + false + + + NA + + + + + 2 + true + + false + + + + 131 + + ethernet_mac + 128 + false + + + NA + + + + + + 2 + true + + false + + + + 132 + + ethernet_mac + 135 + false + + + NA + + + + + 2 + true + + false + + + + 63 + + cpu_sdma + 136 + false + + + + 133 + + cpu_sdma + 137 + false + + + + 134 + + cpu_sdma + 138 + false + + + + 135 + + cpu_sdma + 139 + false + + + + 7 + true + false + + + 1 + true + false + + + 6 + true + true + + + 0 + true + false + + + 5 + true + false + + + 3 + true + true + + + 4 + true + true + + + 2 + false + false + + + 8 + false + true + + + 14 + false + false + + + 9 + false + false + + + 15 + false + true + + + 10 + false + true + + + 12 + false + true + + + 11 + true + false + + + 13 + false + true + + + 23 + false + false + + + 17 + false + false + + + 22 + true + false + + + 16 + false + true + + + 21 + false + false + + + 19 + true + true + + + 20 + true + false + + + 18 + false + true + + + 24 + false + false + + + 30 + false + false + + + 25 + false + true + + + 31 + false + false + + + 26 + true + false + + + 28 + false + true + + + 27 + false + true + + + 29 + false + true + + + 39 + false + false + + + 33 + true + false + + + 38 + false + false + + + 32 + false + false + + + 37 + true + false + + + 35 + true + true + + + 36 + true + false + + + 34 + false + false + + + 40 + false + false + + + 41 + true + true + + + 46 + true + true + + + 47 + true + true + + + 42 + true + false + + + 44 + false + false + + + 43 + false + true + + + 45 + true + false + + + 55 + false + false + + + 49 + true + false + + + 54 + true + true + + + 48 + false + true + + + 53 + true + false + + + 51 + false + true + + + 52 + false + true + + + 50 + false + true + + + 56 + false + false + + + 62 + true + false + + + 57 + false + true + + + 63 + true + true + + + 58 + false + false + + + 60 + false + true + + + 59 + false + true + + + 61 + false + true + + + 71 + false + false + + + 65 + true + false + + + 70 + false + true + + + 64 + true + true + + + 69 + true + false + + + 67 + true + true + + + 68 + true + true + + + 66 + true + true + + + 72 + true + false + + + 78 + false + false + + + 73 + false + true + + + 79 + true + true + + + 74 + true + false + + + 76 + true + true + + + 75 + true + true + + + 77 + false + true + + + 87 + false + false + + + 81 + false + false + + + 86 + false + false + + + 80 + true + false + + + 85 + false + true + + + 83 + true + true + + + 84 + true + false + + + 82 + false + false + + + 88 + true + false + + + 94 + true + false + + + 89 + false + false + + + 95 + true + false + + + 90 + true + false + + + 92 + false + true + + + 91 + false + false + + + 93 + false + false + + + 103 + true + false + + + 97 + true + false + + + 102 + true + false + + + 96 + true + true + + + 101 + true + false + + + 99 + true + true + + + 100 + true + true + + + 98 + false + true + + + 104 + true + false + + + 110 + false + false + + + 105 + true + true + + + 111 + true + false + + + 106 + true + false + + + 108 + false + false + + + 107 + false + true + + + 109 + true + false + + + 119 + true + false + + + 113 + true + true + + + 118 + true + true + + + 112 + true + false + + + 117 + true + false + + + 115 + false + false + + + 116 + true + false + + + 114 + false + false + + + 120 + false + false + + + 126 + false + false + + + 121 + false + true + + + 127 + false + true + + + 122 + true + false + + + 124 + false + true + + + 123 + false + true + + + 125 + false + true + + + 128 + false + true + + + 135 + true + false + + + 0 + + ORDER_MODE_BY_CLASS + BLINK_DUTY_CYCLE_0 + BLINK_DURATION_0 + BLINK_DUTY_CYCLE_0 + BLINK_DURATION_1 + PULSE_STRETCH_1 + false + 1627 + false + + 1 + 64 + 66 + false + + + 2 + 64 + 65 + false + + + 3 + 64 + 65 + false + + + 4 + 64 + 66 + false + + + 5 + 64 + 66 + false + + + 6 + 64 + 65 + false + + + 7 + 64 + 65 + false + + + 8 + 64 + 66 + false + + + + 0 + PORT_TYPE_XG + false + BLINK_SELECT_0 + false + true + false + + + 1 + PORT_TYPE_XG + false + BLINK_SELECT_0 + false + true + false + + + 2 + PORT_TYPE_XG + true + BLINK_SELECT_0 + false + true + true + + + 3 + PORT_TYPE_XG + false + BLINK_SELECT_0 + false + true + false + + + 4 + PORT_TYPE_XG + false + BLINK_SELECT_0 + false + true + false + + + 5 + PORT_TYPE_XG + false + BLINK_SELECT_0 + false + true + false + + + + /tmp/cpss_uds + + 8 + + MAP0 + + 7 + + + 1 + + + 6 + + + 0 + + + 5 + + + 3 + + + 4 + + + 2 + + + + MAP1 + + 0 + + + 6 + + + 1 + + + 7 + + + 2 + + + 4 + + + 3 + + + 5 + + + + + \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.md5 new file mode 100644 index 00000000000..084f63926d4 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.md5 @@ -0,0 +1 @@ +baf77e7f450def2266516782d159cbb4 \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.xml new file mode 100644 index 00000000000..7a2208bf90e --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.xml @@ -0,0 +1,1891 @@ + + + + + + asic-type + enumeration + ASIC Type + + ASIC_AC3X + AC3X + 0 + + + ASIC_AC5X + AC5X + 1 + + + ASIC_Falcon + FALCON + 2 + + + + interface-mode-type + enumeration + Specifies supported Interface modes + + 1000BASE_X + 1G + 6 + + + SGMII + 1G , 2.5G + 3 + + + QSGMII + 1G + 13 + + + KR + 10G, 12G, 20G, 40G, 100G + 16 + + + SR_LR + 5G, 10G, 12G, 20G, 40G + 20 + + + KR2 + + 27 + + + KR4 + + 28 + + + SR_LR2 + + 29 + + + SR_LR4 + 100G + 30 + + + KR_C + CONSORTIUM - 25G + 32 + + + CR_C + CONSORTIUM - 25G + 33 + + + KR2_C + CONSORTIUM - 50G + 34 + + + CR2_C + CONSORTIUM - 50G + 35 + + + CR + + 36 + + + CR2 + + 37 + + + CR4 + + 38 + + + KR_S + + 39 + + + CR_S + + 40 + + + KR8 + + 41 + + + CR8 + + 42 + + + SR_LR8 + + 43 + + + USX_10G_QXGMII + + 51 + + + USX_20G_QXGMII + + 52 + + + USX_OUSGMII + + 53 + + + USX_20G_OXGMII + + 54 + + + NA + + 57 + + + + port-speed-type + enumeration + Specifies supported speeds + + 1G + 1G + 2 + + + 10G + 10G + 3 + + + 2500M + 2.5G + 5 + + + 5G + 5G + 6 + + + 25G + 25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E + 21 + + + 40G + 40G + 9 + + + 50G + 50G + 14 + + + 100G + 100G + 13 + + + 200G + 200G + 24 + + + 400G + 400G + 25 + + + NA + NA + 35 + + + + fec-type + enumeration + Rx parameter type + + enabled + Enabled + 0 + + + disabled + Disabled + 1 + + + rs_enabled + RS FEC enabled + 2 + + + both_enabled + Both enabled + 3 + + + rs_544_514_enabled + RS FEC 544 and 514 + 4 + + + + physical-port-num-type + uint32 + PHYSICAL PORT NUM + 0 + 1023 + + + tx-param-type + enumeration + Tx parameter type + + pre + pre + 0 + + + post + post + 1 + + + peak + peak + 2 + + + + rx-param-type + enumeration + Rx parameter type + + dataRate + dataRate + 0 + + + res1Sel + res1Sel + 1 + + + res2Sel + res2Sel + 2 + + + cap1Sel + cap1Sel + 3 + + + cap2Sel + cap2Sel + 4 + + + minCap + minCap + 5 + + + minCapN + minCapN + 6 + + + sumfBoostTargetC0 + sumfBoostTargetC0 + 7 + + + sumfBoostTargetC1 + sumfBoostTargetC1 + 8 + + + sumfBoostTargetC2 + sumfBoostTargetC2 + 9 + + + midpointPhaseOs0 + midpointPhaseOs0 + 10 + + + midpointPhaseOs1 + midpointPhaseOs1 + 11 + + + midpointPhaseOs2 + midpointPhaseOs2 + 12 + + + selmufi + selmufi + 13 + + + selmuff + selmuff + 14 + + + selmupi + selmupi + 15 + + + selmupf + selmupf + 16 + + + midpointLargeThresKLane + midpointLargeThresKLane + 17 + + + midpointSmallThresKLane + midpointSmallThresKLane + 18 + + + midpointLargeThresCLane + midpointLargeThresCLane + 19 + + + midpointSmallThresCLane + midpointSmallThresCLane + 20 + + + inxSumfMidpointAdatptiveEnLane + inxSumfMidpointAdatptiveEnLane + 21 + + + dfeResF0aHighThresInitLane + dfeResF0aHighThresInitLane + 22 + + + dfeResF0aHighThresEndLane + dfeResF0aHighThresEndLane + 23 + + + squelch + squelch + 24 + + + align90 + align90 + 25 + + + sampler + sampler + 26 + + + slewRateCtrl0 + slewRateCtrl0 + 27 + + + slewRateCtrl1 + slewRateCtrl1 + 28 + + + EO + EO + 29 + + + minCap1 + minCap1 + 30 + + + maxCap1 + maxCap1 + 31 + + + minRes1 + minRes1 + 32 + + + maxRes1 + maxRes1 + 33 + + + + boolean-type + enumeration + Boolean 32 bits , due to big endian + + false + False + 0 + + + true + True + 1 + + + + serdes-type + enumeration + Serdes Type + + NA + No serdes + 0 + + + AVAGO + AVAGO + 1 + + + COMPHY + COMPHY + 2 + + + COMPHY_C12G + COMPHY_C12G + 3 + + + COMPHY_C28G + COMPHY_C28G + 4 + + + COMPHY_C112G + COMPHY_C112G + 5 + + + + phy-serdes-type + enumeration + Phy Serdes Type + + NA + No serdes + 0 + + + COMPHY + COMPHY + 1 + + + COMPHY_C28G + COMPHY_C28G + 2 + + + + port-interconnect-profile-type + enumeration + Enumerator of interconnect profile. + + profile_default + Profile Default + 0 + + + profile_1 + Profile 1 + 1 + + + profile_2 + Profile 2 + 2 + + + + ASIC_Falcon + + + 100GR2 + + CR2 + 100G + rs_544_514_enabled + + + KR2 + 100G + rs_544_514_enabled + + + SR_LR2 + 100G + rs_544_514_enabled + + + SR_LR2 + 50G + rs_enabled + + + CR2 + 50G + rs_enabled + + + KR2 + 50G + rs_enabled + + + CR2 + 100G + rs_544_514_enabled + rs_544_514_enabled + + + KR2 + 100G + rs_544_514_enabled + rs_544_514_enabled + + + CR2 + 50G + rs_enabled + rs_enabled + + + KR2 + 50G + rs_enabled + rs_enabled + + + + 100GR4 + + CR4 + 100G + rs_enabled + + + KR4 + 100G + rs_enabled + + + SR_LR4 + 100G + rs_enabled + + + CR4 + 100G + rs_enabled + rs_enabled + + + KR4 + 100G + rs_enabled + rs_enabled + + + + 10GR1 + + KR + 10G + enabled + + + SR_LR + 10G + enabled + + + KR + 10G + enabled + enabled + + + + 10GR1Fix + + KR + 10G + disabled + + + + 200GR4 + + CR4 + 200G + rs_544_514_enabled + + + SR_LR4 + 100G + rs_enabled + + + KR4 + 100G + rs_enabled + + + CR4 + 100G + rs_enabled + + + KR4 + 200G + rs_544_514_enabled + + + SR_LR4 + 200G + rs_544_514_enabled + + + CR4 + 200G + rs_544_514_enabled + rs_544_514_enabled + + + KR4 + 200G + rs_544_514_enabled + rs_544_514_enabled + + + CR4 + 100G + rs_enabled + rs_enabled + + + KR4 + 100G + rs_enabled + rs_enabled + + + + 25GR1 + + CR + 25G + rs_enabled + + + KR + 25G + rs_enabled + + + KR + 10G + enabled + + + SR_LR + 25G + rs_enabled + + + SR_LR + 10G + enabled + + + CR + 25G + rs_enabled + rs_enabled + + + KR + 25G + rs_enabled + rs_enabled + + + KR + 10G + enabled + enabled + + + + 400GR8 + + CR8 + 400G + rs_544_514_enabled + + + KR8 + 400G + rs_544_514_enabled + + + SR_LR8 + 400G + rs_544_514_enabled + + + CR8 + 400G + rs_544_514_enabled + rs_544_514_enabled + + + KR8 + 400G + rs_544_514_enabled + rs_544_514_enabled + + + + 50GR1 + + CR + 50G + rs_544_514_enabled + + + KR + 50G + rs_544_514_enabled + + + CR + 25G + rs_enabled + + + KR + 25G + rs_enabled + + + KR + 10G + enabled + + + SR_LR + 50G + rs_544_514_enabled + + + SR_LR + 25G + rs_enabled + + + SR_LR + 10G + enabled + + + CR + 50G + rs_544_514_enabled + rs_544_514_enabled + + + KR + 50G + rs_544_514_enabled + rs_544_514_enabled + + + CR + 25G + rs_enabled + rs_enabled + + + KR + 25G + rs_enabled + rs_enabled + + + KR + 10G + enabled + enabled + + + + + + 0 + AVAGO + profile_default + 100GR4 + true + + 0 + 25GR1 + + 100GR4 + + + + 1 + 25GR1 + + + + + + 2 + 25GR1 + + + + + + 3 + 25GR1 + + + + + + 4 + 25GR1 + + 100GR4 + + + + 5 + 25GR1 + + + + + + 6 + 25GR1 + + + + + + 7 + 25GR1 + + + + + + + 8 + AVAGO + profile_default + 100GR4 + true + + 8 + 25GR1 + + 100GR4 + + + + 9 + 25GR1 + + + + + + 10 + 25GR1 + + + + + + 11 + 25GR1 + + + + + + 12 + 25GR1 + + 100GR4 + + + + 13 + 25GR1 + + + + + + 14 + 25GR1 + + + + + + 15 + 25GR1 + + + + + + + 16 + AVAGO + profile_default + 100GR4 + true + + 16 + 25GR1 + + 100GR4 + + + + 17 + 25GR1 + + + + + + 18 + 25GR1 + + + + + + 19 + 25GR1 + + + + + + 20 + 25GR1 + + 100GR4 + + + + 21 + 25GR1 + + + + + + 22 + 25GR1 + + + + + + 23 + 25GR1 + + + + + + + 24 + AVAGO + profile_default + 100GR4 + true + + 24 + 25GR1 + + 100GR4 + + + + 25 + 25GR1 + + + + + + 26 + 25GR1 + + + + + + 27 + 25GR1 + + + + + + 28 + 25GR1 + + 100GR4 + + + + 29 + 25GR1 + + + + + + 30 + 25GR1 + + + + + + 31 + 25GR1 + + + + + + + 32 + AVAGO + profile_default + 100GR4 + true + + 32 + 25GR1 + + 100GR4 + + + + 33 + 25GR1 + + + + + + 34 + 25GR1 + + + + + + 35 + 25GR1 + + + + + + 36 + 25GR1 + + 100GR4 + + + + 37 + 25GR1 + + + + + + 38 + 25GR1 + + + + + + 39 + 25GR1 + + + + + + + 40 + AVAGO + profile_default + 100GR4 + true + + 40 + 25GR1 + + 100GR4 + + + + 41 + 25GR1 + + + + + + 42 + 25GR1 + + + + + + 43 + 25GR1 + + + + + + 44 + 25GR1 + + 100GR4 + + + + 45 + 25GR1 + + + + + + 46 + 25GR1 + + + + + + 47 + 25GR1 + + + + + + + 48 + AVAGO + profile_default + 100GR4 + true + + 48 + 25GR1 + + 100GR4 + + + + 49 + 25GR1 + + + + + + 50 + 25GR1 + + + + + + 51 + 25GR1 + + + + + + 52 + 25GR1 + + 100GR4 + + + + 53 + 25GR1 + + + + + + 54 + 25GR1 + + + + + + 55 + 25GR1 + + + + + + + 56 + AVAGO + profile_default + 100GR4 + true + + 56 + 25GR1 + + 100GR4 + + + + 57 + 25GR1 + + + + + + 58 + 25GR1 + + + + + + 59 + 25GR1 + + + + + + 60 + 25GR1 + + 100GR4 + + + + 64 + 25GR1 + + + + + + 65 + 25GR1 + + + + + + 66 + 25GR1 + + + + + + + 67 + AVAGO + profile_default + 100GR4 + true + + 67 + 25GR1 + + 100GR4 + + + + 68 + 25GR1 + + + + + + 69 + 25GR1 + + + + + + 70 + 25GR1 + + + + + + 71 + 25GR1 + + 100GR4 + + + + 72 + 25GR1 + + + + + + 73 + 25GR1 + + + + + + 74 + 25GR1 + + + + + + + 75 + AVAGO + profile_default + 100GR4 + true + + 75 + 25GR1 + + 100GR4 + + + + 76 + 25GR1 + + + + + + 77 + 25GR1 + + + + + + 78 + 25GR1 + + + + + + 79 + 25GR1 + + 100GR4 + + + + 80 + 25GR1 + + + + + + 81 + 25GR1 + + + + + + 82 + 25GR1 + + + + + + + 83 + AVAGO + profile_default + 100GR4 + true + + 83 + 25GR1 + + 100GR4 + + + + 84 + 25GR1 + + + + + + 85 + 25GR1 + + + + + + 86 + 25GR1 + + + + + + 87 + 25GR1 + + 100GR4 + + + + 88 + 25GR1 + + + + + + 89 + 25GR1 + + + + + + 90 + 25GR1 + + + + + + + 91 + AVAGO + profile_default + 100GR4 + true + + 91 + 25GR1 + + 100GR4 + + + + 92 + 25GR1 + + + + + + 93 + 25GR1 + + + + + + 94 + 25GR1 + + + + + + 95 + 25GR1 + + 100GR4 + + + + 96 + 25GR1 + + + + + + 97 + 25GR1 + + + + + + 98 + 25GR1 + + + + + + + 99 + AVAGO + profile_default + 100GR4 + true + + 99 + 25GR1 + + 100GR4 + + + + 100 + 25GR1 + + + + + + 101 + 25GR1 + + + + + + 102 + 25GR1 + + + + + + 103 + 25GR1 + + 100GR4 + + + + 104 + 25GR1 + + + + + + 105 + 25GR1 + + + + + + 106 + 25GR1 + + + + + + + 107 + AVAGO + profile_default + 100GR4 + true + + 107 + 25GR1 + + 100GR4 + + + + 108 + 25GR1 + + + + + + 109 + 25GR1 + + + + + + 110 + 25GR1 + + + + + + 111 + 25GR1 + + 100GR4 + + + + 112 + 25GR1 + + + + + + 113 + 25GR1 + + + + + + 114 + 25GR1 + + + + + + + 115 + AVAGO + profile_default + 100GR4 + true + + 115 + 25GR1 + + 100GR4 + + + + 116 + 25GR1 + + + + + + 117 + 25GR1 + + + + + + 118 + 25GR1 + + + + + + 119 + 25GR1 + + 100GR4 + + + + 120 + 25GR1 + + + + + + 121 + 25GR1 + + + + + + 122 + 25GR1 + + + + + + + 123 + AVAGO + profile_default + 100GR4 + true + + 123 + 25GR1 + + 100GR4 + + + + 124 + 25GR1 + + + + + + 125 + 25GR1 + + + + + + 126 + 25GR1 + + + + + + 127 + 25GR1 + + 100GR4 + + + + 128 + 25GR1 + + + + + + 129 + 25GR1 + + + + + + 130 + 25GR1 + + + + + + + 131 + AVAGO + profile_default + 10GR1Fix + false + + + 132 + AVAGO + profile_default + 10GR1Fix + false + + + + \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.md5 new file mode 100644 index 00000000000..4c6962b9691 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.md5 @@ -0,0 +1 @@ +9699d7ac6395ccab96dec333c782dc1d \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.xml new file mode 100644 index 00000000000..7cd85e01698 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.xml @@ -0,0 +1,1180 @@ + + + + + + std-string + string + standard string. + 1 + 100 + + + queue-id-type + uint32 + Queue id + 0 + 7 + + + precent-type + uint32 + Precent + 0 + 100 + + + phaThreadId-type + uint32 + Thread id + 1 + 255 + + + routing-mode-type + enumeration + Specifies routing mode. + + POLICY_BASED_ROUTING_ONLY + PBR only + 0 + + + TCAM_ROUTER_BASED + Router engine or PBR + 1 + + + + shared-table-mode-type + enumeration + Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match) + + MID_L3_MID_L2_NO_EM + MID_L3_MID_L2_NO_EM + 0 + + + MID_L3_MID_L2_MIN_EM + MID_L3_MID_L2_MIN_EM + 1 + + + LOW_MAX_L3_MID_LOW_L2_NO_EM + LOW_MAX_L3_MID_LOW_L2_NO_EM + 2 + + + MAX_L3_MIN_L2_NO_EM + MAX_L3_MIN_L2_NO_EM + 3 + + + + pha-firmware-image-id-type + enumeration + Specifies supported Pha image id + + DEFAULT + Default PHA firmware image ID + 0 + + + 01 + 01 firmware image ID + 1 + + + 02 + 02 PHA firmware image ID + 2 + + + + pha-firmware-thread-type + enumeration + Specifies supported Pha thread type + + IOAM_INGRESS_SWITCH_IPV4 + IOAM_INGRESS_SWITCH_IPV4 + 1 + + + IOAM_INGRESS_SWITCH_IPV6 + IOAM_INGRESS_SWITCH_IPV6 + 2 + + + IOAM_TRANSIT_SWITCH_IPV4 + IOAM_TRANSIT_SWITCH_IPV4 + 3 + + + IOAM_TRANSIT_SWITCH_IPV6 + IOAM_TRANSIT_SWITCH_IPV6 + 4 + + + INT_IOAM_MIRRORING + INT_IOAM_MIRRORING + 5 + + + INT_IOAM_EGRESS_SWITCH + INT_IOAM_EGRESS_SWITCH + 6 + + + MPLS_SR_NO_EL + MPLS_SR_NO_EL + 7 + + + MPLS_SR_ONE_EL + MPLS_SR_ONE_EL + 8 + + + MPLS_SR_TWO_EL + MPLS_SR_TWO_EL + 9 + + + MPLS_SR_THREE_EL + MPLS_SR_THREE_EL + 10 + + + UNIFIED_SR + UNIFIED_SR + 11 + + + CLASSIFIER_NSH_OVER_ETHERNET + CLASSIFIER_NSH_OVER_ETHERNET + 12 + + + CLASSIFIER_NSH_OVER_VXLAN_GPE + CLASSIFIER_NSH_OVER_VXLAN_GPE + 13 + + + SFF_NSH_VXLAN_GPE_TO_ETHERNET + SFF_NSH_VXLAN_GPE_TO_ETHERNET + 14 + + + SFF_NSH_ETHERNET_TO_VXLAN_GPE + SFF_NSH_ETHERNET_TO_VXLAN_GPE + 15 + + + IOAM_EGRESS_SWITCH_IPV6 + IOAM_EGRESS_SWITCH_IPV6 + 16 + + + SRV6_END_NODE + SRV6_END_NODE + 17 + + + SRV6_PENULTIMATE_END_NODE + SRV6_PENULTIMATE_END_NODE + 18 + + + SRV6_SRC_NODE_1_SEGMENT + SRV6_SRC_NODE_1_SEGMENT + 19 + + + SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS + SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS + 20 + + + SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS + SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS + 21 + + + SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS + SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS + 22 + + + SGT_NETWORK_ADD_MSB + SGT_NETWORK_ADD_MSB + 23 + + + SGT_NETWORK_FIX + SGT_NETWORK_FIX + 24 + + + SGT_NETWORK_REMOVE + SGT_NETWORK_REMOVE + 25 + + + SGT_EDSA_FIX + SGT_EDSA_FIX + 26 + + + SGT_EDSA_REMOVE + SGT_EDSA_REMOVE + 27 + + + SGT_GBP_FIX_IPV4 + SGT_GBP_FIX_IPV4 + 28 + + + SGT_GBP_FIX_IPV6 + SGT_GBP_FIX_IPV6 + 29 + + + SGT_GBP_REMOVE_IPV4 + SGT_GBP_REMOVE_IPV4 + 30 + + + SGT_GBP_REMOVE_IPV6 + SGT_GBP_REMOVE_IPV6 + 31 + + + PTP_PHY_1_STEP + PTP_PHY_1_STEP + 32 + + + EGRESS_MIRRORING_METADATA + EGRESS_MIRRORING_METADATA + 33 + + + CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4 + CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4 + 34 + + + CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6 + CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6 + 35 + + + CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4 + CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4 + 36 + + + CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6 + CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6 + 37 + + + CC_ERSPAN_TYPE_II_SRC_DEV + CC_ERSPAN_TYPE_II_SRC_DEV + 38 + + + VXLAN_GBP_SOURCE_GROUP_POLICY_ID + VXLAN_GBP_SOURCE_GROUP_POLICY_ID + 39 + + + SRV6_BEST_EFFORT + SRV6_BEST_EFFORT + 40 + + + SRV6_SRC_NODE_1_CONTAINER + SRV6_SRC_NODE_1_CONTAINER + 41 + + + SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS + SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS + 42 + + + SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS + SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS + 43 + + + SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS + SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS + 44 + + + SRV6_END_NODE_COC32_GSID + SRV6_END_NODE_COC32_GSID + 45 + + + IPV4_TTL_INCREMENT + IPV4_TTL_INCREMENT + 46 + + + IPV6_HOP_LIMIT_INCREMENT + IPV6_HOP_LIMIT_INCREMENT + 47 + + + CLEAR_OUTGOING_MTAG_COMMAND + CLEAR_OUTGOING_MTAG_COMMAND + 48 + + + SFLOW_V5_IPV4 + SFLOW_V5_IPV4 + 49 + + + SFLOW_V5_IPV6 + SFLOW_V5_IPV6 + 50 + + + SLS + SLS + 51 + + + + trunk-member-mode-type + enumeration + Specifies supported Pha image id + + NATIVE + NATIVE +* the trunk members are filled +* according to the order given by application. +* Regular trunk may hold max of 8 members. +* Cascade trunk may hold : +* max of 64 members + 0 + + + FLEX + FLEX +* A mode to allows flexibility for +* each Regular trunk to state it's max number of members (before starting to add members). +* (this mode not effect 'cascade trunk' members) +* Regular trunk may hold : max of 4K members. (each trunk set it's own limit) +* Cascade trunk may hold : max of 64 members. + 2 + + + + number-physical-port-type + enumeration + AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024 + + no-ports + no-ports + 0 + + + 64-ports + 64-ports + 64 + + + 128-ports + 128-ports + 128 + + + 256-ports + 256-ports + 256 + + + 512-ports + 512-ports + 512 + + + 1024-ports + 1024-ports + 1024 + + + + serdes-ref-clock-type + enumeration + Specifies serdes refernce clock. + + external_25_single_ended + EXTERNAL_25_SINGLE_ENDED + 0 + + + external_125_single_ended + EXTERNAL_125_SINGLE_ENDED + 1 + + + external_125_diff + EXTERNAL_125_DIFF + 2 + + + external_156_25_single_ended + EXTERNAL_156_25_SINGLE_ENDED + 3 + + + external_156_25_diff + EXTERNAL_156_25_DIFF + 4 + + + internal_125 + INTERNAL_125 + 5 + + + + cpu-port-id-type + uint32 + CPU port id + 0 + 7 + + + rx-buffer-size-type + uint32 + Rx Buffer size + 64 + 10240 + + + tx-sdma-queue-mode-type + enumeration + Specifies TX queue mode. + + Normal + Application + 0 + + + Packet_Generator + Traffic generator + 1 + + + + alloc-method-type + enumeration + Specifies Buffers allocation method. + + Dynamic_Alloc + Dynamic + 0 + + + Static_Alloc + Static + 1 + + + + au_mesage_lenght-type + enumeration + Specifies Buffers allocation method. + + 4_words + 4 Words + 0 + + + 8_words + 8 Words + 1 + + + + boolean-type + enumeration + Boolean 32 bits , due to bing endian + + false + False + 0 + + + true + True + 1 + + + + asic-type + enumeration + ASIC Type + + ASIC_AC3X + AC3X + 0 + + + ASIC_AC5X + AC5X + 1 + + + ASIC_Falcon + FALCON + 2 + + + + ASIC_Falcon + + Falcon-3.2 + + 4294967295 + external_25_single_ended + 2 + 60 + 256-ports + false + true + 0 + + + true + + 4096 + + + 2048 + + + + 0 + 0 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 7 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 6 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 5 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 4 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 3 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 2 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 1 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 0 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 7 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 6 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 5 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 4 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 3 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 2 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 1 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 0 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 7 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 6 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 5 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 4 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 3 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 3 + 2 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 2 + 1 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 1 + 0 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 7 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 6 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 5 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 4 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 3 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 2 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 1 + Static_Alloc + 20 + 20 + 2048 + 0 + + + 0 + 0 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 1 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 2 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 3 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 4 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 5 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 6 + Static_Alloc + Normal + 20 + 0 + 128 + + + 0 + 7 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 0 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 1 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 2 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 3 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 4 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 5 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 6 + Static_Alloc + Normal + 20 + 0 + 128 + + + 1 + 7 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 0 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 1 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 2 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 3 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 4 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 5 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 6 + Static_Alloc + Normal + 20 + 0 + 128 + + + 2 + 7 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 0 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 1 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 2 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 3 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 4 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 5 + Static_Alloc + Normal + 20 + 0 + 128 + + + 3 + 6 + Static_Alloc + Packet_Generator + 256 + 256 + 144 + + + 3 + 7 + Static_Alloc + Packet_Generator + 1 + 1 + 3032 + + + + false + false + false + 0 + 8_words + false + + + + TCAM_ROUTER_BASED + 0 + MID_L3_MID_L2_NO_EM + false + + + true + true + true + true + true + true + + 1023 + FLEX + + true + true + true + true + + false + 02 + 0 + + + + + \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.md5 new file mode 100644 index 00000000000..cfa1a375d83 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.md5 @@ -0,0 +1 @@ +88cbf08802a5d41b605a8dd83f2c5139 \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.xml new file mode 100644 index 00000000000..635a099a35a --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.xml @@ -0,0 +1,900 @@ + + + + + + device-id-type + uint32 + Device ID 0..1 + 0 + 1 + + + port-id-type + uint32 + Interface number + 0 + 1023 + + + logDest-type + enumeration + Logging Feature Options + + SAI_LOG_SYSLOG + SYSLOG {Syslog service should be running to use this option} + 0 + + + SAI_LOG_CONSOLE + CONSOLE + 1 + + + SAI_LOG_FILE + FILE {Warning !!! Use with caution. Can cause disk full issues} + 2 + + + + InDropCounter-type + enumeration + Router In Drop Reason Feature Options + + TTL_HOPLIMIT_EXCEEDED + Router In Drop Counters track TTL & Hop Limit Exceeded Packets + 0 + + + ROUTE_BLACKHOLE + Router In Drop Counters track Route Black Hole Packets + 1 + + + + Feature-enable + enumeration + Feature Enabled/Disabled + + Disabled + Disabled + 0 + + + Enabled + Enabled + 1 + + + + log-dest-file-path-type + string + A string with path to file for logging feature + 2 + 30 + + + acl-feature-name-type + enumeration + + + port-sFlow + SFlow over Port + 0 + + + port-counters-ipv4-ipv6 + Port ipv4/ipv6 counters + 1 + + + control-acl + ACLs for control packet handling + 2 + + + debug-counter-acl + ACLs for Debug Counters + 3 + + + + ingress-acl-stage-type + enumeration + + + disabled + Feature not enabled + 0 + + + IPCL0 + Stage IPCL0 + 1 + + + IPCL1 + Stage IPCL1 + 2 + + + + egress-acl-stage-type + enumeration + + + disabled + Feature not enabled + 0 + + + EPCL0 + Stage EPCL0 + 2 + + + + feature-priority-type + uint32 + Feature priority + 2 + 15 + + + hit-number-type + uint32 + Hit/lookup number + 0 + 3 + + + asic-type + enumeration + ASIC Type + + ASIC_AC3X + AC3X + 0 + + + ASIC_AC5X + AC5X + 1 + + + ASIC_Falcon + FALCON + 2 + + + + ASIC_Falcon + ASK-Board-F3_2T-128x25G.xml + + + 0 + 0 + 0 + + + 1 + 0 + 1 + + + 2 + 0 + 2 + + + 3 + 0 + 3 + + + 4 + 0 + 4 + + + 5 + 0 + 5 + + + 6 + 0 + 6 + + + 7 + 0 + 7 + + + 8 + 0 + 8 + + + 9 + 0 + 9 + + + 10 + 0 + 10 + + + 11 + 0 + 11 + + + 12 + 0 + 12 + + + 13 + 0 + 13 + + + 14 + 0 + 14 + + + 15 + 0 + 15 + + + 16 + 0 + 16 + + + 17 + 0 + 17 + + + 18 + 0 + 18 + + + 19 + 0 + 19 + + + 20 + 0 + 20 + + + 21 + 0 + 21 + + + 22 + 0 + 22 + + + 23 + 0 + 23 + + + 24 + 0 + 24 + + + 25 + 0 + 25 + + + 26 + 0 + 26 + + + 27 + 0 + 27 + + + 28 + 0 + 28 + + + 29 + 0 + 29 + + + 30 + 0 + 30 + + + 31 + 0 + 31 + + + 32 + 0 + 32 + + + 33 + 0 + 33 + + + 34 + 0 + 34 + + + 35 + 0 + 35 + + + 36 + 0 + 36 + + + 37 + 0 + 37 + + + 38 + 0 + 38 + + + 39 + 0 + 39 + + + 40 + 0 + 40 + + + 41 + 0 + 41 + + + 42 + 0 + 42 + + + 43 + 0 + 43 + + + 44 + 0 + 44 + + + 45 + 0 + 45 + + + 46 + 0 + 46 + + + 47 + 0 + 47 + + + 48 + 0 + 48 + + + 49 + 0 + 49 + + + 50 + 0 + 50 + + + 51 + 0 + 51 + + + 52 + 0 + 52 + + + 53 + 0 + 53 + + + 54 + 0 + 54 + + + 55 + 0 + 55 + + + 56 + 0 + 56 + + + 57 + 0 + 57 + + + 58 + 0 + 58 + + + 59 + 0 + 59 + + + 60 + 0 + 60 + + + 61 + 0 + 64 + + + 62 + 0 + 65 + + + 63 + 0 + 66 + + + 64 + 0 + 67 + + + 65 + 0 + 68 + + + 66 + 0 + 69 + + + 67 + 0 + 70 + + + 68 + 0 + 71 + + + 69 + 0 + 72 + + + 70 + 0 + 73 + + + 71 + 0 + 74 + + + 72 + 0 + 75 + + + 73 + 0 + 76 + + + 74 + 0 + 77 + + + 75 + 0 + 78 + + + 76 + 0 + 79 + + + 77 + 0 + 80 + + + 78 + 0 + 81 + + + 79 + 0 + 82 + + + 80 + 0 + 83 + + + 81 + 0 + 84 + + + 82 + 0 + 85 + + + 83 + 0 + 86 + + + 84 + 0 + 87 + + + 85 + 0 + 88 + + + 86 + 0 + 89 + + + 87 + 0 + 90 + + + 88 + 0 + 91 + + + 89 + 0 + 92 + + + 90 + 0 + 93 + + + 91 + 0 + 94 + + + 92 + 0 + 95 + + + 93 + 0 + 96 + + + 94 + 0 + 97 + + + 95 + 0 + 98 + + + 96 + 0 + 99 + + + 97 + 0 + 100 + + + 98 + 0 + 101 + + + 99 + 0 + 102 + + + 100 + 0 + 103 + + + 101 + 0 + 104 + + + 102 + 0 + 105 + + + 103 + 0 + 106 + + + 104 + 0 + 107 + + + 105 + 0 + 108 + + + 106 + 0 + 109 + + + 107 + 0 + 110 + + + 108 + 0 + 111 + + + 109 + 0 + 112 + + + 110 + 0 + 113 + + + 111 + 0 + 114 + + + 112 + 0 + 115 + + + 113 + 0 + 116 + + + 114 + 0 + 117 + + + 115 + 0 + 118 + + + 116 + 0 + 119 + + + 117 + 0 + 120 + + + 118 + 0 + 121 + + + 119 + 0 + 122 + + + 120 + 0 + 123 + + + 121 + 0 + 124 + + + 122 + 0 + 125 + + + 123 + 0 + 126 + + + 124 + 0 + 127 + + + 125 + 0 + 128 + + + 126 + 0 + 129 + + + 127 + 0 + 130 + + + 128 + 0 + 131 + + + 129 + 0 + 132 + + + + 8 + 0 + 0 + 64 + 8 + 8 + 1024 + 0 + 0 + + + + 0 + + + Enabled + Enabled + + + Enabled + + + + SAI_LOG_SYSLOG + + + control-acl + 3 + + IPCL0 + 1 + + + EPCL0 + 0 + + + + port-sFlow + 4 + + IPCL0 + 0 + + + EPCL0 + 0 + + + + port-counters-ipv4-ipv6 + 5 + + IPCL0 + 3 + + + EPCL0 + 0 + + + + debug-counter-acl + 2 + + IPCL0 + 1 + + + EPCL0 + 0 + + + + \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers.json.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers.json.j2 similarity index 100% rename from device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers.json.j2 rename to device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers.json.j2 diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..28e30dee8cc --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t0.j2 @@ -0,0 +1,49 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_pool1": { + "mode": "dynamic", + "size": "10500000", + "type": "ingress" + }, + "ingress_pool2": { + "mode": "dynamic", + "size": "1000000", + "type": "ingress" + }, + "egress_pool1": { + "mode": "dynamic", + "size": "10500000", + "type": "egress" + }, + "egress_pool2": { + "mode": "dynamic", + "size": "1000000", + "type": "egress" + } + }, + "BUFFER_PROFILE": { + "egress_lossless_profile": { + "pool": "egress_pool1", + "size": "0", + "dynamic_th": "1" + }, + "egress_lossy_profile": { + "pool": "egress_pool2", + "size": "0", + "dynamic_th": "1" + }, + "ingress_lossless_profile": { + "pool": "ingress_pool1", + "size": "0", + "dynamic_th": "-3" + }, + "ingress_lossy_profile": { + "pool": "ingress_pool2", + "size": "0", + "dynamic_th": "-3" + } + }, +{%- endmacro %} diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..28e30dee8cc --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t1.j2 @@ -0,0 +1,49 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_pool1": { + "mode": "dynamic", + "size": "10500000", + "type": "ingress" + }, + "ingress_pool2": { + "mode": "dynamic", + "size": "1000000", + "type": "ingress" + }, + "egress_pool1": { + "mode": "dynamic", + "size": "10500000", + "type": "egress" + }, + "egress_pool2": { + "mode": "dynamic", + "size": "1000000", + "type": "egress" + } + }, + "BUFFER_PROFILE": { + "egress_lossless_profile": { + "pool": "egress_pool1", + "size": "0", + "dynamic_th": "1" + }, + "egress_lossy_profile": { + "pool": "egress_pool2", + "size": "0", + "dynamic_th": "1" + }, + "ingress_lossless_profile": { + "pool": "ingress_pool1", + "size": "0", + "dynamic_th": "-3" + }, + "ingress_lossy_profile": { + "pool": "ingress_pool2", + "size": "0", + "dynamic_th": "-3" + } + }, +{%- endmacro %} diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/create_only_config_db_buffers.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/create_only_config_db_buffers.json new file mode 100644 index 00000000000..8bea3894c08 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/create_only_config_db_buffers.json @@ -0,0 +1,7 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "create_only_config_db_buffers": "true" + } + } +} \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/hwsku.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/hwsku.json new file mode 100644 index 00000000000..f6745e83605 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/hwsku.json @@ -0,0 +1,204 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet4": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet8": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet12": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet16": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet20": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet24": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet28": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet32": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet36": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet40": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet44": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet48": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet52": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet56": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet60": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet64": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet68": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet72": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet76": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet80": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet84": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet88": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet92": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet96": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet100": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet104": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet108": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet112": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet116": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet120": { + "default_brkout_mode": "2x100G", + "subport": "1", + "autoneg": "on", + "fec": "none" + }, + "Ethernet124": { + "default_brkout_mode": "2x100G", + "subport": "2", + "autoneg": "on", + "fec": "none" + }, + "Ethernet128": { + "default_brkout_mode": "1x10G", + "autoneg": "off" + }, + "Ethernet129": { + "default_brkout_mode": "1x10G", + "autoneg": "off" + } + } +} diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/port_config.ini b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/port_config.ini new file mode 100644 index 00000000000..85d256856fb --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/port_config.ini @@ -0,0 +1,131 @@ +# name lanes alias speed autoneg fec index +Ethernet0 0 Eth1/1 25000 on none 1 +Ethernet1 1 Eth1/2 25000 on none 1 +Ethernet2 2 Eth1/3 25000 on none 1 +Ethernet3 3 Eth1/4 25000 on none 1 +Ethernet4 4 Eth1/5 25000 on none 1 +Ethernet5 5 Eth1/6 25000 on none 1 +Ethernet6 6 Eth1/7 25000 on none 1 +Ethernet7 7 Eth1/8 25000 on none 1 +Ethernet8 8 Eth2/1 25000 on none 2 +Ethernet9 9 Eth2/2 25000 on none 2 +Ethernet10 10 Eth2/3 25000 on none 2 +Ethernet11 11 Eth2/4 25000 on none 2 +Ethernet12 12 Eth2/5 25000 on none 2 +Ethernet13 13 Eth2/6 25000 on none 2 +Ethernet14 14 Eth2/7 25000 on none 2 +Ethernet15 15 Eth2/8 25000 on none 2 +Ethernet16 16 Eth3/1 25000 on none 3 +Ethernet17 17 Eth3/2 25000 on none 3 +Ethernet18 18 Eth3/3 25000 on none 3 +Ethernet19 19 Eth3/4 25000 on none 3 +Ethernet20 20 Eth3/5 25000 on none 3 +Ethernet21 21 Eth3/6 25000 on none 3 +Ethernet22 22 Eth3/7 25000 on none 3 +Ethernet23 23 Eth3/8 25000 on none 3 +Ethernet24 24 Eth4/1 25000 on none 4 +Ethernet25 25 Eth4/2 25000 on none 4 +Ethernet26 26 Eth4/3 25000 on none 4 +Ethernet27 27 Eth4/4 25000 on none 4 +Ethernet28 28 Eth4/5 25000 on none 4 +Ethernet29 29 Eth4/6 25000 on none 4 +Ethernet30 30 Eth4/7 25000 on none 4 +Ethernet31 31 Eth4/8 25000 on none 4 +Ethernet32 32 Eth5/1 25000 on none 5 +Ethernet33 33 Eth5/2 25000 on none 5 +Ethernet34 34 Eth5/3 25000 on none 5 +Ethernet35 35 Eth5/4 25000 on none 5 +Ethernet36 36 Eth5/5 25000 on none 5 +Ethernet37 37 Eth5/6 25000 on none 5 +Ethernet38 38 Eth5/7 25000 on none 5 +Ethernet39 39 Eth5/8 25000 on none 5 +Ethernet40 40 Eth6/1 25000 on none 6 +Ethernet41 41 Eth6/2 25000 on none 6 +Ethernet42 42 Eth6/3 25000 on none 6 +Ethernet43 43 Eth6/4 25000 on none 6 +Ethernet44 44 Eth6/5 25000 on none 6 +Ethernet45 45 Eth6/6 25000 on none 6 +Ethernet46 46 Eth6/7 25000 on none 6 +Ethernet47 47 Eth6/8 25000 on none 6 +Ethernet48 48 Eth7/1 25000 on none 7 +Ethernet49 49 Eth7/2 25000 on none 7 +Ethernet50 50 Eth7/3 25000 on none 7 +Ethernet51 51 Eth7/4 25000 on none 7 +Ethernet52 52 Eth7/5 25000 on none 7 +Ethernet53 53 Eth7/6 25000 on none 7 +Ethernet54 54 Eth7/7 25000 on none 7 +Ethernet55 55 Eth7/8 25000 on none 7 +Ethernet56 56 Eth8/1 25000 on none 8 +Ethernet57 57 Eth8/2 25000 on none 8 +Ethernet58 58 Eth8/3 25000 on none 8 +Ethernet59 59 Eth8/4 25000 on none 8 +Ethernet60 60 Eth8/5 25000 on none 8 +Ethernet61 61 Eth8/6 25000 on none 8 +Ethernet62 62 Eth8/7 25000 on none 8 +Ethernet63 63 Eth8/8 25000 on none 8 +Ethernet64 64 Eth9/1 25000 on none 9 +Ethernet65 65 Eth9/2 25000 on none 9 +Ethernet66 66 Eth9/3 25000 on none 9 +Ethernet67 67 Eth9/4 25000 on none 9 +Ethernet68 68 Eth9/5 25000 on none 9 +Ethernet69 69 Eth9/6 25000 on none 9 +Ethernet70 70 Eth9/7 25000 on none 9 +Ethernet71 71 Eth9/8 25000 on none 9 +Ethernet72 72 Eth10/1 25000 on none 10 +Ethernet73 73 Eth10/2 25000 on none 10 +Ethernet74 74 Eth10/3 25000 on none 10 +Ethernet75 75 Eth10/4 25000 on none 10 +Ethernet76 76 Eth10/5 25000 on none 10 +Ethernet77 77 Eth10/6 25000 on none 10 +Ethernet78 78 Eth10/7 25000 on none 10 +Ethernet79 79 Eth10/8 25000 on none 10 +Ethernet80 80 Eth11/1 25000 on none 11 +Ethernet81 81 Eth11/2 25000 on none 11 +Ethernet82 82 Eth11/3 25000 on none 11 +Ethernet83 83 Eth11/4 25000 on none 11 +Ethernet84 84 Eth11/5 25000 on none 11 +Ethernet85 85 Eth11/6 25000 on none 11 +Ethernet86 86 Eth11/7 25000 on none 11 +Ethernet87 87 Eth11/8 25000 on none 11 +Ethernet88 88 Eth12/1 25000 on none 12 +Ethernet89 89 Eth12/2 25000 on none 12 +Ethernet90 90 Eth12/3 25000 on none 12 +Ethernet91 91 Eth12/4 25000 on none 12 +Ethernet92 92 Eth12/5 25000 on none 12 +Ethernet93 93 Eth12/6 25000 on none 12 +Ethernet94 94 Eth12/7 25000 on none 12 +Ethernet95 95 Eth12/8 25000 on none 12 +Ethernet96 96 Eth13/1 25000 on none 13 +Ethernet97 97 Eth13/2 25000 on none 13 +Ethernet98 98 Eth13/3 25000 on none 13 +Ethernet99 99 Eth13/4 25000 on none 13 +Ethernet100 100 Eth13/5 25000 on none 13 +Ethernet101 101 Eth13/6 25000 on none 13 +Ethernet102 102 Eth13/7 25000 on none 13 +Ethernet103 103 Eth13/8 25000 on none 13 +Ethernet104 104 Eth14/1 25000 on none 14 +Ethernet105 105 Eth14/2 25000 on none 14 +Ethernet106 106 Eth14/3 25000 on none 14 +Ethernet107 107 Eth14/4 25000 on none 14 +Ethernet108 108 Eth14/5 25000 on none 14 +Ethernet109 109 Eth14/6 25000 on none 14 +Ethernet110 110 Eth14/7 25000 on none 14 +Ethernet111 111 Eth14/8 25000 on none 14 +Ethernet112 112 Eth15/1 25000 on none 15 +Ethernet113 113 Eth15/2 25000 on none 15 +Ethernet114 114 Eth15/3 25000 on none 15 +Ethernet115 115 Eth15/4 25000 on none 15 +Ethernet116 116 Eth15/5 25000 on none 15 +Ethernet117 117 Eth15/6 25000 on none 15 +Ethernet118 118 Eth15/7 25000 on none 15 +Ethernet119 119 Eth15/8 25000 on none 15 +Ethernet120 120 Eth16/1 25000 on none 16 +Ethernet121 121 Eth16/2 25000 on none 16 +Ethernet122 122 Eth16/3 25000 on none 16 +Ethernet123 123 Eth16/4 25000 on none 16 +Ethernet124 124 Eth16/5 25000 on none 16 +Ethernet125 125 Eth16/6 25000 on none 16 +Ethernet126 126 Eth16/7 25000 on none 16 +Ethernet127 127 Eth16/8 25000 on none 16 +Ethernet128 128 Eth17 10000 off none 129 +Ethernet129 129 Eth17 10000 off none 130 diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/profile.ini b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/profile.ini new file mode 100644 index 00000000000..c2f77685ad0 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/profile.ini @@ -0,0 +1 @@ +switchMacAddress=00:01:02:03:04:05 diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/qos.json.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/qos.json.j2 similarity index 100% rename from device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/qos.json.j2 rename to device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/qos.json.j2 diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/sai.profile b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/sai.profile new file mode 100644 index 00000000000..2477a839e09 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/sai.profile @@ -0,0 +1,4 @@ +mode=1 +hwId=FC128x25G +switchProfile=/usr/share/sonic/hwsku/SAI-F3_2T-128x25G.xml +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/default_sku b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/default_sku new file mode 100644 index 00000000000..a88ea359eef --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/default_sku @@ -0,0 +1 @@ +db98cx8522_10cc t1 diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform.json new file mode 100644 index 00000000000..205de6cf42f --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform.json @@ -0,0 +1,146 @@ +{ + "interfaces": { + "Ethernet0": { + "breakout_modes": { + "2x100G": ["Eth1/1", "Eth1/2"], + "8x25G[10G]": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4", "Eth1/5", "Eth1/6", "Eth1/7", "Eth1/8"] + }, + "index": "1,1,1,1,1,1,1,1", + "lanes": "0,1,2,3,4,5,6,7" + }, + "Ethernet8": { + "breakout_modes": { + "2x100G": ["Eth2/1", "Eth2/2"], + "8x50G[10G]": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4", "Eth2/5", "Eth2/6", "Eth2/7", "Eth2/8"] + }, + "index": "2,2,2,2,2,2,2,2", + "lanes": "8,9,10,11,12,13,14,15" + }, + "Ethernet16": { + "breakout_modes": { + "2x100G": ["Eth3/1", "Eth3/2"], + "8x50G[10G]": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4", "Eth3/5", "Eth3/6", "Eth3/7", "Eth3/8"] + }, + "index": "3,3,3,3,3,3,3,3", + "lanes": "16,17,18,19,20,21,22,23" + }, + "Ethernet24": { + "breakout_modes": { + "2x100G": ["Eth4/1", "Eth4/2"], + "8x50G[10G]": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4", "Eth4/5", "Eth4/6", "Eth4/7", "Eth4/8"] + }, + "index": "4,4,4,4,4,4,4,4", + "lanes": "24,25,26,27,28,29,30,31" + }, + "Ethernet32": { + "breakout_modes": { + "2x100G": ["Eth5/1", "Eth5/2"], + "8x50G[10G]": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4", "Eth5/5", "Eth5/6", "Eth5/7", "Eth5/8"] + }, + "index": "5,5,5,5,5,5,5,5", + "lanes": "32,33,34,35,36,37,38,39" + }, + "Ethernet40": { + "breakout_modes": { + "2x100G": ["Eth6/1", "Eth6/2"], + "8x50G[10G]": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4", "Eth6/5", "Eth6/6", "Eth6/7", "Eth6/8"] + }, + "index": "6,6,6,6,6,6,6,6", + "lanes": "40,41,42,43,44,45,46,47" + }, + "Ethernet48": { + "breakout_modes": { + "2x100G": ["Eth7/1", "Eth7/2"], + "8x50G[10G]": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4", "Eth7/5", "Eth7/6", "Eth7/7", "Eth7/8"] + }, + "index": "7,7,7,7,7,7,7,7", + "lanes": "48,49,50,51,52,53,54,55" + }, + "Ethernet56": { + "breakout_modes": { + "2x100G": ["Eth8/1", "Eth8/2"], + "8x50G[10G]": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4", "Eth8/5", "Eth8/6", "Eth8/7", "Eth8/8"] + }, + "index": "8,8,8,8,8,8,8,8", + "lanes": "56,57,58,59,60,61,62,63" + }, + "Ethernet64": { + "breakout_modes": { + "2x100G": ["Eth9/1", "Eth9/2"], + "8x50G[10G]": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4", "Eth9/5", "Eth9/6", "Eth9/7", "Eth9/8"] + }, + "index": "9,9,9,9,9,9,9,9", + "lanes": "64,65,66,67,68,69,70,71" + }, + "Ethernet72": { + "breakout_modes": { + "2x100G": ["Eth10/1", "Eth10/2"], + "8x50G[10G]": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4", "Eth10/5", "Eth10/6", "Eth10/7", "Eth10/8"] + }, + "index": "10,10,10,10,10,10,10,10", + "lanes": "72,73,74,75,76,77,78,79" + }, + "Ethernet80": { + "breakout_modes": { + "2x100G": ["Eth11/1", "Eth11/2"], + "8x50G[10G]": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4", "Eth11/5", "Eth11/6", "Eth11/7", "Eth11/8"] + }, + "index": "11,11,11,11,11,11,11,11", + "lanes": "80,81,82,83,84,85,86,87" + }, + "Ethernet88": { + "breakout_modes": { + "2x100G": ["Eth12/1", "Eth12/2"], + "8x50G[10G]": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4", "Eth12/5", "Eth12/6", "Eth12/7", "Eth12/8"] + }, + "index": "12,12,12,12,12,12,12,12", + "lanes": "88,89,90,91,92,93,94,95" + }, + "Ethernet96": { + "breakout_modes": { + "2x100G": ["Eth13/1", "Eth13/2"], + "8x50G[10G]": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4", "Eth13/5", "Eth13/6", "Eth13/7", "Eth13/8"] + }, + "index": "13,13,13,13,13,13,13,13", + "lanes": "96,97,98,99,100,101,102,103" + }, + "Ethernet104": { + "breakout_modes": { + "2x100G": ["Eth14/1", "Eth14/2"], + "8x50G[10G]": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4", "Eth14/5", "Eth14/6", "Eth14/7", "Eth14/8"] + }, + "index": "14,14,14,14,14,14,14,14", + "lanes": "104,105,106,107,108,109,110,111" + }, + "Ethernet112": { + "breakout_modes": { + "2x100G": ["Eth15/1", "Eth15/2"], + "8x50G[10G]": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4", "Eth15/5", "Eth15/6", "Eth15/7", "Eth15/8"] + }, + "index": "15,15,15,15,15,15,15,15", + "lanes": "112,113,114,115,116,117,118,119" + }, + "Ethernet120": { + "breakout_modes": { + "2x100G": ["Eth16/1", "Eth16/2"], + "8x50G[10G]": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4", "Eth16/5", "Eth16/6", "Eth16/7", "Eth16/8"] + }, + "index": "16,16,16,16,16,16,16,16", + "lanes": "120,121,122,123,124,125,126,127" + }, + "Ethernet128":{ + "breakout_modes": { + "1x10G": ["Eth17"] + }, + "index": "17", + "lanes": "128" + }, + "Ethernet129":{ + "breakout_modes": { + "1x10G": ["Eth18"] + }, + "index": "18", + "lanes": "129" + } + } +} diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic new file mode 100644 index 00000000000..a554752878b --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic @@ -0,0 +1 @@ +marvell diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/pmon_daemon_control.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..39deb88be07 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/pmon_daemon_control.json @@ -0,0 +1,8 @@ +{ + "skip_ledd": true, + "skip_pcied": true, + "skip_thermalctld": true, + "skip_psud": true, + "skip_xcvrd": true, + "skip_syseepromd": true +} diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/system_health_monitoring_config.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..79c17103bf7 --- /dev/null +++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/system_health_monitoring_config.json @@ -0,0 +1,10 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu.temperature", + "fan", + "psu" + ], + "user_defined_checkers": [] +} diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/config_teralynx_MVTX9180_64x100G.yaml b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/config_teralynx_MVTX9180_64x100G.yaml index 1abf66695d3..bed1dbe9fa1 100644 --- a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/config_teralynx_MVTX9180_64x100G.yaml +++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/config_teralynx_MVTX9180_64x100G.yaml @@ -24,6 +24,9 @@ nodes: sys_clk: "1800" ifc_clk: "1800" mac_clk: "1600" + ecmp_alb_enable: "1" + alb_port_state_enable: "1" + ecmp_alb_timeout_step_size: "2" txring: - txring_id: "0" desc_count: "1024" diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic b/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic index 84083a7415d..a657472d7ad 100644 --- a/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic +++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic @@ -1 +1 @@ -innovium +marvell-teralynx diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json index dbc19c9baab..8ffea7b92f8 100644 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json @@ -2,6 +2,7 @@ "skip_ledd": true, "skip_fancontrol": true, "delay_xcvrd": true, - "skip_xcvrd_cmis_mgr": true + "skip_xcvrd_cmis_mgr": true, + "delay_non_critical_daemon": true } diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json index d2a798d25fc..c9370bd6d7f 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json @@ -653,6 +653,10 @@ "interface": { "Ethernet224": "Ethernet0" }, + "serial-console": { + "device": "ttyUSB0", + "baud-rate": "115200" + }, "rshim_info": "rshim0", "bus_info": "0000:08:00.0" }, @@ -661,6 +665,10 @@ "interface": { "Ethernet232": "Ethernet0" }, + "serial-console": { + "device": "ttyUSB1", + "baud-rate": "115200" + }, "rshim_info": "rshim1", "bus_info": "0000:07:00.0" }, @@ -669,6 +677,10 @@ "interface": { "Ethernet240": "Ethernet0" }, + "serial-console": { + "device": "ttyUSB2", + "baud-rate": "115200" + }, "rshim_info": "rshim2", "bus_info": "0000:01:00.0" }, @@ -677,6 +689,10 @@ "interface": { "Ethernet248": "Ethernet0" }, + "serial-console": { + "device": "ttyUSB3", + "baud-rate": "115200" + }, "rshim_info": "rshim3", "bus_info": "0000:02:00.0" } diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_objects.j2 new file mode 120000 index 00000000000..14851fae21e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../Mellanox-SN5600-C256S1/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..06f6352eff5 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 @@ -0,0 +1,54 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '144189440' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '158229504' %} +{% set egress_lossy_pool_size = '144189440' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..06f6352eff5 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 @@ -0,0 +1,54 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '144189440' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '158229504' %} +{% set egress_lossy_pool_size = '144189440' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_dynamic.json.j2 new file mode 120000 index 00000000000..8c4117c6621 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_dynamic.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/create_only_config_db_buffers.json new file mode 100644 index 00000000000..6feb156714f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/create_only_config_db_buffers.json @@ -0,0 +1,7 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "create_only_config_db_buffers": "true" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/media_settings.json new file mode 120000 index 00000000000..2f4f358b3ba --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/media_settings.json @@ -0,0 +1 @@ +../Mellanox-SN5600-V256/media_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/optics_si_settings.json new file mode 120000 index 00000000000..f0e582a4d77 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/optics_si_settings.json @@ -0,0 +1 @@ +../Mellanox-SN5600-V256/optics_si_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pg_profile_lookup.ini new file mode 100644 index 00000000000..a87d3445ed3 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pg_profile_lookup.ini @@ -0,0 +1,51 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 19456 19456 20480 0 + 25000 5m 19456 19456 21504 0 + 40000 5m 19456 19456 24576 0 + 50000 5m 19456 19456 26624 0 + 100000 5m 19456 19456 44032 0 + 200000 5m 19456 19456 50176 0 + 400000 5m 19456 19456 86016 0 + 800000 5m 38912 38912 95232 0 + 10000 40m 19456 19456 20480 0 + 25000 40m 19456 19456 22528 0 + 40000 40m 19456 19456 25600 0 + 50000 40m 19456 19456 28672 0 + 100000 40m 19456 19456 49152 0 + 200000 40m 19456 19456 60416 0 + 400000 40m 19456 19456 104448 0 + 800000 40m 38912 38912 132096 0 + 10000 250m 19456 19456 14336 0 + 25000 250m 19456 19456 20480 0 + 40000 250m 19456 19456 28672 0 + 50000 250m 19456 19456 33792 0 + 100000 250m 19456 19456 68608 0 + 200000 250m 19456 19456 107520 0 + 400000 250m 19456 19456 208896 0 + 800000 250m 38912 38912 349184 0 + 10000 1000m 19456 19456 24576 0 + 25000 1000m 19456 19456 46080 0 + 40000 1000m 19456 19456 68608 0 + 50000 1000m 19456 19456 83968 0 + 100000 1000m 19456 19456 168960 0 + 200000 1000m 19456 19456 308224 0 + 400000 1000m 19456 19456 610304 0 + 800000 1000m 38912 38912 1153024 0 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json new file mode 100644 index 00000000000..281b96b71cc --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json @@ -0,0 +1,5 @@ +{ + "skip_ledd": true, + "skip_fancontrol": true, + "skip_xcvrd_cmis_mgr": false +} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini new file mode 100644 index 00000000000..be9e26624a0 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini @@ -0,0 +1,252 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +# name lanes alias index speed autoneg subport +Ethernet0 0 etp1a 1 100000 off 1 +Ethernet1 1 etp1b 1 100000 off 2 +Ethernet2 2 etp1c 1 100000 off 3 +Ethernet3 3 etp1d 1 100000 off 4 +Ethernet4 4 etp1e 1 100000 off 5 +Ethernet5 5 etp1f 1 100000 off 6 +Ethernet6 6 etp1g 1 100000 off 7 +Ethernet7 7 etp1h 1 100000 off 8 +Ethernet16 16 etp3a 3 100000 off 1 +Ethernet17 17 etp3b 3 100000 off 2 +Ethernet18 18 etp3c 3 100000 off 3 +Ethernet19 19 etp3d 3 100000 off 4 +Ethernet20 20 etp3e 3 100000 off 5 +Ethernet21 21 etp3f 3 100000 off 6 +Ethernet22 22 etp3g 3 100000 off 7 +Ethernet23 23 etp3h 3 100000 off 8 +Ethernet32 32 etp5a 5 100000 off 1 +Ethernet33 33 etp5b 5 100000 off 2 +Ethernet34 34 etp5c 5 100000 off 3 +Ethernet35 35 etp5d 5 100000 off 4 +Ethernet36 36 etp5e 5 100000 off 5 +Ethernet37 37 etp5f 5 100000 off 6 +Ethernet38 38 etp5g 5 100000 off 7 +Ethernet39 39 etp5h 5 100000 off 8 +Ethernet48 48 etp7a 7 100000 off 1 +Ethernet49 49 etp7b 7 100000 off 2 +Ethernet50 50 etp7c 7 100000 off 3 +Ethernet51 51 etp7d 7 100000 off 4 +Ethernet52 52 etp7e 7 100000 off 5 +Ethernet53 53 etp7f 7 100000 off 6 +Ethernet54 54 etp7g 7 100000 off 7 +Ethernet55 55 etp7h 7 100000 off 8 +Ethernet64 64 etp9a 9 100000 off 1 +Ethernet65 65 etp9b 9 100000 off 2 +Ethernet66 66 etp9c 9 100000 off 3 +Ethernet67 67 etp9d 9 100000 off 4 +Ethernet68 68 etp9e 9 100000 off 5 +Ethernet69 69 etp9f 9 100000 off 6 +Ethernet70 70 etp9g 9 100000 off 7 +Ethernet71 71 etp9h 9 100000 off 8 +Ethernet80 80 etp11a 11 100000 off 1 +Ethernet81 81 etp11b 11 100000 off 2 +Ethernet82 82 etp11c 11 100000 off 3 +Ethernet83 83 etp11d 11 100000 off 4 +Ethernet84 84 etp11e 11 100000 off 5 +Ethernet85 85 etp11f 11 100000 off 6 +Ethernet86 86 etp11g 11 100000 off 7 +Ethernet87 87 etp11h 11 100000 off 8 +Ethernet96 96,97,98,99 etp13a 13 400000 off 1 +Ethernet100 100,101,102,103 etp13b 13 400000 off 2 +Ethernet112 112 etp15a 15 100000 off 1 +Ethernet113 113 etp15b 15 100000 off 2 +Ethernet114 114 etp15c 15 100000 off 3 +Ethernet115 115 etp15d 15 100000 off 4 +Ethernet116 116 etp15e 15 100000 off 5 +Ethernet117 117 etp15f 15 100000 off 6 +Ethernet118 118 etp15g 15 100000 off 7 +Ethernet119 119 etp15h 15 100000 off 8 +Ethernet128 128,129,130,131 etp17a 17 400000 off 1 +Ethernet132 132,133,134,135 etp17b 17 400000 off 2 +Ethernet144 144 etp19a 19 100000 off 1 +Ethernet145 145 etp19b 19 100000 off 2 +Ethernet146 146 etp19c 19 100000 off 3 +Ethernet147 147 etp19d 19 100000 off 4 +Ethernet148 148 etp19e 19 100000 off 5 +Ethernet149 149 etp19f 19 100000 off 6 +Ethernet150 150 etp19g 19 100000 off 7 +Ethernet151 151 etp19h 19 100000 off 8 +Ethernet160 160 etp21a 21 100000 off 1 +Ethernet161 161 etp21b 21 100000 off 2 +Ethernet162 162 etp21c 21 100000 off 3 +Ethernet163 163 etp21d 21 100000 off 4 +Ethernet164 164 etp21e 21 100000 off 5 +Ethernet165 165 etp21f 21 100000 off 6 +Ethernet166 166 etp21g 21 100000 off 7 +Ethernet167 167 etp21h 21 100000 off 8 +Ethernet176 176 etp23a 23 100000 off 1 +Ethernet177 177 etp23b 23 100000 off 2 +Ethernet178 178 etp23c 23 100000 off 3 +Ethernet179 179 etp23d 23 100000 off 4 +Ethernet180 180 etp23e 23 100000 off 5 +Ethernet181 181 etp23f 23 100000 off 6 +Ethernet182 182 etp23g 23 100000 off 7 +Ethernet183 183 etp23h 23 100000 off 8 +Ethernet192 192 etp25a 25 100000 off 1 +Ethernet193 193 etp25b 25 100000 off 2 +Ethernet194 194 etp25c 25 100000 off 3 +Ethernet195 195 etp25d 25 100000 off 4 +Ethernet196 196 etp25e 25 100000 off 5 +Ethernet197 197 etp25f 25 100000 off 6 +Ethernet198 198 etp25g 25 100000 off 7 +Ethernet199 199 etp25h 25 100000 off 8 +Ethernet208 208 etp27a 27 100000 off 1 +Ethernet209 209 etp27b 27 100000 off 2 +Ethernet210 210 etp27c 27 100000 off 3 +Ethernet211 211 etp27d 27 100000 off 4 +Ethernet212 212 etp27e 27 100000 off 5 +Ethernet213 213 etp27f 27 100000 off 6 +Ethernet214 214 etp27g 27 100000 off 7 +Ethernet215 215 etp27h 27 100000 off 8 +Ethernet224 224 etp29a 29 100000 off 1 +Ethernet225 225 etp29b 29 100000 off 2 +Ethernet226 226 etp29c 29 100000 off 3 +Ethernet227 227 etp29d 29 100000 off 4 +Ethernet228 228 etp29e 29 100000 off 5 +Ethernet229 229 etp29f 29 100000 off 6 +Ethernet230 230 etp29g 29 100000 off 7 +Ethernet231 231 etp29h 29 100000 off 8 +Ethernet240 240 etp31a 31 100000 off 1 +Ethernet241 241 etp31b 31 100000 off 2 +Ethernet242 242 etp31c 31 100000 off 3 +Ethernet243 243 etp31d 31 100000 off 4 +Ethernet244 244 etp31e 31 100000 off 5 +Ethernet245 245 etp31f 31 100000 off 6 +Ethernet246 246 etp31g 31 100000 off 7 +Ethernet247 247 etp31h 31 100000 off 8 +Ethernet256 256 etp33a 33 100000 off 1 +Ethernet257 257 etp33b 33 100000 off 2 +Ethernet258 258 etp33c 33 100000 off 3 +Ethernet259 259 etp33d 33 100000 off 4 +Ethernet260 260 etp33e 33 100000 off 5 +Ethernet261 261 etp33f 33 100000 off 6 +Ethernet262 262 etp33g 33 100000 off 7 +Ethernet263 263 etp33h 33 100000 off 8 +Ethernet272 272 etp35a 35 100000 off 1 +Ethernet273 273 etp35b 35 100000 off 2 +Ethernet274 274 etp35c 35 100000 off 3 +Ethernet275 275 etp35d 35 100000 off 4 +Ethernet276 276 etp35e 35 100000 off 5 +Ethernet277 277 etp35f 35 100000 off 6 +Ethernet278 278 etp35g 35 100000 off 7 +Ethernet279 279 etp35h 35 100000 off 8 +Ethernet288 288 etp37a 37 100000 off 1 +Ethernet289 289 etp37b 37 100000 off 2 +Ethernet290 290 etp37c 37 100000 off 3 +Ethernet291 291 etp37d 37 100000 off 4 +Ethernet292 292 etp37e 37 100000 off 5 +Ethernet293 293 etp37f 37 100000 off 6 +Ethernet294 294 etp37g 37 100000 off 7 +Ethernet295 295 etp37h 37 100000 off 8 +Ethernet304 304 etp39a 39 100000 off 1 +Ethernet305 305 etp39b 39 100000 off 2 +Ethernet306 306 etp39c 39 100000 off 3 +Ethernet307 307 etp39d 39 100000 off 4 +Ethernet308 308 etp39e 39 100000 off 5 +Ethernet309 309 etp39f 39 100000 off 6 +Ethernet310 310 etp39g 39 100000 off 7 +Ethernet311 311 etp39h 39 100000 off 8 +Ethernet320 320 etp41a 41 100000 off 1 +Ethernet321 321 etp41b 41 100000 off 2 +Ethernet322 322 etp41c 41 100000 off 3 +Ethernet323 323 etp41d 41 100000 off 4 +Ethernet324 324 etp41e 41 100000 off 5 +Ethernet325 325 etp41f 41 100000 off 6 +Ethernet326 326 etp41g 41 100000 off 7 +Ethernet327 327 etp41h 41 100000 off 8 +Ethernet336 336 etp43a 43 100000 off 1 +Ethernet337 337 etp43b 43 100000 off 2 +Ethernet338 338 etp43c 43 100000 off 3 +Ethernet339 339 etp43d 43 100000 off 4 +Ethernet340 340 etp43e 43 100000 off 5 +Ethernet341 341 etp43f 43 100000 off 6 +Ethernet342 342 etp43g 43 100000 off 7 +Ethernet343 343 etp43h 43 100000 off 8 +Ethernet352 352,353,354,355 etp45a 45 400000 off 1 +Ethernet356 356,357,358,359 etp45b 45 400000 off 2 +Ethernet368 368 etp47a 47 100000 off 1 +Ethernet369 369 etp47b 47 100000 off 2 +Ethernet370 370 etp47c 47 100000 off 3 +Ethernet371 371 etp47d 47 100000 off 4 +Ethernet372 372 etp47e 47 100000 off 5 +Ethernet373 373 etp47f 47 100000 off 6 +Ethernet374 374 etp47g 47 100000 off 7 +Ethernet375 375 etp47h 47 100000 off 8 +Ethernet384 384,385,386,387 etp49a 49 400000 off 1 +Ethernet388 388,389,390,391 etp49b 49 400000 off 2 +Ethernet400 400 etp51a 51 100000 off 1 +Ethernet401 401 etp51b 51 100000 off 2 +Ethernet402 402 etp51c 51 100000 off 3 +Ethernet403 403 etp51d 51 100000 off 4 +Ethernet404 404 etp51e 51 100000 off 5 +Ethernet405 405 etp51f 51 100000 off 6 +Ethernet406 406 etp51g 51 100000 off 7 +Ethernet407 407 etp51h 51 100000 off 8 +Ethernet416 416 etp53a 53 100000 off 1 +Ethernet417 417 etp53b 53 100000 off 2 +Ethernet418 418 etp53c 53 100000 off 3 +Ethernet419 419 etp53d 53 100000 off 4 +Ethernet420 420 etp53e 53 100000 off 5 +Ethernet421 421 etp53f 53 100000 off 6 +Ethernet422 422 etp53g 53 100000 off 7 +Ethernet423 423 etp53h 53 100000 off 8 +Ethernet432 432 etp55a 55 100000 off 1 +Ethernet433 433 etp55b 55 100000 off 2 +Ethernet434 434 etp55c 55 100000 off 3 +Ethernet435 435 etp55d 55 100000 off 4 +Ethernet436 436 etp55e 55 100000 off 5 +Ethernet437 437 etp55f 55 100000 off 6 +Ethernet438 438 etp55g 55 100000 off 7 +Ethernet439 439 etp55h 55 100000 off 8 +Ethernet448 448 etp57a 57 100000 off 1 +Ethernet449 449 etp57b 57 100000 off 2 +Ethernet450 450 etp57c 57 100000 off 3 +Ethernet451 451 etp57d 57 100000 off 4 +Ethernet452 452 etp57e 57 100000 off 5 +Ethernet453 453 etp57f 57 100000 off 6 +Ethernet454 454 etp57g 57 100000 off 7 +Ethernet455 455 etp57h 57 100000 off 8 +Ethernet464 464 etp59a 59 100000 off 1 +Ethernet465 465 etp59b 59 100000 off 2 +Ethernet466 466 etp59c 59 100000 off 3 +Ethernet467 467 etp59d 59 100000 off 4 +Ethernet468 468 etp59e 59 100000 off 5 +Ethernet469 469 etp59f 59 100000 off 6 +Ethernet470 470 etp59g 59 100000 off 7 +Ethernet471 471 etp59h 59 100000 off 8 +Ethernet480 480 etp61a 61 100000 off 1 +Ethernet481 481 etp61b 61 100000 off 2 +Ethernet482 482 etp61c 61 100000 off 3 +Ethernet483 483 etp61d 61 100000 off 4 +Ethernet484 484 etp61e 61 100000 off 5 +Ethernet485 485 etp61f 61 100000 off 6 +Ethernet486 486 etp61g 61 100000 off 7 +Ethernet487 487 etp61h 61 100000 off 8 +Ethernet496 496 etp63a 63 100000 off 1 +Ethernet497 497 etp63b 63 100000 off 2 +Ethernet498 498 etp63c 63 100000 off 3 +Ethernet499 499 etp63d 63 100000 off 4 +Ethernet500 500 etp63e 63 100000 off 5 +Ethernet501 501 etp63f 63 100000 off 6 +Ethernet502 502 etp63g 63 100000 off 7 +Ethernet503 503 etp63h 63 100000 off 8 +Ethernet512 512 etp65 65 10000 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/qos.json.j2 new file mode 120000 index 00000000000..f85b6bf729d --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/qos.json.j2 @@ -0,0 +1 @@ +../Mellanox-SN5600-C256S1/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile new file mode 100644 index 00000000000..271c8cf70fd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile @@ -0,0 +1,4 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600_256x100g.xml +SAI_INDEPENDENT_MODULE_MODE=1 +SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1 +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai_5600_256x100g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai_5600_256x100g.xml new file mode 100644 index 00000000000..8a97aefdc61 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai_5600_256x100g.xml @@ -0,0 +1,561 @@ + + + + + + + 00:02:03:04:05:00 + + + 0 + + + 65 + + + 1 + + + + + 1 + 8 + 34 + + + 3 + + + 262144 + 8 + + + 5 + 8 + 35 + 3 + 262144 + 8 + + + 9 + 8 + 33 + 3 + 262144 + 8 + + + 13 + 8 + 32 + 3 + 262144 + 8 + + + 17 + 8 + 38 + 3 + 262144 + 8 + + + 21 + 8 + 39 + 3 + 262144 + 8 + + + 25 + 8 + 37 + 3 + 262144 + 8 + + + 29 + 8 + 36 + 3 + 262144 + 8 + + + 33 + 8 + 42 + 3 + 262144 + 8 + + + 37 + 8 + 43 + 3 + 262144 + 8 + + + 41 + 8 + 41 + 3 + 262144 + 8 + + + 45 + 8 + 40 + 3 + 262144 + 8 + + + 49 + 8 + 46 + 3 + 262144 + 8 + + + 53 + 8 + 47 + 3 + 262144 + 8 + + + 57 + 8 + 45 + 3 + 262144 + 8 + + + 61 + 8 + 44 + 3 + 262144 + 8 + + + 65 + 8 + 51 + 3 + 262144 + 8 + + + 69 + 8 + 50 + 3 + 262144 + 8 + + + 73 + 8 + 48 + 3 + 262144 + 8 + + + 77 + 8 + 49 + 3 + 262144 + 8 + + + 81 + 8 + 55 + 3 + 262144 + 8 + + + 85 + 8 + 54 + 3 + 262144 + 8 + + + 89 + 8 + 52 + 3 + 262144 + 8 + + + 93 + 8 + 53 + 3 + 262144 + 8 + + + 97 + 8 + 59 + 3 + 262144 + 8 + + + 101 + 8 + 58 + 3 + 262144 + 8 + + + 105 + 8 + 56 + 3 + 262144 + 8 + + + 109 + 8 + 57 + 3 + 262144 + 8 + + + 113 + 8 + 63 + 3 + 262144 + 8 + + + 117 + 8 + 62 + 3 + 262144 + 8 + + + 121 + 8 + 60 + 3 + 262144 + 8 + + + 125 + 8 + 61 + 3 + 262144 + 8 + + + 129 + 8 + 29 + 3 + 262144 + 8 + + + 133 + 8 + 28 + 3 + 262144 + 8 + + + 137 + 8 + 30 + 3 + 262144 + 8 + + + 141 + 8 + 31 + 3 + 262144 + 8 + + + 145 + 8 + 25 + 3 + 262144 + 8 + + + 149 + 8 + 24 + 3 + 262144 + 8 + + + 153 + 8 + 26 + 3 + 262144 + 8 + + + 157 + 8 + 27 + 3 + 262144 + 8 + + + 161 + 8 + 21 + 3 + 262144 + 8 + + + 165 + 8 + 20 + 3 + 262144 + 8 + + + 169 + 8 + 22 + 3 + 262144 + 8 + + + 173 + 8 + 23 + 3 + 262144 + 8 + + + 177 + 8 + 17 + 3 + 262144 + 8 + + + 181 + 8 + 16 + 3 + 262144 + 8 + + + 185 + 8 + 18 + 3 + 262144 + 8 + + + 189 + 8 + 19 + 3 + 262144 + 8 + + + 193 + 8 + 12 + 3 + 262144 + 8 + + + 197 + 8 + 13 + 3 + 262144 + 8 + + + 201 + 8 + 15 + 3 + 262144 + 8 + + + 205 + 8 + 14 + 3 + 262144 + 8 + + + 209 + 8 + 8 + 3 + 262144 + 8 + + + 213 + 8 + 9 + 3 + 262144 + 8 + + + 217 + 8 + 11 + 3 + 262144 + 8 + + + 221 + 8 + 10 + 3 + 262144 + 8 + + + 225 + 8 + 4 + 3 + 262144 + 8 + + + 229 + 8 + 5 + 3 + 262144 + 8 + + + 233 + 8 + 7 + 3 + 262144 + 8 + + + 237 + 8 + 6 + 3 + 262144 + 8 + + + 241 + 8 + 0 + 3 + 262144 + 8 + + + 245 + 8 + 1 + 3 + 262144 + 8 + + + 249 + 8 + 3 + 3 + 262144 + 8 + + + 253 + 8 + 2 + 3 + 262144 + 8 + + + 257 + 1 + 64 + 0 + 64 + + + + diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/supporting_bulk_counter_groups b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/supporting_bulk_counter_groups new file mode 100644 index 00000000000..178f0575d04 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/supporting_bulk_counter_groups @@ -0,0 +1 @@ +QUEUE_WATERMARK_STAT_COUNTER,PG_WATERMARK_STAT_COUNTER,PFC_WD diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2 deleted file mode 120000 index c01aebb7ae1..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2 +++ /dev/null @@ -1 +0,0 @@ -../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2 new file mode 100644 index 00000000000..ecd8062080e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2 @@ -0,0 +1,212 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2022-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} + "BUFFER_POOL": { + {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} + "ingress_zero_pool" : { + "mode": "static", + "type": "ingress", + "size": "0" + }, + {% endif -%} + "ingress_lossless_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ ingress_lossless_pool_size }}", + {% endif -%} + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ egress_lossy_pool_size }}", + {% endif -%} + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} + "ingress_lossy_pg_zero_profile" : { + "pool":"ingress_zero_pool", + "size":"0", + "static_th":"0" + }, + "ingress_lossless_zero_profile" : { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"-8" + }, + "egress_lossless_zero_profile" : { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"-8" + }, + "egress_lossy_zero_profile" : { + "pool":"egress_lossy_pool", + "size":"0", + "dynamic_th":"-8" + }, + {% endif -%} + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"9216", + "dynamic_th":"7" + }, + "q_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"0", + "dynamic_th":"0" + }, + "q_lossy_minus_7_profile": { + "pool": "egress_lossy_pool", + "size": "0", + "dynamic_th" : "-7" + }, + "q_lossy_minus_3_profile": { + "pool": "egress_lossy_pool", + "size": "0", + "dynamic_th" : "-3" + } + }, +{%- endmacro %} + +{%- macro generate_profile_lists(port_names_active, port_names_inactive) %} + "BUFFER_PORT_INGRESS_PROFILE_LIST": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { + "profile_list" : "ingress_lossless_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% for port in port_names_inactive.split(',') %} + "{{ port }}": { +{% if dynamic_mode is defined %} + "profile_list" : "ingress_lossless_profile" +{% else %} + "profile_list" : "ingress_lossless_zero_profile" +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { + "profile_list" : "egress_lossless_profile,egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% for port in port_names_inactive.split(',') %} + "{{ port }}": { +{% if dynamic_mode is defined %} + "profile_list" : "egress_lossless_profile,egress_lossy_profile" +{% else %} + "profile_list" : "egress_lossless_zero_profile,egress_lossy_zero_profile" +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names_active, port_names_inactive) %} + +{% if dynamic_mode is not defined %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0": { + "profile" : "q_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|1-2": { + "profile" : "q_lossy_minus_7_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|3": { + "profile" : "q_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|4": { + "profile" : "q_lossy_minus_3_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-6": { + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|1-6": { + "profile" : "egress_lossy_zero_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_pg_profiles(port_names_active, port_names_inactive) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +{%- for port in port_names_inactive.split(',') %} + {%- if loop.first -%},{%- endif -%} + "{{ port }}|0": { +{% if dynamic_mode is defined %} + "profile" : "ingress_lossy_profile" +{% else %} + "profile" : "ingress_lossy_pg_zero_profile" +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + } +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 index b39eb626078..54d93665331 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 @@ -1,6 +1,6 @@ {# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES - Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,11 +15,17 @@ See the License for the specific language governing permissions and limitations under the License. #} -{% set default_cable = '40m' %} -{% set ingress_lossless_pool_size = '115245056' %} -{% set ingress_lossless_pool_xoff = '14826496' %} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '142704640' %} +{% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '158229504' %} -{% set egress_lossy_pool_size = '115245056' %} +{% set egress_lossy_pool_size = '142704640' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2 index 517c37f876f..54d93665331 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2 +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2 @@ -1,6 +1,6 @@ {# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES - Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,11 +15,17 @@ See the License for the specific language governing permissions and limitations under the License. #} -{% set default_cable = '300m' %} -{% set ingress_lossless_pool_size = '137779200' %} -{% set ingress_lossless_pool_xoff = '10092544' %} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '142704640' %} +{% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '158229504' %} -{% set egress_lossy_pool_size = '137779200' %} +{% set egress_lossy_pool_size = '142704640' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pg_profile_lookup.ini index c2e2f339447..748c4e323b9 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pg_profile_lookup.ini +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pg_profile_lookup.ini @@ -49,3 +49,11 @@ 200000 300m 19456 19456 130048 0 400000 300m 19456 19456 243712 0 800000 300m 38912 38912 411648 0 + 10000 1000m 19456 19456 24576 0 + 25000 1000m 19456 19456 46080 0 + 40000 1000m 19456 19456 68608 0 + 50000 1000m 19456 19456 83968 0 + 100000 1000m 19456 19456 168960 0 + 200000 1000m 19456 19456 308224 0 + 400000 1000m 19456 19456 610304 0 + 800000 1000m 38912 38912 1153024 0 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/port_config.ini index e8638e9a44e..b680de8371f 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/port_config.ini +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/port_config.ini @@ -16,261 +16,261 @@ ## limitations under the License. ## -# name lanes alias index speed fec autoneg subport -Ethernet0 0 etp1a 1 100000 rs off 1 -Ethernet1 1 etp1b 1 100000 rs off 2 -Ethernet2 2 etp1c 1 100000 rs off 3 -Ethernet3 3 etp1d 1 100000 rs off 4 -Ethernet4 4 etp1e 1 100000 rs off 5 -Ethernet5 5 etp1f 1 100000 rs off 6 -Ethernet6 6 etp1g 1 100000 rs off 7 -Ethernet7 7 etp1h 1 100000 rs off 8 -Ethernet16 16 etp3a 3 100000 rs off 1 -Ethernet17 17 etp3b 3 100000 rs off 2 -Ethernet18 18 etp3c 3 100000 rs off 3 -Ethernet19 19 etp3d 3 100000 rs off 4 -Ethernet20 20 etp3e 3 100000 rs off 5 -Ethernet21 21 etp3f 3 100000 rs off 6 -Ethernet22 22 etp3g 3 100000 rs off 7 -Ethernet23 23 etp3h 3 100000 rs off 8 -Ethernet32 32 etp5a 5 100000 rs off 1 -Ethernet33 33 etp5b 5 100000 rs off 2 -Ethernet34 34 etp5c 5 100000 rs off 3 -Ethernet35 35 etp5d 5 100000 rs off 4 -Ethernet36 36 etp5e 5 100000 rs off 5 -Ethernet37 37 etp5f 5 100000 rs off 6 -Ethernet38 38 etp5g 5 100000 rs off 7 -Ethernet39 39 etp5h 5 100000 rs off 8 -Ethernet48 48 etp7a 7 100000 rs off 1 -Ethernet49 49 etp7b 7 100000 rs off 2 -Ethernet50 50 etp7c 7 100000 rs off 3 -Ethernet51 51 etp7d 7 100000 rs off 4 -Ethernet52 52 etp7e 7 100000 rs off 5 -Ethernet53 53 etp7f 7 100000 rs off 6 -Ethernet54 54 etp7g 7 100000 rs off 7 -Ethernet55 55 etp7h 7 100000 rs off 8 -Ethernet64 64 etp9a 9 100000 rs off 1 -Ethernet65 65 etp9b 9 100000 rs off 2 -Ethernet66 66 etp9c 9 100000 rs off 3 -Ethernet67 67 etp9d 9 100000 rs off 4 -Ethernet68 68 etp9e 9 100000 rs off 5 -Ethernet69 69 etp9f 9 100000 rs off 6 -Ethernet70 70 etp9g 9 100000 rs off 7 -Ethernet71 71 etp9h 9 100000 rs off 8 -Ethernet80 80 etp11a 11 100000 rs off 1 -Ethernet81 81 etp11b 11 100000 rs off 2 -Ethernet82 82 etp11c 11 100000 rs off 3 -Ethernet83 83 etp11d 11 100000 rs off 4 -Ethernet84 84 etp11e 11 100000 rs off 5 -Ethernet85 85 etp11f 11 100000 rs off 6 -Ethernet86 86 etp11g 11 100000 rs off 7 -Ethernet87 87 etp11h 11 100000 rs off 8 -Ethernet96 96 etp13a 13 100000 rs off 1 -Ethernet97 97 etp13b 13 100000 rs off 2 -Ethernet98 98 etp13c 13 100000 rs off 3 -Ethernet99 99 etp13d 13 100000 rs off 4 -Ethernet100 100 etp13e 13 100000 rs off 5 -Ethernet101 101 etp13f 13 100000 rs off 6 -Ethernet102 102 etp13g 13 100000 rs off 7 -Ethernet103 103 etp13h 13 100000 rs off 8 -Ethernet112 112 etp15a 15 100000 rs off 1 -Ethernet113 113 etp15b 15 100000 rs off 2 -Ethernet114 114 etp15c 15 100000 rs off 3 -Ethernet115 115 etp15d 15 100000 rs off 4 -Ethernet116 116 etp15e 15 100000 rs off 5 -Ethernet117 117 etp15f 15 100000 rs off 6 -Ethernet118 118 etp15g 15 100000 rs off 7 -Ethernet119 119 etp15h 15 100000 rs off 8 -Ethernet128 128 etp17a 17 100000 rs off 1 -Ethernet129 129 etp17b 17 100000 rs off 2 -Ethernet130 130 etp17c 17 100000 rs off 3 -Ethernet131 131 etp17d 17 100000 rs off 4 -Ethernet132 132 etp17e 17 100000 rs off 5 -Ethernet133 133 etp17f 17 100000 rs off 6 -Ethernet134 134 etp17g 17 100000 rs off 7 -Ethernet135 135 etp17h 17 100000 rs off 8 -Ethernet144 144 etp19a 19 100000 rs off 1 -Ethernet145 145 etp19b 19 100000 rs off 2 -Ethernet146 146 etp19c 19 100000 rs off 3 -Ethernet147 147 etp19d 19 100000 rs off 4 -Ethernet148 148 etp19e 19 100000 rs off 5 -Ethernet149 149 etp19f 19 100000 rs off 6 -Ethernet150 150 etp19g 19 100000 rs off 7 -Ethernet151 151 etp19h 19 100000 rs off 8 -Ethernet160 160 etp21a 21 100000 rs off 1 -Ethernet161 161 etp21b 21 100000 rs off 2 -Ethernet162 162 etp21c 21 100000 rs off 3 -Ethernet163 163 etp21d 21 100000 rs off 4 -Ethernet164 164 etp21e 21 100000 rs off 5 -Ethernet165 165 etp21f 21 100000 rs off 6 -Ethernet166 166 etp21g 21 100000 rs off 7 -Ethernet167 167 etp21h 21 100000 rs off 8 -Ethernet176 176 etp23a 23 100000 rs off 1 -Ethernet177 177 etp23b 23 100000 rs off 2 -Ethernet178 178 etp23c 23 100000 rs off 3 -Ethernet179 179 etp23d 23 100000 rs off 4 -Ethernet180 180 etp23e 23 100000 rs off 5 -Ethernet181 181 etp23f 23 100000 rs off 6 -Ethernet182 182 etp23g 23 100000 rs off 7 -Ethernet183 183 etp23h 23 100000 rs off 8 -Ethernet192 192 etp25a 25 100000 rs off 1 -Ethernet193 193 etp25b 25 100000 rs off 2 -Ethernet194 194 etp25c 25 100000 rs off 3 -Ethernet195 195 etp25d 25 100000 rs off 4 -Ethernet196 196 etp25e 25 100000 rs off 5 -Ethernet197 197 etp25f 25 100000 rs off 6 -Ethernet198 198 etp25g 25 100000 rs off 7 -Ethernet199 199 etp25h 25 100000 rs off 8 -Ethernet208 208 etp27a 27 100000 rs off 1 -Ethernet209 209 etp27b 27 100000 rs off 2 -Ethernet210 210 etp27c 27 100000 rs off 3 -Ethernet211 211 etp27d 27 100000 rs off 4 -Ethernet212 212 etp27e 27 100000 rs off 5 -Ethernet213 213 etp27f 27 100000 rs off 6 -Ethernet214 214 etp27g 27 100000 rs off 7 -Ethernet215 215 etp27h 27 100000 rs off 8 -Ethernet224 224 etp29a 29 100000 rs off 1 -Ethernet225 225 etp29b 29 100000 rs off 2 -Ethernet226 226 etp29c 29 100000 rs off 3 -Ethernet227 227 etp29d 29 100000 rs off 4 -Ethernet228 228 etp29e 29 100000 rs off 5 -Ethernet229 229 etp29f 29 100000 rs off 6 -Ethernet230 230 etp29g 29 100000 rs off 7 -Ethernet231 231 etp29h 29 100000 rs off 8 -Ethernet240 240 etp31a 31 100000 rs off 1 -Ethernet241 241 etp31b 31 100000 rs off 2 -Ethernet242 242 etp31c 31 100000 rs off 3 -Ethernet243 243 etp31d 31 100000 rs off 4 -Ethernet244 244 etp31e 31 100000 rs off 5 -Ethernet245 245 etp31f 31 100000 rs off 6 -Ethernet246 246 etp31g 31 100000 rs off 7 -Ethernet247 247 etp31h 31 100000 rs off 8 -Ethernet256 256 etp33a 33 100000 rs off 1 -Ethernet257 257 etp33b 33 100000 rs off 2 -Ethernet258 258 etp33c 33 100000 rs off 3 -Ethernet259 259 etp33d 33 100000 rs off 4 -Ethernet260 260 etp33e 33 100000 rs off 5 -Ethernet261 261 etp33f 33 100000 rs off 6 -Ethernet262 262 etp33g 33 100000 rs off 7 -Ethernet263 263 etp33h 33 100000 rs off 8 -Ethernet272 272 etp35a 35 100000 rs off 1 -Ethernet273 273 etp35b 35 100000 rs off 2 -Ethernet274 274 etp35c 35 100000 rs off 3 -Ethernet275 275 etp35d 35 100000 rs off 4 -Ethernet276 276 etp35e 35 100000 rs off 5 -Ethernet277 277 etp35f 35 100000 rs off 6 -Ethernet278 278 etp35g 35 100000 rs off 7 -Ethernet279 279 etp35h 35 100000 rs off 8 -Ethernet288 288 etp37a 37 100000 rs off 1 -Ethernet289 289 etp37b 37 100000 rs off 2 -Ethernet290 290 etp37c 37 100000 rs off 3 -Ethernet291 291 etp37d 37 100000 rs off 4 -Ethernet292 292 etp37e 37 100000 rs off 5 -Ethernet293 293 etp37f 37 100000 rs off 6 -Ethernet294 294 etp37g 37 100000 rs off 7 -Ethernet295 295 etp37h 37 100000 rs off 8 -Ethernet304 304 etp39a 39 100000 rs off 1 -Ethernet305 305 etp39b 39 100000 rs off 2 -Ethernet306 306 etp39c 39 100000 rs off 3 -Ethernet307 307 etp39d 39 100000 rs off 4 -Ethernet308 308 etp39e 39 100000 rs off 5 -Ethernet309 309 etp39f 39 100000 rs off 6 -Ethernet310 310 etp39g 39 100000 rs off 7 -Ethernet311 311 etp39h 39 100000 rs off 8 -Ethernet320 320 etp41a 41 100000 rs off 1 -Ethernet321 321 etp41b 41 100000 rs off 2 -Ethernet322 322 etp41c 41 100000 rs off 3 -Ethernet323 323 etp41d 41 100000 rs off 4 -Ethernet324 324 etp41e 41 100000 rs off 5 -Ethernet325 325 etp41f 41 100000 rs off 6 -Ethernet326 326 etp41g 41 100000 rs off 7 -Ethernet327 327 etp41h 41 100000 rs off 8 -Ethernet336 336 etp43a 43 100000 rs off 1 -Ethernet337 337 etp43b 43 100000 rs off 2 -Ethernet338 338 etp43c 43 100000 rs off 3 -Ethernet339 339 etp43d 43 100000 rs off 4 -Ethernet340 340 etp43e 43 100000 rs off 5 -Ethernet341 341 etp43f 43 100000 rs off 6 -Ethernet342 342 etp43g 43 100000 rs off 7 -Ethernet343 343 etp43h 43 100000 rs off 8 -Ethernet352 352 etp45a 45 100000 rs off 1 -Ethernet353 353 etp45b 45 100000 rs off 2 -Ethernet354 354 etp45c 45 100000 rs off 3 -Ethernet355 355 etp45d 45 100000 rs off 4 -Ethernet356 356 etp45e 45 100000 rs off 5 -Ethernet357 357 etp45f 45 100000 rs off 6 -Ethernet358 358 etp45g 45 100000 rs off 7 -Ethernet359 359 etp45h 45 100000 rs off 8 -Ethernet368 368 etp47a 47 100000 rs off 1 -Ethernet369 369 etp47b 47 100000 rs off 2 -Ethernet370 370 etp47c 47 100000 rs off 3 -Ethernet371 371 etp47d 47 100000 rs off 4 -Ethernet372 372 etp47e 47 100000 rs off 5 -Ethernet373 373 etp47f 47 100000 rs off 6 -Ethernet374 374 etp47g 47 100000 rs off 7 -Ethernet375 375 etp47h 47 100000 rs off 8 -Ethernet384 384 etp49a 49 100000 rs off 1 -Ethernet385 385 etp49b 49 100000 rs off 2 -Ethernet386 386 etp49c 49 100000 rs off 3 -Ethernet387 387 etp49d 49 100000 rs off 4 -Ethernet388 388 etp49e 49 100000 rs off 5 -Ethernet389 389 etp49f 49 100000 rs off 6 -Ethernet390 390 etp49g 49 100000 rs off 7 -Ethernet391 391 etp49h 49 100000 rs off 8 -Ethernet400 400 etp51a 51 100000 rs off 1 -Ethernet401 401 etp51b 51 100000 rs off 2 -Ethernet402 402 etp51c 51 100000 rs off 3 -Ethernet403 403 etp51d 51 100000 rs off 4 -Ethernet404 404 etp51e 51 100000 rs off 5 -Ethernet405 405 etp51f 51 100000 rs off 6 -Ethernet406 406 etp51g 51 100000 rs off 7 -Ethernet407 407 etp51h 51 100000 rs off 8 -Ethernet416 416 etp53a 53 100000 rs off 1 -Ethernet417 417 etp53b 53 100000 rs off 2 -Ethernet418 418 etp53c 53 100000 rs off 3 -Ethernet419 419 etp53d 53 100000 rs off 4 -Ethernet420 420 etp53e 53 100000 rs off 5 -Ethernet421 421 etp53f 53 100000 rs off 6 -Ethernet422 422 etp53g 53 100000 rs off 7 -Ethernet423 423 etp53h 53 100000 rs off 8 -Ethernet432 432 etp55a 55 100000 rs off 1 -Ethernet433 433 etp55b 55 100000 rs off 2 -Ethernet434 434 etp55c 55 100000 rs off 3 -Ethernet435 435 etp55d 55 100000 rs off 4 -Ethernet436 436 etp55e 55 100000 rs off 5 -Ethernet437 437 etp55f 55 100000 rs off 6 -Ethernet438 438 etp55g 55 100000 rs off 7 -Ethernet439 439 etp55h 55 100000 rs off 8 -Ethernet448 448 etp57a 57 100000 rs off 1 -Ethernet449 449 etp57b 57 100000 rs off 2 -Ethernet450 450 etp57c 57 100000 rs off 3 -Ethernet451 451 etp57d 57 100000 rs off 4 -Ethernet452 452 etp57e 57 100000 rs off 5 -Ethernet453 453 etp57f 57 100000 rs off 6 -Ethernet454 454 etp57g 57 100000 rs off 7 -Ethernet455 455 etp57h 57 100000 rs off 8 -Ethernet464 464 etp59a 59 100000 rs off 1 -Ethernet465 465 etp59b 59 100000 rs off 2 -Ethernet466 466 etp59c 59 100000 rs off 3 -Ethernet467 467 etp59d 59 100000 rs off 4 -Ethernet468 468 etp59e 59 100000 rs off 5 -Ethernet469 469 etp59f 59 100000 rs off 6 -Ethernet470 470 etp59g 59 100000 rs off 7 -Ethernet471 471 etp59h 59 100000 rs off 8 -Ethernet480 480 etp61a 61 100000 rs off 1 -Ethernet481 481 etp61b 61 100000 rs off 2 -Ethernet482 482 etp61c 61 100000 rs off 3 -Ethernet483 483 etp61d 61 100000 rs off 4 -Ethernet484 484 etp61e 61 100000 rs off 5 -Ethernet485 485 etp61f 61 100000 rs off 6 -Ethernet486 486 etp61g 61 100000 rs off 7 -Ethernet487 487 etp61h 61 100000 rs off 8 -Ethernet496 496 etp63a 63 100000 rs off 1 -Ethernet497 497 etp63b 63 100000 rs off 2 -Ethernet498 498 etp63c 63 100000 rs off 3 -Ethernet499 499 etp63d 63 100000 rs off 4 -Ethernet500 500 etp63e 63 100000 rs off 5 -Ethernet501 501 etp63f 63 100000 rs off 6 -Ethernet502 502 etp63g 63 100000 rs off 7 -Ethernet503 503 etp63h 63 100000 rs off 8 -Ethernet512 512 etp65 65 10000 rs +# name lanes alias index speed autoneg subport +Ethernet0 0 etp1a 1 100000 off 1 +Ethernet1 1 etp1b 1 100000 off 2 +Ethernet2 2 etp1c 1 100000 off 3 +Ethernet3 3 etp1d 1 100000 off 4 +Ethernet4 4 etp1e 1 100000 off 5 +Ethernet5 5 etp1f 1 100000 off 6 +Ethernet6 6 etp1g 1 100000 off 7 +Ethernet7 7 etp1h 1 100000 off 8 +Ethernet16 16 etp3a 3 100000 off 1 +Ethernet17 17 etp3b 3 100000 off 2 +Ethernet18 18 etp3c 3 100000 off 3 +Ethernet19 19 etp3d 3 100000 off 4 +Ethernet20 20 etp3e 3 100000 off 5 +Ethernet21 21 etp3f 3 100000 off 6 +Ethernet22 22 etp3g 3 100000 off 7 +Ethernet23 23 etp3h 3 100000 off 8 +Ethernet32 32 etp5a 5 100000 off 1 +Ethernet33 33 etp5b 5 100000 off 2 +Ethernet34 34 etp5c 5 100000 off 3 +Ethernet35 35 etp5d 5 100000 off 4 +Ethernet36 36 etp5e 5 100000 off 5 +Ethernet37 37 etp5f 5 100000 off 6 +Ethernet38 38 etp5g 5 100000 off 7 +Ethernet39 39 etp5h 5 100000 off 8 +Ethernet48 48 etp7a 7 100000 off 1 +Ethernet49 49 etp7b 7 100000 off 2 +Ethernet50 50 etp7c 7 100000 off 3 +Ethernet51 51 etp7d 7 100000 off 4 +Ethernet52 52 etp7e 7 100000 off 5 +Ethernet53 53 etp7f 7 100000 off 6 +Ethernet54 54 etp7g 7 100000 off 7 +Ethernet55 55 etp7h 7 100000 off 8 +Ethernet64 64 etp9a 9 100000 off 1 +Ethernet65 65 etp9b 9 100000 off 2 +Ethernet66 66 etp9c 9 100000 off 3 +Ethernet67 67 etp9d 9 100000 off 4 +Ethernet68 68 etp9e 9 100000 off 5 +Ethernet69 69 etp9f 9 100000 off 6 +Ethernet70 70 etp9g 9 100000 off 7 +Ethernet71 71 etp9h 9 100000 off 8 +Ethernet80 80 etp11a 11 100000 off 1 +Ethernet81 81 etp11b 11 100000 off 2 +Ethernet82 82 etp11c 11 100000 off 3 +Ethernet83 83 etp11d 11 100000 off 4 +Ethernet84 84 etp11e 11 100000 off 5 +Ethernet85 85 etp11f 11 100000 off 6 +Ethernet86 86 etp11g 11 100000 off 7 +Ethernet87 87 etp11h 11 100000 off 8 +Ethernet96 96 etp13a 13 100000 off 1 +Ethernet97 97 etp13b 13 100000 off 2 +Ethernet98 98 etp13c 13 100000 off 3 +Ethernet99 99 etp13d 13 100000 off 4 +Ethernet100 100 etp13e 13 100000 off 5 +Ethernet101 101 etp13f 13 100000 off 6 +Ethernet102 102 etp13g 13 100000 off 7 +Ethernet103 103 etp13h 13 100000 off 8 +Ethernet112 112 etp15a 15 100000 off 1 +Ethernet113 113 etp15b 15 100000 off 2 +Ethernet114 114 etp15c 15 100000 off 3 +Ethernet115 115 etp15d 15 100000 off 4 +Ethernet116 116 etp15e 15 100000 off 5 +Ethernet117 117 etp15f 15 100000 off 6 +Ethernet118 118 etp15g 15 100000 off 7 +Ethernet119 119 etp15h 15 100000 off 8 +Ethernet128 128 etp17a 17 100000 off 1 +Ethernet129 129 etp17b 17 100000 off 2 +Ethernet130 130 etp17c 17 100000 off 3 +Ethernet131 131 etp17d 17 100000 off 4 +Ethernet132 132 etp17e 17 100000 off 5 +Ethernet133 133 etp17f 17 100000 off 6 +Ethernet134 134 etp17g 17 100000 off 7 +Ethernet135 135 etp17h 17 100000 off 8 +Ethernet144 144 etp19a 19 100000 off 1 +Ethernet145 145 etp19b 19 100000 off 2 +Ethernet146 146 etp19c 19 100000 off 3 +Ethernet147 147 etp19d 19 100000 off 4 +Ethernet148 148 etp19e 19 100000 off 5 +Ethernet149 149 etp19f 19 100000 off 6 +Ethernet150 150 etp19g 19 100000 off 7 +Ethernet151 151 etp19h 19 100000 off 8 +Ethernet160 160 etp21a 21 100000 off 1 +Ethernet161 161 etp21b 21 100000 off 2 +Ethernet162 162 etp21c 21 100000 off 3 +Ethernet163 163 etp21d 21 100000 off 4 +Ethernet164 164 etp21e 21 100000 off 5 +Ethernet165 165 etp21f 21 100000 off 6 +Ethernet166 166 etp21g 21 100000 off 7 +Ethernet167 167 etp21h 21 100000 off 8 +Ethernet176 176 etp23a 23 100000 off 1 +Ethernet177 177 etp23b 23 100000 off 2 +Ethernet178 178 etp23c 23 100000 off 3 +Ethernet179 179 etp23d 23 100000 off 4 +Ethernet180 180 etp23e 23 100000 off 5 +Ethernet181 181 etp23f 23 100000 off 6 +Ethernet182 182 etp23g 23 100000 off 7 +Ethernet183 183 etp23h 23 100000 off 8 +Ethernet192 192 etp25a 25 100000 off 1 +Ethernet193 193 etp25b 25 100000 off 2 +Ethernet194 194 etp25c 25 100000 off 3 +Ethernet195 195 etp25d 25 100000 off 4 +Ethernet196 196 etp25e 25 100000 off 5 +Ethernet197 197 etp25f 25 100000 off 6 +Ethernet198 198 etp25g 25 100000 off 7 +Ethernet199 199 etp25h 25 100000 off 8 +Ethernet208 208 etp27a 27 100000 off 1 +Ethernet209 209 etp27b 27 100000 off 2 +Ethernet210 210 etp27c 27 100000 off 3 +Ethernet211 211 etp27d 27 100000 off 4 +Ethernet212 212 etp27e 27 100000 off 5 +Ethernet213 213 etp27f 27 100000 off 6 +Ethernet214 214 etp27g 27 100000 off 7 +Ethernet215 215 etp27h 27 100000 off 8 +Ethernet224 224 etp29a 29 100000 off 1 +Ethernet225 225 etp29b 29 100000 off 2 +Ethernet226 226 etp29c 29 100000 off 3 +Ethernet227 227 etp29d 29 100000 off 4 +Ethernet228 228 etp29e 29 100000 off 5 +Ethernet229 229 etp29f 29 100000 off 6 +Ethernet230 230 etp29g 29 100000 off 7 +Ethernet231 231 etp29h 29 100000 off 8 +Ethernet240 240 etp31a 31 100000 off 1 +Ethernet241 241 etp31b 31 100000 off 2 +Ethernet242 242 etp31c 31 100000 off 3 +Ethernet243 243 etp31d 31 100000 off 4 +Ethernet244 244 etp31e 31 100000 off 5 +Ethernet245 245 etp31f 31 100000 off 6 +Ethernet246 246 etp31g 31 100000 off 7 +Ethernet247 247 etp31h 31 100000 off 8 +Ethernet256 256 etp33a 33 100000 off 1 +Ethernet257 257 etp33b 33 100000 off 2 +Ethernet258 258 etp33c 33 100000 off 3 +Ethernet259 259 etp33d 33 100000 off 4 +Ethernet260 260 etp33e 33 100000 off 5 +Ethernet261 261 etp33f 33 100000 off 6 +Ethernet262 262 etp33g 33 100000 off 7 +Ethernet263 263 etp33h 33 100000 off 8 +Ethernet272 272 etp35a 35 100000 off 1 +Ethernet273 273 etp35b 35 100000 off 2 +Ethernet274 274 etp35c 35 100000 off 3 +Ethernet275 275 etp35d 35 100000 off 4 +Ethernet276 276 etp35e 35 100000 off 5 +Ethernet277 277 etp35f 35 100000 off 6 +Ethernet278 278 etp35g 35 100000 off 7 +Ethernet279 279 etp35h 35 100000 off 8 +Ethernet288 288 etp37a 37 100000 off 1 +Ethernet289 289 etp37b 37 100000 off 2 +Ethernet290 290 etp37c 37 100000 off 3 +Ethernet291 291 etp37d 37 100000 off 4 +Ethernet292 292 etp37e 37 100000 off 5 +Ethernet293 293 etp37f 37 100000 off 6 +Ethernet294 294 etp37g 37 100000 off 7 +Ethernet295 295 etp37h 37 100000 off 8 +Ethernet304 304 etp39a 39 100000 off 1 +Ethernet305 305 etp39b 39 100000 off 2 +Ethernet306 306 etp39c 39 100000 off 3 +Ethernet307 307 etp39d 39 100000 off 4 +Ethernet308 308 etp39e 39 100000 off 5 +Ethernet309 309 etp39f 39 100000 off 6 +Ethernet310 310 etp39g 39 100000 off 7 +Ethernet311 311 etp39h 39 100000 off 8 +Ethernet320 320 etp41a 41 100000 off 1 +Ethernet321 321 etp41b 41 100000 off 2 +Ethernet322 322 etp41c 41 100000 off 3 +Ethernet323 323 etp41d 41 100000 off 4 +Ethernet324 324 etp41e 41 100000 off 5 +Ethernet325 325 etp41f 41 100000 off 6 +Ethernet326 326 etp41g 41 100000 off 7 +Ethernet327 327 etp41h 41 100000 off 8 +Ethernet336 336 etp43a 43 100000 off 1 +Ethernet337 337 etp43b 43 100000 off 2 +Ethernet338 338 etp43c 43 100000 off 3 +Ethernet339 339 etp43d 43 100000 off 4 +Ethernet340 340 etp43e 43 100000 off 5 +Ethernet341 341 etp43f 43 100000 off 6 +Ethernet342 342 etp43g 43 100000 off 7 +Ethernet343 343 etp43h 43 100000 off 8 +Ethernet352 352 etp45a 45 100000 off 1 +Ethernet353 353 etp45b 45 100000 off 2 +Ethernet354 354 etp45c 45 100000 off 3 +Ethernet355 355 etp45d 45 100000 off 4 +Ethernet356 356 etp45e 45 100000 off 5 +Ethernet357 357 etp45f 45 100000 off 6 +Ethernet358 358 etp45g 45 100000 off 7 +Ethernet359 359 etp45h 45 100000 off 8 +Ethernet368 368 etp47a 47 100000 off 1 +Ethernet369 369 etp47b 47 100000 off 2 +Ethernet370 370 etp47c 47 100000 off 3 +Ethernet371 371 etp47d 47 100000 off 4 +Ethernet372 372 etp47e 47 100000 off 5 +Ethernet373 373 etp47f 47 100000 off 6 +Ethernet374 374 etp47g 47 100000 off 7 +Ethernet375 375 etp47h 47 100000 off 8 +Ethernet384 384 etp49a 49 100000 off 1 +Ethernet385 385 etp49b 49 100000 off 2 +Ethernet386 386 etp49c 49 100000 off 3 +Ethernet387 387 etp49d 49 100000 off 4 +Ethernet388 388 etp49e 49 100000 off 5 +Ethernet389 389 etp49f 49 100000 off 6 +Ethernet390 390 etp49g 49 100000 off 7 +Ethernet391 391 etp49h 49 100000 off 8 +Ethernet400 400 etp51a 51 100000 off 1 +Ethernet401 401 etp51b 51 100000 off 2 +Ethernet402 402 etp51c 51 100000 off 3 +Ethernet403 403 etp51d 51 100000 off 4 +Ethernet404 404 etp51e 51 100000 off 5 +Ethernet405 405 etp51f 51 100000 off 6 +Ethernet406 406 etp51g 51 100000 off 7 +Ethernet407 407 etp51h 51 100000 off 8 +Ethernet416 416 etp53a 53 100000 off 1 +Ethernet417 417 etp53b 53 100000 off 2 +Ethernet418 418 etp53c 53 100000 off 3 +Ethernet419 419 etp53d 53 100000 off 4 +Ethernet420 420 etp53e 53 100000 off 5 +Ethernet421 421 etp53f 53 100000 off 6 +Ethernet422 422 etp53g 53 100000 off 7 +Ethernet423 423 etp53h 53 100000 off 8 +Ethernet432 432 etp55a 55 100000 off 1 +Ethernet433 433 etp55b 55 100000 off 2 +Ethernet434 434 etp55c 55 100000 off 3 +Ethernet435 435 etp55d 55 100000 off 4 +Ethernet436 436 etp55e 55 100000 off 5 +Ethernet437 437 etp55f 55 100000 off 6 +Ethernet438 438 etp55g 55 100000 off 7 +Ethernet439 439 etp55h 55 100000 off 8 +Ethernet448 448 etp57a 57 100000 off 1 +Ethernet449 449 etp57b 57 100000 off 2 +Ethernet450 450 etp57c 57 100000 off 3 +Ethernet451 451 etp57d 57 100000 off 4 +Ethernet452 452 etp57e 57 100000 off 5 +Ethernet453 453 etp57f 57 100000 off 6 +Ethernet454 454 etp57g 57 100000 off 7 +Ethernet455 455 etp57h 57 100000 off 8 +Ethernet464 464 etp59a 59 100000 off 1 +Ethernet465 465 etp59b 59 100000 off 2 +Ethernet466 466 etp59c 59 100000 off 3 +Ethernet467 467 etp59d 59 100000 off 4 +Ethernet468 468 etp59e 59 100000 off 5 +Ethernet469 469 etp59f 59 100000 off 6 +Ethernet470 470 etp59g 59 100000 off 7 +Ethernet471 471 etp59h 59 100000 off 8 +Ethernet480 480 etp61a 61 100000 off 1 +Ethernet481 481 etp61b 61 100000 off 2 +Ethernet482 482 etp61c 61 100000 off 3 +Ethernet483 483 etp61d 61 100000 off 4 +Ethernet484 484 etp61e 61 100000 off 5 +Ethernet485 485 etp61f 61 100000 off 6 +Ethernet486 486 etp61g 61 100000 off 7 +Ethernet487 487 etp61h 61 100000 off 8 +Ethernet496 496 etp63a 63 100000 off 1 +Ethernet497 497 etp63b 63 100000 off 2 +Ethernet498 498 etp63c 63 100000 off 3 +Ethernet499 499 etp63d 63 100000 off 4 +Ethernet500 500 etp63e 63 100000 off 5 +Ethernet501 501 etp63f 63 100000 off 6 +Ethernet502 502 etp63g 63 100000 off 7 +Ethernet503 503 etp63h 63 100000 off 8 +Ethernet512 512 etp65 65 10000 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2 deleted file mode 120000 index eccf286dc87..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2 +++ /dev/null @@ -1 +0,0 @@ -../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2 new file mode 100644 index 00000000000..99f048a1cd9 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2 @@ -0,0 +1,170 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} + +{%- macro generate_dscp_to_tc_map_per_sku() -%} + "DSCP_TO_TC_MAP": { + "AZURE": { + "0" : "6", + "1" : "1", + "2" : "2", + "3" : "3", + "4" : "3", + "5" : "4", + "6" : "5", + "7" : "0", + "8" : "0", + "9" : "0", + "10": "0", + "11": "0", + "12": "0", + "13": "0", + "14": "0", + "15": "0", + "16": "0", + "17": "0", + "18": "0", + "19": "0", + "20": "0", + "21": "0", + "22": "0", + "23": "0", + "24": "0", + "25": "0", + "26": "0", + "27": "0", + "28": "0", + "29": "0", + "30": "0", + "31": "0", + "32": "0", + "33": "0", + "34": "0", + "35": "0", + "36": "0", + "37": "0", + "38": "0", + "39": "0", + "40": "0", + "41": "0", + "42": "0", + "43": "0", + "44": "0", + "45": "0", + "46": "0", + "47": "0", + "48": "0", + "49": "0", + "50": "0", + "51": "0", + "52": "0", + "53": "0", + "54": "0", + "55": "0", + "56": "0", + "57": "0", + "58": "0", + "59": "0", + "60": "0", + "61": "0", + "62": "0", + "63": "0" + } + }, +{%- endmacro -%} +{%- macro generate_tc_to_pg_map_per_sku() -%} + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "0", + "4": "0", + "5": "0", + "6": "0", + "7": "0" + } + }, +{%- endmacro -%} + +{%- macro generate_scheduler_per_sku() -%} + "SCHEDULER": { + "scheduler.1": { + "type" : "DWRR", + "weight": "1" + }, + "scheduler.10": { + "type" : "DWRR", + "weight": "10" + }, + "scheduler.12": { + "type" : "DWRR", + "weight": "12" + }, + "scheduler.32": { + "type" : "DWRR", + "weight": "32" + } + }, +{%- endmacro -%} + +{%- macro generate_single_queue_per_sku(port) -%} + "{{ port }}|0": { + "scheduler": "scheduler.1" + }, + "{{ port }}|1": { + "scheduler": "scheduler.10" + }, + "{{ port }}|2": { + "scheduler": "scheduler.12" + }, + "{{ port }}|3": { + "scheduler": "scheduler.12" + }, + "{{ port }}|4": { + "scheduler": "scheduler.32" + }, + "{{ port }}|5": { + "scheduler": "scheduler.32" + }, + "{{ port }}|6": { + "scheduler": "scheduler.1" + } +{%- endmacro -%} + +{%- macro generate_global_dscp_to_tc_map() %} +{# This is an empty macro since the global DSCP_TO_TC map is not required #} +{%- endmacro %} + +{%- macro generate_wred_profiles() %} + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable" : "true", + "wred_yellow_enable" : "true", + "wred_red_enable" : "true", + "ecn" : "ecn_all", + "green_max_threshold" : "10000000", + "green_min_threshold" : "2000000", + "yellow_max_threshold" : "10000000", + "yellow_min_threshold" : "2000000", + "red_max_threshold" : "10000000", + "red_min_threshold" : "2000000", + "green_drop_probability" : "5", + "yellow_drop_probability": "5", + "red_drop_probability" : "5" + } + }, +{%- endmacro %} + +{%- include 'qos_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/port_config.ini index bf437af13a6..68f379efd69 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/port_config.ini +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/port_config.ini @@ -1,5 +1,6 @@ ## -## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ## Apache-2.0 ## ## Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,133 +16,133 @@ ## limitations under the License. ## -# name lanes alias index speed fec -Ethernet0 0,1,2,3 etp1a 1 400000 rs -Ethernet4 4,5,6,7 etp1b 1 400000 rs -Ethernet8 8,9,10,11 etp2a 2 400000 rs -Ethernet12 12,13,14,15 etp2b 2 400000 rs -Ethernet16 16,17,18,19 etp3a 3 400000 rs -Ethernet20 20,21,22,23 etp3b 3 400000 rs -Ethernet24 24,25,26,27 etp4a 4 400000 rs -Ethernet28 28,29,30,31 etp4b 4 400000 rs -Ethernet32 32,33,34,35 etp5a 5 400000 rs -Ethernet36 36,37,38,39 etp5b 5 400000 rs -Ethernet40 40,41,42,43 etp6a 6 400000 rs -Ethernet44 44,45,46,47 etp6b 6 400000 rs -Ethernet48 48,49,50,51 etp7a 7 400000 rs -Ethernet52 52,53,54,55 etp7b 7 400000 rs -Ethernet56 56,57,58,59 etp8a 8 400000 rs -Ethernet60 60,61,62,63 etp8b 8 400000 rs -Ethernet64 64,65,66,67 etp9a 9 400000 rs -Ethernet68 68,69,70,71 etp9b 9 400000 rs -Ethernet72 72,73,74,75 etp10a 10 400000 rs -Ethernet76 76,77,78,79 etp10b 10 400000 rs -Ethernet80 80,81,82,83 etp11a 11 400000 rs -Ethernet84 84,85,86,87 etp11b 11 400000 rs -Ethernet88 88,89,90,91 etp12a 12 400000 rs -Ethernet92 92,93,94,95 etp12b 12 400000 rs -Ethernet96 96,97,98,99 etp13a 13 400000 rs -Ethernet100 100,101,102,103 etp13b 13 400000 rs -Ethernet104 104,105,106,107 etp14a 14 400000 rs -Ethernet108 108,109,110,111 etp14b 14 400000 rs -Ethernet112 112,113,114,115 etp15a 15 400000 rs -Ethernet116 116,117,118,119 etp15b 15 400000 rs -Ethernet120 120,121,122,123 etp16a 16 400000 rs -Ethernet124 124,125,126,127 etp16b 16 400000 rs -Ethernet128 128,129,130,131 etp17a 17 400000 rs -Ethernet132 132,133,134,135 etp17b 17 400000 rs -Ethernet136 136,137,138,139 etp18a 18 400000 rs -Ethernet140 140,141,142,143 etp18b 18 400000 rs -Ethernet144 144,145,146,147 etp19a 19 400000 rs -Ethernet148 148,149,150,151 etp19b 19 400000 rs -Ethernet152 152,153,154,155 etp20a 20 400000 rs -Ethernet156 156,157,158,159 etp20b 20 400000 rs -Ethernet160 160,161,162,163 etp21a 21 400000 rs -Ethernet164 164,165,166,167 etp21b 21 400000 rs -Ethernet168 168,169,170,171 etp22a 22 400000 rs -Ethernet172 172,173,174,175 etp22b 22 400000 rs -Ethernet176 176,177,178,179 etp23a 23 400000 rs -Ethernet180 180,181,182,183 etp23b 23 400000 rs -Ethernet184 184,185,186,187 etp24a 24 400000 rs -Ethernet188 188,189,190,191 etp24b 24 400000 rs -Ethernet192 192,193,194,195 etp25a 25 400000 rs -Ethernet196 196,197,198,199 etp25b 25 400000 rs -Ethernet200 200,201,202,203 etp26a 26 400000 rs -Ethernet204 204,205,206,207 etp26b 26 400000 rs -Ethernet208 208,209,210,211 etp27a 27 400000 rs -Ethernet212 212,213,214,215 etp27b 27 400000 rs -Ethernet216 216,217,218,219 etp28a 28 400000 rs -Ethernet220 220,221,222,223 etp28b 28 400000 rs -Ethernet224 224,225,226,227 etp29a 29 400000 rs -Ethernet228 228,229,230,231 etp29b 29 400000 rs -Ethernet232 232,233,234,235 etp30a 30 400000 rs -Ethernet236 236,237,238,239 etp30b 30 400000 rs -Ethernet240 240,241,242,243 etp31a 31 400000 rs -Ethernet244 244,245,246,247 etp31b 31 400000 rs -Ethernet248 248,249,250,251 etp32a 32 400000 rs -Ethernet252 252,253,254,255 etp32b 32 400000 rs -Ethernet256 256,257,258,259 etp33a 33 400000 rs -Ethernet260 260,261,262,263 etp33b 33 400000 rs -Ethernet264 264,265,266,267 etp34a 34 400000 rs -Ethernet268 268,269,270,271 etp34b 34 400000 rs -Ethernet272 272,273,274,275 etp35a 35 400000 rs -Ethernet276 276,277,278,279 etp35b 35 400000 rs -Ethernet280 280,281,282,283 etp36a 36 400000 rs -Ethernet284 284,285,286,287 etp36b 36 400000 rs -Ethernet288 288,289,290,291 etp37a 37 400000 rs -Ethernet292 292,293,294,295 etp37b 37 400000 rs -Ethernet296 296,297,298,299 etp38a 38 400000 rs -Ethernet300 300,301,302,303 etp38b 38 400000 rs -Ethernet304 304,305,306,307 etp39a 39 400000 rs -Ethernet308 308,309,310,311 etp39b 39 400000 rs -Ethernet312 312,313,314,315 etp40a 40 400000 rs -Ethernet316 316,317,318,319 etp40b 40 400000 rs -Ethernet320 320,321,322,323 etp41a 41 400000 rs -Ethernet324 324,325,326,327 etp41b 41 400000 rs -Ethernet328 328,329,330,331 etp42a 42 400000 rs -Ethernet332 332,333,334,335 etp42b 42 400000 rs -Ethernet336 336,337,338,339 etp43a 43 400000 rs -Ethernet340 340,341,342,343 etp43b 43 400000 rs -Ethernet344 344,345,346,347 etp44a 44 400000 rs -Ethernet348 348,349,350,351 etp44b 44 400000 rs -Ethernet352 352,353,354,355 etp45a 45 400000 rs -Ethernet356 356,357,358,359 etp45b 45 400000 rs -Ethernet360 360,361,362,363 etp46a 46 400000 rs -Ethernet364 364,365,366,367 etp46b 46 400000 rs -Ethernet368 368,369,370,371 etp47a 47 400000 rs -Ethernet372 372,373,374,375 etp47b 47 400000 rs -Ethernet376 376,377,378,379 etp48a 48 400000 rs -Ethernet380 380,381,382,383 etp48b 48 400000 rs -Ethernet384 384,385,386,387 etp49a 49 400000 rs -Ethernet388 388,389,390,391 etp49b 49 400000 rs -Ethernet392 392,393,394,395 etp50a 50 400000 rs -Ethernet396 396,397,398,399 etp50b 50 400000 rs -Ethernet400 400,401,402,403 etp51a 51 400000 rs -Ethernet404 404,405,406,407 etp51b 51 400000 rs -Ethernet408 408,409,410,411 etp52a 52 400000 rs -Ethernet412 412,413,414,415 etp52b 52 400000 rs -Ethernet416 416,417,418,419 etp53a 53 400000 rs -Ethernet420 420,421,422,423 etp53b 53 400000 rs -Ethernet424 424,425,426,427 etp54a 54 400000 rs -Ethernet428 428,429,430,431 etp54b 54 400000 rs -Ethernet432 432,433,434,435 etp55a 55 400000 rs -Ethernet436 436,437,438,439 etp55b 55 400000 rs -Ethernet440 440,441,442,443 etp56a 56 400000 rs -Ethernet444 444,445,446,447 etp56b 56 400000 rs -Ethernet448 448,449,450,451 etp57a 57 400000 rs -Ethernet452 452,453,454,455 etp57b 57 400000 rs -Ethernet456 456,457,458,459 etp58a 58 400000 rs -Ethernet460 460,461,462,463 etp58b 58 400000 rs -Ethernet464 464,465,466,467 etp59a 59 400000 rs -Ethernet468 468,469,470,471 etp59b 59 400000 rs -Ethernet472 472,473,474,475 etp60a 60 400000 rs -Ethernet476 476,477,478,479 etp60b 60 400000 rs -Ethernet480 480,481,482,483 etp61a 61 400000 rs -Ethernet484 484,485,486,487 etp61b 61 400000 rs -Ethernet488 488,489,490,491 etp62a 62 400000 rs -Ethernet492 492,493,494,495 etp62b 62 400000 rs -Ethernet496 496,497,498,499 etp63a 63 400000 rs -Ethernet500 500,501,502,503 etp63b 63 400000 rs -Ethernet504 504,505,506,507 etp64a 64 400000 rs -Ethernet508 508,509,510,511 etp64b 64 400000 rs +# name lanes alias index speed +Ethernet0 0,1,2,3 etp1a 1 400000 +Ethernet4 4,5,6,7 etp1b 1 400000 +Ethernet8 8,9,10,11 etp2a 2 400000 +Ethernet12 12,13,14,15 etp2b 2 400000 +Ethernet16 16,17,18,19 etp3a 3 400000 +Ethernet20 20,21,22,23 etp3b 3 400000 +Ethernet24 24,25,26,27 etp4a 4 400000 +Ethernet28 28,29,30,31 etp4b 4 400000 +Ethernet32 32,33,34,35 etp5a 5 400000 +Ethernet36 36,37,38,39 etp5b 5 400000 +Ethernet40 40,41,42,43 etp6a 6 400000 +Ethernet44 44,45,46,47 etp6b 6 400000 +Ethernet48 48,49,50,51 etp7a 7 400000 +Ethernet52 52,53,54,55 etp7b 7 400000 +Ethernet56 56,57,58,59 etp8a 8 400000 +Ethernet60 60,61,62,63 etp8b 8 400000 +Ethernet64 64,65,66,67 etp9a 9 400000 +Ethernet68 68,69,70,71 etp9b 9 400000 +Ethernet72 72,73,74,75 etp10a 10 400000 +Ethernet76 76,77,78,79 etp10b 10 400000 +Ethernet80 80,81,82,83 etp11a 11 400000 +Ethernet84 84,85,86,87 etp11b 11 400000 +Ethernet88 88,89,90,91 etp12a 12 400000 +Ethernet92 92,93,94,95 etp12b 12 400000 +Ethernet96 96,97,98,99 etp13a 13 400000 +Ethernet100 100,101,102,103 etp13b 13 400000 +Ethernet104 104,105,106,107 etp14a 14 400000 +Ethernet108 108,109,110,111 etp14b 14 400000 +Ethernet112 112,113,114,115 etp15a 15 400000 +Ethernet116 116,117,118,119 etp15b 15 400000 +Ethernet120 120,121,122,123 etp16a 16 400000 +Ethernet124 124,125,126,127 etp16b 16 400000 +Ethernet128 128,129,130,131 etp17a 17 400000 +Ethernet132 132,133,134,135 etp17b 17 400000 +Ethernet136 136,137,138,139 etp18a 18 400000 +Ethernet140 140,141,142,143 etp18b 18 400000 +Ethernet144 144,145,146,147 etp19a 19 400000 +Ethernet148 148,149,150,151 etp19b 19 400000 +Ethernet152 152,153,154,155 etp20a 20 400000 +Ethernet156 156,157,158,159 etp20b 20 400000 +Ethernet160 160,161,162,163 etp21a 21 400000 +Ethernet164 164,165,166,167 etp21b 21 400000 +Ethernet168 168,169,170,171 etp22a 22 400000 +Ethernet172 172,173,174,175 etp22b 22 400000 +Ethernet176 176,177,178,179 etp23a 23 400000 +Ethernet180 180,181,182,183 etp23b 23 400000 +Ethernet184 184,185,186,187 etp24a 24 400000 +Ethernet188 188,189,190,191 etp24b 24 400000 +Ethernet192 192,193,194,195 etp25a 25 400000 +Ethernet196 196,197,198,199 etp25b 25 400000 +Ethernet200 200,201,202,203 etp26a 26 400000 +Ethernet204 204,205,206,207 etp26b 26 400000 +Ethernet208 208,209,210,211 etp27a 27 400000 +Ethernet212 212,213,214,215 etp27b 27 400000 +Ethernet216 216,217,218,219 etp28a 28 400000 +Ethernet220 220,221,222,223 etp28b 28 400000 +Ethernet224 224,225,226,227 etp29a 29 400000 +Ethernet228 228,229,230,231 etp29b 29 400000 +Ethernet232 232,233,234,235 etp30a 30 400000 +Ethernet236 236,237,238,239 etp30b 30 400000 +Ethernet240 240,241,242,243 etp31a 31 400000 +Ethernet244 244,245,246,247 etp31b 31 400000 +Ethernet248 248,249,250,251 etp32a 32 400000 +Ethernet252 252,253,254,255 etp32b 32 400000 +Ethernet256 256,257,258,259 etp33a 33 400000 +Ethernet260 260,261,262,263 etp33b 33 400000 +Ethernet264 264,265,266,267 etp34a 34 400000 +Ethernet268 268,269,270,271 etp34b 34 400000 +Ethernet272 272,273,274,275 etp35a 35 400000 +Ethernet276 276,277,278,279 etp35b 35 400000 +Ethernet280 280,281,282,283 etp36a 36 400000 +Ethernet284 284,285,286,287 etp36b 36 400000 +Ethernet288 288,289,290,291 etp37a 37 400000 +Ethernet292 292,293,294,295 etp37b 37 400000 +Ethernet296 296,297,298,299 etp38a 38 400000 +Ethernet300 300,301,302,303 etp38b 38 400000 +Ethernet304 304,305,306,307 etp39a 39 400000 +Ethernet308 308,309,310,311 etp39b 39 400000 +Ethernet312 312,313,314,315 etp40a 40 400000 +Ethernet316 316,317,318,319 etp40b 40 400000 +Ethernet320 320,321,322,323 etp41a 41 400000 +Ethernet324 324,325,326,327 etp41b 41 400000 +Ethernet328 328,329,330,331 etp42a 42 400000 +Ethernet332 332,333,334,335 etp42b 42 400000 +Ethernet336 336,337,338,339 etp43a 43 400000 +Ethernet340 340,341,342,343 etp43b 43 400000 +Ethernet344 344,345,346,347 etp44a 44 400000 +Ethernet348 348,349,350,351 etp44b 44 400000 +Ethernet352 352,353,354,355 etp45a 45 400000 +Ethernet356 356,357,358,359 etp45b 45 400000 +Ethernet360 360,361,362,363 etp46a 46 400000 +Ethernet364 364,365,366,367 etp46b 46 400000 +Ethernet368 368,369,370,371 etp47a 47 400000 +Ethernet372 372,373,374,375 etp47b 47 400000 +Ethernet376 376,377,378,379 etp48a 48 400000 +Ethernet380 380,381,382,383 etp48b 48 400000 +Ethernet384 384,385,386,387 etp49a 49 400000 +Ethernet388 388,389,390,391 etp49b 49 400000 +Ethernet392 392,393,394,395 etp50a 50 400000 +Ethernet396 396,397,398,399 etp50b 50 400000 +Ethernet400 400,401,402,403 etp51a 51 400000 +Ethernet404 404,405,406,407 etp51b 51 400000 +Ethernet408 408,409,410,411 etp52a 52 400000 +Ethernet412 412,413,414,415 etp52b 52 400000 +Ethernet416 416,417,418,419 etp53a 53 400000 +Ethernet420 420,421,422,423 etp53b 53 400000 +Ethernet424 424,425,426,427 etp54a 54 400000 +Ethernet428 428,429,430,431 etp54b 54 400000 +Ethernet432 432,433,434,435 etp55a 55 400000 +Ethernet436 436,437,438,439 etp55b 55 400000 +Ethernet440 440,441,442,443 etp56a 56 400000 +Ethernet444 444,445,446,447 etp56b 56 400000 +Ethernet448 448,449,450,451 etp57a 57 400000 +Ethernet452 452,453,454,455 etp57b 57 400000 +Ethernet456 456,457,458,459 etp58a 58 400000 +Ethernet460 460,461,462,463 etp58b 58 400000 +Ethernet464 464,465,466,467 etp59a 59 400000 +Ethernet468 468,469,470,471 etp59b 59 400000 +Ethernet472 472,473,474,475 etp60a 60 400000 +Ethernet476 476,477,478,479 etp60b 60 400000 +Ethernet480 480,481,482,483 etp61a 61 400000 +Ethernet484 484,485,486,487 etp61b 61 400000 +Ethernet488 488,489,490,491 etp62a 62 400000 +Ethernet492 492,493,494,495 etp62b 62 400000 +Ethernet496 496,497,498,499 etp63a 63 400000 +Ethernet500 500,501,502,503 etp63b 63 400000 +Ethernet504 504,505,506,507 etp64a 64 400000 +Ethernet508 508,509,510,511 etp64b 64 400000 Ethernet512 512 etp65 65 25000 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json index 6b48c7b70ad..377d4116c10 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json @@ -2,6 +2,316 @@ "GLOBAL_MEDIA_SETTINGS": { "1-64": { "OSFP-8X-sm_media_interface": { + "speed:100GAUI-1-L": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "main": { + "lane0": "0x0000002b", + "lane1": "0x0000002b", + "lane2": "0x0000002b", + "lane3": "0x0000002b", + "lane4": "0x0000002b", + "lane5": "0x0000002b", + "lane6": "0x0000002b", + "lane7": "0x0000002b" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "idriver": { + "lane0": "0x00000032", + "lane1": "0x00000032", + "lane2": "0x00000032", + "lane3": "0x00000032", + "lane4": "0x00000032", + "lane5": "0x00000032", + "lane6": "0x00000032", + "lane7": "0x00000032" + } + }, + "speed:100GAUI-1-S": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "main": { + "lane0": "0x0000002b", + "lane1": "0x0000002b", + "lane2": "0x0000002b", + "lane3": "0x0000002b", + "lane4": "0x0000002b", + "lane5": "0x0000002b", + "lane6": "0x0000002b", + "lane7": "0x0000002b" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "idriver": { + "lane0": "0x00000032", + "lane1": "0x00000032", + "lane2": "0x00000032", + "lane3": "0x00000032", + "lane4": "0x00000032", + "lane5": "0x00000032", + "lane6": "0x00000032", + "lane7": "0x00000032" + } + }, + "speed:200GAUI-2-S": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "main": { + "lane0": "0x0000002b", + "lane1": "0x0000002b", + "lane2": "0x0000002b", + "lane3": "0x0000002b", + "lane4": "0x0000002b", + "lane5": "0x0000002b", + "lane6": "0x0000002b", + "lane7": "0x0000002b" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "idriver": { + "lane0": "0x00000032", + "lane1": "0x00000032", + "lane2": "0x00000032", + "lane3": "0x00000032", + "lane4": "0x00000032", + "lane5": "0x00000032", + "lane6": "0x00000032", + "lane7": "0x00000032" + } + }, + "speed:200GAUI-2-L": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "main": { + "lane0": "0x0000002b", + "lane1": "0x0000002b", + "lane2": "0x0000002b", + "lane3": "0x0000002b", + "lane4": "0x0000002b", + "lane5": "0x0000002b", + "lane6": "0x0000002b", + "lane7": "0x0000002b" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "idriver": { + "lane0": "0x00000032", + "lane1": "0x00000032", + "lane2": "0x00000032", + "lane3": "0x00000032", + "lane4": "0x00000032", + "lane5": "0x00000032", + "lane6": "0x00000032", + "lane7": "0x00000032" + } + }, + "speed:200GAUI-4": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f", + "lane4": "0x0000003f", + "lane5": "0x0000003f", + "lane6": "0x0000003f", + "lane7": "0x0000003f" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "idriver": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f", + "lane4": "0x0000003f", + "lane5": "0x0000003f", + "lane6": "0x0000003f", + "lane7": "0x0000003f" + } + }, "speed:400GAUI-4-L": { "pre3": { "lane0": "0x00000000", @@ -190,7 +500,7 @@ } }, "OSFP-8X-nm_850_media_interface": { - "speed:800G": { + "speed:800G": { "pre3": { "lane0": "0x00000000", "lane1": "0x00000000", diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/port_config.ini index a995d8ed29f..9fe630c0adf 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/port_config.ini +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/port_config.ini @@ -1,5 +1,6 @@ ## -## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ## Apache-2.0 ## ## Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,261 +16,261 @@ ## limitations under the License. ## -# name lanes alias index speed fec -Ethernet0 0,1 etp1a 1 200000 rs -Ethernet2 2,3 etp1b 1 200000 rs -Ethernet4 4,5 etp1c 1 200000 rs -Ethernet6 6,7 etp1d 1 200000 rs -Ethernet8 8,9 etp2a 2 200000 rs -Ethernet10 10,11 etp2b 2 200000 rs -Ethernet12 12,13 etp2c 2 200000 rs -Ethernet14 14,15 etp2d 2 200000 rs -Ethernet16 16,17 etp3a 3 200000 rs -Ethernet18 18,19 etp3b 3 200000 rs -Ethernet20 20,21 etp3c 3 200000 rs -Ethernet22 22,23 etp3d 3 200000 rs -Ethernet24 24,25 etp4a 4 200000 rs -Ethernet26 26,27 etp4b 4 200000 rs -Ethernet28 28,29 etp4c 4 200000 rs -Ethernet30 30,31 etp4d 4 200000 rs -Ethernet32 32,33 etp5a 5 200000 rs -Ethernet34 34,35 etp5b 5 200000 rs -Ethernet36 36,37 etp5c 5 200000 rs -Ethernet38 38,39 etp5d 5 200000 rs -Ethernet40 40,41 etp6a 6 200000 rs -Ethernet42 42,43 etp6b 6 200000 rs -Ethernet44 44,45 etp6c 6 200000 rs -Ethernet46 46,47 etp6d 6 200000 rs -Ethernet48 48,49 etp7a 7 200000 rs -Ethernet50 50,51 etp7b 7 200000 rs -Ethernet52 52,53 etp7c 7 200000 rs -Ethernet54 54,55 etp7d 7 200000 rs -Ethernet56 56,57 etp8a 8 200000 rs -Ethernet58 58,59 etp8b 8 200000 rs -Ethernet60 60,61 etp8c 8 200000 rs -Ethernet62 62,63 etp8d 8 200000 rs -Ethernet64 64,65 etp9a 9 200000 rs -Ethernet66 66,67 etp9b 9 200000 rs -Ethernet68 68,69 etp9c 9 200000 rs -Ethernet70 70,71 etp9d 9 200000 rs -Ethernet72 72,73 etp10a 10 200000 rs -Ethernet74 74,75 etp10b 10 200000 rs -Ethernet76 76,77 etp10c 10 200000 rs -Ethernet78 78,79 etp10d 10 200000 rs -Ethernet80 80,81 etp11a 11 200000 rs -Ethernet82 82,83 etp11b 11 200000 rs -Ethernet84 84,85 etp11c 11 200000 rs -Ethernet86 86,87 etp11d 11 200000 rs -Ethernet88 88,89 etp12a 12 200000 rs -Ethernet90 90,91 etp12b 12 200000 rs -Ethernet92 92,93 etp12c 12 200000 rs -Ethernet94 94,95 etp12d 12 200000 rs -Ethernet96 96,97 etp13a 13 200000 rs -Ethernet98 98,99 etp13b 13 200000 rs -Ethernet100 100,101 etp13c 13 200000 rs -Ethernet102 102,103 etp13d 13 200000 rs -Ethernet104 104,105 etp14a 14 200000 rs -Ethernet106 106,107 etp14b 14 200000 rs -Ethernet108 108,109 etp14c 14 200000 rs -Ethernet110 110,111 etp14d 14 200000 rs -Ethernet112 112,113 etp15a 15 200000 rs -Ethernet114 114,115 etp15b 15 200000 rs -Ethernet116 116,117 etp15c 15 200000 rs -Ethernet118 118,119 etp15d 15 200000 rs -Ethernet120 120,121 etp16a 16 200000 rs -Ethernet122 122,123 etp16b 16 200000 rs -Ethernet124 124,125 etp16c 16 200000 rs -Ethernet126 126,127 etp16d 16 200000 rs -Ethernet128 128,129 etp17a 17 200000 rs -Ethernet130 130,131 etp17b 17 200000 rs -Ethernet132 132,133 etp17c 17 200000 rs -Ethernet134 134,135 etp17d 17 200000 rs -Ethernet136 136,137 etp18a 18 200000 rs -Ethernet138 138,139 etp18b 18 200000 rs -Ethernet140 140,141 etp18c 18 200000 rs -Ethernet142 142,143 etp18d 18 200000 rs -Ethernet144 144,145 etp19a 19 200000 rs -Ethernet146 146,147 etp19b 19 200000 rs -Ethernet148 148,149 etp19c 19 200000 rs -Ethernet150 150,151 etp19d 19 200000 rs -Ethernet152 152,153 etp20a 20 200000 rs -Ethernet154 154,155 etp20b 20 200000 rs -Ethernet156 156,157 etp20c 20 200000 rs -Ethernet158 158,159 etp20d 20 200000 rs -Ethernet160 160,161 etp21a 21 200000 rs -Ethernet162 162,163 etp21b 21 200000 rs -Ethernet164 164,165 etp21c 21 200000 rs -Ethernet166 166,167 etp21d 21 200000 rs -Ethernet168 168,169 etp22a 22 200000 rs -Ethernet170 170,171 etp22b 22 200000 rs -Ethernet172 172,173 etp22c 22 200000 rs -Ethernet174 174,175 etp22d 22 200000 rs -Ethernet176 176,177 etp23a 23 200000 rs -Ethernet178 178,179 etp23b 23 200000 rs -Ethernet180 180,181 etp23c 23 200000 rs -Ethernet182 182,183 etp23d 23 200000 rs -Ethernet184 184,185 etp24a 24 200000 rs -Ethernet186 186,187 etp24b 24 200000 rs -Ethernet188 188,189 etp24c 24 200000 rs -Ethernet190 190,191 etp24d 24 200000 rs -Ethernet192 192,193 etp25a 25 200000 rs -Ethernet194 194,195 etp25b 25 200000 rs -Ethernet196 196,197 etp25c 25 200000 rs -Ethernet198 198,199 etp25d 25 200000 rs -Ethernet200 200,201 etp26a 26 200000 rs -Ethernet202 202,203 etp26b 26 200000 rs -Ethernet204 204,205 etp26c 26 200000 rs -Ethernet206 206,207 etp26d 26 200000 rs -Ethernet208 208,209 etp27a 27 200000 rs -Ethernet210 210,211 etp27b 27 200000 rs -Ethernet212 212,213 etp27c 27 200000 rs -Ethernet214 214,215 etp27d 27 200000 rs -Ethernet216 216,217 etp28a 28 200000 rs -Ethernet218 218,219 etp28b 28 200000 rs -Ethernet220 220,221 etp28c 28 200000 rs -Ethernet222 222,223 etp28d 28 200000 rs -Ethernet224 224,225 etp29a 29 200000 rs -Ethernet226 226,227 etp29b 29 200000 rs -Ethernet228 228,229 etp29c 29 200000 rs -Ethernet230 230,231 etp29d 29 200000 rs -Ethernet232 232,233 etp30a 30 200000 rs -Ethernet234 234,235 etp30b 30 200000 rs -Ethernet236 236,237 etp30c 30 200000 rs -Ethernet238 238,239 etp30d 30 200000 rs -Ethernet240 240,241 etp31a 31 200000 rs -Ethernet242 242,243 etp31b 31 200000 rs -Ethernet244 244,245 etp31c 31 200000 rs -Ethernet246 246,247 etp31d 31 200000 rs -Ethernet248 248,249 etp32a 32 200000 rs -Ethernet250 250,251 etp32b 32 200000 rs -Ethernet252 252,253 etp32c 32 200000 rs -Ethernet254 254,255 etp32d 32 200000 rs -Ethernet256 256,257 etp33a 33 200000 rs -Ethernet258 258,259 etp33b 33 200000 rs -Ethernet260 260,261 etp33c 33 200000 rs -Ethernet262 262,263 etp33d 33 200000 rs -Ethernet264 264,265 etp34a 34 200000 rs -Ethernet266 266,267 etp34b 34 200000 rs -Ethernet268 268,269 etp34c 34 200000 rs -Ethernet270 270,271 etp34d 34 200000 rs -Ethernet272 272,273 etp35a 35 200000 rs -Ethernet274 274,275 etp35b 35 200000 rs -Ethernet276 276,277 etp35c 35 200000 rs -Ethernet278 278,279 etp35d 35 200000 rs -Ethernet280 280,281 etp36a 36 200000 rs -Ethernet282 282,283 etp36b 36 200000 rs -Ethernet284 284,285 etp36c 36 200000 rs -Ethernet286 286,287 etp36d 36 200000 rs -Ethernet288 288,289 etp37a 37 200000 rs -Ethernet290 290,291 etp37b 37 200000 rs -Ethernet292 292,293 etp37c 37 200000 rs -Ethernet294 294,295 etp37d 37 200000 rs -Ethernet296 296,297 etp38a 38 200000 rs -Ethernet298 298,299 etp38b 38 200000 rs -Ethernet300 300,301 etp38c 38 200000 rs -Ethernet302 302,303 etp38d 38 200000 rs -Ethernet304 304,305 etp39a 39 200000 rs -Ethernet306 306,307 etp39b 39 200000 rs -Ethernet308 308,309 etp39c 39 200000 rs -Ethernet310 310,311 etp39d 39 200000 rs -Ethernet312 312,313 etp40a 40 200000 rs -Ethernet314 314,315 etp40b 40 200000 rs -Ethernet316 316,317 etp40c 40 200000 rs -Ethernet318 318,319 etp40d 40 200000 rs -Ethernet320 320,321 etp41a 41 200000 rs -Ethernet322 322,323 etp41b 41 200000 rs -Ethernet324 324,325 etp41c 41 200000 rs -Ethernet326 326,327 etp41d 41 200000 rs -Ethernet328 328,329 etp42a 42 200000 rs -Ethernet330 330,331 etp42b 42 200000 rs -Ethernet332 332,333 etp42c 42 200000 rs -Ethernet334 334,335 etp42d 42 200000 rs -Ethernet336 336,337 etp43a 43 200000 rs -Ethernet338 338,339 etp43b 43 200000 rs -Ethernet340 340,341 etp43c 43 200000 rs -Ethernet342 342,343 etp43d 43 200000 rs -Ethernet344 344,345 etp44a 44 200000 rs -Ethernet346 346,347 etp44b 44 200000 rs -Ethernet348 348,349 etp44c 44 200000 rs -Ethernet350 350,351 etp44d 44 200000 rs -Ethernet352 352,353 etp45a 45 200000 rs -Ethernet354 354,355 etp45b 45 200000 rs -Ethernet356 356,357 etp45c 45 200000 rs -Ethernet358 358,359 etp45d 45 200000 rs -Ethernet360 360,361 etp46a 46 200000 rs -Ethernet362 362,363 etp46b 46 200000 rs -Ethernet364 364,365 etp46c 46 200000 rs -Ethernet366 366,367 etp46d 46 200000 rs -Ethernet368 368,369 etp47a 47 200000 rs -Ethernet370 370,371 etp47b 47 200000 rs -Ethernet372 372,373 etp47c 47 200000 rs -Ethernet374 374,375 etp47d 47 200000 rs -Ethernet376 376,377 etp48a 48 200000 rs -Ethernet378 378,379 etp48b 48 200000 rs -Ethernet380 380,381 etp48c 48 200000 rs -Ethernet382 382,383 etp48d 48 200000 rs -Ethernet384 384,385 etp49a 49 200000 rs -Ethernet386 386,387 etp49b 49 200000 rs -Ethernet388 388,389 etp49c 49 200000 rs -Ethernet390 390,391 etp49d 49 200000 rs -Ethernet392 392,393 etp50a 50 200000 rs -Ethernet394 394,395 etp50b 50 200000 rs -Ethernet396 396,397 etp50c 50 200000 rs -Ethernet398 398,399 etp50d 50 200000 rs -Ethernet400 400,401 etp51a 51 200000 rs -Ethernet402 402,403 etp51b 51 200000 rs -Ethernet404 404,405 etp51c 51 200000 rs -Ethernet406 406,407 etp51d 51 200000 rs -Ethernet408 408,409 etp52a 52 200000 rs -Ethernet410 410,411 etp52b 52 200000 rs -Ethernet412 412,413 etp52c 52 200000 rs -Ethernet414 414,415 etp52d 52 200000 rs -Ethernet416 416,417 etp53a 53 200000 rs -Ethernet418 418,419 etp53b 53 200000 rs -Ethernet420 420,421 etp53c 53 200000 rs -Ethernet422 422,423 etp53d 53 200000 rs -Ethernet424 424,425 etp54a 54 200000 rs -Ethernet426 426,427 etp54b 54 200000 rs -Ethernet428 428,429 etp54c 54 200000 rs -Ethernet430 430,431 etp54d 54 200000 rs -Ethernet432 432,433 etp55a 55 200000 rs -Ethernet434 434,435 etp55b 55 200000 rs -Ethernet436 436,437 etp55c 55 200000 rs -Ethernet438 438,439 etp55d 55 200000 rs -Ethernet440 440,441 etp56a 56 200000 rs -Ethernet442 442,443 etp56b 56 200000 rs -Ethernet444 444,445 etp56c 56 200000 rs -Ethernet446 446,447 etp56d 56 200000 rs -Ethernet448 448,449 etp57a 57 200000 rs -Ethernet450 450,451 etp57b 57 200000 rs -Ethernet452 452,453 etp57c 57 200000 rs -Ethernet454 454,455 etp57d 57 200000 rs -Ethernet456 456,457 etp58a 58 200000 rs -Ethernet458 458,459 etp58b 58 200000 rs -Ethernet460 460,461 etp58c 58 200000 rs -Ethernet462 462,463 etp58d 58 200000 rs -Ethernet464 464,465 etp59a 59 200000 rs -Ethernet466 466,467 etp59b 59 200000 rs -Ethernet468 468,469 etp59c 59 200000 rs -Ethernet470 470,471 etp59d 59 200000 rs -Ethernet472 472,473 etp60a 60 200000 rs -Ethernet474 474,475 etp60b 60 200000 rs -Ethernet476 476,477 etp60c 60 200000 rs -Ethernet478 478,479 etp60d 60 200000 rs -Ethernet480 480,481 etp61a 61 200000 rs -Ethernet482 482,483 etp61b 61 200000 rs -Ethernet484 484,485 etp61c 61 200000 rs -Ethernet486 486,487 etp61d 61 200000 rs -Ethernet488 488,489 etp62a 62 200000 rs -Ethernet490 490,491 etp62b 62 200000 rs -Ethernet492 492,493 etp62c 62 200000 rs -Ethernet494 494,495 etp62d 62 200000 rs -Ethernet496 496,497 etp63a 63 200000 rs -Ethernet498 498,499 etp63b 63 200000 rs -Ethernet500 500,501 etp63c 63 200000 rs -Ethernet502 502,503 etp63d 63 200000 rs -Ethernet504 504,505 etp64a 64 200000 rs -Ethernet506 506,507 etp64b 64 200000 rs -Ethernet508 508,509 etp64c 64 200000 rs -Ethernet510 510,511 etp64d 64 200000 rs -Ethernet512 512 etp65 65 25000 rs +# name lanes alias index speed +Ethernet0 0,1 etp1a 1 200000 +Ethernet2 2,3 etp1b 1 200000 +Ethernet4 4,5 etp1c 1 200000 +Ethernet6 6,7 etp1d 1 200000 +Ethernet8 8,9 etp2a 2 200000 +Ethernet10 10,11 etp2b 2 200000 +Ethernet12 12,13 etp2c 2 200000 +Ethernet14 14,15 etp2d 2 200000 +Ethernet16 16,17 etp3a 3 200000 +Ethernet18 18,19 etp3b 3 200000 +Ethernet20 20,21 etp3c 3 200000 +Ethernet22 22,23 etp3d 3 200000 +Ethernet24 24,25 etp4a 4 200000 +Ethernet26 26,27 etp4b 4 200000 +Ethernet28 28,29 etp4c 4 200000 +Ethernet30 30,31 etp4d 4 200000 +Ethernet32 32,33 etp5a 5 200000 +Ethernet34 34,35 etp5b 5 200000 +Ethernet36 36,37 etp5c 5 200000 +Ethernet38 38,39 etp5d 5 200000 +Ethernet40 40,41 etp6a 6 200000 +Ethernet42 42,43 etp6b 6 200000 +Ethernet44 44,45 etp6c 6 200000 +Ethernet46 46,47 etp6d 6 200000 +Ethernet48 48,49 etp7a 7 200000 +Ethernet50 50,51 etp7b 7 200000 +Ethernet52 52,53 etp7c 7 200000 +Ethernet54 54,55 etp7d 7 200000 +Ethernet56 56,57 etp8a 8 200000 +Ethernet58 58,59 etp8b 8 200000 +Ethernet60 60,61 etp8c 8 200000 +Ethernet62 62,63 etp8d 8 200000 +Ethernet64 64,65 etp9a 9 200000 +Ethernet66 66,67 etp9b 9 200000 +Ethernet68 68,69 etp9c 9 200000 +Ethernet70 70,71 etp9d 9 200000 +Ethernet72 72,73 etp10a 10 200000 +Ethernet74 74,75 etp10b 10 200000 +Ethernet76 76,77 etp10c 10 200000 +Ethernet78 78,79 etp10d 10 200000 +Ethernet80 80,81 etp11a 11 200000 +Ethernet82 82,83 etp11b 11 200000 +Ethernet84 84,85 etp11c 11 200000 +Ethernet86 86,87 etp11d 11 200000 +Ethernet88 88,89 etp12a 12 200000 +Ethernet90 90,91 etp12b 12 200000 +Ethernet92 92,93 etp12c 12 200000 +Ethernet94 94,95 etp12d 12 200000 +Ethernet96 96,97 etp13a 13 200000 +Ethernet98 98,99 etp13b 13 200000 +Ethernet100 100,101 etp13c 13 200000 +Ethernet102 102,103 etp13d 13 200000 +Ethernet104 104,105 etp14a 14 200000 +Ethernet106 106,107 etp14b 14 200000 +Ethernet108 108,109 etp14c 14 200000 +Ethernet110 110,111 etp14d 14 200000 +Ethernet112 112,113 etp15a 15 200000 +Ethernet114 114,115 etp15b 15 200000 +Ethernet116 116,117 etp15c 15 200000 +Ethernet118 118,119 etp15d 15 200000 +Ethernet120 120,121 etp16a 16 200000 +Ethernet122 122,123 etp16b 16 200000 +Ethernet124 124,125 etp16c 16 200000 +Ethernet126 126,127 etp16d 16 200000 +Ethernet128 128,129 etp17a 17 200000 +Ethernet130 130,131 etp17b 17 200000 +Ethernet132 132,133 etp17c 17 200000 +Ethernet134 134,135 etp17d 17 200000 +Ethernet136 136,137 etp18a 18 200000 +Ethernet138 138,139 etp18b 18 200000 +Ethernet140 140,141 etp18c 18 200000 +Ethernet142 142,143 etp18d 18 200000 +Ethernet144 144,145 etp19a 19 200000 +Ethernet146 146,147 etp19b 19 200000 +Ethernet148 148,149 etp19c 19 200000 +Ethernet150 150,151 etp19d 19 200000 +Ethernet152 152,153 etp20a 20 200000 +Ethernet154 154,155 etp20b 20 200000 +Ethernet156 156,157 etp20c 20 200000 +Ethernet158 158,159 etp20d 20 200000 +Ethernet160 160,161 etp21a 21 200000 +Ethernet162 162,163 etp21b 21 200000 +Ethernet164 164,165 etp21c 21 200000 +Ethernet166 166,167 etp21d 21 200000 +Ethernet168 168,169 etp22a 22 200000 +Ethernet170 170,171 etp22b 22 200000 +Ethernet172 172,173 etp22c 22 200000 +Ethernet174 174,175 etp22d 22 200000 +Ethernet176 176,177 etp23a 23 200000 +Ethernet178 178,179 etp23b 23 200000 +Ethernet180 180,181 etp23c 23 200000 +Ethernet182 182,183 etp23d 23 200000 +Ethernet184 184,185 etp24a 24 200000 +Ethernet186 186,187 etp24b 24 200000 +Ethernet188 188,189 etp24c 24 200000 +Ethernet190 190,191 etp24d 24 200000 +Ethernet192 192,193 etp25a 25 200000 +Ethernet194 194,195 etp25b 25 200000 +Ethernet196 196,197 etp25c 25 200000 +Ethernet198 198,199 etp25d 25 200000 +Ethernet200 200,201 etp26a 26 200000 +Ethernet202 202,203 etp26b 26 200000 +Ethernet204 204,205 etp26c 26 200000 +Ethernet206 206,207 etp26d 26 200000 +Ethernet208 208,209 etp27a 27 200000 +Ethernet210 210,211 etp27b 27 200000 +Ethernet212 212,213 etp27c 27 200000 +Ethernet214 214,215 etp27d 27 200000 +Ethernet216 216,217 etp28a 28 200000 +Ethernet218 218,219 etp28b 28 200000 +Ethernet220 220,221 etp28c 28 200000 +Ethernet222 222,223 etp28d 28 200000 +Ethernet224 224,225 etp29a 29 200000 +Ethernet226 226,227 etp29b 29 200000 +Ethernet228 228,229 etp29c 29 200000 +Ethernet230 230,231 etp29d 29 200000 +Ethernet232 232,233 etp30a 30 200000 +Ethernet234 234,235 etp30b 30 200000 +Ethernet236 236,237 etp30c 30 200000 +Ethernet238 238,239 etp30d 30 200000 +Ethernet240 240,241 etp31a 31 200000 +Ethernet242 242,243 etp31b 31 200000 +Ethernet244 244,245 etp31c 31 200000 +Ethernet246 246,247 etp31d 31 200000 +Ethernet248 248,249 etp32a 32 200000 +Ethernet250 250,251 etp32b 32 200000 +Ethernet252 252,253 etp32c 32 200000 +Ethernet254 254,255 etp32d 32 200000 +Ethernet256 256,257 etp33a 33 200000 +Ethernet258 258,259 etp33b 33 200000 +Ethernet260 260,261 etp33c 33 200000 +Ethernet262 262,263 etp33d 33 200000 +Ethernet264 264,265 etp34a 34 200000 +Ethernet266 266,267 etp34b 34 200000 +Ethernet268 268,269 etp34c 34 200000 +Ethernet270 270,271 etp34d 34 200000 +Ethernet272 272,273 etp35a 35 200000 +Ethernet274 274,275 etp35b 35 200000 +Ethernet276 276,277 etp35c 35 200000 +Ethernet278 278,279 etp35d 35 200000 +Ethernet280 280,281 etp36a 36 200000 +Ethernet282 282,283 etp36b 36 200000 +Ethernet284 284,285 etp36c 36 200000 +Ethernet286 286,287 etp36d 36 200000 +Ethernet288 288,289 etp37a 37 200000 +Ethernet290 290,291 etp37b 37 200000 +Ethernet292 292,293 etp37c 37 200000 +Ethernet294 294,295 etp37d 37 200000 +Ethernet296 296,297 etp38a 38 200000 +Ethernet298 298,299 etp38b 38 200000 +Ethernet300 300,301 etp38c 38 200000 +Ethernet302 302,303 etp38d 38 200000 +Ethernet304 304,305 etp39a 39 200000 +Ethernet306 306,307 etp39b 39 200000 +Ethernet308 308,309 etp39c 39 200000 +Ethernet310 310,311 etp39d 39 200000 +Ethernet312 312,313 etp40a 40 200000 +Ethernet314 314,315 etp40b 40 200000 +Ethernet316 316,317 etp40c 40 200000 +Ethernet318 318,319 etp40d 40 200000 +Ethernet320 320,321 etp41a 41 200000 +Ethernet322 322,323 etp41b 41 200000 +Ethernet324 324,325 etp41c 41 200000 +Ethernet326 326,327 etp41d 41 200000 +Ethernet328 328,329 etp42a 42 200000 +Ethernet330 330,331 etp42b 42 200000 +Ethernet332 332,333 etp42c 42 200000 +Ethernet334 334,335 etp42d 42 200000 +Ethernet336 336,337 etp43a 43 200000 +Ethernet338 338,339 etp43b 43 200000 +Ethernet340 340,341 etp43c 43 200000 +Ethernet342 342,343 etp43d 43 200000 +Ethernet344 344,345 etp44a 44 200000 +Ethernet346 346,347 etp44b 44 200000 +Ethernet348 348,349 etp44c 44 200000 +Ethernet350 350,351 etp44d 44 200000 +Ethernet352 352,353 etp45a 45 200000 +Ethernet354 354,355 etp45b 45 200000 +Ethernet356 356,357 etp45c 45 200000 +Ethernet358 358,359 etp45d 45 200000 +Ethernet360 360,361 etp46a 46 200000 +Ethernet362 362,363 etp46b 46 200000 +Ethernet364 364,365 etp46c 46 200000 +Ethernet366 366,367 etp46d 46 200000 +Ethernet368 368,369 etp47a 47 200000 +Ethernet370 370,371 etp47b 47 200000 +Ethernet372 372,373 etp47c 47 200000 +Ethernet374 374,375 etp47d 47 200000 +Ethernet376 376,377 etp48a 48 200000 +Ethernet378 378,379 etp48b 48 200000 +Ethernet380 380,381 etp48c 48 200000 +Ethernet382 382,383 etp48d 48 200000 +Ethernet384 384,385 etp49a 49 200000 +Ethernet386 386,387 etp49b 49 200000 +Ethernet388 388,389 etp49c 49 200000 +Ethernet390 390,391 etp49d 49 200000 +Ethernet392 392,393 etp50a 50 200000 +Ethernet394 394,395 etp50b 50 200000 +Ethernet396 396,397 etp50c 50 200000 +Ethernet398 398,399 etp50d 50 200000 +Ethernet400 400,401 etp51a 51 200000 +Ethernet402 402,403 etp51b 51 200000 +Ethernet404 404,405 etp51c 51 200000 +Ethernet406 406,407 etp51d 51 200000 +Ethernet408 408,409 etp52a 52 200000 +Ethernet410 410,411 etp52b 52 200000 +Ethernet412 412,413 etp52c 52 200000 +Ethernet414 414,415 etp52d 52 200000 +Ethernet416 416,417 etp53a 53 200000 +Ethernet418 418,419 etp53b 53 200000 +Ethernet420 420,421 etp53c 53 200000 +Ethernet422 422,423 etp53d 53 200000 +Ethernet424 424,425 etp54a 54 200000 +Ethernet426 426,427 etp54b 54 200000 +Ethernet428 428,429 etp54c 54 200000 +Ethernet430 430,431 etp54d 54 200000 +Ethernet432 432,433 etp55a 55 200000 +Ethernet434 434,435 etp55b 55 200000 +Ethernet436 436,437 etp55c 55 200000 +Ethernet438 438,439 etp55d 55 200000 +Ethernet440 440,441 etp56a 56 200000 +Ethernet442 442,443 etp56b 56 200000 +Ethernet444 444,445 etp56c 56 200000 +Ethernet446 446,447 etp56d 56 200000 +Ethernet448 448,449 etp57a 57 200000 +Ethernet450 450,451 etp57b 57 200000 +Ethernet452 452,453 etp57c 57 200000 +Ethernet454 454,455 etp57d 57 200000 +Ethernet456 456,457 etp58a 58 200000 +Ethernet458 458,459 etp58b 58 200000 +Ethernet460 460,461 etp58c 58 200000 +Ethernet462 462,463 etp58d 58 200000 +Ethernet464 464,465 etp59a 59 200000 +Ethernet466 466,467 etp59b 59 200000 +Ethernet468 468,469 etp59c 59 200000 +Ethernet470 470,471 etp59d 59 200000 +Ethernet472 472,473 etp60a 60 200000 +Ethernet474 474,475 etp60b 60 200000 +Ethernet476 476,477 etp60c 60 200000 +Ethernet478 478,479 etp60d 60 200000 +Ethernet480 480,481 etp61a 61 200000 +Ethernet482 482,483 etp61b 61 200000 +Ethernet484 484,485 etp61c 61 200000 +Ethernet486 486,487 etp61d 61 200000 +Ethernet488 488,489 etp62a 62 200000 +Ethernet490 490,491 etp62b 62 200000 +Ethernet492 492,493 etp62c 62 200000 +Ethernet494 494,495 etp62d 62 200000 +Ethernet496 496,497 etp63a 63 200000 +Ethernet498 498,499 etp63b 63 200000 +Ethernet500 500,501 etp63c 63 200000 +Ethernet502 502,503 etp63d 63 200000 +Ethernet504 504,505 etp64a 64 200000 +Ethernet506 506,507 etp64b 64 200000 +Ethernet508 508,509 etp64c 64 200000 +Ethernet510 510,511 etp64d 64 200000 +Ethernet512 512 etp65 65 25000 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/supporting_bulk_counter_groups b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/supporting_bulk_counter_groups new file mode 100644 index 00000000000..178f0575d04 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/supporting_bulk_counter_groups @@ -0,0 +1 @@ +QUEUE_WATERMARK_STAT_COUNTER,PG_WATERMARK_STAT_COUNTER,PFC_WD diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile index a1d251ac1ad..fc98a5ebf90 100644 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile @@ -1 +1,4 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5640.xml +SAI_KEY_SPC5_LOSSY_SCHEDULING=1 +SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1 + diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pcie.yaml new file mode 100644 index 00000000000..0c0e1241b16 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pcie.yaml @@ -0,0 +1,91 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## SPDX-License-Identifier: Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +- bus: '00' + dev: '00' + fn: '0' + id: '1237' + name: 'Host bridge: Intel Corporation 440FX - 82441FX PMC [Natoma] (rev 02)' +- bus: '00' + dev: '01' + fn: '0' + id: '7000' + name: 'ISA bridge: Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II]' +- bus: '00' + dev: '01' + fn: '1' + id: '7010' + name: 'IDE interface: Intel Corporation 82371SB PIIX3 IDE [Natoma/Triton II]' +- bus: '00' + dev: '01' + fn: '2' + id: '7020' + name: 'USB controller: Intel Corporation 82371SB PIIX3 USB [Natoma/Triton II] (rev + 01)' +- bus: '00' + dev: '01' + fn: '3' + id: '7113' + name: 'Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 03)' +- bus: '00' + dev: '02' + fn: '0' + id: 00b8 + name: 'VGA compatible controller: Cirrus Logic GD 5446' +- bus: '00' + dev: '03' + fn: '0' + id: 100e + name: 'Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet Controller + (rev 03)' +- bus: '00' + dev: '04' + fn: '0' + id: '1002' + name: 'Unclassified device [00ff]: Red Hat, Inc. Virtio memory balloon' +- bus: '00' + dev: '05' + fn: '0' + id: '1009' + name: 'Unclassified device [0002]: Red Hat, Inc. Virtio filesystem' +- bus: '00' + dev: '06' + fn: '0' + id: '2922' + name: 'SATA controller: Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA + Controller [AHCI mode] (rev 02)' +- bus: '00' + dev: '07' + fn: '0' + id: '0001' + name: 'PCI bridge: Red Hat, Inc. QEMU PCI-PCI bridge' +- bus: '00' + dev: 0c + fn: '0' + id: '1009' + name: 'Unclassified device [0002]: Red Hat, Inc. Virtio filesystem' +- bus: '00' + dev: 0e + fn: '0' + id: '1001' + name: 'System peripheral: NVIDIA Corporation GK110B [GeForce GTX TITAN Z] (rev 01)' +- bus: '01' + dev: '10' + fn: '0' + id: cf82 + name: 'Ethernet controller: Mellanox Technologies Spectrum-4L' diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json index d866c6a23ec..755c7e03b62 100644 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json @@ -1,6 +1,6 @@ { "chassis": { - "name": "SN5600_SIMX", + "name": "SN5640_SIMX", "components": [ { "name": "ONIE" @@ -634,6 +634,22 @@ "name": "xSFP module 64 Temp" } ] + }, + { + "name": "sfp65", + "thermals": [ + { + "name": "xSFP module 65 Temp" + } + ] + }, + { + "name": "sfp66", + "thermals": [ + { + "name": "xSFP module 66 Temp" + } + ] } ] }, diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/sensors.conf new file mode 100644 index 00000000000..91e8cbebbe0 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/sensors.conf @@ -0,0 +1,494 @@ +################################################################################## +# Copyright (c) 2019-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# +# Platform specific sensors config for SN5640 +################################################################################## + +# ASIC temperature sensor +chip "mlxsw-i2c-*-48" + label temp1 "Ambient ASIC Temp" + +# Fan and port ambient temperature sensors +chip "tmp102-i2c-*-49" + label temp1 "Ambient Fan Side Temp (air exhaust)" +chip "adt75-i2c-*-49" + label temp1 "Ambient Fan Side Temp (air exhaust)" +chip "stts751-i2c-*-49" + label temp1 "Ambient Fan Side Temp (air exhaust)" +chip "tmp102-i2c-*-4a" + label temp1 "Ambient Port Side Temp (air intake)" +chip "adt75-i2c-*-4a" + label temp1 "Ambient Port Side Temp (air intake)" +chip "stts751-i2c-*-4a" + label temp1 "Ambient Port Side Temp (air intake)" + +# ASIC power controllers +chip "mp2891-i2c-*-62" + label in1 "PMIC-1 PSU 13V5 Rail (in1)" + label in2 "PMIC-1 VDD_M ADJ Rail (out1)" + ignore in3 + label temp1 "PMIC-1 VDD_M ADJ Temp 1" + ignore temp2 + label power1 "PMIC-1 13V5 VDD_M (in)" + label power2 "PMIC-1 VDD_M Rail Pwr (out1)" + ignore power3 + label curr1 "PMIC-1 13V5 VDD_M Rail Curr (in1)" + label curr2 "PMIC-1 VDD_M Rail Curr (out1)" + ignore curr3 + ignore curr4 + ignore curr5 + ignore curr6 + ignore curr7 + ignore curr8 + ignore curr9 + ignore curr10 +chip "xdpe1a2g7-i2c-*-62" + label in1 "PMIC-1 PSU 13V5 Rail (in1)" + label in2 "PMIC-1 VDD_M ADJ Rail (out1)" + ignore in3 + label temp1 "PMIC-1 VDD_M ADJ Temp 1" + ignore temp2 + label power1 "PMIC-1 13V5 VDD_M (in)" + label power2 "PMIC-1 VDD_M Rail Pwr (out1)" + ignore power3 + label curr1 "PMIC-1 13V5 VDD_M Rail Curr (in1)" + label curr2 "PMIC-1 VDD_M Rail Curr (out1)" + ignore curr3 + ignore curr4 + ignore curr5 + ignore curr6 + ignore curr7 + ignore curr8 + ignore curr9 + ignore curr10 + +chip "mp2891-i2c-*-63" + label in1 "PMIC-2 PSU 13V5 Rail (in1)" + label in2 "PMIC-2 VDD_T0 ADJ Rail (out1)" + label in3 "PMIC-2 VDD_T1 ADJ Rail (out2)" + label temp1 "PMIC-2 VDD_T0 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-2 13V5 VDD_T0 VDD_T1 (in)" + label power2 "PMIC-2 VDD_T0 Rail Pwr (out1)" + label power3 "PMIC-2 VDD_T1 Rail Pwr (out2)" + label curr1 "PMIC-2 13V5 VDD_T0 VDD_T1 Rail Curr (in1)" + label curr2 "PMIC-2 VDD_T0 Rail Curr (out1)" + label curr3 "PMIC-2 VDD_T1 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 +chip "xdpe1a2g7-i2c-*-63" + label in1 "PMIC-2 PSU 13V5 Rail (in1)" + label in2 "PMIC-2 VDD_T0 ADJ Rail (out1)" + label in3 "PMIC-2 VDD_T1 ADJ Rail (out2)" + label temp1 "PMIC-2 VDD_T0 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-2 13V5 VDD_T0 VDD_T1 (in)" + label power2 "PMIC-2 VDD_T0 Rail Pwr (out1)" + label power3 "PMIC-2 VDD_T1 Rail Pwr (out2)" + label curr1 "PMIC-2 13V5 VDD_T0 VDD_T1 Rail Curr (in1)" + label curr2 "PMIC-2 VDD_T0 Rail Curr (out1)" + label curr3 "PMIC-2 VDD_T1 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 + +chip "mp2891-i2c-*-64" + label in1 "PMIC-3 PSU 13V5 Rail (in1)" + label in2 "PMIC-3 VDD_T2 ADJ Rail (out1)" + label in3 "PMIC-3 VDD_T3 ADJ Rail (out2)" + label temp1 "PMIC-3 VDD_T2 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-3 13V5 VDD_T2 VDD_T3 (in)" + label power2 "PMIC-3 VDD_T2 Rail Pwr (out1)" + label power3 "PMIC-3 VDD_T3 Rail Pwr (out2)" + label curr1 "PMIC-3 13V5 VDD_T2 VDD_T3 Rail Curr (in1)" + label curr2 "PMIC-3 VDD_T2 Rail Curr (out1)" + label curr3 "PMIC-3 VDD_T3 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 +chip "xdpe1a2g7-i2c-*-64" + label in1 "PMIC-3 PSU 13V5 Rail (in1)" + label in2 "PMIC-3 VDD_T2 ADJ Rail (out1)" + label in3 "PMIC-3 VDD_T3 ADJ Rail (out2)" + label temp1 "PMIC-3 VDD_T2 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-3 13V5 VDD_T2 VDD_T3 (in)" + label power2 "PMIC-3 VDD_T2 Rail Pwr (out1)" + label power3 "PMIC-3 VDD_T3 Rail Pwr (out2)" + label curr1 "PMIC-3 13V5 VDD_T2 VDD_T3 Rail Curr (in1)" + label curr2 "PMIC-3 VDD_T2 Rail Curr (out1)" + label curr3 "PMIC-3 VDD_T3 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 + +chip "mp2891-i2c-*-65" + label in1 "PMIC-4 PSU 13V5 Rail (in1)" + label in2 "PMIC-4 VDD_T4 ADJ Rail (out1)" + label in3 "PMIC-4 VDD_T5 ADJ Rail (out2)" + label temp1 "PMIC-4 VDD_T4 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-4 13V5 VDD_T4 VDD_T5 (in)" + label power2 "PMIC-4 VDD_T4 Rail Pwr (out1)" + label power3 "PMIC-4 VDD_T5 Rail Pwr (out2)" + label curr1 "PMIC-4 13V5 VDD_T4 VDD_T5 Rail Curr (in1)" + label curr2 "PMIC-4 VDD_T4 Rail Curr (out1)" + label curr3 "PMIC-4 VDD_T5 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 +chip "xdpe1a2g7-i2c-*-65" + label in1 "PMIC-4 PSU 13V5 Rail (in1)" + label in2 "PMIC-4 VDD_T4 ADJ Rail (out1)" + label in3 "PMIC-4 VDD_T5 ADJ Rail (out2)" + label temp1 "PMIC-4 VDD_T4 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-4 13V5 VDD_T4 VDD_T5 (in)" + label power2 "PMIC-4 VDD_T4 Rail Pwr (out1)" + label power3 "PMIC-4 VDD_T5 Rail Pwr (out2)" + label curr1 "PMIC-4 13V5 VDD_T4 VDD_T5 Rail Curr (in1)" + label curr2 "PMIC-4 VDD_T4 Rail Curr (out1)" + label curr3 "PMIC-4 VDD_T5 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 + +chip "mp2891-i2c-*-66" + label in1 "PMIC-5 PSU 13V5 Rail (in1)" + label in2 "PMIC-5 VDD_T6 ADJ Rail (out1)" + label in3 "PMIC-5 VDD_T7 ADJ Rail (out2)" + label temp1 "PMIC-5 VDD_T6 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-5 13V5 VDD_T6 VDD_T7 (in)" + label power2 "PMIC-5 VDD_T6 Rail Pwr (out1)" + label power3 "PMIC-5 VDD_T7 Rail Pwr (out2)" + label curr1 "PMIC-5 13V5 VDD_T6 VDD_T7 Rail Curr (in1)" + label curr2 "PMIC-5 VDD_T6 Rail Curr (out1)" + label curr3 "PMIC-5 VDD_T7 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 +chip "xdpe1a2g7-i2c-*-66" + label in1 "PMIC-5 PSU 13V5 Rail (in1)" + label in2 "PMIC-5 VDD_T6 ADJ Rail (out1)" + label in3 "PMIC-5 VDD_T7 ADJ Rail (out2)" + label temp1 "PMIC-5 VDD_T6 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-5 13V5 VDD_T6 VDD_T7 (in)" + label power2 "PMIC-5 VDD_T6 Rail Pwr (out1)" + label power3 "PMIC-5 VDD_T7 Rail Pwr (out2)" + label curr1 "PMIC-5 13V5 VDD_T6 VDD_T7 Rail Curr (in1)" + label curr2 "PMIC-5 VDD_T6 Rail Curr (out1)" + label curr3 "PMIC-5 VDD_T7 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 + +chip "mp2891-i2c-*-67" + label in1 "PMIC-6 PSU 13V5 Rail (in1)" + label in2 "PMIC-6 DVDD_T0 ADJ Rail (out1)" + label in3 "PMIC-6 DVDD_T1 ADJ Rail (out2)" + label temp1 "PMIC-6 DVDD_T0 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-6 13V5 DVDD_T0 DVDD_T1 (in)" + label power2 "PMIC-6 DVDD_T0 Rail Pwr (out1)" + label power3 "PMIC-6 DVDD_T1 Rail Pwr (out2)" + label curr1 "PMIC-6 13V5 DVDD_T0 DVDD_T1 Rail Curr (in1)" + label curr2 "PMIC-6 DVDD_T0 Rail Curr (out1)" + label curr3 "PMIC-6 DVDD_T1 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 +chip "xdpe1a2g7-i2c-*-67" + label in1 "PMIC-6 PSU 13V5 Rail (in1)" + label in2 "PMIC-6 DVDD_T0 ADJ Rail (out1)" + label in3 "PMIC-6 DVDD_T1 ADJ Rail (out2)" + label temp1 "PMIC-6 DVDD_T0 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-6 13V5 DVDD_T0 DVDD_T1 (in)" + label power2 "PMIC-6 DVDD_T0 Rail Pwr (out1)" + label power3 "PMIC-6 DVDD_T1 Rail Pwr (out2)" + label curr1 "PMIC-6 13V5 DVDD_T0 DVDD_T1 Rail Curr (in1)" + label curr2 "PMIC-6 DVDD_T0 Rail Curr (out1)" + label curr3 "PMIC-6 DVDD_T1 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 + +chip "mp2891-i2c-*-68" + label in1 "PMIC-7 PSU 13V5 Rail (in1)" + label in2 "PMIC-7 DVDD_T2 ADJ Rail (out1)" + label in3 "PMIC-7 DVDD_T3 ADJ Rail (out2)" + label temp1 "PMIC-7 DVDD_T2 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-7 13V5 DVDD_T2 DVDD_T3 (in)" + label power2 "PMIC-7 DVDD_T2 Rail Pwr (out1)" + label power3 "PMIC-7 DVDD_T3 Rail Pwr (out2)" + label curr1 "PMIC-7 13V5 DVDD_T2 DVDD_T3 Rail Curr (in1)" + label curr2 "PMIC-7 DVDD_T2 Rail Curr (out1)" + label curr3 "PMIC-7 DVDD_T3 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 +chip "xdpe1a2g7-i2c-*-68" + label in1 "PMIC-7 PSU 13V5 Rail (in1)" + label in2 "PMIC-7 DVDD_T2 ADJ Rail (out1)" + label in3 "PMIC-7 DVDD_T3 ADJ Rail (out2)" + label temp1 "PMIC-7 DVDD_T2 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-7 13V5 DVDD_T2 DVDD_T3 (in)" + label power2 "PMIC-7 DVDD_T2 Rail Pwr (out1)" + label power3 "PMIC-7 DVDD_T3 Rail Pwr (out2)" + label curr1 "PMIC-7 13V5 DVDD_T2 DVDD_T3 Rail Curr (in1)" + label curr2 "PMIC-7 DVDD_T2 Rail Curr (out1)" + label curr3 "PMIC-7 DVDD_T3 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 + +chip "mp2891-i2c-*-69" + label in1 "PMIC-8 PSU 13V5 Rail (in1)" + label in2 "PMIC-8 DVDD_T4 ADJ Rail (out1)" + label in3 "PMIC-8 DVDD_T5 ADJ Rail (out2)" + label temp1 "PMIC-8 DVDD_T4 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-8 13V5 DVDD_T4 DVDD_T5 (in)" + label power2 "PMIC-8 DVDD_T4 Rail Pwr (out1)" + label power3 "PMIC-8 DVDD_T5 Rail Pwr (out2)" + label curr1 "PMIC-8 13V5 DVDD_T4 DVDD_T5 Rail Curr (in1)" + label curr2 "PMIC-8 DVDD_T4 Rail Curr (out1)" + label curr3 "PMIC-8 DVDD_T5 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 +chip "xdpe1a2g7-i2c-*-69" + label in1 "PMIC-8 PSU 13V5 Rail (in1)" + label in2 "PMIC-8 DVDD_T4 ADJ Rail (out1)" + label in3 "PMIC-8 DVDD_T5 ADJ Rail (out2)" + label temp1 "PMIC-8 DVDD_T4 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-8 13V5 DVDD_T4 DVDD_T5 (in)" + label power2 "PMIC-8 DVDD_T4 Rail Pwr (out1)" + label power3 "PMIC-8 DVDD_T5 Rail Pwr (out2)" + label curr1 "PMIC-8 13V5 DVDD_T4 DVDD_T5 Rail Curr (in1)" + label curr2 "PMIC-8 DVDD_T4 Rail Curr (out1)" + label curr3 "PMIC-8 DVDD_T5 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 + +chip "mp2891-i2c-*-6a" + label in1 "PMIC-9 PSU 13V5 Rail (in1)" + label in2 "PMIC-9 DVDD_T6 ADJ Rail (out1)" + label in3 "PMIC-9 DVDD_T7 ADJ Rail (out2)" + label temp1 "PMIC-9 DVDD_T6 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-9 13V5 DVDD_T6 DVDD_T7 (in)" + label power2 "PMIC-9 DVDD_T6 Rail Pwr (out1)" + label power3 "PMIC-9 DVDD_T7 Rail Pwr (out2)" + label curr1 "PMIC-9 13V5 DVDD_T6 DVDD_T7 Rail Curr (in1)" + label curr2 "PMIC-9 DVDD_T6 Rail Curr (out1)" + label curr3 "PMIC-9 DVDD_T7 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 +chip "xdpe1a2g7-i2c-*-6a" + label in1 "PMIC-9 PSU 13V5 Rail (in1)" + label in2 "PMIC-9 DVDD_T6 ADJ Rail (out1)" + label in3 "PMIC-9 DVDD_T7 ADJ Rail (out2)" + label temp1 "PMIC-9 DVDD_T6 ADJ Temp 1" + ignore temp2 + label power1 "PMIC-9 13V5 DVDD_T6 DVDD_T7 (in)" + label power2 "PMIC-9 DVDD_T6 Rail Pwr (out1)" + label power3 "PMIC-9 DVDD_T7 Rail Pwr (out2)" + label curr1 "PMIC-9 13V5 DVDD_T6 DVDD_T7 Rail Curr (in1)" + label curr2 "PMIC-9 DVDD_T6 Rail Curr (out1)" + label curr3 "PMIC-9 DVDD_T7 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 + +chip "mp2891-i2c-*-6c" + label in1 "PMIC-10 PSU 13V5 Rail (in1)" + label in2 "PMIC-10 HVDD_T03 1V2 Rail (out1)" + label in3 "PMIC-10 HVDD_T47 1V2 Rail (out2)" + label temp1 "PMIC-10 HVDD_T03 1V2 Temp 1" + ignore temp2 + label power1 "PMIC-10 13V5 HVDD_T03 HVDD_T47 (in)" + label power2 "PMIC-10 HVDD_T03 Rail Pwr (out1)" + label power3 "PMIC-10 HVDD_T47 Rail Pwr (out2)" + label curr1 "PMIC-10 13V5 HVDD_T03 HVDD_T47 Rail Curr (in1)" + label curr2 "PMIC-10 HVDD_T03 Rail Curr (out1)" + label curr3 "PMIC-10 HVDD_T47 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 + ignore curr7 + ignore curr8 + ignore curr9 + ignore curr10 + ignore curr11 +chip "xdpe1a2g7-i2c-*-6c" + label in1 "PMIC-10 PSU 13V5 Rail (in1)" + label in2 "PMIC-10 HVDD_T03 1V2 Rail (out1)" + label in3 "PMIC-10 HVDD_T47 1V2 Rail (out2)" + label temp1 "PMIC-10 HVDD_T03 1V2 Temp 1" + ignore temp2 + label power1 "PMIC-10 13V5 HVDD_T03 HVDD_T47 (in)" + label power2 "PMIC-10 HVDD_T03 Rail Pwr (out1)" + label power3 "PMIC-10 HVDD_T47 Rail Pwr (out2)" + label curr1 "PMIC-10 13V5 HVDD_T03 HVDD_T47 Rail Curr (in1)" + label curr2 "PMIC-10 HVDD_T03 Rail Curr (out1)" + label curr3 "PMIC-10 HVDD_T47 Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 + ignore curr7 + ignore curr8 + ignore curr9 + ignore curr10 + ignore curr11 + +chip "mp2891-i2c-*-6e" + label in1 "PMIC-11 PSU 13V5 Rail (in1)" + label in2 "PMIC-11 VDDSCC 0V75 Rail (out1)" + label in3 "PMIC-11 DVDD_M ADJ Rail (out2)" + label temp1 "PMIC-11 VDDSCC 1V2 Temp 1" + ignore temp2 + label power1 "PMIC-11 13V5 VDDSCC DVDD_M (in)" + label power2 "PMIC-11 VDDSCC Rail Pwr (out1)" + label power3 "PMIC-11 DVDD_M Rail Pwr (out2)" + label curr1 "PMIC-11 13V5 VDDSCC DVDD_M Rail Curr (in1)" + label curr2 "PMIC-11 VDDSCC Rail Curr (out1)" + label curr3 "PMIC-11 DVDD_M Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 +chip "xdpe1a2g7-i2c-*-6e" + label in1 "PMIC-11 PSU 13V5 Rail (in1)" + label in2 "PMIC-11 VDDSCC 0V75 Rail (out1)" + label in3 "PMIC-11 DVDD_M ADJ Rail (out2)" + label temp1 "PMIC-11 VDDSCC 1V2 Temp 1" + ignore temp2 + label power1 "PMIC-11 13V5 VDDSCC DVDD_M (in)" + label power2 "PMIC-11 VDDSCC Rail Pwr (out1)" + label power3 "PMIC-11 DVDD_M Rail Pwr (out2)" + label curr1 "PMIC-11 13V5 VDDSCC DVDD_M Rail Curr (in1)" + label curr2 "PMIC-11 VDDSCC Rail Curr (out1)" + label curr3 "PMIC-11 DVDD_M Rail Curr (out2)" + ignore curr4 + ignore curr5 + ignore curr6 + +# Power supplies +chip "dps460-i2c-*-59" + label in1 "PSU-1(L) 220V Rail (in)" + ignore in2 + label in3 "PSU-1(L) 54V Rail (out)" + ignore fan2 + ignore fan3 + label fan1 "PSU-1(L) Fan 1" + label temp1 "PSU-1(L) Temp 1" + label temp2 "PSU-1(L) Temp 2" + label temp3 "PSU-1(L) Temp 3" + label power1 "PSU-1(L) 220V Rail Pwr (in)" + label power2 "PSU-1(L) 54V Rail Pwr (out)" + label curr1 "PSU-1(L) 220V Rail Curr (in)" + label curr2 "PSU-1(L) 54V Rail Curr (out)" + set power2_cap 0 +chip "dps460-i2c-*-58" + label in1 "PSU-2(L) 220V Rail (in)" + ignore in2 + label in3 "PSU-2(L) 54V Rail (out)" + ignore fan2 + ignore fan3 + label fan1 "PSU-2(L) Fan 1" + label temp1 "PSU-2(L) Temp 1" + label temp2 "PSU-2(R) Temp 2" + label temp3 "PSU-2(L) Temp 3" + label power1 "PSU-2(L) 220V Rail Pwr (in)" + label power2 "PSU-2(L) 54V Rail Pwr (out)" + label curr1 "PSU-2(L) 220V Rail Curr (in)" + label curr2 "PSU-2(L) 54V Rail Curr (out)" + set power2_cap 0 +chip "dps460-i2c-*-5b" + label in1 "PSU-3(R) 220V Rail (in)" + ignore in2 + label in3 "PSU-3(R) 54V Rail (out)" + ignore fan2 + ignore fan3 + label fan1 "PSU-3(R) Fan 1" + label temp1 "PSU-3(R) Temp 1" + label temp2 "PSU-3(R) Temp 2" + label temp3 "PSU-3(R) Temp 3" + label power1 "PSU-3(R) 220V Rail Pwr (in)" + label power2 "PSU-3(R) 54V Rail Pwr (out)" + label curr1 "PSU-3(R) 220V Rail Curr (in)" + label curr2 "PSU-3(R) 54V Rail Curr (out)" + set power2_cap 0 +chip "dps460-i2c-*-5a" + label in1 "PSU-4(R) 220V Rail (in)" + ignore in2 + label in3 "PSU-4(R) 54V Rail (out)" + ignore fan2 + ignore fan3 + label fan1 "PSU-4(R) Fan 1" + label temp1 "PSU-4(R) Temp 1" + label temp2 "PSU-4(R) Temp 2" + label temp3 "PSU-4(R) Temp 3" + label power1 "PSU-4(R) 220V Rail Pwr (in)" + label power2 "PSU-4(R) 54V Rail Pwr (out)" + label curr1 "PSU-4(R) 220V Rail Curr (in)" + label curr2 "PSU-4(R) 54V Rail Curr (out)" + set power2_cap 0 + +# AMD Comex Power controllers +chip "mp2855-i2c-*-69" + label in1 "PMIC-12 COMEX (in) VDDCR INPUT VOLT" + label in2 "PMIC-12 COMEX (out) VDDCR_CPU VOLT" + label in3 "PMIC-12 COMEX (out2) VDDCR_SOC VOLT" + label temp1 "PMIC-12 COMEX VDDCR_CPU PHASE TEMP" + label temp2 "PMIC-12 COMEX VDDCR_SOC PHASE TEMP" + label curr1 "PMIC-12 COMEX VDDCR_CPU CURR" + label curr2 "PMIC-12 COMEX VDDCR_SOC CURR" + +chip "mp2975-i2c-*-6a" + label in1 "PMIC-13 COMEX VDD_MEM INPUT VOLT" + label in2 "PMIC-13 COMEX VDD_MEM OUTPUT VOLT" + label temp1 "PMIC-13 COMEX VDD_MEM PHASE TEMP" + label curr1 "PMIC-13 COMEX VDD_MEM INPUT CURR" + label curr2 "PMIC-13 COMEX VDD_MEM OUTPUT CURR" + ignore curr3 + ignore curr4 + label power1 "PMIC-13 COMEX VDD_MEM INPUT POWER" + label power2 "PMIC-13 COMEX VDD_MEM OUTPUT POWER" + +# AMD Comex SODIMM temperature sensors +chip "jc42-i2c-*-1a" + label temp1 "SODIMM1 Temp" + +chip "jc42-i2c-*-1b" + label temp1 "SODIMM2 Temp" + +chip "jc42-i2c-*-1e" + label temp1 "SODIMM3 Temp" + +chip "jc42-i2c-*-1f" + label temp1 "SODIMM4 Temp" + +# AMD Comex CPU temperature sensor +chip "k10temp-pci-*" + label temp1 "CPU PACKAGE TEMP" + label temp2 "CPU DIE0 TEMP" + +# NVME SSD temperature sensor +chip "nvme-pci-*" + label temp1 "SSD Temp" + ignore temp2 + ignore temp3 + +# Ethernet PHY temperature sensor +chip "00000500400-mdio-5" + label temp1 "PHY TEMP" diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json new file mode 100644 index 00000000000..5401dfda99f --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json @@ -0,0 +1,106 @@ +{ + "interfaces": { + "Ethernet1": { + "default_brkout_mode": "1x400G" + }, + "Ethernet9": { + "default_brkout_mode": "1x400G" + }, + "Ethernet17": { + "default_brkout_mode": "1x400G" + }, + "Ethernet25": { + "default_brkout_mode": "1x400G" + }, + "Ethernet33": { + "default_brkout_mode": "1x400G" + }, + "Ethernet41": { + "default_brkout_mode": "1x400G" + }, + "Ethernet49": { + "default_brkout_mode": "1x400G" + }, + "Ethernet57": { + "default_brkout_mode": "1x400G" + }, + "Ethernet65": { + "default_brkout_mode": "1x400G" + }, + "Ethernet73": { + "default_brkout_mode": "1x400G" + }, + "Ethernet81": { + "default_brkout_mode": "1x400G" + }, + "Ethernet89": { + "default_brkout_mode": "1x400G" + }, + "Ethernet97": { + "default_brkout_mode": "1x400G" + }, + "Ethernet105": { + "default_brkout_mode": "1x400G" + }, + "Ethernet113": { + "default_brkout_mode": "1x400G" + }, + "Ethernet121": { + "default_brkout_mode": "1x400G" + }, + "Ethernet129": { + "default_brkout_mode": "1x400G" + }, + "Ethernet137": { + "default_brkout_mode": "1x400G" + }, + "Ethernet145": { + "default_brkout_mode": "1x400G" + }, + "Ethernet153": { + "default_brkout_mode": "1x400G" + }, + "Ethernet161": { + "default_brkout_mode": "1x400G" + }, + "Ethernet169": { + "default_brkout_mode": "1x400G" + }, + "Ethernet177": { + "default_brkout_mode": "1x400G" + }, + "Ethernet185": { + "default_brkout_mode": "1x400G" + }, + "Ethernet193": { + "default_brkout_mode": "1x400G" + }, + "Ethernet201": { + "default_brkout_mode": "1x400G" + }, + "Ethernet209": { + "default_brkout_mode": "1x400G" + }, + "Ethernet217": { + "default_brkout_mode": "1x400G" + }, + "Ethernet225": { + "default_brkout_mode": "1x400G" + }, + "Ethernet233": { + "default_brkout_mode": "1x400G" + }, + "Ethernet241": { + "default_brkout_mode": "1x400G" + }, + "Ethernet249": { + "default_brkout_mode": "1x400G" + }, + "Ethernet257": { + "default_brkout_mode": "1x10G" + }, + "Ethernet258": { + "default_brkout_mode": "1x10G" + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/port_config.ini b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/port_config.ini new file mode 100644 index 00000000000..8d631e7cb03 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/port_config.ini @@ -0,0 +1,35 @@ +# name lanes alias index speed +Ethernet1 1,2,3,4,5,6,7,8 fourHundredGigE0/1 0 400000 +Ethernet9 9,10,11,12,13,14,15,16 fourHundredGigE0/2 1 400000 +Ethernet17 17,18,19,20,21,22,23,24 fourHundredGigE0/3 2 400000 +Ethernet25 25,26,27,28,29,30,31,32 fourHundredGigE0/4 3 400000 +Ethernet33 33,34,35,36,37,38,39,40 fourHundredGigE0/5 4 400000 +Ethernet41 41,42,43,44,45,46,47,48 fourHundredGigE0/6 5 400000 +Ethernet49 49,50,51,52,53,54,55,56 fourHundredGigE0/7 6 400000 +Ethernet57 57,58,59,60,61,62,63,64 fourHundredGigE0/8 7 400000 +Ethernet65 65,66,67,68,69,70,71,72 fourHundredGigE0/9 8 400000 +Ethernet73 73,74,75,76,77,78,79,80 fourHundredGigE0/10 9 400000 +Ethernet81 81,82,83,84,85,86,87,88 fourHundredGigE0/11 10 400000 +Ethernet89 89,90,91,92,93,94,95,96 fourHundredGigE0/12 11 400000 +Ethernet97 97,98,99,100,101,102,103,104 fourHundredGigE0/13 12 400000 +Ethernet105 105,106,107,108,109,110,111,112 fourHundredGigE0/14 13 400000 +Ethernet113 113,114,115,116,117,118,119,120 fourHundredGigE0/15 14 400000 +Ethernet121 121,122,123,124,125,126,127,128 fourHundredGigE0/16 15 400000 +Ethernet129 129,130,131,132,133,134,135,136 fourHundredGigE0/17 16 400000 +Ethernet137 137,138,139,140,141,142,143,144 fourHundredGigE0/18 17 400000 +Ethernet145 145,146,147,148,149,150,151,152 fourHundredGigE0/19 18 400000 +Ethernet153 153,154,155,156,157,158,159,160 fourHundredGigE0/20 19 400000 +Ethernet161 161,162,163,164,165,166,167,168 fourHundredGigE0/21 20 400000 +Ethernet169 169,170,171,172,173,174,175,176 fourHundredGigE0/22 21 400000 +Ethernet177 177,178,179,180,181,182,183,184 fourHundredGigE0/23 22 400000 +Ethernet185 185,186,187,188,189,190,191,192 fourHundredGigE0/24 23 400000 +Ethernet193 193,194,195,196,197,198,199,200 fourHundredGigE0/25 24 400000 +Ethernet201 201,202,203,204,205,206,207,208 fourHundredGigE0/26 25 400000 +Ethernet209 209,210,211,212,213,214,215,216 fourHundredGigE0/27 26 400000 +Ethernet217 217,218,219,220,221,222,223,224 fourHundredGigE0/28 27 400000 +Ethernet225 225,226,227,228,229,230,231,232 fourHundredGigE0/29 28 400000 +Ethernet233 233,234,235,236,237,238,239,240 fourHundredGigE0/30 29 400000 +Ethernet241 241,242,243,244,245,246,247,248 fourHundredGigE0/31 30 400000 +Ethernet249 249,250,251,252,253,254,255,256 fourHundredGigE0/32 31 400000 +Ethernet257 258 tenGigE0/33 32 10000 +Ethernet258 257 tenGigE0/34 33 10000 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/sai.profile b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/sai.profile new file mode 100644 index 00000000000..3f83ed12fa5 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-m2-w6920-32qc2x-32x400G.config.bcm diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/th3-m2-w6920-32qc2x-32x400G.config.bcm b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/th3-m2-w6920-32qc2x-32x400G.config.bcm new file mode 100644 index 00000000000..2fa4334222c --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/th3-m2-w6920-32qc2x-32x400G.config.bcm @@ -0,0 +1,350 @@ +#rate_ext_mdio_divisor=100 +scache_filename=/var/warmboot/wbscache +stable_size=0x55000000 +stable_location=3 +warmboot_knet_shutdown_mode=1 +sai_postinit_cmd_file=/usr/share/sonic/platform/postinit_cmd_file.soc + +pcie_file=/usr/share/sonic/platform/pcie.cint +capi_level=1 +#port_fec=3 +cfg_int_phy_ctrl.0=1 +mmu_port_num_mc_queue=2 +bcm_tunnel_term_compatible_mode=1 +pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe +#serdes_tx_taps_ce=pam4:0:140:0:0:0:0 +ccm_dma_enable=0 +ccmdma_intr_enable=0 +ctr_evict_enable=0 +mem_cache_enable=0 +parity_correction=1 +parity_enable=1 +memlist_enable=1 +reglist_enable=1 +fpem_mem_entries=65536 +pll_bypass=1 +init_all_modules=0 +l3_mem_entries=16384 +l3_alpm_enable=2 +ipv6_lpm_128b_enable=0x1 +l3_max_ecmp_mode=1 +svi_my_station_optimization=1 + +#mgmt +portmap_38=257:10 +portmap_118=258:10 + +portmap_1=1:400 +portmap_5=9:400 +portmap_9=17:400 +portmap_13=25:400 + +portmap_20=33:400 +portmap_24=41:400 +portmap_28=49:400 +portmap_32=57:400 + +portmap_40=65:400 +portmap_44=73:400 +portmap_48=81:400 +portmap_52=89:400 + +portmap_60=97:400 +portmap_64=105:400 +portmap_68=113:400 +portmap_72=121:400 + +portmap_80=129:400 +portmap_84=137:400 +portmap_88=145:400 +portmap_92=153:400 + +portmap_100=161:400 +portmap_104=169:400 +portmap_108=177:400 +portmap_112=185:400 + +portmap_120=193:400 +portmap_124=201:400 +portmap_128=209:400 +portmap_132=217:400 + +portmap_140=225:400 +portmap_144=233:400 +portmap_148=241:400 +portmap_152=249:400 + +phy_chain_rx_lane_map_physical{1.0}=0x67214530 +phy_chain_tx_lane_map_physical{1.0}=0x53762140 +phy_chain_rx_lane_map_physical{9.0}=0x43712650 +phy_chain_tx_lane_map_physical{9.0}=0x56327014 +phy_chain_rx_lane_map_physical{17.0}=0x40357216 +phy_chain_tx_lane_map_physical{17.0}=0x65320147 +phy_chain_rx_lane_map_physical{25.0}=0x50264137 +phy_chain_tx_lane_map_physical{25.0}=0x62107435 +phy_chain_rx_lane_map_physical{33.0}=0x26470153 +phy_chain_tx_lane_map_physical{33.0}=0x45216730 +phy_chain_rx_lane_map_physical{41.0}=0x21743056 +phy_chain_tx_lane_map_physical{41.0}=0x75036124 +phy_chain_rx_lane_map_physical{49.0}=0x25431760 +phy_chain_tx_lane_map_physical{49.0}=0x56320471 +phy_chain_rx_lane_map_physical{57.0}=0x71460235 +phy_chain_tx_lane_map_physical{57.0}=0x72314650 +phy_chain_rx_lane_map_physical{65.0}=0x64317520 +phy_chain_tx_lane_map_physical{65.0}=0x67304512 +phy_chain_rx_lane_map_physical{73.0}=0x15407236 +phy_chain_tx_lane_map_physical{73.0}=0x16245730 +phy_chain_rx_lane_map_physical{81.0}=0x04735261 +phy_chain_tx_lane_map_physical{81.0}=0x27365401 +phy_chain_rx_lane_map_physical{89.0}=0x61450372 +phy_chain_tx_lane_map_physical{89.0}=0x27514630 +phy_chain_rx_lane_map_physical{97.0}=0x05741362 +phy_chain_tx_lane_map_physical{97.0}=0x13624705 +phy_chain_rx_lane_map_physical{105.0}=0x10426735 +phy_chain_tx_lane_map_physical{105.0}=0x70124635 +phy_chain_rx_lane_map_physical{113.0}=0x34072651 +phy_chain_tx_lane_map_physical{113.0}=0x05712463 +phy_chain_rx_lane_map_physical{121.0}=0x34026517 +phy_chain_tx_lane_map_physical{121.0}=0x14052367 +phy_chain_rx_lane_map_physical{129.0}=0x76413205 +phy_chain_tx_lane_map_physical{129.0}=0x41720365 +phy_chain_rx_lane_map_physical{137.0}=0x72530146 +phy_chain_tx_lane_map_physical{137.0}=0x15437026 +phy_chain_rx_lane_map_physical{145.0}=0x02567413 +phy_chain_tx_lane_map_physical{145.0}=0x45217630 +phy_chain_rx_lane_map_physical{153.0}=0x14265370 +phy_chain_tx_lane_map_physical{153.0}=0x75106432 +phy_chain_rx_lane_map_physical{161.0}=0x53017462 +phy_chain_tx_lane_map_physical{161.0}=0x56104732 +phy_chain_rx_lane_map_physical{169.0}=0x50761243 +phy_chain_tx_lane_map_physical{169.0}=0x65237014 +phy_chain_rx_lane_map_physical{177.0}=0x37612450 +phy_chain_tx_lane_map_physical{177.0}=0x07124563 +phy_chain_rx_lane_map_physical{185.0}=0x31476205 +phy_chain_tx_lane_map_physical{185.0}=0x54236710 +phy_chain_rx_lane_map_physical{193.0}=0x52104763 +phy_chain_tx_lane_map_physical{193.0}=0x06137524 +phy_chain_rx_lane_map_physical{201.0}=0x01543762 +phy_chain_tx_lane_map_physical{201.0}=0x76512043 +phy_chain_rx_lane_map_physical{209.0}=0x10526743 +phy_chain_tx_lane_map_physical{209.0}=0x57204613 +phy_chain_rx_lane_map_physical{217.0}=0x30465172 +phy_chain_tx_lane_map_physical{217.0}=0x07315624 +phy_chain_rx_lane_map_physical{225.0}=0x05176324 +phy_chain_tx_lane_map_physical{225.0}=0x46213507 +phy_chain_rx_lane_map_physical{233.0}=0x23506147 +phy_chain_tx_lane_map_physical{233.0}=0x54376102 +phy_chain_rx_lane_map_physical{241.0}=0x34750612 +phy_chain_tx_lane_map_physical{241.0}=0x56214730 +phy_chain_rx_lane_map_physical{249.0}=0x74125603 +phy_chain_tx_lane_map_physical{249.0}=0x21053467 + + +serdes_core_rx_polarity_flip_physical{1}=0x6F +serdes_core_tx_polarity_flip_physical{1}=0xCD +serdes_core_rx_polarity_flip_physical{9}=0x36 +serdes_core_tx_polarity_flip_physical{9}=0x7C +serdes_core_rx_polarity_flip_physical{17}=0x2D +serdes_core_tx_polarity_flip_physical{17}=0xEB +serdes_core_rx_polarity_flip_physical{25}=0x0B +serdes_core_tx_polarity_flip_physical{25}=0xEE +serdes_core_rx_polarity_flip_physical{33}=0xEB +serdes_core_tx_polarity_flip_physical{33}=0x7C +serdes_core_rx_polarity_flip_physical{41}=0x1B +serdes_core_tx_polarity_flip_physical{41}=0x57 +serdes_core_rx_polarity_flip_physical{49}=0xA4 +serdes_core_tx_polarity_flip_physical{49}=0x0 +serdes_core_rx_polarity_flip_physical{57}=0x74 +serdes_core_tx_polarity_flip_physical{57}=0x54 +serdes_core_rx_polarity_flip_physical{65}=0x3C +serdes_core_tx_polarity_flip_physical{65}=0xF4 +serdes_core_rx_polarity_flip_physical{73}=0xC7 +serdes_core_tx_polarity_flip_physical{73}=0x40 +serdes_core_rx_polarity_flip_physical{81}=0xD9 +serdes_core_tx_polarity_flip_physical{81}=0x51 +serdes_core_rx_polarity_flip_physical{89}=0xB6 +serdes_core_tx_polarity_flip_physical{89}=0x9C +serdes_core_rx_polarity_flip_physical{97}=0x80 +serdes_core_tx_polarity_flip_physical{97}=0x84 +serdes_core_rx_polarity_flip_physical{105}=0xE8 +serdes_core_tx_polarity_flip_physical{105}=0x22 +serdes_core_rx_polarity_flip_physical{113}=0xCF +serdes_core_tx_polarity_flip_physical{113}=0xF7 +serdes_core_rx_polarity_flip_physical{121}=0x73 +serdes_core_tx_polarity_flip_physical{121}=0x7B +serdes_core_rx_polarity_flip_physical{129}=0x03 +serdes_core_tx_polarity_flip_physical{129}=0x45 +serdes_core_rx_polarity_flip_physical{137}=0x73 +serdes_core_tx_polarity_flip_physical{137}=0x3D +serdes_core_rx_polarity_flip_physical{145}=0xBD +serdes_core_tx_polarity_flip_physical{145}=0x72 +serdes_core_rx_polarity_flip_physical{153}=0xD2 +serdes_core_tx_polarity_flip_physical{153}=0xAE +serdes_core_rx_polarity_flip_physical{161}=0x58 +serdes_core_tx_polarity_flip_physical{161}=0x0C +serdes_core_rx_polarity_flip_physical{169}=0x75 +serdes_core_tx_polarity_flip_physical{169}=0x13 +serdes_core_rx_polarity_flip_physical{177}=0xAA +serdes_core_tx_polarity_flip_physical{177}=0x4F +serdes_core_rx_polarity_flip_physical{185}=0xA8 +serdes_core_tx_polarity_flip_physical{185}=0x96 +serdes_core_rx_polarity_flip_physical{193}=0x87 +serdes_core_tx_polarity_flip_physical{193}=0x17 +serdes_core_rx_polarity_flip_physical{201}=0x18 +serdes_core_tx_polarity_flip_physical{201}=0x13 +serdes_core_rx_polarity_flip_physical{209}=0x11 +serdes_core_tx_polarity_flip_physical{209}=0xB3 +serdes_core_rx_polarity_flip_physical{217}=0xF2 +serdes_core_tx_polarity_flip_physical{217}=0xB7 +serdes_core_rx_polarity_flip_physical{225}=0x78 +serdes_core_tx_polarity_flip_physical{225}=0xB6 +serdes_core_rx_polarity_flip_physical{233}=0x38 +serdes_core_tx_polarity_flip_physical{233}=0x6E +serdes_core_rx_polarity_flip_physical{241}=0x60 +serdes_core_tx_polarity_flip_physical{241}=0x3C +serdes_core_rx_polarity_flip_physical{249}=0x1A +serdes_core_tx_polarity_flip_physical{249}=0xB1 + +dport_map_port_1=1 +dport_map_port_2=2 +dport_map_port_3=3 +dport_map_port_4=4 +dport_map_port_5=5 +dport_map_port_6=6 +dport_map_port_7=7 +dport_map_port_8=8 +dport_map_port_9=9 +dport_map_port_10=10 +dport_map_port_11=11 +dport_map_port_12=12 +dport_map_port_13=13 +dport_map_port_14=14 +dport_map_port_15=15 +dport_map_port_16=16 +dport_map_port_20=17 +dport_map_port_21=18 +dport_map_port_22=19 +dport_map_port_23=20 +dport_map_port_24=21 +dport_map_port_25=22 +dport_map_port_26=23 +dport_map_port_27=24 +dport_map_port_28=25 +dport_map_port_29=26 +dport_map_port_30=27 +dport_map_port_31=28 +dport_map_port_32=29 +dport_map_port_33=30 +dport_map_port_34=31 +dport_map_port_35=32 +dport_map_port_40=33 +dport_map_port_41=34 +dport_map_port_42=35 +dport_map_port_43=36 +dport_map_port_44=37 +dport_map_port_45=38 +dport_map_port_46=39 +dport_map_port_47=40 +dport_map_port_48=41 +dport_map_port_49=42 +dport_map_port_50=43 +dport_map_port_51=44 +dport_map_port_52=45 +dport_map_port_53=46 +dport_map_port_54=47 +dport_map_port_55=48 +dport_map_port_60=49 +dport_map_port_61=50 +dport_map_port_62=51 +dport_map_port_63=52 +dport_map_port_64=53 +dport_map_port_65=54 +dport_map_port_66=55 +dport_map_port_67=56 +dport_map_port_68=57 +dport_map_port_69=58 +dport_map_port_70=59 +dport_map_port_71=60 +dport_map_port_72=61 +dport_map_port_73=62 +dport_map_port_74=63 +dport_map_port_75=64 +dport_map_port_80=65 +dport_map_port_81=66 +dport_map_port_82=67 +dport_map_port_83=68 +dport_map_port_84=69 +dport_map_port_85=70 +dport_map_port_86=71 +dport_map_port_87=72 +dport_map_port_88=73 +dport_map_port_89=74 +dport_map_port_90=75 +dport_map_port_91=76 +dport_map_port_92=77 +dport_map_port_93=78 +dport_map_port_94=79 +dport_map_port_95=80 +dport_map_port_100=81 +dport_map_port_101=82 +dport_map_port_102=83 +dport_map_port_103=84 +dport_map_port_104=85 +dport_map_port_105=86 +dport_map_port_106=87 +dport_map_port_107=88 +dport_map_port_108=89 +dport_map_port_109=90 +dport_map_port_110=91 +dport_map_port_111=92 +dport_map_port_112=93 +dport_map_port_113=94 +dport_map_port_114=95 +dport_map_port_115=96 +dport_map_port_120=97 +dport_map_port_121=98 +dport_map_port_122=99 +dport_map_port_123=100 +dport_map_port_124=101 +dport_map_port_125=102 +dport_map_port_126=103 +dport_map_port_127=104 +dport_map_port_128=105 +dport_map_port_129=106 +dport_map_port_130=107 +dport_map_port_131=108 +dport_map_port_132=109 +dport_map_port_133=110 +dport_map_port_134=111 +dport_map_port_135=112 +dport_map_port_140=113 +dport_map_port_141=114 +dport_map_port_142=115 +dport_map_port_143=116 +dport_map_port_144=117 +dport_map_port_145=118 +dport_map_port_146=119 +dport_map_port_147=120 +dport_map_port_148=121 +dport_map_port_149=122 +dport_map_port_150=123 +dport_map_port_151=124 +dport_map_port_152=125 +dport_map_port_153=126 +dport_map_port_154=127 +dport_map_port_155=128 + +dport_map_port_118=129 +dport_map_port_38=130 + +#firmware load, use fast load +#load_firmware=0x2 + +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 +port_flex_enable=1 + +#RDMA +sai_pfc_defaults_disable=1 +sai_optimized_mmu=1 diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu.cint b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu.cint new file mode 100644 index 00000000000..e286d3cf42a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu.cint @@ -0,0 +1,85 @@ +cint_reset(); + +int cint_field_group_create(int unit, bcm_field_group_t grp) +{ + int rv; + + bcm_field_qset_t qset; + bcm_field_aset_t aset; + + BCM_FIELD_QSET_INIT(qset); + BCM_FIELD_QSET_ADD(qset,bcmFieldQualifyDstMac); + BCM_FIELD_QSET_ADD(qset, bcmFieldQualifyStageIngress); + + BCM_FIELD_ASET_INIT(aset); + BCM_FIELD_ASET_ADD(aset, bcmFieldActionCopyToCpu); + + rv = bcm_field_group_create_mode_id(unit, qset, 103, bcmFieldGroupModeAuto, grp); + if (rv != BCM_E_NONE) { + printf("bcm_field_group_create_mode_id failed, rv = %d\r\n", rv); + return -1; + } + printf("cint_field_group_create success!!!, rv = %d\r\n", rv); + + bcm_field_group_dump(unit,grp); + return 0; +} + +int cint_field_entry_create1(int unit, bcm_field_group_t grp,bcm_field_entry_t entry) +{ + int rv; + bcm_mac_t dst_mac = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + bcm_mac_t mac_mask = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + + rv = bcm_field_entry_create_id(unit, grp, entry); + if (rv != BCM_E_NONE) { + printf("bcm_field_entry_create_id failed, rv = %d\r\n", rv); + return -1; + } + + + rv =bcm_field_qualify_DstMac(unit, entry, dst_mac, mac_mask); + if (rv != BCM_E_NONE) { + printf("bcm_field_qualify_DstMac failed,ret = %d\r\n", rv); + bcm_field_entry_destroy(unit, entry); + return -1; + } + + rv = bcm_field_action_add(unit, entry, bcmFieldActionCopyToCpu, 1, 0); + if (rv != BCM_E_NONE) { + printf("bcm_field_action_add failed, rv = %d \r\n", rv); + bcm_field_entry_destroy(unit, entry); + return -1; + } + + rv = bcm_field_action_add(unit, entry, bcmFieldActionDrop, 1, 0); + if (rv != BCM_E_NONE) { + printf("bcm_field_action_add failed, rv = %d \r\n", rv); + bcm_field_entry_destroy(unit, entry); + return -1; + } + + rv = bcm_field_entry_install(unit, entry); + if (rv != BCM_E_NONE) { + printf("bcm_field_entry_install failed,ret = %d\r\n", rv); + bcm_field_entry_destroy(unit, entry); + return -1; + } + + printf("********************* BEGIN ****************************\r\n"); + bcm_field_entry_dump(unit, entry); + printf("*********************** END ****************************\r\n"); + + return 0; +} + +cint_field_group_create(0,5); +cint_field_entry_create1(0,5,2048); + +//bcm_field_entry_destroy(0, 2048); +//bcm_field_group_destroy(0, 5); + + + + + diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu_destroy.cint b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu_destroy.cint new file mode 100644 index 00000000000..33c8b64b83d --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu_destroy.cint @@ -0,0 +1,2 @@ +bcm_field_entry_destroy(0, 2048); +bcm_field_group_destroy(0, 5); \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cust_fru.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cust_fru.py new file mode 100644 index 00000000000..940c722ce46 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cust_fru.py @@ -0,0 +1,135 @@ +#!/usr/bin/python +# -*- coding: utf-8 -*- +import sys +import os + + +class CustFruException(Exception): + def __init__(self, message='custfrueerror', code=-100): + err = 'errcode: {0} message:{1}'.format(code, message) + Exception.__init__(self, err) + self.code = code + self.message = message + + +class CustFru(): + MAGIC_HEAD_INFO = 0x7a + + _CUST_MAGIC_OFFSET = 0 + _CUST_MAGIC_LEN = 1 + _CUST_VERSION_OFFSET = 1 + _CUST_VERSION_LEN = 6 + _CUST_CRC_OFFSET = 7 + _CUST_CRC_LEN = 1 + _CUST_PRODUCT_NAME_OFFSET = 10 + _CUST_PRODUCT_NAME_LEN = 17 + _CUST_MANUFACTURER_OFFSET = 27 + _CUST_MANUFACTURER_LEN = 7 + _CUST_SERIAL_NUMBER_OFFSET = 34 + _CUST_SERIAL_NUMBER_LEN = 25 + _CUST_INPUT_TYPE_OFFSET = 78 + _CUST_INPUT_TYPE_LEN = 2 + _CUST_INPUT_OFFSET = 86 + _CUST_INPUT_LEN = 15 + _CUST_OUTPUT_OFFSET = 108 + _CUST_OUTPUT_LEN = 11 + _CUST_POWER_OFFSET = 200 + _CUST_POWER_LEN = 10 + _CUST_MANUFACTURER_DATE_OFFSET = 210 + _CUST_MANUFACTURER_DATE_LEN = 3 + + def __init__(self): + self.magic = "" + self.version = "" + self.crc = "" + self.product_name = "" + self.manufacturer = "" + self.serial_number = "" + self.input_type = "" + self.input = "" + self.output = "" + self.power = "" + self.manufacturer_date = "" + + def checksum(self, v): + result = 0 + for item in v: + result += ord(item) + return (result & 0xff) + + def decode(self, e2): + # header + e2_index = 0 + head = ord(e2[0]) + if head != self.MAGIC_HEAD_INFO: + raise CustFruException("Customization fru eeprom head info error, head:0x%x" % head, -10) + self.magic = "0x%02x" % self.MAGIC_HEAD_INFO + + # version + version = "%s" % (e2[self._CUST_VERSION_OFFSET:self._CUST_VERSION_OFFSET + self._CUST_VERSION_LEN]) + self.version = version.replace("\xff", "").strip() + + # crc + crc_calc = self.checksum(e2[0:self._CUST_CRC_OFFSET]) + if crc_calc != ord(e2[self._CUST_CRC_OFFSET]): + raise CustFruException("Customization fru eeprom crc check error, calc: 0x%x, read: 0x%x" % (crc_calc, ord(e2[self._CUST_CRC_OFFSET])), -10) + self.crc = crc_calc + + # Product Name + product_name = "%s" % (e2[self._CUST_PRODUCT_NAME_OFFSET:self._CUST_PRODUCT_NAME_OFFSET + self._CUST_PRODUCT_NAME_LEN]) + self.product_name = product_name.replace("\xff", "").strip() + + # manufacturer + manufacturer = "%s" % (e2[self._CUST_MANUFACTURER_OFFSET:self._CUST_MANUFACTURER_OFFSET + self._CUST_MANUFACTURER_LEN]) + self.manufacturer = manufacturer.strip() + + # serial_number + serial_number = "%s" % (e2[self._CUST_SERIAL_NUMBER_OFFSET:self._CUST_SERIAL_NUMBER_OFFSET + self._CUST_SERIAL_NUMBER_LEN]) + self.serial_number = serial_number.strip() + + # input_type + input_type = "%s" % (e2[self._CUST_INPUT_TYPE_OFFSET:self._CUST_INPUT_TYPE_OFFSET + self._CUST_INPUT_TYPE_LEN]) + self.input_type = input_type.strip() + + # input + input = "%s" % (e2[self._CUST_INPUT_OFFSET:self._CUST_INPUT_OFFSET + self._CUST_INPUT_LEN]) + self.input = input.strip() + + # output + output = "%s" % (e2[self._CUST_OUTPUT_OFFSET:self._CUST_OUTPUT_OFFSET + self._CUST_OUTPUT_LEN]) + self.output = output.strip() + + # power + power = "%s" % (e2[self._CUST_POWER_OFFSET:self._CUST_POWER_OFFSET + self._CUST_POWER_LEN]) + self.power = power.replace("\xff", "").strip() + + # manufacturer_date + manufacturer_year = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET]) + 2000 + manufacturer_month = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 1]) + manufacturer_day = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 2]) + self.manufacturer_date = "%04d-%02d-%02d" % (manufacturer_year, manufacturer_month, manufacturer_day) + + return + + + def __str__(self): + formatstr = "Version : %s \n" \ + "Product Name : %s \n" \ + "Manufacturer : %s \n" \ + "Serial Number : %s \n" \ + "AC/DC Power Module : %s \n" \ + "INPUT : %s \n" \ + "OUTPUT : %s \n" \ + "POWER : %s \n" \ + "Manufacturer Date : %s \n" + str_tmp = formatstr % (self.version, + self.product_name, + self.manufacturer, + self.serial_number, + self.input_type, + self.input, + self.output, + self.power, + self.manufacturer_date) + return str_tmp.replace("\x00","") + diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/custom_led.bin new file mode 100644 index 00000000000..ef516314027 Binary files /dev/null and b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/custom_led.bin differ diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/default_sku b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/default_sku new file mode 100644 index 00000000000..b756112ae67 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/default_sku @@ -0,0 +1 @@ +M2-W6920-32QC2X l2 diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev.xml b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev.xml new file mode 100644 index 00000000000..665fb334235 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev.xml @@ -0,0 +1,459 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev_exhaust.xml b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev_exhaust.xml new file mode 100644 index 00000000000..2a4708da7a9 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev_exhaust.xml @@ -0,0 +1,459 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/fru.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/fru.py new file mode 100644 index 00000000000..f95164e0360 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/fru.py @@ -0,0 +1,961 @@ +#!/usr/bin/python3 +import collections +from datetime import datetime, timedelta +from bitarray import bitarray + + +__DEBUG__ = "N" + + +class FruException(Exception): + def __init__(self, message='fruerror', code=-100): + err = 'errcode: {0} message:{1}'.format(code, message) + Exception.__init__(self, err) + self.code = code + self.message = message + + +def e_print(err): + print("ERROR: " + err) + + +def d_print(debug_info): + if __DEBUG__ == "Y": + print(debug_info) + + +class FruUtil(): + @staticmethod + def decodeLength(value): + a = bitarray(8) + a.setall(True) + a[0:1] = 0 + a[1:2] = 0 + x = ord(a.tobytes()) + return x & ord(value) + + @staticmethod + def minToData(): + starttime = datetime(1996, 1, 1, 0, 0, 0) + endtime = datetime.now() + seconds = (endtime - starttime).total_seconds() + mins = seconds // 60 + m = int(round(mins)) + return m + + @staticmethod + def getTimeFormat(): + return datetime.now().strftime('%Y-%m-%d') + + @staticmethod + def getTypeLength(value): + if value is None or len(value) == 0: + return 0 + a = bitarray(8) + a.setall(False) + a[0:1] = 1 + a[1:2] = 1 + x = ord(a.tobytes()) + return x | len(value) + + @staticmethod + def checksum(b): + result = 0 + for item in b: + result += ord(item) + return (0x100 - (result & 0xff)) & 0xff + + +class BaseArea(object): + SUGGESTED_SIZE_COMMON_HEADER = 8 + SUGGESTED_SIZE_INTERNAL_USE_AREA = 72 + SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32 + SUGGESTED_SIZE_BOARD_INFO_AREA = 80 + SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80 + + INITVALUE = b'\x00' + resultvalue = INITVALUE * 256 + COMMON_HEAD_VERSION = b'\x01' + __childList = None + + def __init__(self, name="", size=0, offset=0): + self.__childList = [] + self._offset = offset + self.name = name + self._size = size + self._isPresent = False + self._data = b'\x00' * size + + @property + def childList(self): + return self.__childList + + @childList.setter + def childList(self, value): + self.__childList = value + + @property + def offset(self): + return self._offset + + @offset.setter + def offset(self, value): + self._offset = value + + @property + def size(self): + return self._size + + @size.setter + def size(self, value): + self._size = value + + @property + def data(self): + return self._data + + @data.setter + def data(self, value): + self._data = value + + @property + def isPresent(self): + return self._isPresent + + @isPresent.setter + def isPresent(self, value): + self._isPresent = value + + +class InternalUseArea(BaseArea): + pass + + +class ChassisInfoArea(BaseArea): + pass + + +class BoardInfoArea(BaseArea): + _boardTime = None + _fields = None + _mfg_date = None + areaversion = None + _boardversion = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "mfg_date : %s \n" \ + "boardManufacturer : %s \n" \ + "boardProductName : %s \n" \ + "boardSerialNumber : %s \n" \ + "boardPartNumber : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.boardversion), self.size, + self.language, self.getMfgRealData(), + self.boardManufacturer, self.boardProductName, + self.boardSerialNumber, self.boardPartNumber, + self.fruFileId) + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "boardextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["boardversion"] = ord(self.boardversion) + dic["boardlength"] = self.size + dic["boardlanguage"] = self.language + dic["boardmfg_date"] = self.getMfgRealData() + dic["boardManufacturer"] = self.boardManufacturer + dic["boardProductName"] = self.boardProductName + dic["boardSerialNumber"] = self.boardSerialNumber + dic["boardPartNumber"] = self.boardPartNumber + dic["boardfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] + index += 1 + d_print("decode length :%d class size:%d" % + ((ord(self.data[index]) * 8), self.size)) + index += 2 + + timetmp = self.data[index: index + 3] + self.mfg_date = ord(timetmp[0]) | ( + ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16) + d_print("decode getMfgRealData :%s" % self.getMfgRealData()) + index += 3 + + templen = FruUtil.decodeLength(self.data[index]) + self.boardManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardManufacturer:%s" % self.boardManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardProductName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardProductName:%s" % self.boardProductName) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardSerialNumber:%s" % self.boardSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardPartNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardPartNumber:%s" % self.boardPartNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if self.data[index] != chr(0xc1): + templen = FruUtil.decodeLength(self.data[index]) + tmpval = self.data[index + 1: index + templen + 1] + setattr(self, valtmp, tmpval) + index += templen + 1 + d_print("decode boardextra%d:%s" % (i, tmpval)) + else: + break + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("boardInfoArea version:%x" % ord(self.boardversion)) + d_print("boardInfoArea length:%d" % self.size) + d_print("boardInfoArea language:%x" % self.language) + self.mfg_date = FruUtil.minToData() + d_print("boardInfoArea mfg_date:%x" % self.mfg_date) + + self.data = chr(ord(self.boardversion)) + \ + chr(self.size // 8) + chr(self.language) + + self.data += chr(self.mfg_date & 0xFF) + self.data += chr((self.mfg_date >> 8) & 0xFF) + self.data += chr((self.mfg_date >> 16) & 0xFF) + + d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer) + typelength = FruUtil.getTypeLength(self.boardManufacturer) + self.data += chr(typelength) + self.data += self.boardManufacturer + + d_print("boardInfoArea boardProductName:%s" % self.boardProductName) + self.data += chr(FruUtil.getTypeLength(self.boardProductName)) + self.data += self.boardProductName + + d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber) + self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber)) + self.data += self.boardSerialNumber + + d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber) + self.data += chr(FruUtil.getTypeLength(self.boardPartNumber)) + self.data += self.boardPartNumber + + d_print("boardInfoArea fruFileId:%s" % self.fruFileId) + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + d_print("self data:%d" % len(self.data)) + d_print("self size:%d" % self.size) + d_print("adjust size:%d" % (self.size - len(self.data) - 1)) + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + + # checksum + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + def getMfgRealData(self): + starttime = datetime(1996, 1, 1, 0, 0, 0) + mactime = starttime + timedelta(minutes=self.mfg_date) + return mactime + + @property + def language(self): + self._language = 25 + return self._language + + @property + def mfg_date(self): + return self._mfg_date + + @mfg_date.setter + def mfg_date(self, val): + self._mfg_date = val + + @property + def boardversion(self): + self._boardversion = self.COMMON_HEAD_VERSION + return self._boardversion + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, val): + self._FRUFileID = val + + @property + def boardPartNumber(self): + return self._boardPartNumber + + @boardPartNumber.setter + def boardPartNumber(self, val): + self._boardPartNumber = val + + @property + def boardSerialNumber(self): + return self._boardSerialNumber + + @boardSerialNumber.setter + def boardSerialNumber(self, val): + self._boardSerialNumber = val + + @property + def boardProductName(self): + return self._boradProductName + + @boardProductName.setter + def boardProductName(self, val): + self._boradProductName = val + + @property + def boardManufacturer(self): + return self._boardManufacturer + + @boardManufacturer.setter + def boardManufacturer(self, val): + self._boardManufacturer = val + + @property + def boardTime(self): + return self._boardTime + + @boardTime.setter + def boardTime(self, val): + self._boardTime = val + + @property + def fields(self): + return self._fields + + @fields.setter + def fields(self, val): + self._fields = val + + +class ProductInfoArea(BaseArea): + _productManufacturer = None + _productAssetTag = None + _FRUFileID = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "productManufacturer : %s \n" \ + "productName : %s \n" \ + "productPartModelName: %s \n" \ + "productVersion : %s \n" \ + "productSerialNumber : %s \n" \ + "productAssetTag : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.areaversion), self.size, + self.language, self.productManufacturer, + self.productName, self.productPartModelName, + self.productVersion, self.productSerialNumber, + self.productAssetTag, self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "productextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["productversion"] = ord(self.areaversion) + dic["productlength"] = self.size + dic["productlanguage"] = self.language + dic["productManufacturer"] = self.productManufacturer + dic["productName"] = self.productName + dic["productPartModelName"] = self.productPartModelName + dic["productVersion"] = int(self.productVersion, 16) + dic["productSerialNumber"] = self.productSerialNumber + dic["productAssetTag"] = self.productAssetTag + dic["productfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] # 0 + index += 1 + d_print("decode length %d" % (ord(self.data[index]) * 8)) + d_print("class size %d" % self.size) + index += 2 + + templen = FruUtil.decodeLength(self.data[index]) + self.productManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productManufacturer:%s" % self.productManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.productName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productName:%s" % self.productName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productPartModelName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productPartModelName:%s" % self.productPartModelName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productVersion = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productVersion:%s" % self.productVersion) + + templen = FruUtil.decodeLength(self.data[index]) + self.productSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productSerialNumber:%s" % self.productSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.productAssetTag = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productAssetTag:%s" % self.productAssetTag) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if self.data[index] != chr(0xc1) and index < self.size - 1: + templen = FruUtil.decodeLength(self.data[index]) + if templen == 0: + break + tmpval = self.data[index + 1: index + templen + 1] + d_print("decode boardextra%d:%s" % (i, tmpval)) + setattr(self, valtmp, tmpval) + index += templen + 1 + else: + break + + @property + def productVersion(self): + return self._productVersion + + @productVersion.setter + def productVersion(self, name): + self._productVersion = name + + @property + def areaversion(self): + self._areaversion = self.COMMON_HEAD_VERSION + return self._areaversion + + @areaversion.setter + def areaversion(self, name): + self._areaversion = name + + @property + def language(self): + self._language = 25 + return self._language + + @property + def productManufacturer(self): + return self._productManufacturer + + @productManufacturer.setter + def productManufacturer(self, name): + self._productManufacturer = name + + @property + def productName(self): + return self._productName + + @productName.setter + def productName(self, name): + self._productName = name + + @property + def productPartModelName(self): + return self._productPartModelName + + @productPartModelName.setter + def productPartModelName(self, name): + self._productPartModelName = name + + @property + def productSerialNumber(self): + return self._productSerialNumber + + @productSerialNumber.setter + def productSerialNumber(self, name): + self._productSerialNumber = name + + @property + def productAssetTag(self): + return self._productAssetTag + + @productAssetTag.setter + def productAssetTag(self, name): + self._productAssetTag = name + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, name): + self._FRUFileID = name + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("product version:%x" % ord(self.areaversion)) + d_print("product length:%d" % self.size) + d_print("product language:%x" % self.language) + self.data = chr(ord(self.areaversion)) + \ + chr(self.size // 8) + chr(self.language) + + typelength = FruUtil.getTypeLength(self.productManufacturer) + self.data += chr(typelength) + self.data += self.productManufacturer + + self.data += chr(FruUtil.getTypeLength(self.productName)) + self.data += self.productName + + self.data += chr(FruUtil.getTypeLength(self.productPartModelName)) + self.data += self.productPartModelName + + self.data += chr(FruUtil.getTypeLength(self.productVersion)) + self.data += self.productVersion + + self.data += chr(FruUtil.getTypeLength(self.productSerialNumber)) + self.data += self.productSerialNumber + + self.data += chr(FruUtil.getTypeLength(self.productAssetTag)) + if self.productAssetTag is not None: + self.data += self.productAssetTag + + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea productextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + d_print("self.data:%d" % len(self.data)) + d_print("self.size:%d" % self.size) + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + +class MultiRecordArea(BaseArea): + pass + + +class Field(object): + + def __init__(self, fieldType="ASCII", fieldData=""): + self.fieldData = fieldData + self.fieldType = fieldType + + @property + def fieldType(self): + return self.fieldType + + @property + def fieldData(self): + return self.fieldData + + +class ipmifru(BaseArea): + _BoardInfoArea = None + _ProductInfoArea = None + _InternalUseArea = None + _ChassisInfoArea = None + _multiRecordArea = None + _productinfoAreaOffset = BaseArea.INITVALUE + _boardInfoAreaOffset = BaseArea.INITVALUE + _internalUserAreaOffset = BaseArea.INITVALUE + _chassicInfoAreaOffset = BaseArea.INITVALUE + _multiRecordAreaOffset = BaseArea.INITVALUE + _bindata = None + _bodybin = None + _version = BaseArea.COMMON_HEAD_VERSION + _zeroCheckSum = None + _frusize = 256 + + def __str__(self): + tmpstr = "" + if self.boardInfoArea.isPresent: + tmpstr += "\nboardinfoarea: \n" + tmpstr += self.boardInfoArea.__str__() + if self.productInfoArea.isPresent: + tmpstr += "\nproductinfoarea: \n" + tmpstr += self.productInfoArea.__str__() + return tmpstr + + def decodeBin(self, eeprom): + commonHead = eeprom[0:8] + d_print("decode version %x" % ord(commonHead[0])) + if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]): + raise FruException("HEAD VERSION error,not Fru format!", -10) + if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]): + strtemp = "check header checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(commonHead[0:7]), ord(commonHead[7])) + raise FruException(strtemp, -3) + if ord(commonHead[1]) != ord(self.INITVALUE): + d_print("Internal Use Area is present") + self.internalUseArea = InternalUseArea( + name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA) + self.internalUseArea.isPresent = True + self.internalUserAreaOffset = ord(commonHead[1]) + self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: ( + self.internalUserAreaOffset * 8 + self.internalUseArea.size)] + if ord(commonHead[2]) != ord(self.INITVALUE): + d_print("Chassis Info Area is present") + self.chassisInfoArea = ChassisInfoArea( + name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA) + self.chassisInfoArea.isPresent = True + self.chassicInfoAreaOffset = ord(commonHead[2]) + self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: ( + self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)] + if ord(commonHead[3]) != ord(self.INITVALUE): + self.boardInfoArea = BoardInfoArea( + name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA) + self.boardInfoArea.isPresent = True + self.boardInfoAreaOffset = ord(commonHead[3]) + self.boardInfoArea.size = ord( + eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8 + d_print("Board Info Area is present size:%d" % + (self.boardInfoArea.size)) + self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: ( + self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)] + if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]): + strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \ + (FruUtil.checksum( + self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.boardInfoArea.decodedata() + if ord(commonHead[4]) != ord(self.INITVALUE): + d_print("Product Info Area is present") + self.productInfoArea = ProductInfoArea( + name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA) + self.productInfoArea.isPresent = True + self.productinfoAreaOffset = ord(commonHead[4]) + d_print("length offset value: %02x" % + ord(eeprom[self.productinfoAreaOffset * 8 + 1])) + self.productInfoArea.size = ord( + eeprom[self.productinfoAreaOffset * 8 + 1]) * 8 + d_print("Product Info Area is present size:%d" % + (self.productInfoArea.size)) + + self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: ( + self.productinfoAreaOffset * 8 + self.productInfoArea.size)] + if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]): + strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.productInfoArea.decodedata() + if ord(commonHead[5]) != ord(self.INITVALUE): + self.multiRecordArea = MultiRecordArea( + name="MultiRecord record Area ") + d_print("MultiRecord record present") + self.multiRecordArea.isPresent = True + self.multiRecordAreaOffset = ord(commonHead[5]) + self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: ( + self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)] + + def initDefault(self): + self.version = self.COMMON_HEAD_VERSION + self.internalUserAreaOffset = self.INITVALUE + self.chassicInfoAreaOffset = self.INITVALUE + self.boardInfoAreaOffset = self.INITVALUE + self.productinfoAreaOffset = self.INITVALUE + self.multiRecordAreaOffset = self.INITVALUE + self.zeroCheckSum = self.INITVALUE + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + self.productInfoArea = None + self.internalUseArea = None + self.boardInfoArea = None + self.chassisInfoArea = None + self.multiRecordArea = None + # self.recalcute() + + @property + def version(self): + return self._version + + @version.setter + def version(self, name): + self._version = name + + @property + def internalUserAreaOffset(self): + return self._internalUserAreaOffset + + @internalUserAreaOffset.setter + def internalUserAreaOffset(self, obj): + self._internalUserAreaOffset = obj + + @property + def chassicInfoAreaOffset(self): + return self._chassicInfoAreaOffset + + @chassicInfoAreaOffset.setter + def chassicInfoAreaOffset(self, obj): + self._chassicInfoAreaOffset = obj + + @property + def productinfoAreaOffset(self): + return self._productinfoAreaOffset + + @productinfoAreaOffset.setter + def productinfoAreaOffset(self, obj): + self._productinfoAreaOffset = obj + + @property + def boardInfoAreaOffset(self): + return self._boardInfoAreaOffset + + @boardInfoAreaOffset.setter + def boardInfoAreaOffset(self, obj): + self._boardInfoAreaOffset = obj + + @property + def multiRecordAreaOffset(self): + return self._multiRecordAreaOffset + + @multiRecordAreaOffset.setter + def multiRecordAreaOffset(self, obj): + self._multiRecordAreaOffset = obj + + @property + def zeroCheckSum(self): + return self._zeroCheckSum + + @zeroCheckSum.setter + def zeroCheckSum(self, obj): + self._zeroCheckSum = obj + + @property + def productInfoArea(self): + return self._ProductInfoArea + + @productInfoArea.setter + def productInfoArea(self, obj): + self._ProductInfoArea = obj + + @property + def internalUseArea(self): + return self._InternalUseArea + + @internalUseArea.setter + def internalUseArea(self, obj): + self.internalUseArea = obj + + @property + def boardInfoArea(self): + return self._BoardInfoArea + + @boardInfoArea.setter + def boardInfoArea(self, obj): + self._BoardInfoArea = obj + + @property + def chassisInfoArea(self): + return self._ChassisInfoArea + + @chassisInfoArea.setter + def chassisInfoArea(self, obj): + self._ChassisInfoArea = obj + + @property + def multiRecordArea(self): + return self._multiRecordArea + + @multiRecordArea.setter + def multiRecordArea(self, obj): + self._multiRecordArea = obj + + @property + def bindata(self): + return self._bindata + + @bindata.setter + def bindata(self, obj): + self._bindata = obj + + @property + def bodybin(self): + return self._bodybin + + @bodybin.setter + def bodybin(self, obj): + self._bodybin = obj + + def recalcuteCommonHead(self): + self.bindata = "" + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + d_print("common Header %d" % self.offset) + d_print("fru eeprom size %d" % self._frusize) + if self.internalUseArea is not None and self.internalUseArea.isPresent: + self.internalUserAreaOffset = self.offset // 8 + self.offset += self.internalUseArea.size + d_print("internalUseArea is present offset:%d" % self.offset) + + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + self.chassicInfoAreaOffset = self.offset // 8 + self.offset += self.chassisInfoArea.size + d_print("chassisInfoArea is present offset:%d" % self.offset) + + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + self.boardInfoAreaOffset = self.offset // 8 + self.offset += self.boardInfoArea.size + d_print("boardInfoArea is present offset:%d" % self.offset) + d_print("boardInfoArea is present size:%d" % + self.boardInfoArea.size) + + if self.productInfoArea is not None and self.productInfoArea.isPresent: + self.productinfoAreaOffset = self.offset // 8 + self.offset += self.productInfoArea.size + d_print("productInfoArea is present offset:%d" % self.offset) + + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + self.multiRecordAreaOffset = self.offset // 8 + d_print("multiRecordArea is present offset:%d" % self.offset) + + if self.internalUserAreaOffset == self.INITVALUE: + self.internalUserAreaOffset = 0 + if self.productinfoAreaOffset == self.INITVALUE: + self.productinfoAreaOffset = 0 + if self.chassicInfoAreaOffset == self.INITVALUE: + self.chassicInfoAreaOffset = 0 + if self.boardInfoAreaOffset == self.INITVALUE: + self.boardInfoAreaOffset = 0 + if self.multiRecordAreaOffset == self.INITVALUE: + self.multiRecordAreaOffset = 0 + + self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset + - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff + d_print("zerochecksum:%x" % self.zeroCheckSum) + self.data = "" + self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr( + self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum) + + self.bindata = self.data + self.bodybin + totallen = len(self.bindata) + d_print("totallen %d" % totallen) + if totallen < self._frusize: + self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0])) + else: + raise FruException('bin data more than %d' % self._frusize, -2) + + def recalcutebin(self): + self.bodybin = "" + if self.internalUseArea is not None and self.internalUseArea.isPresent: + d_print("internalUseArea present") + self.bodybin += self.internalUseArea.data + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + d_print("chassisInfoArea present") + self.bodybin += self.chassisInfoArea.data + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + d_print("boardInfoArea present") + self.boardInfoArea.recalcute() + self.bodybin += self.boardInfoArea.data + if self.productInfoArea is not None and self.productInfoArea.isPresent: + d_print("productInfoAreapresent") + self.productInfoArea.recalcute() + self.bodybin += self.productInfoArea.data + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + d_print("multiRecordArea present") + self.bodybin += self.productInfoArea.data + + def recalcute(self, fru_eeprom_size=256): + self._frusize = fru_eeprom_size + self.recalcutebin() + self.recalcuteCommonHead() + + def setValue(self, area, field, value): + tmp_area = getattr(self, area, None) + if tmp_area is not None: + tmp_area.fruSetValue(field, value) diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf new file mode 100644 index 00000000000..60549859fca --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=i2c_ismt,i2c_i801,r8169,r8168,intel_spi_pci,sdhci_pci" +CONSOLE_PORT=0xf060 +CONSOLE_DEV=0 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/media_settings.json new file mode 100644 index 00000000000..865acd01a59 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/media_settings.json @@ -0,0 +1,2078 @@ +{ + "PORT_MEDIA_SETTINGS": { + "32": { + "Default": { + "pre1": { + "lane0": "0x00000000" + }, + "main": { + "lane0": "0x00000030" + }, + "post1": { + "lane0": "0x00000005" + } + } + }, + "33": { + "Default": { + "pre1": { + "lane0": "0x00000000" + }, + "main": { + "lane0": "0x00000034" + }, + "post1": { + "lane0": "0x00000008" + } + } + }, + "0": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "1": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x00000078", + "lane2": "0x0000008C", + "lane3": "0x00000088", + "lane4": "0x0000008C", + "lane5": "0x00000084", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "2": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "3": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000084", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "4": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "5": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000078", + "lane1": "0x00000078", + "lane2": "0x00000078", + "lane3": "0x00000078", + "lane4": "0x00000074", + "lane5": "0x00000078", + "lane6": "0x00000088", + "lane7": "0x0000007C" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "6": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x0000007C", + "lane1": "0x0000008C", + "lane2": "0x00000078", + "lane3": "0x00000074", + "lane4": "0x0000007C", + "lane5": "0x0000007C", + "lane6": "0x0000007C", + "lane7": "0x00000078" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "7": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "8": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000078", + "lane1": "0x00000078", + "lane2": "0x00000078", + "lane3": "0x00000078", + "lane4": "0x00000078", + "lane5": "0x00000074", + "lane6": "0x00000078", + "lane7": "0x00000078" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "9": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000078", + "lane1": "0x00000078", + "lane2": "0x00000078", + "lane3": "0x00000078", + "lane4": "0x00000078", + "lane5": "0x00000078", + "lane6": "0x00000078", + "lane7": "0x00000078" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "10": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x0000007C", + "lane2": "0x0000007C", + "lane3": "0x00000078", + "lane4": "0x00000078", + "lane5": "0x0000007C", + "lane6": "0x0000007C", + "lane7": "0x00000078" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "11": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000078", + "lane1": "0x00000078", + "lane2": "0x00000078", + "lane3": "0x00000078", + "lane4": "0x0000007C", + "lane5": "0x0000007C", + "lane6": "0x0000007C", + "lane7": "0x00000074" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "12": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff8", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x0000007C", + "lane2": "0x00000088", + "lane3": "0x0000007C", + "lane4": "0x00000078", + "lane5": "0x00000078", + "lane6": "0x00000080", + "lane7": "0x00000080" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff0", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "13": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000078", + "lane2": "0x00000080", + "lane3": "0x00000080", + "lane4": "0x0000007C", + "lane5": "0x00000074", + "lane6": "0x00000074", + "lane7": "0x0000007C" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "14": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "15": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000074", + "lane1": "0x00000078", + "lane2": "0x00000084", + "lane3": "0x00000080", + "lane4": "0x00000084", + "lane5": "0x00000078", + "lane6": "0x00000078", + "lane7": "0x00000084" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "16": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000078", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "17": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x0000007C", + "lane1": "0x00000078", + "lane2": "0x0000007C", + "lane3": "0x0000007C", + "lane4": "0x00000078", + "lane5": "0x00000074", + "lane6": "0x00000078", + "lane7": "0x00000078" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "18": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x0000007C", + "lane1": "0x00000080", + "lane2": "0x00000078", + "lane3": "0x0000007C", + "lane4": "0x0000007C", + "lane5": "0x00000078", + "lane6": "0x00000078", + "lane7": "0x00000078" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "19": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000080", + "lane2": "0x00000074", + "lane3": "0x00000084", + "lane4": "0x00000084", + "lane5": "0x00000078", + "lane6": "0x00000084", + "lane7": "0x00000084" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "20": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000080", + "lane2": "0x00000080", + "lane3": "0x00000074", + "lane4": "0x0000007C", + "lane5": "0x00000084", + "lane6": "0x00000084", + "lane7": "0x00000074" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "21": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000078", + "lane1": "0x00000078", + "lane2": "0x00000078", + "lane3": "0x00000074", + "lane4": "0x00000078", + "lane5": "0x00000078", + "lane6": "0x00000078", + "lane7": "0x00000074" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "22": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x0000007C", + "lane1": "0x00000074", + "lane2": "0x0000007C", + "lane3": "0x00000078", + "lane4": "0x0000007C", + "lane5": "0x00000078", + "lane6": "0x00000078", + "lane7": "0x00000078" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "23": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000078", + "lane1": "0x00000074", + "lane2": "0x0000007C", + "lane3": "0x00000078", + "lane4": "0x00000078", + "lane5": "0x00000074", + "lane6": "0x00000074", + "lane7": "0x00000078" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "24": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000078", + "lane1": "0x0000007C", + "lane2": "0x00000078", + "lane3": "0x00000074", + "lane4": "0x00000078", + "lane5": "0x00000074", + "lane6": "0x00000078", + "lane7": "0x00000078" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "25": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000078", + "lane1": "0x00000078", + "lane2": "0x00000078", + "lane3": "0x00000080", + "lane4": "0x00000078", + "lane5": "0x00000074", + "lane6": "0x0000007C", + "lane7": "0x00000078" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "26": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x0000007C", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000078", + "lane4": "0x00000074", + "lane5": "0x00000078", + "lane6": "0x00000088", + "lane7": "0x00000078" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "27": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x0000007C", + "lane3": "0x00000074", + "lane4": "0x00000084", + "lane5": "0x0000007C", + "lane6": "0x0000008C", + "lane7": "0x00000084" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "28": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff8", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff0", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "29": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "30": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x00000078", + "lane1": "0x00000074", + "lane2": "0x0000008C", + "lane3": "0x0000007C", + "lane4": "0x0000007C", + "lane5": "0x00000078", + "lane6": "0x00000090", + "lane7": "0x00000078" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "31": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000088", + "lane3": "0x00000084", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/monitor.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/monitor.py new file mode 100644 index 00000000000..37ed2168e61 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/monitor.py @@ -0,0 +1,457 @@ +#!/usr/bin/python3 +# * onboard temperature sensors +# * FAN trays +# * PSU +# +import os +import re +from lxml import etree as ET +import glob +import json +from decimal import Decimal +from fru import ipmifru +from cust_fru import CustFru + + +MAILBOX_DIR = "/sys/bus/i2c/devices/" +BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type" +BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow" + + +CONFIG_NAME = "dev.xml" + + +def byteTostr(val): + strtmp = '' + for value in val: + strtmp += chr(value) + return strtmp + + +def typeTostr(val): + if isinstance(val, bytes): + strtmp = byteTostr(val) + return strtmp + return val + + +def get_board_id(): + if not os.path.exists(BOARD_ID_PATH): + return "NA" + with open(BOARD_ID_PATH) as fd: + id_str = fd.read().strip() + return "0x%x" % (int(id_str, 10)) + + +def getboardairflow(): + if not os.path.exists(BOARD_AIRFLOW_PATH): + return "NA" + with open(BOARD_AIRFLOW_PATH) as fd: + airflow_str = fd.read().strip() + data = json.loads(airflow_str) + airflow = data.get("board", "NA") + return airflow + + +boardid = get_board_id() +boardairflow = getboardairflow() + + +DEV_XML_FILE_LIST = [ + "dev_" + boardid + "_" + boardairflow + ".xml", + "dev_" + boardid + ".xml", + "dev_" + boardairflow + ".xml", +] + + +def dev_file_read(path, offset, read_len): + retval = "ERR" + val_list = [] + msg = "" + ret = "" + fd = -1 + + if not os.path.exists(path): + return False, "%s %s not found" % (retval, path) + + try: + fd = os.open(path, os.O_RDONLY) + os.lseek(fd, offset, os.SEEK_SET) + ret = os.read(fd, read_len) + for item in ret: + val_list.append(item) + except Exception as e: + msg = str(e) + return False, "%s %s" % (retval, msg) + finally: + if fd > 0: + os.close(fd) + return True, val_list + + +def getPMCreg(location): + retval = 'ERR' + if not os.path.isfile(location): + return "%s %s notfound" % (retval, location) + try: + with open(location, 'r') as fd: + retval = fd.read() + except Exception as error: + return "ERR %s" % str(error) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +# Get a mailbox register +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = reg_name + filepath = glob.glob(mb_reg_file) + if len(filepath) == 0: + return "%s %s notfound" % (retval, mb_reg_file) + mb_reg_file = filepath[0] + if not os.path.isfile(mb_reg_file): + # print mb_reg_file, 'not found !' + return "%s %s notfound" % (retval, mb_reg_file) + try: + with open(mb_reg_file, 'rb') as fd: + retval = fd.read() + retval = typeTostr(retval) + except Exception as error: + retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error)) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +class checktype(): + def __init__(self, test1): + self.test1 = test1 + + @staticmethod + def getValue(location, bit, data_type, coefficient=1, addend=0): + try: + value_t = get_pmc_register(location) + if value_t.startswith("ERR") or value_t.startswith("NA"): + return value_t + if data_type == 1: + return float('%.1f' % ((float(value_t) / 1000) + addend)) + if data_type == 2: + return float('%.1f' % (float(value_t) / 100)) + if data_type == 3: + psu_status = int(value_t, 16) + return (psu_status & (1 << bit)) >> bit + if data_type == 4: + return int(value_t, 10) + if data_type == 5: + return float('%.1f' % (float(value_t) / 1000 / 1000)) + if data_type == 6: + return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000')) + return value_t + except Exception as e: + value_t = "ERR %s" % str(e) + return value_t + + # fanFRU + @staticmethod + def decodeBinByValue(retval): + fru = ipmifru() + fru.decodeBin(retval) + return fru + + @staticmethod + def getfruValue(prob_t, root, val): + try: + ret, binval_bytes = dev_file_read(val, 0, 256) + if ret is False: + return binval_bytes + binval = byteTostr(binval_bytes) + fanpro = {} + ret = checktype.decodeBinByValue(binval) + fanpro['fan_type'] = ret.productInfoArea.productName + fanpro['hw_version'] = ret.productInfoArea.productVersion + fanpro['sn'] = ret.productInfoArea.productSerialNumber + fan_display_name_dict = status.getDecodValue(root, "fan_display_name") + fan_name = fanpro['fan_type'].strip() + if len(fan_display_name_dict) == 0: + return fanpro + if fan_name not in fan_display_name_dict: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name) + else: + fanpro['fan_type'] = fan_display_name_dict[fan_name] + return fanpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getslotfruValue(val): + try: + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + slotpro = {} + ret = checktype.decodeBinByValue(binval) + slotpro['slot_type'] = ret.boardInfoArea.boardProductName + slotpro['hw_version'] = ret.boardInfoArea.boardextra1 + slotpro['sn'] = ret.boardInfoArea.boardSerialNumber + return slotpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getpsufruValue(prob_t, root, val): + try: + psu_match = False + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + psupro = {} + ret = checktype.decodeBinByValue(binval) + psupro['type1'] = ret.productInfoArea.productPartModelName + psupro['sn'] = ret.productInfoArea.productSerialNumber + psupro['hw_version'] = ret.productInfoArea.productVersion + psu_dict = status.getDecodValue(root, "psutype") + psupro['type1'] = psupro['type1'].strip() + if len(psu_dict) == 0: + return psupro + for psu_name, display_name in psu_dict.items(): + if psu_name.strip() == psupro['type1']: + psupro['type1'] = display_name + psu_match = True + break + if psu_match is not True: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1']) + return psupro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getpsucustfruValue(prob_t, root, val): + try: + psu_match = False + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + psupro = {} + custfru = CustFru() + custfru.decode(binval) + psupro['type1'] = custfru.product_name.strip() + psupro['sn'] = custfru.serial_number.strip().replace(chr(0), "") + psupro['hw_version'] = custfru.version.strip() + psu_dict = status.getDecodValue(root, "psutype") + psupro['type1'] = psupro['type1'].strip() + if len(psu_dict) == 0: + return psupro + for psu_name, display_name in psu_dict.items(): + if psu_name.strip() == psupro['type1']: + psupro['type1'] = display_name + psu_match = True + break + if psu_match is not True: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1']) + return psupro + except Exception as error: + return "ERR " + str(error) + + +class status(): + def __init__(self, productname): + self.productname = productname + + @staticmethod + def getETroot(filename): + tree = ET.parse(filename) + root = tree.getroot() + return root + + @staticmethod + def getDecodValue(collection, decode): + decodes = collection.find('decode') + testdecode = decodes.find(decode) + test = {} + if testdecode is None: + return test + for neighbor in testdecode.iter('code'): + test[neighbor.attrib["key"]] = neighbor.attrib["value"] + return test + + @staticmethod + def getfileValue(location): + return checktype.getValue(location, " ", " ") + + @staticmethod + def getETValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + prob_t = {} + prob_t.update(neighbor.attrib) + prob_t['errcode'] = 0 + prob_t['errmsg'] = '' + for pros in neighbor.iter("property"): + ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items())) + if ret.get('e2type') == 'fru' and ret.get("name") == "fru": + fruval = checktype.getfruValue(prob_t, root, ret["location"]) + if isinstance(fruval, str) and fruval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = fruval + break + prob_t.update(fruval) + continue + + if ret.get("name") == "psu" and ret.get('e2type') == 'fru': + psuval = checktype.getpsufruValue(prob_t, root, ret["location"]) + if isinstance(psuval, str) and psuval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = psuval + break + prob_t.update(psuval) + continue + + if ret.get("name") == "psu" and ret.get('e2type') == 'custfru': + psuval = checktype.getpsucustfruValue(prob_t, root, ret["location"]) + if isinstance(psuval, str) and psuval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = psuval + break + prob_t.update(psuval) + continue + + if ret.get("gettype") == "config": + prob_t[ret["name"]] = ret["value"] + continue + + if 'type' not in ret.keys(): + val = "0" + else: + val = ret["type"] + if 'bit' not in ret.keys(): + bit = "0" + else: + bit = ret["bit"] + if 'coefficient' not in ret.keys(): + coefficient = 1 + else: + coefficient = float(ret["coefficient"]) + if 'addend' not in ret.keys(): + addend = 0 + else: + addend = float(ret["addend"]) + + s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend) + if isinstance(s, str) and s.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = s + break + if 'default' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + prob_t['errmsg'] = rt[str(s)] + if str(s) != ret["default"]: + prob_t['errcode'] = -1 + break + else: + if 'decode' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt): + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % + (s.replace("\x00", "").rstrip())) + else: + s = rt[str(s).replace("\x00", "").rstrip()] + name = ret["name"] + prob_t[name] = str(s) + a.append(prob_t) + + @staticmethod + def getCPUValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + location = neighbor.attrib["location"] + + filepath = glob.glob(location) + if len(filepath) == 0: + return + location = filepath[0] + L = [] + for dirpath, dirnames, filenames in os.walk(location): + for file in filenames: + if file.endswith("_input"): + b = re.findall(r'temp(\d+)_input', file) + idx = int(b[0]) + L.append(idx) + L = sorted(L) + for idx in L: + prob_t = {} + prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, idx)) + prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, idx))) / 1000 + prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, idx))) / 1000 + prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, idx))) / 1000 + prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, idx))) / 1000 + a.append(prob_t) + + @staticmethod + def getFileName(): + fpath = os.path.dirname(os.path.realpath(__file__)) + for file in DEV_XML_FILE_LIST: + xml = fpath + "/" + file + if os.path.exists(xml): + return xml + return fpath + "/" + CONFIG_NAME + + @staticmethod + def checkFan(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "fan" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getTemp(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "temp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "psu" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getCustPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "custpsu" + status.getETValue(ret, _filename, _tagname) + + + @staticmethod + def getcputemp(ret): + _filename = status.getFileName() + _tagname = "cpus" + status.getCPUValue(ret, _filename, _tagname) + + @staticmethod + def getDcdc(ret): + _filename = status.getFileName() + _tagname = "dcdc" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmactemp(ret): + _filename = status.getFileName() + _tagname = "mactemp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmacpower(ret): + _filename = status.getFileName() + _tagname = "macpower" + status.getETValue(ret, _filename, _tagname) diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml new file mode 100644 index 00000000000..e419f403257 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml @@ -0,0 +1,159 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' +- bus: '00' + dev: '04' + fn: '0' + id: 19a1 + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' +- bus: '00' + dev: '05' + fn: '0' + id: 19a2 + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' +- bus: '00' + dev: '06' + fn: '0' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' +- bus: '00' + dev: 0b + fn: '0' + id: 19a6 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #2 (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 19a8 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #4 (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 19aa + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #6 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 19ac + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 19d0 + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' +- bus: '00' + dev: '17' + fn: '0' + id: 19d2 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #1 (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 19d3 + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 19db + name: 'SD Host controller: Intel Corporation Device 19db (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 19dc + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' +- bus: '00' + dev: 1f + fn: '1' + id: 19dd + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Primary + to Side Band (P2SB) Bridge (rev 11)' +- bus: '00' + dev: 1f + fn: '2' + id: 19de + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 19df + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 19e0 + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 19e2 + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: b980 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b980 (rev 11)' +- bus: '04' + dev: '00' + fn: '0' + id: '7011' + name: 'Memory controller: Xilinx Corporation Device 7011' +- bus: '07' + dev: '00' + fn: '0' + id: 15c6 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev + 11)' +- bus: '07' + dev: '00' + fn: '1' + id: 15c6 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev + 11)' diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform.json new file mode 100644 index 00000000000..3d426398748 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform.json @@ -0,0 +1,501 @@ +{ + "chassis": { + "name": "M2-W6920-32QC2X", + "thermal_manager": false, + "status_led": { + "controllable": false, + "colors": ["green", "blinking_green", "amber", "blinking_amber"] + }, + "components": [ + { + "name": "CPU_CPLD" + }, + { + "name": "MAC_CPLD" + }, + { + "name": "FAN_CPLD" + }, + { + "name": "BASE_CPLD" + }, + { + "name": "BIOS" + } + ], + "fans": [ + { + "name": "Fantray1_1", + "speed": { + "controllable": true, + "minimum": 40, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray2_1", + "speed": { + "controllable": true, + "minimum": 40, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 1, + "status_led": { + "controllable": false, + "colors": ["amber", "green", "off"] + }, + "fans": [ + { + "name": "FanTray1_1", + "speed": { + "controllable": true, + "minimum": 40, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 1, + "status_led": { + "controllable": false, + "colors": ["amber", "green", "off"] + }, + "fans": [ + { + "name": "FanTray2_1", + "speed": { + "controllable": true, + "minimum": 40, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + } + ], + "psus": [ + { + "name": "Psu1", + "voltage": false, + "current": false, + "power": false, + "max_power": false, + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "temperature": false, + "fans_target_speed": false, + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU1_FAN1", + "speed": { + "controllable": false, + "minimum": 40, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Psu2", + "voltage": false, + "current": false, + "power": false, + "max_power": false, + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "temperature": false, + "fans_target_speed": false, + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU2_FAN1", + "speed": { + "controllable": false, + "minimum": 40, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + } + ], + "thermals": [ + { + "name": "ASIC_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "CPU_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "INLET_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "OUTLET_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + } + ], + "modules": [], + "sfps": [] + }, + "interfaces": { + "Ethernet1": { + "index": "0,0,0,0,0,0,0,0", + "lanes": "1,2,3,4,5,6,7,8", + "breakout_modes": { + "1x400G": ["Eth1"], + "2x200G[100G]": ["Eth1/1", "Eth1/2"], + "4x100G": ["Eth1/1", "Eth1/2","Eth1/3", "Eth1/4"] + } + }, + "Ethernet9": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "9,10,11,12,13,14,15,16", + "breakout_modes": { + "1x400G": ["Eth2"], + "2x200G[100G]": ["Eth2/1", "Eth2/2"], + "4x100G": ["Eth2/1", "Eth2/2","Eth2/3", "Eth2/4"] + } + }, + "Ethernet17": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "17,18,19,20,21,22,23,24", + "breakout_modes": { + "1x400G": ["Eth3"], + "2x200G[100G]": ["Eth3/1", "Eth3/2"], + "4x100G": ["Eth3/1", "Eth3/2","Eth3/3", "Eth3/4"] + } + }, + "Ethernet25": { + "index": "3,3,3,3,3,3,3,3", + "lanes": "25,26,27,28,29,30,31,32", + "breakout_modes": { + "1x400G": ["Eth4"], + "2x200G[100G]": ["Eth4/1", "Eth4/2"], + "4x100G": ["Eth4/1", "Eth4/2","Eth4/3", "Eth4/4"] + } + }, + "Ethernet33": { + "index": "4,4,4,4,4,4,4,4", + "lanes": "33,34,35,36,37,38,39,40", + "breakout_modes": { + "1x400G": ["Eth5"], + "2x200G[100G]": ["Eth5/1", "Eth5/2"], + "4x100G": ["Eth5/1", "Eth5/2","Eth5/3", "Eth5/4"] + } + }, + "Ethernet41": { + "index": "5,5,5,5,5,5,5,5", + "lanes": "41,42,43,44,45,46,47,48", + "breakout_modes": { + "1x400G": ["Eth6"], + "2x200G[100G]": ["Eth6/1", "Eth6/2"], + "4x100G": ["Eth6/1", "Eth6/2","Eth6/3", "Eth6/4"] + } + }, + "Ethernet49": { + "index": "6,6,6,6,6,6,6,6", + "lanes": "49,50,51,52,53,54,55,56", + "breakout_modes": { + "1x400G": ["Eth7"], + "2x200G[100G]": ["Eth7/1", "Eth7/2"], + "4x100G": ["Eth7/1", "Eth7/2","Eth7/3", "Eth7/4"] + } + }, + "Ethernet57": { + "index": "7,7,7,7,7,7,7,7", + "lanes": "57,58,59,60,61,62,63,64", + "breakout_modes": { + "1x400G": ["Eth8"], + "2x200G[100G]": ["Eth8/1", "Eth8/2"], + "4x100G": ["Eth8/1", "Eth8/2","Eth8/3", "Eth8/4"] + } + }, + "Ethernet65": { + "index": "8,8,8,8,8,8,8,8", + "lanes": "65,66,67,68,69,70,71,72", + "breakout_modes": { + "1x400G": ["Eth9"], + "2x200G[100G]": ["Eth9/1", "Eth9/2"], + "4x100G": ["Eth9/1", "Eth9/2","Eth9/3", "Eth9/4"] + } + }, + "Ethernet73": { + "index": "9,9,9,9,9,9,9,9", + "lanes": "73,74,75,76,77,78,79,80", + "breakout_modes": { + "1x400G": ["Eth10"], + "2x200G[100G]": ["Eth10/1", "Eth10/2"], + "4x100G": ["Eth10/1", "Eth10/2","Eth10/3", "Eth10/4"] + } + }, + "Ethernet81": { + "index": "10,10,10,10,10,10,10,10", + "lanes": "81,82,83,84,85,86,87,88", + "breakout_modes": { + "1x400G": ["Eth11"], + "2x200G[100G]": ["Eth11/1", "Eth11/2"], + "4x100G": ["Eth11/1", "Eth11/2","Eth11/3", "Eth11/4"] + } + }, + "Ethernet89": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "89,90,91,92,93,94,95,96", + "breakout_modes": { + "1x400G": ["Eth12"], + "2x200G[100G]": ["Eth12/1", "Eth12/2"], + "4x100G": ["Eth12/1", "Eth12/2","Eth12/3", "Eth12/4"] + } + }, + "Ethernet97": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "97,98,99,100,101,102,103,104", + "breakout_modes": { + "1x400G": ["Eth13"], + "2x200G[100G]": ["Eth13/1", "Eth13/2"], + "4x100G": ["Eth13/1", "Eth13/2","Eth13/3", "Eth13/4"] + } + }, + "Ethernet105": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "105,106,107,108,109,110,111,112", + "breakout_modes": { + "1x400G": ["Eth14"], + "2x200G[100G]": ["Eth14/1", "Eth14/2"], + "4x100G": ["Eth14/1", "Eth14/2","Eth14/3", "Eth14/4"] + } + }, + "Ethernet113": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "113,114,115,116,117,118,119,120", + "breakout_modes": { + "1x400G": ["Eth15"], + "2x200G[100G]": ["Eth15/1", "Eth15/2"], + "4x100G": ["Eth15/1", "Eth15/2","Eth15/3", "Eth15/4"] + } + }, + "Ethernet121": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "121,122,123,124,125,126,127,128", + "breakout_modes": { + "1x400G": ["Eth16"], + "2x200G[100G]": ["Eth16/1", "Eth16/2"], + "4x100G": ["Eth16/1", "Eth16/2","Eth16/3", "Eth16/4"] + } + }, + "Ethernet129": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "129,130,131,132,133,134,135,136", + "breakout_modes": { + "1x400G": ["Eth17"], + "2x200G[100G]": ["Eth17/1", "Eth17/2"], + "4x100G": ["Eth17/1", "Eth17/2","Eth17/3", "Eth17/4"] + } + }, + "Ethernet137": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "137,138,139,140,141,142,143,144", + "breakout_modes": { + "1x400G": ["Eth18"], + "2x200G[100G]": ["Eth18/1", "Eth18/2"], + "4x100G": ["Eth18/1", "Eth18/2","Eth18/3", "Eth18/4"] + } + }, + "Ethernet145": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "145,146,147,148,149,150,151,152", + "breakout_modes": { + "1x400G": ["Eth19"], + "2x200G[100G]": ["Eth19/1", "Eth19/2"], + "4x100G": ["Eth19/1", "Eth19/2","Eth19/3", "Eth19/4"] + } + }, + "Ethernet153": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "153,154,155,156,157,158,159,160", + "breakout_modes": { + "1x400G": ["Eth20"], + "2x200G[100G]": ["Eth20/1", "Eth20/2"], + "4x100G": ["Eth20/1", "Eth20/2","Eth20/3", "Eth20/4"] + } + }, + "Ethernet161": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "161,162,163,164,165,166,167,168", + "breakout_modes": { + "1x400G": ["Eth21"], + "2x200G[100G]": ["Eth21/1", "Eth21/2"], + "4x100G": ["Eth21/1", "Eth21/2","Eth21/3", "Eth21/4"] + } + }, + "Ethernet169": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "169,170,171,172,173,174,175,176", + "breakout_modes": { + "1x400G": ["Eth22"], + "2x200G[100G]": ["Eth22/1", "Eth22/2"], + "4x100G": ["Eth22/1", "Eth22/2","Eth22/3", "Eth22/4"] + } + }, + "Ethernet177": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "177,178,179,180,181,182,183,184", + "breakout_modes": { + "1x400G": ["Eth23"], + "2x200G[100G]": ["Eth23/1", "Eth23/2"], + "4x100G": ["Eth23/1", "Eth23/2","Eth23/3", "Eth23/4"] + } + }, + "Ethernet185": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "185,186,187,188,189,190,191,192", + "breakout_modes": { + "1x400G": ["Eth24"], + "2x200G[100G]": ["Eth24/1", "Eth24/2"], + "4x100G": ["Eth24/1", "Eth24/2","Eth24/3", "Eth24/4"] + } + }, + "Ethernet193": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "193,194,195,196,197,198,199,200", + "breakout_modes": { + "1x400G": ["Eth25"], + "2x200G[100G]": ["Eth25/1", "Eth25/2"], + "4x100G": ["Eth25/1", "Eth25/2","Eth25/3", "Eth25/4"] + } + }, + "Ethernet201": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "201,202,203,204,205,206,207,208", + "breakout_modes": { + "1x400G": ["Eth26"], + "2x200G[100G]": ["Eth26/1", "Eth26/2"], + "4x100G": ["Eth26/1", "Eth26/2","Eth26/3", "Eth26/4"] + } + }, + "Ethernet209": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "209,210,211,212,213,214,215,216", + "breakout_modes": { + "1x400G": ["Eth27"], + "2x200G[100G]": ["Eth27/1", "Eth27/2"], + "4x100G": ["Eth27/1", "Eth27/2","Eth27/3", "Eth27/4"] + } + }, + "Ethernet217": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "217,218,219,220,221,222,223,224", + "breakout_modes": { + "1x400G": ["Eth28"], + "2x200G[100G]": ["Eth28/1", "Eth28/2"], + "4x100G": ["Eth28/1", "Eth28/2","Eth28/3", "Eth28/4"] + } + }, + "Ethernet225": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "225,226,227,228,229,230,231,232", + "breakout_modes": { + "1x400G": ["Eth29"], + "2x200G[100G]": ["Eth29/1", "Eth29/2"], + "4x100G": ["Eth29/1", "Eth29/2","Eth29/3", "Eth29/4"] + } + }, + "Ethernet233": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "233,234,235,236,237,238,239,240", + "breakout_modes": { + "1x400G": ["Eth30"], + "2x200G[100G]": ["Eth30/1", "Eth30/2"], + "4x100G": ["Eth30/1", "Eth30/2","Eth30/3", "Eth30/4"] + } + }, + "Ethernet241": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "241,242,243,244,245,246,247,248", + "breakout_modes": { + "1x400G": ["Eth31"], + "2x200G[100G]": ["Eth31/1", "Eth31/2"], + "4x100G": ["Eth31/1", "Eth31/2","Eth31/3", "Eth31/4"] + } + }, + "Ethernet249": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "249,250,251,252,253,254,255,256", + "breakout_modes": { + "1x400G": ["Eth32"], + "2x200G[100G]": ["Eth32/1", "Eth32/2"], + "4x100G": ["Eth32/1", "Eth32/2","Eth32/3", "Eth32/4"] + } + }, + "Ethernet257": { + "index": "32", + "lanes": "258", + "breakout_modes": { + "1x10G": ["Eth33"] + } + }, + "Ethernet258": { + "index": "33", + "lanes": "257", + "breakout_modes": { + "1x10G": ["Eth34"] + } + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_asic b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_asic new file mode 100644 index 00000000000..96046765276 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_components.json new file mode 100644 index 00000000000..eb08e2563de --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_components.json @@ -0,0 +1,16 @@ +{ + "chassis": { + "M2-W6920-32QC2X": { + "component": { + "CPU_CPLD": { }, + "CTRL_CPLD": { }, + "MAC_CPLDA": { }, + "MAC_CPLDB": { }, + "FAN_CPLD": { }, + "MAC_FPGA": { }, + "BIOS": { } + } + } + } +} + diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_env.conf new file mode 100644 index 00000000000..283e1c0ce71 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_env.conf @@ -0,0 +1 @@ +usemsi=1 diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/sfputil.py new file mode 100644 index 00000000000..60d7298a662 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/sfputil.py @@ -0,0 +1,313 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import subprocess + import re + import os + import threading + import traceback + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 33 + PORTS_IN_BLOCK = 34 + + EEPROM_OFFSET = 63 + SFP_DEVICE_TYPE = "optoe2" + QSFP_DEVICE_TYPE = "optoe1" + QSFPDD_DEVICE_TYPE = "optoe3" + I2C_MAX_ATTEMPT = 3 + + _port_to_eeprom_mapping = {} + port_to_i2cbus_mapping ={} + + sfp_ports_list = [] + qsfp_ports_list = [] + osfp_ports_list = [] + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return self.qsfp_ports_list + + @property + def osfp_ports(self): + return self.osfp_ports_list + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + self.sfp_ports_list = [] + self.qsfp_ports_list = [] + self.osfp_ports_list = [] + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET) + + self.port_to_i2cbus_mapping[0] = 65 + self.port_to_i2cbus_mapping[1] = 66 + self.port_to_i2cbus_mapping[2] = 63 + self.port_to_i2cbus_mapping[3] = 64 + self.port_to_i2cbus_mapping[28] = 93 + self.port_to_i2cbus_mapping[29] = 94 + self.port_to_i2cbus_mapping[30] = 91 + self.port_to_i2cbus_mapping[31] = 92 + self.port_to_i2cbus_mapping[32] = 96 + self.port_to_i2cbus_mapping[33] = 95 + + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + ret, sfp_type = self._get_sfp_type(x) + if (ret == True): + if sfp_type == "qsfp_dd": + self.osfp_ports_list.append(x) + elif sfp_type == "qsfp": + self.qsfp_ports_list.append(x) + elif sfp_type == "sfp": + self.sfp_ports_list.append(x) + SfpUtilBase.__init__(self) + + def _sfp_read_file_path(self, file_path, offset, num_bytes): + attempts = 0 + while attempts < self.I2C_MAX_ATTEMPT: + try: + file_path.seek(offset) + read_buf = file_path.read(num_bytes) + except: + attempts += 1 + time.sleep(0.05) + else: + return True, read_buf + return False, None + + def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset): + """Tries to read the eeprom file to determine if the + device/sfp is present or not. If sfp present, the read returns + valid bytes. If not, read returns error 'Connection timed out""" + + if not os.path.exists(sysfs_sfp_i2c_client_eeprompath): + return False + else: + with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile: + rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1) + return rv + + def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype): + try: + sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path + + # Write device address to new_device file + nd_file = open(sysfs_nd_path, "w") + nd_str = "%s %s" % (devtype, hex(devaddr)) + nd_file.write(nd_str) + nd_file.close() + + except Exception as err: + print("Error writing to new device file: %s" % str(err)) + return 1 + else: + return 0 + + def _get_port_eeprom_path(self, port_num, devid): + sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter" + + if port_num in self.port_to_eeprom_mapping.keys(): + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num] + else: + sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter" + + i2c_adapter_id = self._get_port_i2c_adapter_id(port_num) + if i2c_adapter_id is None: + print("Error getting i2c bus num") + return None + + # Get i2c virtual bus path for the sfp + sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path, + str(i2c_adapter_id)) + + # If i2c bus for port does not exist + if not os.path.exists(sysfs_sfp_i2c_adapter_path): + print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path) + return None + + sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path, + str(i2c_adapter_id), + hex(devid)[-2:]) + + # If sfp device is not present on bus, Add it + if not os.path.exists(sysfs_sfp_i2c_client_path): + if port_num in self.qsfp_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE) + elif port_num in self.osfp_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFPDD_DEVICE_TYPE) + else: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE) + if ret != 0: + print("Error adding sfp device") + return None + + sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path + + return sysfs_sfp_i2c_client_eeprom_path + + def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes) + if rv == False: + return None + + try: + for n in range(0, num_bytes): + if isinstance(raw[n], str): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + elif isinstance(raw[n], int): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + except Exception as e: + return None + + return eeprom_raw + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + cmd = "cat /sys/wb_plat/sff/sff{}/present".format(str(port_num+1)) + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + return False + if output == "1": + return True + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return True + + def get_transceiver_change_event(self): + return False, {} + + def _get_sfp_type(self, port_num): + try: + if self.get_presence(port_num) == False: + return False, None + + eeprom_path = self._get_port_eeprom_path(port_num, 0x50) + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1) + if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18'): + return True, "qsfp_dd" + elif (eeprom_raw[0] == '11' or eeprom_raw[0] == '0D'): + return True, "qsfp" + elif (eeprom_raw[0] == '03'): + return True, "sfp" + except Exception as e: + print(traceback.format_exc()) + + return False, None + + def twos_comp(self, num, bits): + try: + if ((num & (1 << (bits - 1))) != 0): + num = num - (1 << bits) + return num + except Exception: + return 0 + + def get_highest_temperature(self): + offset = 0 + hightest_temperature = -9999 + + presence_flag = False + read_eeprom_flag = False + temperature_valid_flag = False + + for port in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(port) == False: + continue + + presence_flag = True + + if port in self.osfp_ports: + offset = 14 + elif port in self.qsfp_ports: + offset = 22 + else: + offset = 96 + + eeprom_path = self._get_port_eeprom_path(port, 0x50) + try: + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + read_eeprom_flag = True + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2) + msb = int(eeprom_raw[0], 16) + lsb = int(eeprom_raw[1], 16) + + result = (msb << 8) | (lsb & 0xff) + result = self.twos_comp(result, 16) + result = float(result / 256.0) + if -50 <= result <= 200: + temperature_valid_flag = True + if hightest_temperature < result: + hightest_temperature = result + except Exception as e: + ##print(traceback.format_exc()) + pass + + # all port not presence + if presence_flag == False: + hightest_temperature = -10000 + + # all port read eeprom fail + elif read_eeprom_flag == False: + hightest_temperature = -9999 + + # all port temperature invalid + elif read_eeprom_flag == True and temperature_valid_flag == False: + hightest_temperature = -10000 + + hightest_temperature = round(hightest_temperature, 2) + + return hightest_temperature \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/ssd_util.py new file mode 100644 index 00000000000..e8cf2e1a7cb --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/ssd_util.py @@ -0,0 +1,318 @@ +# +# ssd_util.py +# +# Generic implementation of the SSD health API +# SSD models supported: +# - InnoDisk +# - StorFly +# - Virtium + +try: + import re + import os + import subprocess + from sonic_platform_base.sonic_storage.storage_base import StorageBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +SMARTCTL = "smartctl {} -a" +INNODISK = "iSmart -d {}" +VIRTIUM = "SmartCmd -m {}" +DISK_LIST_CMD = "fdisk -l -o Device" +DISK_FREE_CMD = "df -h" +MOUNT_CMD = "mount" + +NOT_AVAILABLE = "N/A" +PE_CYCLE = 3000 +FAIL_PERCENT = 95 + +# Set Vendor Specific IDs +INNODISK_HEALTH_ID = 169 +INNODISK_TEMPERATURE_ID = 194 + +class SsdUtil(StorageBase): + """ + Generic implementation of the SSD health API + """ + model = NOT_AVAILABLE + serial = NOT_AVAILABLE + firmware = NOT_AVAILABLE + temperature = NOT_AVAILABLE + health = NOT_AVAILABLE + remaining_life = NOT_AVAILABLE + sata_rate = NOT_AVAILABLE + ssd_info = NOT_AVAILABLE + vendor_ssd_info = NOT_AVAILABLE + + def __init__(self, diskdev): + self.vendor_ssd_utility = { + "Generic" : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info }, + "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "M.2" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "StorFly" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info }, + "Virtium" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info } + } + + """ + The dict model_attr keys relate the vendors + LITEON : "ER2-GD","AF2MA31DTDLT" + Intel : "SSDSCKKB" + SMI : "SM619GXC" + samsung: "MZNLH" + ADATA : "IM2S3134N" + """ + self.model_attr = { + "ER2-GD" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }, + "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }, + "SSDSCK" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" }, + "SM619GXC" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" }, + "MZNLH" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" }, + "IM2S3134N" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" }, + "MTFDDAV240TCB-1AR1ZABAA" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" } + } + + self.key_list = list(self.model_attr.keys()) + self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*" + self.dev = diskdev + # Generic part + self.fetch_generic_ssd_info(diskdev) + self.parse_generic_ssd_info() + self.fetch_vendor_ssd_info(diskdev, "Generic") + + # Known vendor part + if self.model: + model_short = self.model.split()[0] + if model_short in self.vendor_ssd_utility: + self.fetch_vendor_ssd_info(diskdev, model_short) + self.parse_vendor_ssd_info(model_short) + else: + # No handler registered for this disk model + pass + else: + # Failed to get disk model + self.model = "Unknown" + + def _execute_shell(self, cmd): + process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE) + output, error = process.communicate() + exit_code = process.returncode + if exit_code: + return None + return output + + def _parse_re(self, pattern, buffer): + res_list = re.findall(pattern, str(buffer)) + return res_list[0] if res_list else NOT_AVAILABLE + + def fetch_generic_ssd_info(self, diskdev): + self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev)) + + # Health and temperature values may be overwritten with vendor specific data + def parse_generic_ssd_info(self): + if "nvme" in self.dev: + self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info) + + health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info) + if health_raw == NOT_AVAILABLE: + self.health = NOT_AVAILABLE + else: + health_raw = health_raw.split()[-1] + self.health = 100 - float(health_raw.strip('%')) + + temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info) + if temp_raw == NOT_AVAILABLE: + self.temperature = NOT_AVAILABLE + else: + temp_raw = temp_raw.split()[-2] + self.temperature = float(temp_raw) + else: + self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info) + model_key = "" + for key in self.key_list: + if re.search(key, self.model): + model_key = key + break + if model_key != "": + self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2] + self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8] + self.health = self.remaining_life + # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE) + if model_key in ["ER2-GD", "AF2MA31DTDLT"]: + avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1]) + self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0)) + if self.remaining_life != NOT_AVAILABLE and int(self.remaining_life) < FAIL_PERCENT: + self.remaining_life = "Fail" + self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info) + self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info) + self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info) + + def parse_innodisk_info(self): + if self.vendor_ssd_info: + self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info) + self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info) + else: + if self.health == NOT_AVAILABLE: + health_raw = self.parse_id_number(INNODISK_HEALTH_ID) + self.health = health_raw.split()[-1] + if self.temperature == NOT_AVAILABLE: + temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID) + self.temperature = temp_raw.split()[-6] + + def parse_virtium_info(self): + if self.vendor_ssd_info: + self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + try: + self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance)) + except (ValueError, ZeroDivisionError): + # Invalid avg_erase_count or nand_endurance. + pass + + def fetch_vendor_ssd_info(self, diskdev, model): + self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev)) + + def parse_vendor_ssd_info(self, model): + self.vendor_ssd_utility[model]["parser"]() + + def check_readonly2(self, partition, filesystem): + # parse mount cmd output info + mount_info = self._execute_shell(MOUNT_CMD) + for line in mount_info.split('\n'): + column_list = line.split() + if line == '': + continue + if column_list[0] == partition and column_list[2] == filesystem: + if column_list[5].split(',')[0][1:] == "ro": + return partition + else: + return NOT_AVAILABLE + return NOT_AVAILABLE + + def check_readonly(self, partition, filesystem): + ret = os.access(filesystem, os.W_OK) + if ret == False: + return partition + else: + return NOT_AVAILABLE + + def get_health(self): + """ + Retrieves current disk health in percentages + + Returns: + A float number of current ssd health + e.g. 83.5 + """ + if self.health == 'N/A': + return "NA" + else: + return float(self.health) + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + if self.temperature == 'N/A': + return 'NA' + else: + return float(self.temperature) + + def get_model(self): + """ + Retrieves model for the given disk device + + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + def get_sata_rate(self): + """ + Retrieves SATA rate for the given disk device + Returns: + A string holding current SATA rate as provided by the manufacturer + """ + return self.sata_rate + def get_remaining_life(self): + """ + Retrieves remaining life for the given disk device + Returns: + A string holding disk remaining life as provided by the manufacturer + """ + return self.remaining_life + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + + Returns: + A string holding some vendor specific disk information + """ + return self.vendor_ssd_info + + def parse_id_number(self, id): + return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info) + + def get_readonly_partition(self): + """ + Check the partition mount filesystem is readonly status,then output the result. + Returns: + The readonly partition list + """ + + ro_partition_list = [] + partition_list = [] + + # parse fdisk cmd output info + disk_info = self._execute_shell(DISK_LIST_CMD) + begin_flag = False + for line in disk_info.split('\n'): + if line == "Device": + begin_flag = True + continue + if begin_flag: + if line != "": + partition_list.append(line) + else: + break + + # parse df cmd output info + disk_free = self._execute_shell(DISK_FREE_CMD) + disk_dict = {} + line_num = 0 + for line in disk_free.split('\n'): + line_num = line_num + 1 + if line_num == 1 or line == "": + continue + column_list = line.split() + disk_dict[column_list[0]] = column_list[5] + + # get partition which is readonly + for partition in partition_list: + if partition in disk_dict: + ret = self.check_readonly(partition, disk_dict[partition]) + if (ret != NOT_AVAILABLE): + ro_partition_list.append(ret) + + return ro_partition_list diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..94592fa8ceb --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/postinit_cmd_file.soc new file mode 100644 index 00000000000..fb86ee0a8e8 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/postinit_cmd_file.soc @@ -0,0 +1,5 @@ +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led auto on +led start +linkscan SwPortBitMap=cd,xe + diff --git a/platform/innovium/platform.conf b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/system_health_monitoring_config.json old mode 100755 new mode 100644 similarity index 100% rename from platform/innovium/platform.conf rename to device/micas/x86_64-micas_m2-w6920-32qc2x-r0/system_health_monitoring_config.json diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json new file mode 100644 index 00000000000..b958c147ecc --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json @@ -0,0 +1,197 @@ +{ + "interfaces": { + "Ethernet1": { + "default_brkout_mode": "1x400G" + }, + "Ethernet9": { + "default_brkout_mode": "1x400G" + }, + "Ethernet17": { + "default_brkout_mode": "1x400G" + }, + "Ethernet25": { + "default_brkout_mode": "1x400G" + }, + "Ethernet33": { + "default_brkout_mode": "1x400G" + }, + "Ethernet41": { + "default_brkout_mode": "1x400G" + }, + "Ethernet49": { + "default_brkout_mode": "1x400G" + }, + "Ethernet57": { + "default_brkout_mode": "1x400G" + }, + "Ethernet65": { + "default_brkout_mode": "1x400G" + }, + "Ethernet73": { + "default_brkout_mode": "1x400G" + }, + "Ethernet81": { + "default_brkout_mode": "1x400G" + }, + "Ethernet89": { + "default_brkout_mode": "1x400G" + }, + "Ethernet97": { + "default_brkout_mode": "1x400G" + }, + "Ethernet105": { + "default_brkout_mode": "1x400G" + }, + "Ethernet113": { + "default_brkout_mode": "1x400G" + }, + "Ethernet121": { + "default_brkout_mode": "1x400G" + }, + "Ethernet129": { + "default_brkout_mode": "1x400G" + }, + "Ethernet137": { + "default_brkout_mode": "1x400G" + }, + "Ethernet145": { + "default_brkout_mode": "1x400G" + }, + "Ethernet153": { + "default_brkout_mode": "1x400G" + }, + "Ethernet161": { + "default_brkout_mode": "1x400G" + }, + "Ethernet169": { + "default_brkout_mode": "1x400G" + }, + "Ethernet177": { + "default_brkout_mode": "1x400G" + }, + "Ethernet185": { + "default_brkout_mode": "1x400G" + }, + "Ethernet193": { + "default_brkout_mode": "1x400G" + }, + "Ethernet201": { + "default_brkout_mode": "1x400G" + }, + "Ethernet209": { + "default_brkout_mode": "1x400G" + }, + "Ethernet217": { + "default_brkout_mode": "1x400G" + }, + "Ethernet225": { + "default_brkout_mode": "1x400G" + }, + "Ethernet233": { + "default_brkout_mode": "1x400G" + }, + "Ethernet241": { + "default_brkout_mode": "1x400G" + }, + "Ethernet249": { + "default_brkout_mode": "1x400G" + }, + "Ethernet257": { + "default_brkout_mode": "1x400G" + }, + "Ethernet265": { + "default_brkout_mode": "1x400G" + }, + "Ethernet273": { + "default_brkout_mode": "1x400G" + }, + "Ethernet281": { + "default_brkout_mode": "1x400G" + }, + "Ethernet289": { + "default_brkout_mode": "1x400G" + }, + "Ethernet297": { + "default_brkout_mode": "1x400G" + }, + "Ethernet305": { + "default_brkout_mode": "1x400G" + }, + "Ethernet313": { + "default_brkout_mode": "1x400G" + }, + "Ethernet321": { + "default_brkout_mode": "1x400G" + }, + "Ethernet329": { + "default_brkout_mode": "1x400G" + }, + "Ethernet337": { + "default_brkout_mode": "1x400G" + }, + "Ethernet345": { + "default_brkout_mode": "1x400G" + }, + "Ethernet353": { + "default_brkout_mode": "1x400G" + }, + "Ethernet361": { + "default_brkout_mode": "1x400G" + }, + "Ethernet369": { + "default_brkout_mode": "1x400G" + }, + "Ethernet377": { + "default_brkout_mode": "1x400G" + }, + "Ethernet385": { + "default_brkout_mode": "1x400G" + }, + "Ethernet393": { + "default_brkout_mode": "1x400G" + }, + "Ethernet401": { + "default_brkout_mode": "1x400G" + }, + "Ethernet409": { + "default_brkout_mode": "1x400G" + }, + "Ethernet417": { + "default_brkout_mode": "1x400G" + }, + "Ethernet425": { + "default_brkout_mode": "1x400G" + }, + "Ethernet433": { + "default_brkout_mode": "1x400G" + }, + "Ethernet441": { + "default_brkout_mode": "1x400G" + }, + "Ethernet449": { + "default_brkout_mode": "1x400G" + }, + "Ethernet457": { + "default_brkout_mode": "1x400G" + }, + "Ethernet465": { + "default_brkout_mode": "1x400G" + }, + "Ethernet473": { + "default_brkout_mode": "1x400G" + }, + "Ethernet481": { + "default_brkout_mode": "1x400G" + }, + "Ethernet489": { + "default_brkout_mode": "1x400G" + }, + "Ethernet497": { + "default_brkout_mode": "1x400G" + }, + "Ethernet505": { + "default_brkout_mode": "1x400G" + } + } +} + diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini new file mode 100644 index 00000000000..d6bdd4bf54d --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias index speed +Ethernet1 65,66,67,68,69,70,71,72 fourHundredGigE0/1 0 400000 +Ethernet9 69,70,71,72,73,74,75,76 fourHundredGigE0/2 1 400000 +Ethernet17 25,26,27,28,29,30,31,32 fourHundredGigE0/3 2 400000 +Ethernet25 21,22,23,24,25,26,27,28 fourHundredGigE0/4 3 400000 +Ethernet33 73,74,75,76,77,78,79,80 fourHundredGigE0/5 4 400000 +Ethernet41 77,78,79,80,81,82,83,84 fourHundredGigE0/6 5 400000 +Ethernet49 33,34,35,36,37,38,39,40 fourHundredGigE0/7 6 400000 +Ethernet57 29,30,31,32,33,34,35,36 fourHundredGigE0/8 7 400000 +Ethernet65 81,82,83,84,85,86,87,88 fourHundredGigE0/9 8 400000 +Ethernet73 85,86,87,88,89,90,91,92 fourHundredGigE0/10 9 400000 +Ethernet81 41,42,43,44,45,46,47,48 fourHundredGigE0/11 10 400000 +Ethernet89 37,38,39,40,41,42,43,44 fourHundredGigE0/12 11 400000 +Ethernet97 89,90,91,92,93,94,95,96 fourHundredGigE0/13 12 400000 +Ethernet105 93,94,95,96,97,98,99,100 fourHundredGigE0/14 13 400000 +Ethernet113 49,50,51,52,53,54,55,56 fourHundredGigE0/15 14 400000 +Ethernet121 45,46,47,48,49,50,51,52 fourHundredGigE0/16 15 400000 +Ethernet129 97,98,99,100,101,102,103,104 fourHundredGigE0/17 16 400000 +Ethernet137 101,102,103,104,105,106,107,108 fourHundredGigE0/18 17 400000 +Ethernet145 57,58,59,60,61,62,63,64 fourHundredGigE0/19 18 400000 +Ethernet153 53,54,55,56,57,58,59,60 fourHundredGigE0/20 19 400000 +Ethernet161 105,106,107,108,109,110,111,112 fourHundredGigE0/21 20 400000 +Ethernet169 109,110,111,112,113,114,115,116 fourHundredGigE0/22 21 400000 +Ethernet177 17,18,19,20,21,22,23,24 fourHundredGigE0/23 22 400000 +Ethernet185 61,62,63,64,65,66,67,68 fourHundredGigE0/24 23 400000 +Ethernet193 113,114,115,116,117,118,119,120 fourHundredGigE0/25 24 400000 +Ethernet201 117,118,119,120,121,122,123,124 fourHundredGigE0/26 25 400000 +Ethernet209 9,10,11,12,13,14,15,16 fourHundredGigE0/27 26 400000 +Ethernet217 13,14,15,16,17,18,19,20 fourHundredGigE0/28 27 400000 +Ethernet225 121,122,123,124,125,126,127,128 fourHundredGigE0/29 28 400000 +Ethernet233 125,126,127,128,129,130,131,132 fourHundredGigE0/30 29 400000 +Ethernet241 1,2,3,4,5,6,7,8 fourHundredGigE0/31 30 400000 +Ethernet249 5,6,7,8,9,10,11,12 fourHundredGigE0/32 31 400000 +Ethernet257 133,134,135,136,137,138,139,140 fourHundredGigE0/33 32 400000 +Ethernet265 129,130,131,132,133,134,135,136 fourHundredGigE0/34 33 400000 +Ethernet273 249,250,251,252,253,254,255,256 fourHundredGigE0/35 34 400000 +Ethernet281 253,254,255,256,257,258,259,260 fourHundredGigE0/36 35 400000 +Ethernet289 141,142,143,144,145,146,147,148 fourHundredGigE0/37 36 400000 +Ethernet297 137,138,139,140,141,142,143,144 fourHundredGigE0/38 37 400000 +Ethernet305 241,242,243,244,245,246,247,248 fourHundredGigE0/39 38 400000 +Ethernet313 245,246,247,248,249,250,251,252 fourHundredGigE0/40 39 400000 +Ethernet321 149,150,151,152,153,154,155,156 fourHundredGigE0/41 40 400000 +Ethernet329 145,146,147,148,149,150,151,152 fourHundredGigE0/42 41 400000 +Ethernet337 237,238,239,240,241,242,243,244 fourHundredGigE0/43 42 400000 +Ethernet345 197,198,199,200,201,202,203,204 fourHundredGigE0/44 43 400000 +Ethernet353 157,158,159,160,161,162,163,164 fourHundredGigE0/45 44 400000 +Ethernet361 153,154,155,156,157,158,159,160 fourHundredGigE0/46 45 400000 +Ethernet369 193,194,195,196,197,198,199,200 fourHundredGigE0/47 46 400000 +Ethernet377 205,206,207,208,209,210,211,212 fourHundredGigE0/48 47 400000 +Ethernet385 165,166,167,168,169,170,171,172 fourHundredGigE0/49 48 400000 +Ethernet393 161,162,163,164,165,166,167,168 fourHundredGigE0/50 49 400000 +Ethernet401 201,202,203,204,205,206,207,208 fourHundredGigE0/51 50 400000 +Ethernet409 213,214,215,216,217,218,219,220 fourHundredGigE0/52 51 400000 +Ethernet417 173,174,175,176,177,178,179,180 fourHundredGigE0/53 52 400000 +Ethernet425 169,170,171,172,173,174,175,176 fourHundredGigE0/54 53 400000 +Ethernet433 209,210,211,212,213,214,215,216 fourHundredGigE0/55 54 400000 +Ethernet441 221,222,223,224,225,226,227,228 fourHundredGigE0/56 55 400000 +Ethernet449 181,182,183,184,185,186,187,188 fourHundredGigE0/57 56 400000 +Ethernet457 177,178,179,180,181,182,183,184 fourHundredGigE0/58 57 400000 +Ethernet465 217,218,219,220,221,222,223,224 fourHundredGigE0/59 58 400000 +Ethernet473 229,230,231,232,233,234,235,236 fourHundredGigE0/60 59 400000 +Ethernet481 189,190,191,192,193,194,195,196 fourHundredGigE0/61 60 400000 +Ethernet489 185,186,187,188,189,190,191,192 fourHundredGigE0/62 61 400000 +Ethernet497 225,226,227,228,229,230,231,232 fourHundredGigE0/63 62 400000 +Ethernet505 233,234,235,236,237,238,239,240 fourHundredGigE0/64 63 400000 diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/sai.profile b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/sai.profile new file mode 100644 index 00000000000..f5e660abcfd --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th4-m2-w6930-64qc-64x400G.config.yml \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml new file mode 100644 index 00000000000..d2b24e2cb1a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml @@ -0,0 +1,12951 @@ +--- +bcm_device: + 0: + global: + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 2048 + l3_alpm_template: 2 + l3_alpm2_bnk_threshold: 100 + svi_my_station_optimization: 1 + sai_nbr_bcast_ifp_optimized: 2 + uft_mode: 1 + l3_enable: 1 + l2_hitbit_enable: 0 + pktio_mode: 1 + warmboot_knet_shutdown_mode: 1 + sai_pfc_defaults_disable: 1 + sai_optimized_mmu: 1 + sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc + sai_port_pmap_phy_lanes: 1 +... + +--- +device: + 0: + FP_CONFIG: + #FP_ING_OPERMODE: PIPE_UNIQUE + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... + +--- +bcm_device: + 0: + port: + 68: + dport_map_port: 1 + 69: + dport_map_port: 2 + 70: + dport_map_port: 3 + 71: + dport_map_port: 4 + 72: + dport_map_port: 5 + 73: + dport_map_port: 6 + 74: + dport_map_port: 7 + 75: + dport_map_port: 8 + 25: + dport_map_port: 9 + 26: + dport_map_port: 10 + 27: + dport_map_port: 11 + 28: + dport_map_port: 12 + 21: + dport_map_port: 13 + 22: + dport_map_port: 14 + 23: + dport_map_port: 15 + 24: + dport_map_port: 16 + 76: + dport_map_port: 17 + 77: + dport_map_port: 18 + 78: + dport_map_port: 19 + 79: + dport_map_port: 20 + 80: + dport_map_port: 21 + 81: + dport_map_port: 22 + 82: + dport_map_port: 23 + 83: + dport_map_port: 24 + 34: + dport_map_port: 25 + 35: + dport_map_port: 26 + 36: + dport_map_port: 27 + 37: + dport_map_port: 28 + 29: + dport_map_port: 29 + 30: + dport_map_port: 30 + 31: + dport_map_port: 31 + 32: + dport_map_port: 32 + 85: + dport_map_port: 33 + 86: + dport_map_port: 34 + 87: + dport_map_port: 35 + 88: + dport_map_port: 36 + 89: + dport_map_port: 37 + 90: + dport_map_port: 38 + 91: + dport_map_port: 39 + 92: + dport_map_port: 40 + 42: + dport_map_port: 41 + 43: + dport_map_port: 42 + 44: + dport_map_port: 43 + 45: + dport_map_port: 44 + 38: + dport_map_port: 45 + 39: + dport_map_port: 46 + 40: + dport_map_port: 47 + 41: + dport_map_port: 48 + 93: + dport_map_port: 49 + 94: + dport_map_port: 50 + 95: + dport_map_port: 51 + 96: + dport_map_port: 52 + 97: + dport_map_port: 53 + 98: + dport_map_port: 54 + 99: + dport_map_port: 55 + 100: + dport_map_port: 56 + 51: + dport_map_port: 57 + 52: + dport_map_port: 58 + 53: + dport_map_port: 59 + 54: + dport_map_port: 60 + 46: + dport_map_port: 61 + 47: + dport_map_port: 62 + 48: + dport_map_port: 63 + 49: + dport_map_port: 64 + 102: + dport_map_port: 65 + 103: + dport_map_port: 66 + 104: + dport_map_port: 67 + 105: + dport_map_port: 68 + 106: + dport_map_port: 69 + 107: + dport_map_port: 70 + 108: + dport_map_port: 71 + 109: + dport_map_port: 72 + 59: + dport_map_port: 73 + 60: + dport_map_port: 74 + 61: + dport_map_port: 75 + 62: + dport_map_port: 76 + 55: + dport_map_port: 77 + 56: + dport_map_port: 78 + 57: + dport_map_port: 79 + 58: + dport_map_port: 80 + 110: + dport_map_port: 81 + 111: + dport_map_port: 82 + 112: + dport_map_port: 83 + 113: + dport_map_port: 84 + 114: + dport_map_port: 85 + 115: + dport_map_port: 86 + 116: + dport_map_port: 87 + 117: + dport_map_port: 88 + 17: + dport_map_port: 89 + 18: + dport_map_port: 90 + 19: + dport_map_port: 91 + 20: + dport_map_port: 92 + 63: + dport_map_port: 93 + 64: + dport_map_port: 94 + 65: + dport_map_port: 95 + 66: + dport_map_port: 96 + 119: + dport_map_port: 97 + 120: + dport_map_port: 98 + 121: + dport_map_port: 99 + 122: + dport_map_port: 100 + 123: + dport_map_port: 101 + 124: + dport_map_port: 102 + 125: + dport_map_port: 103 + 126: + dport_map_port: 104 + 9: + dport_map_port: 105 + 10: + dport_map_port: 106 + 11: + dport_map_port: 107 + 12: + dport_map_port: 108 + 13: + dport_map_port: 109 + 14: + dport_map_port: 110 + 15: + dport_map_port: 111 + 16: + dport_map_port: 112 + 127: + dport_map_port: 113 + 128: + dport_map_port: 114 + 129: + dport_map_port: 115 + 130: + dport_map_port: 116 + 131: + dport_map_port: 117 + 132: + dport_map_port: 118 + 133: + dport_map_port: 119 + 134: + dport_map_port: 120 + 1: + dport_map_port: 121 + 2: + dport_map_port: 122 + 3: + dport_map_port: 123 + 4: + dport_map_port: 124 + 5: + dport_map_port: 125 + 6: + dport_map_port: 126 + 7: + dport_map_port: 127 + 8: + dport_map_port: 128 + 140: + dport_map_port: 129 + 141: + dport_map_port: 130 + 142: + dport_map_port: 131 + 143: + dport_map_port: 132 + 136: + dport_map_port: 133 + 137: + dport_map_port: 134 + 138: + dport_map_port: 135 + 139: + dport_map_port: 136 + 263: + dport_map_port: 137 + 264: + dport_map_port: 138 + 265: + dport_map_port: 139 + 266: + dport_map_port: 140 + 267: + dport_map_port: 141 + 268: + dport_map_port: 142 + 269: + dport_map_port: 143 + 270: + dport_map_port: 144 + 148: + dport_map_port: 145 + 149: + dport_map_port: 146 + 150: + dport_map_port: 147 + 151: + dport_map_port: 148 + 144: + dport_map_port: 149 + 145: + dport_map_port: 150 + 146: + dport_map_port: 151 + 147: + dport_map_port: 152 + 255: + dport_map_port: 153 + 256: + dport_map_port: 154 + 257: + dport_map_port: 155 + 258: + dport_map_port: 156 + 259: + dport_map_port: 157 + 260: + dport_map_port: 158 + 261: + dport_map_port: 159 + 262: + dport_map_port: 160 + 157: + dport_map_port: 161 + 158: + dport_map_port: 162 + 159: + dport_map_port: 163 + 160: + dport_map_port: 164 + 153: + dport_map_port: 165 + 154: + dport_map_port: 166 + 155: + dport_map_port: 167 + 156: + dport_map_port: 168 + 250: + dport_map_port: 169 + 251: + dport_map_port: 170 + 252: + dport_map_port: 171 + 253: + dport_map_port: 172 + 208: + dport_map_port: 173 + 209: + dport_map_port: 174 + 210: + dport_map_port: 175 + 211: + dport_map_port: 176 + 165: + dport_map_port: 177 + 166: + dport_map_port: 178 + 167: + dport_map_port: 179 + 168: + dport_map_port: 180 + 161: + dport_map_port: 181 + 162: + dport_map_port: 182 + 163: + dport_map_port: 183 + 164: + dport_map_port: 184 + 204: + dport_map_port: 185 + 205: + dport_map_port: 186 + 206: + dport_map_port: 187 + 207: + dport_map_port: 188 + 216: + dport_map_port: 189 + 217: + dport_map_port: 190 + 218: + dport_map_port: 191 + 219: + dport_map_port: 192 + 174: + dport_map_port: 193 + 175: + dport_map_port: 194 + 176: + dport_map_port: 195 + 177: + dport_map_port: 196 + 170: + dport_map_port: 197 + 171: + dport_map_port: 198 + 172: + dport_map_port: 199 + 173: + dport_map_port: 200 + 212: + dport_map_port: 201 + 213: + dport_map_port: 202 + 214: + dport_map_port: 203 + 215: + dport_map_port: 204 + 225: + dport_map_port: 205 + 226: + dport_map_port: 206 + 227: + dport_map_port: 207 + 228: + dport_map_port: 208 + 182: + dport_map_port: 209 + 183: + dport_map_port: 210 + 184: + dport_map_port: 211 + 185: + dport_map_port: 212 + 178: + dport_map_port: 213 + 179: + dport_map_port: 214 + 180: + dport_map_port: 215 + 181: + dport_map_port: 216 + 221: + dport_map_port: 217 + 222: + dport_map_port: 218 + 223: + dport_map_port: 219 + 224: + dport_map_port: 220 + 233: + dport_map_port: 221 + 234: + dport_map_port: 222 + 235: + dport_map_port: 223 + 236: + dport_map_port: 224 + 191: + dport_map_port: 225 + 192: + dport_map_port: 226 + 193: + dport_map_port: 227 + 194: + dport_map_port: 228 + 187: + dport_map_port: 229 + 188: + dport_map_port: 230 + 189: + dport_map_port: 231 + 190: + dport_map_port: 232 + 229: + dport_map_port: 233 + 230: + dport_map_port: 234 + 231: + dport_map_port: 235 + 232: + dport_map_port: 236 + 242: + dport_map_port: 237 + 243: + dport_map_port: 238 + 244: + dport_map_port: 239 + 245: + dport_map_port: 240 + 199: + dport_map_port: 241 + 200: + dport_map_port: 242 + 201: + dport_map_port: 243 + 202: + dport_map_port: 244 + 195: + dport_map_port: 245 + 196: + dport_map_port: 246 + 197: + dport_map_port: 247 + 198: + dport_map_port: 248 + 238: + dport_map_port: 249 + 239: + dport_map_port: 250 + 240: + dport_map_port: 251 + 241: + dport_map_port: 252 + 246: + dport_map_port: 253 + 247: + dport_map_port: 254 + 248: + dport_map_port: 255 + 249: + dport_map_port: 256 +... + +--- +device: + 0: + PORT_CONFIG: + PORT_SYSTEM_PROFILE_OPERMODE_PIPEUNIQUE: 1 + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65214703 + TX_POLARITY_FLIP: 0x33 + RX_LANE_MAP: 0x02463175 + RX_POLARITY_FLIP: 0xc8 + + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13472065 + TX_POLARITY_FLIP: 0x4c + RX_LANE_MAP: 0x13572064 + RX_POLARITY_FLIP: 0xc8 + + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65214703 + TX_POLARITY_FLIP: 0x33 + RX_LANE_MAP: 0x02463175 + RX_POLARITY_FLIP: 0xc8 + + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57036421 + TX_POLARITY_FLIP: 0x4c + RX_LANE_MAP: 0x20641357 + RX_POLARITY_FLIP: 0x37 + + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16524307 + TX_POLARITY_FLIP: 0x1b + RX_LANE_MAP: 0x03425617 + RX_POLARITY_FLIP: 0x62 + + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12437560 + TX_POLARITY_FLIP: 0x32 + RX_LANE_MAP: 0x05243617 + RX_POLARITY_FLIP: 0x37 + + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56204731 + TX_POLARITY_FLIP: 0xaa + RX_LANE_MAP: 0x31642075 + RX_POLARITY_FLIP: 0x26 + + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23740165 + TX_POLARITY_FLIP: 0xb3 + RX_LANE_MAP: 0x46135702 + RX_POLARITY_FLIP: 0x26 + + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56204731 + TX_POLARITY_FLIP: 0xbb + RX_LANE_MAP: 0x31642075 + RX_POLARITY_FLIP: 0xae + + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23740165 + TX_POLARITY_FLIP: 0xae + RX_LANE_MAP: 0x26135704 + RX_POLARITY_FLIP: 0xbf + + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56204731 + TX_POLARITY_FLIP: 0x33 + RX_LANE_MAP: 0x31624075 + RX_POLARITY_FLIP: 0xbf + + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23740165 + TX_POLARITY_FLIP: 0xa2 + RX_LANE_MAP: 0x46135702 + RX_POLARITY_FLIP: 0xae + + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56204731 + TX_POLARITY_FLIP: 0xaa + RX_LANE_MAP: 0x31652074 + RX_POLARITY_FLIP: 0x26 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23740165 + TX_POLARITY_FLIP: 0xb3 + RX_LANE_MAP: 0x56234701 + RX_POLARITY_FLIP: 0x26 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54260137 + TX_POLARITY_FLIP: 0x40 + RX_LANE_MAP: 0x56234701 + RX_POLARITY_FLIP: 0x8e + + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23740165 + TX_POLARITY_FLIP: 0x8f + RX_LANE_MAP: 0x43265107 + RX_POLARITY_FLIP: 0x40 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x50742361 + TX_POLARITY_FLIP: 0xbb + RX_LANE_MAP: 0x43207651 + RX_POLARITY_FLIP: 0x1b + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76241530 + TX_POLARITY_FLIP: 0x8e + RX_LANE_MAP: 0x21364075 + RX_POLARITY_FLIP: 0xb + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x50742361 + TX_POLARITY_FLIP: 0x6a + RX_LANE_MAP: 0x62317540 + RX_POLARITY_FLIP: 0xf9 + + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76241530 + TX_POLARITY_FLIP: 0xa2 + RX_LANE_MAP: 0x53471026 + RX_POLARITY_FLIP: 0xf3 + + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x50742361 + TX_POLARITY_FLIP: 0xfa + RX_LANE_MAP: 0x43206751 + RX_POLARITY_FLIP: 0x7b + + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76241530 + TX_POLARITY_FLIP: 0x9a + RX_LANE_MAP: 0x12364075 + RX_POLARITY_FLIP: 0x12 + + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x50742361 + TX_POLARITY_FLIP: 0xbb + RX_LANE_MAP: 0x62317540 + RX_POLARITY_FLIP: 0x9f + + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76241530 + TX_POLARITY_FLIP: 0x2b + RX_LANE_MAP: 0x53471026 + RX_POLARITY_FLIP: 0xb1 + + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x27045361 + TX_POLARITY_FLIP: 0xa + RX_LANE_MAP: 0x43206751 + RX_POLARITY_FLIP: 0xf9 + + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76241530 + TX_POLARITY_FLIP: 0x87 + RX_LANE_MAP: 0x21564073 + RX_POLARITY_FLIP: 0xbb + + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x50742361 + TX_POLARITY_FLIP: 0xb2 + RX_LANE_MAP: 0x62317540 + RX_POLARITY_FLIP: 0xff + + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76142503 + TX_POLARITY_FLIP: 0xb1 + RX_LANE_MAP: 0x53472016 + RX_POLARITY_FLIP: 0x11 + + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63742051 + TX_POLARITY_FLIP: 0xd4 + RX_LANE_MAP: 0x70214653 + RX_POLARITY_FLIP: 0x99 + + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02536174 + TX_POLARITY_FLIP: 0x93 + RX_LANE_MAP: 0x54730612 + RX_POLARITY_FLIP: 0x4d + + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x27306415 + TX_POLARITY_FLIP: 0xd4 + RX_LANE_MAP: 0x61205347 + RX_POLARITY_FLIP: 0xc2 + + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02536174 + TX_POLARITY_FLIP: 0x93 + RX_LANE_MAP: 0x27014653 + RX_POLARITY_FLIP: 0xac + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46172530 + TX_POLARITY_FLIP: 0x17 + RX_LANE_MAP: 0x01265347 + RX_POLARITY_FLIP: 0x4d + + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63742051 + TX_POLARITY_FLIP: 0xd4 + RX_LANE_MAP: 0x16472035 + RX_POLARITY_FLIP: 0x66 + + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56172430 + TX_POLARITY_FLIP: 0x36 + RX_LANE_MAP: 0x23541706 + RX_POLARITY_FLIP: 0x6c + + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x27306415 + TX_POLARITY_FLIP: 0xd4 + RX_LANE_MAP: 0x07463521 + RX_POLARITY_FLIP: 0x39 + + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14760325 + TX_POLARITY_FLIP: 0x9e + RX_LANE_MAP: 0x47531620 + RX_POLARITY_FLIP: 0xab + + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x05217634 + TX_POLARITY_FLIP: 0xfa + RX_LANE_MAP: 0x25460137 + RX_POLARITY_FLIP: 0xde + + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x24563017 + TX_POLARITY_FLIP: 0xd3 + RX_LANE_MAP: 0x35217640 + RX_POLARITY_FLIP: 0x91 + + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x05217634 + TX_POLARITY_FLIP: 0xbb + RX_LANE_MAP: 0x04571326 + RX_POLARITY_FLIP: 0x9f + + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x21743065 + TX_POLARITY_FLIP: 0x33 + RX_LANE_MAP: 0x47532610 + RX_POLARITY_FLIP: 0x2b + + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x05217634 + TX_POLARITY_FLIP: 0x22 + RX_LANE_MAP: 0x25460137 + RX_POLARITY_FLIP: 0x56 + + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23714065 + TX_POLARITY_FLIP: 0x87 + RX_LANE_MAP: 0x35127640 + RX_POLARITY_FLIP: 0x33 + + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x05217634 + TX_POLARITY_FLIP: 0xfa + RX_LANE_MAP: 0x04571326 + RX_POLARITY_FLIP: 0xff + + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23714065 + TX_POLARITY_FLIP: 0x3f + RX_LANE_MAP: 0x47532610 + RX_POLARITY_FLIP: 0x33 + + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x05217634 + TX_POLARITY_FLIP: 0xf3 + RX_LANE_MAP: 0x25460137 + RX_POLARITY_FLIP: 0xb4 + + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23714065 + TX_POLARITY_FLIP: 0x8e + RX_LANE_MAP: 0x35217640 + RX_POLARITY_FLIP: 0x71 + + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x05217634 + TX_POLARITY_FLIP: 0x6a + RX_LANE_MAP: 0x03561427 + RX_POLARITY_FLIP: 0xf9 + + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13540267 + TX_POLARITY_FLIP: 0x2b + RX_LANE_MAP: 0x10753264 + RX_POLARITY_FLIP: 0x26 + + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14706235 + TX_POLARITY_FLIP: 0x62 + RX_LANE_MAP: 0x56234701 + RX_POLARITY_FLIP: 0x8f + + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13740265 + TX_POLARITY_FLIP: 0x33 + RX_LANE_MAP: 0x56234701 + RX_POLARITY_FLIP: 0x62 + + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56204731 + TX_POLARITY_FLIP: 0xab + RX_LANE_MAP: 0x31652074 + RX_POLARITY_FLIP: 0x26 + + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13740265 + TX_POLARITY_FLIP: 0x22 + RX_LANE_MAP: 0x46135702 + RX_POLARITY_FLIP: 0xae + + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76204531 + TX_POLARITY_FLIP: 0xb3 + RX_LANE_MAP: 0x31624075 + RX_POLARITY_FLIP: 0xbf + + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13740265 + TX_POLARITY_FLIP: 0xaa + RX_LANE_MAP: 0x26135704 + RX_POLARITY_FLIP: 0xbf + + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76204531 + TX_POLARITY_FLIP: 0xbf + RX_LANE_MAP: 0x31642075 + RX_POLARITY_FLIP: 0xae + + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13740265 + TX_POLARITY_FLIP: 0x33 + RX_LANE_MAP: 0x46135702 + RX_POLARITY_FLIP: 0x26 + + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76204531 + TX_POLARITY_FLIP: 0xae + RX_LANE_MAP: 0x31642075 + RX_POLARITY_FLIP: 0x26 + + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46237015 + TX_POLARITY_FLIP: 0xad + RX_LANE_MAP: 0x71634250 + RX_POLARITY_FLIP: 0x37 + + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20347561 + TX_POLARITY_FLIP: 0x27 + RX_LANE_MAP: 0x04625137 + RX_POLARITY_FLIP: 0x9d + + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56127430 + TX_POLARITY_FLIP: 0xcc + RX_LANE_MAP: 0x21650347 + RX_POLARITY_FLIP: 0x37 + + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64305712 + TX_POLARITY_FLIP: 0xb3 + RX_LANE_MAP: 0x03472165 + RX_POLARITY_FLIP: 0xc8 + + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12563074 + TX_POLARITY_FLIP: 0xcc + RX_LANE_MAP: 0x12563074 + RX_POLARITY_FLIP: 0xc8 + + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64305712 + TX_POLARITY_FLIP: 0xb3 + RX_LANE_MAP: 0x03472165 + RX_POLARITY_FLIP: 0xc8 + +... + +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 5 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 9 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 17 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 21 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 29 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 38 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 42 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 46 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 51 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 59 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 63 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 72 + : + PC_PHYS_PORT_ID: 69 + ? + PORT_ID: 76 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 80 + : + PC_PHYS_PORT_ID: 77 + ? + PORT_ID: 85 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 89 + : + PC_PHYS_PORT_ID: 85 + ? + PORT_ID: 93 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 97 + : + PC_PHYS_PORT_ID: 93 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 106 + : + PC_PHYS_PORT_ID: 101 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 114 + : + PC_PHYS_PORT_ID: 109 + ? + PORT_ID: 119 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 117 + ? + PORT_ID: 127 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 131 + : + PC_PHYS_PORT_ID: 125 + ? + PORT_ID: 136 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 140 + : + PC_PHYS_PORT_ID: 133 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 148 + : + PC_PHYS_PORT_ID: 141 + ? + PORT_ID: 153 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 157 + : + PC_PHYS_PORT_ID: 149 + ? + PORT_ID: 161 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 157 + ? + PORT_ID: 170 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 174 + : + PC_PHYS_PORT_ID: 165 + ? + PORT_ID: 178 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 182 + : + PC_PHYS_PORT_ID: 173 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 191 + : + PC_PHYS_PORT_ID: 181 + ? + PORT_ID: 195 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 189 + ? + PORT_ID: 204 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 208 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 216 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 225 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 229 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 233 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 238 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 246 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 250 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 259 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 263 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 253 +... + +--- +device: + 0: + PC_PORT: + ? + PORT_ID: [1, 5, 9, 13, + 17, 21, 25, 29, + 34, 38, 42, 46, + 51, 55, 59, 63, + 68, 72, 76, 80, + 85, 89, 93, 97, + 102, 106, 110, 114, + 119, 123, 127, 131, + 136, 140, 144, 148, + 153, 157, 161, 165, + 170, 174, 178, 182, + 187, 191, 195, 199, + 204, 208, 212, 216, + 221, 225, 229, 233, + 238, 242, 246, 250, + 255, 259, 263, 267] + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + LINK_TRAINING: 0 +... + +--- +device: + 0: + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 + +... + + +--- +device: + 0: + PC_TX_TAPS: + ? + PORT_ID: 68 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 68 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 68 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 68 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 68 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 68 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 68 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 68 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 72 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 72 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 72 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 72 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 72 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 72 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 72 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 72 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 25 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 25 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 25 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 25 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 25 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 25 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 25 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 25 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 21 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 21 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 21 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 21 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 21 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 21 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 21 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 21 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 76 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 76 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 76 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 76 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 76 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 76 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 76 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 76 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 80 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 80 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 80 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 80 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 80 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 80 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 80 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 80 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 34 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 34 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 34 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 34 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 34 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 10 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 34 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 10 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 34 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 34 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 10 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 29 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 29 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 29 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 29 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 29 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 10 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 29 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 10 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 29 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 10 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 29 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 85 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 85 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 85 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 85 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 85 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 85 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 85 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 85 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 89 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 89 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 89 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 89 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 89 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 89 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 89 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 89 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 42 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 42 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 42 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 42 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 42 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 42 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 42 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 42 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 38 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 38 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 38 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 38 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 38 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 38 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 38 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 38 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 93 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 93 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 93 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 93 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 93 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 93 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 93 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 93 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 97 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 97 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 97 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 97 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 97 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 97 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 97 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 97 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 51 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 51 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 51 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 51 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 51 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 51 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 51 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 51 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 46 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 46 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 46 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 46 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 46 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 46 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 46 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 46 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 102 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 102 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 102 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 102 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 102 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 102 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 102 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 102 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 106 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 106 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 14 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 106 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 106 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 106 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 106 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 106 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 106 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 59 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 59 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 2 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 59 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 2 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 59 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 59 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 59 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 59 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 59 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 55 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 55 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 55 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 55 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 55 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 55 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 55 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 55 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 110 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 110 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 110 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 110 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 110 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 110 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 110 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 110 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 114 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 114 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 114 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 114 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 114 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 114 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 114 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 114 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 17 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 17 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 17 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 17 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 17 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 17 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 17 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 17 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 63 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 63 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 63 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 63 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 63 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 63 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 63 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 63 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 119 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 119 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 119 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 119 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 119 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 119 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 119 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 119 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 123 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 123 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 123 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 123 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 123 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 123 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 123 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 123 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 9 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 9 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 9 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 9 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 9 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 9 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 9 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 20 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 9 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 13 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 13 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 6 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 13 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 13 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 13 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 13 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 13 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 13 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 127 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 127 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 127 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 127 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 127 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 127 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 127 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 127 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 131 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 131 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 131 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 131 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 131 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 131 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 131 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 131 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 1 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 1 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 1 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 1 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 1 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 1 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 1 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 1 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 5 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 5 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 5 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 5 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 5 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 20 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 5 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 5 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 5 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 140 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 140 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 140 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 140 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 140 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 140 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 140 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 140 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 136 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 136 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 136 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 136 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 136 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 136 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 136 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 136 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 263 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 263 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 263 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 263 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 263 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 263 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 263 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 263 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 267 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 267 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 267 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 267 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 267 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 267 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 267 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 267 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 148 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 148 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 148 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 148 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 148 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 148 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 148 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 148 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 144 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 144 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 144 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 144 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 144 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 144 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 144 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 144 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 255 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 6 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 255 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 255 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 6 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 255 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 10 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 255 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 255 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 255 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 255 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 10 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 259 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 259 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 259 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 259 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 259 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 259 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 259 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 259 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 134 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 157 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 157 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 157 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 157 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 157 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 157 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 157 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 157 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 153 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 153 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 153 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 153 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 153 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 153 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 153 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 153 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 250 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 250 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 250 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 250 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 250 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 250 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 132 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 250 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 2 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 250 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 208 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 208 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 208 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 208 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 208 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 208 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 208 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 208 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 165 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 165 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 165 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 165 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 165 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 165 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 165 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 165 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 161 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 161 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 161 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 161 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 161 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 161 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 161 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 161 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 204 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 204 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 204 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 204 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 204 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 0 + TX_POST_SIGN: 0 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 204 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 204 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 204 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 216 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 216 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 216 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 216 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 216 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 216 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 216 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 216 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 174 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 174 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 174 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 174 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 174 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 174 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 174 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 174 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 170 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 170 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 170 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 170 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 170 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 170 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 170 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 170 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 212 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 212 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 212 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 212 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 212 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 212 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 212 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 212 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 225 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 225 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 225 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 225 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 225 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 225 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 225 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 225 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 182 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 182 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 182 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 182 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 182 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 182 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 182 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 182 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 178 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 178 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 178 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 178 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 178 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 178 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 178 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 178 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 221 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 221 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 221 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 221 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 221 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 221 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 221 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 221 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 233 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 233 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 233 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 233 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 233 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 233 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 233 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 233 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 191 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 191 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 191 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 191 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 191 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 191 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 191 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 191 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 187 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 187 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 187 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 187 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 187 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 187 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 187 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 12 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 187 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 144 + TX_POST: 2 + TX_POST_SIGN: 1 + TX_POST2: 0 + TX_POST2_SIGN: 0 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 4 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 229 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 229 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 229 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 229 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 229 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 229 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 229 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 229 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 242 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 242 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 242 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 242 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 242 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 242 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 242 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 8 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 242 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 199 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 199 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 199 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 199 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 199 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 199 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 199 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 199 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 195 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 195 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 195 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 195 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 195 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 195 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 195 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 195 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 16 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 0 + TX_POST3_SIGN: 0 + TX_PRE: 8 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 238 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 238 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 238 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 238 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 12 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 238 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 238 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 238 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 238 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 246 + LANE_INDEX: [0] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 246 + LANE_INDEX: [1] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 246 + LANE_INDEX: [2] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 246 + LANE_INDEX: [3] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 140 + TX_POST: 4 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 246 + LANE_INDEX: [4] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 246 + LANE_INDEX: [5] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 + ? + PORT_ID: 246 + LANE_INDEX: [6] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 136 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 2 + ? + PORT_ID: 246 + LANE_INDEX: [7] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_POST_AUTO: 0 + TX_MAIN_AUTO: 0 + TX_PRE_AUTO: 0 + TX_PRE2_AUTO: 0 + TX_POST2_AUTO: 0 + TX_POST3_AUTO: 0 + TX_AMP_AUTO: 0 + TX_MAIN: 138 + TX_POST: 8 + TX_POST_SIGN: 1 + TX_POST2: 4 + TX_POST2_SIGN: 1 + TX_POST3: 4 + TX_POST3_SIGN: 1 + TX_PRE: 16 + TX_PRE_SIGN: 1 + TX_PRE2: 0 +... diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6930-64qc-r0/custom_led.bin new file mode 100644 index 00000000000..70920dd922c Binary files /dev/null and b/device/micas/x86_64-micas_m2-w6930-64qc-r0/custom_led.bin differ diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/default_sku b/device/micas/x86_64-micas_m2-w6930-64qc-r0/default_sku new file mode 100644 index 00000000000..1adddd2977c --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/default_sku @@ -0,0 +1 @@ +M2-W6930-64QC l2 diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/dev.xml b/device/micas/x86_64-micas_m2-w6930-64qc-r0/dev.xml new file mode 100644 index 00000000000..5b1654e2bb9 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/dev.xml @@ -0,0 +1,562 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/fru.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/fru.py new file mode 100644 index 00000000000..f95164e0360 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/fru.py @@ -0,0 +1,961 @@ +#!/usr/bin/python3 +import collections +from datetime import datetime, timedelta +from bitarray import bitarray + + +__DEBUG__ = "N" + + +class FruException(Exception): + def __init__(self, message='fruerror', code=-100): + err = 'errcode: {0} message:{1}'.format(code, message) + Exception.__init__(self, err) + self.code = code + self.message = message + + +def e_print(err): + print("ERROR: " + err) + + +def d_print(debug_info): + if __DEBUG__ == "Y": + print(debug_info) + + +class FruUtil(): + @staticmethod + def decodeLength(value): + a = bitarray(8) + a.setall(True) + a[0:1] = 0 + a[1:2] = 0 + x = ord(a.tobytes()) + return x & ord(value) + + @staticmethod + def minToData(): + starttime = datetime(1996, 1, 1, 0, 0, 0) + endtime = datetime.now() + seconds = (endtime - starttime).total_seconds() + mins = seconds // 60 + m = int(round(mins)) + return m + + @staticmethod + def getTimeFormat(): + return datetime.now().strftime('%Y-%m-%d') + + @staticmethod + def getTypeLength(value): + if value is None or len(value) == 0: + return 0 + a = bitarray(8) + a.setall(False) + a[0:1] = 1 + a[1:2] = 1 + x = ord(a.tobytes()) + return x | len(value) + + @staticmethod + def checksum(b): + result = 0 + for item in b: + result += ord(item) + return (0x100 - (result & 0xff)) & 0xff + + +class BaseArea(object): + SUGGESTED_SIZE_COMMON_HEADER = 8 + SUGGESTED_SIZE_INTERNAL_USE_AREA = 72 + SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32 + SUGGESTED_SIZE_BOARD_INFO_AREA = 80 + SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80 + + INITVALUE = b'\x00' + resultvalue = INITVALUE * 256 + COMMON_HEAD_VERSION = b'\x01' + __childList = None + + def __init__(self, name="", size=0, offset=0): + self.__childList = [] + self._offset = offset + self.name = name + self._size = size + self._isPresent = False + self._data = b'\x00' * size + + @property + def childList(self): + return self.__childList + + @childList.setter + def childList(self, value): + self.__childList = value + + @property + def offset(self): + return self._offset + + @offset.setter + def offset(self, value): + self._offset = value + + @property + def size(self): + return self._size + + @size.setter + def size(self, value): + self._size = value + + @property + def data(self): + return self._data + + @data.setter + def data(self, value): + self._data = value + + @property + def isPresent(self): + return self._isPresent + + @isPresent.setter + def isPresent(self, value): + self._isPresent = value + + +class InternalUseArea(BaseArea): + pass + + +class ChassisInfoArea(BaseArea): + pass + + +class BoardInfoArea(BaseArea): + _boardTime = None + _fields = None + _mfg_date = None + areaversion = None + _boardversion = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "mfg_date : %s \n" \ + "boardManufacturer : %s \n" \ + "boardProductName : %s \n" \ + "boardSerialNumber : %s \n" \ + "boardPartNumber : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.boardversion), self.size, + self.language, self.getMfgRealData(), + self.boardManufacturer, self.boardProductName, + self.boardSerialNumber, self.boardPartNumber, + self.fruFileId) + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "boardextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["boardversion"] = ord(self.boardversion) + dic["boardlength"] = self.size + dic["boardlanguage"] = self.language + dic["boardmfg_date"] = self.getMfgRealData() + dic["boardManufacturer"] = self.boardManufacturer + dic["boardProductName"] = self.boardProductName + dic["boardSerialNumber"] = self.boardSerialNumber + dic["boardPartNumber"] = self.boardPartNumber + dic["boardfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] + index += 1 + d_print("decode length :%d class size:%d" % + ((ord(self.data[index]) * 8), self.size)) + index += 2 + + timetmp = self.data[index: index + 3] + self.mfg_date = ord(timetmp[0]) | ( + ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16) + d_print("decode getMfgRealData :%s" % self.getMfgRealData()) + index += 3 + + templen = FruUtil.decodeLength(self.data[index]) + self.boardManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardManufacturer:%s" % self.boardManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardProductName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardProductName:%s" % self.boardProductName) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardSerialNumber:%s" % self.boardSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardPartNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardPartNumber:%s" % self.boardPartNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if self.data[index] != chr(0xc1): + templen = FruUtil.decodeLength(self.data[index]) + tmpval = self.data[index + 1: index + templen + 1] + setattr(self, valtmp, tmpval) + index += templen + 1 + d_print("decode boardextra%d:%s" % (i, tmpval)) + else: + break + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("boardInfoArea version:%x" % ord(self.boardversion)) + d_print("boardInfoArea length:%d" % self.size) + d_print("boardInfoArea language:%x" % self.language) + self.mfg_date = FruUtil.minToData() + d_print("boardInfoArea mfg_date:%x" % self.mfg_date) + + self.data = chr(ord(self.boardversion)) + \ + chr(self.size // 8) + chr(self.language) + + self.data += chr(self.mfg_date & 0xFF) + self.data += chr((self.mfg_date >> 8) & 0xFF) + self.data += chr((self.mfg_date >> 16) & 0xFF) + + d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer) + typelength = FruUtil.getTypeLength(self.boardManufacturer) + self.data += chr(typelength) + self.data += self.boardManufacturer + + d_print("boardInfoArea boardProductName:%s" % self.boardProductName) + self.data += chr(FruUtil.getTypeLength(self.boardProductName)) + self.data += self.boardProductName + + d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber) + self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber)) + self.data += self.boardSerialNumber + + d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber) + self.data += chr(FruUtil.getTypeLength(self.boardPartNumber)) + self.data += self.boardPartNumber + + d_print("boardInfoArea fruFileId:%s" % self.fruFileId) + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + d_print("self data:%d" % len(self.data)) + d_print("self size:%d" % self.size) + d_print("adjust size:%d" % (self.size - len(self.data) - 1)) + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + + # checksum + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + def getMfgRealData(self): + starttime = datetime(1996, 1, 1, 0, 0, 0) + mactime = starttime + timedelta(minutes=self.mfg_date) + return mactime + + @property + def language(self): + self._language = 25 + return self._language + + @property + def mfg_date(self): + return self._mfg_date + + @mfg_date.setter + def mfg_date(self, val): + self._mfg_date = val + + @property + def boardversion(self): + self._boardversion = self.COMMON_HEAD_VERSION + return self._boardversion + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, val): + self._FRUFileID = val + + @property + def boardPartNumber(self): + return self._boardPartNumber + + @boardPartNumber.setter + def boardPartNumber(self, val): + self._boardPartNumber = val + + @property + def boardSerialNumber(self): + return self._boardSerialNumber + + @boardSerialNumber.setter + def boardSerialNumber(self, val): + self._boardSerialNumber = val + + @property + def boardProductName(self): + return self._boradProductName + + @boardProductName.setter + def boardProductName(self, val): + self._boradProductName = val + + @property + def boardManufacturer(self): + return self._boardManufacturer + + @boardManufacturer.setter + def boardManufacturer(self, val): + self._boardManufacturer = val + + @property + def boardTime(self): + return self._boardTime + + @boardTime.setter + def boardTime(self, val): + self._boardTime = val + + @property + def fields(self): + return self._fields + + @fields.setter + def fields(self, val): + self._fields = val + + +class ProductInfoArea(BaseArea): + _productManufacturer = None + _productAssetTag = None + _FRUFileID = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "productManufacturer : %s \n" \ + "productName : %s \n" \ + "productPartModelName: %s \n" \ + "productVersion : %s \n" \ + "productSerialNumber : %s \n" \ + "productAssetTag : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.areaversion), self.size, + self.language, self.productManufacturer, + self.productName, self.productPartModelName, + self.productVersion, self.productSerialNumber, + self.productAssetTag, self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "productextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["productversion"] = ord(self.areaversion) + dic["productlength"] = self.size + dic["productlanguage"] = self.language + dic["productManufacturer"] = self.productManufacturer + dic["productName"] = self.productName + dic["productPartModelName"] = self.productPartModelName + dic["productVersion"] = int(self.productVersion, 16) + dic["productSerialNumber"] = self.productSerialNumber + dic["productAssetTag"] = self.productAssetTag + dic["productfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] # 0 + index += 1 + d_print("decode length %d" % (ord(self.data[index]) * 8)) + d_print("class size %d" % self.size) + index += 2 + + templen = FruUtil.decodeLength(self.data[index]) + self.productManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productManufacturer:%s" % self.productManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.productName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productName:%s" % self.productName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productPartModelName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productPartModelName:%s" % self.productPartModelName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productVersion = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productVersion:%s" % self.productVersion) + + templen = FruUtil.decodeLength(self.data[index]) + self.productSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productSerialNumber:%s" % self.productSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.productAssetTag = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productAssetTag:%s" % self.productAssetTag) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if self.data[index] != chr(0xc1) and index < self.size - 1: + templen = FruUtil.decodeLength(self.data[index]) + if templen == 0: + break + tmpval = self.data[index + 1: index + templen + 1] + d_print("decode boardextra%d:%s" % (i, tmpval)) + setattr(self, valtmp, tmpval) + index += templen + 1 + else: + break + + @property + def productVersion(self): + return self._productVersion + + @productVersion.setter + def productVersion(self, name): + self._productVersion = name + + @property + def areaversion(self): + self._areaversion = self.COMMON_HEAD_VERSION + return self._areaversion + + @areaversion.setter + def areaversion(self, name): + self._areaversion = name + + @property + def language(self): + self._language = 25 + return self._language + + @property + def productManufacturer(self): + return self._productManufacturer + + @productManufacturer.setter + def productManufacturer(self, name): + self._productManufacturer = name + + @property + def productName(self): + return self._productName + + @productName.setter + def productName(self, name): + self._productName = name + + @property + def productPartModelName(self): + return self._productPartModelName + + @productPartModelName.setter + def productPartModelName(self, name): + self._productPartModelName = name + + @property + def productSerialNumber(self): + return self._productSerialNumber + + @productSerialNumber.setter + def productSerialNumber(self, name): + self._productSerialNumber = name + + @property + def productAssetTag(self): + return self._productAssetTag + + @productAssetTag.setter + def productAssetTag(self, name): + self._productAssetTag = name + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, name): + self._FRUFileID = name + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("product version:%x" % ord(self.areaversion)) + d_print("product length:%d" % self.size) + d_print("product language:%x" % self.language) + self.data = chr(ord(self.areaversion)) + \ + chr(self.size // 8) + chr(self.language) + + typelength = FruUtil.getTypeLength(self.productManufacturer) + self.data += chr(typelength) + self.data += self.productManufacturer + + self.data += chr(FruUtil.getTypeLength(self.productName)) + self.data += self.productName + + self.data += chr(FruUtil.getTypeLength(self.productPartModelName)) + self.data += self.productPartModelName + + self.data += chr(FruUtil.getTypeLength(self.productVersion)) + self.data += self.productVersion + + self.data += chr(FruUtil.getTypeLength(self.productSerialNumber)) + self.data += self.productSerialNumber + + self.data += chr(FruUtil.getTypeLength(self.productAssetTag)) + if self.productAssetTag is not None: + self.data += self.productAssetTag + + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea productextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + d_print("self.data:%d" % len(self.data)) + d_print("self.size:%d" % self.size) + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + +class MultiRecordArea(BaseArea): + pass + + +class Field(object): + + def __init__(self, fieldType="ASCII", fieldData=""): + self.fieldData = fieldData + self.fieldType = fieldType + + @property + def fieldType(self): + return self.fieldType + + @property + def fieldData(self): + return self.fieldData + + +class ipmifru(BaseArea): + _BoardInfoArea = None + _ProductInfoArea = None + _InternalUseArea = None + _ChassisInfoArea = None + _multiRecordArea = None + _productinfoAreaOffset = BaseArea.INITVALUE + _boardInfoAreaOffset = BaseArea.INITVALUE + _internalUserAreaOffset = BaseArea.INITVALUE + _chassicInfoAreaOffset = BaseArea.INITVALUE + _multiRecordAreaOffset = BaseArea.INITVALUE + _bindata = None + _bodybin = None + _version = BaseArea.COMMON_HEAD_VERSION + _zeroCheckSum = None + _frusize = 256 + + def __str__(self): + tmpstr = "" + if self.boardInfoArea.isPresent: + tmpstr += "\nboardinfoarea: \n" + tmpstr += self.boardInfoArea.__str__() + if self.productInfoArea.isPresent: + tmpstr += "\nproductinfoarea: \n" + tmpstr += self.productInfoArea.__str__() + return tmpstr + + def decodeBin(self, eeprom): + commonHead = eeprom[0:8] + d_print("decode version %x" % ord(commonHead[0])) + if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]): + raise FruException("HEAD VERSION error,not Fru format!", -10) + if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]): + strtemp = "check header checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(commonHead[0:7]), ord(commonHead[7])) + raise FruException(strtemp, -3) + if ord(commonHead[1]) != ord(self.INITVALUE): + d_print("Internal Use Area is present") + self.internalUseArea = InternalUseArea( + name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA) + self.internalUseArea.isPresent = True + self.internalUserAreaOffset = ord(commonHead[1]) + self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: ( + self.internalUserAreaOffset * 8 + self.internalUseArea.size)] + if ord(commonHead[2]) != ord(self.INITVALUE): + d_print("Chassis Info Area is present") + self.chassisInfoArea = ChassisInfoArea( + name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA) + self.chassisInfoArea.isPresent = True + self.chassicInfoAreaOffset = ord(commonHead[2]) + self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: ( + self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)] + if ord(commonHead[3]) != ord(self.INITVALUE): + self.boardInfoArea = BoardInfoArea( + name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA) + self.boardInfoArea.isPresent = True + self.boardInfoAreaOffset = ord(commonHead[3]) + self.boardInfoArea.size = ord( + eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8 + d_print("Board Info Area is present size:%d" % + (self.boardInfoArea.size)) + self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: ( + self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)] + if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]): + strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \ + (FruUtil.checksum( + self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.boardInfoArea.decodedata() + if ord(commonHead[4]) != ord(self.INITVALUE): + d_print("Product Info Area is present") + self.productInfoArea = ProductInfoArea( + name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA) + self.productInfoArea.isPresent = True + self.productinfoAreaOffset = ord(commonHead[4]) + d_print("length offset value: %02x" % + ord(eeprom[self.productinfoAreaOffset * 8 + 1])) + self.productInfoArea.size = ord( + eeprom[self.productinfoAreaOffset * 8 + 1]) * 8 + d_print("Product Info Area is present size:%d" % + (self.productInfoArea.size)) + + self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: ( + self.productinfoAreaOffset * 8 + self.productInfoArea.size)] + if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]): + strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.productInfoArea.decodedata() + if ord(commonHead[5]) != ord(self.INITVALUE): + self.multiRecordArea = MultiRecordArea( + name="MultiRecord record Area ") + d_print("MultiRecord record present") + self.multiRecordArea.isPresent = True + self.multiRecordAreaOffset = ord(commonHead[5]) + self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: ( + self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)] + + def initDefault(self): + self.version = self.COMMON_HEAD_VERSION + self.internalUserAreaOffset = self.INITVALUE + self.chassicInfoAreaOffset = self.INITVALUE + self.boardInfoAreaOffset = self.INITVALUE + self.productinfoAreaOffset = self.INITVALUE + self.multiRecordAreaOffset = self.INITVALUE + self.zeroCheckSum = self.INITVALUE + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + self.productInfoArea = None + self.internalUseArea = None + self.boardInfoArea = None + self.chassisInfoArea = None + self.multiRecordArea = None + # self.recalcute() + + @property + def version(self): + return self._version + + @version.setter + def version(self, name): + self._version = name + + @property + def internalUserAreaOffset(self): + return self._internalUserAreaOffset + + @internalUserAreaOffset.setter + def internalUserAreaOffset(self, obj): + self._internalUserAreaOffset = obj + + @property + def chassicInfoAreaOffset(self): + return self._chassicInfoAreaOffset + + @chassicInfoAreaOffset.setter + def chassicInfoAreaOffset(self, obj): + self._chassicInfoAreaOffset = obj + + @property + def productinfoAreaOffset(self): + return self._productinfoAreaOffset + + @productinfoAreaOffset.setter + def productinfoAreaOffset(self, obj): + self._productinfoAreaOffset = obj + + @property + def boardInfoAreaOffset(self): + return self._boardInfoAreaOffset + + @boardInfoAreaOffset.setter + def boardInfoAreaOffset(self, obj): + self._boardInfoAreaOffset = obj + + @property + def multiRecordAreaOffset(self): + return self._multiRecordAreaOffset + + @multiRecordAreaOffset.setter + def multiRecordAreaOffset(self, obj): + self._multiRecordAreaOffset = obj + + @property + def zeroCheckSum(self): + return self._zeroCheckSum + + @zeroCheckSum.setter + def zeroCheckSum(self, obj): + self._zeroCheckSum = obj + + @property + def productInfoArea(self): + return self._ProductInfoArea + + @productInfoArea.setter + def productInfoArea(self, obj): + self._ProductInfoArea = obj + + @property + def internalUseArea(self): + return self._InternalUseArea + + @internalUseArea.setter + def internalUseArea(self, obj): + self.internalUseArea = obj + + @property + def boardInfoArea(self): + return self._BoardInfoArea + + @boardInfoArea.setter + def boardInfoArea(self, obj): + self._BoardInfoArea = obj + + @property + def chassisInfoArea(self): + return self._ChassisInfoArea + + @chassisInfoArea.setter + def chassisInfoArea(self, obj): + self._ChassisInfoArea = obj + + @property + def multiRecordArea(self): + return self._multiRecordArea + + @multiRecordArea.setter + def multiRecordArea(self, obj): + self._multiRecordArea = obj + + @property + def bindata(self): + return self._bindata + + @bindata.setter + def bindata(self, obj): + self._bindata = obj + + @property + def bodybin(self): + return self._bodybin + + @bodybin.setter + def bodybin(self, obj): + self._bodybin = obj + + def recalcuteCommonHead(self): + self.bindata = "" + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + d_print("common Header %d" % self.offset) + d_print("fru eeprom size %d" % self._frusize) + if self.internalUseArea is not None and self.internalUseArea.isPresent: + self.internalUserAreaOffset = self.offset // 8 + self.offset += self.internalUseArea.size + d_print("internalUseArea is present offset:%d" % self.offset) + + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + self.chassicInfoAreaOffset = self.offset // 8 + self.offset += self.chassisInfoArea.size + d_print("chassisInfoArea is present offset:%d" % self.offset) + + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + self.boardInfoAreaOffset = self.offset // 8 + self.offset += self.boardInfoArea.size + d_print("boardInfoArea is present offset:%d" % self.offset) + d_print("boardInfoArea is present size:%d" % + self.boardInfoArea.size) + + if self.productInfoArea is not None and self.productInfoArea.isPresent: + self.productinfoAreaOffset = self.offset // 8 + self.offset += self.productInfoArea.size + d_print("productInfoArea is present offset:%d" % self.offset) + + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + self.multiRecordAreaOffset = self.offset // 8 + d_print("multiRecordArea is present offset:%d" % self.offset) + + if self.internalUserAreaOffset == self.INITVALUE: + self.internalUserAreaOffset = 0 + if self.productinfoAreaOffset == self.INITVALUE: + self.productinfoAreaOffset = 0 + if self.chassicInfoAreaOffset == self.INITVALUE: + self.chassicInfoAreaOffset = 0 + if self.boardInfoAreaOffset == self.INITVALUE: + self.boardInfoAreaOffset = 0 + if self.multiRecordAreaOffset == self.INITVALUE: + self.multiRecordAreaOffset = 0 + + self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset + - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff + d_print("zerochecksum:%x" % self.zeroCheckSum) + self.data = "" + self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr( + self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum) + + self.bindata = self.data + self.bodybin + totallen = len(self.bindata) + d_print("totallen %d" % totallen) + if totallen < self._frusize: + self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0])) + else: + raise FruException('bin data more than %d' % self._frusize, -2) + + def recalcutebin(self): + self.bodybin = "" + if self.internalUseArea is not None and self.internalUseArea.isPresent: + d_print("internalUseArea present") + self.bodybin += self.internalUseArea.data + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + d_print("chassisInfoArea present") + self.bodybin += self.chassisInfoArea.data + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + d_print("boardInfoArea present") + self.boardInfoArea.recalcute() + self.bodybin += self.boardInfoArea.data + if self.productInfoArea is not None and self.productInfoArea.isPresent: + d_print("productInfoAreapresent") + self.productInfoArea.recalcute() + self.bodybin += self.productInfoArea.data + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + d_print("multiRecordArea present") + self.bodybin += self.productInfoArea.data + + def recalcute(self, fru_eeprom_size=256): + self._frusize = fru_eeprom_size + self.recalcutebin() + self.recalcuteCommonHead() + + def setValue(self, area, field, value): + tmp_area = getattr(self, area, None) + if tmp_area is not None: + tmp_area.fruSetValue(field, value) diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf new file mode 100644 index 00000000000..7a9fec8cc99 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf @@ -0,0 +1,2 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll" \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/media_settings.json new file mode 100644 index 00000000000..ae086bd70d5 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/media_settings.json @@ -0,0 +1,4100 @@ +{ + "PORT_MEDIA_SETTINGS": { + "0": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "1": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffffc", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff4", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "2": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000000", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000084", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000084", + "lane5": "0x00000084", + "lane6": "0x00000084", + "lane7": "0x00000084" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff4", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "3": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x0000008C", + "lane2": "0x00000088", + "lane3": "0x0000008C", + "lane4": "0x00000084", + "lane5": "0x00000088", + "lane6": "0x00000084", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffff8", + "lane3": "0xfffffffc", + "lane4": "0xfffffff4", + "lane5": "0xfffffff8", + "lane6": "0xfffffff4", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "4": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff4", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "5": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "6": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000002", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff0", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x00000088", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x00000088", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffff8", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffff6", + "lane5": "0xfffffff6", + "lane6": "0xfffffff8", + "lane7": "0xfffffff6" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "7": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000002", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff4", + "lane2": "0xfffffff0", + "lane3": "0xfffffff4", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x0000008C", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff6", + "lane5": "0xfffffff6", + "lane6": "0xfffffff6", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "8": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff4", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "9": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff0", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "10": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000002", + "lane5": "0x00000000", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff4", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x00000088", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x00000088", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffff8", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "11": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000000", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x0000008C", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x0000008A", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "12": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff4", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff4", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "13": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "14": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000000", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffff8", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "15": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000000", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x0000008C", + "lane2": "0x0000008A", + "lane3": "0x0000008A", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "16": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "17": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffff2", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffff4", + "lane2": "0xfffffffe", + "lane3": "0xfffffffc", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "18": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000000", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff0", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffc", + "lane5": "0xfffffff8", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "19": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000002", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x0000008A", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "20": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "21": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "22": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000002", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x0000008C", + "lane7": "0x0000008A" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff8", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "23": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000002", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff0", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000084", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x0000008C", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "24": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "25": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "26": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000002", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff0", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xffffffec", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffff8", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffffc", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "27": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff4", + "lane2": "0xfffffff0", + "lane3": "0xfffffff4", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffffa", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "28": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "29": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "30": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000002", + "lane5": "0x00000000", + "lane6": "0x00000002", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff0", + "lane3": "0xfffffff4", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000084", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "31": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000002", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xffffffec", + "lane5": "0xfffffff0", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000084", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "32": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "33": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "34": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "35": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "36": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "37": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x00000090", + "lane1": "0x00000090", + "lane2": "0x00000090", + "lane3": "0x00000090", + "lane4": "0x00000090", + "lane5": "0x00000090", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "38": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x0000008A", + "lane1": "0x00000088", + "lane2": "0x0000008A", + "lane3": "0x00000088", + "lane4": "0x0000008A", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffff8", + "lane2": "0xfffffffa", + "lane3": "0xfffffff6", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff6" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "39": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff4", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000084", + "lane3": "0x00000084", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000086" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "40": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "41": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "42": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000000", + "lane5": "0x00000002", + "lane6": "0x00000000", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000088", + "lane4": "0x00000084", + "lane5": "0x00000084", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffe", + "lane7": "0xfffffffc" + } + } + }, + "43": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x00000088", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffff8", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "44": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "45": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "46": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0x00000000", + "lane5": "0xfffffffc", + "lane6": "0xfffffff8", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "47": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000000", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x00000088", + "lane4": "0x0000008A", + "lane5": "0x0000008A", + "lane6": "0x0000008A", + "lane7": "0x0000008A" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffff8", + "lane2": "0xfffffffc", + "lane3": "0xfffffff8", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "48": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "49": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "50": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000000", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff0", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x00000088", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x00000088", + "lane5": "0x0000008C", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffff8", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "51": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x0000008A", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008A", + "lane7": "0x0000008A" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "52": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000002", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "53": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000002", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x00000090", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffffc", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "54": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008A", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x00000088", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffff8", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "55": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008A", + "lane3": "0x0000008C", + "lane4": "0x00000088", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008A" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffff8", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "56": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "57": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000002", + "lane4": "0x00000000", + "lane5": "0x00000002", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff4", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x00000088", + "lane5": "0x0000008C", + "lane6": "0x00000090", + "lane7": "0x00000090" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff4", + "lane7": "0xfffffffe" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "58": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000000", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x00000088", + "lane3": "0x0000008C", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffff8", + "lane3": "0xfffffffc", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "59": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000000", + "lane2": "0x00000002", + "lane3": "0x00000000", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff4", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x0000008C", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffffc", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffff8", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "60": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "61": { + "Default": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008C", + "lane2": "0x0000008C", + "lane3": "0x0000008C", + "lane4": "0x0000008C", + "lane5": "0x0000008C", + "lane6": "0x0000008C", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "62": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff0", + "lane3": "0xfffffff4", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + }, + "63": { + "Default": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000000", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000002", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x0000008C", + "lane1": "0x0000008A", + "lane2": "0x00000088", + "lane3": "0x0000008C", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x0000008A" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffff8", + "lane3": "0xfffffffc", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + } + } + } + } +} \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/monitor.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/monitor.py new file mode 100644 index 00000000000..5fc287892e5 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/monitor.py @@ -0,0 +1,402 @@ +#!/usr/bin/python3 +# * onboard temperature sensors +# * FAN trays +# * PSU +# +import os +from lxml import etree as ET +import glob +import json +from decimal import Decimal +from fru import ipmifru + + +MAILBOX_DIR = "/sys/bus/i2c/devices/" +BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type" +BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow" + + +CONFIG_NAME = "dev.xml" + + +def byteTostr(val): + strtmp = '' + for value in val: + strtmp += chr(value) + return strtmp + + +def typeTostr(val): + if isinstance(val, bytes): + strtmp = byteTostr(val) + return strtmp + return val + + +def get_board_id(): + if not os.path.exists(BOARD_ID_PATH): + return "NA" + with open(BOARD_ID_PATH) as fd: + id_str = fd.read().strip() + return "0x%x" % (int(id_str, 10)) + + +def getboardairflow(): + if not os.path.exists(BOARD_AIRFLOW_PATH): + return "NA" + with open(BOARD_AIRFLOW_PATH) as fd: + airflow_str = fd.read().strip() + data = json.loads(airflow_str) + airflow = data.get("board", "NA") + return airflow + + +boardid = get_board_id() +boardairflow = getboardairflow() + + +DEV_XML_FILE_LIST = [ + "dev_" + boardid + "_" + boardairflow + ".xml", + "dev_" + boardid + ".xml", + "dev_" + boardairflow + ".xml", +] + + +def dev_file_read(path, offset, read_len): + retval = "ERR" + val_list = [] + msg = "" + ret = "" + fd = -1 + + if not os.path.exists(path): + return False, "%s %s not found" % (retval, path) + + try: + fd = os.open(path, os.O_RDONLY) + os.lseek(fd, offset, os.SEEK_SET) + ret = os.read(fd, read_len) + for item in ret: + val_list.append(item) + except Exception as e: + msg = str(e) + return False, "%s %s" % (retval, msg) + finally: + if fd > 0: + os.close(fd) + return True, val_list + + +def getPMCreg(location): + retval = 'ERR' + if not os.path.isfile(location): + return "%s %s notfound" % (retval, location) + try: + with open(location, 'r') as fd: + retval = fd.read() + except Exception as error: + return "ERR %s" % str(error) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +# Get a mailbox register +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = reg_name + filepath = glob.glob(mb_reg_file) + if len(filepath) == 0: + return "%s %s notfound" % (retval, mb_reg_file) + mb_reg_file = filepath[0] + if not os.path.isfile(mb_reg_file): + # print mb_reg_file, 'not found !' + return "%s %s notfound" % (retval, mb_reg_file) + try: + with open(mb_reg_file, 'rb') as fd: + retval = fd.read() + retval = typeTostr(retval) + except Exception as error: + retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error)) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +class checktype(): + def __init__(self, test1): + self.test1 = test1 + + @staticmethod + def getValue(location, bit, data_type, coefficient=1, addend=0): + try: + value_t = get_pmc_register(location) + if value_t.startswith("ERR") or value_t.startswith("NA"): + return value_t + if data_type == 1: + return float('%.1f' % ((float(value_t) / 1000) + addend)) + if data_type == 2: + return float('%.1f' % (float(value_t) / 100)) + if data_type == 3: + psu_status = int(value_t, 16) + return (psu_status & (1 << bit)) >> bit + if data_type == 4: + return int(value_t, 10) + if data_type == 5: + return float('%.1f' % (float(value_t) / 1000 / 1000)) + if data_type == 6: + return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000')) + return value_t + except Exception as e: + value_t = "ERR %s" % str(e) + return value_t + + # fanFRU + @staticmethod + def decodeBinByValue(retval): + fru = ipmifru() + fru.decodeBin(retval) + return fru + + @staticmethod + def getfruValue(prob_t, root, val): + try: + ret, binval_bytes = dev_file_read(val, 0, 256) + if ret is False: + return binval_bytes + binval = byteTostr(binval_bytes) + fanpro = {} + ret = checktype.decodeBinByValue(binval) + fanpro['fan_type'] = ret.productInfoArea.productName + fanpro['hw_version'] = ret.productInfoArea.productVersion + fanpro['sn'] = ret.productInfoArea.productSerialNumber + fan_display_name_dict = status.getDecodValue(root, "fan_display_name") + fan_name = fanpro['fan_type'].strip() + if len(fan_display_name_dict) == 0: + return fanpro + if fan_name not in fan_display_name_dict: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name) + else: + fanpro['fan_type'] = fan_display_name_dict[fan_name] + return fanpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getslotfruValue(val): + try: + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + slotpro = {} + ret = checktype.decodeBinByValue(binval) + slotpro['slot_type'] = ret.boardInfoArea.boardProductName + slotpro['hw_version'] = ret.boardInfoArea.boardextra1 + slotpro['sn'] = ret.boardInfoArea.boardSerialNumber + return slotpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getpsufruValue(prob_t, root, val): + try: + psu_match = False + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + psupro = {} + ret = checktype.decodeBinByValue(binval) + psupro['type1'] = ret.productInfoArea.productPartModelName + psupro['sn'] = ret.productInfoArea.productSerialNumber + psupro['hw_version'] = ret.productInfoArea.productVersion + psu_dict = status.getDecodValue(root, "psutype") + psupro['type1'] = psupro['type1'].strip() + if len(psu_dict) == 0: + return psupro + for psu_name, display_name in psu_dict.items(): + if psu_name.strip() == psupro['type1']: + psupro['type1'] = display_name + psu_match = True + break + if psu_match is not True: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1']) + return psupro + except Exception as error: + return "ERR " + str(error) + + +class status(): + def __init__(self, productname): + self.productname = productname + + @staticmethod + def getETroot(filename): + tree = ET.parse(filename) + root = tree.getroot() + return root + + @staticmethod + def getDecodValue(collection, decode): + decodes = collection.find('decode') + testdecode = decodes.find(decode) + test = {} + if testdecode is None: + return test + for neighbor in testdecode.iter('code'): + test[neighbor.attrib["key"]] = neighbor.attrib["value"] + return test + + @staticmethod + def getfileValue(location): + return checktype.getValue(location, " ", " ") + + @staticmethod + def getETValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + prob_t = {} + prob_t.update(neighbor.attrib) + prob_t['errcode'] = 0 + prob_t['errmsg'] = '' + for pros in neighbor.iter("property"): + ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items())) + if ret.get('e2type') == 'fru' and ret.get("name") == "fru": + fruval = checktype.getfruValue(prob_t, root, ret["location"]) + if isinstance(fruval, str) and fruval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = fruval + break + prob_t.update(fruval) + continue + + if ret.get("name") == "psu" and ret.get('e2type') == 'fru': + psuval = checktype.getpsufruValue(prob_t, root, ret["location"]) + if isinstance(psuval, str) and psuval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = psuval + break + prob_t.update(psuval) + continue + + if ret.get("gettype") == "config": + prob_t[ret["name"]] = ret["value"] + continue + + if 'type' not in ret.keys(): + val = "0" + else: + val = ret["type"] + if 'bit' not in ret.keys(): + bit = "0" + else: + bit = ret["bit"] + if 'coefficient' not in ret.keys(): + coefficient = 1 + else: + coefficient = float(ret["coefficient"]) + if 'addend' not in ret.keys(): + addend = 0 + else: + addend = float(ret["addend"]) + + s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend) + if isinstance(s, str) and s.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = s + break + if 'default' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + prob_t['errmsg'] = rt[str(s)] + if str(s) != ret["default"]: + prob_t['errcode'] = -1 + break + else: + if 'decode' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt): + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % + (s.replace("\x00", "").rstrip())) + else: + s = rt[str(s).replace("\x00", "").rstrip()] + name = ret["name"] + prob_t[name] = str(s) + a.append(prob_t) + + @staticmethod + def getCPUValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + location = neighbor.attrib["location"] + L = [] + for dirpath, dirnames, filenames in os.walk(location): + for file in filenames: + if file.endswith("input"): + L.append(os.path.join(dirpath, file)) + L = sorted(L, reverse=False) + for i in range(len(L)): + prob_t = {} + prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, i + 1)) + prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, i + 1))) / 1000 + prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, i + 1))) / 1000 + prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, i + 1))) / 1000 + prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, i + 1))) / 1000 + a.append(prob_t) + + @staticmethod + def getFileName(): + fpath = os.path.dirname(os.path.realpath(__file__)) + for file in DEV_XML_FILE_LIST: + xml = fpath + "/" + file + if os.path.exists(xml): + return xml + return fpath + "/" + CONFIG_NAME + + @staticmethod + def checkFan(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "fan" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getTemp(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "temp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "psu" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getcputemp(ret): + _filename = status.getFileName() + _tagname = "cpus" + status.getCPUValue(ret, _filename, _tagname) + + @staticmethod + def getDcdc(ret): + _filename = status.getFileName() + _tagname = "dcdc" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmactemp(ret): + _filename = status.getFileName() + _tagname = "mactemp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmacpower(ret): + _filename = status.getFileName() + _tagname = "macpower" + status.getETValue(ret, _filename, _tagname) diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6930-64qc-r0/pcie.yaml new file mode 100644 index 00000000000..1c3911a2cd6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/pcie.yaml @@ -0,0 +1,582 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 6f00 + name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2 + (rev 05)' +- bus: '00' + dev: '01' + fn: '0' + id: 6f02 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 1 (rev 05)' +- bus: '00' + dev: '01' + fn: '1' + id: 6f03 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 1 (rev 05)' +- bus: '00' + dev: '02' + fn: '0' + id: 6f04 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 2 (rev 05)' +- bus: '00' + dev: '02' + fn: '2' + id: 6f06 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 2 (rev 05)' +- bus: '00' + dev: '02' + fn: '3' + id: 6f07 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 2 (rev 05)' +- bus: '00' + dev: '03' + fn: '0' + id: 6f08 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 05)' +- bus: '00' + dev: '03' + fn: '1' + id: 6f09 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 05)' +- bus: '00' + dev: '03' + fn: '2' + id: 6f0a + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 05)' +- bus: '00' + dev: '03' + fn: '3' + id: 6f0b + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 05)' +- bus: '00' + dev: '04' + fn: '0' + id: 6f20 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Crystal Beach DMA Channel 0 (rev 05)' +- bus: '00' + dev: '04' + fn: '1' + id: 6f21 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Crystal Beach DMA Channel 1 (rev 05)' +- bus: '00' + dev: '04' + fn: '2' + id: 6f22 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Crystal Beach DMA Channel 2 (rev 05)' +- bus: '00' + dev: '04' + fn: '3' + id: 6f23 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Crystal Beach DMA Channel 3 (rev 05)' +- bus: '00' + dev: '04' + fn: '4' + id: 6f24 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Crystal Beach DMA Channel 4 (rev 05)' +- bus: '00' + dev: '04' + fn: '5' + id: 6f25 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Crystal Beach DMA Channel 5 (rev 05)' +- bus: '00' + dev: '04' + fn: '6' + id: 6f26 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Crystal Beach DMA Channel 6 (rev 05)' +- bus: '00' + dev: '04' + fn: '7' + id: 6f27 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Crystal Beach DMA Channel 7 (rev 05)' +- bus: '00' + dev: '05' + fn: '0' + id: 6f28 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Map/VTd_Misc/System Management (rev 05)' +- bus: '00' + dev: '05' + fn: '1' + id: 6f29 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Hot Plug (rev 05)' +- bus: '00' + dev: '05' + fn: '2' + id: 6f2a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO RAS/Control Status/Global Errors (rev 05)' +- bus: '00' + dev: '05' + fn: '4' + id: 6f2c + name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev + 05)' +- bus: '00' + dev: '05' + fn: '6' + id: 6f39 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IO Performance Monitoring (rev 05)' +- bus: '00' + dev: '06' + fn: '0' + id: 6f10 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Debug (rev 05)' +- bus: '00' + dev: '06' + fn: '1' + id: 6f11 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Debug (rev 05)' +- bus: '00' + dev: '06' + fn: '2' + id: 6f12 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Debug (rev 05)' +- bus: '00' + dev: '06' + fn: '3' + id: 6f13 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Debug (rev 05)' +- bus: '00' + dev: '06' + fn: '4' + id: 6f14 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Debug (rev 05)' +- bus: '00' + dev: '06' + fn: '5' + id: 6f15 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Debug (rev 05)' +- bus: '00' + dev: '06' + fn: '6' + id: 6f16 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Debug (rev 05)' +- bus: '00' + dev: '06' + fn: '7' + id: 6f17 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Debug (rev 05)' +- bus: '00' + dev: '07' + fn: '0' + id: 6f18 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Debug (rev 05)' +- bus: '00' + dev: '07' + fn: '1' + id: 6f19 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Debug (rev 05)' +- bus: '00' + dev: '07' + fn: '2' + id: 6f1a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Debug (rev 05)' +- bus: '00' + dev: '07' + fn: '3' + id: 6f1b + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Debug (rev 05)' +- bus: '00' + dev: '07' + fn: '4' + id: 6f1c + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Debug (rev 05)' +- bus: '00' + dev: '14' + fn: '0' + id: 8c31 + name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB + xHCI (rev 05)' +- bus: '00' + dev: '16' + fn: '0' + id: 8c3a + name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset + Family MEI Controller #1 (rev 04)' +- bus: '00' + dev: '16' + fn: '1' + id: 8c3b + name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset + Family MEI Controller #2 (rev 04)' +- bus: '00' + dev: 1d + fn: '0' + id: 8c26 + name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB + EHCI #1 (rev 05)' +- bus: '00' + dev: 1f + fn: '0' + id: 8c54 + name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard + SKU LPC Controller (rev 05)' +- bus: '00' + dev: 1f + fn: '2' + id: 8c02 + name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port + SATA Controller 1 [AHCI mode] (rev 05)' +- bus: '00' + dev: 1f + fn: '3' + id: 8c22 + name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller + (rev 05)' +- bus: '04' + dev: '00' + fn: '0' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' +- bus: '04' + dev: '00' + fn: '1' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' +- bus: '05' + dev: '00' + fn: '0' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' +- bus: '05' + dev: '00' + fn: '1' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' +- bus: '06' + dev: '00' + fn: '0' + id: b990 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM56990 Switch ASIC + (rev 11)' +- bus: '07' + dev: '00' + fn: '0' + id: '1537' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Backplane Connection + (rev 03)' +- bus: 08 + dev: '00' + fn: '0' + id: '7011' + name: 'Memory controller: Xilinx Corporation Device 7011' +- bus: ff + dev: 0b + fn: '0' + id: 6f81 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 05)' +- bus: ff + dev: 0b + fn: '1' + id: 6f36 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 05)' +- bus: ff + dev: 0b + fn: '2' + id: 6f37 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 05)' +- bus: ff + dev: 0b + fn: '3' + id: 6f76 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link Debug (rev 05)' +- bus: ff + dev: 0c + fn: '0' + id: 6fe0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 05)' +- bus: ff + dev: 0c + fn: '1' + id: 6fe1 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 05)' +- bus: ff + dev: 0c + fn: '2' + id: 6fe2 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 05)' +- bus: ff + dev: 0c + fn: '3' + id: 6fe3 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 05)' +- bus: ff + dev: 0f + fn: '0' + id: 6ff8 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 05)' +- bus: ff + dev: 0f + fn: '4' + id: 6ffc + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 05)' +- bus: ff + dev: 0f + fn: '5' + id: 6ffd + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 05)' +- bus: ff + dev: 0f + fn: '6' + id: 6ffe + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 05)' +- bus: ff + dev: '10' + fn: '0' + id: 6f1d + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R2PCIe Agent (rev 05)' +- bus: ff + dev: '10' + fn: '1' + id: 6f34 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R2PCIe Agent (rev 05)' +- bus: ff + dev: '10' + fn: '5' + id: 6f1e + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 05)' +- bus: ff + dev: '10' + fn: '6' + id: 6f7d + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 05)' +- bus: ff + dev: '10' + fn: '7' + id: 6f1f + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 05)' +- bus: ff + dev: '12' + fn: '0' + id: 6fa0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Home Agent 0 (rev 05)' +- bus: ff + dev: '12' + fn: '1' + id: 6f30 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Home Agent 0 (rev 05)' +- bus: ff + dev: '12' + fn: '2' + id: 6f70 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Home Agent 0 Debug (rev 05)' +- bus: ff + dev: '13' + fn: '0' + id: 6fa8 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Target Address/Thermal/RAS (rev 05)' +- bus: ff + dev: '13' + fn: '1' + id: 6f71 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Target Address/Thermal/RAS (rev 05)' +- bus: ff + dev: '13' + fn: '2' + id: 6faa + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 05)' +- bus: ff + dev: '13' + fn: '3' + id: 6fab + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 05)' +- bus: ff + dev: '13' + fn: '4' + id: 6fac + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 05)' +- bus: ff + dev: '13' + fn: '5' + id: 6fad + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 05)' +- bus: ff + dev: '13' + fn: '6' + id: 6fae + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Broadcast (rev 05)' +- bus: ff + dev: '13' + fn: '7' + id: 6faf + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Global Broadcast (rev 05)' +- bus: ff + dev: '14' + fn: '0' + id: 6fb0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 0 Thermal Control (rev 05)' +- bus: ff + dev: '14' + fn: '1' + id: 6fb1 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 1 Thermal Control (rev 05)' +- bus: ff + dev: '14' + fn: '2' + id: 6fb2 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 0 Error (rev 05)' +- bus: ff + dev: '14' + fn: '3' + id: 6fb3 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 1 Error (rev 05)' +- bus: ff + dev: '14' + fn: '4' + id: 6fbc + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 05)' +- bus: ff + dev: '14' + fn: '5' + id: 6fbd + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 05)' +- bus: ff + dev: '14' + fn: '6' + id: 6fbe + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 05)' +- bus: ff + dev: '14' + fn: '7' + id: 6fbf + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 05)' +- bus: ff + dev: '15' + fn: '0' + id: 6fb4 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 2 Thermal Control (rev 05)' +- bus: ff + dev: '15' + fn: '1' + id: 6fb5 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 3 Thermal Control (rev 05)' +- bus: ff + dev: '15' + fn: '2' + id: 6fb6 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 2 Error (rev 05)' +- bus: ff + dev: '15' + fn: '3' + id: 6fb7 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 3 Error (rev 05)' +- bus: ff + dev: 1e + fn: '0' + id: 6f98 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 05)' +- bus: ff + dev: 1e + fn: '1' + id: 6f99 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 05)' +- bus: ff + dev: 1e + fn: '2' + id: 6f9a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 05)' +- bus: ff + dev: 1e + fn: '3' + id: 6fc0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 05)' +- bus: ff + dev: 1e + fn: '4' + id: 6f9c + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 05)' +- bus: ff + dev: 1e + fn: '7' + id: 6f9f + name: 'System peripheral: Intel Corporation Device 6f9f (rev 05)' +- bus: ff + dev: 1f + fn: '0' + id: 6f88 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 05)' +- bus: ff + dev: 1f + fn: '2' + id: 6f8a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 05)' diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json new file mode 100644 index 00000000000..208b81383ec --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json @@ -0,0 +1,2036 @@ +{ + "chassis": { + "name": "M2-W6930-64QC", + "thermal_manager": false, + "status_led": { + "controllable": false, + "colors": [ + "green", + "blinking_green", + "amber", + "blinking_amber" + ] + }, + "components": [ + { + "name": "CPU_CPLD" + }, + { + "name": "CONNECT_CPLD" + }, + { + "name": "MAC_CPLDA" + }, + { + "name": "MAC_CPLDB" + }, + { + "name": "PORT_CPLDA" + }, + { + "name": "PORT_CPLDB" + }, + { + "name": "FAN_CPLDA" + }, + { + "name": "FAN_CPLDB" + }, + { + "name": "MAC_FPGA" + }, + { + "name": "PORT_FPGA" + }, + { + "name": "BIOS" + } + ], + "fans": [ + { + "name": "Fantray1_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray1_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray2_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray2_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray3_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray3_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray4_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray4_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray5_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray5_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray6_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray6_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray7_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray7_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray8_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray8_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + } + ], + "fan_drawers": [ + { + "name": "Fantray1", + "num_fans": 2, + "status_led": { + "controllable": false, + "colors": [ + "amber", + "green", + "off" + ] + }, + "fans": [ + { + "name": "Fantray1_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray1_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray2", + "num_fans": 2, + "status_led": { + "controllable": false, + "colors": [ + "amber", + "green", + "off" + ] + }, + "fans": [ + { + "name": "Fantray2_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray2_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray3", + "num_fans": 2, + "status_led": { + "controllable": false, + "colors": [ + "amber", + "green", + "off" + ] + }, + "fans": [ + { + "name": "Fantray3_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray3_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray4", + "num_fans": 2, + "status_led": { + "controllable": false, + "colors": [ + "amber", + "green", + "off" + ] + }, + "fans": [ + { + "name": "Fantray4_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray4_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray5", + "num_fans": 2, + "status_led": { + "controllable": false, + "colors": [ + "amber", + "green", + "off" + ] + }, + "fans": [ + { + "name": "Fantray5_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray5_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray6", + "num_fans": 2, + "status_led": { + "controllable": false, + "colors": [ + "amber", + "green", + "off" + ] + }, + "fans": [ + { + "name": "Fantray6_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray6_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray7", + "num_fans": 2, + "status_led": { + "controllable": false, + "colors": [ + "amber", + "green", + "off" + ] + }, + "fans": [ + { + "name": "Fantray7_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray7_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray8", + "num_fans": 2, + "status_led": { + "controllable": false, + "colors": [ + "amber", + "green", + "off" + ] + }, + "fans": [ + { + "name": "Fantray8_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray8_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + } + ], + "psus": [ + { + "name": "Psu1", + "voltage": true, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": true, + "voltage_low_threshold": true, + "temperature": true, + "fans_target_speed": true, + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU1_FAN1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Psu2", + "voltage": true, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": true, + "voltage_low_threshold": true, + "temperature": true, + "fans_target_speed": true, + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU2_FAN1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Psu3", + "voltage": true, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": true, + "voltage_low_threshold": true, + "temperature": true, + "fans_target_speed": true, + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU3_FAN1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Psu4", + "voltage": true, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": true, + "voltage_low_threshold": true, + "temperature": true, + "fans_target_speed": true, + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU4_FAN1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + } + ], + "thermals": [ + { + "name": "BOARD_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "CPU_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "INLET_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "OUTLET_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "ASIC_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "PSU1_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "PSU2_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "PSU3_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "PSU4_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + } + ], + "modules": [], + "sfps": [] + }, + "interfaces": { + "Ethernet1": { + "index": "0,0,0,0,0,0,0,0", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x400G": [ + "Eth1" + ], + "4x100G": [ + "Eth1/1", + "Eth1/2", + "Eth1/3", + "Eth1/4" + ], + "2x200G": [ + "Eth1/1", + "Eth1/2" + ] + } + }, + "Ethernet9": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x400G": [ + "Eth2" + ], + "4x100G": [ + "Eth2/1", + "Eth2/2", + "Eth2/3", + "Eth2/4" + ], + "2x200G": [ + "Eth2/1", + "Eth2/2" + ] + } + }, + "Ethernet17": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x400G": [ + "Eth3" + ], + "4x100G": [ + "Eth3/1", + "Eth3/2", + "Eth3/3", + "Eth3/4" + ], + "2x200G": [ + "Eth3/1", + "Eth3/2" + ] + } + }, + "Ethernet25": { + "index": "3,3,3,3,3,3,3,3", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x400G": [ + "Eth4" + ], + "4x100G": [ + "Eth4/1", + "Eth4/2", + "Eth4/3", + "Eth4/4" + ], + "2x200G": [ + "Eth4/1", + "Eth4/2" + ] + } + }, + "Ethernet33": { + "index": "4,4,4,4,4,4,4,4", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x400G": [ + "Eth5" + ], + "4x100G": [ + "Eth5/1", + "Eth5/2", + "Eth5/3", + "Eth5/4" + ], + "2x200G": [ + "Eth5/1", + "Eth5/2" + ] + } + }, + "Ethernet41": { + "index": "5,5,5,5,5,5,5,5", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x400G": [ + "Eth6" + ], + "4x100G": [ + "Eth6/1", + "Eth6/2", + "Eth6/3", + "Eth6/4" + ], + "2x200G": [ + "Eth6/1", + "Eth6/2" + ] + } + }, + "Ethernet49": { + "index": "6,6,6,6,6,6,6,6", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x400G": [ + "Eth7" + ], + "4x100G": [ + "Eth7/1", + "Eth7/2", + "Eth7/3", + "Eth7/4" + ], + "2x200G": [ + "Eth7/1", + "Eth7/2" + ] + } + }, + "Ethernet57": { + "index": "7,7,7,7,7,7,7,7", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x400G": [ + "Eth8" + ], + "4x100G": [ + "Eth8/1", + "Eth8/2", + "Eth8/3", + "Eth8/4" + ], + "2x200G": [ + "Eth8/1", + "Eth8/2" + ] + } + }, + "Ethernet65": { + "index": "8,8,8,8,8,8,8,8", + "lanes": "81,82,83,84", + "breakout_modes": { + "1x400G": [ + "Eth9" + ], + "4x100G": [ + "Eth9/1", + "Eth9/2", + "Eth9/3", + "Eth9/4" + ], + "2x200G": [ + "Eth9/1", + "Eth9/2" + ] + } + }, + "Ethernet73": { + "index": "9,9,9,9,9,9,9,9", + "lanes": "85,86,87,88", + "breakout_modes": { + "1x400G": [ + "Eth10" + ], + "4x100G": [ + "Eth10/1", + "Eth10/2", + "Eth10/3", + "Eth10/4" + ], + "2x200G": [ + "Eth10/1", + "Eth10/2" + ] + } + }, + "Ethernet81": { + "index": "10,10,10,10,10,10,10,10", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x400G": [ + "Eth11" + ], + "4x100G": [ + "Eth11/1", + "Eth11/2", + "Eth11/3", + "Eth11/4" + ], + "2x200G": [ + "Eth11/1", + "Eth11/2" + ] + } + }, + "Ethernet89": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x400G": [ + "Eth12" + ], + "4x100G": [ + "Eth12/1", + "Eth12/2", + "Eth12/3", + "Eth12/4" + ], + "2x200G": [ + "Eth12/1", + "Eth12/2" + ] + } + }, + "Ethernet97": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "89,90,91,92", + "breakout_modes": { + "1x400G": [ + "Eth13" + ], + "4x100G": [ + "Eth13/1", + "Eth13/2", + "Eth13/3", + "Eth13/4" + ], + "2x200G": [ + "Eth13/1", + "Eth13/2" + ] + } + }, + "Ethernet105": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "93,94,95,96", + "breakout_modes": { + "1x400G": [ + "Eth14" + ], + "4x100G": [ + "Eth14/1", + "Eth14/2", + "Eth14/3", + "Eth14/4" + ], + "2x200G": [ + "Eth14/1", + "Eth14/2" + ] + } + }, + "Ethernet113": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x400G": [ + "Eth15" + ], + "4x100G": [ + "Eth15/1", + "Eth15/2", + "Eth15/3", + "Eth15/4" + ], + "2x200G": [ + "Eth15/1", + "Eth15/2" + ] + } + }, + "Ethernet121": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x400G": [ + "Eth16" + ], + "4x100G": [ + "Eth16/1", + "Eth16/2", + "Eth16/3", + "Eth16/4" + ], + "2x200G": [ + "Eth16/1", + "Eth16/2" + ] + } + }, + "Ethernet129": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "97,98,99,100", + "breakout_modes": { + "1x400G": [ + "Eth17" + ], + "4x100G": [ + "Eth17/1", + "Eth17/2", + "Eth17/3", + "Eth17/4" + ], + "2x200G": [ + "Eth17/1", + "Eth17/2" + ] + } + }, + "Ethernet137": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "101,102,103,104", + "breakout_modes": { + "1x400G": [ + "Eth18" + ], + "4x100G": [ + "Eth18/1", + "Eth18/2", + "Eth18/3", + "Eth18/4" + ], + "2x200G": [ + "Eth18/1", + "Eth18/2" + ] + } + }, + "Ethernet145": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x400G": [ + "Eth19" + ], + "4x100G": [ + "Eth19/1", + "Eth19/2", + "Eth19/3", + "Eth19/4" + ], + "2x200G": [ + "Eth19/1", + "Eth19/2" + ] + } + }, + "Ethernet153": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x400G": [ + "Eth20" + ], + "4x100G": [ + "Eth20/1", + "Eth20/2", + "Eth20/3", + "Eth20/4" + ], + "2x200G": [ + "Eth20/1", + "Eth20/2" + ] + } + }, + "Ethernet161": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "105,106,107,108", + "breakout_modes": { + "1x400G": [ + "Eth21" + ], + "4x100G": [ + "Eth21/1", + "Eth21/2", + "Eth21/3", + "Eth21/4" + ], + "2x200G": [ + "Eth21/1", + "Eth21/2" + ] + } + }, + "Ethernet169": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "109,110,111,112", + "breakout_modes": { + "1x400G": [ + "Eth22" + ], + "4x100G": [ + "Eth22/1", + "Eth22/2", + "Eth22/3", + "Eth22/4" + ], + "2x200G": [ + "Eth22/1", + "Eth22/2" + ] + } + }, + "Ethernet177": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "17,18,19,20", + "breakout_modes": { + "1x400G": [ + "Eth23" + ], + "4x100G": [ + "Eth23/1", + "Eth23/2", + "Eth23/3", + "Eth23/4" + ], + "2x200G": [ + "Eth23/1", + "Eth23/2" + ] + } + }, + "Ethernet185": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x400G": [ + "Eth24" + ], + "4x100G": [ + "Eth24/1", + "Eth24/2", + "Eth24/3", + "Eth24/4" + ], + "2x200G": [ + "Eth24/1", + "Eth24/2" + ] + } + }, + "Ethernet193": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "113,114,115,116", + "breakout_modes": { + "1x400G": [ + "Eth25" + ], + "4x100G": [ + "Eth25/1", + "Eth25/2", + "Eth25/3", + "Eth25/4" + ], + "2x200G": [ + "Eth25/1", + "Eth25/2" + ] + } + }, + "Ethernet201": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "117,118,119,120", + "breakout_modes": { + "1x400G": [ + "Eth26" + ], + "4x100G": [ + "Eth26/1", + "Eth26/2", + "Eth26/3", + "Eth26/4" + ], + "2x200G": [ + "Eth26/1", + "Eth26/2" + ] + } + }, + "Ethernet209": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x400G": [ + "Eth27" + ], + "4x100G": [ + "Eth27/1", + "Eth27/2", + "Eth27/3", + "Eth27/4" + ], + "2x200G": [ + "Eth27/1", + "Eth27/2" + ] + } + }, + "Ethernet217": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x400G": [ + "Eth28" + ], + "4x100G": [ + "Eth28/1", + "Eth28/2", + "Eth28/3", + "Eth28/4" + ], + "2x200G": [ + "Eth28/1", + "Eth28/2" + ] + } + }, + "Ethernet225": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x400G": [ + "Eth29" + ], + "4x100G": [ + "Eth29/1", + "Eth29/2", + "Eth29/3", + "Eth29/4" + ], + "2x200G": [ + "Eth29/1", + "Eth29/2" + ] + } + }, + "Ethernet233": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x400G": [ + "Eth30" + ], + "4x100G": [ + "Eth30/1", + "Eth30/2", + "Eth30/3", + "Eth30/4" + ], + "2x200G": [ + "Eth30/1", + "Eth30/2" + ] + } + }, + "Ethernet241": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x400G": [ + "Eth31" + ], + "4x100G": [ + "Eth31/1", + "Eth31/2", + "Eth31/3", + "Eth31/4" + ], + "2x200G": [ + "Eth31/1", + "Eth31/2" + ] + } + }, + "Ethernet249": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x400G": [ + "Eth32" + ], + "4x100G": [ + "Eth32/1", + "Eth32/2", + "Eth32/3", + "Eth32/4" + ], + "2x200G": [ + "Eth32/1", + "Eth32/2" + ] + } + }, + "Ethernet257": { + "index": "32,32,32,32,32,32,32,32", + "lanes": "133,134,135,136", + "breakout_modes": { + "1x400G": [ + "Eth33" + ], + "4x100G": [ + "Eth33/1", + "Eth33/2", + "Eth33/3", + "Eth33/4" + ], + "2x200G": [ + "Eth33/1", + "Eth33/2" + ] + } + }, + "Ethernet265": { + "index": "33,33,33,33,33,33,33,33", + "lanes": "129,130,131,132", + "breakout_modes": { + "1x400G": [ + "Eth34" + ], + "4x100G": [ + "Eth34/1", + "Eth34/2", + "Eth34/3", + "Eth34/4" + ], + "2x200G": [ + "Eth34/1", + "Eth34/2" + ] + } + }, + "Ethernet273": { + "index": "34,34,34,34,34,34,34,34", + "lanes": "249,250,251,252", + "breakout_modes": { + "1x400G": [ + "Eth35" + ], + "4x100G": [ + "Eth35/1", + "Eth35/2", + "Eth35/3", + "Eth35/4" + ], + "2x200G": [ + "Eth35/1", + "Eth35/2" + ] + } + }, + "Ethernet281": { + "index": "35,35,35,35,35,35,35,35", + "lanes": "253,254,255,256", + "breakout_modes": { + "1x400G": [ + "Eth36" + ], + "4x100G": [ + "Eth36/1", + "Eth36/2", + "Eth36/3", + "Eth36/4" + ], + "2x200G": [ + "Eth36/1", + "Eth36/2" + ] + } + }, + "Ethernet289": { + "index": "36,36,36,36,36,36,36,36", + "lanes": "141,142,143,144", + "breakout_modes": { + "1x400G": [ + "Eth37" + ], + "4x100G": [ + "Eth37/1", + "Eth37/2", + "Eth37/3", + "Eth37/4" + ], + "2x200G": [ + "Eth37/1", + "Eth37/2" + ] + } + }, + "Ethernet297": { + "index": "37,37,37,37,37,37,37,37", + "lanes": "137,138,139,140", + "breakout_modes": { + "1x400G": [ + "Eth38" + ], + "4x100G": [ + "Eth38/1", + "Eth38/2", + "Eth38/3", + "Eth38/4" + ], + "2x200G": [ + "Eth38/1", + "Eth38/2" + ] + } + }, + "Ethernet305": { + "index": "38,38,38,38,38,38,38,38", + "lanes": "241,242,243,244", + "breakout_modes": { + "1x400G": [ + "Eth39" + ], + "4x100G": [ + "Eth39/1", + "Eth39/2", + "Eth39/3", + "Eth39/4" + ], + "2x200G": [ + "Eth39/1", + "Eth39/2" + ] + } + }, + "Ethernet313": { + "index": "39,39,39,39,39,39,39,39", + "lanes": "245,246,247,248", + "breakout_modes": { + "1x400G": [ + "Eth40" + ], + "4x100G": [ + "Eth40/1", + "Eth40/2", + "Eth40/3", + "Eth40/4" + ], + "2x200G": [ + "Eth40/1", + "Eth40/2" + ] + } + }, + "Ethernet321": { + "index": "40,40,40,40,40,40,40,40", + "lanes": "149,150,151,152", + "breakout_modes": { + "1x400G": [ + "Eth41" + ], + "4x100G": [ + "Eth41/1", + "Eth41/2", + "Eth41/3", + "Eth41/4" + ], + "2x200G": [ + "Eth41/1", + "Eth41/2" + ] + } + }, + "Ethernet329": { + "index": "41,41,41,41,41,41,41,41", + "lanes": "145,146,147,148", + "breakout_modes": { + "1x400G": [ + "Eth42" + ], + "4x100G": [ + "Eth42/1", + "Eth42/2", + "Eth42/3", + "Eth42/4" + ], + "2x200G": [ + "Eth42/1", + "Eth42/2" + ] + } + }, + "Ethernet337": { + "index": "42,42,42,42,42,42,42,42", + "lanes": "237,238,239,240", + "breakout_modes": { + "1x400G": [ + "Eth43" + ], + "4x100G": [ + "Eth43/1", + "Eth43/2", + "Eth43/3", + "Eth43/4" + ], + "2x200G": [ + "Eth43/1", + "Eth43/2" + ] + } + }, + "Ethernet345": { + "index": "43,43,43,43,43,43,43,43", + "lanes": "197,198,199,200", + "breakout_modes": { + "1x400G": [ + "Eth44" + ], + "4x100G": [ + "Eth44/1", + "Eth44/2", + "Eth44/3", + "Eth44/4" + ], + "2x200G": [ + "Eth44/1", + "Eth44/2" + ] + } + }, + "Ethernet353": { + "index": "44,44,44,44,44,44,44,44", + "lanes": "157,158,159,160", + "breakout_modes": { + "1x400G": [ + "Eth45" + ], + "4x100G": [ + "Eth45/1", + "Eth45/2", + "Eth45/3", + "Eth45/4" + ], + "2x200G": [ + "Eth45/1", + "Eth45/2" + ] + } + }, + "Ethernet361": { + "index": "45,45,45,45,45,45,45,45", + "lanes": "153,154,155,156", + "breakout_modes": { + "1x400G": [ + "Eth46" + ], + "4x100G": [ + "Eth46/1", + "Eth46/2", + "Eth46/3", + "Eth46/4" + ], + "2x200G": [ + "Eth46/1", + "Eth46/2" + ] + } + }, + "Ethernet369": { + "index": "46,46,46,46,46,46,46,46", + "lanes": "193,194,195,196", + "breakout_modes": { + "1x400G": [ + "Eth47" + ], + "4x100G": [ + "Eth47/1", + "Eth47/2", + "Eth47/3", + "Eth47/4" + ], + "2x200G": [ + "Eth47/1", + "Eth47/2" + ] + } + }, + "Ethernet377": { + "index": "47,47,47,47,47,47,47,47", + "lanes": "205,206,207,208", + "breakout_modes": { + "1x400G": [ + "Eth48" + ], + "4x100G": [ + "Eth48/1", + "Eth48/2", + "Eth48/3", + "Eth48/4" + ], + "2x200G": [ + "Eth48/1", + "Eth48/2" + ] + } + }, + "Ethernet385": { + "index": "48,48,48,48,48,48,48,48", + "lanes": "165,166,167,168", + "breakout_modes": { + "1x400G": [ + "Eth49" + ], + "4x100G": [ + "Eth49/1", + "Eth49/2", + "Eth49/3", + "Eth49/4" + ], + "2x200G": [ + "Eth49/1", + "Eth49/2" + ] + } + }, + "Ethernet393": { + "index": "49,49,49,49,49,49,49,49", + "lanes": "161,162,163,164", + "breakout_modes": { + "1x400G": [ + "Eth50" + ], + "4x100G": [ + "Eth50/1", + "Eth50/2", + "Eth50/3", + "Eth50/4" + ], + "2x200G": [ + "Eth50/1", + "Eth50/2" + ] + } + }, + "Ethernet401": { + "index": "50,50,50,50,50,50,50,50", + "lanes": "201,202,203,204", + "breakout_modes": { + "1x400G": [ + "Eth51" + ], + "4x100G": [ + "Eth51/1", + "Eth51/2", + "Eth51/3", + "Eth51/4" + ], + "2x200G": [ + "Eth51/1", + "Eth51/2" + ] + } + }, + "Ethernet409": { + "index": "51,51,51,51,51,51,51,51", + "lanes": "213,214,215,216", + "breakout_modes": { + "1x400G": [ + "Eth52" + ], + "4x100G": [ + "Eth52/1", + "Eth52/2", + "Eth52/3", + "Eth52/4" + ], + "2x200G": [ + "Eth52/1", + "Eth52/2" + ] + } + }, + "Ethernet417": { + "index": "52,52,52,52,52,52,52,52", + "lanes": "173,174,175,176", + "breakout_modes": { + "1x400G": [ + "Eth53" + ], + "4x100G": [ + "Eth53/1", + "Eth53/2", + "Eth53/3", + "Eth53/4" + ], + "2x200G": [ + "Eth53/1", + "Eth53/2" + ] + } + }, + "Ethernet425": { + "index": "53,53,53,53,53,53,53,53", + "lanes": "169,170,171,172", + "breakout_modes": { + "1x400G": [ + "Eth54" + ], + "4x100G": [ + "Eth54/1", + "Eth54/2", + "Eth54/3", + "Eth54/4" + ], + "2x200G": [ + "Eth54/1", + "Eth54/2" + ] + } + }, + "Ethernet433": { + "index": "54,54,54,54,54,54,54,54", + "lanes": "209,210,211,212", + "breakout_modes": { + "1x400G": [ + "Eth55" + ], + "4x100G": [ + "Eth55/1", + "Eth55/2", + "Eth55/3", + "Eth55/4" + ], + "2x200G": [ + "Eth55/1", + "Eth55/2" + ] + } + }, + "Ethernet441": { + "index": "55,55,55,55,55,55,55,55", + "lanes": "221,222,223,224", + "breakout_modes": { + "1x400G": [ + "Eth56" + ], + "4x100G": [ + "Eth56/1", + "Eth56/2", + "Eth56/3", + "Eth56/4" + ], + "2x200G": [ + "Eth56/1", + "Eth56/2" + ] + } + }, + "Ethernet449": { + "index": "56,56,56,56,56,56,56,56", + "lanes": "181,182,183,184", + "breakout_modes": { + "1x400G": [ + "Eth57" + ], + "4x100G": [ + "Eth57/1", + "Eth57/2", + "Eth57/3", + "Eth57/4" + ], + "2x200G": [ + "Eth57/1", + "Eth57/2" + ] + } + }, + "Ethernet457": { + "index": "57,57,57,57,57,57,57,57", + "lanes": "177,178,179,180", + "breakout_modes": { + "1x400G": [ + "Eth58" + ], + "4x100G": [ + "Eth58/1", + "Eth58/2", + "Eth58/3", + "Eth58/4" + ], + "2x200G": [ + "Eth58/1", + "Eth58/2" + ] + } + }, + "Ethernet465": { + "index": "58,58,58,58,58,58,58,58", + "lanes": "217,218,219,220", + "breakout_modes": { + "1x400G": [ + "Eth59" + ], + "4x100G": [ + "Eth59/1", + "Eth59/2", + "Eth59/3", + "Eth59/4" + ], + "2x200G": [ + "Eth59/1", + "Eth59/2" + ] + } + }, + "Ethernet473": { + "index": "59,59,59,59,59,59,59,59", + "lanes": "229,230,231,232", + "breakout_modes": { + "1x400G": [ + "Eth60" + ], + "4x100G": [ + "Eth60/1", + "Eth60/2", + "Eth60/3", + "Eth60/4" + ], + "2x200G": [ + "Eth60/1", + "Eth60/2" + ] + } + }, + "Ethernet481": { + "index": "60,60,60,60,60,60,60,60", + "lanes": "189,190,191,192", + "breakout_modes": { + "1x400G": [ + "Eth61" + ], + "4x100G": [ + "Eth61/1", + "Eth61/2", + "Eth61/3", + "Eth61/4" + ], + "2x200G": [ + "Eth61/1", + "Eth61/2" + ] + } + }, + "Ethernet489": { + "index": "61,61,61,61,61,61,61,61", + "lanes": "185,186,187,188", + "breakout_modes": { + "1x400G": [ + "Eth62" + ], + "4x100G": [ + "Eth62/1", + "Eth62/2", + "Eth62/3", + "Eth62/4" + ], + "2x200G": [ + "Eth62/1", + "Eth62/2" + ] + } + }, + "Ethernet497": { + "index": "62,62,62,62,62,62,62,62", + "lanes": "225,226,227,228", + "breakout_modes": { + "1x400G": [ + "Eth63" + ], + "4x100G": [ + "Eth63/1", + "Eth63/2", + "Eth63/3", + "Eth63/4" + ], + "2x200G": [ + "Eth63/1", + "Eth63/2" + ] + } + }, + "Ethernet505": { + "index": "63,63,63,63,63,63,63,63", + "lanes": "233,234,235,236", + "breakout_modes": { + "1x400G": [ + "Eth64" + ], + "4x100G": [ + "Eth64/1", + "Eth64/2", + "Eth64/3", + "Eth64/4" + ], + "2x200G": [ + "Eth64/1", + "Eth64/2" + ] + } + } + } +} \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_asic b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_asic new file mode 100644 index 00000000000..96046765276 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_components.json new file mode 100644 index 00000000000..221114c461b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_components.json @@ -0,0 +1,20 @@ +{ + "chassis": { + "M2-W6930-64QC": { + "component": { + "CPU_CPLD": { }, + "CONNECT_CPLD": { }, + "FAN_CPLDA": { }, + "FAN_CPLDB": { }, + "MAC_CPLDA": { }, + "MAC_CPLDB": { }, + "PORT_CPLDA": { }, + "PORT_CPLDB": { }, + "MAC_FPGA": { }, + "PORT_FPGA": { }, + "BIOS": { } + } + } + } +} + diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_env.conf new file mode 100644 index 00000000000..fc119184d5c --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_env.conf @@ -0,0 +1,2 @@ +is_ltsw_chip=1 +SYNCD_SHM_SIZE=1g diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/sfputil.py new file mode 100644 index 00000000000..f52a788085e --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/sfputil.py @@ -0,0 +1,363 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import re + import os + import threading + import traceback + import subprocess + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 63 + PORTS_IN_BLOCK = 64 + + EEPROM_OFFSET = 133 + SFP_DEVICE_TYPE = "optoe2" + QSFP_DEVICE_TYPE = "optoe1" + QSFP_DD_DEVICE_TYPE = "optoe3" + I2C_MAX_ATTEMPT = 3 + + OPTOE_TYPE1 = 1 + OPTOE_TYPE2 = 2 + OPTOE_TYPE3 = 3 + + SFP_STATUS_INSERTED = '1' + SFP_STATUS_REMOVED = '0' + + _port_to_eeprom_mapping = {} + port_to_i2cbus_mapping ={} + port_dict = {} + + qsfp_ports_list = [] + qsfp_dd_ports_list = [] + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return self.qsfp_ports_list + + @property + def qsfp_dd_ports(self): + return self.qsfp_dd_ports_list + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + self.qsfp_ports_list = [] + self.qsfp_dd_ports_list = [] + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET) + if self.get_presence(x): + self.port_dict[x] = self.SFP_STATUS_INSERTED + else: + self.port_dict[x] = self.SFP_STATUS_REMOVED + + if (self.check_is_qsfpdd(x)): + self.qsfp_dd_ports_list.append(x) + self.check_optoe_type(x, self.OPTOE_TYPE3) + else: + self.qsfp_ports_list.append(x) + self.check_optoe_type(x, self.OPTOE_TYPE1) + SfpUtilBase.__init__(self) + + def _sfp_read_file_path(self, file_path, offset, num_bytes): + attempts = 0 + while attempts < self.I2C_MAX_ATTEMPT: + try: + file_path.seek(offset) + read_buf = file_path.read(num_bytes) + except: + attempts += 1 + time.sleep(0.05) + else: + return True, read_buf + return False, None + + def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset): + """Tries to read the eeprom file to determine if the + device/sfp is present or not. If sfp present, the read returns + valid bytes. If not, read returns error 'Connection timed out""" + + if not os.path.exists(sysfs_sfp_i2c_client_eeprompath): + return False + else: + with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile: + rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1) + return rv + + def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype): + try: + sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path + + # Write device address to new_device file + nd_file = open(sysfs_nd_path, "w") + nd_str = "%s %s" % (devtype, hex(devaddr)) + nd_file.write(nd_str) + nd_file.close() + + except Exception as err: + print("Error writing to new device file: %s" % str(err)) + return 1 + else: + return 0 + + def _get_port_eeprom_path(self, port_num, devid): + sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter" + + if port_num in self.port_to_eeprom_mapping.keys(): + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num] + else: + sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter" + + i2c_adapter_id = self._get_port_i2c_adapter_id(port_num) + if i2c_adapter_id is None: + print("Error getting i2c bus num") + return None + + # Get i2c virtual bus path for the sfp + sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path, + str(i2c_adapter_id)) + + # If i2c bus for port does not exist + if not os.path.exists(sysfs_sfp_i2c_adapter_path): + print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path) + return None + + sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path, + str(i2c_adapter_id), + hex(devid)[-2:]) + + # If sfp device is not present on bus, Add it + if not os.path.exists(sysfs_sfp_i2c_client_path): + if port_num in self.qsfp_dd_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DD_DEVICE_TYPE) + elif port_num in self.qsfp_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE) + else: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE) + if ret != 0: + print("Error adding sfp device") + return None + + sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path + + return sysfs_sfp_i2c_client_eeprom_path + + def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes) + if rv == False: + return None + + try: + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + except: + return None + + return eeprom_raw + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + cmd = "cat /sys/wb_plat/sff/sff{}/present".format(str(port_num+1)) + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + return False + if output == "1": + return True + return False + + def check_is_qsfpdd(self, port_num): + try: + if self.get_presence(port_num) == False: + return False + + eeprom_path = self._get_port_eeprom_path(port_num, 0x50) + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1) + # according to sff-8024 A0h Byte 0 is '1e' or '18' means the transceiver is qsfpdd + if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18'): + return True + except Exception as e: + print(traceback.format_exc()) + + return False + + def check_optoe_type(self, port_num, optoe_type): + if self.get_presence(port_num) == False: + return True + try: + eeprom_path = self._get_port_eeprom_path(port_num, 0x50) + dev_class_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/dev_class' + i2c_path = dev_class_path.format(str(self.port_to_i2cbus_mapping[port_num])) + cmd = "cat " + i2c_path + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + print("cmd: %s execution fail, output:%s" % (cmd, output)) + return False + if int(output) != optoe_type: + cmd = "echo " + str(optoe_type) + " > " + i2c_path + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + print("cmd: %s execution fail, output:%s" % (cmd, output)) + return False + return True + + except Exception as e: + print(traceback.format_exc()) + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return True + + def get_transceiver_change_event(self, timeout=0): + + start_time = time.time() + current_port_dict = {} + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print ("get_transceiver_change_event:Invalid timeout value", timeout) + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print ('get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout) + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(x): + current_port_dict[x] = self.SFP_STATUS_INSERTED + else: + current_port_dict[x] = self.SFP_STATUS_REMOVED + if (current_port_dict == self.port_dict): + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + else: + # Update reg value + self.port_dict = current_port_dict + return True, self.port_dict + print ("get_transceiver_change_event: Should not reach here.") + return False, {} + + def get_highest_temperature(self): + offset = 0 + hightest_temperature = -9999 + + presence_flag = False + read_eeprom_flag = False + temperature_valid_flag = False + + for port in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(port) == False: + continue + + presence_flag = True + + if port in self.qsfp_dd_ports: + offset = 14 + elif port in self.qsfp_ports: + offset = 22 + else: + offset = 96 + + eeprom_path = self._get_port_eeprom_path(port, 0x50) + try: + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + read_eeprom_flag = True + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2) + if len(eeprom_raw) != 0: + msb = int(eeprom_raw[0], 16) + lsb = int(eeprom_raw[1], 16) + + result = (msb << 8) | (lsb & 0xff) + result = float(result / 256.0) + if -50 <= result <= 200: + temperature_valid_flag = True + if hightest_temperature < result: + hightest_temperature = result + except Exception as e: + pass + + # all port not presence + if presence_flag == False: + hightest_temperature = -10000 + + # all port read eeprom fail + elif read_eeprom_flag == False: + hightest_temperature = -9999 + + # all port temperature invalid + elif read_eeprom_flag == True and temperature_valid_flag == False: + hightest_temperature = -10000 + + hightest_temperature = round(hightest_temperature, 2) + + return hightest_temperature diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/ssd_util.py new file mode 100644 index 00000000000..e8cf2e1a7cb --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/ssd_util.py @@ -0,0 +1,318 @@ +# +# ssd_util.py +# +# Generic implementation of the SSD health API +# SSD models supported: +# - InnoDisk +# - StorFly +# - Virtium + +try: + import re + import os + import subprocess + from sonic_platform_base.sonic_storage.storage_base import StorageBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +SMARTCTL = "smartctl {} -a" +INNODISK = "iSmart -d {}" +VIRTIUM = "SmartCmd -m {}" +DISK_LIST_CMD = "fdisk -l -o Device" +DISK_FREE_CMD = "df -h" +MOUNT_CMD = "mount" + +NOT_AVAILABLE = "N/A" +PE_CYCLE = 3000 +FAIL_PERCENT = 95 + +# Set Vendor Specific IDs +INNODISK_HEALTH_ID = 169 +INNODISK_TEMPERATURE_ID = 194 + +class SsdUtil(StorageBase): + """ + Generic implementation of the SSD health API + """ + model = NOT_AVAILABLE + serial = NOT_AVAILABLE + firmware = NOT_AVAILABLE + temperature = NOT_AVAILABLE + health = NOT_AVAILABLE + remaining_life = NOT_AVAILABLE + sata_rate = NOT_AVAILABLE + ssd_info = NOT_AVAILABLE + vendor_ssd_info = NOT_AVAILABLE + + def __init__(self, diskdev): + self.vendor_ssd_utility = { + "Generic" : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info }, + "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "M.2" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "StorFly" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info }, + "Virtium" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info } + } + + """ + The dict model_attr keys relate the vendors + LITEON : "ER2-GD","AF2MA31DTDLT" + Intel : "SSDSCKKB" + SMI : "SM619GXC" + samsung: "MZNLH" + ADATA : "IM2S3134N" + """ + self.model_attr = { + "ER2-GD" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }, + "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }, + "SSDSCK" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" }, + "SM619GXC" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" }, + "MZNLH" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" }, + "IM2S3134N" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" }, + "MTFDDAV240TCB-1AR1ZABAA" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" } + } + + self.key_list = list(self.model_attr.keys()) + self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*" + self.dev = diskdev + # Generic part + self.fetch_generic_ssd_info(diskdev) + self.parse_generic_ssd_info() + self.fetch_vendor_ssd_info(diskdev, "Generic") + + # Known vendor part + if self.model: + model_short = self.model.split()[0] + if model_short in self.vendor_ssd_utility: + self.fetch_vendor_ssd_info(diskdev, model_short) + self.parse_vendor_ssd_info(model_short) + else: + # No handler registered for this disk model + pass + else: + # Failed to get disk model + self.model = "Unknown" + + def _execute_shell(self, cmd): + process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE) + output, error = process.communicate() + exit_code = process.returncode + if exit_code: + return None + return output + + def _parse_re(self, pattern, buffer): + res_list = re.findall(pattern, str(buffer)) + return res_list[0] if res_list else NOT_AVAILABLE + + def fetch_generic_ssd_info(self, diskdev): + self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev)) + + # Health and temperature values may be overwritten with vendor specific data + def parse_generic_ssd_info(self): + if "nvme" in self.dev: + self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info) + + health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info) + if health_raw == NOT_AVAILABLE: + self.health = NOT_AVAILABLE + else: + health_raw = health_raw.split()[-1] + self.health = 100 - float(health_raw.strip('%')) + + temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info) + if temp_raw == NOT_AVAILABLE: + self.temperature = NOT_AVAILABLE + else: + temp_raw = temp_raw.split()[-2] + self.temperature = float(temp_raw) + else: + self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info) + model_key = "" + for key in self.key_list: + if re.search(key, self.model): + model_key = key + break + if model_key != "": + self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2] + self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8] + self.health = self.remaining_life + # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE) + if model_key in ["ER2-GD", "AF2MA31DTDLT"]: + avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1]) + self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0)) + if self.remaining_life != NOT_AVAILABLE and int(self.remaining_life) < FAIL_PERCENT: + self.remaining_life = "Fail" + self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info) + self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info) + self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info) + + def parse_innodisk_info(self): + if self.vendor_ssd_info: + self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info) + self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info) + else: + if self.health == NOT_AVAILABLE: + health_raw = self.parse_id_number(INNODISK_HEALTH_ID) + self.health = health_raw.split()[-1] + if self.temperature == NOT_AVAILABLE: + temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID) + self.temperature = temp_raw.split()[-6] + + def parse_virtium_info(self): + if self.vendor_ssd_info: + self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + try: + self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance)) + except (ValueError, ZeroDivisionError): + # Invalid avg_erase_count or nand_endurance. + pass + + def fetch_vendor_ssd_info(self, diskdev, model): + self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev)) + + def parse_vendor_ssd_info(self, model): + self.vendor_ssd_utility[model]["parser"]() + + def check_readonly2(self, partition, filesystem): + # parse mount cmd output info + mount_info = self._execute_shell(MOUNT_CMD) + for line in mount_info.split('\n'): + column_list = line.split() + if line == '': + continue + if column_list[0] == partition and column_list[2] == filesystem: + if column_list[5].split(',')[0][1:] == "ro": + return partition + else: + return NOT_AVAILABLE + return NOT_AVAILABLE + + def check_readonly(self, partition, filesystem): + ret = os.access(filesystem, os.W_OK) + if ret == False: + return partition + else: + return NOT_AVAILABLE + + def get_health(self): + """ + Retrieves current disk health in percentages + + Returns: + A float number of current ssd health + e.g. 83.5 + """ + if self.health == 'N/A': + return "NA" + else: + return float(self.health) + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + if self.temperature == 'N/A': + return 'NA' + else: + return float(self.temperature) + + def get_model(self): + """ + Retrieves model for the given disk device + + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + def get_sata_rate(self): + """ + Retrieves SATA rate for the given disk device + Returns: + A string holding current SATA rate as provided by the manufacturer + """ + return self.sata_rate + def get_remaining_life(self): + """ + Retrieves remaining life for the given disk device + Returns: + A string holding disk remaining life as provided by the manufacturer + """ + return self.remaining_life + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + + Returns: + A string holding some vendor specific disk information + """ + return self.vendor_ssd_info + + def parse_id_number(self, id): + return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info) + + def get_readonly_partition(self): + """ + Check the partition mount filesystem is readonly status,then output the result. + Returns: + The readonly partition list + """ + + ro_partition_list = [] + partition_list = [] + + # parse fdisk cmd output info + disk_info = self._execute_shell(DISK_LIST_CMD) + begin_flag = False + for line in disk_info.split('\n'): + if line == "Device": + begin_flag = True + continue + if begin_flag: + if line != "": + partition_list.append(line) + else: + break + + # parse df cmd output info + disk_free = self._execute_shell(DISK_FREE_CMD) + disk_dict = {} + line_num = 0 + for line in disk_free.split('\n'): + line_num = line_num + 1 + if line_num == 1 or line == "": + continue + column_list = line.split() + disk_dict[column_list[0]] = column_list[5] + + # get partition which is readonly + for partition in partition_list: + if partition in disk_dict: + ret = self.check_readonly(partition, disk_dict[partition]) + if (ret != NOT_AVAILABLE): + ro_partition_list.append(ret) + + return ro_partition_list diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..94592fa8ceb --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6930-64qc-r0/postinit_cmd_file.soc new file mode 100644 index 00000000000..fa28dafe16c --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/postinit_cmd_file.soc @@ -0,0 +1,4 @@ +led load /usr/share/sonic/platform/custom_led.bin +led auto on +led start +linkscan SwPortBitMap=xe,ce,cd \ No newline at end of file diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/__init__.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/system_health_monitoring_config.json old mode 100644 new mode 100755 similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/__init__.py rename to device/micas/x86_64-micas_m2-w6930-64qc-r0/system_health_monitoring_config.json diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json new file mode 100644 index 00000000000..bb061f71ec6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json @@ -0,0 +1,388 @@ +{ + "interfaces": { + "Ethernet1": { + "default_brkout_mode": "1x400G" + }, + "Ethernet5": { + "default_brkout_mode": "1x400G" + }, + "Ethernet9": { + "default_brkout_mode": "1x400G" + }, + "Ethernet13": { + "default_brkout_mode": "1x400G" + }, + "Ethernet17": { + "default_brkout_mode": "1x400G" + }, + "Ethernet21": { + "default_brkout_mode": "1x400G" + }, + "Ethernet25": { + "default_brkout_mode": "1x400G" + }, + "Ethernet29": { + "default_brkout_mode": "1x400G" + }, + "Ethernet33": { + "default_brkout_mode": "1x400G" + }, + "Ethernet37": { + "default_brkout_mode": "1x400G" + }, + "Ethernet41": { + "default_brkout_mode": "1x400G" + }, + "Ethernet45": { + "default_brkout_mode": "1x400G" + }, + "Ethernet49": { + "default_brkout_mode": "1x400G" + }, + "Ethernet53": { + "default_brkout_mode": "1x400G" + }, + "Ethernet57": { + "default_brkout_mode": "1x400G" + }, + "Ethernet61": { + "default_brkout_mode": "1x400G" + }, + "Ethernet65": { + "default_brkout_mode": "1x400G" + }, + "Ethernet69": { + "default_brkout_mode": "1x400G" + }, + "Ethernet73": { + "default_brkout_mode": "1x400G" + }, + "Ethernet77": { + "default_brkout_mode": "1x400G" + }, + "Ethernet81": { + "default_brkout_mode": "1x400G" + }, + "Ethernet85": { + "default_brkout_mode": "1x400G" + }, + "Ethernet89": { + "default_brkout_mode": "1x400G" + }, + "Ethernet93": { + "default_brkout_mode": "1x400G" + }, + "Ethernet97": { + "default_brkout_mode": "1x400G" + }, + "Ethernet101": { + "default_brkout_mode": "1x400G" + }, + "Ethernet105": { + "default_brkout_mode": "1x400G" + }, + "Ethernet109": { + "default_brkout_mode": "1x400G" + }, + "Ethernet113": { + "default_brkout_mode": "1x400G" + }, + "Ethernet117": { + "default_brkout_mode": "1x400G" + }, + "Ethernet121": { + "default_brkout_mode": "1x400G" + }, + "Ethernet125": { + "default_brkout_mode": "1x400G" + }, + "Ethernet129": { + "default_brkout_mode": "1x400G" + }, + "Ethernet133": { + "default_brkout_mode": "1x400G" + }, + "Ethernet137": { + "default_brkout_mode": "1x400G" + }, + "Ethernet141": { + "default_brkout_mode": "1x400G" + }, + "Ethernet145": { + "default_brkout_mode": "1x400G" + }, + "Ethernet149": { + "default_brkout_mode": "1x400G" + }, + "Ethernet153": { + "default_brkout_mode": "1x400G" + }, + "Ethernet157": { + "default_brkout_mode": "1x400G" + }, + "Ethernet161": { + "default_brkout_mode": "1x400G" + }, + "Ethernet165": { + "default_brkout_mode": "1x400G" + }, + "Ethernet169": { + "default_brkout_mode": "1x400G" + }, + "Ethernet173": { + "default_brkout_mode": "1x400G" + }, + "Ethernet177": { + "default_brkout_mode": "1x400G" + }, + "Ethernet181": { + "default_brkout_mode": "1x400G" + }, + "Ethernet185": { + "default_brkout_mode": "1x400G" + }, + "Ethernet189": { + "default_brkout_mode": "1x400G" + }, + "Ethernet193": { + "default_brkout_mode": "1x400G" + }, + "Ethernet197": { + "default_brkout_mode": "1x400G" + }, + "Ethernet201": { + "default_brkout_mode": "1x400G" + }, + "Ethernet205": { + "default_brkout_mode": "1x400G" + }, + "Ethernet209": { + "default_brkout_mode": "1x400G" + }, + "Ethernet213": { + "default_brkout_mode": "1x400G" + }, + "Ethernet217": { + "default_brkout_mode": "1x400G" + }, + "Ethernet221": { + "default_brkout_mode": "1x400G" + }, + "Ethernet225": { + "default_brkout_mode": "1x400G" + }, + "Ethernet229": { + "default_brkout_mode": "1x400G" + }, + "Ethernet233": { + "default_brkout_mode": "1x400G" + }, + "Ethernet237": { + "default_brkout_mode": "1x400G" + }, + "Ethernet241": { + "default_brkout_mode": "1x400G" + }, + "Ethernet245": { + "default_brkout_mode": "1x400G" + }, + "Ethernet249": { + "default_brkout_mode": "1x400G" + }, + "Ethernet253": { + "default_brkout_mode": "1x400G" + }, + "Ethernet257": { + "default_brkout_mode": "1x400G" + }, + "Ethernet261": { + "default_brkout_mode": "1x400G" + }, + "Ethernet265": { + "default_brkout_mode": "1x400G" + }, + "Ethernet269": { + "default_brkout_mode": "1x400G" + }, + "Ethernet273": { + "default_brkout_mode": "1x400G" + }, + "Ethernet277": { + "default_brkout_mode": "1x400G" + }, + "Ethernet281": { + "default_brkout_mode": "1x400G" + }, + "Ethernet285": { + "default_brkout_mode": "1x400G" + }, + "Ethernet289": { + "default_brkout_mode": "1x400G" + }, + "Ethernet293": { + "default_brkout_mode": "1x400G" + }, + "Ethernet297": { + "default_brkout_mode": "1x400G" + }, + "Ethernet301": { + "default_brkout_mode": "1x400G" + }, + "Ethernet305": { + "default_brkout_mode": "1x400G" + }, + "Ethernet309": { + "default_brkout_mode": "1x400G" + }, + "Ethernet313": { + "default_brkout_mode": "1x400G" + }, + "Ethernet317": { + "default_brkout_mode": "1x400G" + }, + "Ethernet321": { + "default_brkout_mode": "1x400G" + }, + "Ethernet325": { + "default_brkout_mode": "1x400G" + }, + "Ethernet329": { + "default_brkout_mode": "1x400G" + }, + "Ethernet333": { + "default_brkout_mode": "1x400G" + }, + "Ethernet337": { + "default_brkout_mode": "1x400G" + }, + "Ethernet341": { + "default_brkout_mode": "1x400G" + }, + "Ethernet345": { + "default_brkout_mode": "1x400G" + }, + "Ethernet349": { + "default_brkout_mode": "1x400G" + }, + "Ethernet353": { + "default_brkout_mode": "1x400G" + }, + "Ethernet357": { + "default_brkout_mode": "1x400G" + }, + "Ethernet361": { + "default_brkout_mode": "1x400G" + }, + "Ethernet365": { + "default_brkout_mode": "1x400G" + }, + "Ethernet369": { + "default_brkout_mode": "1x400G" + }, + "Ethernet373": { + "default_brkout_mode": "1x400G" + }, + "Ethernet377": { + "default_brkout_mode": "1x400G" + }, + "Ethernet381": { + "default_brkout_mode": "1x400G" + }, + "Ethernet385": { + "default_brkout_mode": "1x400G" + }, + "Ethernet389": { + "default_brkout_mode": "1x400G" + }, + "Ethernet393": { + "default_brkout_mode": "1x400G" + }, + "Ethernet397": { + "default_brkout_mode": "1x400G" + }, + "Ethernet401": { + "default_brkout_mode": "1x400G" + }, + "Ethernet405": { + "default_brkout_mode": "1x400G" + }, + "Ethernet409": { + "default_brkout_mode": "1x400G" + }, + "Ethernet413": { + "default_brkout_mode": "1x400G" + }, + "Ethernet417": { + "default_brkout_mode": "1x400G" + }, + "Ethernet421": { + "default_brkout_mode": "1x400G" + }, + "Ethernet425": { + "default_brkout_mode": "1x400G" + }, + "Ethernet429": { + "default_brkout_mode": "1x400G" + }, + "Ethernet433": { + "default_brkout_mode": "1x400G" + }, + "Ethernet437": { + "default_brkout_mode": "1x400G" + }, + "Ethernet441": { + "default_brkout_mode": "1x400G" + }, + "Ethernet445": { + "default_brkout_mode": "1x400G" + }, + "Ethernet449": { + "default_brkout_mode": "1x400G" + }, + "Ethernet453": { + "default_brkout_mode": "1x400G" + }, + "Ethernet457": { + "default_brkout_mode": "1x400G" + }, + "Ethernet461": { + "default_brkout_mode": "1x400G" + }, + "Ethernet465": { + "default_brkout_mode": "1x400G" + }, + "Ethernet469": { + "default_brkout_mode": "1x400G" + }, + "Ethernet473": { + "default_brkout_mode": "1x400G" + }, + "Ethernet477": { + "default_brkout_mode": "1x400G" + }, + "Ethernet481": { + "default_brkout_mode": "1x400G" + }, + "Ethernet485": { + "default_brkout_mode": "1x400G" + }, + "Ethernet489": { + "default_brkout_mode": "1x400G" + }, + "Ethernet493": { + "default_brkout_mode": "1x400G" + }, + "Ethernet497": { + "default_brkout_mode": "1x400G" + }, + "Ethernet501": { + "default_brkout_mode": "1x400G" + }, + "Ethernet505": { + "default_brkout_mode": "1x400G" + }, + "Ethernet509": { + "default_brkout_mode": "1x400G" + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/port_config.ini b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/port_config.ini new file mode 100644 index 00000000000..b54cae009e4 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/port_config.ini @@ -0,0 +1,129 @@ +# name lanes alias index speed +Ethernet1 17,18,19,20 fourhundredGigE0/1 0 400000 +Ethernet5 21,22,23,24 fourhundredGigE0/2 1 400000 +Ethernet9 25,26,27,28 fourhundredGigE0/3 2 400000 +Ethernet13 29,30,31,32 fourhundredGigE0/4 3 400000 +Ethernet17 129,130,131,132 fourhundredGigE0/5 4 400000 +Ethernet21 133,134,135,136 fourhundredGigE0/6 5 400000 +Ethernet25 41,42,43,44 fourhundredGigE0/7 6 400000 +Ethernet29 45,46,47,48 fourhundredGigE0/8 7 400000 +Ethernet33 57,58,59,60 fourhundredGigE0/9 8 400000 +Ethernet37 61,62,63,64 fourhundredGigE0/10 9 400000 +Ethernet41 145,146,147,148 fourhundredGigE0/11 10 400000 +Ethernet45 149,150,151,152 fourhundredGigE0/12 11 400000 +Ethernet49 137,138,139,140 fourhundredGigE0/13 12 400000 +Ethernet53 141,142,143,144 fourhundredGigE0/14 13 400000 +Ethernet57 33,34,35,36 fourhundredGigE0/15 14 400000 +Ethernet61 37,38,39,40 fourhundredGigE0/16 15 400000 +Ethernet65 161,162,163,164 fourhundredGigE0/17 16 400000 +Ethernet69 165,166,167,168 fourhundredGigE0/18 17 400000 +Ethernet73 153,154,155,156 fourhundredGigE0/19 18 400000 +Ethernet77 157,158,159,160 fourhundredGigE0/20 19 400000 +Ethernet81 49,50,51,52 fourhundredGigE0/21 20 400000 +Ethernet85 53,54,55,56 fourhundredGigE0/22 21 400000 +Ethernet89 177,178,179,180 fourhundredGigE0/23 22 400000 +Ethernet93 181,182,183,184 fourhundredGigE0/24 23 400000 +Ethernet97 169,170,171,172 fourhundredGigE0/25 24 400000 +Ethernet101 173,174,175,176 fourhundredGigE0/26 25 400000 +Ethernet105 65,66,67,68 fourhundredGigE0/27 26 400000 +Ethernet109 69,70,71,72 fourhundredGigE0/28 27 400000 +Ethernet113 209,210,211,212 fourhundredGigE0/29 28 400000 +Ethernet117 213,214,215,216 fourhundredGigE0/30 29 400000 +Ethernet121 185,186,187,188 fourhundredGigE0/31 30 400000 +Ethernet125 189,190,191,192 fourhundredGigE0/32 31 400000 +Ethernet129 81,82,83,84 fourhundredGigE0/33 32 400000 +Ethernet133 85,86,87,88 fourhundredGigE0/34 33 400000 +Ethernet137 193,194,195,196 fourhundredGigE0/35 34 400000 +Ethernet141 197,198,199,200 fourhundredGigE0/36 35 400000 +Ethernet145 201,202,203,204 fourhundredGigE0/37 36 400000 +Ethernet149 205,206,207,208 fourhundredGigE0/38 37 400000 +Ethernet153 97,98,99,100 fourhundredGigE0/39 38 400000 +Ethernet157 101,102,103,104 fourhundredGigE0/40 39 400000 +Ethernet161 121,122,123,124 fourhundredGigE0/41 40 400000 +Ethernet165 125,126,127,128 fourhundredGigE0/42 41 400000 +Ethernet169 217,218,219,220 fourhundredGigE0/43 42 400000 +Ethernet173 221,222,223,224 fourhundredGigE0/44 43 400000 +Ethernet177 113,114,115,116 fourhundredGigE0/45 44 400000 +Ethernet181 117,118,119,120 fourhundredGigE0/46 45 400000 +Ethernet185 105,106,107,108 fourhundredGigE0/47 46 400000 +Ethernet189 109,110,111,112 fourhundredGigE0/48 47 400000 +Ethernet193 225,226,227,228 fourhundredGigE0/49 48 400000 +Ethernet197 229,230,231,232 fourhundredGigE0/50 49 400000 +Ethernet201 233,234,235,236 fourhundredGigE0/51 50 400000 +Ethernet205 237,238,239,240 fourhundredGigE0/52 51 400000 +Ethernet209 89,90,91,92 fourhundredGigE0/53 52 400000 +Ethernet213 93,94,95,96 fourhundredGigE0/54 53 400000 +Ethernet217 241,242,243,244 fourhundredGigE0/55 54 400000 +Ethernet221 245,246,247,248 fourhundredGigE0/56 55 400000 +Ethernet225 249,250,251,252 fourhundredGigE0/57 56 400000 +Ethernet229 253,254,255,256 fourhundredGigE0/58 57 400000 +Ethernet233 73,74,75,76 fourhundredGigE0/59 58 400000 +Ethernet237 77,78,79,80 fourhundredGigE0/60 59 400000 +Ethernet241 257,258,259,260 fourhundredGigE0/61 60 400000 +Ethernet245 261,262,263,264 fourhundredGigE0/62 61 400000 +Ethernet249 265,266,267,268 fourhundredGigE0/63 62 400000 +Ethernet253 269,270,271,272 fourhundredGigE0/64 63 400000 +Ethernet257 433,434,435,436 fourhundredGigE0/65 64 400000 +Ethernet261 437,438,439,440 fourhundredGigE0/66 65 400000 +Ethernet265 273,274,275,276 fourhundredGigE0/67 66 400000 +Ethernet269 277,278,279,280 fourhundredGigE0/68 67 400000 +Ethernet273 281,282,283,284 fourhundredGigE0/69 68 400000 +Ethernet277 285,286,287,288 fourhundredGigE0/70 69 400000 +Ethernet281 417,418,419,420 fourhundredGigE0/71 70 400000 +Ethernet285 421,422,423,424 fourhundredGigE0/72 71 400000 +Ethernet289 393,394,395,396 fourhundredGigE0/73 72 400000 +Ethernet293 397,398,399,400 fourhundredGigE0/74 73 400000 +Ethernet297 289,290,291,292 fourhundredGigE0/75 74 400000 +Ethernet301 293,294,295,296 fourhundredGigE0/76 75 400000 +Ethernet305 401,402,403,404 fourhundredGigE0/77 76 400000 +Ethernet309 405,406,407,408 fourhundredGigE0/78 77 400000 +Ethernet313 409,410,411,412 fourhundredGigE0/79 78 400000 +Ethernet317 413,414,415,416 fourhundredGigE0/80 79 400000 +Ethernet321 305,306,307,308 fourhundredGigE0/81 80 400000 +Ethernet325 309,310,311,312 fourhundredGigE0/82 81 400000 +Ethernet329 385,386,387,388 fourhundredGigE0/83 82 400000 +Ethernet333 389,390,391,392 fourhundredGigE0/84 83 400000 +Ethernet337 425,426,427,428 fourhundredGigE0/85 84 400000 +Ethernet341 429,430,431,432 fourhundredGigE0/86 85 400000 +Ethernet345 321,322,323,324 fourhundredGigE0/87 86 400000 +Ethernet349 325,326,327,328 fourhundredGigE0/88 87 400000 +Ethernet353 313,314,315,316 fourhundredGigE0/89 88 400000 +Ethernet357 317,318,319,320 fourhundredGigE0/90 89 400000 +Ethernet361 441,442,443,444 fourhundredGigE0/91 90 400000 +Ethernet365 445,446,447,448 fourhundredGigE0/92 91 400000 +Ethernet369 337,338,339,340 fourhundredGigE0/93 92 400000 +Ethernet373 341,342,343,344 fourhundredGigE0/94 93 400000 +Ethernet377 297,298,299,300 fourhundredGigE0/95 94 400000 +Ethernet381 301,302,303,304 fourhundredGigE0/96 95 400000 +Ethernet385 457,458,459,460 fourhundredGigE0/97 96 400000 +Ethernet389 461,462,463,464 fourhundredGigE0/98 97 400000 +Ethernet393 353,354,355,356 fourhundredGigE0/99 98 400000 +Ethernet397 357,358,359,360 fourhundredGigE0/100 99 400000 +Ethernet401 329,330,331,332 fourhundredGigE0/101 100 400000 +Ethernet405 333,334,335,336 fourhundredGigE0/102 101 400000 +Ethernet409 473,474,475,476 fourhundredGigE0/103 102 400000 +Ethernet413 477,478,479,480 fourhundredGigE0/104 103 400000 +Ethernet417 369,370,371,372 fourhundredGigE0/105 104 400000 +Ethernet421 373,374,375,376 fourhundredGigE0/106 105 400000 +Ethernet425 345,346,347,348 fourhundredGigE0/107 106 400000 +Ethernet429 349,350,351,352 fourhundredGigE0/108 107 400000 +Ethernet433 449,450,451,452 fourhundredGigE0/109 108 400000 +Ethernet437 453,454,455,456 fourhundredGigE0/110 109 400000 +Ethernet441 465,466,467,468 fourhundredGigE0/111 110 400000 +Ethernet445 469,470,471,472 fourhundredGigE0/112 111 400000 +Ethernet449 361,362,363,364 fourhundredGigE0/113 112 400000 +Ethernet453 365,366,367,368 fourhundredGigE0/114 113 400000 +Ethernet457 489,490,491,492 fourhundredGigE0/115 114 400000 +Ethernet461 493,494,495,496 fourhundredGigE0/116 115 400000 +Ethernet465 481,482,483,484 fourhundredGigE0/117 116 400000 +Ethernet469 485,486,487,488 fourhundredGigE0/118 117 400000 +Ethernet473 377,378,379,380 fourhundredGigE0/119 118 400000 +Ethernet477 381,382,383,384 fourhundredGigE0/120 119 400000 +Ethernet481 505,506,507,508 fourhundredGigE0/121 120 400000 +Ethernet485 509,510,511,512 fourhundredGigE0/122 121 400000 +Ethernet489 497,498,499,500 fourhundredGigE0/123 122 400000 +Ethernet493 501,502,503,504 fourhundredGigE0/124 123 400000 +Ethernet497 9,10,11,12 fourhundredGigE0/125 124 400000 +Ethernet501 13,14,15,16 fourhundredGigE0/126 125 400000 +Ethernet505 1,2,3,4 fourhundredGigE0/127 126 400000 +Ethernet509 5,6,7,8 fourhundredGigE0/128 127 400000 diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/sai.profile b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/sai.profile new file mode 100644 index 00000000000..7bb477ebfaf --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-m2-w6940-128qc-128x400g-config.yml \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml new file mode 100644 index 00000000000..cba00ec82fc --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml @@ -0,0 +1,16226 @@ +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46205173 + RX_LANE_MAP: 0x46205173 + TX_POLARITY_FLIP: 0xf + RX_POLARITY_FLIP: 0x2 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37152046 + RX_LANE_MAP: 0x37152046 + TX_POLARITY_FLIP: 0xc9 + RX_POLARITY_FLIP: 0x1e + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x26043157 + RX_LANE_MAP: 0x26043157 + TX_POLARITY_FLIP: 0xf0 + RX_POLARITY_FLIP: 0xd7 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57314062 + RX_LANE_MAP: 0x57314062 + TX_POLARITY_FLIP: 0x9c + RX_POLARITY_FLIP: 0xe1 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47315062 + RX_LANE_MAP: 0x47315062 + TX_POLARITY_FLIP: 0x8d + RX_POLARITY_FLIP: 0x37 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x25371046 + RX_LANE_MAP: 0x25371046 + TX_POLARITY_FLIP: 0x4a + RX_POLARITY_FLIP: 0xca + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46107352 + RX_LANE_MAP: 0x46107352 + TX_POLARITY_FLIP: 0x4d + RX_POLARITY_FLIP: 0x4f + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46103572 + RX_LANE_MAP: 0x10462537 + TX_POLARITY_FLIP: 0x49 + RX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46107352 + RX_LANE_MAP: 0x46107352 + TX_POLARITY_FLIP: 0x4d + RX_POLARITY_FLIP: 0x4f + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10462375 + RX_LANE_MAP: 0x10462375 + TX_POLARITY_FLIP: 0xe1 + RX_POLARITY_FLIP: 0xa8 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46107352 + RX_LANE_MAP: 0x46107352 + TX_POLARITY_FLIP: 0x4d + RX_POLARITY_FLIP: 0x4f + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10462375 + RX_LANE_MAP: 0x10462375 + TX_POLARITY_FLIP: 0xe1 + RX_POLARITY_FLIP: 0xa8 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46107352 + RX_LANE_MAP: 0x46107352 + TX_POLARITY_FLIP: 0x4d + RX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10462375 + RX_LANE_MAP: 0x10462375 + TX_POLARITY_FLIP: 0xe1 + RX_POLARITY_FLIP: 0xa8 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46107352 + RX_LANE_MAP: 0x46107352 + TX_POLARITY_FLIP: 0x4d + RX_POLARITY_FLIP: 0x4f + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10462375 + RX_LANE_MAP: 0x10462375 + TX_POLARITY_FLIP: 0xe1 + RX_POLARITY_FLIP: 0xa8 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01463257 + RX_LANE_MAP: 0x01463257 + TX_POLARITY_FLIP: 0xcb + RX_POLARITY_FLIP: 0xa9 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x52734601 + RX_LANE_MAP: 0x52734601 + TX_POLARITY_FLIP: 0xb3 + RX_POLARITY_FLIP: 0x6e + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01463257 + RX_LANE_MAP: 0x01463257 + TX_POLARITY_FLIP: 0xcb + RX_POLARITY_FLIP: 0xa9 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x52734601 + RX_LANE_MAP: 0x52734601 + TX_POLARITY_FLIP: 0xb3 + RX_POLARITY_FLIP: 0x6e + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01463257 + RX_LANE_MAP: 0x01463257 + TX_POLARITY_FLIP: 0xcb + RX_POLARITY_FLIP: 0xa9 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x52734601 + RX_LANE_MAP: 0x52734601 + TX_POLARITY_FLIP: 0xb3 + RX_POLARITY_FLIP: 0x6e + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01463257 + RX_LANE_MAP: 0x01463257 + TX_POLARITY_FLIP: 0xcb + RX_POLARITY_FLIP: 0xa9 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x52734601 + RX_LANE_MAP: 0x52734601 + TX_POLARITY_FLIP: 0xb3 + RX_POLARITY_FLIP: 0x6e + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46015732 + RX_LANE_MAP: 0x46015732 + TX_POLARITY_FLIP: 0x3e + RX_POLARITY_FLIP: 0xf3 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x52734601 + RX_LANE_MAP: 0x52734601 + TX_POLARITY_FLIP: 0xb3 + RX_POLARITY_FLIP: 0x6e + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57324601 + RX_LANE_MAP: 0x57324601 + TX_POLARITY_FLIP: 0xe1 + RX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41507632 + RX_LANE_MAP: 0x41507632 + TX_POLARITY_FLIP: 0x8d + RX_POLARITY_FLIP: 0xcf + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x51734620 + RX_LANE_MAP: 0x51734620 + TX_POLARITY_FLIP: 0xc9 + RX_POLARITY_FLIP: 0xd1 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20463715 + RX_LANE_MAP: 0x20463715 + TX_POLARITY_FLIP: 0xff + RX_POLARITY_FLIP: 0x72 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x51734620 + RX_LANE_MAP: 0x51734620 + TX_POLARITY_FLIP: 0xc9 + RX_POLARITY_FLIP: 0x51 + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20463715 + RX_LANE_MAP: 0x20463715 + TX_POLARITY_FLIP: 0xff + RX_POLARITY_FLIP: 0x72 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x26043157 + RX_LANE_MAP: 0x26043157 + TX_POLARITY_FLIP: 0xff + RX_POLARITY_FLIP: 0x7 + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57314062 + RX_LANE_MAP: 0x57314062 + TX_POLARITY_FLIP: 0x9c + RX_POLARITY_FLIP: 0x81 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x26043157 + RX_LANE_MAP: 0x26043157 + TX_POLARITY_FLIP: 0xff + RX_POLARITY_FLIP: 0xa7 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57314062 + RX_LANE_MAP: 0x57314062 + TX_POLARITY_FLIP: 0x9c + RX_POLARITY_FLIP: 0x81 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45017263 + RX_LANE_MAP: 0x45017263 + TX_POLARITY_FLIP: 0x8e + RX_POLARITY_FLIP: 0x9e + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01463257 + RX_LANE_MAP: 0x01463257 + TX_POLARITY_FLIP: 0xb4 + RX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57324160 + RX_LANE_MAP: 0x57324160 + TX_POLARITY_FLIP: 0xe5 + RX_POLARITY_FLIP: 0x7b + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32570146 + RX_LANE_MAP: 0x32570146 + TX_POLARITY_FLIP: 0x43 + RX_POLARITY_FLIP: 0x30 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57324160 + RX_LANE_MAP: 0x57324160 + TX_POLARITY_FLIP: 0xe5 + RX_POLARITY_FLIP: 0x7b + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57324601 + RX_LANE_MAP: 0x57324601 + TX_POLARITY_FLIP: 0x1c + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57324160 + RX_LANE_MAP: 0x57324160 + TX_POLARITY_FLIP: 0xe5 + RX_POLARITY_FLIP: 0x7b + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57324601 + RX_LANE_MAP: 0x57324601 + TX_POLARITY_FLIP: 0x1c + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57324160 + RX_LANE_MAP: 0x57324160 + TX_POLARITY_FLIP: 0xe5 + RX_POLARITY_FLIP: 0x7b + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57324601 + RX_LANE_MAP: 0x57324601 + TX_POLARITY_FLIP: 0x1c + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57324160 + RX_LANE_MAP: 0x57324160 + TX_POLARITY_FLIP: 0xe5 + RX_POLARITY_FLIP: 0x7b + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57324601 + RX_LANE_MAP: 0x57324601 + TX_POLARITY_FLIP: 0x1c + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75234610 + RX_LANE_MAP: 0x75234610 + TX_POLARITY_FLIP: 0xb4 + RX_POLARITY_FLIP: 0x94 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x40617523 + RX_LANE_MAP: 0x40617523 + TX_POLARITY_FLIP: 0x2b + RX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75234610 + RX_LANE_MAP: 0x75234610 + TX_POLARITY_FLIP: 0xb4 + RX_POLARITY_FLIP: 0x94 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x40617523 + RX_LANE_MAP: 0x40617523 + TX_POLARITY_FLIP: 0x2b + RX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75234610 + RX_LANE_MAP: 0x75234610 + TX_POLARITY_FLIP: 0xb4 + RX_POLARITY_FLIP: 0x94 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x40617523 + RX_LANE_MAP: 0x40617523 + TX_POLARITY_FLIP: 0x2b + RX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75234610 + RX_LANE_MAP: 0x75234610 + TX_POLARITY_FLIP: 0xb4 + RX_POLARITY_FLIP: 0x94 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x40617523 + RX_LANE_MAP: 0x40617523 + TX_POLARITY_FLIP: 0x2b + RX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73524610 + RX_LANE_MAP: 0x73524610 + TX_POLARITY_FLIP: 0xd4 + RX_POLARITY_FLIP: 0xed + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x40617523 + RX_LANE_MAP: 0x40617523 + TX_POLARITY_FLIP: 0x2b + RX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23751604 + RX_LANE_MAP: 0x23751604 + TX_POLARITY_FLIP: 0x19 + RX_POLARITY_FLIP: 0x99 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41735620 + RX_LANE_MAP: 0x41735620 + TX_POLARITY_FLIP: 0x8b + RX_POLARITY_FLIP: 0xc + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20463715 + RX_LANE_MAP: 0x20463715 + TX_POLARITY_FLIP: 0x9c + RX_POLARITY_FLIP: 0xe1 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x51734620 + RX_LANE_MAP: 0x51734620 + TX_POLARITY_FLIP: 0xf0 + RX_POLARITY_FLIP: 0xa8 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20463715 + RX_LANE_MAP: 0x20463715 + TX_POLARITY_FLIP: 0x9c + RX_POLARITY_FLIP: 0xe9 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x51734620 + RX_LANE_MAP: 0x51734620 + TX_POLARITY_FLIP: 0xf0 + RX_POLARITY_FLIP: 0x20 +... + +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + # CPU port + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 5 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 7 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 11 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 15 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 17 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 24 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 26 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 28 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 35 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 37 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 39 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 46 + : + PC_PHYS_PORT_ID: 69 + ? + PORT_ID: 48 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 50 + : + PC_PHYS_PORT_ID: 77 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 57 + : + PC_PHYS_PORT_ID: 85 + ? + PORT_ID: 59 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 61 + : + PC_PHYS_PORT_ID: 93 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 101 + ? + PORT_ID: 70 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 72 + : + PC_PHYS_PORT_ID: 109 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 79 + : + PC_PHYS_PORT_ID: 117 + ? + PORT_ID: 81 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 83 + : + PC_PHYS_PORT_ID: 125 + ? + PORT_ID: 88 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 90 + : + PC_PHYS_PORT_ID: 133 + ? + PORT_ID: 92 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 94 + : + PC_PHYS_PORT_ID: 141 + ? + PORT_ID: 99 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 101 + : + PC_PHYS_PORT_ID: 149 + ? + PORT_ID: 103 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 105 + : + PC_PHYS_PORT_ID: 157 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 112 + : + PC_PHYS_PORT_ID: 165 + ? + PORT_ID: 114 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 116 + : + PC_PHYS_PORT_ID: 173 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 181 + ? + PORT_ID: 125 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 127 + : + PC_PHYS_PORT_ID: 189 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 134 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 136 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 138 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 145 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 147 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 149 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 154 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 156 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 158 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 160 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 167 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 169 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 171 + : + PC_PHYS_PORT_ID: 253 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 178 + : + PC_PHYS_PORT_ID: 261 + ? + PORT_ID: 180 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 182 + : + PC_PHYS_PORT_ID: 269 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 189 + : + PC_PHYS_PORT_ID: 277 + ? + PORT_ID: 191 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 193 + : + PC_PHYS_PORT_ID: 285 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 200 + : + PC_PHYS_PORT_ID: 293 + ? + PORT_ID: 202 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 204 + : + PC_PHYS_PORT_ID: 301 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 211 + : + PC_PHYS_PORT_ID: 309 + ? + PORT_ID: 213 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 215 + : + PC_PHYS_PORT_ID: 317 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 222 + : + PC_PHYS_PORT_ID: 325 + ? + PORT_ID: 224 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 226 + : + PC_PHYS_PORT_ID: 333 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 233 + : + PC_PHYS_PORT_ID: 341 + ? + PORT_ID: 235 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 237 + : + PC_PHYS_PORT_ID: 349 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 244 + : + PC_PHYS_PORT_ID: 357 + ? + PORT_ID: 246 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 248 + : + PC_PHYS_PORT_ID: 365 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 373 + ? + PORT_ID: 257 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 259 + : + PC_PHYS_PORT_ID: 381 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 266 + : + PC_PHYS_PORT_ID: 389 + ? + PORT_ID: 268 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 270 + : + PC_PHYS_PORT_ID: 397 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 277 + : + PC_PHYS_PORT_ID: 405 + ? + PORT_ID: 279 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 281 + : + PC_PHYS_PORT_ID: 413 + ? + PORT_ID: 286 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 288 + : + PC_PHYS_PORT_ID: 421 + ? + PORT_ID: 290 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 292 + : + PC_PHYS_PORT_ID: 429 + ? + PORT_ID: 297 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 299 + : + PC_PHYS_PORT_ID: 437 + ? + PORT_ID: 301 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 303 + : + PC_PHYS_PORT_ID: 445 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 310 + : + PC_PHYS_PORT_ID: 453 + ? + PORT_ID: 312 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 314 + : + PC_PHYS_PORT_ID: 461 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 321 + : + PC_PHYS_PORT_ID: 469 + ? + PORT_ID: 323 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 325 + : + PC_PHYS_PORT_ID: 477 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 332 + : + PC_PHYS_PORT_ID: 485 + ? + PORT_ID: 334 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 336 + : + PC_PHYS_PORT_ID: 493 + ? + PORT_ID: 341 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 343 + : + PC_PHYS_PORT_ID: 501 + ? + PORT_ID: 345 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 347 + : + PC_PHYS_PORT_ID: 509 +... + +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 0 + : + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [1, 3, 5, 7, 11, 13, 15, 17, 22, 24, 26, 28, 33, 35, 37, 39, 44, 46, 48, 50, 55, 57, 59, 61, 66, 68, 70, 72, 77, 79, 81, 83, 88, 90, 92, 94, 99, 101, 103, 105, 110, 112, 114, 116, 121, 123, 125, 127, 132, 134, 136, 138, 143, 145, 147, 149, 154, 156, 158, 160, 165, 167, 169, 171, 176, 178, 180, 182, 187, 189, 191, 193, 198, 200, 202, 204, 209, 211, 213, 215, 220, 222, 224, 226, 231, 233, 235, 237, 242, 244, 246, 248, 253, 255, 257, 259, 264, 266, 268, 270, 275, 277, 279, 281, 286, 288, 290, 292, 297, 299, 301, 303, 308, 310, 312, 314, 319, 321, 323, 325, 330, 332, 334, 336, 341, 343, 345, 347] + : + ENABLE: 1 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 +... + +--- +device: + 0: + PC_PMD_FIRMWARE: + ? + PORT_ID: [1, 3, 5, 7, 11, 13, 15, 17, 22, 24, 26, 28, 33, 35, 37, 39, 44, 46, 48, 50, 55, 57, 59, 61, 66, 68, 70, 72, 77, 79, 81, 83, 88, 90, 92, 94, 99, 101, 103, 105, 110, 112, 114, 116, 121, 123, 125, 127, 132, 134, 136, 138, 143, 145, 147, 149, 154, 156, 158, 160, 165, 167, 169, 171, 176, 178, 180, 182, 187, 189, 191, 193, 198, 200, 202, 204, 209, 211, 213, 215, 220, 222, 224, 226, 231, 233, 235, 237, 242, 244, 246, 248, 253, 255, 257, 259, 264, 266, 268, 270, 275, 277, 279, 281, 286, 288, 290, 292, 297, 299, 301, 303, 308, 310, 312, 314, 319, 321, 323, 325, 330, 332, 334, 336, 341, 343, 345, 347] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE +... + +--- +device: + 0: + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... +--- +device: + 0: + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +bcm_device: + 0: + global: + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 2048 + l3_alpm_template: 2 + l3_alpm2_bnk_threshold: 100 + uft_mode: 1 + l3_enable: 1 + l2_hitbit_enable: 0 + pktio_mode: 1 + sai_pfc_defaults_disable: 1 + sai_optimized_mmu: 1 + sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc +... + +--- +bcm_device: + 0: + port: + "*": + encap_mode: IEEE + dport_map_enable: 1 + 11: + dport_map_port: 1 + 12: + dport_map_port: 2 + 13: + dport_map_port: 3 + 14: + dport_map_port: 4 + 15: + dport_map_port: 5 + 16: + dport_map_port: 6 + 17: + dport_map_port: 7 + 18: + dport_map_port: 8 + 88: + dport_map_port: 9 + 89: + dport_map_port: 10 + 90: + dport_map_port: 11 + 91: + dport_map_port: 12 + 26: + dport_map_port: 13 + 27: + dport_map_port: 14 + 28: + dport_map_port: 15 + 29: + dport_map_port: 16 + 37: + dport_map_port: 17 + 38: + dport_map_port: 18 + 39: + dport_map_port: 19 + 40: + dport_map_port: 20 + 99: + dport_map_port: 21 + 100: + dport_map_port: 22 + 101: + dport_map_port: 23 + 102: + dport_map_port: 24 + 92: + dport_map_port: 25 + 93: + dport_map_port: 26 + 94: + dport_map_port: 27 + 95: + dport_map_port: 28 + 22: + dport_map_port: 29 + 23: + dport_map_port: 30 + 24: + dport_map_port: 31 + 25: + dport_map_port: 32 + 110: + dport_map_port: 33 + 111: + dport_map_port: 34 + 112: + dport_map_port: 35 + 113: + dport_map_port: 36 + 103: + dport_map_port: 37 + 104: + dport_map_port: 38 + 105: + dport_map_port: 39 + 106: + dport_map_port: 40 + 33: + dport_map_port: 41 + 34: + dport_map_port: 42 + 35: + dport_map_port: 43 + 36: + dport_map_port: 44 + 121: + dport_map_port: 45 + 122: + dport_map_port: 46 + 123: + dport_map_port: 47 + 124: + dport_map_port: 48 + 114: + dport_map_port: 49 + 115: + dport_map_port: 50 + 116: + dport_map_port: 51 + 117: + dport_map_port: 52 + 44: + dport_map_port: 53 + 45: + dport_map_port: 54 + 46: + dport_map_port: 55 + 47: + dport_map_port: 56 + 143: + dport_map_port: 57 + 144: + dport_map_port: 58 + 145: + dport_map_port: 59 + 146: + dport_map_port: 60 + 125: + dport_map_port: 61 + 126: + dport_map_port: 62 + 127: + dport_map_port: 63 + 128: + dport_map_port: 64 + 55: + dport_map_port: 65 + 56: + dport_map_port: 66 + 57: + dport_map_port: 67 + 58: + dport_map_port: 68 + 132: + dport_map_port: 69 + 133: + dport_map_port: 70 + 134: + dport_map_port: 71 + 135: + dport_map_port: 72 + 136: + dport_map_port: 73 + 137: + dport_map_port: 74 + 138: + dport_map_port: 75 + 139: + dport_map_port: 76 + 66: + dport_map_port: 77 + 67: + dport_map_port: 78 + 68: + dport_map_port: 79 + 69: + dport_map_port: 80 + 81: + dport_map_port: 81 + 82: + dport_map_port: 82 + 83: + dport_map_port: 83 + 84: + dport_map_port: 84 + 147: + dport_map_port: 85 + 148: + dport_map_port: 86 + 149: + dport_map_port: 87 + 150: + dport_map_port: 88 + 77: + dport_map_port: 89 + 78: + dport_map_port: 90 + 79: + dport_map_port: 91 + 80: + dport_map_port: 92 + 70: + dport_map_port: 93 + 71: + dport_map_port: 94 + 72: + dport_map_port: 95 + 73: + dport_map_port: 96 + 154: + dport_map_port: 97 + 155: + dport_map_port: 98 + 156: + dport_map_port: 99 + 157: + dport_map_port: 100 + 158: + dport_map_port: 101 + 159: + dport_map_port: 102 + 160: + dport_map_port: 103 + 161: + dport_map_port: 104 + 59: + dport_map_port: 105 + 60: + dport_map_port: 106 + 61: + dport_map_port: 107 + 62: + dport_map_port: 108 + 165: + dport_map_port: 109 + 166: + dport_map_port: 110 + 167: + dport_map_port: 111 + 168: + dport_map_port: 112 + 169: + dport_map_port: 113 + 170: + dport_map_port: 114 + 171: + dport_map_port: 115 + 172: + dport_map_port: 116 + 48: + dport_map_port: 117 + 49: + dport_map_port: 118 + 50: + dport_map_port: 119 + 51: + dport_map_port: 120 + 176: + dport_map_port: 121 + 177: + dport_map_port: 122 + 178: + dport_map_port: 123 + 179: + dport_map_port: 124 + 180: + dport_map_port: 125 + 181: + dport_map_port: 126 + 182: + dport_map_port: 127 + 183: + dport_map_port: 128 + 297: + dport_map_port: 129 + 298: + dport_map_port: 130 + 299: + dport_map_port: 131 + 300: + dport_map_port: 132 + 187: + dport_map_port: 133 + 188: + dport_map_port: 134 + 189: + dport_map_port: 135 + 190: + dport_map_port: 136 + 191: + dport_map_port: 137 + 192: + dport_map_port: 138 + 193: + dport_map_port: 139 + 194: + dport_map_port: 140 + 286: + dport_map_port: 141 + 287: + dport_map_port: 142 + 288: + dport_map_port: 143 + 289: + dport_map_port: 144 + 268: + dport_map_port: 145 + 269: + dport_map_port: 146 + 270: + dport_map_port: 147 + 271: + dport_map_port: 148 + 198: + dport_map_port: 149 + 199: + dport_map_port: 150 + 200: + dport_map_port: 151 + 201: + dport_map_port: 152 + 275: + dport_map_port: 153 + 276: + dport_map_port: 154 + 277: + dport_map_port: 155 + 278: + dport_map_port: 156 + 279: + dport_map_port: 157 + 280: + dport_map_port: 158 + 281: + dport_map_port: 159 + 282: + dport_map_port: 160 + 209: + dport_map_port: 161 + 210: + dport_map_port: 162 + 211: + dport_map_port: 163 + 212: + dport_map_port: 164 + 264: + dport_map_port: 165 + 265: + dport_map_port: 166 + 266: + dport_map_port: 167 + 267: + dport_map_port: 168 + 290: + dport_map_port: 169 + 291: + dport_map_port: 170 + 292: + dport_map_port: 171 + 293: + dport_map_port: 172 + 220: + dport_map_port: 173 + 221: + dport_map_port: 174 + 222: + dport_map_port: 175 + 223: + dport_map_port: 176 + 213: + dport_map_port: 177 + 214: + dport_map_port: 178 + 215: + dport_map_port: 179 + 216: + dport_map_port: 180 + 301: + dport_map_port: 181 + 302: + dport_map_port: 182 + 303: + dport_map_port: 183 + 304: + dport_map_port: 184 + 231: + dport_map_port: 185 + 232: + dport_map_port: 186 + 233: + dport_map_port: 187 + 234: + dport_map_port: 188 + 202: + dport_map_port: 189 + 203: + dport_map_port: 190 + 204: + dport_map_port: 191 + 205: + dport_map_port: 192 + 312: + dport_map_port: 193 + 313: + dport_map_port: 194 + 314: + dport_map_port: 195 + 315: + dport_map_port: 196 + 242: + dport_map_port: 197 + 243: + dport_map_port: 198 + 244: + dport_map_port: 199 + 245: + dport_map_port: 200 + 224: + dport_map_port: 201 + 225: + dport_map_port: 202 + 226: + dport_map_port: 203 + 227: + dport_map_port: 204 + 323: + dport_map_port: 205 + 324: + dport_map_port: 206 + 325: + dport_map_port: 207 + 326: + dport_map_port: 208 + 253: + dport_map_port: 209 + 254: + dport_map_port: 210 + 255: + dport_map_port: 211 + 256: + dport_map_port: 212 + 235: + dport_map_port: 213 + 236: + dport_map_port: 214 + 237: + dport_map_port: 215 + 238: + dport_map_port: 216 + 308: + dport_map_port: 217 + 309: + dport_map_port: 218 + 310: + dport_map_port: 219 + 311: + dport_map_port: 220 + 319: + dport_map_port: 221 + 320: + dport_map_port: 222 + 321: + dport_map_port: 223 + 322: + dport_map_port: 224 + 246: + dport_map_port: 225 + 247: + dport_map_port: 226 + 248: + dport_map_port: 227 + 249: + dport_map_port: 228 + 334: + dport_map_port: 229 + 335: + dport_map_port: 230 + 336: + dport_map_port: 231 + 337: + dport_map_port: 232 + 330: + dport_map_port: 233 + 331: + dport_map_port: 234 + 332: + dport_map_port: 235 + 333: + dport_map_port: 236 + 257: + dport_map_port: 237 + 258: + dport_map_port: 238 + 259: + dport_map_port: 239 + 260: + dport_map_port: 240 + 345: + dport_map_port: 241 + 346: + dport_map_port: 242 + 347: + dport_map_port: 243 + 348: + dport_map_port: 244 + 341: + dport_map_port: 245 + 342: + dport_map_port: 246 + 343: + dport_map_port: 247 + 344: + dport_map_port: 248 + 5: + dport_map_port: 249 + 6: + dport_map_port: 250 + 7: + dport_map_port: 251 + 8: + dport_map_port: 252 + 1: + dport_map_port: 253 + 2: + dport_map_port: 254 + 3: + dport_map_port: 255 + 4: + dport_map_port: 256 +... + +--- +device: + 0: + PC_TX_TAPS: + ? + PORT_ID: 88 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 124 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 6 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 90 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 90 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 90 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 90 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 101 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 101 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 101 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 101 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 6 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 112 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 112 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 112 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 112 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 123 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 123 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 123 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 123 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 145 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 145 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 145 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 145 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 134 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 134 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 134 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 134 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 6 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 6 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 83 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 83 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 83 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 83 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 72 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 72 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 72 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 72 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 61 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 61 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 61 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 61 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 50 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 50 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 50 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 50 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 299 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 299 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 299 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 299 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 6 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 288 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 288 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 288 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 288 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 6 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 277 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 277 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 277 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 277 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 266 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 266 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 266 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 266 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 215 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 215 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 215 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 215 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 204 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 204 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 204 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 204 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 226 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 226 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 226 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 226 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 237 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 237 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 237 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 237 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 248 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 248 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 248 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 248 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 259 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 259 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 259 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 259 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 13 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 13 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 13 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 13 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 17 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 17 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 17 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 17 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 28 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 28 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 28 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 28 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 39 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 39 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 39 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 39 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 94 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 94 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 94 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 94 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 24 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 24 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 24 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 24 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 105 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 105 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 105 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 105 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 35 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 35 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 35 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 35 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 116 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 116 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 116 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 116 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 46 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 46 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 46 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 46 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 127 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 127 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 127 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 127 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 57 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 57 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 57 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 57 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 138 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 138 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 138 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 138 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 68 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 68 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 68 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 68 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 149 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 149 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 149 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 149 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 79 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 79 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 79 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 79 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 156 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 156 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 156 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 156 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 160 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 160 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 160 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 160 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 167 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 167 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 167 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 167 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 171 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 171 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 171 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 171 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 178 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 178 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 178 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 178 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 182 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 182 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 182 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 182 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 189 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 189 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 189 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 189 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 193 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 193 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 193 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 193 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 270 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 270 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 270 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 270 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 200 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 200 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 200 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 200 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 281 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 281 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 281 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 281 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 211 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 211 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 211 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 211 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 292 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 292 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 292 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 292 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 222 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 222 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 222 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 222 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 303 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 303 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 303 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 303 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 233 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 233 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 233 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 233 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 314 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 314 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 314 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 314 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 244 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 244 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 244 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 244 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 325 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 325 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 325 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 325 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 255 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 255 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 255 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 255 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 310 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 310 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 310 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 310 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 321 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 321 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 321 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 321 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 336 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 336 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 336 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 336 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 332 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 332 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 332 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 332 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 347 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 347 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 347 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 347 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 343 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 343 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 343 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 343 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 7 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 7 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 7 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 7 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 3 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 3 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 3 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 + ? + PORT_ID: 3 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 36 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 128 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_POST3_SIGN: 0 + TX_POST3_AUTO: 0 + TX_POST3: 0 +... diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6940-128qc-r0/custom_led.bin new file mode 100644 index 00000000000..c6bb453fff8 Binary files /dev/null and b/device/micas/x86_64-micas_m2-w6940-128qc-r0/custom_led.bin differ diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/default_sku b/device/micas/x86_64-micas_m2-w6940-128qc-r0/default_sku new file mode 100644 index 00000000000..cfa928b0da0 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/default_sku @@ -0,0 +1 @@ +M2-W6940-128QC l2 diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/dev.xml b/device/micas/x86_64-micas_m2-w6940-128qc-r0/dev.xml new file mode 100644 index 00000000000..b5267e84b15 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/dev.xml @@ -0,0 +1,11 @@ + + + + + + diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/fru.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/fru.py new file mode 100755 index 00000000000..f95164e0360 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/fru.py @@ -0,0 +1,961 @@ +#!/usr/bin/python3 +import collections +from datetime import datetime, timedelta +from bitarray import bitarray + + +__DEBUG__ = "N" + + +class FruException(Exception): + def __init__(self, message='fruerror', code=-100): + err = 'errcode: {0} message:{1}'.format(code, message) + Exception.__init__(self, err) + self.code = code + self.message = message + + +def e_print(err): + print("ERROR: " + err) + + +def d_print(debug_info): + if __DEBUG__ == "Y": + print(debug_info) + + +class FruUtil(): + @staticmethod + def decodeLength(value): + a = bitarray(8) + a.setall(True) + a[0:1] = 0 + a[1:2] = 0 + x = ord(a.tobytes()) + return x & ord(value) + + @staticmethod + def minToData(): + starttime = datetime(1996, 1, 1, 0, 0, 0) + endtime = datetime.now() + seconds = (endtime - starttime).total_seconds() + mins = seconds // 60 + m = int(round(mins)) + return m + + @staticmethod + def getTimeFormat(): + return datetime.now().strftime('%Y-%m-%d') + + @staticmethod + def getTypeLength(value): + if value is None or len(value) == 0: + return 0 + a = bitarray(8) + a.setall(False) + a[0:1] = 1 + a[1:2] = 1 + x = ord(a.tobytes()) + return x | len(value) + + @staticmethod + def checksum(b): + result = 0 + for item in b: + result += ord(item) + return (0x100 - (result & 0xff)) & 0xff + + +class BaseArea(object): + SUGGESTED_SIZE_COMMON_HEADER = 8 + SUGGESTED_SIZE_INTERNAL_USE_AREA = 72 + SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32 + SUGGESTED_SIZE_BOARD_INFO_AREA = 80 + SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80 + + INITVALUE = b'\x00' + resultvalue = INITVALUE * 256 + COMMON_HEAD_VERSION = b'\x01' + __childList = None + + def __init__(self, name="", size=0, offset=0): + self.__childList = [] + self._offset = offset + self.name = name + self._size = size + self._isPresent = False + self._data = b'\x00' * size + + @property + def childList(self): + return self.__childList + + @childList.setter + def childList(self, value): + self.__childList = value + + @property + def offset(self): + return self._offset + + @offset.setter + def offset(self, value): + self._offset = value + + @property + def size(self): + return self._size + + @size.setter + def size(self, value): + self._size = value + + @property + def data(self): + return self._data + + @data.setter + def data(self, value): + self._data = value + + @property + def isPresent(self): + return self._isPresent + + @isPresent.setter + def isPresent(self, value): + self._isPresent = value + + +class InternalUseArea(BaseArea): + pass + + +class ChassisInfoArea(BaseArea): + pass + + +class BoardInfoArea(BaseArea): + _boardTime = None + _fields = None + _mfg_date = None + areaversion = None + _boardversion = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "mfg_date : %s \n" \ + "boardManufacturer : %s \n" \ + "boardProductName : %s \n" \ + "boardSerialNumber : %s \n" \ + "boardPartNumber : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.boardversion), self.size, + self.language, self.getMfgRealData(), + self.boardManufacturer, self.boardProductName, + self.boardSerialNumber, self.boardPartNumber, + self.fruFileId) + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "boardextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["boardversion"] = ord(self.boardversion) + dic["boardlength"] = self.size + dic["boardlanguage"] = self.language + dic["boardmfg_date"] = self.getMfgRealData() + dic["boardManufacturer"] = self.boardManufacturer + dic["boardProductName"] = self.boardProductName + dic["boardSerialNumber"] = self.boardSerialNumber + dic["boardPartNumber"] = self.boardPartNumber + dic["boardfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] + index += 1 + d_print("decode length :%d class size:%d" % + ((ord(self.data[index]) * 8), self.size)) + index += 2 + + timetmp = self.data[index: index + 3] + self.mfg_date = ord(timetmp[0]) | ( + ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16) + d_print("decode getMfgRealData :%s" % self.getMfgRealData()) + index += 3 + + templen = FruUtil.decodeLength(self.data[index]) + self.boardManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardManufacturer:%s" % self.boardManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardProductName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardProductName:%s" % self.boardProductName) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardSerialNumber:%s" % self.boardSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardPartNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardPartNumber:%s" % self.boardPartNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if self.data[index] != chr(0xc1): + templen = FruUtil.decodeLength(self.data[index]) + tmpval = self.data[index + 1: index + templen + 1] + setattr(self, valtmp, tmpval) + index += templen + 1 + d_print("decode boardextra%d:%s" % (i, tmpval)) + else: + break + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("boardInfoArea version:%x" % ord(self.boardversion)) + d_print("boardInfoArea length:%d" % self.size) + d_print("boardInfoArea language:%x" % self.language) + self.mfg_date = FruUtil.minToData() + d_print("boardInfoArea mfg_date:%x" % self.mfg_date) + + self.data = chr(ord(self.boardversion)) + \ + chr(self.size // 8) + chr(self.language) + + self.data += chr(self.mfg_date & 0xFF) + self.data += chr((self.mfg_date >> 8) & 0xFF) + self.data += chr((self.mfg_date >> 16) & 0xFF) + + d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer) + typelength = FruUtil.getTypeLength(self.boardManufacturer) + self.data += chr(typelength) + self.data += self.boardManufacturer + + d_print("boardInfoArea boardProductName:%s" % self.boardProductName) + self.data += chr(FruUtil.getTypeLength(self.boardProductName)) + self.data += self.boardProductName + + d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber) + self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber)) + self.data += self.boardSerialNumber + + d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber) + self.data += chr(FruUtil.getTypeLength(self.boardPartNumber)) + self.data += self.boardPartNumber + + d_print("boardInfoArea fruFileId:%s" % self.fruFileId) + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + d_print("self data:%d" % len(self.data)) + d_print("self size:%d" % self.size) + d_print("adjust size:%d" % (self.size - len(self.data) - 1)) + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + + # checksum + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + def getMfgRealData(self): + starttime = datetime(1996, 1, 1, 0, 0, 0) + mactime = starttime + timedelta(minutes=self.mfg_date) + return mactime + + @property + def language(self): + self._language = 25 + return self._language + + @property + def mfg_date(self): + return self._mfg_date + + @mfg_date.setter + def mfg_date(self, val): + self._mfg_date = val + + @property + def boardversion(self): + self._boardversion = self.COMMON_HEAD_VERSION + return self._boardversion + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, val): + self._FRUFileID = val + + @property + def boardPartNumber(self): + return self._boardPartNumber + + @boardPartNumber.setter + def boardPartNumber(self, val): + self._boardPartNumber = val + + @property + def boardSerialNumber(self): + return self._boardSerialNumber + + @boardSerialNumber.setter + def boardSerialNumber(self, val): + self._boardSerialNumber = val + + @property + def boardProductName(self): + return self._boradProductName + + @boardProductName.setter + def boardProductName(self, val): + self._boradProductName = val + + @property + def boardManufacturer(self): + return self._boardManufacturer + + @boardManufacturer.setter + def boardManufacturer(self, val): + self._boardManufacturer = val + + @property + def boardTime(self): + return self._boardTime + + @boardTime.setter + def boardTime(self, val): + self._boardTime = val + + @property + def fields(self): + return self._fields + + @fields.setter + def fields(self, val): + self._fields = val + + +class ProductInfoArea(BaseArea): + _productManufacturer = None + _productAssetTag = None + _FRUFileID = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "productManufacturer : %s \n" \ + "productName : %s \n" \ + "productPartModelName: %s \n" \ + "productVersion : %s \n" \ + "productSerialNumber : %s \n" \ + "productAssetTag : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.areaversion), self.size, + self.language, self.productManufacturer, + self.productName, self.productPartModelName, + self.productVersion, self.productSerialNumber, + self.productAssetTag, self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "productextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["productversion"] = ord(self.areaversion) + dic["productlength"] = self.size + dic["productlanguage"] = self.language + dic["productManufacturer"] = self.productManufacturer + dic["productName"] = self.productName + dic["productPartModelName"] = self.productPartModelName + dic["productVersion"] = int(self.productVersion, 16) + dic["productSerialNumber"] = self.productSerialNumber + dic["productAssetTag"] = self.productAssetTag + dic["productfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] # 0 + index += 1 + d_print("decode length %d" % (ord(self.data[index]) * 8)) + d_print("class size %d" % self.size) + index += 2 + + templen = FruUtil.decodeLength(self.data[index]) + self.productManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productManufacturer:%s" % self.productManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.productName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productName:%s" % self.productName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productPartModelName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productPartModelName:%s" % self.productPartModelName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productVersion = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productVersion:%s" % self.productVersion) + + templen = FruUtil.decodeLength(self.data[index]) + self.productSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productSerialNumber:%s" % self.productSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.productAssetTag = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productAssetTag:%s" % self.productAssetTag) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if self.data[index] != chr(0xc1) and index < self.size - 1: + templen = FruUtil.decodeLength(self.data[index]) + if templen == 0: + break + tmpval = self.data[index + 1: index + templen + 1] + d_print("decode boardextra%d:%s" % (i, tmpval)) + setattr(self, valtmp, tmpval) + index += templen + 1 + else: + break + + @property + def productVersion(self): + return self._productVersion + + @productVersion.setter + def productVersion(self, name): + self._productVersion = name + + @property + def areaversion(self): + self._areaversion = self.COMMON_HEAD_VERSION + return self._areaversion + + @areaversion.setter + def areaversion(self, name): + self._areaversion = name + + @property + def language(self): + self._language = 25 + return self._language + + @property + def productManufacturer(self): + return self._productManufacturer + + @productManufacturer.setter + def productManufacturer(self, name): + self._productManufacturer = name + + @property + def productName(self): + return self._productName + + @productName.setter + def productName(self, name): + self._productName = name + + @property + def productPartModelName(self): + return self._productPartModelName + + @productPartModelName.setter + def productPartModelName(self, name): + self._productPartModelName = name + + @property + def productSerialNumber(self): + return self._productSerialNumber + + @productSerialNumber.setter + def productSerialNumber(self, name): + self._productSerialNumber = name + + @property + def productAssetTag(self): + return self._productAssetTag + + @productAssetTag.setter + def productAssetTag(self, name): + self._productAssetTag = name + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, name): + self._FRUFileID = name + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("product version:%x" % ord(self.areaversion)) + d_print("product length:%d" % self.size) + d_print("product language:%x" % self.language) + self.data = chr(ord(self.areaversion)) + \ + chr(self.size // 8) + chr(self.language) + + typelength = FruUtil.getTypeLength(self.productManufacturer) + self.data += chr(typelength) + self.data += self.productManufacturer + + self.data += chr(FruUtil.getTypeLength(self.productName)) + self.data += self.productName + + self.data += chr(FruUtil.getTypeLength(self.productPartModelName)) + self.data += self.productPartModelName + + self.data += chr(FruUtil.getTypeLength(self.productVersion)) + self.data += self.productVersion + + self.data += chr(FruUtil.getTypeLength(self.productSerialNumber)) + self.data += self.productSerialNumber + + self.data += chr(FruUtil.getTypeLength(self.productAssetTag)) + if self.productAssetTag is not None: + self.data += self.productAssetTag + + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea productextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + d_print("self.data:%d" % len(self.data)) + d_print("self.size:%d" % self.size) + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + +class MultiRecordArea(BaseArea): + pass + + +class Field(object): + + def __init__(self, fieldType="ASCII", fieldData=""): + self.fieldData = fieldData + self.fieldType = fieldType + + @property + def fieldType(self): + return self.fieldType + + @property + def fieldData(self): + return self.fieldData + + +class ipmifru(BaseArea): + _BoardInfoArea = None + _ProductInfoArea = None + _InternalUseArea = None + _ChassisInfoArea = None + _multiRecordArea = None + _productinfoAreaOffset = BaseArea.INITVALUE + _boardInfoAreaOffset = BaseArea.INITVALUE + _internalUserAreaOffset = BaseArea.INITVALUE + _chassicInfoAreaOffset = BaseArea.INITVALUE + _multiRecordAreaOffset = BaseArea.INITVALUE + _bindata = None + _bodybin = None + _version = BaseArea.COMMON_HEAD_VERSION + _zeroCheckSum = None + _frusize = 256 + + def __str__(self): + tmpstr = "" + if self.boardInfoArea.isPresent: + tmpstr += "\nboardinfoarea: \n" + tmpstr += self.boardInfoArea.__str__() + if self.productInfoArea.isPresent: + tmpstr += "\nproductinfoarea: \n" + tmpstr += self.productInfoArea.__str__() + return tmpstr + + def decodeBin(self, eeprom): + commonHead = eeprom[0:8] + d_print("decode version %x" % ord(commonHead[0])) + if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]): + raise FruException("HEAD VERSION error,not Fru format!", -10) + if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]): + strtemp = "check header checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(commonHead[0:7]), ord(commonHead[7])) + raise FruException(strtemp, -3) + if ord(commonHead[1]) != ord(self.INITVALUE): + d_print("Internal Use Area is present") + self.internalUseArea = InternalUseArea( + name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA) + self.internalUseArea.isPresent = True + self.internalUserAreaOffset = ord(commonHead[1]) + self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: ( + self.internalUserAreaOffset * 8 + self.internalUseArea.size)] + if ord(commonHead[2]) != ord(self.INITVALUE): + d_print("Chassis Info Area is present") + self.chassisInfoArea = ChassisInfoArea( + name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA) + self.chassisInfoArea.isPresent = True + self.chassicInfoAreaOffset = ord(commonHead[2]) + self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: ( + self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)] + if ord(commonHead[3]) != ord(self.INITVALUE): + self.boardInfoArea = BoardInfoArea( + name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA) + self.boardInfoArea.isPresent = True + self.boardInfoAreaOffset = ord(commonHead[3]) + self.boardInfoArea.size = ord( + eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8 + d_print("Board Info Area is present size:%d" % + (self.boardInfoArea.size)) + self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: ( + self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)] + if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]): + strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \ + (FruUtil.checksum( + self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.boardInfoArea.decodedata() + if ord(commonHead[4]) != ord(self.INITVALUE): + d_print("Product Info Area is present") + self.productInfoArea = ProductInfoArea( + name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA) + self.productInfoArea.isPresent = True + self.productinfoAreaOffset = ord(commonHead[4]) + d_print("length offset value: %02x" % + ord(eeprom[self.productinfoAreaOffset * 8 + 1])) + self.productInfoArea.size = ord( + eeprom[self.productinfoAreaOffset * 8 + 1]) * 8 + d_print("Product Info Area is present size:%d" % + (self.productInfoArea.size)) + + self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: ( + self.productinfoAreaOffset * 8 + self.productInfoArea.size)] + if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]): + strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.productInfoArea.decodedata() + if ord(commonHead[5]) != ord(self.INITVALUE): + self.multiRecordArea = MultiRecordArea( + name="MultiRecord record Area ") + d_print("MultiRecord record present") + self.multiRecordArea.isPresent = True + self.multiRecordAreaOffset = ord(commonHead[5]) + self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: ( + self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)] + + def initDefault(self): + self.version = self.COMMON_HEAD_VERSION + self.internalUserAreaOffset = self.INITVALUE + self.chassicInfoAreaOffset = self.INITVALUE + self.boardInfoAreaOffset = self.INITVALUE + self.productinfoAreaOffset = self.INITVALUE + self.multiRecordAreaOffset = self.INITVALUE + self.zeroCheckSum = self.INITVALUE + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + self.productInfoArea = None + self.internalUseArea = None + self.boardInfoArea = None + self.chassisInfoArea = None + self.multiRecordArea = None + # self.recalcute() + + @property + def version(self): + return self._version + + @version.setter + def version(self, name): + self._version = name + + @property + def internalUserAreaOffset(self): + return self._internalUserAreaOffset + + @internalUserAreaOffset.setter + def internalUserAreaOffset(self, obj): + self._internalUserAreaOffset = obj + + @property + def chassicInfoAreaOffset(self): + return self._chassicInfoAreaOffset + + @chassicInfoAreaOffset.setter + def chassicInfoAreaOffset(self, obj): + self._chassicInfoAreaOffset = obj + + @property + def productinfoAreaOffset(self): + return self._productinfoAreaOffset + + @productinfoAreaOffset.setter + def productinfoAreaOffset(self, obj): + self._productinfoAreaOffset = obj + + @property + def boardInfoAreaOffset(self): + return self._boardInfoAreaOffset + + @boardInfoAreaOffset.setter + def boardInfoAreaOffset(self, obj): + self._boardInfoAreaOffset = obj + + @property + def multiRecordAreaOffset(self): + return self._multiRecordAreaOffset + + @multiRecordAreaOffset.setter + def multiRecordAreaOffset(self, obj): + self._multiRecordAreaOffset = obj + + @property + def zeroCheckSum(self): + return self._zeroCheckSum + + @zeroCheckSum.setter + def zeroCheckSum(self, obj): + self._zeroCheckSum = obj + + @property + def productInfoArea(self): + return self._ProductInfoArea + + @productInfoArea.setter + def productInfoArea(self, obj): + self._ProductInfoArea = obj + + @property + def internalUseArea(self): + return self._InternalUseArea + + @internalUseArea.setter + def internalUseArea(self, obj): + self.internalUseArea = obj + + @property + def boardInfoArea(self): + return self._BoardInfoArea + + @boardInfoArea.setter + def boardInfoArea(self, obj): + self._BoardInfoArea = obj + + @property + def chassisInfoArea(self): + return self._ChassisInfoArea + + @chassisInfoArea.setter + def chassisInfoArea(self, obj): + self._ChassisInfoArea = obj + + @property + def multiRecordArea(self): + return self._multiRecordArea + + @multiRecordArea.setter + def multiRecordArea(self, obj): + self._multiRecordArea = obj + + @property + def bindata(self): + return self._bindata + + @bindata.setter + def bindata(self, obj): + self._bindata = obj + + @property + def bodybin(self): + return self._bodybin + + @bodybin.setter + def bodybin(self, obj): + self._bodybin = obj + + def recalcuteCommonHead(self): + self.bindata = "" + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + d_print("common Header %d" % self.offset) + d_print("fru eeprom size %d" % self._frusize) + if self.internalUseArea is not None and self.internalUseArea.isPresent: + self.internalUserAreaOffset = self.offset // 8 + self.offset += self.internalUseArea.size + d_print("internalUseArea is present offset:%d" % self.offset) + + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + self.chassicInfoAreaOffset = self.offset // 8 + self.offset += self.chassisInfoArea.size + d_print("chassisInfoArea is present offset:%d" % self.offset) + + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + self.boardInfoAreaOffset = self.offset // 8 + self.offset += self.boardInfoArea.size + d_print("boardInfoArea is present offset:%d" % self.offset) + d_print("boardInfoArea is present size:%d" % + self.boardInfoArea.size) + + if self.productInfoArea is not None and self.productInfoArea.isPresent: + self.productinfoAreaOffset = self.offset // 8 + self.offset += self.productInfoArea.size + d_print("productInfoArea is present offset:%d" % self.offset) + + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + self.multiRecordAreaOffset = self.offset // 8 + d_print("multiRecordArea is present offset:%d" % self.offset) + + if self.internalUserAreaOffset == self.INITVALUE: + self.internalUserAreaOffset = 0 + if self.productinfoAreaOffset == self.INITVALUE: + self.productinfoAreaOffset = 0 + if self.chassicInfoAreaOffset == self.INITVALUE: + self.chassicInfoAreaOffset = 0 + if self.boardInfoAreaOffset == self.INITVALUE: + self.boardInfoAreaOffset = 0 + if self.multiRecordAreaOffset == self.INITVALUE: + self.multiRecordAreaOffset = 0 + + self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset + - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff + d_print("zerochecksum:%x" % self.zeroCheckSum) + self.data = "" + self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr( + self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum) + + self.bindata = self.data + self.bodybin + totallen = len(self.bindata) + d_print("totallen %d" % totallen) + if totallen < self._frusize: + self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0])) + else: + raise FruException('bin data more than %d' % self._frusize, -2) + + def recalcutebin(self): + self.bodybin = "" + if self.internalUseArea is not None and self.internalUseArea.isPresent: + d_print("internalUseArea present") + self.bodybin += self.internalUseArea.data + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + d_print("chassisInfoArea present") + self.bodybin += self.chassisInfoArea.data + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + d_print("boardInfoArea present") + self.boardInfoArea.recalcute() + self.bodybin += self.boardInfoArea.data + if self.productInfoArea is not None and self.productInfoArea.isPresent: + d_print("productInfoAreapresent") + self.productInfoArea.recalcute() + self.bodybin += self.productInfoArea.data + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + d_print("multiRecordArea present") + self.bodybin += self.productInfoArea.data + + def recalcute(self, fru_eeprom_size=256): + self._frusize = fru_eeprom_size + self.recalcutebin() + self.recalcuteCommonHead() + + def setValue(self, area, field, value): + tmp_area = getattr(self, area, None) + if tmp_area is not None: + tmp_area.fruSetValue(field, value) diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf new file mode 100644 index 00000000000..7dfbba766f3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=r8168,r8169,ice,mei_me,i2c_i801,i2c_ismt" +CONSOLE_PORT=0x5060 +CONSOLE_DEV=0 diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/media_settings.json new file mode 100644 index 00000000000..567e84e9c7e --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/media_settings.json @@ -0,0 +1,5118 @@ +{ + "PORT_MEDIA_SETTINGS": { + "0": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffdc", + "lane1": "0xffffffdc", + "lane2": "0xffffffdc", + "lane3": "0xffffffdc" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000080", + "lane2": "0x00000080", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "1": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffdc", + "lane1": "0xffffffdc", + "lane2": "0xffffffdc", + "lane3": "0xffffffdc" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000080", + "lane2": "0x00000080", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "2": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffdc", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000080", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "3": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffdc", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000080", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "4": { + "Default": { + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffdc", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x0000007C", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "5": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "6": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "7": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffdc", + "lane2": "0xffffffe0", + "lane3": "0xffffffdc" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000080", + "lane2": "0x00000084", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "8": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "9": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "10": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "11": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "12": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "13": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "14": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffdc", + "lane2": "0xffffffe0", + "lane3": "0xffffffdc" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000080", + "lane2": "0x00000084", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "15": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffdc", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000080", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "16": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "17": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "18": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "19": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "20": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "21": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "22": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffdc" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "23": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "24": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "25": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "26": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "27": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "28": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "29": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "30": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "31": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "32": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "33": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "34": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "35": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "36": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "37": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "38": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "39": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "40": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000006", + "lane2": "0x00000004", + "lane3": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000080", + "lane2": "0x00000084", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "41": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "42": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "43": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "44": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "45": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "46": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "47": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "48": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "49": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "50": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "51": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "52": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "53": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "54": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "55": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "56": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "57": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "58": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "59": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "60": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "61": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "62": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "63": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "64": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "65": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "66": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "67": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "68": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "69": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "70": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "71": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "72": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "73": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "74": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "75": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "76": { + "Default": { + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "77": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "78": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "79": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "80": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "81": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "82": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "83": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "84": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "85": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "86": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "87": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "88": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "89": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "90": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "91": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "92": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "93": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "94": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "95": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "96": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "97": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "98": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "99": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "100": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "101": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "102": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "103": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "104": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "105": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "106": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "107": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "108": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "109": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "110": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "111": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "112": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "113": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "114": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "115": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "116": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "117": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "118": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "119": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "120": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffdc", + "lane1": "0xffffffdc", + "lane2": "0xffffffdc", + "lane3": "0xffffffdc" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000080", + "lane2": "0x00000080", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "121": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffdc", + "lane1": "0xffffffdc", + "lane2": "0xffffffdc", + "lane3": "0xffffffdc" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000080", + "lane2": "0x00000080", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "122": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffdc", + "lane1": "0xffffffdc", + "lane2": "0xffffffdc", + "lane3": "0xffffffdc" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000080", + "lane2": "0x00000080", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "123": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffdc", + "lane1": "0xffffffdc", + "lane2": "0xffffffdc", + "lane3": "0xffffffdc" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000080", + "lane2": "0x00000080", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "124": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffdc", + "lane1": "0xffffffdc", + "lane2": "0xffffffdc", + "lane3": "0xffffffdc" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000080", + "lane2": "0x00000080", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "125": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffdc", + "lane1": "0xffffffdc", + "lane2": "0xffffffdc", + "lane3": "0xffffffdc" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000080", + "lane2": "0x00000080", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "126": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffdc", + "lane1": "0xffffffdc", + "lane2": "0xffffffdc", + "lane3": "0xffffffdc" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000080", + "lane2": "0x00000080", + "lane3": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + }, + "127": { + "Default": { + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffdc", + "lane1": "0xffffffdc", + "lane2": "0xffffffdc" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000080", + "lane2": "0x00000080" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000" + } + } + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/monitor.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/monitor.py new file mode 100755 index 00000000000..44b05bbcfe8 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/monitor.py @@ -0,0 +1,410 @@ +#!/usr/bin/python3 +# * onboard temperature sensors +# * FAN trays +# * PSU +# +import os +import re +from lxml import etree as ET +import glob +import json +from decimal import Decimal +from fru import ipmifru + + +MAILBOX_DIR = "/sys/bus/i2c/devices/" +BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type" +BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow" + + +CONFIG_NAME = "dev.xml" + + +def byteTostr(val): + strtmp = '' + for value in val: + strtmp += chr(value) + return strtmp + + +def typeTostr(val): + if isinstance(val, bytes): + strtmp = byteTostr(val) + return strtmp + return val + + +def get_board_id(): + if not os.path.exists(BOARD_ID_PATH): + return "NA" + with open(BOARD_ID_PATH) as fd: + id_str = fd.read().strip() + return "0x%x" % (int(id_str, 10)) + + +def getboardairflow(): + if not os.path.exists(BOARD_AIRFLOW_PATH): + return "NA" + with open(BOARD_AIRFLOW_PATH) as fd: + airflow_str = fd.read().strip() + data = json.loads(airflow_str) + airflow = data.get("board", "NA") + return airflow + + +boardid = get_board_id() +boardairflow = getboardairflow() + + +DEV_XML_FILE_LIST = [ + "dev_" + boardid + "_" + boardairflow + ".xml", + "dev_" + boardid + ".xml", + "dev_" + boardairflow + ".xml", +] + + +def dev_file_read(path, offset, read_len): + retval = "ERR" + val_list = [] + msg = "" + ret = "" + fd = -1 + + if not os.path.exists(path): + return False, "%s %s not found" % (retval, path) + + try: + fd = os.open(path, os.O_RDONLY) + os.lseek(fd, offset, os.SEEK_SET) + ret = os.read(fd, read_len) + for item in ret: + val_list.append(item) + except Exception as e: + msg = str(e) + return False, "%s %s" % (retval, msg) + finally: + if fd > 0: + os.close(fd) + return True, val_list + + +def getPMCreg(location): + retval = 'ERR' + if not os.path.isfile(location): + return "%s %s notfound" % (retval, location) + try: + with open(location, 'r') as fd: + retval = fd.read() + except Exception as error: + return "ERR %s" % str(error) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +# Get a mailbox register +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = reg_name + filepath = glob.glob(mb_reg_file) + if len(filepath) == 0: + return "%s %s notfound" % (retval, mb_reg_file) + mb_reg_file = filepath[0] + if not os.path.isfile(mb_reg_file): + # print mb_reg_file, 'not found !' + return "%s %s notfound" % (retval, mb_reg_file) + try: + with open(mb_reg_file, 'rb') as fd: + retval = fd.read() + retval = typeTostr(retval) + except Exception as error: + retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error)) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +class checktype(): + def __init__(self, test1): + self.test1 = test1 + + @staticmethod + def getValue(location, bit, data_type, coefficient=1, addend=0): + try: + value_t = get_pmc_register(location) + if value_t.startswith("ERR") or value_t.startswith("NA"): + return value_t + if data_type == 1: + return float('%.1f' % ((float(value_t) / 1000) + addend)) + if data_type == 2: + return float('%.1f' % (float(value_t) / 100)) + if data_type == 3: + psu_status = int(value_t, 16) + return (psu_status & (1 << bit)) >> bit + if data_type == 4: + return int(value_t, 10) + if data_type == 5: + return float('%.1f' % (float(value_t) / 1000 / 1000)) + if data_type == 6: + return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000')) + return value_t + except Exception as e: + value_t = "ERR %s" % str(e) + return value_t + + # fanFRU + @staticmethod + def decodeBinByValue(retval): + fru = ipmifru() + fru.decodeBin(retval) + return fru + + @staticmethod + def getfruValue(prob_t, root, val): + try: + ret, binval_bytes = dev_file_read(val, 0, 256) + if ret is False: + return binval_bytes + binval = byteTostr(binval_bytes) + fanpro = {} + ret = checktype.decodeBinByValue(binval) + fanpro['fan_type'] = ret.productInfoArea.productName + fanpro['hw_version'] = ret.productInfoArea.productVersion + fanpro['sn'] = ret.productInfoArea.productSerialNumber + fan_display_name_dict = status.getDecodValue(root, "fan_display_name") + fan_name = fanpro['fan_type'].strip() + if len(fan_display_name_dict) == 0: + return fanpro + if fan_name not in fan_display_name_dict: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name) + else: + fanpro['fan_type'] = fan_display_name_dict[fan_name] + return fanpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getslotfruValue(val): + try: + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + slotpro = {} + ret = checktype.decodeBinByValue(binval) + slotpro['slot_type'] = ret.boardInfoArea.boardProductName + slotpro['hw_version'] = ret.boardInfoArea.boardextra1 + slotpro['sn'] = ret.boardInfoArea.boardSerialNumber + return slotpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getpsufruValue(prob_t, root, val): + try: + psu_match = False + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + psupro = {} + ret = checktype.decodeBinByValue(binval) + psupro['type1'] = ret.productInfoArea.productPartModelName + psupro['sn'] = ret.productInfoArea.productSerialNumber + psupro['hw_version'] = ret.productInfoArea.productVersion + psu_dict = status.getDecodValue(root, "psutype") + psupro['type1'] = psupro['type1'].strip() + if len(psu_dict) == 0: + return psupro + for psu_name, display_name in psu_dict.items(): + if psu_name.strip() == psupro['type1']: + psupro['type1'] = display_name + psu_match = True + break + if psu_match is not True: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1']) + return psupro + except Exception as error: + return "ERR " + str(error) + + +class status(): + def __init__(self, productname): + self.productname = productname + + @staticmethod + def getETroot(filename): + tree = ET.parse(filename) + root = tree.getroot() + return root + + @staticmethod + def getDecodValue(collection, decode): + decodes = collection.find('decode') + testdecode = decodes.find(decode) + test = {} + if testdecode is None: + return test + for neighbor in testdecode.iter('code'): + test[neighbor.attrib["key"]] = neighbor.attrib["value"] + return test + + @staticmethod + def getfileValue(location): + return checktype.getValue(location, " ", " ") + + @staticmethod + def getETValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + prob_t = {} + prob_t.update(neighbor.attrib) + prob_t['errcode'] = 0 + prob_t['errmsg'] = '' + for pros in neighbor.iter("property"): + ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items())) + if ret.get('e2type') == 'fru' and ret.get("name") == "fru": + fruval = checktype.getfruValue(prob_t, root, ret["location"]) + if isinstance(fruval, str) and fruval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = fruval + break + prob_t.update(fruval) + continue + + if ret.get("name") == "psu" and ret.get('e2type') == 'fru': + psuval = checktype.getpsufruValue(prob_t, root, ret["location"]) + if isinstance(psuval, str) and psuval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = psuval + break + prob_t.update(psuval) + continue + + if ret.get("gettype") == "config": + prob_t[ret["name"]] = ret["value"] + continue + + if 'type' not in ret.keys(): + val = "0" + else: + val = ret["type"] + if 'bit' not in ret.keys(): + bit = "0" + else: + bit = ret["bit"] + if 'coefficient' not in ret.keys(): + coefficient = 1 + else: + coefficient = float(ret["coefficient"]) + if 'addend' not in ret.keys(): + addend = 0 + else: + addend = float(ret["addend"]) + + s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend) + if isinstance(s, str) and s.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = s + break + if 'default' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + prob_t['errmsg'] = rt[str(s)] + if str(s) != ret["default"]: + prob_t['errcode'] = -1 + break + else: + if 'decode' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt): + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % + (s.replace("\x00", "").rstrip())) + else: + s = rt[str(s).replace("\x00", "").rstrip()] + name = ret["name"] + prob_t[name] = str(s) + a.append(prob_t) + + @staticmethod + def getCPUValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + location = neighbor.attrib["location"] + + filepath = glob.glob(location) + if len(filepath) == 0: + return + location = filepath[0] + L = [] + for dirpath, dirnames, filenames in os.walk(location): + for file in filenames: + if file.endswith("_input"): + b = re.findall(r'temp(\d+)_input', file) + idx = int(b[0]) + L.append(idx) + L = sorted(L) + for idx in L: + prob_t = {} + prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, idx)) + prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, idx))) / 1000 + prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, idx))) / 1000 + prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, idx))) / 1000 + prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, idx))) / 1000 + a.append(prob_t) + + @staticmethod + def getFileName(): + fpath = os.path.dirname(os.path.realpath(__file__)) + for file in DEV_XML_FILE_LIST: + xml = fpath + "/" + file + if os.path.exists(xml): + return xml + return fpath + "/" + CONFIG_NAME + + @staticmethod + def checkFan(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "fan" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getTemp(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "temp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "psu" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getcputemp(ret): + _filename = status.getFileName() + _tagname = "cpus" + status.getCPUValue(ret, _filename, _tagname) + + @staticmethod + def getDcdc(ret): + _filename = status.getFileName() + _tagname = "dcdc" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmactemp(ret): + _filename = status.getFileName() + _tagname = "mactemp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmacpower(ret): + _filename = status.getFileName() + _tagname = "macpower" + status.getETValue(ret, _filename, _tagname) diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6940-128qc-r0/pcie.yaml new file mode 100644 index 00000000000..94f5320cb10 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/pcie.yaml @@ -0,0 +1,443 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: '00' + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: '00' + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: '00' + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: '00' + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: '00' + dev: '01' + fn: '0' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '1' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '2' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '3' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '4' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '5' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '6' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '7' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '02' + fn: '0' + id: 09a6 + name: 'System peripheral: Intel Corporation Device 09a6' +- bus: '00' + dev: '02' + fn: '1' + id: 09a7 + name: 'System peripheral: Intel Corporation Device 09a7' +- bus: '00' + dev: '02' + fn: '4' + id: '3456' + name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 3456 (rev + 01)' +- bus: '00' + dev: '06' + fn: '0' + id: 18da + name: 'PCI bridge: Intel Corporation Device 18da (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 18f2 + name: 'SATA controller: Intel Corporation Device 18f2 (rev 11)' +- bus: '00' + dev: 0f + fn: '0' + id: 18ac + name: 'System peripheral: Intel Corporation Device 18ac (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 18a8 + name: 'PCI bridge: Intel Corporation Device 18a8 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 18aa + name: 'PCI bridge: Intel Corporation Device 18aa (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 18ad + name: 'PCI bridge: Intel Corporation Device 18ad (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 18d3 + name: 'Communication controller: Intel Corporation Device 18d3 (rev 11)' +- bus: '00' + dev: '18' + fn: '1' + id: 18d4 + name: 'Communication controller: Intel Corporation Device 18d4 (rev 11)' +- bus: '00' + dev: '18' + fn: '4' + id: 18d6 + name: 'Communication controller: Intel Corporation Device 18d6 (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '3' + id: 18d9 + name: 'Unassigned class [ff00]: Intel Corporation Device 18d9 (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 18db + name: 'SD Host controller: Intel Corporation Device 18db (rev 11)' +- bus: '00' + dev: 1d + fn: '0' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: '00' + dev: 1e + fn: '0' + id: 18d0 + name: 'USB controller: Intel Corporation Device 18d0 (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 18dc + name: 'ISA bridge: Intel Corporation Device 18dc (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 18df + name: 'SMBus: Intel Corporation Device 18df (rev 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 18e0 + name: 'Serial bus controller [0c80]: Intel Corporation Device 18e0 (rev 11)' +- bus: '00' + dev: 1f + fn: '7' + id: 18e1 + name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 18e1 (rev + 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 18ee + name: 'Co-processor: Intel Corporation Device 18ee (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: f900 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device f900 (rev 11)' +- bus: '03' + dev: '00' + fn: '0' + id: '5220' + name: 'SMBus: Device 1ded:5220' +- bus: '04' + dev: '00' + fn: '0' + id: '8168' + name: 'Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI + Express Gigabit Ethernet Controller (rev 15)' +- bus: '14' + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: '14' + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: '14' + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: '14' + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: '14' + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: f3 + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: f3 + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: f3 + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: f3 + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: f3 + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: f3 + dev: '04' + fn: '0' + id: 18d1 + name: 'PCI bridge: Intel Corporation Device 18d1' +- bus: f4 + dev: '00' + fn: '0' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '1' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '2' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '3' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '4' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: fe + dev: '00' + fn: '0' + id: '3450' + name: 'System peripheral: Intel Corporation Device 3450' +- bus: fe + dev: '00' + fn: '1' + id: '3451' + name: 'System peripheral: Intel Corporation Device 3451' +- bus: fe + dev: '00' + fn: '2' + id: '3452' + name: 'System peripheral: Intel Corporation Device 3452' +- bus: fe + dev: '00' + fn: '3' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: fe + dev: '00' + fn: '5' + id: '3455' + name: 'System peripheral: Intel Corporation Device 3455' +- bus: fe + dev: 0b + fn: '0' + id: '3448' + name: 'System peripheral: Intel Corporation Device 3448' +- bus: fe + dev: 0b + fn: '1' + id: '3448' + name: 'System peripheral: Intel Corporation Device 3448' +- bus: fe + dev: 0b + fn: '2' + id: 344b + name: 'System peripheral: Intel Corporation Device 344b' +- bus: fe + dev: 0c + fn: '0' + id: 344a + name: 'Performance counters: Intel Corporation Device 344a' +- bus: fe + dev: 1a + fn: '0' + id: '2880' + name: 'Performance counters: Intel Corporation Device 2880' +- bus: ff + dev: '00' + fn: '0' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '1' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '2' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '3' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '4' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '5' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: 0a + fn: '0' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '1' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '2' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '3' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '4' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '5' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 1d + fn: '0' + id: 344f + name: 'System peripheral: Intel Corporation Device 344f' +- bus: ff + dev: 1d + fn: '1' + id: '3457' + name: 'System peripheral: Intel Corporation Device 3457' +- bus: ff + dev: 1e + fn: '0' + id: '3458' + name: 'System peripheral: Intel Corporation Device 3458 (rev 01)' +- bus: ff + dev: 1e + fn: '1' + id: '3459' + name: 'System peripheral: Intel Corporation Device 3459 (rev 01)' +- bus: ff + dev: 1e + fn: '2' + id: 345a + name: 'System peripheral: Intel Corporation Device 345a (rev 01)' +- bus: ff + dev: 1e + fn: '3' + id: 345b + name: 'System peripheral: Intel Corporation Device 345b (rev 01)' +- bus: ff + dev: 1e + fn: '4' + id: 345c + name: 'System peripheral: Intel Corporation Device 345c (rev 01)' +- bus: ff + dev: 1e + fn: '5' + id: 345d + name: 'System peripheral: Intel Corporation Device 345d (rev 01)' +- bus: ff + dev: 1e + fn: '6' + id: 345e + name: 'System peripheral: Intel Corporation Device 345e (rev 01)' +- bus: ff + dev: 1e + fn: '7' + id: 345f + name: 'System peripheral: Intel Corporation Device 345f (rev 01)' diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform.json new file mode 100644 index 00000000000..a0ceb34e9fb --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform.json @@ -0,0 +1,1668 @@ +{ + "interfaces": { + "Ethernet1": { + "index": "0,0,0,0", + "lanes": "17,18,19,20", + "breakout_modes": { + "1x400G": [ + "Eth1" + ], + "2x200G[100G]": [ + "Eth1/1", + "Eth1/2" + ] + } + }, + "Ethernet5": { + "index": "1,1,1,1", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x400G": [ + "Eth2" + ], + "2x200G[100G]": [ + "Eth2/1", + "Eth2/2" + ] + } + }, + "Ethernet9": { + "index": "2,2,2,2", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x400G": [ + "Eth3" + ], + "2x200G[100G]": [ + "Eth3/1", + "Eth3/2" + ] + } + }, + "Ethernet13": { + "index": "3,3,3,3", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x400G": [ + "Eth4" + ], + "2x200G[100G]": [ + "Eth4/1", + "Eth4/2" + ] + } + }, + "Ethernet17": { + "index": "4,4,4,4", + "lanes": "129,130,131,132", + "breakout_modes": { + "1x400G": [ + "Eth5" + ], + "2x200G[100G]": [ + "Eth5/1", + "Eth5/2" + ] + } + }, + "Ethernet21": { + "index": "5,5,5,5", + "lanes": "133,134,135,136", + "breakout_modes": { + "1x400G": [ + "Eth6" + ], + "2x200G[100G]": [ + "Eth6/1", + "Eth6/2" + ] + } + }, + "Ethernet25": { + "index": "6,6,6,6", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x400G": [ + "Eth7" + ], + "2x200G[100G]": [ + "Eth7/1", + "Eth7/2" + ] + } + }, + "Ethernet29": { + "index": "7,7,7,7", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x400G": [ + "Eth8" + ], + "2x200G[100G]": [ + "Eth8/1", + "Eth8/2" + ] + } + }, + "Ethernet33": { + "index": "8,8,8,8", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x400G": [ + "Eth9" + ], + "2x200G[100G]": [ + "Eth9/1", + "Eth9/2" + ] + } + }, + "Ethernet37": { + "index": "9,9,9,9", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x400G": [ + "Eth10" + ], + "2x200G[100G]": [ + "Eth10/1", + "Eth10/2" + ] + } + }, + "Ethernet41": { + "index": "10,10,10,10", + "lanes": "145,146,147,148", + "breakout_modes": { + "1x400G": [ + "Eth11" + ], + "2x200G[100G]": [ + "Eth11/1", + "Eth11/2" + ] + } + }, + "Ethernet45": { + "index": "11,11,11,11", + "lanes": "149,150,151,152", + "breakout_modes": { + "1x400G": [ + "Eth12" + ], + "2x200G[100G]": [ + "Eth12/1", + "Eth12/2" + ] + } + }, + "Ethernet49": { + "index": "12,12,12,12", + "lanes": "137,138,139,140", + "breakout_modes": { + "1x400G": [ + "Eth13" + ], + "2x200G[100G]": [ + "Eth13/1", + "Eth13/2" + ] + } + }, + "Ethernet53": { + "index": "13,13,13,13", + "lanes": "141,142,143,144", + "breakout_modes": { + "1x400G": [ + "Eth14" + ], + "2x200G[100G]": [ + "Eth14/1", + "Eth14/2" + ] + } + }, + "Ethernet57": { + "index": "14,14,14,14", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x400G": [ + "Eth15" + ], + "2x200G[100G]": [ + "Eth15/1", + "Eth15/2" + ] + } + }, + "Ethernet61": { + "index": "15,15,15,15", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x400G": [ + "Eth16" + ], + "2x200G[100G]": [ + "Eth16/1", + "Eth16/2" + ] + } + }, + "Ethernet65": { + "index": "16,16,16,16", + "lanes": "161,162,163,164", + "breakout_modes": { + "1x400G": [ + "Eth17" + ], + "2x200G[100G]": [ + "Eth17/1", + "Eth17/2" + ] + } + }, + "Ethernet69": { + "index": "17,17,17,17", + "lanes": "165,166,167,168", + "breakout_modes": { + "1x400G": [ + "Eth18" + ], + "2x200G[100G]": [ + "Eth18/1", + "Eth18/2" + ] + } + }, + "Ethernet73": { + "index": "18,18,18,18", + "lanes": "153,154,155,156", + "breakout_modes": { + "1x400G": [ + "Eth19" + ], + "2x200G[100G]": [ + "Eth19/1", + "Eth19/2" + ] + } + }, + "Ethernet77": { + "index": "19,19,19,19", + "lanes": "157,158,159,160", + "breakout_modes": { + "1x400G": [ + "Eth20" + ], + "2x200G[100G]": [ + "Eth20/1", + "Eth20/2" + ] + } + }, + "Ethernet81": { + "index": "20,20,20,20", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x400G": [ + "Eth21" + ], + "2x200G[100G]": [ + "Eth21/1", + "Eth21/2" + ] + } + }, + "Ethernet85": { + "index": "21,21,21,21", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x400G": [ + "Eth22" + ], + "2x200G[100G]": [ + "Eth22/1", + "Eth22/2" + ] + } + }, + "Ethernet89": { + "index": "22,22,22,22", + "lanes": "177,178,179,180", + "breakout_modes": { + "1x400G": [ + "Eth23" + ], + "2x200G[100G]": [ + "Eth23/1", + "Eth23/2" + ] + } + }, + "Ethernet93": { + "index": "23,23,23,23", + "lanes": "181,182,183,184", + "breakout_modes": { + "1x400G": [ + "Eth24" + ], + "2x200G[100G]": [ + "Eth24/1", + "Eth24/2" + ] + } + }, + "Ethernet97": { + "index": "24,24,24,24", + "lanes": "169,170,171,172", + "breakout_modes": { + "1x400G": [ + "Eth25" + ], + "2x200G[100G]": [ + "Eth25/1", + "Eth25/2" + ] + } + }, + "Ethernet101": { + "index": "25,25,25,25", + "lanes": "173,174,175,176", + "breakout_modes": { + "1x400G": [ + "Eth26" + ], + "2x200G[100G]": [ + "Eth26/1", + "Eth26/2" + ] + } + }, + "Ethernet105": { + "index": "26,26,26,26", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x400G": [ + "Eth27" + ], + "2x200G[100G]": [ + "Eth27/1", + "Eth27/2" + ] + } + }, + "Ethernet109": { + "index": "27,27,27,27", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x400G": [ + "Eth28" + ], + "2x200G[100G]": [ + "Eth28/1", + "Eth28/2" + ] + } + }, + "Ethernet113": { + "index": "28,28,28,28", + "lanes": "209,210,211,212", + "breakout_modes": { + "1x400G": [ + "Eth29" + ], + "2x200G[100G]": [ + "Eth29/1", + "Eth29/2" + ] + } + }, + "Ethernet117": { + "index": "29,29,29,29", + "lanes": "213,214,215,216", + "breakout_modes": { + "1x400G": [ + "Eth30" + ], + "2x200G[100G]": [ + "Eth30/1", + "Eth30/2" + ] + } + }, + "Ethernet121": { + "index": "30,30,30,30", + "lanes": "185,186,187,188", + "breakout_modes": { + "1x400G": [ + "Eth31" + ], + "2x200G[100G]": [ + "Eth31/1", + "Eth31/2" + ] + } + }, + "Ethernet125": { + "index": "31,31,31,31", + "lanes": "189,190,191,192", + "breakout_modes": { + "1x400G": [ + "Eth32" + ], + "2x200G[100G]": [ + "Eth32/1", + "Eth32/2" + ] + } + }, + "Ethernet129": { + "index": "32,32,32,32", + "lanes": "81,82,83,84", + "breakout_modes": { + "1x400G": [ + "Eth33" + ], + "2x200G[100G]": [ + "Eth33/1", + "Eth33/2" + ] + } + }, + "Ethernet133": { + "index": "33,33,33,33", + "lanes": "85,86,87,88", + "breakout_modes": { + "1x400G": [ + "Eth34" + ], + "2x200G[100G]": [ + "Eth34/1", + "Eth34/2" + ] + } + }, + "Ethernet137": { + "index": "34,34,34,34", + "lanes": "193,194,195,196", + "breakout_modes": { + "1x400G": [ + "Eth35" + ], + "2x200G[100G]": [ + "Eth35/1", + "Eth35/2" + ] + } + }, + "Ethernet141": { + "index": "35,35,35,35", + "lanes": "197,198,199,200", + "breakout_modes": { + "1x400G": [ + "Eth36" + ], + "2x200G[100G]": [ + "Eth36/1", + "Eth36/2" + ] + } + }, + "Ethernet145": { + "index": "36,36,36,36", + "lanes": "201,202,203,204", + "breakout_modes": { + "1x400G": [ + "Eth37" + ], + "2x200G[100G]": [ + "Eth37/1", + "Eth37/2" + ] + } + }, + "Ethernet149": { + "index": "37,37,37,37", + "lanes": "205,206,207,208", + "breakout_modes": { + "1x400G": [ + "Eth38" + ], + "2x200G[100G]": [ + "Eth38/1", + "Eth38/2" + ] + } + }, + "Ethernet153": { + "index": "38,38,38,38", + "lanes": "97,98,99,100", + "breakout_modes": { + "1x400G": [ + "Eth39" + ], + "2x200G[100G]": [ + "Eth39/1", + "Eth39/2" + ] + } + }, + "Ethernet157": { + "index": "39,39,39,39", + "lanes": "101,102,103,104", + "breakout_modes": { + "1x400G": [ + "Eth40" + ], + "2x200G[100G]": [ + "Eth40/1", + "Eth40/2" + ] + } + }, + "Ethernet161": { + "index": "40,40,40,40", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x400G": [ + "Eth41" + ], + "2x200G[100G]": [ + "Eth41/1", + "Eth41/2" + ] + } + }, + "Ethernet165": { + "index": "41,41,41,41", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x400G": [ + "Eth42" + ], + "2x200G[100G]": [ + "Eth42/1", + "Eth42/2" + ] + } + }, + "Ethernet169": { + "index": "42,42,42,42", + "lanes": "217,218,219,220", + "breakout_modes": { + "1x400G": [ + "Eth43" + ], + "2x200G[100G]": [ + "Eth43/1", + "Eth43/2" + ] + } + }, + "Ethernet173": { + "index": "43,43,43,43", + "lanes": "221,222,223,224", + "breakout_modes": { + "1x400G": [ + "Eth44" + ], + "2x200G[100G]": [ + "Eth44/1", + "Eth44/2" + ] + } + }, + "Ethernet177": { + "index": "44,44,44,44", + "lanes": "113,114,115,116", + "breakout_modes": { + "1x400G": [ + "Eth45" + ], + "2x200G[100G]": [ + "Eth45/1", + "Eth45/2" + ] + } + }, + "Ethernet181": { + "index": "45,45,45,45", + "lanes": "117,118,119,120", + "breakout_modes": { + "1x400G": [ + "Eth46" + ], + "2x200G[100G]": [ + "Eth46/1", + "Eth46/2" + ] + } + }, + "Ethernet185": { + "index": "46,46,46,46", + "lanes": "105,106,107,108", + "breakout_modes": { + "1x400G": [ + "Eth47" + ], + "2x200G[100G]": [ + "Eth47/1", + "Eth47/2" + ] + } + }, + "Ethernet189": { + "index": "47,47,47,47", + "lanes": "109,110,111,112", + "breakout_modes": { + "1x400G": [ + "Eth48" + ], + "2x200G[100G]": [ + "Eth48/1", + "Eth48/2" + ] + } + }, + "Ethernet193": { + "index": "48,48,48,48", + "lanes": "225,226,227,228", + "breakout_modes": { + "1x400G": [ + "Eth49" + ], + "2x200G[100G]": [ + "Eth49/1", + "Eth49/2" + ] + } + }, + "Ethernet197": { + "index": "49,49,49,49", + "lanes": "229,230,231,232", + "breakout_modes": { + "1x400G": [ + "Eth50" + ], + "2x200G[100G]": [ + "Eth50/1", + "Eth50/2" + ] + } + }, + "Ethernet201": { + "index": "50,50,50,50", + "lanes": "233,234,235,236", + "breakout_modes": { + "1x400G": [ + "Eth51" + ], + "2x200G[100G]": [ + "Eth51/1", + "Eth51/2" + ] + } + }, + "Ethernet205": { + "index": "51,51,51,51", + "lanes": "237,238,239,240", + "breakout_modes": { + "1x400G": [ + "Eth52" + ], + "2x200G[100G]": [ + "Eth52/1", + "Eth52/2" + ] + } + }, + "Ethernet209": { + "index": "52,52,52,52", + "lanes": "89,90,91,92", + "breakout_modes": { + "1x400G": [ + "Eth53" + ], + "2x200G[100G]": [ + "Eth53/1", + "Eth53/2" + ] + } + }, + "Ethernet213": { + "index": "53,53,53,53", + "lanes": "93,94,95,96", + "breakout_modes": { + "1x400G": [ + "Eth54" + ], + "2x200G[100G]": [ + "Eth54/1", + "Eth54/2" + ] + } + }, + "Ethernet217": { + "index": "54,54,54,54", + "lanes": "241,242,243,244", + "breakout_modes": { + "1x400G": [ + "Eth55" + ], + "2x200G[100G]": [ + "Eth55/1", + "Eth55/2" + ] + } + }, + "Ethernet221": { + "index": "55,55,55,55", + "lanes": "245,246,247,248", + "breakout_modes": { + "1x400G": [ + "Eth56" + ], + "2x200G[100G]": [ + "Eth56/1", + "Eth56/2" + ] + } + }, + "Ethernet225": { + "index": "56,56,56,56", + "lanes": "249,250,251,252", + "breakout_modes": { + "1x400G": [ + "Eth57" + ], + "2x200G[100G]": [ + "Eth57/1", + "Eth57/2" + ] + } + }, + "Ethernet229": { + "index": "57,57,57,57", + "lanes": "253,254,255,256", + "breakout_modes": { + "1x400G": [ + "Eth58" + ], + "2x200G[100G]": [ + "Eth58/1", + "Eth58/2" + ] + } + }, + "Ethernet233": { + "index": "58,58,58,58", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x400G": [ + "Eth59" + ], + "2x200G[100G]": [ + "Eth59/1", + "Eth59/2" + ] + } + }, + "Ethernet237": { + "index": "59,59,59,59", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x400G": [ + "Eth60" + ], + "2x200G[100G]": [ + "Eth60/1", + "Eth60/2" + ] + } + }, + "Ethernet241": { + "index": "60,60,60,60", + "lanes": "257,258,259,260", + "breakout_modes": { + "1x400G": [ + "Eth61" + ], + "2x200G[100G]": [ + "Eth61/1", + "Eth61/2" + ] + } + }, + "Ethernet245": { + "index": "61,61,61,61", + "lanes": "261,262,263,264", + "breakout_modes": { + "1x400G": [ + "Eth62" + ], + "2x200G[100G]": [ + "Eth62/1", + "Eth62/2" + ] + } + }, + "Ethernet249": { + "index": "62,62,62,62", + "lanes": "265,266,267,268", + "breakout_modes": { + "1x400G": [ + "Eth63" + ], + "2x200G[100G]": [ + "Eth63/1", + "Eth63/2" + ] + } + }, + "Ethernet253": { + "index": "63,63,63,63", + "lanes": "269,270,271,272", + "breakout_modes": { + "1x400G": [ + "Eth64" + ], + "2x200G[100G]": [ + "Eth64/1", + "Eth64/2" + ] + } + }, + "Ethernet257": { + "index": "64,64,64,64", + "lanes": "433,434,435,436", + "breakout_modes": { + "1x400G": [ + "Eth65" + ], + "2x200G[100G]": [ + "Eth65/1", + "Eth65/2" + ] + } + }, + "Ethernet261": { + "index": "65,65,65,65", + "lanes": "437,438,439,440", + "breakout_modes": { + "1x400G": [ + "Eth66" + ], + "2x200G[100G]": [ + "Eth66/1", + "Eth66/2" + ] + } + }, + "Ethernet265": { + "index": "66,66,66,66", + "lanes": "273,274,275,276", + "breakout_modes": { + "1x400G": [ + "Eth67" + ], + "2x200G[100G]": [ + "Eth67/1", + "Eth67/2" + ] + } + }, + "Ethernet269": { + "index": "67,67,67,67", + "lanes": "277,278,279,280", + "breakout_modes": { + "1x400G": [ + "Eth68" + ], + "2x200G[100G]": [ + "Eth68/1", + "Eth68/2" + ] + } + }, + "Ethernet273": { + "index": "68,68,68,68", + "lanes": "281,282,283,284", + "breakout_modes": { + "1x400G": [ + "Eth69" + ], + "2x200G[100G]": [ + "Eth69/1", + "Eth69/2" + ] + } + }, + "Ethernet277": { + "index": "69,69,69,69", + "lanes": "285,286,287,288", + "breakout_modes": { + "1x400G": [ + "Eth70" + ], + "2x200G[100G]": [ + "Eth70/1", + "Eth70/2" + ] + } + }, + "Ethernet281": { + "index": "70,70,70,70", + "lanes": "417,418,419,420", + "breakout_modes": { + "1x400G": [ + "Eth71" + ], + "2x200G[100G]": [ + "Eth71/1", + "Eth71/2" + ] + } + }, + "Ethernet285": { + "index": "71,71,71,71", + "lanes": "421,422,423,424", + "breakout_modes": { + "1x400G": [ + "Eth72" + ], + "2x200G[100G]": [ + "Eth72/1", + "Eth72/2" + ] + } + }, + "Ethernet289": { + "index": "72,72,72,72", + "lanes": "393,394,395,396", + "breakout_modes": { + "1x400G": [ + "Eth73" + ], + "2x200G[100G]": [ + "Eth73/1", + "Eth73/2" + ] + } + }, + "Ethernet293": { + "index": "73,73,73,73", + "lanes": "397,398,399,400", + "breakout_modes": { + "1x400G": [ + "Eth74" + ], + "2x200G[100G]": [ + "Eth74/1", + "Eth74/2" + ] + } + }, + "Ethernet297": { + "index": "74,74,74,74", + "lanes": "289,290,291,292", + "breakout_modes": { + "1x400G": [ + "Eth75" + ], + "2x200G[100G]": [ + "Eth75/1", + "Eth75/2" + ] + } + }, + "Ethernet301": { + "index": "75,75,75,75", + "lanes": "293,294,295,296", + "breakout_modes": { + "1x400G": [ + "Eth76" + ], + "2x200G[100G]": [ + "Eth76/1", + "Eth76/2" + ] + } + }, + "Ethernet305": { + "index": "76,76,76,76", + "lanes": "401,402,403,404", + "breakout_modes": { + "1x400G": [ + "Eth77" + ], + "2x200G[100G]": [ + "Eth77/1", + "Eth77/2" + ] + } + }, + "Ethernet309": { + "index": "77,77,77,77", + "lanes": "405,406,407,408", + "breakout_modes": { + "1x400G": [ + "Eth78" + ], + "2x200G[100G]": [ + "Eth78/1", + "Eth78/2" + ] + } + }, + "Ethernet313": { + "index": "78,78,78,78", + "lanes": "409,410,411,412", + "breakout_modes": { + "1x400G": [ + "Eth79" + ], + "2x200G[100G]": [ + "Eth79/1", + "Eth79/2" + ] + } + }, + "Ethernet317": { + "index": "79,79,79,79", + "lanes": "413,414,415,416", + "breakout_modes": { + "1x400G": [ + "Eth80" + ], + "2x200G[100G]": [ + "Eth80/1", + "Eth80/2" + ] + } + }, + "Ethernet321": { + "index": "80,80,80,80", + "lanes": "305,306,307,308", + "breakout_modes": { + "1x400G": [ + "Eth81" + ], + "2x200G[100G]": [ + "Eth81/1", + "Eth81/2" + ] + } + }, + "Ethernet325": { + "index": "81,81,81,81", + "lanes": "309,310,311,312", + "breakout_modes": { + "1x400G": [ + "Eth82" + ], + "2x200G[100G]": [ + "Eth82/1", + "Eth82/2" + ] + } + }, + "Ethernet329": { + "index": "82,82,82,82", + "lanes": "385,386,387,388", + "breakout_modes": { + "1x400G": [ + "Eth83" + ], + "2x200G[100G]": [ + "Eth83/1", + "Eth83/2" + ] + } + }, + "Ethernet333": { + "index": "83,83,83,83", + "lanes": "389,390,391,392", + "breakout_modes": { + "1x400G": [ + "Eth84" + ], + "2x200G[100G]": [ + "Eth84/1", + "Eth84/2" + ] + } + }, + "Ethernet337": { + "index": "84,84,84,84", + "lanes": "425,426,427,428", + "breakout_modes": { + "1x400G": [ + "Eth85" + ], + "2x200G[100G]": [ + "Eth85/1", + "Eth85/2" + ] + } + }, + "Ethernet341": { + "index": "85,85,85,85", + "lanes": "429,430,431,432", + "breakout_modes": { + "1x400G": [ + "Eth86" + ], + "2x200G[100G]": [ + "Eth86/1", + "Eth86/2" + ] + } + }, + "Ethernet345": { + "index": "86,86,86,86", + "lanes": "321,322,323,324", + "breakout_modes": { + "1x400G": [ + "Eth87" + ], + "2x200G[100G]": [ + "Eth87/1", + "Eth87/2" + ] + } + }, + "Ethernet349": { + "index": "87,87,87,87", + "lanes": "325,326,327,328", + "breakout_modes": { + "1x400G": [ + "Eth88" + ], + "2x200G[100G]": [ + "Eth88/1", + "Eth88/2" + ] + } + }, + "Ethernet353": { + "index": "88,88,88,88", + "lanes": "313,314,315,316", + "breakout_modes": { + "1x400G": [ + "Eth89" + ], + "2x200G[100G]": [ + "Eth89/1", + "Eth89/2" + ] + } + }, + "Ethernet357": { + "index": "89,89,89,89", + "lanes": "317,318,319,320", + "breakout_modes": { + "1x400G": [ + "Eth90" + ], + "2x200G[100G]": [ + "Eth90/1", + "Eth90/2" + ] + } + }, + "Ethernet361": { + "index": "90,90,90,90", + "lanes": "441,442,443,444", + "breakout_modes": { + "1x400G": [ + "Eth91" + ], + "2x200G[100G]": [ + "Eth91/1", + "Eth91/2" + ] + } + }, + "Ethernet365": { + "index": "91,91,91,91", + "lanes": "445,446,447,448", + "breakout_modes": { + "1x400G": [ + "Eth92" + ], + "2x200G[100G]": [ + "Eth92/1", + "Eth92/2" + ] + } + }, + "Ethernet369": { + "index": "92,92,92,92", + "lanes": "337,338,339,340", + "breakout_modes": { + "1x400G": [ + "Eth93" + ], + "2x200G[100G]": [ + "Eth93/1", + "Eth93/2" + ] + } + }, + "Ethernet373": { + "index": "93,93,93,93", + "lanes": "341,342,343,344", + "breakout_modes": { + "1x400G": [ + "Eth94" + ], + "2x200G[100G]": [ + "Eth94/1", + "Eth94/2" + ] + } + }, + "Ethernet377": { + "index": "94,94,94,94", + "lanes": "297,298,299,300", + "breakout_modes": { + "1x400G": [ + "Eth95" + ], + "2x200G[100G]": [ + "Eth95/1", + "Eth95/2" + ] + } + }, + "Ethernet381": { + "index": "95,95,95,95", + "lanes": "301,302,303,304", + "breakout_modes": { + "1x400G": [ + "Eth96" + ], + "2x200G[100G]": [ + "Eth96/1", + "Eth96/2" + ] + } + }, + "Ethernet385": { + "index": "96,96,96,96", + "lanes": "457,458,459,460", + "breakout_modes": { + "1x400G": [ + "Eth97" + ], + "2x200G[100G]": [ + "Eth97/1", + "Eth97/2" + ] + } + }, + "Ethernet389": { + "index": "97,97,97,97", + "lanes": "461,462,463,464", + "breakout_modes": { + "1x400G": [ + "Eth98" + ], + "2x200G[100G]": [ + "Eth98/1", + "Eth98/2" + ] + } + }, + "Ethernet393": { + "index": "98,98,98,98", + "lanes": "353,354,355,356", + "breakout_modes": { + "1x400G": [ + "Eth99" + ], + "2x200G[100G]": [ + "Eth99/1", + "Eth99/2" + ] + } + }, + "Ethernet397": { + "index": "99,99,99,99", + "lanes": "357,358,359,360", + "breakout_modes": { + "1x400G": [ + "Eth100" + ], + "2x200G[100G]": [ + "Eth100/1", + "Eth100/2" + ] + } + }, + "Ethernet401": { + "index": "100,100,100,100", + "lanes": "329,330,331,332", + "breakout_modes": { + "1x400G": [ + "Eth101" + ], + "2x200G[100G]": [ + "Eth101/1", + "Eth101/2" + ] + } + }, + "Ethernet405": { + "index": "101,101,101,101", + "lanes": "333,334,335,336", + "breakout_modes": { + "1x400G": [ + "Eth102" + ], + "2x200G[100G]": [ + "Eth102/1", + "Eth102/2" + ] + } + }, + "Ethernet409": { + "index": "102,102,102,102", + "lanes": "473,474,475,476", + "breakout_modes": { + "1x400G": [ + "Eth103" + ], + "2x200G[100G]": [ + "Eth103/1", + "Eth103/2" + ] + } + }, + "Ethernet413": { + "index": "103,103,103,103", + "lanes": "477,478,479,480", + "breakout_modes": { + "1x400G": [ + "Eth104" + ], + "2x200G[100G]": [ + "Eth104/1", + "Eth104/2" + ] + } + }, + "Ethernet417": { + "index": "104,104,104,104", + "lanes": "369,370,371,372", + "breakout_modes": { + "1x400G": [ + "Eth105" + ], + "2x200G[100G]": [ + "Eth105/1", + "Eth105/2" + ] + } + }, + "Ethernet421": { + "index": "105,105,105,105", + "lanes": "373,374,375,376", + "breakout_modes": { + "1x400G": [ + "Eth106" + ], + "2x200G[100G]": [ + "Eth106/1", + "Eth106/2" + ] + } + }, + "Ethernet425": { + "index": "106,106,106,106", + "lanes": "345,346,347,348", + "breakout_modes": { + "1x400G": [ + "Eth107" + ], + "2x200G[100G]": [ + "Eth107/1", + "Eth107/2" + ] + } + }, + "Ethernet429": { + "index": "107,107,107,107", + "lanes": "349,350,351,352", + "breakout_modes": { + "1x400G": [ + "Eth108" + ], + "2x200G[100G]": [ + "Eth108/1", + "Eth108/2" + ] + } + }, + "Ethernet433": { + "index": "108,108,108,108", + "lanes": "449,450,451,452", + "breakout_modes": { + "1x400G": [ + "Eth109" + ], + "2x200G[100G]": [ + "Eth109/1", + "Eth109/2" + ] + } + }, + "Ethernet437": { + "index": "109,109,109,109", + "lanes": "453,454,455,456", + "breakout_modes": { + "1x400G": [ + "Eth110" + ], + "2x200G[100G]": [ + "Eth110/1", + "Eth110/2" + ] + } + }, + "Ethernet441": { + "index": "110,110,110,110", + "lanes": "465,466,467,468", + "breakout_modes": { + "1x400G": [ + "Eth111" + ], + "2x200G[100G]": [ + "Eth111/1", + "Eth111/2" + ] + } + }, + "Ethernet445": { + "index": "111,111,111,111", + "lanes": "469,470,471,472", + "breakout_modes": { + "1x400G": [ + "Eth112" + ], + "2x200G[100G]": [ + "Eth112/1", + "Eth112/2" + ] + } + }, + "Ethernet449": { + "index": "112,112,112,112", + "lanes": "361,362,363,364", + "breakout_modes": { + "1x400G": [ + "Eth113" + ], + "2x200G[100G]": [ + "Eth113/1", + "Eth113/2" + ] + } + }, + "Ethernet453": { + "index": "113,113,113,113", + "lanes": "365,366,367,368", + "breakout_modes": { + "1x400G": [ + "Eth114" + ], + "2x200G[100G]": [ + "Eth114/1", + "Eth114/2" + ] + } + }, + "Ethernet457": { + "index": "114,114,114,114", + "lanes": "489,490,491,492", + "breakout_modes": { + "1x400G": [ + "Eth115" + ], + "2x200G[100G]": [ + "Eth115/1", + "Eth115/2" + ] + } + }, + "Ethernet461": { + "index": "115,115,115,115", + "lanes": "493,494,495,496", + "breakout_modes": { + "1x400G": [ + "Eth116" + ], + "2x200G[100G]": [ + "Eth116/1", + "Eth116/2" + ] + } + }, + "Ethernet465": { + "index": "116,116,116,116", + "lanes": "481,482,483,484", + "breakout_modes": { + "1x400G": [ + "Eth117" + ], + "2x200G[100G]": [ + "Eth117/1", + "Eth117/2" + ] + } + }, + "Ethernet469": { + "index": "117,117,117,117", + "lanes": "485,486,487,488", + "breakout_modes": { + "1x400G": [ + "Eth118" + ], + "2x200G[100G]": [ + "Eth118/1", + "Eth118/2" + ] + } + }, + "Ethernet473": { + "index": "118,118,118,118", + "lanes": "377,378,379,380", + "breakout_modes": { + "1x400G": [ + "Eth119" + ], + "2x200G[100G]": [ + "Eth119/1", + "Eth119/2" + ] + } + }, + "Ethernet477": { + "index": "119,119,119,119", + "lanes": "381,382,383,384", + "breakout_modes": { + "1x400G": [ + "Eth120" + ], + "2x200G[100G]": [ + "Eth120/1", + "Eth120/2" + ] + } + }, + "Ethernet481": { + "index": "120,120,120,120", + "lanes": "505,506,507,508", + "breakout_modes": { + "1x400G": [ + "Eth121" + ], + "2x200G[100G]": [ + "Eth121/1", + "Eth121/2" + ] + } + }, + "Ethernet485": { + "index": "121,121,121,121", + "lanes": "509,510,511,512", + "breakout_modes": { + "1x400G": [ + "Eth122" + ], + "2x200G[100G]": [ + "Eth122/1", + "Eth122/2" + ] + } + }, + "Ethernet489": { + "index": "122,122,122,122", + "lanes": "497,498,499,500", + "breakout_modes": { + "1x400G": [ + "Eth123" + ], + "2x200G[100G]": [ + "Eth123/1", + "Eth123/2" + ] + } + }, + "Ethernet493": { + "index": "123,123,123,123", + "lanes": "501,502,503,504", + "breakout_modes": { + "1x400G": [ + "Eth124" + ], + "2x200G[100G]": [ + "Eth124/1", + "Eth124/2" + ] + } + }, + "Ethernet497": { + "index": "124,124,124,124", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x400G": [ + "Eth125" + ], + "2x200G[100G]": [ + "Eth125/1", + "Eth125/2" + ] + } + }, + "Ethernet501": { + "index": "125,125,125,125", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x400G": [ + "Eth126" + ], + "2x200G[100G]": [ + "Eth126/1", + "Eth126/2" + ] + } + }, + "Ethernet505": { + "index": "126,126,126,126", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x400G": [ + "Eth127" + ], + "2x200G[100G]": [ + "Eth127/1", + "Eth127/2" + ] + } + }, + "Ethernet509": { + "index": "127,127,127,127", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x400G": [ + "Eth128" + ], + "2x200G[100G]": [ + "Eth128/1", + "Eth128/2" + ] + } + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_asic b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_asic new file mode 100644 index 00000000000..96046765276 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_components.json new file mode 100644 index 00000000000..fa52c3a1bbb --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_components.json @@ -0,0 +1,20 @@ +{ + "chassis": { + "M2-W6940-128QC": { + "component": { + "BASE_CPLD": { }, + "FAN_CPLD": { }, + "CPU_CPLD": { }, + "MISC_CPLD": { }, + "MAC_CPLDA": { }, + "MAC_CPLDB": { }, + "LC_CPLD": { }, + "MAC FPGA": { }, + "BIOS": { }, + "BMC": { }, + "ALTBMC": { } + } + } + } +} + diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_env.conf new file mode 100644 index 00000000000..fc119184d5c --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_env.conf @@ -0,0 +1,2 @@ +is_ltsw_chip=1 +SYNCD_SHM_SIZE=1g diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/sfputil.py new file mode 100644 index 00000000000..e3d6bb82e06 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/sfputil.py @@ -0,0 +1,363 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import re + import os + import threading + import traceback + import subprocess + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 127 + PORTS_IN_BLOCK = 128 + + EEPROM_OFFSET = 25 + SFP_DEVICE_TYPE = "optoe2" + QSFP_DEVICE_TYPE = "optoe1" + QSFP_DD_DEVICE_TYPE = "optoe3" + I2C_MAX_ATTEMPT = 3 + + OPTOE_TYPE1 = 1 + OPTOE_TYPE2 = 2 + OPTOE_TYPE3 = 3 + + SFP_STATUS_INSERTED = '1' + SFP_STATUS_REMOVED = '0' + + _port_to_eeprom_mapping = {} + port_to_i2cbus_mapping ={} + port_dict = {} + + qsfp_ports_list = [] + qsfp_dd_ports_list = [] + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return self.qsfp_ports_list + + @property + def qsfp_dd_ports(self): + return self.qsfp_dd_ports_list + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + self.qsfp_ports_list = [] + self.qsfp_dd_ports_list = [] + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET) + if self.get_presence(x): + self.port_dict[x] = self.SFP_STATUS_INSERTED + else: + self.port_dict[x] = self.SFP_STATUS_REMOVED + + if (self.check_is_qsfpdd(x)): + self.qsfp_dd_ports_list.append(x) + self.check_optoe_type(x, self.OPTOE_TYPE3) + else: + self.qsfp_ports_list.append(x) + self.check_optoe_type(x, self.OPTOE_TYPE1) + SfpUtilBase.__init__(self) + + def _sfp_read_file_path(self, file_path, offset, num_bytes): + attempts = 0 + while attempts < self.I2C_MAX_ATTEMPT: + try: + file_path.seek(offset) + read_buf = file_path.read(num_bytes) + except: + attempts += 1 + time.sleep(0.05) + else: + return True, read_buf + return False, None + + def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset): + """Tries to read the eeprom file to determine if the + device/sfp is present or not. If sfp present, the read returns + valid bytes. If not, read returns error 'Connection timed out""" + + if not os.path.exists(sysfs_sfp_i2c_client_eeprompath): + return False + else: + with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile: + rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1) + return rv + + def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype): + try: + sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path + + # Write device address to new_device file + nd_file = open(sysfs_nd_path, "w") + nd_str = "%s %s" % (devtype, hex(devaddr)) + nd_file.write(nd_str) + nd_file.close() + + except Exception as err: + print("Error writing to new device file: %s" % str(err)) + return 1 + else: + return 0 + + def _get_port_eeprom_path(self, port_num, devid): + sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter" + + if port_num in self.port_to_eeprom_mapping.keys(): + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num] + else: + sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter" + + i2c_adapter_id = self._get_port_i2c_adapter_id(port_num) + if i2c_adapter_id is None: + print("Error getting i2c bus num") + return None + + # Get i2c virtual bus path for the sfp + sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path, + str(i2c_adapter_id)) + + # If i2c bus for port does not exist + if not os.path.exists(sysfs_sfp_i2c_adapter_path): + print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path) + return None + + sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path, + str(i2c_adapter_id), + hex(devid)[-2:]) + + # If sfp device is not present on bus, Add it + if not os.path.exists(sysfs_sfp_i2c_client_path): + if port_num in self.qsfp_dd_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DD_DEVICE_TYPE) + elif port_num in self.qsfp_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE) + else: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE) + if ret != 0: + print("Error adding sfp device") + return None + + sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path + + return sysfs_sfp_i2c_client_eeprom_path + + def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes) + if rv == False: + return None + + try: + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + except: + return None + + return eeprom_raw + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + cmd = "cat /sys/wb_plat/sff/sff{}/present".format(str(port_num+1)) + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + return False + if output == "1": + return True + return False + + def check_is_qsfpdd(self, port_num): + try: + if self.get_presence(port_num) == False: + return False + + eeprom_path = self._get_port_eeprom_path(port_num, 0x50) + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1) + # according to sff-8024 A0h Byte 0 is '1e' or '18' means the transceiver is qsfpdd + if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18'): + return True + except Exception as e: + print(traceback.format_exc()) + + return False + + def check_optoe_type(self, port_num, optoe_type): + if self.get_presence(port_num) == False: + return True + try: + eeprom_path = self._get_port_eeprom_path(port_num, 0x50) + dev_class_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/dev_class' + i2c_path = dev_class_path.format(str(self.port_to_i2cbus_mapping[port_num])) + cmd = "cat " + i2c_path + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + print("cmd: %s execution fail, output:%s" % (cmd, output)) + return False + if int(output) != optoe_type: + cmd = "echo " + str(optoe_type) + " > " + i2c_path + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + print("cmd: %s execution fail, output:%s" % (cmd, output)) + return False + return True + + except Exception as e: + print(traceback.format_exc()) + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return True + + def get_transceiver_change_event(self, timeout=0): + + start_time = time.time() + current_port_dict = {} + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print ("get_transceiver_change_event:Invalid timeout value", timeout) + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print ('get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout) + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(x): + current_port_dict[x] = self.SFP_STATUS_INSERTED + else: + current_port_dict[x] = self.SFP_STATUS_REMOVED + if (current_port_dict == self.port_dict): + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + else: + # Update reg value + self.port_dict = current_port_dict + return True, self.port_dict + print ("get_transceiver_change_event: Should not reach here.") + return False, {} + + def get_highest_temperature(self): + offset = 0 + hightest_temperature = -9999 + + presence_flag = False + read_eeprom_flag = False + temperature_valid_flag = False + + for port in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(port) == False: + continue + + presence_flag = True + + if port in self.qsfp_dd_ports: + offset = 14 + elif port in self.qsfp_ports: + offset = 22 + else: + offset = 96 + + eeprom_path = self._get_port_eeprom_path(port, 0x50) + try: + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + read_eeprom_flag = True + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2) + if len(eeprom_raw) != 0: + msb = int(eeprom_raw[0], 16) + lsb = int(eeprom_raw[1], 16) + + result = (msb << 8) | (lsb & 0xff) + result = float(result / 256.0) + if -50 <= result <= 200: + temperature_valid_flag = True + if hightest_temperature < result: + hightest_temperature = result + except Exception as e: + pass + + # all port not presence + if presence_flag == False: + hightest_temperature = -10000 + + # all port read eeprom fail + elif read_eeprom_flag == False: + hightest_temperature = -9999 + + # all port temperature invalid + elif read_eeprom_flag == True and temperature_valid_flag == False: + hightest_temperature = -10000 + + hightest_temperature = round(hightest_temperature, 2) + + return hightest_temperature diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/ssd_util.py new file mode 100755 index 00000000000..e8cf2e1a7cb --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/ssd_util.py @@ -0,0 +1,318 @@ +# +# ssd_util.py +# +# Generic implementation of the SSD health API +# SSD models supported: +# - InnoDisk +# - StorFly +# - Virtium + +try: + import re + import os + import subprocess + from sonic_platform_base.sonic_storage.storage_base import StorageBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +SMARTCTL = "smartctl {} -a" +INNODISK = "iSmart -d {}" +VIRTIUM = "SmartCmd -m {}" +DISK_LIST_CMD = "fdisk -l -o Device" +DISK_FREE_CMD = "df -h" +MOUNT_CMD = "mount" + +NOT_AVAILABLE = "N/A" +PE_CYCLE = 3000 +FAIL_PERCENT = 95 + +# Set Vendor Specific IDs +INNODISK_HEALTH_ID = 169 +INNODISK_TEMPERATURE_ID = 194 + +class SsdUtil(StorageBase): + """ + Generic implementation of the SSD health API + """ + model = NOT_AVAILABLE + serial = NOT_AVAILABLE + firmware = NOT_AVAILABLE + temperature = NOT_AVAILABLE + health = NOT_AVAILABLE + remaining_life = NOT_AVAILABLE + sata_rate = NOT_AVAILABLE + ssd_info = NOT_AVAILABLE + vendor_ssd_info = NOT_AVAILABLE + + def __init__(self, diskdev): + self.vendor_ssd_utility = { + "Generic" : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info }, + "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "M.2" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "StorFly" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info }, + "Virtium" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info } + } + + """ + The dict model_attr keys relate the vendors + LITEON : "ER2-GD","AF2MA31DTDLT" + Intel : "SSDSCKKB" + SMI : "SM619GXC" + samsung: "MZNLH" + ADATA : "IM2S3134N" + """ + self.model_attr = { + "ER2-GD" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }, + "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }, + "SSDSCK" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" }, + "SM619GXC" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" }, + "MZNLH" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" }, + "IM2S3134N" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" }, + "MTFDDAV240TCB-1AR1ZABAA" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" } + } + + self.key_list = list(self.model_attr.keys()) + self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*" + self.dev = diskdev + # Generic part + self.fetch_generic_ssd_info(diskdev) + self.parse_generic_ssd_info() + self.fetch_vendor_ssd_info(diskdev, "Generic") + + # Known vendor part + if self.model: + model_short = self.model.split()[0] + if model_short in self.vendor_ssd_utility: + self.fetch_vendor_ssd_info(diskdev, model_short) + self.parse_vendor_ssd_info(model_short) + else: + # No handler registered for this disk model + pass + else: + # Failed to get disk model + self.model = "Unknown" + + def _execute_shell(self, cmd): + process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE) + output, error = process.communicate() + exit_code = process.returncode + if exit_code: + return None + return output + + def _parse_re(self, pattern, buffer): + res_list = re.findall(pattern, str(buffer)) + return res_list[0] if res_list else NOT_AVAILABLE + + def fetch_generic_ssd_info(self, diskdev): + self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev)) + + # Health and temperature values may be overwritten with vendor specific data + def parse_generic_ssd_info(self): + if "nvme" in self.dev: + self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info) + + health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info) + if health_raw == NOT_AVAILABLE: + self.health = NOT_AVAILABLE + else: + health_raw = health_raw.split()[-1] + self.health = 100 - float(health_raw.strip('%')) + + temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info) + if temp_raw == NOT_AVAILABLE: + self.temperature = NOT_AVAILABLE + else: + temp_raw = temp_raw.split()[-2] + self.temperature = float(temp_raw) + else: + self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info) + model_key = "" + for key in self.key_list: + if re.search(key, self.model): + model_key = key + break + if model_key != "": + self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2] + self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8] + self.health = self.remaining_life + # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE) + if model_key in ["ER2-GD", "AF2MA31DTDLT"]: + avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1]) + self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0)) + if self.remaining_life != NOT_AVAILABLE and int(self.remaining_life) < FAIL_PERCENT: + self.remaining_life = "Fail" + self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info) + self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info) + self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info) + + def parse_innodisk_info(self): + if self.vendor_ssd_info: + self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info) + self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info) + else: + if self.health == NOT_AVAILABLE: + health_raw = self.parse_id_number(INNODISK_HEALTH_ID) + self.health = health_raw.split()[-1] + if self.temperature == NOT_AVAILABLE: + temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID) + self.temperature = temp_raw.split()[-6] + + def parse_virtium_info(self): + if self.vendor_ssd_info: + self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + try: + self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance)) + except (ValueError, ZeroDivisionError): + # Invalid avg_erase_count or nand_endurance. + pass + + def fetch_vendor_ssd_info(self, diskdev, model): + self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev)) + + def parse_vendor_ssd_info(self, model): + self.vendor_ssd_utility[model]["parser"]() + + def check_readonly2(self, partition, filesystem): + # parse mount cmd output info + mount_info = self._execute_shell(MOUNT_CMD) + for line in mount_info.split('\n'): + column_list = line.split() + if line == '': + continue + if column_list[0] == partition and column_list[2] == filesystem: + if column_list[5].split(',')[0][1:] == "ro": + return partition + else: + return NOT_AVAILABLE + return NOT_AVAILABLE + + def check_readonly(self, partition, filesystem): + ret = os.access(filesystem, os.W_OK) + if ret == False: + return partition + else: + return NOT_AVAILABLE + + def get_health(self): + """ + Retrieves current disk health in percentages + + Returns: + A float number of current ssd health + e.g. 83.5 + """ + if self.health == 'N/A': + return "NA" + else: + return float(self.health) + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + if self.temperature == 'N/A': + return 'NA' + else: + return float(self.temperature) + + def get_model(self): + """ + Retrieves model for the given disk device + + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + def get_sata_rate(self): + """ + Retrieves SATA rate for the given disk device + Returns: + A string holding current SATA rate as provided by the manufacturer + """ + return self.sata_rate + def get_remaining_life(self): + """ + Retrieves remaining life for the given disk device + Returns: + A string holding disk remaining life as provided by the manufacturer + """ + return self.remaining_life + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + + Returns: + A string holding some vendor specific disk information + """ + return self.vendor_ssd_info + + def parse_id_number(self, id): + return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info) + + def get_readonly_partition(self): + """ + Check the partition mount filesystem is readonly status,then output the result. + Returns: + The readonly partition list + """ + + ro_partition_list = [] + partition_list = [] + + # parse fdisk cmd output info + disk_info = self._execute_shell(DISK_LIST_CMD) + begin_flag = False + for line in disk_info.split('\n'): + if line == "Device": + begin_flag = True + continue + if begin_flag: + if line != "": + partition_list.append(line) + else: + break + + # parse df cmd output info + disk_free = self._execute_shell(DISK_FREE_CMD) + disk_dict = {} + line_num = 0 + for line in disk_free.split('\n'): + line_num = line_num + 1 + if line_num == 1 or line == "": + continue + column_list = line.split() + disk_dict[column_list[0]] = column_list[5] + + # get partition which is readonly + for partition in partition_list: + if partition in disk_dict: + ret = self.check_readonly(partition, disk_dict[partition]) + if (ret != NOT_AVAILABLE): + ro_partition_list.append(ret) + + return ro_partition_list diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..94592fa8ceb --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6940-128qc-r0/postinit_cmd_file.soc new file mode 100644 index 00000000000..01d06fc34fc --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/postinit_cmd_file.soc @@ -0,0 +1,4 @@ +led load /usr/share/sonic/platform/custom_led.bin +led auto on +led start +linkscan SwPortBitMap=xe,ce,cd diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/classes/__init__.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/system_health_monitoring_config.json similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/classes/__init__.py rename to device/micas/x86_64-micas_m2-w6940-128qc-r0/system_health_monitoring_config.json diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json new file mode 100644 index 00000000000..56d71ff4811 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json @@ -0,0 +1,203 @@ +{ + "interfaces": { + "Ethernet1": { + "default_brkout_mode": "1x800G" + }, + "Ethernet9": { + "default_brkout_mode": "1x800G" + }, + "Ethernet17": { + "default_brkout_mode": "1x800G" + }, + "Ethernet25": { + "default_brkout_mode": "1x800G" + }, + "Ethernet33": { + "default_brkout_mode": "1x800G" + }, + "Ethernet41": { + "default_brkout_mode": "1x800G" + }, + "Ethernet49": { + "default_brkout_mode": "1x800G" + }, + "Ethernet57": { + "default_brkout_mode": "1x800G" + }, + "Ethernet65": { + "default_brkout_mode": "1x800G" + }, + "Ethernet73": { + "default_brkout_mode": "1x800G" + }, + "Ethernet81": { + "default_brkout_mode": "1x800G" + }, + "Ethernet89": { + "default_brkout_mode": "1x800G" + }, + "Ethernet97": { + "default_brkout_mode": "1x800G" + }, + "Ethernet105": { + "default_brkout_mode": "1x800G" + }, + "Ethernet113": { + "default_brkout_mode": "1x800G" + }, + "Ethernet121": { + "default_brkout_mode": "1x800G" + }, + "Ethernet129": { + "default_brkout_mode": "1x800G" + }, + "Ethernet137": { + "default_brkout_mode": "1x800G" + }, + "Ethernet145": { + "default_brkout_mode": "1x800G" + }, + "Ethernet153": { + "default_brkout_mode": "1x800G" + }, + "Ethernet161": { + "default_brkout_mode": "1x800G" + }, + "Ethernet169": { + "default_brkout_mode": "1x800G" + }, + "Ethernet177": { + "default_brkout_mode": "1x800G" + }, + "Ethernet185": { + "default_brkout_mode": "1x800G" + }, + "Ethernet193": { + "default_brkout_mode": "1x800G" + }, + "Ethernet201": { + "default_brkout_mode": "1x800G" + }, + "Ethernet209": { + "default_brkout_mode": "1x800G" + }, + "Ethernet217": { + "default_brkout_mode": "1x800G" + }, + "Ethernet225": { + "default_brkout_mode": "1x800G" + }, + "Ethernet233": { + "default_brkout_mode": "1x800G" + }, + "Ethernet241": { + "default_brkout_mode": "1x800G" + }, + "Ethernet249": { + "default_brkout_mode": "1x800G" + }, + "Ethernet257": { + "default_brkout_mode": "1x800G" + }, + "Ethernet265": { + "default_brkout_mode": "1x800G" + }, + "Ethernet273": { + "default_brkout_mode": "1x800G" + }, + "Ethernet281": { + "default_brkout_mode": "1x800G" + }, + "Ethernet289": { + "default_brkout_mode": "1x800G" + }, + "Ethernet297": { + "default_brkout_mode": "1x800G" + }, + "Ethernet305": { + "default_brkout_mode": "1x800G" + }, + "Ethernet313": { + "default_brkout_mode": "1x800G" + }, + "Ethernet321": { + "default_brkout_mode": "1x800G" + }, + "Ethernet329": { + "default_brkout_mode": "1x800G" + }, + "Ethernet337": { + "default_brkout_mode": "1x800G" + }, + "Ethernet345": { + "default_brkout_mode": "1x800G" + }, + "Ethernet353": { + "default_brkout_mode": "1x800G" + }, + "Ethernet361": { + "default_brkout_mode": "1x800G" + }, + "Ethernet369": { + "default_brkout_mode": "1x800G" + }, + "Ethernet377": { + "default_brkout_mode": "1x800G" + }, + "Ethernet385": { + "default_brkout_mode": "1x800G" + }, + "Ethernet393": { + "default_brkout_mode": "1x800G" + }, + "Ethernet401": { + "default_brkout_mode": "1x800G" + }, + "Ethernet409": { + "default_brkout_mode": "1x800G" + }, + "Ethernet417": { + "default_brkout_mode": "1x800G" + }, + "Ethernet425": { + "default_brkout_mode": "1x800G" + }, + "Ethernet433": { + "default_brkout_mode": "1x800G" + }, + "Ethernet441": { + "default_brkout_mode": "1x800G" + }, + "Ethernet449": { + "default_brkout_mode": "1x800G" + }, + "Ethernet457": { + "default_brkout_mode": "1x800G" + }, + "Ethernet465": { + "default_brkout_mode": "1x800G" + }, + "Ethernet473": { + "default_brkout_mode": "1x800G" + }, + "Ethernet481": { + "default_brkout_mode": "1x800G" + }, + "Ethernet489": { + "default_brkout_mode": "1x800G" + }, + "Ethernet497": { + "default_brkout_mode": "1x800G" + }, + "Ethernet505": { + "default_brkout_mode": "1x800G" + }, + "Ethernet513": { + "default_brkout_mode": "1x25G" + }, + "Ethernet515": { + "default_brkout_mode": "1x25G" + } + } +} + diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/port_config.ini b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/port_config.ini new file mode 100644 index 00000000000..02e760ad87b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/port_config.ini @@ -0,0 +1,67 @@ +# name lanes alias index speed +Ethernet1 41,42,43,44,45,46,47,48 eightHundredGigE0/1 0 800000 +Ethernet9 33,34,35,36,37,38,39,40 eightHundredGigE0/2 1 800000 +Ethernet17 57,58,59,60,61,62,63,64 eightHundredGigE0/3 2 800000 +Ethernet25 49,50,51,52,53,54,55,56 eightHundredGigE0/4 3 800000 +Ethernet33 73,74,75,76,77,78,79,80 eightHundredGigE0/5 4 800000 +Ethernet41 65,66,67,68,69,70,71,72 eightHundredGigE0/6 5 800000 +Ethernet49 89,90,91,92,93,94,95,96 eightHundredGigE0/7 6 800000 +Ethernet57 81,82,83,84,85,86,87,88 eightHundredGigE0/8 7 800000 +Ethernet65 105,106,107,108,109,110,111,112 eightHundredGigE0/9 8 800000 +Ethernet73 97,98,99,100,101,102,103,104 eightHundredGigE0/10 9 800000 +Ethernet81 121,122,123,124,125,126,127,128 eightHundredGigE0/11 10 800000 +Ethernet89 113,114,115,116,117,118,119,120 eightHundredGigE0/12 11 800000 +Ethernet97 137,138,139,140,141,142,143,144 eightHundredGigE0/13 12 800000 +Ethernet105 129,130,131,132,133,134,135,136 eightHundredGigE0/14 13 800000 +Ethernet113 153,154,155,156,157,158,159,160 eightHundredGigE0/15 14 800000 +Ethernet121 145,146,147,148,149,150,151,152 eightHundredGigE0/16 15 800000 +Ethernet129 169,170,171,172,173,174,175,176 eightHundredGigE0/17 16 800000 +Ethernet137 161,162,163,164,165,166,167,168 eightHundredGigE0/18 17 800000 +Ethernet145 185,186,187,188,189,190,191,192 eightHundredGigE0/19 18 800000 +Ethernet153 177,178,179,180,181,182,183,184 eightHundredGigE0/20 19 800000 +Ethernet161 201,202,203,204,205,206,207,208 eightHundredGigE0/21 20 800000 +Ethernet169 193,194,195,196,197,198,199,200 eightHundredGigE0/22 21 800000 +Ethernet177 217,218,219,220,221,222,223,224 eightHundredGigE0/23 22 800000 +Ethernet185 209,210,211,212,213,214,215,216 eightHundredGigE0/24 23 800000 +Ethernet193 1,2,3,4,5,6,7,8 eightHundredGigE0/25 24 800000 +Ethernet201 9,10,11,12,13,14,15,16 eightHundredGigE0/26 25 800000 +Ethernet209 17,18,19,20,21,22,23,24 eightHundredGigE0/27 26 800000 +Ethernet217 25,26,27,28,29,30,31,32 eightHundredGigE0/28 27 800000 +Ethernet225 249,250,251,252,253,254,255,256 eightHundredGigE0/29 28 800000 +Ethernet233 241,242,243,244,245,246,247,248 eightHundredGigE0/30 29 800000 +Ethernet241 233,234,235,236,237,238,239,240 eightHundredGigE0/31 30 800000 +Ethernet249 225,226,227,228,229,230,231,232 eightHundredGigE0/32 31 800000 +Ethernet257 257,258,259,260,261,262,263,264 eightHundredGigE0/33 32 800000 +Ethernet265 265,266,267,268,269,270,271,272 eightHundredGigE0/34 33 800000 +Ethernet273 273,274,275,276,277,278,279,280 eightHundredGigE0/35 34 800000 +Ethernet281 281,282,283,284,285,286,287,288 eightHundredGigE0/36 35 800000 +Ethernet289 505,506,507,508,509,510,511,512 eightHundredGigE0/37 36 800000 +Ethernet297 497,498,499,500,501,502,503,504 eightHundredGigE0/38 37 800000 +Ethernet305 489,490,491,492,493,494,495,496 eightHundredGigE0/39 38 800000 +Ethernet313 481,482,483,484,485,486,487,488 eightHundredGigE0/40 39 800000 +Ethernet321 297,298,299,300,301,302,303,304 eightHundredGigE0/41 40 800000 +Ethernet329 289,290,291,292,293,294,295,296 eightHundredGigE0/42 41 800000 +Ethernet337 313,314,315,316,317,318,319,320 eightHundredGigE0/43 42 800000 +Ethernet345 305,306,307,308,309,310,311,312 eightHundredGigE0/44 43 800000 +Ethernet353 329,330,331,332,333,334,335,336 eightHundredGigE0/45 44 800000 +Ethernet361 321,322,323,324,325,326,327,328 eightHundredGigE0/46 45 800000 +Ethernet369 345,346,347,348,349,350,351,352 eightHundredGigE0/47 46 800000 +Ethernet377 337,338,339,340,341,342,343,344 eightHundredGigE0/48 47 800000 +Ethernet385 361,362,363,364,365,366,367,368 eightHundredGigE0/49 48 800000 +Ethernet393 353,354,355,356,357,358,359,360 eightHundredGigE0/50 49 800000 +Ethernet401 377,378,379,380,381,382,383,384 eightHundredGigE0/51 50 800000 +Ethernet409 369,370,371,372,373,374,375,376 eightHundredGigE0/52 51 800000 +Ethernet417 393,394,395,396,397,398,399,400 eightHundredGigE0/53 52 800000 +Ethernet425 385,386,387,388,389,390,391,392 eightHundredGigE0/54 53 800000 +Ethernet433 409,410,411,412,413,414,415,416 eightHundredGigE0/55 54 800000 +Ethernet441 401,402,403,404,405,406,407,408 eightHundredGigE0/56 55 800000 +Ethernet449 425,426,427,428,429,430,431,432 eightHundredGigE0/57 56 800000 +Ethernet457 417,418,419,420,421,422,423,424 eightHundredGigE0/58 57 800000 +Ethernet465 441,442,443,444,445,446,447,448 eightHundredGigE0/59 58 800000 +Ethernet473 433,434,435,436,437,438,439,440 eightHundredGigE0/60 59 800000 +Ethernet481 457,458,459,460,461,462,463,464 eightHundredGigE0/61 60 800000 +Ethernet489 449,450,451,452,453,454,455,456 eightHundredGigE0/62 61 800000 +Ethernet497 473,474,475,476,477,478,479,480 eightHundredGigE0/63 62 800000 +Ethernet505 465,466,467,468,469,470,471,472 eightHundredGigE0/64 63 800000 +Ethernet513 513 twentyfiveGigE0/65 64 25000 +Ethernet515 515 twentyfiveGigE0/66 65 25000 diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/sai.profile b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/sai.profile new file mode 100644 index 00000000000..ad2e534f2e5 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-m2-w6940-64oc-64x800G.config.yml diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml new file mode 100644 index 00000000000..33f2781d7b9 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml @@ -0,0 +1,14985 @@ +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02714356 + RX_LANE_MAP: 0x27506431 + TX_POLARITY_FLIP: 0x59 + RX_POLARITY_FLIP: 0x76 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x27360514 + RX_LANE_MAP: 0x46731520 + TX_POLARITY_FLIP: 0x8d + RX_POLARITY_FLIP: 0xd5 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x50234716 + RX_LANE_MAP: 0x31642750 + TX_POLARITY_FLIP: 0x5a + RX_POLARITY_FLIP: 0x0b + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17250436 + RX_LANE_MAP: 0x30764215 + TX_POLARITY_FLIP: 0xf5 + RX_POLARITY_FLIP: 0xbc + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x60427153 + RX_LANE_MAP: 0x15370426 + TX_POLARITY_FLIP: 0x16 + RX_POLARITY_FLIP: 0xb0 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73524016 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0xb0 + RX_POLARITY_FLIP: 0xa0 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x61042537 + RX_LANE_MAP: 0x05172436 + TX_POLARITY_FLIP: 0xd2 + RX_POLARITY_FLIP: 0x0b + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16042537 + RX_LANE_MAP: 0x05172436 + TX_POLARITY_FLIP: 0x52 + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63250471 + RX_LANE_MAP: 0x63427150 + TX_POLARITY_FLIP: 0x3a + RX_POLARITY_FLIP: 0x51 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73524016 + RX_LANE_MAP: 0x63427150 + TX_POLARITY_FLIP: 0xb4 + RX_POLARITY_FLIP: 0x50 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x61042537 + RX_LANE_MAP: 0x05172436 + TX_POLARITY_FLIP: 0xd2 + RX_POLARITY_FLIP: 0x0b + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16042537 + RX_LANE_MAP: 0x05172436 + TX_POLARITY_FLIP: 0x52 + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63250471 + RX_LANE_MAP: 0x63427150 + TX_POLARITY_FLIP: 0x3a + RX_POLARITY_FLIP: 0x51 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73524016 + RX_LANE_MAP: 0x63427150 + TX_POLARITY_FLIP: 0xb4 + RX_POLARITY_FLIP: 0x50 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x61042537 + RX_LANE_MAP: 0x05172436 + TX_POLARITY_FLIP: 0xd2 + RX_POLARITY_FLIP: 0x0b + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16042537 + RX_LANE_MAP: 0x05172436 + TX_POLARITY_FLIP: 0x52 + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17526034 + RX_LANE_MAP: 0x34261507 + TX_POLARITY_FLIP: 0xc1 + RX_POLARITY_FLIP: 0x94 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37250641 + RX_LANE_MAP: 0x34261507 + TX_POLARITY_FLIP: 0x43 + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14605273 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0x3d + RX_POLARITY_FLIP: 0xa8 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41605273 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0xbd + RX_POLARITY_FLIP: 0xa9 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17250634 + RX_LANE_MAP: 0x34261507 + TX_POLARITY_FLIP: 0xc1 + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37250641 + RX_LANE_MAP: 0x34261507 + TX_POLARITY_FLIP: 0x43 + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14605273 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0x3f + RX_POLARITY_FLIP: 0xa8 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41605273 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0xb4 + RX_POLARITY_FLIP: 0xa9 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17526034 + RX_LANE_MAP: 0x34261507 + TX_POLARITY_FLIP: 0xc1 + RX_POLARITY_FLIP: 0xb7 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37250641 + RX_LANE_MAP: 0x34261507 + TX_POLARITY_FLIP: 0x43 + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14305267 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0x0e + RX_POLARITY_FLIP: 0xa9 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x72634150 + RX_LANE_MAP: 0x27340516 + TX_POLARITY_FLIP: 0x11 + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x31647025 + RX_LANE_MAP: 0x64531072 + TX_POLARITY_FLIP: 0xab + RX_POLARITY_FLIP: 0xaf + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x15602743 + RX_LANE_MAP: 0x52137604 + TX_POLARITY_FLIP: 0x46 + RX_POLARITY_FLIP: 0xe7 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73564012 + RX_LANE_MAP: 0x34107625 + TX_POLARITY_FLIP: 0x9f + RX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76243501 + RX_LANE_MAP: 0x35162470 + TX_POLARITY_FLIP: 0xa6 + RX_POLARITY_FLIP: 0xc8 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x07546321 + RX_LANE_MAP: 0x25176430 + TX_POLARITY_FLIP: 0x65 + RX_POLARITY_FLIP: 0x9e + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37164250 + RX_LANE_MAP: 0x75032614 + TX_POLARITY_FLIP: 0x32 + RX_POLARITY_FLIP: 0x3e + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73402516 + RX_LANE_MAP: 0x60347215 + TX_POLARITY_FLIP: 0x7a + RX_POLARITY_FLIP: 0xd9 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x71345062 + RX_LANE_MAP: 0x42173056 + TX_POLARITY_FLIP: 0xa1 + RX_POLARITY_FLIP: 0x60 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x70416352 + RX_LANE_MAP: 0x16053427 + TX_POLARITY_FLIP: 0x18 + RX_POLARITY_FLIP: 0xa8 + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73526014 + RX_LANE_MAP: 0x43625170 + TX_POLARITY_FLIP: 0x78 + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41062537 + RX_LANE_MAP: 0x07152634 + TX_POLARITY_FLIP: 0xc3 + RX_POLARITY_FLIP: 0x98 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14062537 + RX_LANE_MAP: 0x07152634 + TX_POLARITY_FLIP: 0x41 + RX_POLARITY_FLIP: 0x89 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x43526071 + RX_LANE_MAP: 0x43625170 + TX_POLARITY_FLIP: 0x7c + RX_POLARITY_FLIP: 0x94 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73526014 + RX_LANE_MAP: 0x43625170 + TX_POLARITY_FLIP: 0x7c + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41062537 + RX_LANE_MAP: 0x07152634 + TX_POLARITY_FLIP: 0xc1 + RX_POLARITY_FLIP: 0x56 + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14062537 + RX_LANE_MAP: 0x07152634 + TX_POLARITY_FLIP: 0x41 + RX_POLARITY_FLIP: 0x01 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x43526071 + RX_LANE_MAP: 0x43625170 + TX_POLARITY_FLIP: 0xfe + RX_POLARITY_FLIP: 0x94 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x73526014 + RX_LANE_MAP: 0x43625170 + TX_POLARITY_FLIP: 0x7c + RX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41062537 + RX_LANE_MAP: 0x07152634 + TX_POLARITY_FLIP: 0xc1 + RX_POLARITY_FLIP: 0x56 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14062537 + RX_LANE_MAP: 0x07152634 + TX_POLARITY_FLIP: 0x41 + RX_POLARITY_FLIP: 0x01 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67524031 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0x8b + RX_POLARITY_FLIP: 0x5e + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37250461 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0x87 + RX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16405273 + RX_LANE_MAP: 0x50714263 + TX_POLARITY_FLIP: 0x1e + RX_POLARITY_FLIP: 0xcb + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x61405273 + RX_LANE_MAP: 0x50714263 + TX_POLARITY_FLIP: 0x9e + RX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17524036 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0x8b + RX_POLARITY_FLIP: 0x5e + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37250461 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0x87 + RX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16405273 + RX_LANE_MAP: 0x50714263 + TX_POLARITY_FLIP: 0x1e + RX_POLARITY_FLIP: 0xcb + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x61405273 + RX_LANE_MAP: 0x50714263 + TX_POLARITY_FLIP: 0x9e + RX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17250436 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0x4d + RX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37250461 + RX_LANE_MAP: 0x36241705 + TX_POLARITY_FLIP: 0x87 + RX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x61405273 + RX_LANE_MAP: 0x50314267 + TX_POLARITY_FLIP: 0x0e + RX_POLARITY_FLIP: 0xc7 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37146250 + RX_LANE_MAP: 0x35062714 + TX_POLARITY_FLIP: 0xfe + RX_POLARITY_FLIP: 0xd3 + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x27165304 + RX_LANE_MAP: 0x75340126 + TX_POLARITY_FLIP: 0x62 + RX_POLARITY_FLIP: 0x45 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10527634 + RX_LANE_MAP: 0x53702614 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0x89 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x04561237 + RX_LANE_MAP: 0x05643217 + TX_POLARITY_FLIP: 0x31 + RX_POLARITY_FLIP: 0xf0 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76540123 + RX_LANE_MAP: 0x13056472 + TX_POLARITY_FLIP: 0xe8 + RX_POLARITY_FLIP: 0x5d + ? + PC_PM_ID: 65 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x3012 + TX_POLARITY_FLIP: 0 + RX_LANE_MAP: 0x3012 + RX_POLARITY_FLIP: 0 +... + +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + # CPU port + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 5 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 11 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 15 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 26 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 37 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 48 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 59 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 70 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 81 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 88 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 92 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 99 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 103 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 114 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 125 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 136 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 147 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 154 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 158 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 169 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 180 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 191 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 202 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 213 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 224 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 235 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 246 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 257 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 268 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 279 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 286 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 290 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 297 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 301 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 312 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 323 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 334 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 341 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 345 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 76 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 274 + : + PC_PHYS_PORT_ID: 515 +... + +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 0 + : + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [1, 5, 11, 15, 22, 26, 33, 37, 44, 48, 55, 59, 66, 70, 77, 81, 88, 92, 99, 103, 110, 114, 121, 125, 132, 136, 143, 147, 154, 158, 165, 169, 176, 180, 187, 191, 198, 202, 209, 213, 220, 224, 231, 235, 242, 246, 253, 257, 264, 268, 275, 279, 286, 290, 297, 301, 308, 312, 319, 323, 330, 334, 341, 345] + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [76, 274] + : + ENABLE: 0 + SPEED: 25000 + NUM_LANES: 1 + MAX_FRAME_SIZE: 9416 +... + +--- +device: + 0: + PC_PMD_FIRMWARE: + ? + PORT_ID: [1, 5, 11, 15, 22, 26, 33, 37, 44, 48, 55, 59, 66, 70, 77, 81, 88, 92, 99, 103, 110, 114, 121, 125, 132, 136, 143, 147, 154, 158, 165, 169, 176, 180, 187, 191, 198, 202, 209, 213, 220, 224, 231, 235, 242, 246, 253, 257, 264, 268, 275, 279, 286, 290, 297, 301, 308, 312, 319, 323, 330, 334, 341, 345] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE +... + +--- +device: + 0: + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... + +--- +device: + 0: + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... + +--- +bcm_device: + 0: + global: + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 2048 + l3_alpm_template: 2 + l3_alpm2_bnk_threshold: 100 + uft_mode: 1 + l3_enable: 1 + l2_hitbit_enable: 0 + pktio_mode: 1 + sai_pfc_defaults_disable: 1 + sai_optimized_mmu: 1 + sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc +... + +--- +bcm_device: + 0: + port: + "*": + encap_mode: IEEE + dport_map_enable: 1 + 26: + dport_map_port: 1 + 27: + dport_map_port: 2 + 28: + dport_map_port: 3 + 29: + dport_map_port: 4 + 22: + dport_map_port: 5 + 23: + dport_map_port: 6 + 24: + dport_map_port: 7 + 25: + dport_map_port: 8 + 37: + dport_map_port: 9 + 38: + dport_map_port: 10 + 39: + dport_map_port: 11 + 40: + dport_map_port: 12 + 33: + dport_map_port: 13 + 34: + dport_map_port: 14 + 35: + dport_map_port: 15 + 36: + dport_map_port: 16 + 48: + dport_map_port: 17 + 49: + dport_map_port: 18 + 50: + dport_map_port: 19 + 51: + dport_map_port: 20 + 44: + dport_map_port: 21 + 45: + dport_map_port: 22 + 46: + dport_map_port: 23 + 47: + dport_map_port: 24 + 59: + dport_map_port: 25 + 60: + dport_map_port: 26 + 61: + dport_map_port: 27 + 62: + dport_map_port: 28 + 55: + dport_map_port: 29 + 56: + dport_map_port: 30 + 57: + dport_map_port: 31 + 58: + dport_map_port: 32 + 70: + dport_map_port: 33 + 71: + dport_map_port: 34 + 72: + dport_map_port: 35 + 73: + dport_map_port: 36 + 66: + dport_map_port: 37 + 67: + dport_map_port: 38 + 68: + dport_map_port: 39 + 69: + dport_map_port: 40 + 81: + dport_map_port: 41 + 82: + dport_map_port: 42 + 83: + dport_map_port: 43 + 84: + dport_map_port: 44 + 77: + dport_map_port: 45 + 78: + dport_map_port: 46 + 79: + dport_map_port: 47 + 80: + dport_map_port: 48 + 92: + dport_map_port: 49 + 93: + dport_map_port: 50 + 94: + dport_map_port: 51 + 95: + dport_map_port: 52 + 88: + dport_map_port: 53 + 89: + dport_map_port: 54 + 90: + dport_map_port: 55 + 91: + dport_map_port: 56 + 103: + dport_map_port: 57 + 104: + dport_map_port: 58 + 105: + dport_map_port: 59 + 106: + dport_map_port: 60 + 99: + dport_map_port: 61 + 100: + dport_map_port: 62 + 101: + dport_map_port: 63 + 102: + dport_map_port: 64 + 114: + dport_map_port: 65 + 115: + dport_map_port: 66 + 116: + dport_map_port: 67 + 117: + dport_map_port: 68 + 110: + dport_map_port: 69 + 111: + dport_map_port: 70 + 112: + dport_map_port: 71 + 113: + dport_map_port: 72 + 125: + dport_map_port: 73 + 126: + dport_map_port: 74 + 127: + dport_map_port: 75 + 128: + dport_map_port: 76 + 121: + dport_map_port: 77 + 122: + dport_map_port: 78 + 123: + dport_map_port: 79 + 124: + dport_map_port: 80 + 136: + dport_map_port: 81 + 137: + dport_map_port: 82 + 138: + dport_map_port: 83 + 139: + dport_map_port: 84 + 132: + dport_map_port: 85 + 133: + dport_map_port: 86 + 134: + dport_map_port: 87 + 135: + dport_map_port: 88 + 147: + dport_map_port: 89 + 148: + dport_map_port: 90 + 149: + dport_map_port: 91 + 150: + dport_map_port: 92 + 143: + dport_map_port: 93 + 144: + dport_map_port: 94 + 145: + dport_map_port: 95 + 146: + dport_map_port: 96 + 1: + dport_map_port: 97 + 2: + dport_map_port: 98 + 3: + dport_map_port: 99 + 4: + dport_map_port: 100 + 5: + dport_map_port: 101 + 6: + dport_map_port: 102 + 7: + dport_map_port: 103 + 8: + dport_map_port: 104 + 11: + dport_map_port: 105 + 12: + dport_map_port: 106 + 13: + dport_map_port: 107 + 14: + dport_map_port: 108 + 15: + dport_map_port: 109 + 16: + dport_map_port: 110 + 17: + dport_map_port: 111 + 18: + dport_map_port: 112 + 169: + dport_map_port: 113 + 170: + dport_map_port: 114 + 171: + dport_map_port: 115 + 172: + dport_map_port: 116 + 165: + dport_map_port: 117 + 166: + dport_map_port: 118 + 167: + dport_map_port: 119 + 168: + dport_map_port: 120 + 158: + dport_map_port: 121 + 159: + dport_map_port: 122 + 160: + dport_map_port: 123 + 161: + dport_map_port: 124 + 154: + dport_map_port: 125 + 155: + dport_map_port: 126 + 156: + dport_map_port: 127 + 157: + dport_map_port: 128 + 176: + dport_map_port: 129 + 177: + dport_map_port: 130 + 178: + dport_map_port: 131 + 179: + dport_map_port: 132 + 180: + dport_map_port: 133 + 181: + dport_map_port: 134 + 182: + dport_map_port: 135 + 183: + dport_map_port: 136 + 187: + dport_map_port: 137 + 188: + dport_map_port: 138 + 189: + dport_map_port: 139 + 190: + dport_map_port: 140 + 191: + dport_map_port: 141 + 192: + dport_map_port: 142 + 193: + dport_map_port: 143 + 194: + dport_map_port: 144 + 345: + dport_map_port: 145 + 346: + dport_map_port: 146 + 347: + dport_map_port: 147 + 348: + dport_map_port: 148 + 341: + dport_map_port: 149 + 342: + dport_map_port: 150 + 343: + dport_map_port: 151 + 344: + dport_map_port: 152 + 334: + dport_map_port: 153 + 335: + dport_map_port: 154 + 336: + dport_map_port: 155 + 337: + dport_map_port: 156 + 330: + dport_map_port: 157 + 331: + dport_map_port: 158 + 332: + dport_map_port: 159 + 333: + dport_map_port: 160 + 202: + dport_map_port: 161 + 203: + dport_map_port: 162 + 204: + dport_map_port: 163 + 205: + dport_map_port: 164 + 198: + dport_map_port: 165 + 199: + dport_map_port: 166 + 200: + dport_map_port: 167 + 201: + dport_map_port: 168 + 213: + dport_map_port: 169 + 214: + dport_map_port: 170 + 215: + dport_map_port: 171 + 216: + dport_map_port: 172 + 209: + dport_map_port: 173 + 210: + dport_map_port: 174 + 211: + dport_map_port: 175 + 212: + dport_map_port: 176 + 224: + dport_map_port: 177 + 225: + dport_map_port: 178 + 226: + dport_map_port: 179 + 227: + dport_map_port: 180 + 220: + dport_map_port: 181 + 221: + dport_map_port: 182 + 222: + dport_map_port: 183 + 223: + dport_map_port: 184 + 235: + dport_map_port: 185 + 236: + dport_map_port: 186 + 237: + dport_map_port: 187 + 238: + dport_map_port: 188 + 231: + dport_map_port: 189 + 232: + dport_map_port: 190 + 233: + dport_map_port: 191 + 234: + dport_map_port: 192 + 246: + dport_map_port: 193 + 247: + dport_map_port: 194 + 248: + dport_map_port: 195 + 249: + dport_map_port: 196 + 242: + dport_map_port: 197 + 243: + dport_map_port: 198 + 244: + dport_map_port: 199 + 245: + dport_map_port: 200 + 257: + dport_map_port: 201 + 258: + dport_map_port: 202 + 259: + dport_map_port: 203 + 260: + dport_map_port: 204 + 253: + dport_map_port: 205 + 254: + dport_map_port: 206 + 255: + dport_map_port: 207 + 256: + dport_map_port: 208 + 268: + dport_map_port: 209 + 269: + dport_map_port: 210 + 270: + dport_map_port: 211 + 271: + dport_map_port: 212 + 264: + dport_map_port: 213 + 265: + dport_map_port: 214 + 266: + dport_map_port: 215 + 267: + dport_map_port: 216 + 279: + dport_map_port: 217 + 280: + dport_map_port: 218 + 281: + dport_map_port: 219 + 282: + dport_map_port: 220 + 275: + dport_map_port: 221 + 276: + dport_map_port: 222 + 277: + dport_map_port: 223 + 278: + dport_map_port: 224 + 290: + dport_map_port: 225 + 291: + dport_map_port: 226 + 292: + dport_map_port: 227 + 293: + dport_map_port: 228 + 286: + dport_map_port: 229 + 287: + dport_map_port: 230 + 288: + dport_map_port: 231 + 289: + dport_map_port: 232 + 301: + dport_map_port: 233 + 302: + dport_map_port: 234 + 303: + dport_map_port: 235 + 304: + dport_map_port: 236 + 297: + dport_map_port: 237 + 298: + dport_map_port: 238 + 299: + dport_map_port: 239 + 300: + dport_map_port: 240 + 312: + dport_map_port: 241 + 313: + dport_map_port: 242 + 314: + dport_map_port: 243 + 315: + dport_map_port: 244 + 308: + dport_map_port: 245 + 309: + dport_map_port: 246 + 310: + dport_map_port: 247 + 311: + dport_map_port: 248 + 323: + dport_map_port: 249 + 324: + dport_map_port: 250 + 325: + dport_map_port: 251 + 326: + dport_map_port: 252 + 319: + dport_map_port: 253 + 320: + dport_map_port: 254 + 321: + dport_map_port: 255 + 322: + dport_map_port: 256 + 76: + dport_map_port: 257 + 274: + dport_map_port: 258 +... + +--- +device: + 0: + PC_TX_TAPS: + ? + PORT_ID: 26 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 26 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 22 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 37 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 33 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 48 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 44 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 59 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 55 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 70 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 66 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 81 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 77 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 92 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 88 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 103 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 99 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 114 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 110 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 125 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 121 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 136 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 132 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 147 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 143 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 1 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 5 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 11 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 15 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 169 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 16 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 140 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 2 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 165 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 16 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 140 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 2 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 158 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 154 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 176 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 180 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 187 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 191 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 345 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 24 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 140 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 341 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 334 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 330 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 202 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 198 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 213 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 209 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 224 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 220 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 235 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 231 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 246 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 242 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 257 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 253 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 268 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 264 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 279 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 275 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 290 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 286 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 301 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 297 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 32 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 132 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 312 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 308 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 323 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 0 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 1 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 2 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 3 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 4 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 5 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 6 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 + ? + PORT_ID: 319 + LANE_INDEX: 7 + : + TX_SIG_MODE_AUTO: 0 + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TXFIR_TAP_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TX_PRE_SIGN: 1 + TX_PRE_AUTO: 0 + TX_PRE: 28 + TX_MAIN_SIGN: 0 + TX_MAIN_AUTO: 0 + TX_MAIN: 136 + TX_POST_SIGN: 0 + TX_POST_AUTO: 0 + TX_POST: 0 + TX_PRE2_SIGN: 0 + TX_PRE2_AUTO: 0 + TX_PRE2: 4 + TX_POST2_SIGN: 0 + TX_POST2_AUTO: 0 + TX_POST2: 0 + TX_PRE3_SIGN: 0 + TX_PRE3_AUTO: 0 + TX_PRE3: 0 +... diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6940-64oc-r0/custom_led.bin new file mode 100644 index 00000000000..04807432077 Binary files /dev/null and b/device/micas/x86_64-micas_m2-w6940-64oc-r0/custom_led.bin differ diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/default_sku b/device/micas/x86_64-micas_m2-w6940-64oc-r0/default_sku new file mode 100644 index 00000000000..76806884eff --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/default_sku @@ -0,0 +1 @@ +M2-W6940-64OC l2 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/dev.xml b/device/micas/x86_64-micas_m2-w6940-64oc-r0/dev.xml new file mode 100644 index 00000000000..99d4cec634e --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/dev.xml @@ -0,0 +1,1153 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/fru.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/fru.py new file mode 100644 index 00000000000..f95164e0360 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/fru.py @@ -0,0 +1,961 @@ +#!/usr/bin/python3 +import collections +from datetime import datetime, timedelta +from bitarray import bitarray + + +__DEBUG__ = "N" + + +class FruException(Exception): + def __init__(self, message='fruerror', code=-100): + err = 'errcode: {0} message:{1}'.format(code, message) + Exception.__init__(self, err) + self.code = code + self.message = message + + +def e_print(err): + print("ERROR: " + err) + + +def d_print(debug_info): + if __DEBUG__ == "Y": + print(debug_info) + + +class FruUtil(): + @staticmethod + def decodeLength(value): + a = bitarray(8) + a.setall(True) + a[0:1] = 0 + a[1:2] = 0 + x = ord(a.tobytes()) + return x & ord(value) + + @staticmethod + def minToData(): + starttime = datetime(1996, 1, 1, 0, 0, 0) + endtime = datetime.now() + seconds = (endtime - starttime).total_seconds() + mins = seconds // 60 + m = int(round(mins)) + return m + + @staticmethod + def getTimeFormat(): + return datetime.now().strftime('%Y-%m-%d') + + @staticmethod + def getTypeLength(value): + if value is None or len(value) == 0: + return 0 + a = bitarray(8) + a.setall(False) + a[0:1] = 1 + a[1:2] = 1 + x = ord(a.tobytes()) + return x | len(value) + + @staticmethod + def checksum(b): + result = 0 + for item in b: + result += ord(item) + return (0x100 - (result & 0xff)) & 0xff + + +class BaseArea(object): + SUGGESTED_SIZE_COMMON_HEADER = 8 + SUGGESTED_SIZE_INTERNAL_USE_AREA = 72 + SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32 + SUGGESTED_SIZE_BOARD_INFO_AREA = 80 + SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80 + + INITVALUE = b'\x00' + resultvalue = INITVALUE * 256 + COMMON_HEAD_VERSION = b'\x01' + __childList = None + + def __init__(self, name="", size=0, offset=0): + self.__childList = [] + self._offset = offset + self.name = name + self._size = size + self._isPresent = False + self._data = b'\x00' * size + + @property + def childList(self): + return self.__childList + + @childList.setter + def childList(self, value): + self.__childList = value + + @property + def offset(self): + return self._offset + + @offset.setter + def offset(self, value): + self._offset = value + + @property + def size(self): + return self._size + + @size.setter + def size(self, value): + self._size = value + + @property + def data(self): + return self._data + + @data.setter + def data(self, value): + self._data = value + + @property + def isPresent(self): + return self._isPresent + + @isPresent.setter + def isPresent(self, value): + self._isPresent = value + + +class InternalUseArea(BaseArea): + pass + + +class ChassisInfoArea(BaseArea): + pass + + +class BoardInfoArea(BaseArea): + _boardTime = None + _fields = None + _mfg_date = None + areaversion = None + _boardversion = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "mfg_date : %s \n" \ + "boardManufacturer : %s \n" \ + "boardProductName : %s \n" \ + "boardSerialNumber : %s \n" \ + "boardPartNumber : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.boardversion), self.size, + self.language, self.getMfgRealData(), + self.boardManufacturer, self.boardProductName, + self.boardSerialNumber, self.boardPartNumber, + self.fruFileId) + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "boardextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["boardversion"] = ord(self.boardversion) + dic["boardlength"] = self.size + dic["boardlanguage"] = self.language + dic["boardmfg_date"] = self.getMfgRealData() + dic["boardManufacturer"] = self.boardManufacturer + dic["boardProductName"] = self.boardProductName + dic["boardSerialNumber"] = self.boardSerialNumber + dic["boardPartNumber"] = self.boardPartNumber + dic["boardfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] + index += 1 + d_print("decode length :%d class size:%d" % + ((ord(self.data[index]) * 8), self.size)) + index += 2 + + timetmp = self.data[index: index + 3] + self.mfg_date = ord(timetmp[0]) | ( + ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16) + d_print("decode getMfgRealData :%s" % self.getMfgRealData()) + index += 3 + + templen = FruUtil.decodeLength(self.data[index]) + self.boardManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardManufacturer:%s" % self.boardManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardProductName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardProductName:%s" % self.boardProductName) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardSerialNumber:%s" % self.boardSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardPartNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardPartNumber:%s" % self.boardPartNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if self.data[index] != chr(0xc1): + templen = FruUtil.decodeLength(self.data[index]) + tmpval = self.data[index + 1: index + templen + 1] + setattr(self, valtmp, tmpval) + index += templen + 1 + d_print("decode boardextra%d:%s" % (i, tmpval)) + else: + break + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("boardInfoArea version:%x" % ord(self.boardversion)) + d_print("boardInfoArea length:%d" % self.size) + d_print("boardInfoArea language:%x" % self.language) + self.mfg_date = FruUtil.minToData() + d_print("boardInfoArea mfg_date:%x" % self.mfg_date) + + self.data = chr(ord(self.boardversion)) + \ + chr(self.size // 8) + chr(self.language) + + self.data += chr(self.mfg_date & 0xFF) + self.data += chr((self.mfg_date >> 8) & 0xFF) + self.data += chr((self.mfg_date >> 16) & 0xFF) + + d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer) + typelength = FruUtil.getTypeLength(self.boardManufacturer) + self.data += chr(typelength) + self.data += self.boardManufacturer + + d_print("boardInfoArea boardProductName:%s" % self.boardProductName) + self.data += chr(FruUtil.getTypeLength(self.boardProductName)) + self.data += self.boardProductName + + d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber) + self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber)) + self.data += self.boardSerialNumber + + d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber) + self.data += chr(FruUtil.getTypeLength(self.boardPartNumber)) + self.data += self.boardPartNumber + + d_print("boardInfoArea fruFileId:%s" % self.fruFileId) + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + d_print("self data:%d" % len(self.data)) + d_print("self size:%d" % self.size) + d_print("adjust size:%d" % (self.size - len(self.data) - 1)) + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + + # checksum + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + def getMfgRealData(self): + starttime = datetime(1996, 1, 1, 0, 0, 0) + mactime = starttime + timedelta(minutes=self.mfg_date) + return mactime + + @property + def language(self): + self._language = 25 + return self._language + + @property + def mfg_date(self): + return self._mfg_date + + @mfg_date.setter + def mfg_date(self, val): + self._mfg_date = val + + @property + def boardversion(self): + self._boardversion = self.COMMON_HEAD_VERSION + return self._boardversion + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, val): + self._FRUFileID = val + + @property + def boardPartNumber(self): + return self._boardPartNumber + + @boardPartNumber.setter + def boardPartNumber(self, val): + self._boardPartNumber = val + + @property + def boardSerialNumber(self): + return self._boardSerialNumber + + @boardSerialNumber.setter + def boardSerialNumber(self, val): + self._boardSerialNumber = val + + @property + def boardProductName(self): + return self._boradProductName + + @boardProductName.setter + def boardProductName(self, val): + self._boradProductName = val + + @property + def boardManufacturer(self): + return self._boardManufacturer + + @boardManufacturer.setter + def boardManufacturer(self, val): + self._boardManufacturer = val + + @property + def boardTime(self): + return self._boardTime + + @boardTime.setter + def boardTime(self, val): + self._boardTime = val + + @property + def fields(self): + return self._fields + + @fields.setter + def fields(self, val): + self._fields = val + + +class ProductInfoArea(BaseArea): + _productManufacturer = None + _productAssetTag = None + _FRUFileID = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "productManufacturer : %s \n" \ + "productName : %s \n" \ + "productPartModelName: %s \n" \ + "productVersion : %s \n" \ + "productSerialNumber : %s \n" \ + "productAssetTag : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.areaversion), self.size, + self.language, self.productManufacturer, + self.productName, self.productPartModelName, + self.productVersion, self.productSerialNumber, + self.productAssetTag, self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "productextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["productversion"] = ord(self.areaversion) + dic["productlength"] = self.size + dic["productlanguage"] = self.language + dic["productManufacturer"] = self.productManufacturer + dic["productName"] = self.productName + dic["productPartModelName"] = self.productPartModelName + dic["productVersion"] = int(self.productVersion, 16) + dic["productSerialNumber"] = self.productSerialNumber + dic["productAssetTag"] = self.productAssetTag + dic["productfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] # 0 + index += 1 + d_print("decode length %d" % (ord(self.data[index]) * 8)) + d_print("class size %d" % self.size) + index += 2 + + templen = FruUtil.decodeLength(self.data[index]) + self.productManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productManufacturer:%s" % self.productManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.productName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productName:%s" % self.productName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productPartModelName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productPartModelName:%s" % self.productPartModelName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productVersion = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productVersion:%s" % self.productVersion) + + templen = FruUtil.decodeLength(self.data[index]) + self.productSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productSerialNumber:%s" % self.productSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.productAssetTag = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productAssetTag:%s" % self.productAssetTag) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if self.data[index] != chr(0xc1) and index < self.size - 1: + templen = FruUtil.decodeLength(self.data[index]) + if templen == 0: + break + tmpval = self.data[index + 1: index + templen + 1] + d_print("decode boardextra%d:%s" % (i, tmpval)) + setattr(self, valtmp, tmpval) + index += templen + 1 + else: + break + + @property + def productVersion(self): + return self._productVersion + + @productVersion.setter + def productVersion(self, name): + self._productVersion = name + + @property + def areaversion(self): + self._areaversion = self.COMMON_HEAD_VERSION + return self._areaversion + + @areaversion.setter + def areaversion(self, name): + self._areaversion = name + + @property + def language(self): + self._language = 25 + return self._language + + @property + def productManufacturer(self): + return self._productManufacturer + + @productManufacturer.setter + def productManufacturer(self, name): + self._productManufacturer = name + + @property + def productName(self): + return self._productName + + @productName.setter + def productName(self, name): + self._productName = name + + @property + def productPartModelName(self): + return self._productPartModelName + + @productPartModelName.setter + def productPartModelName(self, name): + self._productPartModelName = name + + @property + def productSerialNumber(self): + return self._productSerialNumber + + @productSerialNumber.setter + def productSerialNumber(self, name): + self._productSerialNumber = name + + @property + def productAssetTag(self): + return self._productAssetTag + + @productAssetTag.setter + def productAssetTag(self, name): + self._productAssetTag = name + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, name): + self._FRUFileID = name + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("product version:%x" % ord(self.areaversion)) + d_print("product length:%d" % self.size) + d_print("product language:%x" % self.language) + self.data = chr(ord(self.areaversion)) + \ + chr(self.size // 8) + chr(self.language) + + typelength = FruUtil.getTypeLength(self.productManufacturer) + self.data += chr(typelength) + self.data += self.productManufacturer + + self.data += chr(FruUtil.getTypeLength(self.productName)) + self.data += self.productName + + self.data += chr(FruUtil.getTypeLength(self.productPartModelName)) + self.data += self.productPartModelName + + self.data += chr(FruUtil.getTypeLength(self.productVersion)) + self.data += self.productVersion + + self.data += chr(FruUtil.getTypeLength(self.productSerialNumber)) + self.data += self.productSerialNumber + + self.data += chr(FruUtil.getTypeLength(self.productAssetTag)) + if self.productAssetTag is not None: + self.data += self.productAssetTag + + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea productextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + d_print("self.data:%d" % len(self.data)) + d_print("self.size:%d" % self.size) + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + +class MultiRecordArea(BaseArea): + pass + + +class Field(object): + + def __init__(self, fieldType="ASCII", fieldData=""): + self.fieldData = fieldData + self.fieldType = fieldType + + @property + def fieldType(self): + return self.fieldType + + @property + def fieldData(self): + return self.fieldData + + +class ipmifru(BaseArea): + _BoardInfoArea = None + _ProductInfoArea = None + _InternalUseArea = None + _ChassisInfoArea = None + _multiRecordArea = None + _productinfoAreaOffset = BaseArea.INITVALUE + _boardInfoAreaOffset = BaseArea.INITVALUE + _internalUserAreaOffset = BaseArea.INITVALUE + _chassicInfoAreaOffset = BaseArea.INITVALUE + _multiRecordAreaOffset = BaseArea.INITVALUE + _bindata = None + _bodybin = None + _version = BaseArea.COMMON_HEAD_VERSION + _zeroCheckSum = None + _frusize = 256 + + def __str__(self): + tmpstr = "" + if self.boardInfoArea.isPresent: + tmpstr += "\nboardinfoarea: \n" + tmpstr += self.boardInfoArea.__str__() + if self.productInfoArea.isPresent: + tmpstr += "\nproductinfoarea: \n" + tmpstr += self.productInfoArea.__str__() + return tmpstr + + def decodeBin(self, eeprom): + commonHead = eeprom[0:8] + d_print("decode version %x" % ord(commonHead[0])) + if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]): + raise FruException("HEAD VERSION error,not Fru format!", -10) + if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]): + strtemp = "check header checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(commonHead[0:7]), ord(commonHead[7])) + raise FruException(strtemp, -3) + if ord(commonHead[1]) != ord(self.INITVALUE): + d_print("Internal Use Area is present") + self.internalUseArea = InternalUseArea( + name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA) + self.internalUseArea.isPresent = True + self.internalUserAreaOffset = ord(commonHead[1]) + self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: ( + self.internalUserAreaOffset * 8 + self.internalUseArea.size)] + if ord(commonHead[2]) != ord(self.INITVALUE): + d_print("Chassis Info Area is present") + self.chassisInfoArea = ChassisInfoArea( + name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA) + self.chassisInfoArea.isPresent = True + self.chassicInfoAreaOffset = ord(commonHead[2]) + self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: ( + self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)] + if ord(commonHead[3]) != ord(self.INITVALUE): + self.boardInfoArea = BoardInfoArea( + name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA) + self.boardInfoArea.isPresent = True + self.boardInfoAreaOffset = ord(commonHead[3]) + self.boardInfoArea.size = ord( + eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8 + d_print("Board Info Area is present size:%d" % + (self.boardInfoArea.size)) + self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: ( + self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)] + if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]): + strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \ + (FruUtil.checksum( + self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.boardInfoArea.decodedata() + if ord(commonHead[4]) != ord(self.INITVALUE): + d_print("Product Info Area is present") + self.productInfoArea = ProductInfoArea( + name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA) + self.productInfoArea.isPresent = True + self.productinfoAreaOffset = ord(commonHead[4]) + d_print("length offset value: %02x" % + ord(eeprom[self.productinfoAreaOffset * 8 + 1])) + self.productInfoArea.size = ord( + eeprom[self.productinfoAreaOffset * 8 + 1]) * 8 + d_print("Product Info Area is present size:%d" % + (self.productInfoArea.size)) + + self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: ( + self.productinfoAreaOffset * 8 + self.productInfoArea.size)] + if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]): + strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.productInfoArea.decodedata() + if ord(commonHead[5]) != ord(self.INITVALUE): + self.multiRecordArea = MultiRecordArea( + name="MultiRecord record Area ") + d_print("MultiRecord record present") + self.multiRecordArea.isPresent = True + self.multiRecordAreaOffset = ord(commonHead[5]) + self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: ( + self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)] + + def initDefault(self): + self.version = self.COMMON_HEAD_VERSION + self.internalUserAreaOffset = self.INITVALUE + self.chassicInfoAreaOffset = self.INITVALUE + self.boardInfoAreaOffset = self.INITVALUE + self.productinfoAreaOffset = self.INITVALUE + self.multiRecordAreaOffset = self.INITVALUE + self.zeroCheckSum = self.INITVALUE + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + self.productInfoArea = None + self.internalUseArea = None + self.boardInfoArea = None + self.chassisInfoArea = None + self.multiRecordArea = None + # self.recalcute() + + @property + def version(self): + return self._version + + @version.setter + def version(self, name): + self._version = name + + @property + def internalUserAreaOffset(self): + return self._internalUserAreaOffset + + @internalUserAreaOffset.setter + def internalUserAreaOffset(self, obj): + self._internalUserAreaOffset = obj + + @property + def chassicInfoAreaOffset(self): + return self._chassicInfoAreaOffset + + @chassicInfoAreaOffset.setter + def chassicInfoAreaOffset(self, obj): + self._chassicInfoAreaOffset = obj + + @property + def productinfoAreaOffset(self): + return self._productinfoAreaOffset + + @productinfoAreaOffset.setter + def productinfoAreaOffset(self, obj): + self._productinfoAreaOffset = obj + + @property + def boardInfoAreaOffset(self): + return self._boardInfoAreaOffset + + @boardInfoAreaOffset.setter + def boardInfoAreaOffset(self, obj): + self._boardInfoAreaOffset = obj + + @property + def multiRecordAreaOffset(self): + return self._multiRecordAreaOffset + + @multiRecordAreaOffset.setter + def multiRecordAreaOffset(self, obj): + self._multiRecordAreaOffset = obj + + @property + def zeroCheckSum(self): + return self._zeroCheckSum + + @zeroCheckSum.setter + def zeroCheckSum(self, obj): + self._zeroCheckSum = obj + + @property + def productInfoArea(self): + return self._ProductInfoArea + + @productInfoArea.setter + def productInfoArea(self, obj): + self._ProductInfoArea = obj + + @property + def internalUseArea(self): + return self._InternalUseArea + + @internalUseArea.setter + def internalUseArea(self, obj): + self.internalUseArea = obj + + @property + def boardInfoArea(self): + return self._BoardInfoArea + + @boardInfoArea.setter + def boardInfoArea(self, obj): + self._BoardInfoArea = obj + + @property + def chassisInfoArea(self): + return self._ChassisInfoArea + + @chassisInfoArea.setter + def chassisInfoArea(self, obj): + self._ChassisInfoArea = obj + + @property + def multiRecordArea(self): + return self._multiRecordArea + + @multiRecordArea.setter + def multiRecordArea(self, obj): + self._multiRecordArea = obj + + @property + def bindata(self): + return self._bindata + + @bindata.setter + def bindata(self, obj): + self._bindata = obj + + @property + def bodybin(self): + return self._bodybin + + @bodybin.setter + def bodybin(self, obj): + self._bodybin = obj + + def recalcuteCommonHead(self): + self.bindata = "" + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + d_print("common Header %d" % self.offset) + d_print("fru eeprom size %d" % self._frusize) + if self.internalUseArea is not None and self.internalUseArea.isPresent: + self.internalUserAreaOffset = self.offset // 8 + self.offset += self.internalUseArea.size + d_print("internalUseArea is present offset:%d" % self.offset) + + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + self.chassicInfoAreaOffset = self.offset // 8 + self.offset += self.chassisInfoArea.size + d_print("chassisInfoArea is present offset:%d" % self.offset) + + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + self.boardInfoAreaOffset = self.offset // 8 + self.offset += self.boardInfoArea.size + d_print("boardInfoArea is present offset:%d" % self.offset) + d_print("boardInfoArea is present size:%d" % + self.boardInfoArea.size) + + if self.productInfoArea is not None and self.productInfoArea.isPresent: + self.productinfoAreaOffset = self.offset // 8 + self.offset += self.productInfoArea.size + d_print("productInfoArea is present offset:%d" % self.offset) + + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + self.multiRecordAreaOffset = self.offset // 8 + d_print("multiRecordArea is present offset:%d" % self.offset) + + if self.internalUserAreaOffset == self.INITVALUE: + self.internalUserAreaOffset = 0 + if self.productinfoAreaOffset == self.INITVALUE: + self.productinfoAreaOffset = 0 + if self.chassicInfoAreaOffset == self.INITVALUE: + self.chassicInfoAreaOffset = 0 + if self.boardInfoAreaOffset == self.INITVALUE: + self.boardInfoAreaOffset = 0 + if self.multiRecordAreaOffset == self.INITVALUE: + self.multiRecordAreaOffset = 0 + + self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset + - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff + d_print("zerochecksum:%x" % self.zeroCheckSum) + self.data = "" + self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr( + self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum) + + self.bindata = self.data + self.bodybin + totallen = len(self.bindata) + d_print("totallen %d" % totallen) + if totallen < self._frusize: + self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0])) + else: + raise FruException('bin data more than %d' % self._frusize, -2) + + def recalcutebin(self): + self.bodybin = "" + if self.internalUseArea is not None and self.internalUseArea.isPresent: + d_print("internalUseArea present") + self.bodybin += self.internalUseArea.data + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + d_print("chassisInfoArea present") + self.bodybin += self.chassisInfoArea.data + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + d_print("boardInfoArea present") + self.boardInfoArea.recalcute() + self.bodybin += self.boardInfoArea.data + if self.productInfoArea is not None and self.productInfoArea.isPresent: + d_print("productInfoAreapresent") + self.productInfoArea.recalcute() + self.bodybin += self.productInfoArea.data + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + d_print("multiRecordArea present") + self.bodybin += self.productInfoArea.data + + def recalcute(self, fru_eeprom_size=256): + self._frusize = fru_eeprom_size + self.recalcutebin() + self.recalcuteCommonHead() + + def setValue(self, area, field, value): + tmp_area = getattr(self, area, None) + if tmp_area is not None: + tmp_area.fruSetValue(field, value) diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf new file mode 100644 index 00000000000..deb97654ad4 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=ice,mei_me,i2c_i801,i2c_ismt,iTCO_wdt" +CONSOLE_PORT=0x5060 +CONSOLE_DEV=0 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/led_proc_init.soc b/device/micas/x86_64-micas_m2-w6940-64oc-r0/led_proc_init.soc new file mode 100644 index 00000000000..5124ab75ab9 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/led_proc_init.soc @@ -0,0 +1,2 @@ +led load /usr/share/sonic/platform/custom_led.bin + diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/media_settings.json new file mode 100644 index 00000000000..d609404c2e7 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/media_settings.json @@ -0,0 +1,4100 @@ +{ + "PORT_MEDIA_SETTINGS": { + "0": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "1": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "2": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "3": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "4": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "5": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000084", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "6": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "7": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "8": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "9": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000084", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "10": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "11": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "12": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "13": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "14": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "15": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "16": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "17": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "18": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "19": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "20": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe0", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000084", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "21": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe0", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000084", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "22": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "23": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "24": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "25": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe0", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000084", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "26": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "27": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe0", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000084", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "28": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "29": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000002" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xfffffff0" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x0000008C" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "30": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "31": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "32": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "33": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "34": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "35": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "36": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "37": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe0", + "lane4": "0xffffffe8", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000084", + "lane4": "0x0000008C", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "38": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe0", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000084", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "39": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "40": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "41": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "42": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "43": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "44": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "45": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "46": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "47": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "48": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "49": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "50": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "51": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "52": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "53": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "54": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "55": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "56": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "57": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "58": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe0", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000084", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "59": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "60": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe0", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000084", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "61": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "62": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "63": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000088", + "lane1": "0x00000088", + "lane2": "0x00000088", + "lane3": "0x00000088", + "lane4": "0x00000088", + "lane5": "0x00000088", + "lane6": "0x00000088", + "lane7": "0x00000088" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/monitor.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/monitor.py new file mode 100644 index 00000000000..5fc287892e5 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/monitor.py @@ -0,0 +1,402 @@ +#!/usr/bin/python3 +# * onboard temperature sensors +# * FAN trays +# * PSU +# +import os +from lxml import etree as ET +import glob +import json +from decimal import Decimal +from fru import ipmifru + + +MAILBOX_DIR = "/sys/bus/i2c/devices/" +BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type" +BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow" + + +CONFIG_NAME = "dev.xml" + + +def byteTostr(val): + strtmp = '' + for value in val: + strtmp += chr(value) + return strtmp + + +def typeTostr(val): + if isinstance(val, bytes): + strtmp = byteTostr(val) + return strtmp + return val + + +def get_board_id(): + if not os.path.exists(BOARD_ID_PATH): + return "NA" + with open(BOARD_ID_PATH) as fd: + id_str = fd.read().strip() + return "0x%x" % (int(id_str, 10)) + + +def getboardairflow(): + if not os.path.exists(BOARD_AIRFLOW_PATH): + return "NA" + with open(BOARD_AIRFLOW_PATH) as fd: + airflow_str = fd.read().strip() + data = json.loads(airflow_str) + airflow = data.get("board", "NA") + return airflow + + +boardid = get_board_id() +boardairflow = getboardairflow() + + +DEV_XML_FILE_LIST = [ + "dev_" + boardid + "_" + boardairflow + ".xml", + "dev_" + boardid + ".xml", + "dev_" + boardairflow + ".xml", +] + + +def dev_file_read(path, offset, read_len): + retval = "ERR" + val_list = [] + msg = "" + ret = "" + fd = -1 + + if not os.path.exists(path): + return False, "%s %s not found" % (retval, path) + + try: + fd = os.open(path, os.O_RDONLY) + os.lseek(fd, offset, os.SEEK_SET) + ret = os.read(fd, read_len) + for item in ret: + val_list.append(item) + except Exception as e: + msg = str(e) + return False, "%s %s" % (retval, msg) + finally: + if fd > 0: + os.close(fd) + return True, val_list + + +def getPMCreg(location): + retval = 'ERR' + if not os.path.isfile(location): + return "%s %s notfound" % (retval, location) + try: + with open(location, 'r') as fd: + retval = fd.read() + except Exception as error: + return "ERR %s" % str(error) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +# Get a mailbox register +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = reg_name + filepath = glob.glob(mb_reg_file) + if len(filepath) == 0: + return "%s %s notfound" % (retval, mb_reg_file) + mb_reg_file = filepath[0] + if not os.path.isfile(mb_reg_file): + # print mb_reg_file, 'not found !' + return "%s %s notfound" % (retval, mb_reg_file) + try: + with open(mb_reg_file, 'rb') as fd: + retval = fd.read() + retval = typeTostr(retval) + except Exception as error: + retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error)) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +class checktype(): + def __init__(self, test1): + self.test1 = test1 + + @staticmethod + def getValue(location, bit, data_type, coefficient=1, addend=0): + try: + value_t = get_pmc_register(location) + if value_t.startswith("ERR") or value_t.startswith("NA"): + return value_t + if data_type == 1: + return float('%.1f' % ((float(value_t) / 1000) + addend)) + if data_type == 2: + return float('%.1f' % (float(value_t) / 100)) + if data_type == 3: + psu_status = int(value_t, 16) + return (psu_status & (1 << bit)) >> bit + if data_type == 4: + return int(value_t, 10) + if data_type == 5: + return float('%.1f' % (float(value_t) / 1000 / 1000)) + if data_type == 6: + return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000')) + return value_t + except Exception as e: + value_t = "ERR %s" % str(e) + return value_t + + # fanFRU + @staticmethod + def decodeBinByValue(retval): + fru = ipmifru() + fru.decodeBin(retval) + return fru + + @staticmethod + def getfruValue(prob_t, root, val): + try: + ret, binval_bytes = dev_file_read(val, 0, 256) + if ret is False: + return binval_bytes + binval = byteTostr(binval_bytes) + fanpro = {} + ret = checktype.decodeBinByValue(binval) + fanpro['fan_type'] = ret.productInfoArea.productName + fanpro['hw_version'] = ret.productInfoArea.productVersion + fanpro['sn'] = ret.productInfoArea.productSerialNumber + fan_display_name_dict = status.getDecodValue(root, "fan_display_name") + fan_name = fanpro['fan_type'].strip() + if len(fan_display_name_dict) == 0: + return fanpro + if fan_name not in fan_display_name_dict: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name) + else: + fanpro['fan_type'] = fan_display_name_dict[fan_name] + return fanpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getslotfruValue(val): + try: + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + slotpro = {} + ret = checktype.decodeBinByValue(binval) + slotpro['slot_type'] = ret.boardInfoArea.boardProductName + slotpro['hw_version'] = ret.boardInfoArea.boardextra1 + slotpro['sn'] = ret.boardInfoArea.boardSerialNumber + return slotpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getpsufruValue(prob_t, root, val): + try: + psu_match = False + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + psupro = {} + ret = checktype.decodeBinByValue(binval) + psupro['type1'] = ret.productInfoArea.productPartModelName + psupro['sn'] = ret.productInfoArea.productSerialNumber + psupro['hw_version'] = ret.productInfoArea.productVersion + psu_dict = status.getDecodValue(root, "psutype") + psupro['type1'] = psupro['type1'].strip() + if len(psu_dict) == 0: + return psupro + for psu_name, display_name in psu_dict.items(): + if psu_name.strip() == psupro['type1']: + psupro['type1'] = display_name + psu_match = True + break + if psu_match is not True: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1']) + return psupro + except Exception as error: + return "ERR " + str(error) + + +class status(): + def __init__(self, productname): + self.productname = productname + + @staticmethod + def getETroot(filename): + tree = ET.parse(filename) + root = tree.getroot() + return root + + @staticmethod + def getDecodValue(collection, decode): + decodes = collection.find('decode') + testdecode = decodes.find(decode) + test = {} + if testdecode is None: + return test + for neighbor in testdecode.iter('code'): + test[neighbor.attrib["key"]] = neighbor.attrib["value"] + return test + + @staticmethod + def getfileValue(location): + return checktype.getValue(location, " ", " ") + + @staticmethod + def getETValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + prob_t = {} + prob_t.update(neighbor.attrib) + prob_t['errcode'] = 0 + prob_t['errmsg'] = '' + for pros in neighbor.iter("property"): + ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items())) + if ret.get('e2type') == 'fru' and ret.get("name") == "fru": + fruval = checktype.getfruValue(prob_t, root, ret["location"]) + if isinstance(fruval, str) and fruval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = fruval + break + prob_t.update(fruval) + continue + + if ret.get("name") == "psu" and ret.get('e2type') == 'fru': + psuval = checktype.getpsufruValue(prob_t, root, ret["location"]) + if isinstance(psuval, str) and psuval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = psuval + break + prob_t.update(psuval) + continue + + if ret.get("gettype") == "config": + prob_t[ret["name"]] = ret["value"] + continue + + if 'type' not in ret.keys(): + val = "0" + else: + val = ret["type"] + if 'bit' not in ret.keys(): + bit = "0" + else: + bit = ret["bit"] + if 'coefficient' not in ret.keys(): + coefficient = 1 + else: + coefficient = float(ret["coefficient"]) + if 'addend' not in ret.keys(): + addend = 0 + else: + addend = float(ret["addend"]) + + s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend) + if isinstance(s, str) and s.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = s + break + if 'default' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + prob_t['errmsg'] = rt[str(s)] + if str(s) != ret["default"]: + prob_t['errcode'] = -1 + break + else: + if 'decode' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt): + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % + (s.replace("\x00", "").rstrip())) + else: + s = rt[str(s).replace("\x00", "").rstrip()] + name = ret["name"] + prob_t[name] = str(s) + a.append(prob_t) + + @staticmethod + def getCPUValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + location = neighbor.attrib["location"] + L = [] + for dirpath, dirnames, filenames in os.walk(location): + for file in filenames: + if file.endswith("input"): + L.append(os.path.join(dirpath, file)) + L = sorted(L, reverse=False) + for i in range(len(L)): + prob_t = {} + prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, i + 1)) + prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, i + 1))) / 1000 + prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, i + 1))) / 1000 + prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, i + 1))) / 1000 + prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, i + 1))) / 1000 + a.append(prob_t) + + @staticmethod + def getFileName(): + fpath = os.path.dirname(os.path.realpath(__file__)) + for file in DEV_XML_FILE_LIST: + xml = fpath + "/" + file + if os.path.exists(xml): + return xml + return fpath + "/" + CONFIG_NAME + + @staticmethod + def checkFan(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "fan" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getTemp(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "temp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "psu" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getcputemp(ret): + _filename = status.getFileName() + _tagname = "cpus" + status.getCPUValue(ret, _filename, _tagname) + + @staticmethod + def getDcdc(ret): + _filename = status.getFileName() + _tagname = "dcdc" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmactemp(ret): + _filename = status.getFileName() + _tagname = "mactemp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmacpower(ret): + _filename = status.getFileName() + _tagname = "macpower" + status.getETValue(ret, _filename, _tagname) diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pcie.yaml new file mode 100644 index 00000000000..cce5d873a80 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pcie.yaml @@ -0,0 +1,478 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: '00' + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: '00' + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: '00' + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: '00' + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: '00' + dev: '01' + fn: '0' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '1' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '2' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '3' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '4' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '5' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '6' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '7' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '02' + fn: '0' + id: 09a6 + name: 'System peripheral: Intel Corporation Device 09a6' +- bus: '00' + dev: '02' + fn: '1' + id: 09a7 + name: 'System peripheral: Intel Corporation Device 09a7' +- bus: '00' + dev: '02' + fn: '4' + id: '3456' + name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 3456 (rev + 01)' +- bus: '00' + dev: '06' + fn: '0' + id: 18da + name: 'PCI bridge: Intel Corporation Device 18da (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 18a4 + name: 'PCI bridge: Intel Corporation Device 18a4 (rev 11)' +- bus: '00' + dev: 0b + fn: '0' + id: 18a6 + name: 'PCI bridge: Intel Corporation Device 18a6 (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 18f2 + name: 'SATA controller: Intel Corporation Device 18f2 (rev 11)' +- bus: '00' + dev: 0f + fn: '0' + id: 18ac + name: 'System peripheral: Intel Corporation Device 18ac (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 18a8 + name: 'PCI bridge: Intel Corporation Device 18a8 (rev 11)' +- bus: '00' + dev: '11' + fn: '0' + id: 18a9 + name: 'PCI bridge: Intel Corporation Device 18a9 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 18aa + name: 'PCI bridge: Intel Corporation Device 18aa (rev 11)' +- bus: '00' + dev: '13' + fn: '0' + id: 18ab + name: 'PCI bridge: Intel Corporation Device 18ab (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 18ad + name: 'PCI bridge: Intel Corporation Device 18ad (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 18ae + name: 'PCI bridge: Intel Corporation Device 18ae (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 18d3 + name: 'Communication controller: Intel Corporation Device 18d3 (rev 11)' +- bus: '00' + dev: '18' + fn: '1' + id: 18d4 + name: 'Communication controller: Intel Corporation Device 18d4 (rev 11)' +- bus: '00' + dev: '18' + fn: '4' + id: 18d6 + name: 'Communication controller: Intel Corporation Device 18d6 (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '3' + id: 18d9 + name: 'Unassigned class [ff00]: Intel Corporation Device 18d9 (rev 11)' +- bus: '00' + dev: 1d + fn: '0' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: '00' + dev: 1e + fn: '0' + id: 18d0 + name: 'USB controller: Intel Corporation Device 18d0 (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 18dc + name: 'ISA bridge: Intel Corporation Device 18dc (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 18df + name: 'SMBus: Intel Corporation Device 18df (rev 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 18e0 + name: 'Serial bus controller [0c80]: Intel Corporation Device 18e0 (rev 11)' +- bus: '00' + dev: 1f + fn: '7' + id: 18e1 + name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 18e1 (rev + 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 18ee + name: 'Co-processor: Intel Corporation Device 18ee (rev 11)' +- bus: '06' + dev: '00' + fn: '0' + id: '7011' + name: 'Memory controller: Xilinx Corporation Device 7011' +- bus: 08 + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '14' + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: '14' + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: '14' + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: '14' + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: '14' + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: '14' + dev: '02' + fn: '0' + id: 347a + name: 'PCI bridge: Intel Corporation Device 347a (rev 06)' +- bus: '14' + dev: '03' + fn: '0' + id: 347b + name: 'PCI bridge: Intel Corporation Device 347b (rev 06)' +- bus: '14' + dev: '04' + fn: '0' + id: 347c + name: 'PCI bridge: Intel Corporation Device 347c (rev 06)' +- bus: '14' + dev: '05' + fn: '0' + id: 347d + name: 'PCI bridge: Intel Corporation Device 347d (rev 06)' +- bus: '15' + dev: '00' + fn: '0' + id: f900 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device f900 (rev 11)' +- bus: f3 + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: f3 + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: f3 + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: f3 + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: f3 + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: f3 + dev: '04' + fn: '0' + id: 18d1 + name: 'PCI bridge: Intel Corporation Device 18d1' +- bus: f4 + dev: '00' + fn: '0' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '1' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '2' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '3' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: fe + dev: '00' + fn: '0' + id: '3450' + name: 'System peripheral: Intel Corporation Device 3450' +- bus: fe + dev: '00' + fn: '1' + id: '3451' + name: 'System peripheral: Intel Corporation Device 3451' +- bus: fe + dev: '00' + fn: '2' + id: '3452' + name: 'System peripheral: Intel Corporation Device 3452' +- bus: fe + dev: '00' + fn: '3' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: fe + dev: '00' + fn: '5' + id: '3455' + name: 'System peripheral: Intel Corporation Device 3455' +- bus: fe + dev: 0b + fn: '0' + id: '3448' + name: 'System peripheral: Intel Corporation Device 3448' +- bus: fe + dev: 0b + fn: '1' + id: '3448' + name: 'System peripheral: Intel Corporation Device 3448' +- bus: fe + dev: 0b + fn: '2' + id: 344b + name: 'System peripheral: Intel Corporation Device 344b' +- bus: fe + dev: 0c + fn: '0' + id: 344a + name: 'Performance counters: Intel Corporation Device 344a' +- bus: fe + dev: 1a + fn: '0' + id: '2880' + name: 'Performance counters: Intel Corporation Device 2880' +- bus: ff + dev: '00' + fn: '0' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '1' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '2' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '3' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '4' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '5' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: 0a + fn: '0' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '1' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '2' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '3' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '4' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '5' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 1d + fn: '0' + id: 344f + name: 'System peripheral: Intel Corporation Device 344f' +- bus: ff + dev: 1d + fn: '1' + id: '3457' + name: 'System peripheral: Intel Corporation Device 3457' +- bus: ff + dev: 1e + fn: '0' + id: '3458' + name: 'System peripheral: Intel Corporation Device 3458 (rev 01)' +- bus: ff + dev: 1e + fn: '1' + id: '3459' + name: 'System peripheral: Intel Corporation Device 3459 (rev 01)' +- bus: ff + dev: 1e + fn: '2' + id: 345a + name: 'System peripheral: Intel Corporation Device 345a (rev 01)' +- bus: ff + dev: 1e + fn: '3' + id: 345b + name: 'System peripheral: Intel Corporation Device 345b (rev 01)' +- bus: ff + dev: 1e + fn: '4' + id: 345c + name: 'System peripheral: Intel Corporation Device 345c (rev 01)' +- bus: ff + dev: 1e + fn: '5' + id: 345d + name: 'System peripheral: Intel Corporation Device 345d (rev 01)' +- bus: ff + dev: 1e + fn: '6' + id: 345e + name: 'System peripheral: Intel Corporation Device 345e (rev 01)' +- bus: ff + dev: 1e + fn: '7' + id: 345f + name: 'System peripheral: Intel Corporation Device 345f (rev 01)' diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json new file mode 100644 index 00000000000..154b1abe6ff --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json @@ -0,0 +1,1653 @@ +{ + "chassis": { + "name": "M2-W6940-64OC", + "thermal_manager": false, + "status_led": { + "controllable": false, + "colors": ["green", "blinking_green", "amber", "blinking_amber"] + }, + "components": [ + { + "name": "CPU_CPLD" + }, + { + "name": "CONNECT_CPLD" + }, + { + "name": "MAC_CPLDA" + }, + { + "name": "MAC_CPLDB" + }, + { + "name": "MAC_CPLDC" + }, + { + "name": "FAN_CPLD" + }, + { + "name": "MGMT_CPLD" + }, + { + "name": "MAC_FPGA" + }, + { + "name": "BIOS" + } + ], + "fans": [ + { + "name": "Fantray1_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray1_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray2_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray2_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray3_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray3_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray4_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + }, + { + "name": "Fantray4_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": ["off", "red", "amber", "green"] + } + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 2, + "status_led": { + "controllable": false, + "colors": ["amber", "green", "off"] + }, + "fans": [ + { + "name": "Fantray1_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray1_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 2, + "status_led": { + "controllable": false, + "colors": ["amber", "green", "off"] + }, + "fans": [ + { + "name": "Fantray2_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray2_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 2, + "status_led": { + "controllable": false, + "colors": ["amber", "green", "off"] + }, + "fans": [ + { + "name": "Fantray3_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray3_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Fantray4", + "num_fans" : 2, + "status_led": { + "controllable": false, + "colors": ["amber", "green", "off"] + }, + "fans": [ + { + "name": "Fantray4_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray4_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + } + ], + "psus": [ + { + "name": "Psu1", + "voltage": true, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": true, + "voltage_low_threshold": true, + "temperature": true, + "fans_target_speed": true, + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU1_FAN1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "Psu2", + "voltage": true, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": true, + "voltage_low_threshold": true, + "temperature": true, + "fans_target_speed": true, + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU2_FAN1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + } + ] + } + ], + "thermals": [ + { + "name": "BOARD_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "CPU_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "INLET_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "OUTLET_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "ASIC_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "PSU1_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "PSU2_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "PSU3_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + }, + { + "name": "PSU4_TEMP", + "controllable": false, + "low-crit-threshold": true, + "high-crit-threshold": true, + "low-threshold": true, + "high-threshold": true, + "minimum-recorded": true, + "maximum-recorded": true + } + ], + "modules": [], + "sfps": [] + }, + "interfaces": { + "Ethernet1": { + "index": "0,0,0,0,0,0,0,0", + "lanes": "41,42,43,44,45,46,47,48", + "breakout_modes": { + "1x800G": [ + "Eth1" + ], + "2x400G": [ + "Eth1/1", + "Eth1/2" + ], + "4x200G": [ + "Eth1/1", + "Eth1/2", + "Eth1/3", + "Eth1/4" + ] + } + }, + "Ethernet9": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "33,34,35,36,37,38,39,40", + "breakout_modes": { + "1x800G": [ + "Eth2" + ], + "2x400G": [ + "Eth2/1", + "Eth2/2" + ], + "4x200G": [ + "Eth2/1", + "Eth2/2", + "Eth2/3", + "Eth2/4" + ] + } + }, + "Ethernet17": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "57,58,59,60,61,62,63,64", + "breakout_modes": { + "1x800G": [ + "Eth3" + ], + "2x400G": [ + "Eth3/1", + "Eth3/2" + ], + "4x200G": [ + "Eth3/1", + "Eth3/2", + "Eth3/3", + "Eth3/4" + ] + } + }, + "Ethernet25": { + "index": "3,3,3,3,3,3,3,3", + "lanes": "49,50,51,52,53,54,55,56", + "breakout_modes": { + "1x800G": [ + "Eth4" + ], + "2x400G": [ + "Eth4/1", + "Eth4/2" + ], + "4x200G": [ + "Eth4/1", + "Eth4/2", + "Eth4/3", + "Eth4/4" + ] + } + }, + "Ethernet33": { + "index": "4,4,4,4,4,4,4,4", + "lanes": "73,74,75,76,77,78,79,80", + "breakout_modes": { + "1x800G": [ + "Eth5" + ], + "2x400G": [ + "Eth5/1", + "Eth5/2" + ], + "4x200G": [ + "Eth5/1", + "Eth5/2", + "Eth5/3", + "Eth5/4" + ] + } + }, + "Ethernet41": { + "index": "5,5,5,5,5,5,5,5", + "lanes": "65,66,67,68,69,70,71,72", + "breakout_modes": { + "1x800G": [ + "Eth6" + ], + "2x400G": [ + "Eth6/1", + "Eth6/2" + ], + "4x200G": [ + "Eth6/1", + "Eth6/2", + "Eth6/3", + "Eth6/4" + ] + } + }, + "Ethernet49": { + "index": "6,6,6,6,6,6,6,6", + "lanes": "89,90,91,92,93,94,95,96", + "breakout_modes": { + "1x800G": [ + "Eth7" + ], + "2x400G": [ + "Eth7/1", + "Eth7/2" + ], + "4x200G": [ + "Eth7/1", + "Eth7/2", + "Eth7/3", + "Eth7/4" + ] + } + }, + "Ethernet57": { + "index": "7,7,7,7,7,7,7,7", + "lanes": "81,82,83,84,85,86,87,88", + "breakout_modes": { + "1x800G": [ + "Eth8" + ], + "2x400G": [ + "Eth8/1", + "Eth8/2" + ], + "4x200G": [ + "Eth8/1", + "Eth8/2", + "Eth8/3", + "Eth8/4" + ] + } + }, + "Ethernet65": { + "index": "8,8,8,8,8,8,8,8", + "lanes": "105,106,107,108,109,110,111,112", + "breakout_modes": { + "1x800G": [ + "Eth9" + ], + "2x400G": [ + "Eth9/1", + "Eth9/2" + ], + "4x200G": [ + "Eth9/1", + "Eth9/2", + "Eth9/3", + "Eth9/4" + ] + } + }, + "Ethernet73": { + "index": "9,9,9,9,9,9,9,9", + "lanes": "97,98,99,100,101,102,103,104", + "breakout_modes": { + "1x800G": [ + "Eth10" + ], + "2x400G": [ + "Eth10/1", + "Eth10/2" + ], + "4x200G": [ + "Eth10/1", + "Eth10/2", + "Eth10/3", + "Eth10/4" + ] + } + }, + "Ethernet81": { + "index": "10,10,10,10,10,10,10,10", + "lanes": "121,122,123,124,125,126,127,128", + "breakout_modes": { + "1x800G": [ + "Eth11" + ], + "2x400G": [ + "Eth11/1", + "Eth11/2" + ], + "4x200G": [ + "Eth11/1", + "Eth11/2", + "Eth11/3", + "Eth11/4" + ] + } + }, + "Ethernet89": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "113,114,115,116,117,118,119,120", + "breakout_modes": { + "1x800G": [ + "Eth12" + ], + "2x400G": [ + "Eth12/1", + "Eth12/2" + ], + "4x200G": [ + "Eth12/1", + "Eth12/2", + "Eth12/3", + "Eth12/4" + ] + } + }, + "Ethernet97": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "137,138,139,140,141,142,143,144", + "breakout_modes": { + "1x800G": [ + "Eth13" + ], + "2x400G": [ + "Eth13/1", + "Eth13/2" + ], + "4x200G": [ + "Eth13/1", + "Eth13/2", + "Eth13/3", + "Eth13/4" + ] + } + }, + "Ethernet105": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "129,130,131,132,133,134,135,136", + "breakout_modes": { + "1x800G": [ + "Eth14" + ], + "2x400G": [ + "Eth14/1", + "Eth14/2" + ], + "4x200G": [ + "Eth14/1", + "Eth14/2", + "Eth14/3", + "Eth14/4" + ] + } + }, + "Ethernet113": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "153,154,155,156,157,158,159,160", + "breakout_modes": { + "1x800G": [ + "Eth15" + ], + "2x400G": [ + "Eth15/1", + "Eth15/2" + ], + "4x200G": [ + "Eth15/1", + "Eth15/2", + "Eth15/3", + "Eth15/4" + ] + } + }, + "Ethernet121": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "145,146,147,148,149,150,151,152", + "breakout_modes": { + "1x800G": [ + "Eth16" + ], + "2x400G": [ + "Eth16/1", + "Eth16/2" + ], + "4x200G": [ + "Eth16/1", + "Eth16/2", + "Eth16/3", + "Eth16/4" + ] + } + }, + "Ethernet129": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "169,170,171,172,173,174,175,176", + "breakout_modes": { + "1x800G": [ + "Eth17" + ], + "2x400G": [ + "Eth17/1", + "Eth17/2" + ], + "4x200G": [ + "Eth17/1", + "Eth17/2", + "Eth17/3", + "Eth17/4" + ] + } + }, + "Ethernet137": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "161,162,163,164,165,166,167,168", + "breakout_modes": { + "1x800G": [ + "Eth18" + ], + "2x400G": [ + "Eth18/1", + "Eth18/2" + ], + "4x200G": [ + "Eth18/1", + "Eth18/2", + "Eth18/3", + "Eth18/4" + ] + } + }, + "Ethernet145": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "185,186,187,188,189,190,191,192", + "breakout_modes": { + "1x800G": [ + "Eth19" + ], + "2x400G": [ + "Eth19/1", + "Eth19/2" + ], + "4x200G": [ + "Eth19/1", + "Eth19/2", + "Eth19/3", + "Eth19/4" + ] + } + }, + "Ethernet153": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "177,178,179,180,181,182,183,184", + "breakout_modes": { + "1x800G": [ + "Eth20" + ], + "2x400G": [ + "Eth20/1", + "Eth20/2" + ], + "4x200G": [ + "Eth20/1", + "Eth20/2", + "Eth20/3", + "Eth20/4" + ] + } + }, + "Ethernet161": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "201,202,203,204,205,206,207,208", + "breakout_modes": { + "1x800G": [ + "Eth21" + ], + "2x400G": [ + "Eth21/1", + "Eth21/2" + ], + "4x200G": [ + "Eth21/1", + "Eth21/2", + "Eth21/3", + "Eth21/4" + ] + } + }, + "Ethernet169": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "193,194,195,196,197,198,199,200", + "breakout_modes": { + "1x800G": [ + "Eth22" + ], + "2x400G": [ + "Eth22/1", + "Eth22/2" + ], + "4x200G": [ + "Eth22/1", + "Eth22/2", + "Eth22/3", + "Eth22/4" + ] + } + }, + "Ethernet177": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "217,218,219,220,221,222,223,224", + "breakout_modes": { + "1x800G": [ + "Eth23" + ], + "2x400G": [ + "Eth23/1", + "Eth23/2" + ], + "4x200G": [ + "Eth23/1", + "Eth23/2", + "Eth23/3", + "Eth23/4" + ] + } + }, + "Ethernet185": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "209,210,211,212,213,214,215,216", + "breakout_modes": { + "1x800G": [ + "Eth24" + ], + "2x400G": [ + "Eth24/1", + "Eth24/2" + ], + "4x200G": [ + "Eth24/1", + "Eth24/2", + "Eth24/3", + "Eth24/4" + ] + } + }, + "Ethernet193": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "1,2,3,4,5,6,7,8", + "breakout_modes": { + "1x800G": [ + "Eth25" + ], + "2x400G": [ + "Eth25/1", + "Eth25/2" + ], + "4x200G": [ + "Eth25/1", + "Eth25/2", + "Eth25/3", + "Eth25/4" + ] + } + }, + "Ethernet201": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "9,10,11,12,13,14,15,16", + "breakout_modes": { + "1x800G": [ + "Eth26" + ], + "2x400G": [ + "Eth26/1", + "Eth26/2" + ], + "4x200G": [ + "Eth26/1", + "Eth26/2", + "Eth26/3", + "Eth26/4" + ] + } + }, + "Ethernet209": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "17,18,19,20,21,22,23,24", + "breakout_modes": { + "1x800G": [ + "Eth27" + ], + "2x400G": [ + "Eth27/1", + "Eth27/2" + ], + "4x200G": [ + "Eth27/1", + "Eth27/2", + "Eth27/3", + "Eth27/4" + ] + } + }, + "Ethernet217": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "25,26,27,28,29,30,31,32", + "breakout_modes": { + "1x800G": [ + "Eth28" + ], + "2x400G": [ + "Eth28/1", + "Eth28/2" + ], + "4x200G": [ + "Eth28/1", + "Eth28/2", + "Eth28/3", + "Eth28/4" + ] + } + }, + "Ethernet225": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "249,250,251,252,253,254,255,256", + "breakout_modes": { + "1x800G": [ + "Eth29" + ], + "2x400G": [ + "Eth29/1", + "Eth29/2" + ], + "4x200G": [ + "Eth29/1", + "Eth29/2", + "Eth29/3", + "Eth29/4" + ] + } + }, + "Ethernet233": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "241,242,243,244,245,246,247,248", + "breakout_modes": { + "1x800G": [ + "Eth30" + ], + "2x400G": [ + "Eth30/1", + "Eth30/2" + ], + "4x200G": [ + "Eth30/1", + "Eth30/2", + "Eth30/3", + "Eth30/4" + ] + } + }, + "Ethernet241": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "233,234,235,236,237,238,239,240", + "breakout_modes": { + "1x800G": [ + "Eth31" + ], + "2x400G": [ + "Eth31/1", + "Eth31/2" + ], + "4x200G": [ + "Eth31/1", + "Eth31/2", + "Eth31/3", + "Eth31/4" + ] + } + }, + "Ethernet249": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "225,226,227,228,229,230,231,232", + "breakout_modes": { + "1x800G": [ + "Eth32" + ], + "2x400G": [ + "Eth32/1", + "Eth32/2" + ], + "4x200G": [ + "Eth32/1", + "Eth32/2", + "Eth32/3", + "Eth32/4" + ] + } + }, + "Ethernet257": { + "index": "32,32,32,32,32,32,32,32", + "lanes": "257,258,259,260,261,262,263,264", + "breakout_modes": { + "1x800G": [ + "Eth33" + ], + "2x400G": [ + "Eth33/1", + "Eth33/2" + ], + "4x200G": [ + "Eth33/1", + "Eth33/2", + "Eth33/3", + "Eth33/4" + ] + } + }, + "Ethernet265": { + "index": "33,33,33,33,33,33,33,33", + "lanes": "265,266,267,268,269,270,271,272", + "breakout_modes": { + "1x800G": [ + "Eth34" + ], + "2x400G": [ + "Eth34/1", + "Eth34/2" + ], + "4x200G": [ + "Eth34/1", + "Eth34/2", + "Eth34/3", + "Eth34/4" + ] + } + }, + "Ethernet273": { + "index": "34,34,34,34,34,34,34,34", + "lanes": "273,274,275,276,277,278,279,280", + "breakout_modes": { + "1x800G": [ + "Eth35" + ], + "2x400G": [ + "Eth35/1", + "Eth35/2" + ], + "4x200G": [ + "Eth35/1", + "Eth35/2", + "Eth35/3", + "Eth35/4" + ] + } + }, + "Ethernet281": { + "index": "35,35,35,35,35,35,35,35", + "lanes": "281,282,283,284,285,286,287,288", + "breakout_modes": { + "1x800G": [ + "Eth36" + ], + "2x400G": [ + "Eth36/1", + "Eth36/2" + ], + "4x200G": [ + "Eth36/1", + "Eth36/2", + "Eth36/3", + "Eth36/4" + ] + } + }, + "Ethernet289": { + "index": "36,36,36,36,36,36,36,36", + "lanes": "505,506,507,508,509,510,511,512", + "breakout_modes": { + "1x800G": [ + "Eth37" + ], + "2x400G": [ + "Eth37/1", + "Eth37/2" + ], + "4x200G": [ + "Eth37/1", + "Eth37/2", + "Eth37/3", + "Eth37/4" + ] + } + }, + "Ethernet297": { + "index": "37,37,37,37,37,37,37,37", + "lanes": "497,498,499,500,501,502,503,504", + "breakout_modes": { + "1x800G": [ + "Eth38" + ], + "2x400G": [ + "Eth38/1", + "Eth38/2" + ], + "4x200G": [ + "Eth38/1", + "Eth38/2", + "Eth38/3", + "Eth38/4" + ] + } + }, + "Ethernet305": { + "index": "38,38,38,38,38,38,38,38", + "lanes": "489,490,491,492,493,494,495,496", + "breakout_modes": { + "1x800G": [ + "Eth39" + ], + "2x400G": [ + "Eth39/1", + "Eth39/2" + ], + "4x200G": [ + "Eth39/1", + "Eth39/2", + "Eth39/3", + "Eth39/4" + ] + } + }, + "Ethernet313": { + "index": "39,39,39,39,39,39,39,39", + "lanes": "481,482,483,484,485,486,487,488", + "breakout_modes": { + "1x800G": [ + "Eth40" + ], + "2x400G": [ + "Eth40/1", + "Eth40/2" + ], + "4x200G": [ + "Eth40/1", + "Eth40/2", + "Eth40/3", + "Eth40/4" + ] + } + }, + "Ethernet321": { + "index": "40,40,40,40,40,40,40,40", + "lanes": "297,298,299,300,301,302,303,304", + "breakout_modes": { + "1x800G": [ + "Eth41" + ], + "2x400G": [ + "Eth41/1", + "Eth41/2" + ], + "4x200G": [ + "Eth41/1", + "Eth41/2", + "Eth41/3", + "Eth41/4" + ] + } + }, + "Ethernet329": { + "index": "41,41,41,41,41,41,41,41", + "lanes": "289,290,291,292,293,294,295,296", + "breakout_modes": { + "1x800G": [ + "Eth42" + ], + "2x400G": [ + "Eth42/1", + "Eth42/2" + ], + "4x200G": [ + "Eth42/1", + "Eth42/2", + "Eth42/3", + "Eth42/4" + ] + } + }, + "Ethernet337": { + "index": "42,42,42,42,42,42,42,42", + "lanes": "313,314,315,316,317,318,319,320", + "breakout_modes": { + "1x800G": [ + "Eth43" + ], + "2x400G": [ + "Eth43/1", + "Eth43/2" + ], + "4x200G": [ + "Eth43/1", + "Eth43/2", + "Eth43/3", + "Eth43/4" + ] + } + }, + "Ethernet345": { + "index": "43,43,43,43,43,43,43,43", + "lanes": "305,306,307,308,309,310,311,312", + "breakout_modes": { + "1x800G": [ + "Eth44" + ], + "2x400G": [ + "Eth44/1", + "Eth44/2" + ], + "4x200G": [ + "Eth44/1", + "Eth44/2", + "Eth44/3", + "Eth44/4" + ] + } + }, + "Ethernet353": { + "index": "44,44,44,44,44,44,44,44", + "lanes": "329,330,331,332,333,334,335,336", + "breakout_modes": { + "1x800G": [ + "Eth45" + ], + "2x400G": [ + "Eth45/1", + "Eth45/2" + ], + "4x200G": [ + "Eth45/1", + "Eth45/2", + "Eth45/3", + "Eth45/4" + ] + } + }, + "Ethernet361": { + "index": "45,45,45,45,45,45,45,45", + "lanes": "321,322,323,324,325,326,327,328", + "breakout_modes": { + "1x800G": [ + "Eth46" + ], + "2x400G": [ + "Eth46/1", + "Eth46/2" + ], + "4x200G": [ + "Eth46/1", + "Eth46/2", + "Eth46/3", + "Eth46/4" + ] + } + }, + "Ethernet369": { + "index": "46,46,46,46,46,46,46,46", + "lanes": "345,346,347,348,349,350,351,352", + "breakout_modes": { + "1x800G": [ + "Eth47" + ], + "2x400G": [ + "Eth47/1", + "Eth47/2" + ], + "4x200G": [ + "Eth47/1", + "Eth47/2", + "Eth47/3", + "Eth47/4" + ] + } + }, + "Ethernet377": { + "index": "47,47,47,47,47,47,47,47", + "lanes": "337,338,339,340,341,342,343,344", + "breakout_modes": { + "1x800G": [ + "Eth48" + ], + "2x400G": [ + "Eth48/1", + "Eth48/2" + ], + "4x200G": [ + "Eth48/1", + "Eth48/2", + "Eth48/3", + "Eth48/4" + ] + } + }, + "Ethernet385": { + "index": "48,48,48,48,48,48,48,48", + "lanes": "361,362,363,364,365,366,367,368", + "breakout_modes": { + "1x800G": [ + "Eth49" + ], + "2x400G": [ + "Eth49/1", + "Eth49/2" + ], + "4x200G": [ + "Eth49/1", + "Eth49/2", + "Eth49/3", + "Eth49/4" + ] + } + }, + "Ethernet393": { + "index": "49,49,49,49,49,49,49,49", + "lanes": "353,354,355,356,357,358,359,360", + "breakout_modes": { + "1x800G": [ + "Eth50" + ], + "2x400G": [ + "Eth50/1", + "Eth50/2" + ], + "4x200G": [ + "Eth50/1", + "Eth50/2", + "Eth50/3", + "Eth50/4" + ] + } + }, + "Ethernet401": { + "index": "50,50,50,50,50,50,50,50", + "lanes": "377,378,379,380,381,382,383,384", + "breakout_modes": { + "1x800G": [ + "Eth51" + ], + "2x400G": [ + "Eth51/1", + "Eth51/2" + ], + "4x200G": [ + "Eth51/1", + "Eth51/2", + "Eth51/3", + "Eth51/4" + ] + } + }, + "Ethernet409": { + "index": "51,51,51,51,51,51,51,51", + "lanes": "369,370,371,372,373,374,375,376", + "breakout_modes": { + "1x800G": [ + "Eth52" + ], + "2x400G": [ + "Eth52/1", + "Eth52/2" + ], + "4x200G": [ + "Eth52/1", + "Eth52/2", + "Eth52/3", + "Eth52/4" + ] + } + }, + "Ethernet417": { + "index": "52,52,52,52,52,52,52,52", + "lanes": "393,394,395,396,397,398,399,400", + "breakout_modes": { + "1x800G": [ + "Eth53" + ], + "2x400G": [ + "Eth53/1", + "Eth53/2" + ], + "4x200G": [ + "Eth53/1", + "Eth53/2", + "Eth53/3", + "Eth53/4" + ] + } + }, + "Ethernet425": { + "index": "53,53,53,53,53,53,53,53", + "lanes": "385,386,387,388,389,390,391,392", + "breakout_modes": { + "1x800G": [ + "Eth54" + ], + "2x400G": [ + "Eth54/1", + "Eth54/2" + ], + "4x200G": [ + "Eth54/1", + "Eth54/2", + "Eth54/3", + "Eth54/4" + ] + } + }, + "Ethernet433": { + "index": "54,54,54,54,54,54,54,54", + "lanes": "409,410,411,412,413,414,415,416", + "breakout_modes": { + "1x800G": [ + "Eth55" + ], + "2x400G": [ + "Eth55/1", + "Eth55/2" + ], + "4x200G": [ + "Eth55/1", + "Eth55/2", + "Eth55/3", + "Eth55/4" + ] + } + }, + "Ethernet441": { + "index": "55,55,55,55,55,55,55,55", + "lanes": "401,402,403,404,405,406,407,408", + "breakout_modes": { + "1x800G": [ + "Eth56" + ], + "2x400G": [ + "Eth56/1", + "Eth56/2" + ], + "4x200G": [ + "Eth56/1", + "Eth56/2", + "Eth56/3", + "Eth56/4" + ] + } + }, + "Ethernet449": { + "index": "56,56,56,56,56,56,56,56", + "lanes": "425,426,427,428,429,430,431,432", + "breakout_modes": { + "1x800G": [ + "Eth57" + ], + "2x400G": [ + "Eth57/1", + "Eth57/2" + ], + "4x200G": [ + "Eth57/1", + "Eth57/2", + "Eth57/3", + "Eth57/4" + ] + } + }, + "Ethernet457": { + "index": "57,57,57,57,57,57,57,57", + "lanes": "417,418,419,420,421,422,423,424", + "breakout_modes": { + "1x800G": [ + "Eth58" + ], + "2x400G": [ + "Eth58/1", + "Eth58/2" + ], + "4x200G": [ + "Eth58/1", + "Eth58/2", + "Eth58/3", + "Eth58/4" + ] + } + }, + "Ethernet465": { + "index": "58,58,58,58,58,58,58,58", + "lanes": "441,442,443,444,445,446,447,448", + "breakout_modes": { + "1x800G": [ + "Eth59" + ], + "2x400G": [ + "Eth59/1", + "Eth59/2" + ], + "4x200G": [ + "Eth59/1", + "Eth59/2", + "Eth59/3", + "Eth59/4" + ] + } + }, + "Ethernet473": { + "index": "59,59,59,59,59,59,59,59", + "lanes": "433,434,435,436,437,438,439,440", + "breakout_modes": { + "1x800G": [ + "Eth60" + ], + "2x400G": [ + "Eth60/1", + "Eth60/2" + ], + "4x200G": [ + "Eth60/1", + "Eth60/2", + "Eth60/3", + "Eth60/4" + ] + } + }, + "Ethernet481": { + "index": "60,60,60,60,60,60,60,60", + "lanes": "457,458,459,460,461,462,463,464", + "breakout_modes": { + "1x800G": [ + "Eth61" + ], + "2x400G": [ + "Eth61/1", + "Eth61/2" + ], + "4x200G": [ + "Eth61/1", + "Eth61/2", + "Eth61/3", + "Eth61/4" + ] + } + }, + "Ethernet489": { + "index": "61,61,61,61,61,61,61,61", + "lanes": "449,450,451,452,453,454,455,456", + "breakout_modes": { + "1x800G": [ + "Eth62" + ], + "2x400G": [ + "Eth62/1", + "Eth62/2" + ], + "4x200G": [ + "Eth62/1", + "Eth62/2", + "Eth62/3", + "Eth62/4" + ] + } + }, + "Ethernet497": { + "index": "62,62,62,62,62,62,62,62", + "lanes": "473,474,475,476,477,478,479,480", + "breakout_modes": { + "1x800G": [ + "Eth63" + ], + "2x400G": [ + "Eth63/1", + "Eth63/2" + ], + "4x200G": [ + "Eth63/1", + "Eth63/2", + "Eth63/3", + "Eth63/4" + ] + } + }, + "Ethernet505": { + "index": "63,63,63,63,63,63,63,63", + "lanes": "465,466,467,468,469,470,471,472", + "breakout_modes": { + "1x800G": [ + "Eth64" + ], + "2x400G": [ + "Eth64/1", + "Eth64/2" + ], + "4x200G": [ + "Eth64/1", + "Eth64/2", + "Eth64/3", + "Eth64/4" + ] + } + }, + "Ethernet513": { + "index": "64", + "lanes": "513", + "breakout_modes": { + "1x25G": [ + "Eth65" + ] + } + }, + "Ethernet515": { + "index": "65", + "lanes": "515", + "breakout_modes": { + "1x25G": [ + "Eth66" + ] + } + } + } +} \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_asic b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_asic new file mode 100644 index 00000000000..96046765276 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_components.json new file mode 100644 index 00000000000..fa01608f897 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_components.json @@ -0,0 +1,18 @@ +{ + "chassis": { + "M2-W6940-64OC": { + "component": { + "CPU_CPLD": { }, + "CONNECT_CPLD": { }, + "MAC_CPLDA": { }, + "MAC_CPLDB": { }, + "MAC_CPLDC": { }, + "MGMT_CPLD": { }, + "FAN_CPLD": { }, + "MAC_FPGA": { }, + "BIOS": { } + } + } + } +} + diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_env.conf new file mode 100644 index 00000000000..fc119184d5c --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_env.conf @@ -0,0 +1,2 @@ +is_ltsw_chip=1 +SYNCD_SHM_SIZE=1g diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/sfputil.py new file mode 100644 index 00000000000..c26bc0c53f6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/sfputil.py @@ -0,0 +1,376 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import os + import traceback + import subprocess + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 65 + PORTS_IN_BLOCK = 66 + + EEPROM_OFFSET = 106 + SFP_DEVICE_TYPE = "optoe2" + QSFP_DEVICE_TYPE = "optoe1" + QSFP_DD_DEVICE_TYPE = "optoe3" + I2C_MAX_ATTEMPT = 3 + + OPTOE_TYPE1 = 1 + OPTOE_TYPE2 = 2 + OPTOE_TYPE3 = 3 + + SFP_STATUS_INSERTED = '1' + SFP_STATUS_REMOVED = '0' + + _port_to_eeprom_mapping = {} + port_to_i2cbus_mapping ={} + port_dict = {} + + qsfp_ports_list = [] + qsfp_dd_ports_list = [] + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return self.qsfp_ports_list + + @property + def qsfp_dd_ports(self): + return self.qsfp_dd_ports_list + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + for x in range(self.PORT_START, self.PORTS_IN_BLOCK-2): + self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET) + self.port_to_i2cbus_mapping[64] = 59 + self.port_to_i2cbus_mapping[65] = 60 + self.update_ports_list() + + SfpUtilBase.__init__(self) + + def _sfp_read_file_path(self, file_path, offset, num_bytes): + attempts = 0 + while attempts < self.I2C_MAX_ATTEMPT: + try: + file_path.seek(offset) + read_buf = file_path.read(num_bytes) + except: + attempts += 1 + time.sleep(0.05) + else: + return True, read_buf + return False, None + + def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset): + """Tries to read the eeprom file to determine if the + device/sfp is present or not. If sfp present, the read returns + valid bytes. If not, read returns error 'Connection timed out""" + + if not os.path.exists(sysfs_sfp_i2c_client_eeprompath): + return False + else: + with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile: + rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1) + return rv + + def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype): + try: + sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path + + # Write device address to new_device file + nd_file = open(sysfs_nd_path, "w") + nd_str = "%s %s" % (devtype, hex(devaddr)) + nd_file.write(nd_str) + nd_file.close() + + except Exception as err: + print("Error writing to new device file: %s" % str(err)) + return 1 + else: + return 0 + + def _get_port_eeprom_path(self, port_num, devid): + sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter" + + if port_num in self.port_to_eeprom_mapping.keys(): + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num] + else: + sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter" + + i2c_adapter_id = self._get_port_i2c_adapter_id(port_num) + if i2c_adapter_id is None: + print("Error getting i2c bus num") + return None + + # Get i2c virtual bus path for the sfp + sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path, + str(i2c_adapter_id)) + + # If i2c bus for port does not exist + if not os.path.exists(sysfs_sfp_i2c_adapter_path): + print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path) + return None + + sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path, + str(i2c_adapter_id), + hex(devid)[-2:]) + + # If sfp device is not present on bus, Add it + if not os.path.exists(sysfs_sfp_i2c_client_path): + if port_num in self.qsfp_dd_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DD_DEVICE_TYPE) + elif port_num in self.qsfp_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE) + else: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE) + if ret != 0: + print("Error adding sfp device") + return None + + sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path + + return sysfs_sfp_i2c_client_eeprom_path + + def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes) + if rv == False: + return None + + try: + if len(raw) == 0: + return None + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + except: + return None + + return eeprom_raw + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + cmd = "cat /sys/s3ip/transceiver/eth{}/present".format(str(port_num + 1)) + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + return False + if output == "1": + return True + return False + + def check_is_qsfpdd(self, port_num): + try: + if self.get_presence(port_num) == False: + return False + + eeprom_path = self._get_port_eeprom_path(port_num, 0x50) + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1) + if eeprom_raw is None: + return False + # according to sff-8024 A0h Byte 0 is '1e','18' or '19' means the transceiver is qsfpdd, + if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18' or eeprom_raw[0] == '19'): + return True + except Exception as e: + print(traceback.format_exc()) + + return False + + def check_optoe_type(self, port_num, optoe_type): + if self.get_presence(port_num) == False: + return True + try: + eeprom_path = self._get_port_eeprom_path(port_num, 0x50) + dev_class_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/dev_class' + i2c_path = dev_class_path.format(str(self.port_to_i2cbus_mapping[port_num])) + cmd = "cat " + i2c_path + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + print("cmd: %s execution fail, output:%s" % (cmd, output)) + return False + if int(output) != optoe_type: + cmd = "echo " + str(optoe_type) + " > " + i2c_path + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + print("cmd: %s execution fail, output:%s" % (cmd, output)) + return False + return True + + except Exception as e: + print(traceback.format_exc()) + return False + + def update_ports_list(self): + self.qsfp_ports_list = [] + self.qsfp_dd_ports_list = [] + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + if (self.check_is_qsfpdd(x)): + self.qsfp_dd_ports_list.append(x) + else: + self.qsfp_ports_list.append(x) + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return True + + def get_transceiver_change_event(self, timeout=0): + + start_time = time.time() + current_port_dict = {} + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print ("get_transceiver_change_event:Invalid timeout value", timeout) + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print ('get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout) + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(x): + current_port_dict[x] = self.SFP_STATUS_INSERTED + else: + current_port_dict[x] = self.SFP_STATUS_REMOVED + if (current_port_dict == self.port_dict): + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + self.update_ports_list() + return True, {} + else: + # Update reg value + self.update_ports_list() + self.port_dict = current_port_dict + return True, self.port_dict + print ("get_transceiver_change_event: Should not reach here.") + return False, {} + + def _twos_comp(self, num, bits): + try: + if ((num & (1 << (bits - 1))) != 0): + num = num - (1 << bits) + return num + except: + return 0 + + def get_highest_temperature(self): + offset = 0 + hightest_temperature = -9999 + + presence_flag = False + read_eeprom_flag = False + temperature_valid_flag = False + + for port in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(port) == False: + continue + + presence_flag = True + + if port in self.qsfp_dd_ports: + offset = 14 + elif port in self.qsfp_ports: + offset = 22 + else: + offset = 96 + + eeprom_path = self._get_port_eeprom_path(port, 0x50) + try: + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + read_eeprom_flag = True + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2) + if len(eeprom_raw) != 0: + msb = int(eeprom_raw[0], 16) + lsb = int(eeprom_raw[1], 16) + + result = (msb << 8) | (lsb & 0xff) + result = self._twos_comp(result, 16) + result = float(result / 256.0) + if -50 <= result <= 200: + temperature_valid_flag = True + if hightest_temperature < result: + hightest_temperature = result + except Exception as e: + pass + + # all port not presence + if presence_flag == False: + hightest_temperature = -10000 + + # all port read eeprom fail + elif read_eeprom_flag == False: + hightest_temperature = -9999 + + # all port temperature invalid + elif read_eeprom_flag == True and temperature_valid_flag == False: + hightest_temperature = -10000 + + hightest_temperature = round(hightest_temperature, 2) + + return hightest_temperature diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/ssd_util.py new file mode 100644 index 00000000000..e8cf2e1a7cb --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/ssd_util.py @@ -0,0 +1,318 @@ +# +# ssd_util.py +# +# Generic implementation of the SSD health API +# SSD models supported: +# - InnoDisk +# - StorFly +# - Virtium + +try: + import re + import os + import subprocess + from sonic_platform_base.sonic_storage.storage_base import StorageBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +SMARTCTL = "smartctl {} -a" +INNODISK = "iSmart -d {}" +VIRTIUM = "SmartCmd -m {}" +DISK_LIST_CMD = "fdisk -l -o Device" +DISK_FREE_CMD = "df -h" +MOUNT_CMD = "mount" + +NOT_AVAILABLE = "N/A" +PE_CYCLE = 3000 +FAIL_PERCENT = 95 + +# Set Vendor Specific IDs +INNODISK_HEALTH_ID = 169 +INNODISK_TEMPERATURE_ID = 194 + +class SsdUtil(StorageBase): + """ + Generic implementation of the SSD health API + """ + model = NOT_AVAILABLE + serial = NOT_AVAILABLE + firmware = NOT_AVAILABLE + temperature = NOT_AVAILABLE + health = NOT_AVAILABLE + remaining_life = NOT_AVAILABLE + sata_rate = NOT_AVAILABLE + ssd_info = NOT_AVAILABLE + vendor_ssd_info = NOT_AVAILABLE + + def __init__(self, diskdev): + self.vendor_ssd_utility = { + "Generic" : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info }, + "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "M.2" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "StorFly" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info }, + "Virtium" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info } + } + + """ + The dict model_attr keys relate the vendors + LITEON : "ER2-GD","AF2MA31DTDLT" + Intel : "SSDSCKKB" + SMI : "SM619GXC" + samsung: "MZNLH" + ADATA : "IM2S3134N" + """ + self.model_attr = { + "ER2-GD" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }, + "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }, + "SSDSCK" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" }, + "SM619GXC" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" }, + "MZNLH" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" }, + "IM2S3134N" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" }, + "MTFDDAV240TCB-1AR1ZABAA" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" } + } + + self.key_list = list(self.model_attr.keys()) + self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*" + self.dev = diskdev + # Generic part + self.fetch_generic_ssd_info(diskdev) + self.parse_generic_ssd_info() + self.fetch_vendor_ssd_info(diskdev, "Generic") + + # Known vendor part + if self.model: + model_short = self.model.split()[0] + if model_short in self.vendor_ssd_utility: + self.fetch_vendor_ssd_info(diskdev, model_short) + self.parse_vendor_ssd_info(model_short) + else: + # No handler registered for this disk model + pass + else: + # Failed to get disk model + self.model = "Unknown" + + def _execute_shell(self, cmd): + process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE) + output, error = process.communicate() + exit_code = process.returncode + if exit_code: + return None + return output + + def _parse_re(self, pattern, buffer): + res_list = re.findall(pattern, str(buffer)) + return res_list[0] if res_list else NOT_AVAILABLE + + def fetch_generic_ssd_info(self, diskdev): + self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev)) + + # Health and temperature values may be overwritten with vendor specific data + def parse_generic_ssd_info(self): + if "nvme" in self.dev: + self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info) + + health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info) + if health_raw == NOT_AVAILABLE: + self.health = NOT_AVAILABLE + else: + health_raw = health_raw.split()[-1] + self.health = 100 - float(health_raw.strip('%')) + + temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info) + if temp_raw == NOT_AVAILABLE: + self.temperature = NOT_AVAILABLE + else: + temp_raw = temp_raw.split()[-2] + self.temperature = float(temp_raw) + else: + self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info) + model_key = "" + for key in self.key_list: + if re.search(key, self.model): + model_key = key + break + if model_key != "": + self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2] + self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8] + self.health = self.remaining_life + # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE) + if model_key in ["ER2-GD", "AF2MA31DTDLT"]: + avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1]) + self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0)) + if self.remaining_life != NOT_AVAILABLE and int(self.remaining_life) < FAIL_PERCENT: + self.remaining_life = "Fail" + self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info) + self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info) + self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info) + + def parse_innodisk_info(self): + if self.vendor_ssd_info: + self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info) + self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info) + else: + if self.health == NOT_AVAILABLE: + health_raw = self.parse_id_number(INNODISK_HEALTH_ID) + self.health = health_raw.split()[-1] + if self.temperature == NOT_AVAILABLE: + temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID) + self.temperature = temp_raw.split()[-6] + + def parse_virtium_info(self): + if self.vendor_ssd_info: + self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + try: + self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance)) + except (ValueError, ZeroDivisionError): + # Invalid avg_erase_count or nand_endurance. + pass + + def fetch_vendor_ssd_info(self, diskdev, model): + self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev)) + + def parse_vendor_ssd_info(self, model): + self.vendor_ssd_utility[model]["parser"]() + + def check_readonly2(self, partition, filesystem): + # parse mount cmd output info + mount_info = self._execute_shell(MOUNT_CMD) + for line in mount_info.split('\n'): + column_list = line.split() + if line == '': + continue + if column_list[0] == partition and column_list[2] == filesystem: + if column_list[5].split(',')[0][1:] == "ro": + return partition + else: + return NOT_AVAILABLE + return NOT_AVAILABLE + + def check_readonly(self, partition, filesystem): + ret = os.access(filesystem, os.W_OK) + if ret == False: + return partition + else: + return NOT_AVAILABLE + + def get_health(self): + """ + Retrieves current disk health in percentages + + Returns: + A float number of current ssd health + e.g. 83.5 + """ + if self.health == 'N/A': + return "NA" + else: + return float(self.health) + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + if self.temperature == 'N/A': + return 'NA' + else: + return float(self.temperature) + + def get_model(self): + """ + Retrieves model for the given disk device + + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + def get_sata_rate(self): + """ + Retrieves SATA rate for the given disk device + Returns: + A string holding current SATA rate as provided by the manufacturer + """ + return self.sata_rate + def get_remaining_life(self): + """ + Retrieves remaining life for the given disk device + Returns: + A string holding disk remaining life as provided by the manufacturer + """ + return self.remaining_life + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + + Returns: + A string holding some vendor specific disk information + """ + return self.vendor_ssd_info + + def parse_id_number(self, id): + return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info) + + def get_readonly_partition(self): + """ + Check the partition mount filesystem is readonly status,then output the result. + Returns: + The readonly partition list + """ + + ro_partition_list = [] + partition_list = [] + + # parse fdisk cmd output info + disk_info = self._execute_shell(DISK_LIST_CMD) + begin_flag = False + for line in disk_info.split('\n'): + if line == "Device": + begin_flag = True + continue + if begin_flag: + if line != "": + partition_list.append(line) + else: + break + + # parse df cmd output info + disk_free = self._execute_shell(DISK_FREE_CMD) + disk_dict = {} + line_num = 0 + for line in disk_free.split('\n'): + line_num = line_num + 1 + if line_num == 1 or line == "": + continue + column_list = line.split() + disk_dict[column_list[0]] = column_list[5] + + # get partition which is readonly + for partition in partition_list: + if partition in disk_dict: + ret = self.check_readonly(partition, disk_dict[partition]) + if (ret != NOT_AVAILABLE): + ro_partition_list.append(ret) + + return ro_partition_list diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..94592fa8ceb --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6940-64oc-r0/postinit_cmd_file.soc new file mode 100644 index 00000000000..0f7f6bfea0c --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/postinit_cmd_file.soc @@ -0,0 +1,4 @@ +led load /usr/share/sonic/platform/custom_led.bin +led auto on +led start +linkscan SwPortBitMap=xe,ce,cd,d3c \ No newline at end of file diff --git a/src/libnl3/debian/patches/series b/device/micas/x86_64-micas_m2-w6940-64oc-r0/system_health_monitoring_config.json old mode 100644 new mode 100755 similarity index 100% rename from src/libnl3/debian/patches/series rename to device/micas/x86_64-micas_m2-w6940-64oc-r0/system_health_monitoring_config.json diff --git a/device/netberg/x86_64-netberg_aurora_715-r0/platform_asic b/device/netberg/x86_64-netberg_aurora_715-r0/platform_asic index 84083a7415d..a657472d7ad 100644 --- a/device/netberg/x86_64-netberg_aurora_715-r0/platform_asic +++ b/device/netberg/x86_64-netberg_aurora_715-r0/platform_asic @@ -1 +1 @@ -innovium +marvell-teralynx diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 index d38f07fac66..118ea62d5a4 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 @@ -1 +1 @@ -f3d3345bef9c6ac4eea19c6170e92970 \ No newline at end of file +7333f3669bbbd18bcc3890028d7afb39 \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml index 6f615816bf4..58080123473 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml @@ -1,5 +1,5 @@ - + @@ -148,96 +148,40 @@ No Phy 0 - - alaska-88E1543 - Specifies PHY identifier 88E1543, used for Combo ports. - 1 - - - alaska-88E1545 - Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support. - 2 - alaska-88E1680 Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G. - 3 - - - alaska-88E151X - Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber). - 4 - - - alaska-88E3140 - Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G. -Uses with FW SolarFlare next generation. - 5 - - - alaska-88E3240 - Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G. -Uses with FW, SolarFlare next generation. - 6 - - - alaska-88E3680 - Specifies PHY identifier 88E3680, used for Octal Copper 100M. - 7 - - - alaska-88E3220 - Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G. -Uses FW, SolarFlare next generation. - 8 - - - alaska-88E1680L - Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G. - 9 - - - alaska-88E33X0 - Specifies PHY identifier 88E33X0, used for MGIG Combo. - 10 - - - alaska-88E1548 - Specifies PHY identifier 88E1548, used for Fiber GE. - 11 - - - alaska-88E20X0 - Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G. - 12 - - - alaska-88E1512 - Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G. - 13 - - - alaska-88E2180 - Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G. - 14 + 1 alaska-88E1780 Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy Efficient Ethernet Transceiver - 15 + 2 alaska-88E2540 Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver with IEEE 1588v2 PTP Support - 16 + 3 alaska-88E2580 - Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver + Specifies PHY identifier 88E2580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver with IEEE 1588v2 PTP Support - 17 + 4 + + + alaska-88E2780 + Specifies PHY identifier 88E2780, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver +with IEEE 1588v2 PTP Support + 5 + + + alaska-MVCUE1786 + Specifies PHY identifier alaska V MV-CUE 1786, Octal 100/1000BASE-T Ethernet Transceiver +with IEEE 1588v2 PTP Support + 6 @@ -699,6 +643,20 @@ lowercase characters. 2 + + mpp-num-type + uint8 + Specifies the MPP pin number. + 0 + 63 + + + mpp-select-type + uint8 + Specifies the MPP pin value. + 0 + 15 + ASIC_AC5X AC5X-xb diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 index 1d7a5566018..40176ed8e3f 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 @@ -1 +1 @@ -4ad719e69b522db7ee969da2894cb04a \ No newline at end of file +1f97e3150eec3a7ee6f56f51f9229db3 \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml index 7789d25115e..9e377e9cfb1 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml @@ -1,7 +1,27 @@ - + + + asic-type + enumeration + ASIC Type + + ASIC_AC3X + AC3X + 0 + + + ASIC_AC5X + AC5X + 1 + + + ASIC_Falcon + FALCON + 2 + + interface-mode-type enumeration @@ -479,6 +499,26 @@ 5 + + phy-serdes-type + enumeration + Phy Serdes Type + + NA + No serdes + 0 + + + COMPHY + COMPHY + 1 + + + COMPHY_C28G + COMPHY_C28G + 2 + + port-interconnect-profile-type enumeration @@ -500,6 +540,7 @@ + ASIC_AC5X 1000MR1 @@ -549,6 +590,7 @@ 0 COMPHY_C28G + COMPHY profile_default 1000MR1 false @@ -566,11 +608,18 @@ peak 1 + + true + 0 + 25 + 0 + 1 COMPHY_C28G + NA profile_default 1000MR1 false @@ -578,6 +627,7 @@ 2 COMPHY_C28G + NA profile_default 1000MR1 false @@ -585,6 +635,7 @@ 3 COMPHY_C28G + NA profile_default 1000MR1 false @@ -592,6 +643,7 @@ 4 COMPHY_C28G + NA profile_default 1000MR1 false @@ -599,6 +651,7 @@ 5 COMPHY_C28G + NA profile_default 1000MR1 false @@ -606,6 +659,7 @@ 6 COMPHY_C28G + NA profile_default 1000MR1 false @@ -613,6 +667,7 @@ 7 COMPHY_C28G + NA profile_default 1000MR1 false @@ -620,6 +675,7 @@ 8 COMPHY_C28G + COMPHY profile_default 1000MR1 false @@ -637,11 +693,18 @@ peak 5 + + true + 0 + 24 + 0 + 9 COMPHY_C28G + NA profile_default 1000MR1 false @@ -649,6 +712,7 @@ 10 COMPHY_C28G + NA profile_default 1000MR1 false @@ -656,6 +720,7 @@ 11 COMPHY_C28G + NA profile_default 1000MR1 false @@ -663,6 +728,7 @@ 12 COMPHY_C28G + NA profile_default 1000MR1 false @@ -670,6 +736,7 @@ 13 COMPHY_C28G + NA profile_default 1000MR1 false @@ -677,6 +744,7 @@ 14 COMPHY_C28G + NA profile_default 1000MR1 false @@ -684,6 +752,7 @@ 15 COMPHY_C28G + NA profile_default 1000MR1 false @@ -691,6 +760,7 @@ 16 COMPHY_C28G + COMPHY profile_default 1000MR1 false @@ -708,11 +778,18 @@ peak 9 + + true + 0 + 24 + 0 + 17 COMPHY_C28G + NA profile_default 1000MR1 false @@ -720,6 +797,7 @@ 18 COMPHY_C28G + NA profile_default 1000MR1 false @@ -727,6 +805,7 @@ 19 COMPHY_C28G + NA profile_default 1000MR1 false @@ -734,6 +813,7 @@ 20 COMPHY_C28G + NA profile_default 1000MR1 false @@ -741,6 +821,7 @@ 21 COMPHY_C28G + NA profile_default 1000MR1 false @@ -748,6 +829,7 @@ 22 COMPHY_C28G + NA profile_default 1000MR1 false @@ -755,6 +837,7 @@ 23 COMPHY_C28G + NA profile_default 1000MR1 false @@ -762,6 +845,7 @@ 24 COMPHY_C28G + COMPHY profile_default 1000MR1 false @@ -779,11 +863,18 @@ peak 10 + + true + 0 + 24 + 0 + 25 COMPHY_C28G + NA profile_default 1000MR1 false @@ -791,6 +882,7 @@ 26 COMPHY_C28G + NA profile_default 1000MR1 false @@ -798,6 +890,7 @@ 27 COMPHY_C28G + NA profile_default 1000MR1 false @@ -805,6 +898,7 @@ 28 COMPHY_C28G + NA profile_default 1000MR1 false @@ -812,6 +906,7 @@ 29 COMPHY_C28G + NA profile_default 1000MR1 false @@ -819,6 +914,7 @@ 30 COMPHY_C28G + NA profile_default 1000MR1 false @@ -826,6 +922,7 @@ 31 COMPHY_C28G + NA profile_default 1000MR1 false @@ -833,6 +930,7 @@ 32 COMPHY_C28G + COMPHY profile_default 1000MR1 false @@ -850,11 +948,18 @@ peak 14 + + true + 0 + 23 + 0 + 33 COMPHY_C28G + NA profile_default 1000MR1 false @@ -862,6 +967,7 @@ 34 COMPHY_C28G + NA profile_default 1000MR1 false @@ -869,6 +975,7 @@ 35 COMPHY_C28G + NA profile_default 1000MR1 false @@ -876,6 +983,7 @@ 36 COMPHY_C28G + NA profile_default 1000MR1 false @@ -883,6 +991,7 @@ 37 COMPHY_C28G + NA profile_default 1000MR1 false @@ -890,6 +999,7 @@ 38 COMPHY_C28G + NA profile_default 1000MR1 false @@ -897,6 +1007,7 @@ 39 COMPHY_C28G + NA profile_default 1000MR1 false @@ -904,6 +1015,7 @@ 40 COMPHY_C28G + COMPHY profile_default 1000MR1 false @@ -921,11 +1033,18 @@ peak 11 + + true + 0 + 23 + 0 + 41 COMPHY_C28G + NA profile_default 1000MR1 false @@ -933,6 +1052,7 @@ 42 COMPHY_C28G + NA profile_default 1000MR1 false @@ -940,6 +1060,7 @@ 43 COMPHY_C28G + NA profile_default 1000MR1 false @@ -947,6 +1068,7 @@ 44 COMPHY_C28G + NA profile_default 1000MR1 false @@ -954,6 +1076,7 @@ 45 COMPHY_C28G + NA profile_default 1000MR1 false @@ -961,6 +1084,7 @@ 46 COMPHY_C28G + NA profile_default 1000MR1 false @@ -968,6 +1092,7 @@ 47 COMPHY_C28G + NA profile_default 1000MR1 false @@ -975,6 +1100,7 @@ 48 COMPHY_C28G + NA profile_default 10GR1 false @@ -997,6 +1123,7 @@ 49 COMPHY_C28G + NA profile_default 10GR1 false @@ -1019,6 +1146,7 @@ 50 COMPHY_C28G + NA profile_default 10GR1 false @@ -1041,6 +1169,7 @@ 51 COMPHY_C28G + NA profile_default 10GR1 false diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 index 5c1c480ebb3..fc68f9ae33b 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 @@ -1 +1 @@ -7ca6eaf67da8ee4c5b2a4f480db8919f \ No newline at end of file +306e882317520250db0161d1cf4c8a3b \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml index 13b344d6b96..f15449bd5e2 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml @@ -1,5 +1,5 @@ - + diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 index 7d2cfc524b9..3d57599d00f 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 @@ -1 +1 @@ -751d5fb74a0861240aa86afad8ad13ef \ No newline at end of file +05614f693742dfda5c7140c186516f0c \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml index 91246fc3584..be2b470f78c 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml @@ -1,5 +1,5 @@ - + @@ -444,6 +444,10 @@ 0 ROUTE_BLACKHOLE + + Disabled + Disabled + SAI_LOG_SYSLOG diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json index 89a7a3e9ddf..16e104341cd 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json @@ -275,5 +275,9 @@ } ] }, - "interfaces": {} + "interfaces": {}, + "asic_sensors": { + "poll_interval": "10", + "poll_admin_status": "enable" + } } diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 index 5422b86a598..06fdcf8c466 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 @@ -1 +1 @@ -d7069397e7466efe2bd6cf4a952b56db \ No newline at end of file +7b9a2fb849b5bd8caa70e2e7cc5aca02 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml index efb1432c65d..ee9245c49aa 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -148,96 +148,34 @@ No Phy 0 - - alaska-88E1543 - Specifies PHY identifier 88E1543, used for Combo ports. - 1 - - - alaska-88E1545 - Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support. - 2 - alaska-88E1680 Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G. - 3 - - - alaska-88E151X - Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber). - 4 - - - alaska-88E3140 - Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G. -Uses with FW SolarFlare next generation. - 5 - - - alaska-88E3240 - Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G. -Uses with FW, SolarFlare next generation. - 6 - - - alaska-88E3680 - Specifies PHY identifier 88E3680, used for Octal Copper 100M. - 7 - - - alaska-88E3220 - Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G. -Uses FW, SolarFlare next generation. - 8 - - - alaska-88E1680L - Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G. - 9 - - - alaska-88E33X0 - Specifies PHY identifier 88E33X0, used for MGIG Combo. - 10 - - - alaska-88E1548 - Specifies PHY identifier 88E1548, used for Fiber GE. - 11 - - - alaska-88E20X0 - Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G. - 12 - - - alaska-88E1512 - Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G. - 13 - - - alaska-88E2180 - Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G. - 14 + 1 alaska-88E1780 Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy Efficient Ethernet Transceiver - 15 + 2 alaska-88E2540 Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver with IEEE 1588v2 PTP Support - 16 + 3 alaska-88E2580 - Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver + Specifies PHY identifier 88E2580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver with IEEE 1588v2 PTP Support - 17 + 4 + + + alaska-88E2780 + Specifies PHY identifier 88E2780, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver +with IEEE 1588v2 PTP Support + 5 @@ -699,6 +637,20 @@ lowercase characters. 2 + + mpp-num-type + uint8 + Specifies the MPP pin number. + 0 + 63 + + + mpp-select-type + uint8 + Specifies the MPP pin value. + 0 + 15 + ASIC_AC3X M0-48x1G-4x10G diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 index a232c838152..ad15b12a867 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 @@ -1 +1 @@ -bf932ba262c96acdfe677bd5078a21d7 \ No newline at end of file +feeec405a324a0c99f1078bfad4ca512 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml index f1cc5989ddd..4dd22e0b3cd 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml @@ -1,7 +1,27 @@ - + + + asic-type + enumeration + ASIC Type + + ASIC_AC3X + AC3X + 0 + + + ASIC_AC5X + AC5X + 1 + + + ASIC_Falcon + FALCON + 2 + + interface-mode-type enumeration @@ -479,6 +499,26 @@ 5 + + phy-serdes-type + enumeration + Phy Serdes Type + + NA + No serdes + 0 + + + COMPHY + COMPHY + 1 + + + COMPHY_C28G + COMPHY_C28G + 2 + + port-interconnect-profile-type enumeration @@ -500,6 +540,7 @@ + ASIC_AC3X 1000MR1 diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 index 2e3f0e0342d..74bca52a8a8 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 @@ -1 +1 @@ -bb2f27ac93e33103554948dee6f3a1f1 \ No newline at end of file +07f3a60faed5eda425dec39f7198aaaa \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml index 30c2712f2a3..adaa9ebc0b7 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml @@ -1,7 +1,27 @@ - + + + asic-type + enumeration + ASIC Type + + ASIC_AC3X + AC3X + 0 + + + ASIC_AC5X + AC5X + 1 + + + ASIC_Falcon + FALCON + 2 + + interface-mode-type enumeration @@ -479,6 +499,26 @@ 5 + + phy-serdes-type + enumeration + Phy Serdes Type + + NA + No serdes + 0 + + + COMPHY + COMPHY + 1 + + + COMPHY_C28G + COMPHY_C28G + 2 + + port-interconnect-profile-type enumeration @@ -500,6 +540,7 @@ + ASIC_AC3X 1000MR1 diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 index 41076369390..4e2aeb92348 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 @@ -1 +1 @@ -411f788b1a253e5ad2e0e9026d0bb1aa \ No newline at end of file +da1aa11a8d24bf8e2d3eae6fb57958a9 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml index fe782eb5ce9..05996a7be9d 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 index 97def7a9048..1b371a8acee 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 @@ -1 +1 @@ -e56672c96f9a00b3652bdbe8a4ec4a23 \ No newline at end of file +70389c5db569f7a77c09393a4df21603 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml index 43dde6b9470..686612b88db 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json index 29e11388382..4c0acf7eb89 100644 --- a/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json +++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json @@ -495,5 +495,9 @@ } ] }, - "interfaces": {} + "interfaces": {}, + "asic_sensors": { + "poll_interval": "10", + "poll_admin_status": "enable" + } } diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json index b40c5fe9498..99562f3deb5 100644 --- a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json +++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json @@ -447,5 +447,10 @@ } ] }, - "interfaces": {} + "interfaces": {}, + + "asic_sensors": { + "poll_interval": "10", + "poll_admin_status": "enable" + } } diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json index 63f55d3eb01..b330c66ff38 100644 --- a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json +++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json @@ -460,5 +460,9 @@ } ] }, - "interfaces": {} + "interfaces": {}, + "asic_sensors": { + "poll_interval": "10", + "poll_admin_status": "enable" + } } diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm index 6f07539f976..01036747808 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm @@ -1267,6 +1267,7 @@ polled_irq_delay.BCM8885X=5 polled_irq_mode.BCM8885X=0 port_fec_fabric.BCM8885X=7 bcm_stat_interval.BCM8885X=1000000 +bcm_linkscan_interval=500000 port_init_cl72_256=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm index a1419db8fd6..034b80def8e 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm @@ -1267,6 +1267,7 @@ polled_irq_delay.BCM8885X=5 polled_irq_mode.BCM8885X=0 port_fec_fabric.BCM8885X=7 bcm_stat_interval.BCM8885X=1000000 +bcm_linkscan_interval=500000 port_init_cl72_1=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm index fa5849f4549..2c241bcfff4 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm @@ -1268,6 +1268,7 @@ polled_irq_delay.BCM8885X=5 polled_irq_mode.BCM8885X=0 port_fec_fabric.BCM8885X=7 bcm_stat_interval.BCM8885X=1000000 +bcm_linkscan_interval=500000 port_init_cl72_1=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm index ccb87e9ad0e..1ec4a907452 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm @@ -1268,6 +1268,7 @@ polled_irq_delay.BCM8885X=5 polled_irq_mode.BCM8885X=0 port_fec_fabric.BCM8885X=7 bcm_stat_interval.BCM8885X=1000000 +bcm_linkscan_interval=500000 port_init_cl72_1=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json index ab881c4ccfd..4d34218672e 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json @@ -275,5 +275,9 @@ } ] }, - "interfaces": {} + "interfaces": {}, + "asic_sensors": { + "poll_interval": "10", + "poll_admin_status": "enable" + } } diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm index 12a0b532fd8..c9036f36c9e 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=1 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm index 59106ba5938..8c0517292d4 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=2 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm index a481d75a94b..dc5a99c0953 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=11 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm index 2c315e84ac4..12f59db6b93 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=12 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm index 581b5d76a91..e7769dbe80a 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=13 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm index 364690e7ae4..276b576485a 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=14 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm index d12d791c83e..bd35d4a44ea 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=15 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm index 86d9af38e0b..140d21415ff 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=16 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm index 0c4b5403bf5..fbcfc7a8ed0 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=3 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm index 1617c40e6ca..8c485dffa12 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=4 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm index f905a66b2e9..7d73ac75aee 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=5 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm index f25c8b10d2a..95d9b411740 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=6 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm index 5a824fcde8a..ddbe158e4d5 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=7 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm index d27ebd28272..26595b41062 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=8 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm index cb8307452b6..a845cc4cb0f 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=9 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm index 184d1136033..953da5cc924 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm @@ -2,7 +2,8 @@ appl_enable_intr_init.BCM8879X=0 appl_param_module_id.BCM8879X=10 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -bcm_stat_interval.BCM8879X=5000000 +bcm_stat_interval.BCM8879X=15000000 +bcm_linkscan_interval=500000 bist_enable.BCM8879X=0 core_clock_speed_khz.BCM8879X=1000000 custom_feature_access_only.BCM8879X=0 diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/chassisdb.conf b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/chassisdb.conf index 220e262f68e..1ee5a0239d6 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/chassisdb.conf +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/chassisdb.conf @@ -1,4 +1,4 @@ start_chassis_db=1 chassis_db_address=10.6.0.100 lag_id_start=1 -lag_id_end=1024 +lag_id_end=1023 diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json index ef069d2e13d..f65c8d4a8cf 100644 --- a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json @@ -3,5 +3,6 @@ "skip_psud": true, "skip_fancontrol": true, "skip_chassisd": false, - "skip_ycabled": true + "skip_ycabled": true, + "skip_xcvrd": true } diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic index 84083a7415d..a657472d7ad 100644 --- a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic @@ -1 +1 @@ -innovium +marvell-teralynx diff --git a/device/wistron/x86_64-wistron_6512_32r-r0/platform_asic b/device/wistron/x86_64-wistron_6512_32r-r0/platform_asic index 84083a7415d..a657472d7ad 100644 --- a/device/wistron/x86_64-wistron_6512_32r-r0/platform_asic +++ b/device/wistron/x86_64-wistron_6512_32r-r0/platform_asic @@ -1 +1 @@ -innovium +marvell-teralynx diff --git a/device/wistron/x86_64-wistron_sw_to3200k-r0/platform_asic b/device/wistron/x86_64-wistron_sw_to3200k-r0/platform_asic index 84083a7415d..a657472d7ad 100644 --- a/device/wistron/x86_64-wistron_sw_to3200k-r0/platform_asic +++ b/device/wistron/x86_64-wistron_sw_to3200k-r0/platform_asic @@ -1 +1 @@ -innovium +marvell-teralynx diff --git a/dockers/docker-basic_router/supervisord.conf b/dockers/docker-basic_router/supervisord.conf index bfa84fdcdfb..2318419417c 100644 --- a/dockers/docker-basic_router/supervisord.conf +++ b/dockers/docker-basic_router/supervisord.conf @@ -8,13 +8,17 @@ command=/usr/bin/start.sh priority=1 autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:rsyslogd] command=/usr/sbin/rsyslogd -n priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true diff --git a/dockers/docker-database/Dockerfile.j2 b/dockers/docker-database/Dockerfile.j2 index 6f39d0ac5f5..d9ba01360b3 100644 --- a/dockers/docker-database/Dockerfile.j2 +++ b/dockers/docker-database/Dockerfile.j2 @@ -48,5 +48,6 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] COPY ["files/sysctl-net.conf", "/etc/sysctl.d/"] COPY ["files/update_chassisdb_config", "/usr/local/bin/"] COPY ["flush_unused_database", "/usr/local/bin/"] +COPY ["multi_database_config.json.j2", "/usr/share/sonic/templates/"] ENTRYPOINT ["/usr/local/bin/docker-database-init.sh"] diff --git a/dockers/docker-database/critical_processes.j2 b/dockers/docker-database/critical_processes.j2 index 1f524132e93..5bf4dbce47c 100644 --- a/dockers/docker-database/critical_processes.j2 +++ b/dockers/docker-database/critical_processes.j2 @@ -1,5 +1,5 @@ -{% if INSTANCES %} -{% for redis_inst, redis_items in INSTANCES.items() %} +{% if INSTANCES -%} +{% for redis_inst, redis_items in INSTANCES.items() -%} program:{{ redis_inst }} -{%- endfor %} -{%- endif %} +{% endfor -%} +{% endif -%} diff --git a/dockers/docker-database/database_config.json.j2 b/dockers/docker-database/database_config.json.j2 index f37b64ee966..b97589d3733 100644 --- a/dockers/docker-database/database_config.json.j2 +++ b/dockers/docker-database/database_config.json.j2 @@ -23,13 +23,17 @@ "unix_socket_path": "", "persistence_for_warm_boot" : "yes" } -{% endif %}, +{% endif %} +{% if DATABASE_TYPE is defined and DATABASE_TYPE == "dpudb" %} +{% else %} + , "redis_bmp":{ "hostname" : "{{HOST_IP}}", "port" : {{BMP_DB_PORT}}, "unix_socket_path" : "/var/run/redis{{DEV}}/redis_bmp.sock", "persistence_for_warm_boot" : "yes" } +{% endif %} }, "DATABASES" : { "APPL_DB" : { @@ -135,12 +139,14 @@ "separator": ":", "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %} } -{% endif %}, - "BMP_STATE_DB" : { +{% else %} + , + "BMP_STATE_DB" : { "id" : 20, "separator": "|", "instance" : "redis_bmp" } +{% endif %} }, "VERSION" : "1.0" } diff --git a/dockers/docker-database/docker-database-init.sh b/dockers/docker-database/docker-database-init.sh index c50add1a769..7afdbf6dc47 100755 --- a/dockers/docker-database/docker-database-init.sh +++ b/dockers/docker-database/docker-database-init.sh @@ -50,7 +50,11 @@ mkdir -p /etc/supervisor/conf.d/ if [ -f /etc/sonic/database_config$NAMESPACE_ID.json ]; then cp /etc/sonic/database_config$NAMESPACE_ID.json $REDIS_DIR/sonic-db/database_config.json else - HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT j2 /usr/share/sonic/templates/database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json + if [ -f /etc/sonic/enable_multidb ]; then + HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT j2 /usr/share/sonic/templates/multi_database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json + else + HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT j2 /usr/share/sonic/templates/database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json + fi fi # on VoQ system, we only publish redis_chassis instance and CHASSIS_APP_DB when @@ -125,12 +129,10 @@ do else echo -n > /var/lib/$inst/dump.rdb fi + # the Redis process is operating under the 'redis' user in supervisord and make redis user own /var/lib/$inst inside db container. + chown -R redis:redis /var/lib/$inst done -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime - chown -R redis:redis $REDIS_DIR REDIS_BMP_DIR="/var/lib/redis_bmp" chown -R redis:redis $REDIS_BMP_DIR diff --git a/dockers/docker-database/multi_database_config.json.j2 b/dockers/docker-database/multi_database_config.json.j2 new file mode 100644 index 00000000000..26ddb006b83 --- /dev/null +++ b/dockers/docker-database/multi_database_config.json.j2 @@ -0,0 +1,192 @@ +{% set include_remote_db = (REMOTE_DB_IP is defined and REMOTE_DB_PORT is defined) %} +{ + "INSTANCES": { + "redis":{ + "hostname" : "{{HOST_IP}}", + "port" : {{REDIS_PORT}}, + "unix_socket_path" : "/var/run/redis{{DEV}}/redis.sock", + "persistence_for_warm_boot" : "yes" + {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %} + ,"database_type": "{{DATABASE_TYPE}}" + {% endif %} + }, + "redis1": { + "hostname" : "{{HOST_IP}}", + "port" : 6378, + "unix_socket_path" : "/var/run/redis{{DEV}}/redis1.sock", + "persistence_for_warm_boot" : "yes" + {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %} + ,"database_type": "{{DATABASE_TYPE}}" + {% endif %} + }, + "redis2": { + "hostname" : "{{HOST_IP}}", + "port" : 6377, + "unix_socket_path" : "/var/run/redis{{DEV}}/redis2.sock", + "persistence_for_warm_boot" : "yes" + {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %} + ,"database_type": "{{DATABASE_TYPE}}" + {% endif %} + }, + "redis3": { + "hostname" : "{{HOST_IP}}", + "port" : 6376, + "unix_socket_path" : "/var/run/redis{{DEV}}/redis3.sock", + "persistence_for_warm_boot" : "yes" + {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %} + ,"database_type": "{{DATABASE_TYPE}}" + {% endif %} + }, + "redis4": { + "hostname" : "{{HOST_IP}}", + "port" : 6375, + "unix_socket_path" : "/var/run/redis{{DEV}}/redis4.sock", + "persistence_for_warm_boot" : "yes" + {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %} + ,"database_type": "{{DATABASE_TYPE}}" + {% endif %} + }, + "redis_chassis":{ + "hostname" : "redis_chassis.server", + "port": 6380, + "unix_socket_path": "/var/run/redis-chassis/redis_chassis.sock", + "persistence_for_warm_boot" : "yes" + } +{% if include_remote_db %} + ,"remote_redis":{ + "hostname" : "{{REMOTE_DB_IP}}", + "port" : {{REMOTE_DB_PORT}}, + "unix_socket_path": "", + "persistence_for_warm_boot" : "yes" + } +{% endif %}, + "redis_bmp":{ + "hostname" : "{{HOST_IP}}", + "port" : {{BMP_DB_PORT}}, + "unix_socket_path" : "/var/run/redis{{DEV}}/redis_bmp.sock", + "persistence_for_warm_boot" : "yes" + } + }, + "DATABASES" : { + "APPL_DB": { + "id": 0, + "separator": ":", + "instance": "redis1" + }, + "ASIC_DB": { + "id": 1, + "separator": ":", + "instance": "redis2" + }, + "COUNTERS_DB": { + "id": 2, + "separator": ":", + "instance": "redis3" + }, + "LOGLEVEL_DB": { + "id": 3, + "separator": ":", + "instance": "redis" + }, + "CONFIG_DB": { + "id": 4, + "separator": "|", + "instance": "redis" + }, + "PFC_WD_DB": { + "id": 5, + "separator": ":", + "instance": "redis3" + }, + "FLEX_COUNTER_DB": { + "id": 5, + "separator": ":", + "instance": "redis3" + }, + "STATE_DB": { + "id": 6, + "separator": "|", + "instance": "redis" + }, + "SNMP_OVERLAY_DB": { + "id": 7, + "separator": "|", + "instance": "redis" + }, + "SYSMON_DB": { + "id": 10, + "separator": "|", + "instance": "redis" + }, + "BMC_DB": { + "id": 12, + "separator": ":", + "instance": "redis4" + }, + "RESTAPI_DB": { + "id": 8, + "separator": "|", + "instance": "redis" + }, + "GB_ASIC_DB": { + "id": 9, + "separator": ":", + "instance": "redis" + }, + "GB_COUNTERS_DB": { + "id": 10, + "separator": ":", + "instance": "redis" + }, + "GB_FLEX_COUNTER_DB": { + "id": 11, + "separator": ":", + "instance": "redis" + }, + "APPL_STATE_DB": { + "id": 14, + "separator": ":", + "instance": "redis" + }, + "CHASSIS_APP_DB" : { + "id" : 12, + "separator": "|", + "instance" : "redis_chassis" + }, + "CHASSIS_STATE_DB" : { + "id" : 13, + "separator": "|", + "instance" : "redis_chassis" + } +{% if DATABASE_TYPE is defined and DATABASE_TYPE == "dpudb" %} + , + "DPU_APPL_DB" : { + "id" : 15, + "separator": ":", + "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}, + "format": "proto" + }, + "DPU_APPL_STATE_DB" : { + "id" : 16, + "separator": "|", + "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %} + }, + "DPU_STATE_DB" : { + "id" : 17, + "separator": "|", + "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %} + }, + "DPU_COUNTERS_DB" : { + "id" : 18, + "separator": ":", + "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %} + } +{% endif %}, + "BMP_STATE_DB" : { + "id" : 20, + "separator": "|", + "instance" : "redis_bmp" + } + }, + "VERSION" : "1.0" +} diff --git a/dockers/docker-database/supervisord.conf.j2 b/dockers/docker-database/supervisord.conf.j2 index f2fdffd2677..7ed0bf7ef45 100644 --- a/dockers/docker-database/supervisord.conf.j2 +++ b/dockers/docker-database/supervisord.conf.j2 @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true {% if INSTANCES %} @@ -46,8 +48,10 @@ priority=2 user=redis autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% endif %} {% endfor %} @@ -58,7 +62,9 @@ command=/bin/bash -c "sleep 300 && /usr/local/bin/flush_unused_database" priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running diff --git a/dockers/docker-dhcp-relay/Dockerfile.j2 b/dockers/docker-dhcp-relay/Dockerfile.j2 index e7b70a954ce..5b0dc82c314 100644 --- a/dockers/docker-dhcp-relay/Dockerfile.j2 +++ b/dockers/docker-dhcp-relay/Dockerfile.j2 @@ -50,11 +50,14 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] COPY ["critical_processes", "/etc/supervisor"] COPY ["cli", "/cli/"] -RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin - -# Copy rsyslog plugin configuration file and regexes to docker -COPY ["dhcp_relay_regex.json", "/etc/rsyslog.d/"] -COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"] -COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"] +{% if include_system_eventd == "y" and build_reduce_image_size != "y" %} +# Copy regex json and rsyslog_plugin.conf file into rsyslog.d +COPY ["*.json", "/etc/rsyslog.d/"] +COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"] +# Create dhcp_relay_regex.conf +RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json > /etc/rsyslog.d/dhcp_relay_events.conf +RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2 +RUN rm -f /etc/rsyslog.d/events_info.json +{% endif %} ENTRYPOINT ["/usr/bin/docker_init.sh"] diff --git a/dockers/docker-dhcp-relay/dhcp-relay.monitors.j2 b/dockers/docker-dhcp-relay/dhcp-relay.monitors.j2 index d81573fd86f..168a9d9e486 100644 --- a/dockers/docker-dhcp-relay/dhcp-relay.monitors.j2 +++ b/dockers/docker-dhcp-relay/dhcp-relay.monitors.j2 @@ -63,8 +63,10 @@ command=/usr/sbin/dhcpmon -id {{ vlan_name }} priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for= {%- if relay_for_ipv4.flag %}isc-dhcpv4-relay-{{ vlan_name }}:running {% endif %} diff --git a/dockers/docker-dhcp-relay/dhcpv4-relay.agents.j2 b/dockers/docker-dhcp-relay/dhcpv4-relay.agents.j2 index 42fac798058..366e8f73d7a 100644 --- a/dockers/docker-dhcp-relay/dhcpv4-relay.agents.j2 +++ b/dockers/docker-dhcp-relay/dhcpv4-relay.agents.j2 @@ -34,8 +34,10 @@ command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /t priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/dockers/docker-dhcp-relay/dhcpv6-relay.agents.j2 b/dockers/docker-dhcp-relay/dhcpv6-relay.agents.j2 index e392711f532..ffa73909f8a 100644 --- a/dockers/docker-dhcp-relay/dhcpv6-relay.agents.j2 +++ b/dockers/docker-dhcp-relay/dhcpv6-relay.agents.j2 @@ -18,8 +18,10 @@ command=/usr/sbin/dhcp6relay priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2 b/dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2 index 308997575a0..d26346613f3 100644 --- a/dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2 +++ b/dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2 @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -72,7 +76,9 @@ command=/usr/local/bin/dhcprelayd priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/dockers/docker-dhcp-relay/docker_init.sh b/dockers/docker-dhcp-relay/docker_init.sh index 94e2ddff062..1ff0e936ff6 100755 --- a/dockers/docker-dhcp-relay/docker_init.sh +++ b/dockers/docker-dhcp-relay/docker_init.sh @@ -21,7 +21,4 @@ chmod +x /usr/bin/wait_for_intf.sh # The docker container should start this script as PID 1, so now that supervisord is # properly configured, we exec /usr/local/bin/supervisord so that it runs as PID 1 for the # duration of the container's lifetime -export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state') -j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json > /etc/rsyslog.d/dhcp_relay_events.conf - exec /usr/local/bin/supervisord diff --git a/dockers/docker-dhcp-relay/start.sh b/dockers/docker-dhcp-relay/start.sh index ce0dce10ed3..87a9e5711f2 100755 --- a/dockers/docker-dhcp-relay/start.sh +++ b/dockers/docker-dhcp-relay/start.sh @@ -10,10 +10,6 @@ then ${CTR_SCRIPT} -f dhcp_relay -o ${RUNTIME_OWNER} -v ${IMAGE_VERSION} fi -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime - # If our supervisor config has entries in the "dhcp-relay" group... if [ $(supervisorctl status | grep -c "^dhcp-relay:") -gt 0 ]; then # Wait for all interfaces to come up and be assigned IPv4 addresses before diff --git a/dockers/docker-dhcp-relay/wait_for_intf.sh.j2 b/dockers/docker-dhcp-relay/wait_for_intf.sh.j2 index 13499a6e6c5..c00eaa35686 100644 --- a/dockers/docker-dhcp-relay/wait_for_intf.sh.j2 +++ b/dockers/docker-dhcp-relay/wait_for_intf.sh.j2 @@ -21,25 +21,6 @@ function wait_until_iface_ready echo "Interface ${IFACE_NAME} is ready!" } -function check_for_ipv6_link_local -{ - IFACE_NAME=$1 - echo "Waiting until interface ${IFACE_NAME} has a link-local ipv6 address configured...." - - # Status of link local address is not populated in STATE_DB - while true; do - HAS_LL=$(ip -6 addr show ${IFACE_NAME} scope link 2> /dev/null) - RC=$? - if [[ ${RC} == "0" ]] && [[ ! -z ${HAS_LL} ]]; then - break - fi - - sleep 1 - done - - echo "Link-Local address is configured on ${IFACE_NAME}" -} - # Wait for all interfaces with IPv4 addresses to be up and ready # dhcp6relay binds to ipv6 addresses configured on these vlan ifaces # Thus check if they are ready before launching dhcp6relay @@ -55,7 +36,6 @@ wait_until_iface_ready {{ name }} {{ prefix }} {% if prefix | ipv6 %} {% if DHCP_RELAY and name in DHCP_RELAY %} wait_until_iface_ready {{ name }} {{ prefix }} -check_for_ipv6_link_local {{ name }} {% endif %} {% endif %} {% endfor %} diff --git a/dockers/docker-dhcp-server/start.sh b/dockers/docker-dhcp-server/start.sh index 46b8eb503a4..e24f742b4a9 100755 --- a/dockers/docker-dhcp-server/start.sh +++ b/dockers/docker-dhcp-server/start.sh @@ -13,7 +13,3 @@ if test -f ${CTR_SCRIPT} then ${CTR_SCRIPT} -f dhcp_server -o ${RUNTIME_OWNER} -v ${IMAGE_VERSION} fi - -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime diff --git a/dockers/docker-dhcp-server/supervisord.conf b/dockers/docker-dhcp-server/supervisord.conf index 54df6bd8190..fc9e4789abe 100644 --- a/dockers/docker-dhcp-server/supervisord.conf +++ b/dockers/docker-dhcp-server/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -47,8 +51,10 @@ command=/usr/local/bin/dhcpservd priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -57,8 +63,10 @@ command=/usr/sbin/kea-dhcp4 -c /etc/kea/kea-dhcp4.conf priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=dhcpservd:running environment=KEA_PIDFILE_DIR=/tmp/ diff --git a/dockers/docker-eventd/start.sh b/dockers/docker-eventd/start.sh index 2c357a85743..60cd6a00aec 100755 --- a/dockers/docker-eventd/start.sh +++ b/dockers/docker-eventd/start.sh @@ -4,6 +4,3 @@ if [ "${RUNTIME_OWNER}" == "" ]; then RUNTIME_OWNER="kube" fi -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime diff --git a/dockers/docker-eventd/supervisord.conf b/dockers/docker-eventd/supervisord.conf index be51f922c12..095fec7e96b 100644 --- a/dockers/docker-eventd/supervisord.conf +++ b/dockers/docker-eventd/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -45,8 +49,10 @@ command=/usr/bin/eventd priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2 index e39ffdadf4c..98c4593811f 100644 --- a/dockers/docker-fpm-frr/Dockerfile.j2 +++ b/dockers/docker-fpm-frr/Dockerfile.j2 @@ -59,11 +59,12 @@ RUN chmod a+x /usr/bin/TSA && \ chmod a+x /usr/bin/TSC && \ chmod a+x /usr/bin/zsocket.sh -RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin - -# Copy rsyslog plugin configuration file and regexes to docker -COPY ["bgp_regex.json", "/etc/rsyslog.d/"] -COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"] -COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"] +{% if include_system_eventd == "y" and build_reduce_image_size != "y" %} +COPY ["*.json", "/etc/rsyslog.d/"] +COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"] +RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json > /etc/rsyslog.d/bgp_events.conf +RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2 +RUN rm -f /etc/rsyslog.d/events_info.json +{% endif %} ENTRYPOINT ["/usr/bin/docker_init.sh"] diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh index fbbcee8bd66..e24585945cc 100755 --- a/dockers/docker-fpm-frr/docker_init.sh +++ b/dockers/docker-fpm-frr/docker_init.sh @@ -108,11 +108,4 @@ chmod 0755 /usr/sbin/bgp-unisolate mkdir -p /var/sonic echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime - -export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state') -j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json > /etc/rsyslog.d/bgp_events.conf - exec /usr/local/bin/supervisord diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 index da6358a00ca..db11d662a3a 100644 --- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 +++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 @@ -88,6 +88,19 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} bgp graceful-restart select-defer-time {{ constants.bgp.graceful_restart.select_defer_time | default(45) }} {% endif %} ! +{# set bmp info #} +{% if (FEATURE is defined) and ('bmp' in FEATURE) and ('state' in FEATURE['bmp']) and (FEATURE['bmp']['state'] == 'enabled') %} +! + bmp mirror buffer-limit 4294967214 +! + bmp targets sonic-bmp + bmp stats interval 1000 + bmp monitor ipv4 unicast pre-policy + bmp monitor ipv6 unicast pre-policy + bmp connect 127.0.0.1 port 5000 min-retry 1000 max-retry 2000 +! +! +{% endif %} {# set router-id #} {% if DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd' or DEVICE_METADATA['localhost']['switch_type'] == 'voq' or DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %} {% if 'bgp_router_id' in DEVICE_METADATA['localhost'] %} diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.spine_chassis_frontend_router.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.spine_chassis_frontend_router.conf.j2 index 94dacbc3af7..2df0cd4a427 100644 --- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.spine_chassis_frontend_router.conf.j2 +++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.spine_chassis_frontend_router.conf.j2 @@ -49,7 +49,7 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} vrf {{ vnet_name }} address-family ipv4 unicast neighbor {{ neighbor_addr }} activate neighbor {{ neighbor_addr }} soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family {% endif %} address-family l2vpn evpn diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/peer-group.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/peer-group.conf.j2 index d2d2be87e7f..0e5c7aed3a3 100644 --- a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/peer-group.conf.j2 +++ b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/peer-group.conf.j2 @@ -5,6 +5,7 @@ neighbor INTERNAL_PEER_V6 peer-group {% if CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %} neighbor INTERNAL_PEER_V4 update-source Loopback4096 + neighbor INTERNAL_PEER_V4 ttl-security hops 1 {% endif %} address-family ipv4 {% if CONFIG_DB__DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd' %} @@ -15,10 +16,10 @@ neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out neighbor INTERNAL_PEER_V4 send-community - neighbor INTERNAL_PEER_V4 ttl-security hops 1 exit-address-family {% if CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %} neighbor INTERNAL_PEER_V6 update-source Loopback4096 + neighbor INTERNAL_PEER_V6 ttl-security hops 1 {% endif %} address-family ipv6 {% if CONFIG_DB__DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd' %} @@ -29,7 +30,6 @@ neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out neighbor INTERNAL_PEER_V6 send-community - neighbor INTERNAL_PEER_V6 ttl-security hops 1 exit-address-family ! ! end of template: bgpd/templates/internal/peer-group.conf.j2 diff --git a/dockers/docker-fpm-frr/frr/supervisord/critical_processes.j2 b/dockers/docker-fpm-frr/frr/supervisord/critical_processes.j2 index 69f4e8e6931..eea54fcfd55 100644 --- a/dockers/docker-fpm-frr/frr/supervisord/critical_processes.j2 +++ b/dockers/docker-fpm-frr/frr/supervisord/critical_processes.j2 @@ -6,6 +6,7 @@ program:fpmsyncd program:bfdd program:ospfd program:pimd +program:pathd program:frrcfgd {%- else %} program:bgpcfgd diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 index 15aa2ed5511..7a5c08f3610 100644 --- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 +++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 @@ -25,9 +25,22 @@ priority=1 autostart=false autorestart=unexpected startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true + +[program:mgmtd] +command=/usr/lib/frr/mgmtd -A 127.0.0.1 -P 0 +priority=4 +autostart=false +autorestart=true +startsecs=0 stdout_logfile=syslog stderr_logfile=syslog dependent_startup=true +dependent_startup_wait_for=rsyslogd:running [program:zebra] command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic -M snmp --asic-offload=notify_on_offload @@ -35,8 +48,10 @@ priority=4 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -46,70 +61,86 @@ priority=4 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=zebra:running [program:staticd] -command=/usr/lib/frr/staticd -A 127.0.0.1 +command=/usr/lib/frr/staticd -A 127.0.0.1 -P 0 priority=4 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=zsocket:exited {% if DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %} [program:bfdd] -command=/usr/lib/frr/bfdd -A 127.0.0.1 +command=/usr/lib/frr/bfdd -A 127.0.0.1 -P 0 priority=4 stopsignal=KILL autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=zebra:running {% endif %} [program:bgpd] -command=/usr/lib/frr/bgpd -A 127.0.0.1 -M snmp +{% if FEATURE is defined and FEATURE.bmp is defined and FEATURE.bmp.state is defined and FEATURE.bmp.state == "enabled" %} +command=/usr/lib/frr/bgpd -A 127.0.0.1 -P 0 -M snmp -M bmp +{% else %} +command=/usr/lib/frr/bgpd -A 127.0.0.1 -P 0 -M snmp +{% endif %} priority=5 stopsignal=KILL autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=zsocket:exited {% if DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %} [program:ospfd] -command=/usr/lib/frr/ospfd -A 127.0.0.1 -M snmp +command=/usr/lib/frr/ospfd -A 127.0.0.1 -P 0 -M snmp priority=5 stopsignal=KILL autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=zebra:running [program:pimd] -command=/usr/lib/frr/pimd -A 127.0.0.1 +command=/usr/lib/frr/pimd -A 127.0.0.1 -P 0 priority=5 stopsignal=KILL autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=zebra:running {% endif %} @@ -120,8 +151,10 @@ priority=6 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=bgpd:running @@ -136,8 +169,10 @@ priority=6 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=bgpd:running @@ -149,8 +184,10 @@ priority=6 autostart=false autorestart=true startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=bgpd:running @@ -160,8 +197,10 @@ priority=6 autostart=false autorestart=true startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=bgpd:running @@ -174,8 +213,10 @@ priority=6 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=bgpd:running {% endif %} @@ -188,8 +229,24 @@ autostart=false autorestart=false startsecs=0 startretries=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=bgpd:running +{% endif %} + +{% if DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %} +[program:pathd] +command=/usr/lib/frr/pathd -A 127.0.0.1 -P 0 +priority=5 +stopsignal=KILL +autostart=false +autorestart=false +startsecs=0 stdout_logfile=syslog stderr_logfile=syslog dependent_startup=true -dependent_startup_wait_for=bgpd:running +dependent_startup_wait_for=zebra:running {% endif %} diff --git a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2 b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2 index 673918b3d94..759cd2f8c38 100644 --- a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2 +++ b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2 @@ -18,6 +18,7 @@ no fpm use-next-hop-groups ! fpm address 127.0.0.1 {% endblock fpm %} +zebra nexthop-group keep 1 ! {% include "common/daemons.common.conf.j2" %} ! diff --git a/dockers/docker-fpm-gobgp/supervisord.conf b/dockers/docker-fpm-gobgp/supervisord.conf index 625f867950d..1d621254178 100644 --- a/dockers/docker-fpm-gobgp/supervisord.conf +++ b/dockers/docker-fpm-gobgp/supervisord.conf @@ -15,29 +15,37 @@ command=/usr/bin/start.sh priority=1 autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:rsyslogd] command=/usr/sbin/rsyslogd -n priority=2 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:gobgpd] command=/usr/sbin/gobgpd -p -f /etc/gobgp/gobgpd.conf -r priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:fpmsyncd] command=fpmsyncd priority=5 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true diff --git a/dockers/docker-iccpd/start.sh b/dockers/docker-iccpd/start.sh index cb36ce69cff..85a1c49edab 100644 --- a/dockers/docker-iccpd/start.sh +++ b/dockers/docker-iccpd/start.sh @@ -11,6 +11,3 @@ sonic-cfggen -d -t /usr/share/sonic/templates/iccpd.j2 > $ICCPD_CONF_PATH/iccpd. mkdir -p /var/sonic echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime diff --git a/dockers/docker-iccpd/supervisord.conf b/dockers/docker-iccpd/supervisord.conf index 323389aca3e..b1ab160c7eb 100644 --- a/dockers/docker-iccpd/supervisord.conf +++ b/dockers/docker-iccpd/supervisord.conf @@ -17,8 +17,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -27,8 +29,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -37,7 +41,9 @@ command=/usr/bin/iccpd.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/dockers/docker-lldp/start.sh b/dockers/docker-lldp/start.sh index 5295daed8a9..e92105db371 100755 --- a/dockers/docker-lldp/start.sh +++ b/dockers/docker-lldp/start.sh @@ -23,7 +23,3 @@ mkdir -p /var/sonic echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status rm -f /var/run/lldpd.socket - -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime diff --git a/dockers/docker-lldp/supervisord.conf.j2 b/dockers/docker-lldp/supervisord.conf.j2 index b2efe00bb96..a00d7e85bc0 100644 --- a/dockers/docker-lldp/supervisord.conf.j2 +++ b/dockers/docker-lldp/supervisord.conf.j2 @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -53,8 +57,10 @@ command=/usr/sbin/lldpd -d -I Ethernet[0-9]*,eth0 -C eth0 priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -64,8 +70,10 @@ priority=3 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=lldpd:running @@ -74,8 +82,10 @@ command=/usr/bin/env python3 -m lldp_syncd priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=waitfor_lldp_ready:exited @@ -84,7 +94,9 @@ command=/usr/bin/lldpmgrd priority=5 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=lldp-syncd:running diff --git a/dockers/docker-macsec/Dockerfile.j2 b/dockers/docker-macsec/Dockerfile.j2 index fc8674859f2..e616a5569b3 100644 --- a/dockers/docker-macsec/Dockerfile.j2 +++ b/dockers/docker-macsec/Dockerfile.j2 @@ -21,7 +21,6 @@ RUN apt-get clean -y && \ apt-get autoremove -y && \ rm -rf /debs -COPY ["start.sh", "/usr/bin/"] COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] COPY ["critical_processes", "/etc/supervisor"] diff --git a/dockers/docker-macsec/start.sh b/dockers/docker-macsec/start.sh deleted file mode 100644 index bfb684eecad..00000000000 --- a/dockers/docker-macsec/start.sh +++ /dev/null @@ -1,6 +0,0 @@ -#!/usr/bin/env bash - -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime - diff --git a/dockers/docker-macsec/supervisord.conf b/dockers/docker-macsec/supervisord.conf index 3ab4f372f10..d7a559e0e66 100644 --- a/dockers/docker-macsec/supervisord.conf +++ b/dockers/docker-macsec/supervisord.conf @@ -24,27 +24,20 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true -[program:start] -command=/usr/bin/start.sh -priority=2 -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog -dependent_startup=true -dependent_startup_wait_for=rsyslogd:running - [program:macsecmgrd] command=/usr/bin/macsecmgrd priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running diff --git a/dockers/docker-mux/docker-init.sh b/dockers/docker-mux/docker-init.sh index 1679ec5d9f8..bea1686132a 100755 --- a/dockers/docker-mux/docker-init.sh +++ b/dockers/docker-mux/docker-init.sh @@ -3,10 +3,6 @@ # Generate supervisord config file mkdir -p /etc/supervisor/conf.d/ -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime - # The docker container should start this script as PID 1, so now that supervisord is # properly configured, we exec supervisord so that it runs as PID 1 for the # duration of the container's lifetime diff --git a/dockers/docker-mux/supervisord.conf b/dockers/docker-mux/supervisord.conf index 43f31050646..62c524856e6 100644 --- a/dockers/docker-mux/supervisord.conf +++ b/dockers/docker-mux/supervisord.conf @@ -23,8 +23,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:linkmgrd] @@ -34,7 +36,9 @@ autostart=false autorestart=false startsecs=0 startretries=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running diff --git a/dockers/docker-nat/start.sh b/dockers/docker-nat/start.sh index 74912ce0148..68603d007a5 100755 --- a/dockers/docker-nat/start.sh +++ b/dockers/docker-nat/start.sh @@ -3,7 +3,3 @@ rm -f /var/run/nat/* mkdir -p /var/warmboot/nat - -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime diff --git a/dockers/docker-nat/supervisord.conf b/dockers/docker-nat/supervisord.conf index 8d7e184efc4..ab8338f9607 100644 --- a/dockers/docker-nat/supervisord.conf +++ b/dockers/docker-nat/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -44,8 +48,10 @@ command=/usr/bin/natmgrd priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -54,8 +60,10 @@ command=/usr/bin/natsyncd priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=natmgrd:running @@ -66,7 +74,9 @@ autostart=false autorestart=false startsecs=0 startretries=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=natsyncd:running diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2 index b3a7e49c325..fb90b4f09c2 100755 --- a/dockers/docker-orchagent/Dockerfile.j2 +++ b/dockers/docker-orchagent/Dockerfile.j2 @@ -80,11 +80,14 @@ RUN sonic-cfggen -a "{\"ENABLE_ASAN\":\"{{ENABLE_ASAN}}\"}" -t /usr/share/sonic/ RUN rm -f /usr/share/sonic/templates/docker-init.j2 RUN chmod 755 /usr/bin/docker-init.sh -RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin - -# Copy rsyslog plugin configuration file and regexes to docker -COPY ["swss_regex.json", "/etc/rsyslog.d/"] -COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"] -COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"] +{% if include_system_eventd == "y" and build_reduce_image_size != "y" %} +# Copy all regex json files and rsyslog_plugin.conf to rsyslog.d +COPY ["*.json", "/etc/rsyslog.d/"] +COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"] +# Create swss rsyslog_plugin conf file +RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json > /etc/rsyslog.d/swss_events.conf +RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2 +RUN rm -f /etc/rsyslog.d/events_info.json +{% endif %} ENTRYPOINT ["/usr/bin/docker-init.sh"] diff --git a/dockers/docker-orchagent/arp_update.conf b/dockers/docker-orchagent/arp_update.conf index a27a3b391cd..226e5d0761a 100644 --- a/dockers/docker-orchagent/arp_update.conf +++ b/dockers/docker-orchagent/arp_update.conf @@ -3,7 +3,9 @@ command=/usr/bin/arp_update priority=7 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited diff --git a/dockers/docker-orchagent/docker-init.j2 b/dockers/docker-orchagent/docker-init.j2 index 143c9bd5229..39e95c73332 100755 --- a/dockers/docker-orchagent/docker-init.j2 +++ b/dockers/docker-orchagent/docker-init.j2 @@ -3,7 +3,7 @@ mkdir -p /etc/swss/config.d/ mkdir -p /etc/supervisor/ mkdir -p /etc/supervisor/conf.d/ - +mkdir -p /dev/shm/supervisor/ CFGGEN_PARAMS=" \ -d \ @@ -70,11 +70,4 @@ if [ -f "$IS_SUPERVISOR" ]; then fi fi -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime - -export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state') -j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json > /etc/rsyslog.d/swss_events.conf - exec /usr/local/bin/supervisord diff --git a/dockers/docker-orchagent/enable_counters.py b/dockers/docker-orchagent/enable_counters.py index 5867787e0aa..9569284bc74 100755 --- a/dockers/docker-orchagent/enable_counters.py +++ b/dockers/docker-orchagent/enable_counters.py @@ -18,9 +18,6 @@ def enable_counter_group(db, name): info = {} info['FLEX_COUNTER_STATUS'] = 'enable' db.mod_entry("FLEX_COUNTER_TABLE", name, info) - else: - entry_info.update({"FLEX_COUNTER_DELAY_STATUS":"false"}) - db.mod_entry("FLEX_COUNTER_TABLE", name, entry_info) def enable_rates(): # set the default interval for rates diff --git a/dockers/docker-orchagent/ndppd.conf b/dockers/docker-orchagent/ndppd.conf index 86297de94a4..b24340c35e2 100644 --- a/dockers/docker-orchagent/ndppd.conf +++ b/dockers/docker-orchagent/ndppd.conf @@ -3,8 +3,10 @@ command=/usr/sbin/ndppd priority=7 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=wait_for_link:exited @@ -14,7 +16,9 @@ priority=7 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited \ No newline at end of file diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh index 256def59180..4889597dd70 100755 --- a/dockers/docker-orchagent/orchagent.sh +++ b/dockers/docker-orchagent/orchagent.sh @@ -63,7 +63,7 @@ elif [ "$platform" == "vs" ]; then ORCHAGENT_ARGS+="-m $MAC_ADDRESS" elif [ "$platform" == "mellanox" ]; then ORCHAGENT_ARGS+="" -elif [ "$platform" == "innovium" ]; then +elif [ "$platform" == "marvell-teralynx" ]; then ORCHAGENT_ARGS+="-m $MAC_ADDRESS" elif [ "$platform" == "nvidia-bluefield" ]; then ORCHAGENT_ARGS+="-m $MAC_ADDRESS" diff --git a/dockers/docker-orchagent/supervisord.conf.j2 b/dockers/docker-orchagent/supervisord.conf.j2 index 026958197fb..eee121f1c68 100644 --- a/dockers/docker-orchagent/supervisord.conf.j2 +++ b/dockers/docker-orchagent/supervisord.conf.j2 @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true {% set is_fabric_asic = 0 %} @@ -46,8 +48,10 @@ autostart=false autorestart=false startsecs=0 startretries=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running {% if ENABLE_ASAN == "y" %} @@ -61,8 +65,10 @@ command=/usr/bin/portsyncd priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running {% if ENABLE_ASAN == "y" %} @@ -76,8 +82,10 @@ priority=4 autostart=false autorestart=false stdout_capture_maxbytes=1MB -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for={{ orchagent_dependent_startup_wait_for }} {% if ENABLE_ASAN == "y" %} @@ -91,8 +99,10 @@ autostart=false autorestart=unexpected startretries=0 startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=orchagent:running {% if ENABLE_ASAN == "y" %} @@ -107,8 +117,10 @@ autostart=false autorestart=false startsecs=0 startretries=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited {%- endif %} @@ -121,8 +133,10 @@ autostart=false autorestart=false startretries=0 startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=orchagent:running {% if ENABLE_ASAN == "y" %} @@ -136,8 +150,10 @@ command=/usr/bin/neighsyncd priority=7 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited {% if ENABLE_ASAN == "y" %} @@ -151,8 +167,10 @@ command=/usr/bin/vlanmgrd priority=8 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited {% if ENABLE_ASAN == "y" %} @@ -166,8 +184,10 @@ command=/usr/bin/intfmgrd priority=9 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited {% if ENABLE_ASAN == "y" %} @@ -181,8 +201,10 @@ command=/usr/bin/portmgrd priority=10 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited {% if ENABLE_ASAN == "y" %} @@ -195,8 +217,10 @@ command=/usr/bin/fabricmgrd priority=10 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited {% if ENABLE_ASAN == "y" %} @@ -209,8 +233,10 @@ command=/usr/bin/buffermgrd.sh priority=11 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited {% if ENABLE_ASAN == "y" %} @@ -224,8 +250,10 @@ command=/usr/bin/vrfmgrd priority=13 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited {% if ENABLE_ASAN == "y" %} @@ -239,8 +267,10 @@ command=/usr/bin/nbrmgrd priority=15 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited {% if ENABLE_ASAN == "y" %} @@ -254,8 +284,10 @@ command=/usr/bin/vxlanmgrd priority=16 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited {% if ENABLE_ASAN == "y" %} @@ -269,8 +301,10 @@ command=/usr/bin/tunnelmgrd priority=17 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited {% if ENABLE_ASAN == "y" %} @@ -283,8 +317,10 @@ command=/usr/bin/enable_counters.py priority=12 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited @@ -294,8 +330,10 @@ command=/usr/bin/fdbsyncd priority=17 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited {% if ENABLE_ASAN == "y" %} diff --git a/dockers/docker-orchagent/tunnel_packet_handler.conf b/dockers/docker-orchagent/tunnel_packet_handler.conf index aa6f3d2f338..8bbe045cd23 100644 --- a/dockers/docker-orchagent/tunnel_packet_handler.conf +++ b/dockers/docker-orchagent/tunnel_packet_handler.conf @@ -3,7 +3,9 @@ command=/usr/bin/tunnel_packet_handler.py priority=12 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=swssconfig:exited diff --git a/dockers/docker-pde/supervisord.conf b/dockers/docker-pde/supervisord.conf index 58a32d83316..af61ee0cffd 100644 --- a/dockers/docker-pde/supervisord.conf +++ b/dockers/docker-pde/supervisord.conf @@ -8,5 +8,7 @@ command=/bin/bash -c "rm -f /var/run/rsyslogd.pid && /usr/sbin/rsyslogd -n" priority=1 autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true diff --git a/dockers/docker-pde/syncd_init_common.sh b/dockers/docker-pde/syncd_init_common.sh index 0212f842329..7a28d7208f0 100755 --- a/dockers/docker-pde/syncd_init_common.sh +++ b/dockers/docker-pde/syncd_init_common.sh @@ -207,11 +207,11 @@ config_syncd_vs() CMD_ARGS+=" -p $HWSKU_DIR/sai.profile" } -config_syncd_innovium() +config_syncd_marvell_teralynx() { CMD_ARGS+=" -p $HWSKU_DIR/sai.profile" ulimit -s 65536 - export II_ROOT="/var/log/invm" + export II_ROOT="/var/log/mrvl_teralynx" export II_APPEND_LOG=1 mkdir -p $II_ROOT } @@ -236,8 +236,8 @@ config_syncd() config_syncd_nephos elif [ "$SONIC_ASIC_TYPE" == "vs" ]; then config_syncd_vs - elif [ "$SONIC_ASIC_TYPE" == "innovium" ]; then - config_syncd_innovium + elif [ "$SONIC_ASIC_TYPE" == "marvell-teralynx" ]; then + config_syncd_marvell_teralynx else echo "Unknown ASIC type $SONIC_ASIC_TYPE" exit 1 diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2 index b357133f5b9..0dc97abaa20 100755 --- a/dockers/docker-platform-monitor/Dockerfile.j2 +++ b/dockers/docker-platform-monitor/Dockerfile.j2 @@ -29,6 +29,9 @@ RUN apt-get update && \ nvme-cli \ ethtool \ xxd +{% if sonic_asic_platform == 'mellanox' %} +RUN apt-get install -y dbus +{% endif %} # smartmontools version should match the installed smartmontools in sonic_debian_extension build template RUN apt-get install -y -t bookworm-backports \ diff --git a/dockers/docker-platform-monitor/delay.py b/dockers/docker-platform-monitor/delay.py new file mode 100644 index 00000000000..986412b2503 --- /dev/null +++ b/dockers/docker-platform-monitor/delay.py @@ -0,0 +1,7 @@ +#!/usr/bin/env python3 + +# This file serves as a monitor for advanced reboot. +# Once it exits, the delayed daemon will initiate. + +from swsscommon.swsscommon import RestartWaiter +RestartWaiter.waitAdvancedBootDone() diff --git a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 index b023a8f2b0e..89b23b5b1ee 100644 --- a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 +++ b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 @@ -24,18 +24,32 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true + +{% if delay_non_critical_daemon %} +[program:delay] +command=python3 /usr/bin/delay.py +autostart=false +autorestart=false +startsecs=0 +dependent_startup=true +{% endif %} + {% if not skip_chassisd and (IS_MODULAR_CHASSIS == 1 or is_smartswitch) %} [program:chassisd] command=/usr/local/bin/chassisd priority=3 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true startsecs=10 dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -47,8 +61,10 @@ command=/usr/local/bin/chassis_db_init priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true startsecs=0 dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -60,11 +76,13 @@ command=/usr/bin/lm-sensors.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true startsecs=0 dependent_startup=true -dependent_startup_wait_for=rsyslogd:running +dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %} {% endif %} {% if not skip_fancontrol and HAVE_FANCONTROL_CONF == 1 %} @@ -73,8 +91,10 @@ command=/usr/sbin/fancontrol priority=4 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true startsecs=10 dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -86,8 +106,10 @@ command={% if API_VERSION == 3 and 'ledd' not in python2_daemons %}python3 {% el priority=5 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true startsecs=10 dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -115,8 +137,10 @@ command={{ command }} priority=6 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true startsecs=10 dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -133,8 +157,10 @@ command=nice -n -20 python3 /usr/local/bin/ycabled priority=7 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true startsecs=10 dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -147,11 +173,13 @@ command={% if API_VERSION == 3 and 'psud' not in python2_daemons %}python3 {% el priority=8 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true startsecs=10 dependent_startup=true -dependent_startup_wait_for=rsyslogd:running +dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %} {% endif %} {% if not skip_syseepromd %} @@ -160,11 +188,13 @@ command={% if API_VERSION == 3 and 'syseepromd' not in python2_daemons %}python3 priority=9 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true startsecs=10 dependent_startup=true -dependent_startup_wait_for=rsyslogd:running +dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %} {% endif %} {% if not skip_thermalctld %} @@ -173,12 +203,14 @@ command={% if API_VERSION == 3 and 'thermalctld' not in python2_daemons %}python priority=10 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true startsecs=10 startretries=50 dependent_startup=true -dependent_startup_wait_for=rsyslogd:running +dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %} {% endif %} {% if not skip_pcied %} @@ -187,11 +219,13 @@ command=/usr/local/bin/pcied priority=11 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true startsecs=10 dependent_startup=true -dependent_startup_wait_for=rsyslogd:running +dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %} {% endif %} {% if include_sensormond %} @@ -200,11 +234,13 @@ command=/usr/local/bin/sensormond priority=10 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true startsecs=10 dependent_startup=true -dependent_startup_wait_for=rsyslogd:running +dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %} {% endif %} {% if not skip_stormond %} @@ -213,8 +249,10 @@ command=/usr/local/bin/stormond priority=10 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true startsecs=10 dependent_startup=true dependent_startup_wait_for=rsyslogd:running diff --git a/dockers/docker-platform-monitor/docker_init.j2 b/dockers/docker-platform-monitor/docker_init.j2 index ebef713e27f..c8e2943e668 100755 --- a/dockers/docker-platform-monitor/docker_init.j2 +++ b/dockers/docker-platform-monitor/docker_init.j2 @@ -128,8 +128,4 @@ else sonic-cfggen -d -a "$confvar" -t $SUPERVISOR_CONF_TEMPLATE > $SUPERVISOR_CONF_FILE fi -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime - exec /usr/local/bin/supervisord diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2 index 5148dd1125f..8dbc1a2ce89 100644 --- a/dockers/docker-ptf/Dockerfile.j2 +++ b/dockers/docker-ptf/Dockerfile.j2 @@ -52,6 +52,11 @@ RUN apt-get update \ libboost-atomic1.71.0 \ {% else %} libboost-atomic1.74.0 \ + flex \ + bison \ + tcpd \ + libwrap0 \ + libwrap0-dev \ {% endif %} less \ git \ @@ -73,8 +78,6 @@ RUN apt-get update \ python3-scapy \ python3-six \ libpcap-dev \ -# TODO check if tacacs+ is required by tests -# tacacs+ has been dropped from bullseye {% if PTF_ENV_PY_VER == "mixed" %} tacacs+ \ {% endif %} @@ -168,6 +171,16 @@ RUN rm -rf /debs \ && cd /opt \ && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py +{% if PTF_ENV_PY_VER == "py3" %} +RUN git clone https://github.com/facebook/tac_plus \ + && cd tac_plus \ + && cd tacacs-F4.0.4.28 \ + && ./configure \ + && make install \ + && ln -s /usr/local/sbin/tac_plus /usr/sbin/tac_plus \ + && ln -s /usr/local/bin/tac_pwd /usr/sbin/tac_pwd +{% endif %} + {% if PTF_ENV_PY_VER == "mixed" %} RUN python3 -m venv --system-site-packages env-python3 # Activating a virtualenv. The virtualenv automatically works for RUN, ENV and CMD. diff --git a/dockers/docker-router-advertiser/docker-init.sh b/dockers/docker-router-advertiser/docker-init.sh index 02c5a8c72be..6e1bb5545f8 100755 --- a/dockers/docker-router-advertiser/docker-init.sh +++ b/dockers/docker-router-advertiser/docker-init.sh @@ -14,8 +14,4 @@ sonic-cfggen $CFGGEN_PARAMS chmod +x /usr/bin/wait_for_link.sh -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime - exec /usr/local/bin/supervisord diff --git a/dockers/docker-router-advertiser/docker-router-advertiser.supervisord.conf.j2 b/dockers/docker-router-advertiser/docker-router-advertiser.supervisord.conf.j2 index 22f33e41219..0ab038039a9 100644 --- a/dockers/docker-router-advertiser/docker-router-advertiser.supervisord.conf.j2 +++ b/dockers/docker-router-advertiser/docker-router-advertiser.supervisord.conf.j2 @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=1 autostart=true autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -65,8 +69,10 @@ priority=3 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -75,8 +81,10 @@ command=/usr/sbin/radvd -n priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=wait_for_link:exited {% endif -%} diff --git a/dockers/docker-sflow/Dockerfile.j2 b/dockers/docker-sflow/Dockerfile.j2 index a5eebf3a095..75ad9169cec 100644 --- a/dockers/docker-sflow/Dockerfile.j2 +++ b/dockers/docker-sflow/Dockerfile.j2 @@ -26,7 +26,6 @@ RUN apt-get clean -y && \ RUN sed -ri '/^DAEMON_ARGS=""/c DAEMON_ARGS="-c /var/log/hsflowd.crash"' /etc/init.d/hsflowd -COPY ["start.sh", "/usr/bin/"] COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] COPY ["critical_processes", "/etc/supervisor"] diff --git a/dockers/docker-sflow/port_index_mapper.py b/dockers/docker-sflow/port_index_mapper.py index e232d0e3830..e48ebbf9312 100755 --- a/dockers/docker-sflow/port_index_mapper.py +++ b/dockers/docker-sflow/port_index_mapper.py @@ -24,7 +24,7 @@ def __init__(self): swsscommon.STATE_VLAN_TABLE_NAME] self.appl_db = swsscommon.DBConnector("STATE_DB", REDIS_TIMEOUT_MS, - True) + False) self.state_db = swsscommon.SonicV2Connector(host='127.0.0.1', decode_responses=True) self.state_db.connect(self.state_db.STATE_DB, False) diff --git a/dockers/docker-sflow/start.sh b/dockers/docker-sflow/start.sh deleted file mode 100644 index 8996769c4c5..00000000000 --- a/dockers/docker-sflow/start.sh +++ /dev/null @@ -1,5 +0,0 @@ -#!/usr/bin/env bash - -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime diff --git a/dockers/docker-sflow/supervisord.conf b/dockers/docker-sflow/supervisord.conf index d6cd5092e53..a70d325590f 100644 --- a/dockers/docker-sflow/supervisord.conf +++ b/dockers/docker-sflow/supervisord.conf @@ -24,28 +24,21 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true -[program:start] -command=/usr/bin/start.sh -priority=2 -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog -dependent_startup=true -dependent_startup_wait_for=rsyslogd:running - [program:sflowmgrd] command=/usr/bin/sflowmgrd priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -54,7 +47,9 @@ command=/usr/bin/port_index_mapper.py priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running diff --git a/dockers/docker-snmp/Dockerfile.j2 b/dockers/docker-snmp/Dockerfile.j2 index 174f1ae4415..d073e20ef91 100644 --- a/dockers/docker-snmp/Dockerfile.j2 +++ b/dockers/docker-snmp/Dockerfile.j2 @@ -66,9 +66,9 @@ RUN apt-get -y purge \ find / | grep -E "__pycache__" | xargs rm -rf && \ rm -rf /debs /python-wheels ~/.cache +COPY ["docker-snmp-init.sh", "/usr/bin/"] COPY ["start.sh", "/usr/bin/"] COPY ["snmp_yml_to_configdb.py", "/usr/bin/"] -COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] COPY ["*.j2", "/usr/share/sonic/templates/"] COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] COPY ["critical_processes", "/etc/supervisor"] @@ -76,4 +76,5 @@ COPY ["critical_processes", "/etc/supervisor"] # Although exposing ports is not needed for host net mode, keep it for possible bridge mode EXPOSE 161/udp 162/udp -ENTRYPOINT ["/usr/local/bin/supervisord"] +RUN chmod +x /usr/bin/docker-snmp-init.sh +ENTRYPOINT ["/usr/bin/docker-snmp-init.sh"] diff --git a/dockers/docker-snmp/docker-snmp-init.sh b/dockers/docker-snmp/docker-snmp-init.sh new file mode 100644 index 00000000000..135ff48255d --- /dev/null +++ b/dockers/docker-snmp/docker-snmp-init.sh @@ -0,0 +1,5 @@ +#!/usr/bin/env bash +#Generate supervisord.conf based on device metadata +mkdir -p /etc/supervisor/conf.d/ +sonic-cfggen -d -t /usr/share/sonic/templates/supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf +exec /usr/local/bin/supervisord diff --git a/dockers/docker-snmp/snmpd.conf.j2 b/dockers/docker-snmp/snmpd.conf.j2 index b6dd826007a..796b041c9cf 100644 --- a/dockers/docker-snmp/snmpd.conf.j2 +++ b/dockers/docker-snmp/snmpd.conf.j2 @@ -194,6 +194,9 @@ trapsink {{ v3SnmpTrapIp }}:{{ v3SnmpTrapPort }}{% if v3SnmpTrapVrf != 'None' %} # # Run as an AgentX master agent master agentx +agentXTimeout 5 +agentXRetries 4 + # internal socket to allow extension to other docker containers # Currently the other container using this is docker-fpm-frr # make sure this line matches bgp:/etc/snmp/frr.conf diff --git a/dockers/docker-snmp/start.sh b/dockers/docker-snmp/start.sh index 6de6f740b0a..aefd0bfc3db 100755 --- a/dockers/docker-snmp/start.sh +++ b/dockers/docker-snmp/start.sh @@ -27,7 +27,3 @@ sonic-cfggen $SONIC_CFGGEN_ARGS mkdir -p /var/sonic echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status - -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime diff --git a/dockers/docker-snmp/supervisord.conf b/dockers/docker-snmp/supervisord.conf.j2 similarity index 89% rename from dockers/docker-snmp/supervisord.conf rename to dockers/docker-snmp/supervisord.conf.j2 index 1f01a7c21e4..bebc409564b 100644 --- a/dockers/docker-snmp/supervisord.conf +++ b/dockers/docker-snmp/supervisord.conf.j2 @@ -50,7 +50,11 @@ dependent_startup=true dependent_startup_wait_for=start:exited [program:snmp-subagent] +{% if DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %} +command=/usr/bin/env python3 -m sonic_ax_impl --enable_dynamic_frequency +{% else %} command=/usr/bin/env python3 -m sonic_ax_impl +{% endif %} priority=4 autostart=false autorestart=false diff --git a/dockers/docker-sonic-bmp/Dockerfile.j2 b/dockers/docker-sonic-bmp/Dockerfile.j2 new file mode 100755 index 00000000000..2e79001dbf9 --- /dev/null +++ b/dockers/docker-sonic-bmp/Dockerfile.j2 @@ -0,0 +1,50 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} + +ARG docker_container_name +ARG image_version + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +# Pass the image_version to container +ENV IMAGE_VERSION=$image_version + +RUN apt-get update + +{% if docker_sonic_bmp_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_sonic_bmp_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_sonic_bmp_debs.split(' ')) }} +{%- endif %} + +{% if docker_sonic_bmp_whls.strip() %} +# Copy locally-built Python wheel dependencies +{{ copy_files("python-wheels/", docker_sonic_bmp_whls.split(' '), "/python-wheels/") }} + +# Install locally-built Python wheel dependencies +{{ install_python_wheels(docker_sonic_bmp_whls.split(' ')) }} +{% endif %} + +RUN apt-get clean -y && \ + apt-get autoclean - && \ + apt-get autoremove -y && \ + rm -rf /debs && \ + mkdir -p /etc/bmp + +COPY ["bmp.sh", "/usr/bin/"] +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] +COPY ["critical_processes", "/etc/supervisor/"] + +RUN chmod +x /usr/bin/bmp.sh +RUN touch /var/log/openbmpd.log + +RUN apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs + +ENTRYPOINT ["/usr/local/bin/supervisord"] \ No newline at end of file diff --git a/dockers/docker-sonic-bmp/base_image_files/monit_bmp b/dockers/docker-sonic-bmp/base_image_files/monit_bmp new file mode 100644 index 00000000000..353a716455d --- /dev/null +++ b/dockers/docker-sonic-bmp/base_image_files/monit_bmp @@ -0,0 +1,5 @@ +############################################################################### +## Monit configuration for bmp container +############################################################################### +check program container_memory_bmp with path "/usr/bin/memory_checker bmp 419430400" + if status == 3 for 10 times within 20 cycles then exec "/usr/bin/docker exec bmp supervisorctl restart openbmpd" diff --git a/dockers/docker-sonic-bmp/bmp.sh b/dockers/docker-sonic-bmp/bmp.sh new file mode 100644 index 00000000000..eb3d186fb54 --- /dev/null +++ b/dockers/docker-sonic-bmp/bmp.sh @@ -0,0 +1,13 @@ +#!/usr/bin/env bash + + +if [ "${RUNTIME_OWNER}" == "" ]; then + RUNTIME_OWNER="kube" +fi + +CTR_SCRIPT="/usr/share/sonic/scripts/container_startup.py" +if test -f ${CTR_SCRIPT} +then + ${CTR_SCRIPT} -f bmp -o ${RUNTIME_OWNER} -v ${IMAGE_VERSION} +fi + diff --git a/dockers/docker-sonic-bmp/critical_processes b/dockers/docker-sonic-bmp/critical_processes new file mode 100644 index 00000000000..10621f0de87 --- /dev/null +++ b/dockers/docker-sonic-bmp/critical_processes @@ -0,0 +1,3 @@ +group:sonic-bmp +program:openbmpd +program:bmpcfgd \ No newline at end of file diff --git a/dockers/docker-sonic-bmp/supervisord.conf b/dockers/docker-sonic-bmp/supervisord.conf new file mode 100644 index 00000000000..ed4731abc02 --- /dev/null +++ b/dockers/docker-sonic-bmp/supervisord.conf @@ -0,0 +1,69 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:dependent-startup] +command=python3 -m supervisord_dependent_startup +autostart=true +autorestart=unexpected +startretries=0 +exitcodes=0,3 +events=PROCESS_STATE +buffer_size=1024 + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener --container-name bmp +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +autostart=true +autorestart=unexpected +buffer_size=1024 + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n -iNONE +priority=1 +autostart=false +autorestart=true +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true + +[program:bmp] +command=/usr/bin/bmp.sh +priority=2 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=rsyslogd:running + +[group:sonic-bmp] +programs=openbmpd,bmpcfgd + +[program:bmpcfgd] +command=python3 /usr/local/bin/bmpcfgd +priority=3 +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true + +[program:openbmpd] +command=/usr/bin/openbmpd -f -l /var/log/openbmpd.log -c /etc/bmp/openbmpd.conf +priority=3 +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true diff --git a/dockers/docker-sonic-gnmi/gnmi-native.sh b/dockers/docker-sonic-gnmi/gnmi-native.sh index 1756ea1dba5..8dae895d89d 100755 --- a/dockers/docker-sonic-gnmi/gnmi-native.sh +++ b/dockers/docker-sonic-gnmi/gnmi-native.sh @@ -76,6 +76,18 @@ else TELEMETRY_ARGS+=" -v=2" fi +if [ -nz "$GNMI" ]; then + ENABLE_CRL=$(echo $GNMI | jq -r '.enable_crl') + if [ $ENABLE_CRL == "true" ]; then + TELEMETRY_ARGS+=" --enable_crl" + fi + + CRL_EXPIRE_DURATION=$(echo $GNMI | jq -r '.crl_expire_duration') + if [ -n $CRL_EXPIRE_DURATION ]; then + TELEMETRY_ARGS+=" --crl_expire_duration $CRL_EXPIRE_DURATION" + fi +fi + # Enable ZMQ for SmartSwitch LOCALHOST_SUBTYPE=`sonic-db-cli CONFIG_DB hget "DEVICE_METADATA|localhost" "subtype"` if [[ x"${LOCALHOST_SUBTYPE}" == x"SmartSwitch" ]]; then diff --git a/dockers/docker-sonic-gnmi/start.sh b/dockers/docker-sonic-gnmi/start.sh index c3a928a6f80..2401f3c3d7c 100755 --- a/dockers/docker-sonic-gnmi/start.sh +++ b/dockers/docker-sonic-gnmi/start.sh @@ -12,7 +12,3 @@ fi mkdir -p /var/sonic echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status - -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime diff --git a/dockers/docker-sonic-gnmi/supervisord.conf b/dockers/docker-sonic-gnmi/supervisord.conf index b70e6c868de..698b0465e09 100644 --- a/dockers/docker-sonic-gnmi/supervisord.conf +++ b/dockers/docker-sonic-gnmi/supervisord.conf @@ -16,7 +16,7 @@ buffer_size=1024 command=/usr/bin/supervisor-proc-exit-listener --container-name gnmi events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING autostart=true -autorestart=false +autorestart=unexpected buffer_size=1024 [program:rsyslogd] @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=true -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -44,8 +48,10 @@ command=/usr/bin/gnmi-native.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -54,7 +60,9 @@ command=/usr/bin/dialout.sh priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=gnmi-native:running diff --git a/dockers/docker-sonic-mgmt-framework/start.sh b/dockers/docker-sonic-mgmt-framework/start.sh index 2fefbb349cb..d6722a27fc7 100755 --- a/dockers/docker-sonic-mgmt-framework/start.sh +++ b/dockers/docker-sonic-mgmt-framework/start.sh @@ -2,7 +2,3 @@ mkdir -p /var/sonic echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status - -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime diff --git a/dockers/docker-sonic-mgmt-framework/supervisord.conf b/dockers/docker-sonic-mgmt-framework/supervisord.conf index 1fcf2a58099..37f3f1945a8 100644 --- a/dockers/docker-sonic-mgmt-framework/supervisord.conf +++ b/dockers/docker-sonic-mgmt-framework/supervisord.conf @@ -17,8 +17,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -27,8 +29,10 @@ priority=2 autostart=true autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -37,7 +41,9 @@ command=/usr/bin/rest-server.sh priority=3 autostart=false autorestart=true -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/dockers/docker-sonic-mgmt/0002-extend-dataplane-poll-method-to-support-multi-ptf-nn.patch b/dockers/docker-sonic-mgmt/0002-extend-dataplane-poll-method-to-support-multi-ptf-nn.patch new file mode 100644 index 00000000000..9d8f3f671e2 --- /dev/null +++ b/dockers/docker-sonic-mgmt/0002-extend-dataplane-poll-method-to-support-multi-ptf-nn.patch @@ -0,0 +1,77 @@ +From 688c4d11a00269beaf22eb6f2cccba410bfb2856 Mon Sep 17 00:00:00 2001 +From: wenda +Date: Fri, 6 Dec 2024 07:25:30 +0000 +Subject: [PATCH] extend dataplane poll method to support multi ptf nn agents + connections + +--- + src/ptf/dataplane.py | 31 ++++++++++++++++++++----------- + 1 file changed, 20 insertions(+), 11 deletions(-) + +diff --git a/src/ptf/dataplane.py b/src/ptf/dataplane.py +index a1c1b3f..009ac2f 100644 +--- a/src/ptf/dataplane.py ++++ b/src/ptf/dataplane.py +@@ -738,40 +738,49 @@ class DataPlane(Thread): + ) + return bytes + +- def oldest_port_number(self, device): ++ def get_oldest_tuple(self, device): + """ +- Returns the port number with the oldest packet, ++ Returns the device number and port number with the oldest packet, + or None if no packets are queued. ++ When device is specified, only returns the oldest packet from that device. + """ +- min_port_number = None ++ min_device_number, min_port_number = None, None + min_time = float("inf") + for port_id, queue in list(self.packet_queues.items()): +- if port_id[0] != device: ++ if device and port_id[0] != device: + continue + if queue and queue[0][1] < min_time: + min_time = queue[0][1] ++ min_device_number = port_id[0] + min_port_number = port_id[1] +- return min_port_number ++ return min_device_number, min_port_number + + # Dequeues and yields packets in the order they were received. + # Yields (port, packet, received time). + # If port is not specified yields packets from all ports. ++ # If port and device are both not specified yields packets from all devices and all ports + def packets(self, device, port=None): + while True: +- if port is None: +- rcv_port = self.oldest_port_number(device) +- else: +- rcv_port = port ++ rcv_device, rcv_port = device, port ++ if device is None and port is None: ++ rcv_device, rcv_port = self.get_oldest_tuple(None) ++ elif port is None: ++ _, rcv_port = self.get_oldest_tuple(device) ++ elif device is None: ++ self.logger.error( ++ "ambiguous tuple given. device is None, while port is %s" % (port) ++ ) ++ break + + if rcv_port == None: + self.logger.debug("Out of packets on all ports") + break + +- queue = self.packet_queues[(device, rcv_port)] ++ queue = self.packet_queues[(rcv_device, rcv_port)] + + if len(queue) == 0: + self.logger.debug( +- "Out of packets on device %d, port %d", device, rcv_port ++ "Out of packets on device %d, port %d", rcv_device, rcv_port + ) + break + +-- +2.47.0 \ No newline at end of file diff --git a/dockers/docker-sonic-mgmt/Dockerfile.j2 b/dockers/docker-sonic-mgmt/Dockerfile.j2 index e5cbf9b1f3b..64badcb8eb8 100755 --- a/dockers/docker-sonic-mgmt/Dockerfile.j2 +++ b/dockers/docker-sonic-mgmt/Dockerfile.j2 @@ -92,6 +92,7 @@ RUN python3 -m pip install aiohttp \ pytest-xdist==1.28.0 \ python-dateutil \ pytest==7.4.0 \ + pytest-stress \ PyYAML \ redis \ requests \ @@ -175,6 +176,7 @@ RUN python2 -m pip install allure-pytest==2.8.22 \ pytest-repeat \ pytest-html \ pytest-xdist==1.28.0 \ + pytest-stress \ python-dateutil \ PyYAML \ redis \ @@ -269,11 +271,13 @@ USER root WORKDIR /azp COPY start.sh \ 0001-Fix-getattr-AttributeError-in-multi-thread-scenario.patch \ + 0002-extend-dataplane-poll-method-to-support-multi-ptf-nn.patch \ ./ RUN chmod +x start.sh \ && ln -sf /usr/bin/python3 /usr/bin/python \ && ln -sf `which pip3` /usr/bin/pip \ && ln -sf `which pip3` /usr/local/sbin/pip \ + && patch -u -b /usr/local/lib/python3.8/dist-packages/ptf/dataplane.py -i /azp/0002-extend-dataplane-poll-method-to-support-multi-ptf-nn.patch \ && patch -u -b /usr/local/lib/python3.8/dist-packages/ansible/plugins/loader.py -i /azp/0001-Fix-getattr-AttributeError-in-multi-thread-scenario.patch USER $user diff --git a/dockers/docker-sonic-p4rt/start.sh b/dockers/docker-sonic-p4rt/start.sh index 2fefbb349cb..d64f9d1dbc8 100755 --- a/dockers/docker-sonic-p4rt/start.sh +++ b/dockers/docker-sonic-p4rt/start.sh @@ -3,6 +3,3 @@ mkdir -p /var/sonic echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime diff --git a/dockers/docker-sonic-p4rt/supervisord.conf b/dockers/docker-sonic-p4rt/supervisord.conf index f9383e2adf9..aa12d395a25 100644 --- a/dockers/docker-sonic-p4rt/supervisord.conf +++ b/dockers/docker-sonic-p4rt/supervisord.conf @@ -23,8 +23,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -33,8 +35,10 @@ priority=2 autostart=true autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -43,7 +47,9 @@ command=/usr/bin/p4rt.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/dockers/docker-sonic-restapi/supervisord.conf b/dockers/docker-sonic-restapi/supervisord.conf index c95b4b6b92d..a6b9a61b19a 100644 --- a/dockers/docker-sonic-restapi/supervisord.conf +++ b/dockers/docker-sonic-restapi/supervisord.conf @@ -16,7 +16,7 @@ buffer_size=1024 command=/usr/bin/supervisor-proc-exit-listener --container-name restapi events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING autostart=true -autorestart=false +autorestart=unexpected buffer_size=1024 [program:rsyslogd] @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=true -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -44,8 +48,10 @@ command=/usr/bin/restapi.sh priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/dockers/docker-sonic-telemetry/start.sh b/dockers/docker-sonic-telemetry/start.sh index 8d36f740fa3..08f7292f55b 100755 --- a/dockers/docker-sonic-telemetry/start.sh +++ b/dockers/docker-sonic-telemetry/start.sh @@ -12,7 +12,3 @@ fi mkdir -p /var/sonic echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status - -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime diff --git a/dockers/docker-sonic-telemetry/supervisord.conf b/dockers/docker-sonic-telemetry/supervisord.conf index 5ab0e3ca59d..25f024834f3 100644 --- a/dockers/docker-sonic-telemetry/supervisord.conf +++ b/dockers/docker-sonic-telemetry/supervisord.conf @@ -16,7 +16,7 @@ buffer_size=1024 command=/usr/bin/supervisor-proc-exit-listener --container-name telemetry events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING autostart=true -autorestart=false +autorestart=unexpected buffer_size=1024 [program:rsyslogd] @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=true -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -44,8 +48,10 @@ command=/usr/bin/telemetry.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -54,7 +60,9 @@ command=/usr/bin/dialout.sh priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=telemetry:running diff --git a/dockers/docker-sonic-telemetry/telemetry.sh b/dockers/docker-sonic-telemetry/telemetry.sh index d1c9216d419..2428922b57f 100755 --- a/dockers/docker-sonic-telemetry/telemetry.sh +++ b/dockers/docker-sonic-telemetry/telemetry.sh @@ -17,6 +17,9 @@ X509=$(echo $TELEMETRY_VARS | jq -r '.x509') GNMI=$(echo $TELEMETRY_VARS | jq -r '.gnmi') CERTS=$(echo $TELEMETRY_VARS | jq -r '.certs') +export GRPC_GO_LOG_VERBOSITY_LEVEL=99 +export GRPC_GO_LOG_SEVERITY_LEVEL=info + TELEMETRY_ARGS=" -logtostderr" export CVL_SCHEMA_PATH=/usr/sbin/schema export GOTRACEBACK=crash @@ -74,6 +77,18 @@ else TELEMETRY_ARGS+=" -v=2" fi +if [ -nz "$GNMI" ]; then + ENABLE_CRL=$(echo $GNMI | jq -r '.enable_crl') + if [ $ENABLE_CRL == "true" ]; then + TELEMETRY_ARGS+=" --enable_crl" + fi + + CRL_EXPIRE_DURATION=$(echo $GNMI | jq -r '.crl_expire_duration') + if [ -n $CRL_EXPIRE_DURATION ]; then + TELEMETRY_ARGS+=" --crl_expire_duration $CRL_EXPIRE_DURATION" + fi +fi + # gNMI save-on-set behavior is disabled by default. # Save-on-set can be turned on by setting the "TELEMETRY|gnmi|save_on_set" # to "true". diff --git a/dockers/docker-teamd/start.sh b/dockers/docker-teamd/start.sh index 0b45239355e..d67bc4e925c 100755 --- a/dockers/docker-teamd/start.sh +++ b/dockers/docker-teamd/start.sh @@ -3,7 +3,3 @@ rm -f /var/run/teamd/* mkdir -p /var/warmboot/teamd - -TZ=$(cat /etc/timezone) -rm -rf /etc/localtime -ln -sf /usr/share/zoneinfo/$TZ /etc/localtime diff --git a/dockers/docker-teamd/supervisord.conf b/dockers/docker-teamd/supervisord.conf index db6a8cfb9a5..731c825b6a8 100644 --- a/dockers/docker-teamd/supervisord.conf +++ b/dockers/docker-teamd/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=true autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -45,8 +49,10 @@ priority=3 autostart=false autorestart=false stopwaitsecs=60 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -56,8 +62,10 @@ priority=4 startsecs=5 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=teammgrd:running @@ -66,8 +74,10 @@ command=/usr/bin/tlm_teamd priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/files/Aboot/boot0.j2 b/files/Aboot/boot0.j2 index 439debc7485..fc062cba1ed 100644 --- a/files/Aboot/boot0.j2 +++ b/files/Aboot/boot0.j2 @@ -670,7 +670,7 @@ write_platform_specific_cmdline() { if in_array "$platform" "prairieisland"; then read_system_eeprom fi - if in_array "$platform" "shearwater"; then + if in_array "$platform" "shearwater" "redstart"; then cmdline_add modprobe.blacklist=snd_hda_intel,hdaudio if [ -f /tmp/.switch-prefdl ]; then read_switch_eeprom @@ -678,6 +678,9 @@ write_platform_specific_cmdline() { read_system_eeprom fi fi + if in_array "$sid" "Moby" "RedstartFixed8CNMoby"; then + aboot_machine=arista_7060x6_16pe_384c + fi if [ $varlog_size -eq 0 ]; then if [ $flash_size -ge 28000 ]; then diff --git a/files/build_templates/bmp.service.j2 b/files/build_templates/bmp.service.j2 new file mode 100644 index 00000000000..72ab295d04d --- /dev/null +++ b/files/build_templates/bmp.service.j2 @@ -0,0 +1,16 @@ +[Unit] +Description=BMP container +Requires=database.service +After=database.service +Before=ntp-config.service +BindsTo=sonic.target +After=sonic.target +StartLimitIntervalSec=1200 +StartLimitBurst=3 + +[Service] +User={{ sonicadmin_user }} +ExecStartPre=/usr/local/bin/{{docker_container_name}}.sh start +ExecStart=/usr/local/bin/{{docker_container_name}}.sh wait +ExecStop=/usr/local/bin/{{docker_container_name}}.sh stop +RestartSec=30 diff --git a/files/build_templates/buffers_config.j2 b/files/build_templates/buffers_config.j2 index 9787bec1bd6..f1247eba992 100644 --- a/files/build_templates/buffers_config.j2 +++ b/files/build_templates/buffers_config.j2 @@ -115,6 +115,7 @@ def {%- set PORT_BP = [] %} {%- set PORT_DPC = [] %} {%- set SYSTEM_PORT_ALL = [] %} +{%- set PORT_QOS_BYPASS = [] %} {%- if voq_chassis %} {%- for system_port in SYSTEM_PORT %} @@ -144,6 +145,9 @@ def {%- if defs.generate_bp_port_list is defined %} {%- if defs.generate_bp_port_list(PORT,PORT_BP) %} {% endif %} {%- endif %} + {%- if defs.generate_qos_bypass_port_list is defined %} + {%- if defs.generate_qos_bypass_port_list(PORT_QOS_BYPASS) %} {% endif %} + {%- endif %} {%- endif %} {%- set PORT_ACTIVE = [] %} @@ -166,6 +170,7 @@ def {%- endif %} {%- endfor %} {%- endif %} +{%- set PORT_ACTIVE = PORT_ACTIVE | reject('in', PORT_QOS_BYPASS) | list %} {%- set port_names_list_active = [] %} {%- for port in PORT_ACTIVE %} @@ -302,7 +307,7 @@ def "LOSSLESS_TRAFFIC_PATTERN": { "AZURE": { "mtu": "1024", - "small_packet_percentage": "100" + "small_packet_percentage": "50" } } {% endif %} diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2 index 67add27cea5..b4204ce3f31 100644 --- a/files/build_templates/docker_image_ctl.j2 +++ b/files/build_templates/docker_image_ctl.j2 @@ -73,6 +73,9 @@ function getBootType() *SONIC_BOOT_TYPE=fastfast*) TYPE='fastfast' ;; + *SONIC_BOOT_TYPE=express*) + TYPE='express' + ;; *SONIC_BOOT_TYPE=fast*|*fast-reboot*) TYPE='fast' ;; @@ -87,7 +90,7 @@ function preStartAction() {%- if docker_container_name == "database" %} WARM_DIR=/host/warmboot if [ "$DATABASE_TYPE" != "chassisdb" ]; then - if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast" || "$BOOT_TYPE" == "fast") && -f $WARM_DIR/dump.rdb ]]; then + if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast" || "$BOOT_TYPE" == "express" || "$BOOT_TYPE" == "fast") && -f $WARM_DIR/dump.rdb ]]; then # Load redis content from /host/warmboot/dump.rdb docker cp $WARM_DIR/dump.rdb database$DEV:/var/lib/redis/dump.rdb else @@ -121,6 +124,12 @@ function setPlatformLagIdBoundaries() { docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB SET "SYSTEM_LAG_ID_START" "$lag_id_start" docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB SET "SYSTEM_LAG_ID_END" "$lag_id_end" + docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB EVAL " + local start_id = tonumber(ARGV[1]) + local end_id = tonumber(ARGV[2]) + for id = start_id,end_id do + redis.call('rpush','SYSTEM_LAG_IDS_FREE_LIST', tostring(id)) + end" 0 $lag_id_start $lag_id_end } function waitForAllInstanceDatabaseConfigJsonFilesReady() { @@ -229,7 +238,7 @@ function postStartAction() sleep 1; done - if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast" || "$BOOT_TYPE" == "fast") && -f $WARM_DIR/dump.rdb ]]; then + if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast" || "$BOOT_TYPE" == "express" || "$BOOT_TYPE" == "fast") && -f $WARM_DIR/dump.rdb ]]; then # retain the dump file from last boot for debugging purposes mv $WARM_DIR/dump.rdb $WARM_DIR/dump.rdb.old else @@ -286,6 +295,8 @@ function postStartAction() fi # Add redis UDS to the redis group and give read/write access to the group + REDIS_BMP_SOCK="/var/run/redis/redis_bmp.sock" + chgrp -f redis $REDIS_BMP_SOCK && chmod -f 0760 $REDIS_BMP_SOCK REDIS_SOCK="/var/run/redis${DEV}/redis.sock" else until [[ ($(docker exec -i ${DOCKERNAME} pgrep -x -c supervisord) -gt 0) && @@ -297,9 +308,7 @@ function postStartAction() fi REDIS_SOCK="/var/run/redis-chassis/redis_chassis.sock" fi - REDIS_BMP_SOCK="/var/run/redis/redis_bmp.sock" chgrp -f redis $REDIS_SOCK && chmod -f 0760 $REDIS_SOCK - chgrp -f redis $REDIS_BMP_SOCK && chmod -f 0760 $REDIS_BMP_SOCK {%- elif docker_container_name == "swss" %} # Wait until swss container state is Running until [[ ($(docker inspect -f {{"'{{.State.Running}}'"}} swss$DEV) == "true") ]]; do @@ -330,11 +339,6 @@ function postStartAction() docker cp $PSENSOR pmon:/usr/bin/ fi fi -{%- elif docker_container_name == "eventd" %} - export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state') - j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json > /etc/rsyslog.d/host_events.conf - j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/syncd_events_info.json > /etc/rsyslog.d/syncd_events.conf - systemctl restart rsyslog {%- else %} : # nothing {%- endif %} @@ -368,18 +372,6 @@ start() { source $PLATFORM_ENV_CONF fi - # Parse the platform.json file to get the platform specific information - PLATFORM_JSON=/usr/share/sonic/device/$PLATFORM/platform.json - if [ -f "$PLATFORM_JSON" ]; then - NUM_DPU=$(jq -r '.DPUS | length' $PLATFORM_JSON 2>/dev/null) - jq -e '.DPU' $PLATFORM_JSON >/dev/null - if [[ $? -eq 0 ]]; then - IS_DPU_DEVICE="true" - else - IS_DPU_DEVICE="false" - fi - fi - {%- if sonic_asic_platform == "broadcom" %} {%- if docker_container_name == "syncd" %} # Set the SYNCD_SHM_SIZE if this variable not defined @@ -438,38 +430,37 @@ start() { if [ -f "$CREATE_ONLY_CONFIG_DB_BUFFERS_JSON" ]; then $SONIC_DB_CLI CONFIG_DB HSET 'DEVICE_METADATA|localhost' create_only_config_db_buffers true fi + SUPPORTING_BULK_COUNTER_GROUPS="$HWSKU_FOLDER/supporting_bulk_counter_groups" + if [ -f "$SUPPORTING_BULK_COUNTER_GROUPS" ]; then + $SONIC_DB_CLI CONFIG_DB HSET 'DEVICE_METADATA|localhost' supporting_bulk_counter_groups@ $(cat $SUPPORTING_BULK_COUNTER_GROUPS) + fi fi {%- endif %} DOCKERCHECK=`docker inspect --type container ${DOCKERNAME} 2>/dev/null` if [ "$?" -eq "0" ]; then - {%- if docker_container_name == "database" and sonic_asic_platform == "vs" %} - echo "Removing existing ${DOCKERNAME} container" - docker rm -f ${DOCKERNAME} + {%- if docker_container_name == "database" %} + DOCKERMOUNT="" {%- else %} + DOCKERMOUNT=`getMountPoint "$DOCKERCHECK"` + {%- endif %} + if [ x"$DOCKERMOUNT" == x"$MOUNTPATH" ]; then + CONTAINER_EXISTS="yes" + preStartAction {%- if docker_container_name == "database" %} - DOCKERMOUNT="" + echo "Starting existing ${DOCKERNAME} container" + docker start ${DOCKERNAME} {%- else %} - DOCKERMOUNT=`getMountPoint "$DOCKERCHECK"` + echo "Starting existing ${DOCKERNAME} container with HWSKU $HWSKU" + /usr/local/bin/container start ${DOCKERNAME} {%- endif %} - if [ x"$DOCKERMOUNT" == x"$MOUNTPATH" ]; then - CONTAINER_EXISTS="yes" - preStartAction - {%- if docker_container_name == "database" %} - echo "Starting existing ${DOCKERNAME} container" - docker start ${DOCKERNAME} - {%- else %} - echo "Starting existing ${DOCKERNAME} container with HWSKU $HWSKU" - /usr/local/bin/container start ${DOCKERNAME} - {%- endif %} - postStartAction - exit $? - fi + postStartAction + exit $? + fi - # docker created with a different HWSKU, remove and recreate - echo "Removing obsolete ${DOCKERNAME} container with HWSKU $DOCKERMOUNT" - docker rm -f ${DOCKERNAME} - {%- endif %} + # docker created with a different HWSKU, remove and recreate + echo "Removing obsolete ${DOCKERNAME} container with HWSKU $DOCKERMOUNT" + docker rm -f ${DOCKERNAME} fi {%- if docker_container_name == "database" %} @@ -618,6 +609,13 @@ start() { {%- if sonic_asic_platform == "mellanox" %} # TODO: Mellanox will remove the --tmpfs exception after SDK socket path changed in new SDK version +{%- if docker_container_name == "pmon" %} + if [[ $NUM_DPU -gt 0 ]]; then + SMARTSWITCH_MNT= " -v /var/run/dbus/system_bus_socket:/var/run/dbus/system_bus_socket" + else + SMARTSWITCH_MNT= "" + fi +{%- endif %} {%- endif %} docker create {{docker_image_run_opt}} \ {%- if docker_container_name != "dhcp_server" %} @@ -625,6 +623,7 @@ start() { {%- endif %} -e RUNTIME_OWNER=local \ --uts=host \{# W/A: this should be set per-docker, for those dockers which really need host's UTS namespace #} + --tmpfs /var/log/supervisor:rw \ {%- if install_debug_image == "y" %} -v /src:/src:ro -v /debug:/debug:rw \ {%- endif %} @@ -644,6 +643,7 @@ start() { -v /var/run/hw-management:/var/run/hw-management:rw \ -v mlnx_sdk_socket:/var/run/sx_sdk \ -v /tmp/nv-syncd-shared/:/tmp \ + $SMARTSWITCH_MNT \ -v /dev/shm:/dev/shm:rw \ -e SX_API_SOCKET_FILE=/var/run/sx_sdk/sx_api.sock \ -v /dev/shm:/dev/shm:rw \ diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2 index 622087a5521..1d1c1817b49 100644 --- a/files/build_templates/init_cfg.json.j2 +++ b/files/build_templates/init_cfg.json.j2 @@ -24,7 +24,6 @@ "FLEX_COUNTER_TABLE": { "ACL": { "FLEX_COUNTER_STATUS": "enable", - "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" }, "PORT": { diff --git a/files/build_templates/qos_config.j2 b/files/build_templates/qos_config.j2 index 70ebf9e238e..06314fee6e8 100644 --- a/files/build_templates/qos_config.j2 +++ b/files/build_templates/qos_config.j2 @@ -92,6 +92,8 @@ ('resource_type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['resource_type'] == 'ComputeAI') %} {{- generate_tc_to_pg_map() }} +{% elif generate_tc_to_pg_map_per_sku is defined %} + {{- generate_tc_to_pg_map_per_sku() }} {% else %} "TC_TO_PRIORITY_GROUP_MAP": { "AZURE": { @@ -156,6 +158,8 @@ ('resource_type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['resource_type'] == 'ComputeAI') %} {{- generate_dscp_to_tc_map() }} +{% elif (generate_dscp_to_tc_map_per_sku is defined) %} + {{ generate_dscp_to_tc_map_per_sku() }} {% else %} "DSCP_TO_TC_MAP": { "AZURE": { @@ -267,6 +271,8 @@ "weight": "5" } }, +{% elif generate_scheduler_per_sku is defined %} + {{ generate_scheduler_per_sku() }} {% else %} "SCHEDULER": { "scheduler.0": { @@ -410,6 +416,13 @@ }{% if not loop.last %},{% endif %} {% endfor %} } +{% elif generate_single_queue_per_sku is defined %} + "QUEUE": { +{% for port in PORT_ACTIVE %} + {{ generate_single_queue_per_sku(port) }} + {%- if not loop.last -%},{% endif %} +{% endfor %} + } {% else %} "QUEUE": { {% if 'type' in DEVICE_METADATA['localhost'] and diff --git a/files/build_templates/rsyslog_plugin.conf.j2 b/files/build_templates/rsyslog_plugin.conf.j2 index f69e58cf431..56ec0f71d3f 100644 --- a/files/build_templates/rsyslog_plugin.conf.j2 +++ b/files/build_templates/rsyslog_plugin.conf.j2 @@ -1,6 +1,7 @@ ## rsyslog-plugin for streaming telemetry via gnmi -{% if ENVIRONMENT['EVENTD_STATE'] == "enabled" %} + + template(name="prog_msg" type="list") { property(name="msg") constant(value="\n") @@ -15,4 +16,3 @@ if re_match($programname, "{{ proc.name }}") then { template="prog_msg") } {% endfor %} -{% endif %} diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2 index 891a9afdc06..0925b3c3d68 100644 --- a/files/build_templates/sonic_debian_extension.j2 +++ b/files/build_templates/sonic_debian_extension.j2 @@ -104,6 +104,11 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-nettools_*.deb || \ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f sudo setcap 'cap_net_raw=+ep' $FILESYSTEM_ROOT/usr/bin/wol +# This is needed for moving monit logs, state and logrotate status to tmpfs +sudo bash -c "echo \"d /dev/shm/monit/ 0755 root root\" > $FILESYSTEM_ROOT/etc/tmpfiles.d/tmpfs-monit.conf" +sudo bash -c "echo \"d /dev/shm/logrotate/ 0755 root root\" > $FILESYSTEM_ROOT/etc/tmpfiles.d/tmpfs-logrotate.conf" + + # Install a patched version of ifupdown2 (and its dependencies via 'apt-get -y install -f') sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/ifupdown2_*.deb || \ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f @@ -358,16 +363,13 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-db-cli_*.deb || \ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f -{% if include_system_eventd == "y" %} +{% if include_system_eventd == "y" and build_reduce_image_size != "y" %} # Install sonic-rsyslog-plugin sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-rsyslog-plugin_*.deb || \ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f # Generate host conf for rsyslog_plugin -sudo mkdir -p $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin -sudo cp $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/ -sudo cp $BUILD_TEMPLATES/events_info.json $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/ -sudo cp $BUILD_TEMPLATES/syncd_events_info.json $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/ +j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/host_events.conf sudo cp $BUILD_TEMPLATES/monit_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ sudo cp $BUILD_TEMPLATES/sshd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ sudo cp $BUILD_TEMPLATES/systemd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ @@ -376,7 +378,11 @@ sudo cp $BUILD_TEMPLATES/dockerd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ sudo cp $BUILD_TEMPLATES/seu_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ sudo cp $BUILD_TEMPLATES/zebra_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ sudo cp $BUILD_TEMPLATES/bgpd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ + + +j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/syncd_events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/syncd_events.conf sudo cp $BUILD_TEMPLATES/syncd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ + {% endif %} # Install custom-built monit package and SONiC configuration files @@ -396,6 +402,8 @@ sudo cp $IMAGE_CONFIGS/monit/arp_update_checker $FILESYSTEM_ROOT/usr/bin/ sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/arp_update_checker sudo cp $IMAGE_CONFIGS/monit/control_plane_drop_check $FILESYSTEM_ROOT/usr/bin/ sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/control_plane_drop_check +sudo cp $IMAGE_CONFIGS/monit/mgmt_oper_status.py $FILESYSTEM_ROOT/usr/bin/ +sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/mgmt_oper_status.py # Installed smartmontools version should match installed smartmontools in docker-platform-monitor Dockerfile # TODO: are mismatching versions fine for bookworm? @@ -1019,6 +1027,7 @@ sudo LANG=C cp $SCRIPTS_DIR/database.sh $FILESYSTEM_ROOT/usr/local/bin/database. sudo LANG=C cp $SCRIPTS_DIR/snmp.sh $FILESYSTEM_ROOT/usr/local/bin/snmp.sh sudo LANG=C cp $SCRIPTS_DIR/telemetry.sh $FILESYSTEM_ROOT/usr/local/bin/telemetry.sh sudo LANG=C cp $SCRIPTS_DIR/gnmi.sh $FILESYSTEM_ROOT/usr/local/bin/gnmi.sh +sudo LANG=C cp $SCRIPTS_DIR/bmp.sh $FILESYSTEM_ROOT/usr/local/bin/bmp.sh sudo LANG=C cp $SCRIPTS_DIR/mgmt-framework.sh $FILESYSTEM_ROOT/usr/local/bin/mgmt-framework.sh sudo LANG=C cp $SCRIPTS_DIR/asic_status.sh $FILESYSTEM_ROOT/usr/local/bin/asic_status.sh sudo LANG=C cp $SCRIPTS_DIR/asic_status.py $FILESYSTEM_ROOT/usr/local/bin/asic_status.py @@ -1136,7 +1145,12 @@ sudo cp {{platform_api_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHE sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_PLATFORM_PY3_WHEEL_NAME sudo rm -rf $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHEEL_NAME + +sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libdashapi_*.deb || \ + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install xmlstarlet + {% endif %} {%- if SONIC_ROUTING_STACK == "frr" %} @@ -1156,3 +1170,8 @@ sudo rm -rf $FILESYSTEM_ROOT/tmp/mask_disabled_services.py sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install python3-dbus + +## Enable MULTIDB +{% if ENABLE_MULTIDB == "y" %} +sudo touch $FILESYSTEM_ROOT_ETC_SONIC/enable_multidb +{% endif %} diff --git a/files/build_templates/swss_vars.j2 b/files/build_templates/swss_vars.j2 index f35d0fc080a..53639f01f7f 100644 --- a/files/build_templates/swss_vars.j2 +++ b/files/build_templates/swss_vars.j2 @@ -7,6 +7,9 @@ "mac": "{{ DEVICE_METADATA.localhost.mac }}", "resource_type": "{{ DEVICE_METADATA.localhost.resource_type }}", "synchronous_mode": {% if DEVICE_METADATA.localhost.synchronous_mode == "disable" %}"disable"{% else %}"enable"{% endif %}, + {%if DEVICE_METADATA.localhost.supporting_bulk_counter_groups is defined and DEVICE_METADATA.localhost.supporting_bulk_counter_groups != '' -%} + "supporting_bulk_counter_groups": "{{ DEVICE_METADATA.localhost.supporting_bulk_counter_groups|join(',') }}", + {% endif -%} "dual_tor": {% if DEVICE_METADATA.localhost.type == "ToRRouter" and DEVICE_METADATA.localhost.subtype == "DualToR" %}"enable"{% else %}"disable"{% endif %}, "dscp_remapping": {% if SYSTEM_DEFAULTS is defined and SYSTEM_DEFAULTS.tunnel_qos_remap is defined and SYSTEM_DEFAULTS.tunnel_qos_remap.status == "enabled" %}"enable"{% else %}"disable"{% endif %} } diff --git a/files/image_config/bannerconfig/banner-config.service b/files/image_config/bannerconfig/banner-config.service index 738b549ba88..cc8393717e0 100644 --- a/files/image_config/bannerconfig/banner-config.service +++ b/files/image_config/bannerconfig/banner-config.service @@ -2,7 +2,6 @@ Description=Update banner config based on configdb Requires=config-setup.service After=config-setup.service -Before=systemd-logind.service sshd.service BindsTo=database.service BindsTo=sonic.target diff --git a/files/image_config/constants/constants.yml b/files/image_config/constants/constants.yml index 01fb02deadf..781055ba49b 100644 --- a/files/image_config/constants/constants.yml +++ b/files/image_config/constants/constants.yml @@ -22,8 +22,8 @@ constants: enabled: true maximum_paths: enabled: true - ipv4: 64 - ipv6: 64 + ipv4: 514 + ipv6: 514 allow_list: enabled: true default_action: "permit" # or "deny" diff --git a/files/image_config/containercfgd/containercfgd.conf b/files/image_config/containercfgd/containercfgd.conf index 704b5490c3f..e0cf7c478e2 100644 --- a/files/image_config/containercfgd/containercfgd.conf +++ b/files/image_config/containercfgd/containercfgd.conf @@ -3,7 +3,9 @@ command=python3 /usr/local/bin/containercfgd priority=99 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running diff --git a/files/image_config/interfaces/interfaces.j2 b/files/image_config/interfaces/interfaces.j2 index cfdd322c454..ea04fa80e93 100644 --- a/files/image_config/interfaces/interfaces.j2 +++ b/files/image_config/interfaces/interfaces.j2 @@ -131,6 +131,7 @@ iface {{ name }} {{ 'inet' if prefix | ipv4 else 'inet6' }} static {# TODO: COPP policy type rules #} {% endfor %} {% else %} +{% if not (DEVICE_METADATA['localhost']['subtype'] == 'SmartSwitch' and DEVICE_METADATA['localhost']['switch_type'] == 'dpu') %} auto eth0 iface eth0 inet dhcp metric 202 @@ -142,6 +143,7 @@ iface eth0 inet6 dhcp down sysctl net.ipv6.conf.eth0.accept_ra=0 {% endif %} {% endif %} +{% endif %} # source /etc/network/interfaces.d/* # diff --git a/files/image_config/logrotate/logrotateOverride.conf b/files/image_config/logrotate/logrotateOverride.conf index adc85ff306b..64e181aa7c4 100644 --- a/files/image_config/logrotate/logrotateOverride.conf +++ b/files/image_config/logrotate/logrotateOverride.conf @@ -1,2 +1,6 @@ [Unit] -Requires=logrotate-config.service \ No newline at end of file +Requires=logrotate-config.service + +[Service] +ExecStart= +ExecStart=/usr/sbin/logrotate --state /dev/shm/logrotate/status /etc/logrotate.conf diff --git a/files/image_config/monit/conf.d/sonic-host b/files/image_config/monit/conf.d/sonic-host index 95adb4c295b..6a16d4e1bdf 100644 --- a/files/image_config/monit/conf.d/sonic-host +++ b/files/image_config/monit/conf.d/sonic-host @@ -65,3 +65,8 @@ check program arp_update_checker with path "/usr/bin/arp_update_checker" every 1 check program controlPlaneDropCheck with path "/usr/bin/control_plane_drop_check" every 5 cycles if status != 0 for 3 cycle then alert repeat every 1 cycles + +# Periodically update oper status of mgmt interface in STATE_DB +check program mgmtOperStatus with path "/usr/bin/mgmt_oper_status.py" + every 1 cycles + if status != 0 for 3 cycle then alert repeat every 1 cycles diff --git a/files/image_config/monit/mgmt_oper_status.py b/files/image_config/monit/mgmt_oper_status.py new file mode 100755 index 00000000000..d6473ecf8de --- /dev/null +++ b/files/image_config/monit/mgmt_oper_status.py @@ -0,0 +1,44 @@ +#!/usr/bin/env python3 + +""" +""" +import sys +import subprocess +import syslog + +from sonic_py_common import multi_asic, device_info +from swsscommon.swsscommon import SonicV2Connector + + +def main(): + db = SonicV2Connector(use_unix_socket_path=True) + db.connect('CONFIG_DB') + db.connect('STATE_DB') + mgmt_ports_keys = db.keys(db.CONFIG_DB, 'MGMT_PORT|*' ) + if not mgmt_ports_keys: + syslog.syslog(syslog.LOG_DEBUG, 'No management interface found') + else: + try: + mgmt_ports = [key.split('MGMT_PORT|')[-1] for key in mgmt_ports_keys] + for port in mgmt_ports: + state_db_mgmt_port = db.keys(db.STATE_DB, 'MGMT_PORT_TABLE|*' ) + state_db_key = "MGMT_PORT_TABLE|{}".format(port) + prev_oper_status = 'unknown' + if state_db_key in state_db_mgmt_port: + prev_oper_status = db.get(db.STATE_DB, state_db_key, 'oper_status') + port_operstate_path = '/sys/class/net/{}/operstate'.format(port) + oper_status = subprocess.run(['cat', port_operstate_path], capture_output=True, text=True) + current_oper_status = oper_status.stdout.strip() + if current_oper_status != prev_oper_status: + db.set(db.STATE_DB, state_db_key, 'oper_status', current_oper_status) + log_level = syslog.LOG_INFO if current_oper_status == 'up' else syslog.LOG_WARNING + syslog.syslog(log_level, "mgmt_oper_status: {}".format(current_oper_status)) + except Exception as e: + syslog.syslog(syslog.LOG_ERR, "mgmt_oper_status exception : {}".format(str(e))) + db.set(db.STATE_DB, state_db_key, 'oper_status', 'unknown') + sys.exit(1) + + +if __name__ == "__main__": + main() + sys.exit(0) diff --git a/files/image_config/monit/monitrc b/files/image_config/monit/monitrc index 74068f12d3f..e3b252fcea7 100644 --- a/files/image_config/monit/monitrc +++ b/files/image_config/monit/monitrc @@ -38,7 +38,7 @@ ## default the file is placed in $HOME/.monit.id. # # set idfile /var/.monit.id - set idfile /var/lib/monit/id + set idfile /dev/shm/monit/id # ## Set the location of the Monit state file which saves monitoring states ## on each cycle. By default the file is placed in $HOME/.monit.state. If @@ -46,7 +46,7 @@ ## the monitoring state across reboots. If it is on temporary filesystem, the ## state will be lost on reboot which may be convenient in some situations. # - set statefile /var/lib/monit/state + set statefile /dev/shm/monit/state # # @@ -91,7 +91,7 @@ ## available in the back end filesystem). # set eventqueue - basedir /var/lib/monit/events # set the base directory where events will be stored + basedir /dev/shm/monit/events # set the base directory where events will be stored slots 100 # optionally limit the queue size # # diff --git a/files/image_config/monit/tests/test_mgmt_oper_status.py b/files/image_config/monit/tests/test_mgmt_oper_status.py new file mode 100644 index 00000000000..2b2f1fbefc4 --- /dev/null +++ b/files/image_config/monit/tests/test_mgmt_oper_status.py @@ -0,0 +1,79 @@ +import unittest +from unittest.mock import patch, MagicMock +import subprocess +import syslog +import sys +import mgmt_oper_status + +class TestMgmtOperStatusCheck(unittest.TestCase): + + @patch('mgmt_oper_status.SonicV2Connector') + @patch('mgmt_oper_status.subprocess.run') + @patch('mgmt_oper_status.syslog.syslog') + def test_main_no_mgmt_ports(self, mock_syslog, mock_subprocess, mock_SonicV2Connector): + mock_db = MagicMock() + mock_SonicV2Connector.return_value = mock_db + mock_db.keys.return_value = [] + + mgmt_oper_status.main() + + mock_syslog.assert_called_with(syslog.LOG_DEBUG, 'No management interface found') + + @patch('mgmt_oper_status.SonicV2Connector') + @patch('mgmt_oper_status.subprocess.run') + @patch('mgmt_oper_status.syslog.syslog') + def test_main_with_mgmt_ports(self, mock_syslog, mock_subprocess, mock_SonicV2Connector): + mock_db = MagicMock() + mock_SonicV2Connector.return_value = mock_db + mgmt_ports_keys = ['MGMT_PORT|eth0', 'MGMT_PORT|eth1'] + mock_db.keys.return_value = mgmt_ports_keys + mock_db.set.return_value = None + + mock_subprocess.return_value = subprocess.CompletedProcess(args=['cat', '/sys/class/net/eth0/operstate'], returncode=0, stdout='up', stderr='') + + mgmt_oper_status.main() + + mock_syslog.assert_any_call(syslog.LOG_INFO, 'mgmt_oper_status: up') + mock_syslog.assert_any_call(syslog.LOG_INFO, 'mgmt_oper_status: up') + + mock_db.set.assert_any_call(mock_db.STATE_DB, 'MGMT_PORT_TABLE|eth0', 'oper_status', 'up') + mock_db.set.assert_any_call(mock_db.STATE_DB, 'MGMT_PORT_TABLE|eth1', 'oper_status', 'up') + + @patch('mgmt_oper_status.SonicV2Connector') + @patch('mgmt_oper_status.subprocess.run') + @patch('mgmt_oper_status.syslog.syslog') + def test_main_with_mgmt_port_down(self, mock_syslog, mock_subprocess, mock_SonicV2Connector): + mock_db = MagicMock() + mock_SonicV2Connector.return_value = mock_db + mgmt_ports_keys = ['MGMT_PORT|eth0'] + mock_db.keys.return_value = mgmt_ports_keys + mock_db.set.return_value = None + + mock_subprocess.return_value = subprocess.CompletedProcess(args=['cat', '/sys/class/net/eth0/operstate'], returncode=0, stdout='down', stderr='') + + mgmt_oper_status.main() + + mock_syslog.assert_any_call(syslog.LOG_WARNING, 'mgmt_oper_status: down') + + mock_db.set.assert_any_call(mock_db.STATE_DB, 'MGMT_PORT_TABLE|eth0', 'oper_status', 'down') + + + @patch('mgmt_oper_status.SonicV2Connector') + @patch('mgmt_oper_status.subprocess.run') + @patch('mgmt_oper_status.syslog.syslog') + def test_main_exception_handling(self, mock_syslog, mock_subprocess, mock_SonicV2Connector): + mock_db = MagicMock() + mock_SonicV2Connector.return_value = mock_db + mgmt_ports_keys = ['MGMT_PORT|eth0'] + mock_db.keys.return_value = mgmt_ports_keys + mock_db.set.return_value = None + + mock_subprocess.side_effect = Exception("File not found") + + mgmt_oper_status.main() + + mock_syslog.assert_called_with(syslog.LOG_ERR, "mgmt_oper_status exception : File not found") + mock_db.set.assert_any_call(mock_db.STATE_DB, 'MGMT_PORT_TABLE|eth0', 'oper_status', 'unknown') + +if __name__ == '__main__': + unittest.main() diff --git a/files/image_config/watchdog-control/watchdog-control.sh b/files/image_config/watchdog-control/watchdog-control.sh index 89203996462..f01b21d7e69 100755 --- a/files/image_config/watchdog-control/watchdog-control.sh +++ b/files/image_config/watchdog-control/watchdog-control.sh @@ -22,6 +22,9 @@ function getBootType() *SONIC_BOOT_TYPE=fastfast*) TYPE='fastfast' ;; + *SONIC_BOOT_TYPE=express*) + TYPE='express' + ;; *SONIC_BOOT_TYPE=fast*|*fast-reboot*) TYPE='fast' ;; diff --git a/files/initramfs-tools/arista-net b/files/initramfs-tools/arista-net index bfa4f8a6507..1edbd7f4d12 100644 --- a/files/initramfs-tools/arista-net +++ b/files/initramfs-tools/arista-net @@ -98,7 +98,7 @@ fi # First time renaming the interfaces to maX. # The second time renaming them to their final name ethX. if [ -n "$aboot_flag" ]; then - if [ "$platform_flag" = 'rook' -o "$platform_flag" = 'lorikeet' ]; then + if [ "$platform_flag" = 'rook' -o "$platform_flag" = 'lorikeet' -o "$platform_flag" = 'redstart' ]; then # Rename existing ethX interfaces to tmpX for x in $(ls /sys/class/net/); do case $x in diff --git a/files/initramfs-tools/union-mount.j2 b/files/initramfs-tools/union-mount.j2 index fccd21f415e..8f8abb8f6af 100644 --- a/files/initramfs-tools/union-mount.j2 +++ b/files/initramfs-tools/union-mount.j2 @@ -212,6 +212,9 @@ mkdir -p ${rootmnt}/boot mkdir -p ${rootmnt}/host/$image_dir/boot mount --bind ${rootmnt}/host/$image_dir/boot ${rootmnt}/boot +## Mount the /tmp directory as tmpfs +mount -t tmpfs -o rw,nosuid,nodev,size=25% tmpfs ${rootmnt}/tmp + ## Mount loop device or tmpfs for /var/log if $logs_inram; then # NOTE: some platforms, when reaching initramfs stage, have a small diff --git a/files/scripts/bmp.sh b/files/scripts/bmp.sh new file mode 100755 index 00000000000..8229fd8ece2 --- /dev/null +++ b/files/scripts/bmp.sh @@ -0,0 +1,105 @@ +#!/bin/bash + +function debug() +{ + /usr/bin/logger $1 +} + +function check_warm_boot() +{ + SYSTEM_WARM_START=`$SONIC_DB_CLI STATE_DB hget "WARM_RESTART_ENABLE_TABLE|system" enable` + SERVICE_WARM_START=`$SONIC_DB_CLI STATE_DB hget "WARM_RESTART_ENABLE_TABLE|${SERVICE}" enable` + if [[ x"$SYSTEM_WARM_START" == x"true" ]] || [[ x"$SERVICE_WARM_START" == x"true" ]]; then + WARM_BOOT="true" + else + WARM_BOOT="false" + fi +} + +function check_fast_boot () +{ + SYSTEM_FAST_REBOOT=`sonic-db-cli STATE_DB hget "FAST_RESTART_ENABLE_TABLE|system" enable` + if [[ x"${SYSTEM_FAST_REBOOT}" == x"true" ]]; then + FAST_BOOT="true" + else + FAST_BOOT="false" + fi +} + +function check_redundant_type() +{ + DEVICE_SUBTYPE=`$SONIC_DB_CLI CONFIG_DB hget "DEVICE_METADATA|localhost" subtype` + if [[ x"$DEVICE_SUBTYPE" == x"DualToR" ]]; then + MUX_CONFIG=`show muxcable config` + if [[ $MUX_CONFIG =~ .*active-active.* ]]; then + ACTIVE_ACTIVE="true" + else + ACTIVE_ACTIVE="false" + fi + else + ACTIVE_ACTIVE="false" + fi + CONFIG_KNOB=`$SONIC_DB_CLI CONFIG_DB hget "MUX_LINKMGR|SERVICE_MGMT" kill_radv` + if [[ x"$CONFIG_KNOB" == x"False" ]]; then + ACTIVE_ACTIVE='false' + fi + debug "DEVICE_SUBTYPE: ${DEVICE_SUBTYPE}, CONFIG_KNOB: ${CONFIG_KNOB}" +} + +start() { + debug "Starting ${SERVICE}$DEV service..." + + # start service docker + /usr/bin/${SERVICE}.sh start $DEV + debug "Started ${SERVICE}$DEV service..." +} + +wait() { + /usr/bin/${SERVICE}.sh wait $DEV +} + +stop() { + debug "Stopping ${SERVICE}$DEV service..." + + check_warm_boot + check_fast_boot + check_redundant_type + debug "Warm boot flag: ${SERVICE}$DEV ${WARM_BOOT}." + debug "Fast boot flag: ${SERVICE}$DEV ${FAST_BOOT}." + + # For WARM/FAST boot do not perform service stop + if [[ x"$WARM_BOOT" != x"true" ]] && [[ x"$FAST_BOOT" != x"true" ]]; then + if [[ x"$SERVICE" == x"radv" ]] && [[ x"$ACTIVE_ACTIVE" == x"true" ]]; then + debug "Killing Docker ${SERVICE}${DEV} for active-active dualtor device..." + /usr/bin/${SERVICE}.sh kill $DEV + else + /usr/bin/${SERVICE}.sh stop $DEV + debug "Stopped ${SERVICE}$DEV service..." + fi + else + debug "Killing Docker ${SERVICE}${DEV}..." + /usr/bin/${SERVICE}.sh kill $DEV + fi +} + +DEV=$2 + +SCRIPT_NAME=$(basename -- "$0") +SERVICE="${SCRIPT_NAME%.*}" +NAMESPACE_PREFIX="asic" +if [[ "$DEV" && "$DEV" != *"dpu"* ]]; then + NET_NS="$NAMESPACE_PREFIX$DEV" #name of the network namespace + SONIC_DB_CLI="sonic-db-cli -n $NET_NS" +else + SONIC_DB_CLI="sonic-db-cli" +fi + +case "$1" in + start|wait|stop) + $1 + ;; + *) + echo "Usage: $0 {start|wait|stop}" + exit 1 + ;; +esac diff --git a/files/scripts/sonic-dpu-mgmt-traffic.sh b/files/scripts/sonic-dpu-mgmt-traffic.sh index 71e6ed29b32..014d722537f 100755 --- a/files/scripts/sonic-dpu-mgmt-traffic.sh +++ b/files/scripts/sonic-dpu-mgmt-traffic.sh @@ -4,12 +4,22 @@ command_name=$0 usage(){ - echo "Syntax: $command_name -e|--enable -d|--disable" + echo "Syntax: $command_name inbound/outbound -e|--enable -d|--disable [--dpus,--ports,--nofwctrl]" echo "Arguments:" - echo "-e Enable dpu management traffic forwarding" - echo "-d Disable dpu management traffic forwarding" + echo "inbound Control DPU Inbound traffic forwarding" + echo "outbound Control DPU Outbound traffic forwarding" + echo "-e Enable dpu management traffic forwarding in a specific direction" + echo "-d Disable dpu management traffic forwarding in a specific direction" + echo "--dpus Selection of dpus for which the inbound traffic has to be controlled (all can be specified)" + echo "--ports Selection of ports for which the inbound traffic has to be controlled" + echo "--nofwctrl Disable changing the general ipv4 forwarding (Could be useful if inbound is enabled and outbound is disabled)" } +dpu_l=() +declare -A midplane_dict +declare -A midplane_ip_dict +fw_change="enable" + add_rem_valid_iptable(){ local op=$1 local table=$2 @@ -39,20 +49,148 @@ control_forwarding(){ if [ "$op" = "enable" ]; then value=1 fi - echo $value > /proc/sys/net/ipv4/ip_forward - echo $value > /proc/sys/net/ipv4/conf/eth0/forwarding + if [ "$fw_change" = "enable" ]; then + echo $value > /proc/sys/net/ipv4/ip_forward + echo $value > /proc/sys/net/ipv4/conf/eth0/forwarding + fi +} + +validate_dpus(){ + local provided_list=("$@") + for item1 in "${provided_list[@]}"; do + local found=0 + for item2 in "${dpu_l[@]}"; do + if [[ "$item1" = "$item2" ]]; then + found=1 + break + fi + done + if [[ $found -eq 0 ]]; then + echo "$item1 is not detected! Please provide proper dpu names list!" + exit 1 + fi + done +} + +general_validation(){ + if [ -z "$direction" ]; then + echo "Please provide the direction argument (inbound or outboud)" + usage + exit 1 + fi + + if [ -z "$operation" ]; then + echo "Please provide the operation option (-e or -d)" + usage + exit 1 + fi +} + +port_use_validation(){ + local port_l=("$@") + for port in "${port_l[@]}"; do + if (( port >= 0 && port <= 1023 )); then + echo "Provided port $port in range 0-1023, Please execute with a different port" + exit 1 + fi + if netstat -tuln | awk '{print $4}' | grep -q ":$port\$"; then + echo "Provided port $port is in use by another process, Please execute with a different port" + exit 1 + fi + done +} + + + + +inbound_validation(){ + #DPU Validation + while IFS= read -r line; do + dpu_name=$( echo "$line" | sed 's/.*|//;s/"//g') + dpu_l+=("$dpu_name") + done < <(redis-cli -n 4 keys DPUS*) + len1=${#dpu_name[@]} + if [ "$len1" -eq 0 ]; then + echo "No dpus detected on device!" + exit 1 + fi + sorted_dpu_l=($(for item in "${dpu_l[@]}"; do + echo "$item" + done | sort)) + if [ -z "$arg_dpu_names" ]; then + echo "No DPUs provided!" + usage + exit 1 + else + if [ "$arg_dpu_names" = "all" ]; then + sel_dpu_names=("${sorted_dpu_l[@]}") + echo "${#sorted_dpu_l[@]} DPUs detected:" + echo "${sorted_dpu_l[@]}" + else + IFS=',' read -ra sel_dpu_names <<< "$arg_dpu_names" + validate_dpus ${sel_dpu_names[@]} + fi + fi + #Port validation + IFS=',' read -ra provided_ports <<< "$arg_port_list" + len1=${#sel_dpu_names[@]} + len2=${#provided_ports[@]} + if [ "$len1" -ne "$len2" ]; then + echo "Length of ${sel_dpu_names[@]} does not match provided port length ${provided_ports[@]}" + usage + exit 1 + fi + port_use_validation ${provided_ports[@]} + for dpu in "${sel_dpu_names[@]}"; do + midplane_int_name=$(redis-cli -n 4 hget "DPUS|$dpu" "midplane_interface") + if [ -z "$midplane_int_name" ]; then + echo "Cannot obtain midplane interface for $dpu" + exit 1 + fi + midplane_dict["$dpu"]="$midplane_int_name" + done + + for dpu in "${!midplane_dict[@]}"; do + midplane_ip=$(redis-cli -n 4 hget "DHCP_SERVER_IPV4_PORT|$midplane_iface|${midplane_dict[$dpu]}" "ips@") + if [ -z "$midplane_ip" ]; then + echo "Cannot obtain midplane ip for $dpu" + exit 1 + fi + midplane_ip_dict["$dpu"]="$midplane_ip" + done } -ctrl_dpu_forwarding(){ +# Outbound Traffice forwarding control function +ctrl_dpu_ob_forwarding(){ local op=$1 control_forwarding $op add_rem_valid_iptable $op nat POSTROUTING -o ${mgmt_iface} -j MASQUERADE add_rem_valid_iptable $op filter FORWARD -i ${mgmt_iface} -o ${midplane_iface} -m conntrack --ctstate RELATED,ESTABLISHED -j ACCEPT add_rem_valid_iptable $op filter FORWARD -i ${midplane_iface} -o ${mgmt_iface} -j ACCEPT if [ "$op" = "enable" ]; then - echo "Enabled DPU management traffic Forwarding" + echo "Enabled DPU management outbound traffic Forwarding" + else + echo "Disabled DPU management outbound traffic Forwarding" + fi +} + +ctrl_dpu_ib_forwarding(){ + local op=$1 + local dest_port=22 + control_forwarding $op + add_rem_valid_iptable $op filter FORWARD -i ${midplane_iface} -o ${mgmt_iface} -p tcp -m conntrack --ctstate RELATED,ESTABLISHED -j ACCEPT + add_rem_valid_iptable $op filter FORWARD -i ${mgmt_iface} -o ${midplane_iface} -p tcp --dport $dest_port -j ACCEPT + for index in ${!sel_dpu_names[@]}; do + dpu_name="${sel_dpu_names[$index]}" + dpu_midplane_ip="${midplane_ip_dict[$dpu_name]}" + switch_port="${provided_ports[$index]}" + add_rem_valid_iptable $op nat POSTROUTING -p tcp -d $dpu_midplane_ip --dport $dest_port -j MASQUERADE + add_rem_valid_iptable $op nat PREROUTING -i ${mgmt_iface} -p tcp --dport $switch_port -j DNAT --to-destination $dpu_midplane_ip:$dest_port + done + if [ "$op" = "enable" ]; then + echo "Enabled DPU management inbound traffic Forwarding" else - echo "Disabled DPU management traffic Forwarding" + echo "Disabled DPU management inbound traffic Forwarding" fi } @@ -70,16 +208,81 @@ if ! ifconfig "$midplane_iface" > /dev/null 2>&1; then exit 1 fi +operation="" +direction="" + +invalid_arg(){ + echo "Invalid arguments $1" + usage + exit 1 +} + + case $1 in - -e|--enable) - ctrl_dpu_forwarding enable - ;; - -d|--disable) - ctrl_dpu_forwarding disable - ;; + inbound) + direction="inbound" + shift + while [ "$1" != "--" ] && [ -n "$1" ]; do + case $1 in + -e|--enable) + operation="enable" + ;; + -d|--disable) + operation="disable" + ;; + --dpus) + shift; + arg_dpu_names=$1 + ;; + --ports) + shift; + arg_port_list=$1 + ;; + --nofwctrl) + fw_change="disable" + ;; + *) + invalid_arg $1 + ;; + esac + shift + done + ;; + outbound) + direction="outbound" + shift + while [ "$1" != "--" ] && [ -n "$1" ]; do + case $1 in + -e|--enable) + operation="enable" + ;; + -d|--disable) + operation="disable" + ;; + --nofwctrl) + fw_change="disable" + ;; + *) + invalid_arg $1 + ;; + esac + shift + done + ;; *) - echo "Incorrect Usage!" - usage - exit 1 + invalid_arg $1 + ;; +esac + +general_validation + + +case $direction in + outbound) + ctrl_dpu_ob_forwarding $operation + ;; + inbound) + inbound_validation + ctrl_dpu_ib_forwarding $operation ;; esac diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh index 35815fe4dfb..f081cf6de8e 100755 --- a/files/scripts/swss.sh +++ b/files/scripts/swss.sh @@ -233,6 +233,7 @@ function clean_up_chassis_db_tables() local lagid = redis.call('HGET', 'SYSTEM_LAG_ID_TABLE', lagname) redis.call('SREM', 'SYSTEM_LAG_ID_SET', lagid) redis.call('HDEL', 'SYSTEM_LAG_ID_TABLE', lagname) + redis.call('rpush', 'SYSTEM_LAG_IDS_FREE_LIST', lagid) nsl = nsl + 1 end end diff --git a/files/scripts/syncd_common.sh b/files/scripts/syncd_common.sh index 826cdd731ba..d3a8b0df7c4 100755 --- a/files/scripts/syncd_common.sh +++ b/files/scripts/syncd_common.sh @@ -81,6 +81,9 @@ function getBootType() *SONIC_BOOT_TYPE=fastfast*) TYPE='fastfast' ;; + *SONIC_BOOT_TYPE=express*) + TYPE='express' + ;; *SONIC_BOOT_TYPE=fast*|*fast-reboot*) # check that the key exists SYSTEM_FAST_REBOOT=`sonic-db-cli STATE_DB hget "FAST_RESTART_ENABLE_TABLE|system" enable` diff --git a/platform/barefoot/docker-saiserver-bfn/supervisord.conf b/platform/barefoot/docker-saiserver-bfn/supervisord.conf index 4400184e539..96ffc271efd 100644 --- a/platform/barefoot/docker-saiserver-bfn/supervisord.conf +++ b/platform/barefoot/docker-saiserver-bfn/supervisord.conf @@ -8,16 +8,20 @@ command=/usr/bin/start.sh priority=1 autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:rsyslogd] command=/usr/sbin/rsyslogd -n priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:saiserver] environment=LD_LIBRARY_PATH="/opt/bfn/install/lib" @@ -25,6 +29,8 @@ command=/usr/bin/saiserver_start.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true diff --git a/platform/barefoot/docker-syncd-bfn/supervisord.conf b/platform/barefoot/docker-syncd-bfn/supervisord.conf index 62230f8be9d..0007e95d952 100644 --- a/platform/barefoot/docker-syncd-bfn/supervisord.conf +++ b/platform/barefoot/docker-syncd-bfn/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -45,7 +49,9 @@ command=/usr/bin/syncd_start.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista index ed942d617dd..526fcf699c8 160000 --- a/platform/barefoot/sonic-platform-modules-arista +++ b/platform/barefoot/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit ed942d617ddde8e63b5190ad3a7d8171c1dbde9a +Subproject commit 526fcf699c8a439a4192154c644ed0f5b6d0070b diff --git a/platform/broadcom/docker-saiserver-brcm/supervisord.conf b/platform/broadcom/docker-saiserver-brcm/supervisord.conf index d20dac89141..57eefe5507d 100644 --- a/platform/broadcom/docker-saiserver-brcm/supervisord.conf +++ b/platform/broadcom/docker-saiserver-brcm/supervisord.conf @@ -8,21 +8,27 @@ command=/usr/bin/start.sh priority=1 autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:rsyslogd] command=/usr/sbin/rsyslogd -n priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:saiserver] command=/usr/bin/saiserver_start.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true diff --git a/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk b/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk index 0416007a2c2..88c04a3136d 100644 --- a/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk +++ b/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk @@ -3,13 +3,14 @@ DOCKER_SYNCD_BRCM_DNX_RPC = docker-syncd-brcm-dnx-rpc.gz DOCKER_SYNCD_DNX_BASE = docker-syncd-brcm-dnx.gz $(DOCKER_SYNCD_BRCM_DNX_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-brcm-dnx-rpc -$(DOCKER_SYNCD_BRCM_DNX_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(PTF) +$(DOCKER_SYNCD_BRCM_DNX_RPC)_DEPENDS += $(SYNCD_RPC) ifeq ($(INSTALL_DEBUG_TOOLS), y) $(DOCKER_SYNCD_BRCM_DNX_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \ $(LIBSWSSCOMMON_DBG) \ $(LIBSAIMETADATA_DBG) \ $(LIBSAIREDIS_DBG) endif +$(DOCKER_SYNCD_BRCM_DNX_RPC)_PYTHON_WHEELS += $(PTF_PY3) $(DOCKER_SYNCD_BRCM_DNX_RPC)_FILES += $(DSSERVE) $(BCMCMD) $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) $(DOCKER_SYNCD_BRCM_DNX_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_DNX_BASE) SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BRCM_DNX_RPC) diff --git a/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2 index ca85d74083e..ac0e4ea3366 100644 --- a/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2 +++ b/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2 @@ -1,58 +1,72 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} FROM docker-syncd-brcm-dnx-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive -COPY \ -{% for deb in docker_syncd_brcm_dnx_rpc_debs.split(' ') -%} -debs/{{ deb }}{{' '}} -{%- endfor -%} -debs/ - RUN apt-get purge -y syncd ## Pre-install the fundamental packages RUN apt-get update \ && apt-get -y install \ net-tools \ - python3-pip \ - python-setuptools \ + python3-pip \ + python3-dev \ + python-is-python3 \ + python3-scapy \ build-essential \ libssl-dev \ libffi-dev \ - python-dev \ wget \ cmake \ - libqt5core5a \ - libqt5network5 \ - libboost-atomic1.74.0 - -RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ -{% for deb in docker_syncd_brcm_dnx_rpc_debs.split(' ') -%} -dpkg_apt debs/{{ deb }}{{'; '}} -{%- endfor %} - -RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ - && tar xvfz 1.0.0.tar.gz \ - && cd nanomsg-1.0.0 \ - && mkdir -p build \ - && cmake . \ - && make install \ - && ldconfig \ - && cd .. \ - && rm -fr nanomsg-1.0.0 \ - && rm -f 1.0.0.tar.gz \ - && pip2 install cffi==1.7.0 \ - && pip2 install --upgrade cffi==1.7.0 \ - && pip2 install wheel \ - && pip2 install nnpy \ + libnanomsg5 \ + libnanomsg-dev \ + libthrift-0.17.0 + +{% if docker_syncd_brcm_dnx_rpc_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_syncd_brcm_dnx_rpc_debs.split(' '), "/debs/") }} +{% endif %} + +{% if docker_syncd_brcm_dnx_rpc_pydebs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("python-debs/", docker_syncd_brcm_dnx_rpc_pydebs.split(' '), "/debs/") }} +{% endif %} + +{% if docker_syncd_brcm_dnx_rpc_debs.strip() -%} +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_syncd_brcm_dnx_rpc_debs.split(' ')) }} +{% endif %} + +{% if docker_syncd_brcm_dnx_rpc_pydebs.strip() -%} +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_syncd_brcm_dnx_rpc_pydebs.split(' ')) }} +{% endif %} + +RUN pip3 install cffi==1.16.0 \ + && pip3 install wheel \ + && pip3 install nnpy \ && mkdir -p /opt \ && cd /opt \ && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ - && mkdir ptf && cd ptf && wget https://raw.githubusercontent.com/p4lang/ptf/master/src/ptf/afpacket.py && touch __init__.py \ && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ && rm -rf /root/deps COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] +## Clean up +RUN apt-get -y purge \ + cmake \ + libssl-dev \ + libffi-dev \ + python3-dev \ + python3-pip \ + libthrift-dev \ + build-essential + +RUN apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs + ENTRYPOINT ["/usr/local/bin/supervisord"] diff --git a/platform/broadcom/docker-syncd-brcm-dnx.mk b/platform/broadcom/docker-syncd-brcm-dnx.mk index 4276e112544..febb19c4931 100644 --- a/platform/broadcom/docker-syncd-brcm-dnx.mk +++ b/platform/broadcom/docker-syncd-brcm-dnx.mk @@ -24,7 +24,7 @@ endif $(DOCKER_SYNCD_DNX_BASE)_DEPENDS += $(SYNCD) $(DOCKER_SYNCD_DNX_BASE)_DEPENDS += $(BRCM_DNX_SAI) -$(DOCKER_SYNCD_DNX_BASE)_FILES += $(DSSERVE) $(BCMCMD) +$(DOCKER_SYNCD_DNX_BASE)_FILES += $(DSSERVE) $(BCMCMD) $(RDB-CLI) ifeq ($(INSTALL_DEBUG_TOOLS), y) $(DOCKER_SYNCD_DNX_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ diff --git a/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 index 160a1380140..6bceef873d5 100755 --- a/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 +++ b/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 @@ -23,8 +23,8 @@ RUN apt-get install -yf kmod ## BRCM uses ethtool to set host interface speed RUN apt-get install -y ethtool -COPY ["files/dsserve", "files/bcmcmd", "start.sh", "start_led.sh", "bcmsh", "/usr/bin/"] -RUN chmod +x /usr/bin/dsserve /usr/bin/bcmcmd +COPY ["files/dsserve", "files/bcmcmd", "start.sh", "start_led.sh", "bcmsh", "files/rdb-cli", "/usr/bin/"] +RUN chmod +x /usr/bin/dsserve /usr/bin/bcmcmd /usr/bin/rdb-cli COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] diff --git a/platform/broadcom/docker-syncd-brcm-dnx/supervisord.conf b/platform/broadcom/docker-syncd-brcm-dnx/supervisord.conf index 7f1943600a3..ae63ce266fe 100644 --- a/platform/broadcom/docker-syncd-brcm-dnx/supervisord.conf +++ b/platform/broadcom/docker-syncd-brcm-dnx/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -44,8 +48,10 @@ command=/usr/bin/syncd_start.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -55,7 +61,9 @@ priority=4 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=syncd:running diff --git a/platform/broadcom/docker-syncd-brcm-rpc.mk b/platform/broadcom/docker-syncd-brcm-rpc.mk index 92964233159..98e443a9f13 100644 --- a/platform/broadcom/docker-syncd-brcm-rpc.mk +++ b/platform/broadcom/docker-syncd-brcm-rpc.mk @@ -2,13 +2,14 @@ DOCKER_SYNCD_BRCM_RPC = docker-syncd-brcm-rpc.gz $(DOCKER_SYNCD_BRCM_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-brcm-rpc -$(DOCKER_SYNCD_BRCM_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(PTF) +$(DOCKER_SYNCD_BRCM_RPC)_DEPENDS += $(SYNCD_RPC) ifeq ($(INSTALL_DEBUG_TOOLS), y) $(DOCKER_SYNCD_BRCM_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \ $(LIBSWSSCOMMON_DBG) \ $(LIBSAIMETADATA_DBG) \ $(LIBSAIREDIS_DBG) endif +$(DOCKER_SYNCD_BRCM_RPC)_PYTHON_WHEELS += $(PTF_PY3) $(DOCKER_SYNCD_BRCM_RPC)_FILES += $(DSSERVE) $(BCMCMD) $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) $(DOCKER_SYNCD_BRCM_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE) SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BRCM_RPC) diff --git a/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2 index 3517b037a40..1ef8fb29a8d 100644 --- a/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2 +++ b/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2 @@ -1,51 +1,51 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} FROM docker-syncd-brcm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive -COPY \ -{% for deb in docker_syncd_brcm_rpc_debs.split(' ') -%} -debs/{{ deb }}{{' '}} -{%- endfor -%} -debs/ - RUN apt-get purge -y syncd ## Pre-install the fundamental packages RUN apt-get update \ && apt-get -y install \ net-tools \ - python3-pip \ - python-setuptools \ + python3-pip \ + python3-dev \ + python-is-python3 \ + python3-scapy \ build-essential \ libssl-dev \ libffi-dev \ - python-dev \ wget \ cmake \ - libqt5core5a \ - libqt5network5 \ - libboost-atomic1.74.0 - -RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ -{% for deb in docker_syncd_brcm_rpc_debs.split(' ') -%} -dpkg_apt debs/{{ deb }}{{'; '}} -{%- endfor %} - -RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ - && tar xvfz 1.0.0.tar.gz \ - && cd nanomsg-1.0.0 \ - && mkdir -p build \ - && cmake . \ - && make install \ - && ldconfig \ - && cd .. \ - && rm -fr nanomsg-1.0.0 \ - && rm -f 1.0.0.tar.gz \ - && pip2 install cffi==1.7.0 \ - && pip2 install --upgrade cffi==1.7.0 \ - && pip2 install wheel \ - && pip2 install nnpy \ + libnanomsg5 \ + libnanomsg-dev \ + libthrift-0.17.0 + +{% if docker_syncd_brcm_rpc_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_syncd_brcm_rpc_debs.split(' '), "/debs/") }} +{% endif %} + +{% if docker_syncd_brcm_rpc_pydebs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("python-debs/", docker_syncd_brcm_rpc_pydebs.split(' '), "/debs/") }} +{% endif %} + +{% if docker_syncd_brcm_rpc_debs.strip() -%} +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_syncd_brcm_rpc_debs.split(' ')) }} +{% endif %} + +{% if docker_syncd_brcm_rpc_pydebs.strip() -%} +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_syncd_brcm_rpc_pydebs.split(' ')) }} +{% endif %} + +RUN pip3 install cffi==1.16.0 \ + && pip3 install wheel \ + && pip3 install nnpy \ && mkdir -p /opt \ && cd /opt \ && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ @@ -54,4 +54,19 @@ RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] +## Clean up +RUN apt-get -y purge \ + cmake \ + libssl-dev \ + libffi-dev \ + python3-dev \ + python3-pip \ + libthrift-dev \ + build-essential + +RUN apt-get clean -y && \ + apt-get autoclean -y && \ + apt-get autoremove -y && \ + rm -rf /debs + ENTRYPOINT ["/usr/local/bin/supervisord"] diff --git a/platform/broadcom/docker-syncd-brcm/supervisord.conf b/platform/broadcom/docker-syncd-brcm/supervisord.conf index 7f1943600a3..ae63ce266fe 100644 --- a/platform/broadcom/docker-syncd-brcm/supervisord.conf +++ b/platform/broadcom/docker-syncd-brcm/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -44,8 +48,10 @@ command=/usr/bin/syncd_start.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -55,7 +61,9 @@ priority=4 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=syncd:running diff --git a/platform/broadcom/libsaithrift-dev.mk b/platform/broadcom/libsaithrift-dev.mk index ec4e1f6e6da..037f12f0350 100644 --- a/platform/broadcom/libsaithrift-dev.mk +++ b/platform/broadcom/libsaithrift-dev.mk @@ -4,14 +4,8 @@ SAI_VER = 0.9.4 LIBSAITHRIFT_DEV = libsaithrift$(SAITHRIFT_VER)-dev_$(SAI_VER)_amd64.deb $(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI -#Support two different versions of thrift ifeq ($(SAITHRIFT_V2),y) -$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT_0_14_1) $(LIBTHRIFT_0_14_1_DEV) $(PYTHON3_THRIFT_0_14_1) $(THRIFT_0_14_1_COMPILER) -$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT_0_14_1) $(LIBSAITHRIFT_DEV)_BUILD_ENV = SAITHRIFTV2=true SAITHRIFT_VER=v2 -else -$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) -$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) endif $(LIBSAITHRIFT_DEV)_DEPENDS += $(BRCM_XGS_SAI) $(BRCM_XGS_SAI_DEV) $(LIBSAITHRIFT_DEV)_RDEPENDS += $(BRCM_XGS_SAI) diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk index b3951f86953..dca377930ac 100755 --- a/platform/broadcom/one-image.mk +++ b/platform/broadcom/one-image.mk @@ -100,6 +100,10 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) \ $(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE) \ $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE) \ + $(MICAS_M2_W6940_128QC_PLATFORM_MODULE) \ + $(MICAS_M2_W6930_64QC_PLATFORM_MODULE) \ + $(MICAS_M2_W6940_64OC_PLATFORM_MODULE) \ + $(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE) \ $(MICAS_M2_W6510_32C_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL) diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk index 729674eb751..7e70b5c670d 100644 --- a/platform/broadcom/platform-modules-micas.mk +++ b/platform/broadcom/platform-modules-micas.mk @@ -25,6 +25,38 @@ MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE = platform-modules-micas-m2-w6520-24dc8qc $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6520-24dc8qc-r0 $(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE))) +## M2-W6940-128QC +MICAS_M2_W6940_128QC_PLATFORM_MODULE_VERSION = 1.0 +export MICAS_M2_W6940_128QC_PLATFORM_MODULE_VERSION + +MICAS_M2_W6940_128QC_PLATFORM_MODULE = platform-modules-micas-m2-w6940-128qc_$(MICAS_M2_W6940_128QC_PLATFORM_MODULE_VERSION)_amd64.deb +$(MICAS_M2_W6940_128QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6940-128qc-r0 +$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6940_128QC_PLATFORM_MODULE))) + +## M2-W6930-64QC +MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION = 1.0 +export MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION + +MICAS_M2_W6930_64QC_PLATFORM_MODULE = platform-modules-micas-m2-w6930-64qc_$(MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION)_amd64.deb +$(MICAS_M2_W6930_64QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6930-64qc-r0 +$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6930_64QC_PLATFORM_MODULE))) + +## M2-W6940-64OC +MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION = 1.0 +export MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION + +MICAS_M2_W6940_64OC_PLATFORM_MODULE = platform-modules-micas-m2-w6940-64oc_$(MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION)_amd64.deb +$(MICAS_M2_W6940_64OC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6940-64oc-r0 +$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6940_64OC_PLATFORM_MODULE))) + +## M2-W6920-32QC2X +MICAS_M2_W6920_32QC2X_PLATFORM_MODULE_VERSION = 1.0 +export MICAS_M2_W6920_32QC2X_PLATFORM_MODULE_VERSION + +MICAS_M2_W6920_32QC2X_PLATFORM_MODULE = platform-modules-micas-m2-w6920-32qc2x_$(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE_VERSION)_amd64.deb +$(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6920-32qc2x-r0 +$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE))) + ## M2-W6510-32C MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION = 1.0 export MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk index 4070f7be06a..e3f0e46cccc 100755 --- a/platform/broadcom/rules.mk +++ b/platform/broadcom/rules.mk @@ -56,5 +56,7 @@ $(SYNCD)_DEPENDS += $(BRCM_XGS_SAI) $(BRCM_XGS_SAI_DEV) $(SYNCD)_UNINSTALLS += $(BRCM_XGS_SAI_DEV) $(BRCM_XGS_SAI) ifeq ($(ENABLE_SYNCD_RPC),y) +# Remove the libthrift_0.11.0 dependency injected by rules/syncd.mk +$(SYNCD)_DEPENDS := $(filter-out $(LIBTHRIFT_DEV),$($(SYNCD)_DEPENDS)) $(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV) endif diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk index 05ca22e7319..ae65a000704 100644 --- a/platform/broadcom/sai-modules.mk +++ b/platform/broadcom/sai-modules.mk @@ -1,6 +1,6 @@ # Broadcom SAI modules -BRCM_OPENNSL_KERNEL_VERSION = 11.2.4.1 +BRCM_OPENNSL_KERNEL_VERSION = 12.1.0.2 BRCM_OPENNSL_KERNEL = opennsl-modules_$(BRCM_OPENNSL_KERNEL_VERSION)_amd64.deb $(BRCM_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules @@ -10,7 +10,7 @@ $(BRCM_OPENNSL_KERNEL)_MACHINE = broadcom SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL) # SAI bcm modules for DNX family ASIC -BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.9.1 +BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.13.1-1 BRCM_DNX_OPENNSL_KERNEL = opennsl-modules-dnx_$(BRCM_DNX_OPENNSL_KERNEL_VERSION)_amd64.deb $(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-dnx diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk index 85cdd54e562..5f8e04c339c 100644 --- a/platform/broadcom/sai.mk +++ b/platform/broadcom/sai.mk @@ -1,6 +1,6 @@ -LIBSAIBCM_XGS_VERSION = 11.2.13.1 -LIBSAIBCM_DNX_VERSION = 11.2.9.1 -LIBSAIBCM_XGS_BRANCH_NAME = SAI_11.2.0_GA +LIBSAIBCM_XGS_VERSION = 12.1.0.2 +LIBSAIBCM_DNX_VERSION = 11.2.13.1-1 +LIBSAIBCM_XGS_BRANCH_NAME = SAI_12.1.0_GA LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs" LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx" diff --git a/platform/broadcom/saibcm-modules/debian/changelog b/platform/broadcom/saibcm-modules/debian/changelog index dd635964bc7..d6d19cde8f4 100644 --- a/platform/broadcom/saibcm-modules/debian/changelog +++ b/platform/broadcom/saibcm-modules/debian/changelog @@ -1,3 +1,9 @@ +opennsl (12.1.0.2) unstable; urgency=medium + + * Update to Broadcom SAI 12.1.0.2 + + -- Ziting Guo Wed, 18 Dec 2024 02:33:59 +0000 + opennsl (11.2.4.1) unstable; urgency=medium * Update to Broadcom SAI 11.2.4.1 diff --git a/platform/broadcom/saibcm-modules/include/kcom.h b/platform/broadcom/saibcm-modules/include/kcom.h index 6a20600469e..17d3f3fb5c4 100644 --- a/platform/broadcom/saibcm-modules/include/kcom.h +++ b/platform/broadcom/saibcm-modules/include/kcom.h @@ -72,7 +72,7 @@ #define KCOM_M_CLOCK_CMD 52 /* Clock Commands */ #define KCOM_M_PCIE_LINK_STATUS 53 /* PCIe link status */ -#define KCOM_VERSION 16 /* Protocol version */ +#define KCOM_VERSION 17 /* Protocol version */ /* * Message status codes @@ -126,10 +126,11 @@ typedef struct kcom_msg_hdr_s { #define KCOM_NETIF_T_PORT 1 #define KCOM_NETIF_T_META 2 -#define KCOM_NETIF_F_ADD_TAG (1U << 0) -#define KCOM_NETIF_F_RCPU_ENCAP (1U << 1) +#define KCOM_NETIF_F_ADD_TAG (1U << 0) +#define KCOM_NETIF_F_RCPU_ENCAP (1U << 1) /* If a netif has this flag, the packet sent to the netif can't be stripped tag or added tag */ -#define KCOM_NETIF_F_KEEP_RX_TAG (1U << 2) +#define KCOM_NETIF_F_KEEP_RX_TAG (1U << 2) +#define KCOM_NETIF_F_USE_SHARED_NDEV (1U << 3) #define KCOM_NETIF_NAME_MAX 16 @@ -331,7 +332,7 @@ typedef struct kcom_eth_hw_config_s { } kcom_eth_hw_config_t; #ifndef KCOM_HW_INFO_OAMP_PORT_MAX -#define KCOM_HW_INFO_OAMP_PORT_MAX 4 +#define KCOM_HW_INFO_OAMP_PORT_MAX 8 #endif /* @@ -370,7 +371,7 @@ typedef struct kcom_msg_version_s { typedef struct kcom_clock_info_s { uint8 cmd; - int32 data[8]; + int32 data[12]; } kcom_clock_info_t; /* @@ -587,6 +588,7 @@ typedef struct kcom_msg_hw_info_s { uint32 udh_length_type[4]; uint32 udh_size; uint32 oamp_punted; + uint32 enet_channels; uint8 no_skip_udh_check; uint8 oam_dm_tod_exist; uint8 system_headers_mode; diff --git a/platform/broadcom/saibcm-modules/include/soc/devids.h b/platform/broadcom/saibcm-modules/include/soc/devids.h index a4ee14018a1..421e5e63237 100644 --- a/platform/broadcom/saibcm-modules/include/soc/devids.h +++ b/platform/broadcom/saibcm-modules/include/soc/devids.h @@ -1445,6 +1445,11 @@ #define BCM53653_B0_REV_ID 0x11 #define BCM53653_C0_REV_ID 0x21 +#define BCM53654_DEVICE_ID 0x8654 +#define BCM53654_A0_REV_ID 1 +#define BCM53654_B0_REV_ID 0x11 +#define BCM53654_C0_REV_ID 0x21 + /* Firebolt-5 */ #define BCM56565_DEVICE_ID 0xb565 #define BCM56565_A0_REV_ID 1 @@ -2044,6 +2049,11 @@ #define Q3_DEVICE_ID_END 0x886f #define J3AI_DEVICE_ID 0x8890 #define Q3D_DEVICE_ID 0x8870 +#ifdef BCM_Q3A_SUPPORT +#define Q3A_DEVICE_ID 0x8490 +#define Q3U_DEVICE_ID 0x8400 +#define Q3N_DEVICE_ID 0x8405 +#endif #endif #define Q2A_DEVICE_ID 0x8480 #define Q2A_A0_REV_ID DNXC_A0_REV_ID diff --git a/platform/broadcom/saibcm-modules/make/Make.config b/platform/broadcom/saibcm-modules/make/Make.config index 5e28e7222d2..c9eccf64d3f 100644 --- a/platform/broadcom/saibcm-modules/make/Make.config +++ b/platform/broadcom/saibcm-modules/make/Make.config @@ -62,10 +62,42 @@ endif -include ${SDK}/make/Make.local +ifdef ALL_DNX_CHIPS +ALL_DNX2_CHIPS = 1 +endif +ifdef ALL_DNXF_CHIPS +ALL_DNXF1_CHIPS = 1 +endif + ifdef ALL_CHIPS ESW_CHIPS = 1 endif # ALL_CHIPS +ifdef ALL_DNX_CHIPS + ALL_DNX2_CHIPS = 1 + ALL_DNX3_CHIPS = 1 + ALL_DNXF1_CHIPS = 1 + ALL_DNXF3_CHIPS = 1 +endif # ALL_CHIPS + +ifdef ALL_DNX2_CHIPS + CFGFLAGS += -DBCM_DNX_SUPPORT +endif + +ifdef ALL_DNX3_CHIPS + CFGFLAGS += -DBCM_DNX3_SUPPORT +endif + + +ifdef ALL_DNXF1_CHIPS + CFGFLAGS += -DBCM_DNXF_SUPPORT +endif + +ifdef ALL_DNXF3_CHIPS + CFGFLAGS += -DBCM_DNXF3_SUPPORT +endif + + # # By default, turn off the "changing directory" message. # @@ -174,6 +206,7 @@ INCFLAGS = -I${INCDIR} -I${SDK}/systems CFLAGS += ${INCFLAGS} CXXFLAGS += ${INCFLAGS} CPPFLAGS += ${INCFLAGS} + CFLAGS += -DSAI_FIXUP -UKCOM_FILTER_MAX -DKCOM_FILTER_MAX=1025 -UKCOM_NETIF_MAX -DKCOM_NETIF_MAX=1056 # Flag to enable multi instance support diff --git a/platform/broadcom/saibcm-modules/make/Make.depend b/platform/broadcom/saibcm-modules/make/Make.depend index f51ffd77bbf..7f737a26045 100644 --- a/platform/broadcom/saibcm-modules/make/Make.depend +++ b/platform/broadcom/saibcm-modules/make/Make.depend @@ -106,6 +106,15 @@ endif endif # !CLEANING +ifeq ($(ARCH),arm64) +# SAI: SONIC-76388 and SDK: SDK-367718 +# This macro removes the redundant macros and gcc options +# JIRA SONIC-69062 +UNIQE = $(if $1,$(firstword $1) $(call UNIQE,$(filter-out $(firstword $1),$1))) +CFLAGS := $(call UNIQE,$(CFLAGS)) +CFGFLAGS := $(call UNIQE,$(CFGFLAGS)) +endif + clean_d:: ifdef QUIET @$(ECHO) Cleaning dependencies for ${LOCALDIR} diff --git a/platform/broadcom/saibcm-modules/make/Make.kernlib b/platform/broadcom/saibcm-modules/make/Make.kernlib index 3051da05e1b..909607ef035 100644 --- a/platform/broadcom/saibcm-modules/make/Make.kernlib +++ b/platform/broadcom/saibcm-modules/make/Make.kernlib @@ -30,10 +30,6 @@ .SECONDARY:: ${BOBJS} -targetlibsoname = ${lib}.so.${SHAREDLIBVER} -targetlibrealname = ${targetlibsoname} -targetlibso = ${LIBDIR}/${targetlibrealname} - LIBSUFFIX=a ${LIBDIR}/%.a: ${BOBJS} @@ -42,11 +38,6 @@ ifdef QUIET endif $Q$(RM) $@ $Q$(AR) ${ARFLAGS} $@ $(sort ${BOBJS}) -ifeq ($(LINUX_MAKE_SHARED_LIB),1) -ifeq ($(targetbase),unix) - $(CC) -shared -Wl,-soname,${targetlibsoname} -o ${targetlibso} ${BOBJS} -lc -endif -endif # LINUX_MAKE_SHARED_LIB # targetlib = ${LIBDIR}/${lib}.${LIBSUFFIX} @@ -60,7 +51,6 @@ ifdef QUIET endif $Q$(RM) ${BOBJS} $Q$(RM) ${targetlib} - $Q$(RM) ${targetlibso} distclean:: clean diff --git a/platform/broadcom/saibcm-modules/make/Make.lib b/platform/broadcom/saibcm-modules/make/Make.lib index c6558c0cb18..e710c84b8fa 100644 --- a/platform/broadcom/saibcm-modules/make/Make.lib +++ b/platform/broadcom/saibcm-modules/make/Make.lib @@ -41,12 +41,14 @@ ifeq ($(FAST),1) endif endif -ifeq ($(LINUX_MAKE_SHARED_LIB),1) -LIBSUFFIX=so.${SHAREDLIBVER} -else -LIBSUFFIX=a +ifeq (1,$(SAND_ONLY)) + ifeq ($(LINUX_MAKE_SHARED_LIB),1) + LIBSUFFIX := so.${SHAREDLIBVER} + endif endif +LIBSUFFIX ?= a + targetlib = ${LIBDIR}/${lib}.${LIBSUFFIX} all:: ${BLDDIR}/.tree ${targetlib} @@ -57,12 +59,7 @@ ifdef QUIET @$(ECHO) Building library $(notdir $@) endif $Q$(RM) $@ -ifeq ($(LINUX_MAKE_SHARED_LIB),1) - $(CC) -shared -Wl,-soname,${lib}.${LIBSUFFIX}${EXTRA_LIB_LDFLAGS} -o ${targetlib} ${BOBJS} -lc -else $(AR) ${ARFLAGS} $@ $(sort ${BOBJS}) -endif - install:: all diff --git a/platform/broadcom/saibcm-modules/make/Make.linux b/platform/broadcom/saibcm-modules/make/Make.linux index 83871cdbbe5..f053c96dda2 100644 --- a/platform/broadcom/saibcm-modules/make/Make.linux +++ b/platform/broadcom/saibcm-modules/make/Make.linux @@ -35,10 +35,6 @@ # LINUX_MAKE_FLAGS # Additional flags passed to Make # -# LINUX_MAKE_USER -# Defined: user build -# Undefined: kernel build -# # LINUX_MAKE_DIR # Common makefile location, if it is not ../common # @@ -46,39 +42,11 @@ export DEST_DIR_SUFFIX :=$(subst $(realpath $(SDK))/systems,,$(realpath $(CURDIR)/$(dir ($(firstword $(MAKEFILE_LIST)))))) -ifeq (,$(kernel_version)) -kernel_version=2_4 -endif - -ifndef LINUX_MAKE_SHARED_LIB -LINUX_MAKE_SHARED_LIB=0 -endif - -ifeq (,$(SHAREDLIBVER)) -SHAREDLIBVER=1 -endif - -ifndef LINUX_MAKE_DIR -ifdef LINUX_MAKE_USER -LINUX_MAKE_DIR := $(SDK)/systems/linux/user/common -else -LINUX_MAKE_DIR := $(SDK)/systems/linux/kernel/common -endif -endif - -ifneq (,$(findstring iproc,$(platform))) - ADD_TO_CFLAGS += -DINCLUDE_MTD -endif +LINUX_MAKE_DIR ?= $(SDK)/systems/linux/user/common -ifdef LINUX_MAKE_USER - CMD = $(LINUX_MAKE_FLAGS) -C $(LINUX_MAKE_DIR) \ - platform=$(platform) bldroot_suffix=/$(platform) kernel_version=$(kernel_version) \ - LINUX_MAKE_SHARED_LIB=$(LINUX_MAKE_SHARED_LIB) SHAREDLIBVER=$(SHAREDLIBVER) -else - export LINUX_MAKE_KERNEL := 1 - CMD = $(LINUX_MAKE_FLAGS) -C $(LINUX_MAKE_DIR) \ - platform=$(platform) kernel_version=$(kernel_version) -endif +CMD = $(LINUX_MAKE_FLAGS) -C $(LINUX_MAKE_DIR) \ + platform=$(platform) kernel_version=$(kernel_version) \ + bldroot_suffix=/$(platform) ifneq (,$(MIPS_TOOLS_DIR)) CMD += MIPS_TOOLS_DIR=$(MIPS_TOOLS_DIR) diff --git a/platform/broadcom/saibcm-modules/make/Make.subdirs b/platform/broadcom/saibcm-modules/make/Make.subdirs index 2473764aec1..9f3cf705603 100644 --- a/platform/broadcom/saibcm-modules/make/Make.subdirs +++ b/platform/broadcom/saibcm-modules/make/Make.subdirs @@ -36,7 +36,7 @@ ifdef QUIET endif ${subdirs}:: - $Q$(MAKE) -C $@ kernel_version=$(kernel_version) LINUX_MAKE_SHARED_LIB=${LINUX_MAKE_SHARED_LIB} SHAREDLIBVER=${SHAREDLIBVER} ${CLEAN_SUBDIRS} + $Q$(MAKE) -C $@ kernel_version=$(kernel_version) ${CLEAN_SUBDIRS} clean clean_d install distclean:: ifdef QUIET diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts b/platform/broadcom/saibcm-modules/make/Makefile.linux-gts index 5ac089618a6..2f7b90d0636 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-gts @@ -43,14 +43,18 @@ #endif # some basic path variables for tools and kernel source, etc # -XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/gcc12.2 +XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-66 TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr -KERNDIR ?= /projects/ntsw-tools/linux/xlr-510/kernel/linux +ifeq (1,$(USE_CLANG)) +KERNDIR = $(XLR_TOOLS_BASE)/kernel/linux-clang +endif +KERNDIR ?= $(XLR_TOOLS_BASE)/kernel/linux + # Target machine for EDK-Host defconfig TARGET_MACHINE ?= x86_64 # set up cross compile prefix, tools dir variables. # -export CROSS_COMPILE := x86_64-broadcom-linux-gnu- +export CROSS_COMPILE := x86_64-linux- export TOOLS_DIR := $(TOOLCHAIN_DIR)/bin # architecture. # @@ -68,6 +72,7 @@ export PATH := $(TOOLCHAIN_DIR)/bin:$(KERNDIR):$(PATH) # set up SYSINC path # CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_DIR)/bin/$(CROSS_COMPILE)gcc -dumpversion) +CROSS_GCC_VER_MAJOR := $(shell echo $(CROSS_GCC_VER) | cut -f1 -d.) export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include # Glibc 2.27 or later version doesn't support SVID libm error handling. @@ -75,67 +80,61 @@ export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER export TCL840 := 1 # Common CFLAGS -CFLAGS += -DUSE_LINUX_BDE_MMAP=1 -#CFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT -CFLAGS += -Wno-error=unused-value -CFLAGS += -Wno-error=unused-function -CFLAGS += -Wno-error=cpp -CFLAGS += -Wno-error=array-bounds -CFLAGS += -Wno-error=strict-overflow +CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1 +#CFGFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT +OPT_CFLAGS += -Wno-error=unused-value +OPT_CFLAGS += -Wno-error=unused-function +OPT_CFLAGS += -Wno-error=cpp +OPT_CFLAGS += -Wno-error=array-bounds +OPT_CFLAGS += -Wno-error=strict-overflow CFLAGS += -L$(TOOLCHAIN_DIR)/lib CFLAGS += -L$(TOOLCHAIN_DIR)/lib64 -#CFLAGS += -Wl,--rpath=/lib64 # may need to set rpath and dynamic-linker path here (and possibly in KLFAGS below) in the future, # -#CFLAGS += -Wl,--dynamic-linker=/lib64/ld-linux-x86-64.so.2 # if we want to build the target executable to be used with shared libs # +#OPT_CFLAGS += -Wl,--rpath=/lib64 # may need to set rpath and dynamic-linker path here (and possibly in KLFAGS below) in the future, # +#OPT_CFLAGS += -Wl,--dynamic-linker=/lib64/ld-linux-x86-64.so.2 # if we want to build the target executable to be used with shared libs # # Compiler-specific CFLAGS ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS -CFLAGS += -Wno-strlcpy-strlcat-size -CFLAGS += -Wno-strncat-size -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 12)" "1" -export LIBNSL_DEPRECATED := 1 +OPT_CFLAGS += -Wno-strlcpy-strlcat-size +OPT_CFLAGS += -Wno-strncat-size +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" + export LIBNSL_DEPRECATED := 1 endif - else # GCC-specific CFLAGS -CFLAGS += -Wno-error=unused-but-set-variable -CFLAGS += -Wno-error=maybe-uninitialized -CFLAGS += -Wno-error=aggressive-loop-optimizations -CFLAGS += -Wno-error=sizeof-pointer-div #SDK-233830 -CFLAGS += -Wno-error=memset-elt-size #SDK-232626 -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 8)" "1" - CFLAGS += -Wno-stringop-overflow - CFLAGS += -Wno-stringop-truncation - CFLAGS += -Wno-error=restrict +OPT_CFLAGS += -Wno-error=unused-but-set-variable +OPT_CFLAGS += -Wno-error=maybe-uninitialized +OPT_CFLAGS += -Wno-error=aggressive-loop-optimizations +OPT_CFLAGS += -Wno-error=sizeof-pointer-div #SDK-233830 +OPT_CFLAGS += -Wno-error=memset-elt-size #SDK-232626 +OPT_CFLAGS += -Wno-error=unused-variable #SDK-232993 +OPT_CFLAGS += -Wno-deprecated-declarations #SDK-233174 +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1" + OPT_CFLAGS += -Wno-stringop-overflow + OPT_CFLAGS += -Wno-stringop-truncation + OPT_CFLAGS += -Wno-error=restrict endif -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 9)" "1" - CFLAGS += -Wno-address-of-packed-member +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1" + OPT_CFLAGS += -Wno-address-of-packed-member endif -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 10)" "1" - #There might be a bug in GCC10 that cannot detect initialization correctly. - CFLAGS += -Wno-error=uninitialized - CFLAGS += -Wno-error=format-overflow +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1" + OPT_CFLAGS += -Wno-error=uninitialized + OPT_CFLAGS += -Wno-error=format-overflow CFLAGS += -fcommon -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f2 -d.` \== 2)" "1" - CFLAGS += -Wno-zero-length-bounds + OPT_CFLAGS += -Wno-zero-length-bounds endif -endif -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 12)" "1" - CFGFLAGS += -flarge-source-files - CFGFLAGS += -Wno-error=address +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" + CFLAGS += -flarge-source-files + OPT_CFLAGS += -Wno-error=address export LIBNSL_DEPRECATED := 1 endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1" + OPT_CFLAGS += -Wno-error=enum-int-mismatch + CFLAGS += -fcf-protection +endif endif # Compiler-specific CFLAGS #XLDK-568 fix inline references CFGFLAGS += -fgnu89-inline -#XLR-54 -CFLAGS += -Wno-unused-variable #SDK-232993 -CFLAGS += -Wno-deprecated-declarations #SDK-233174 - -#CFLAGS += -Wno-unused-function -#CFLAGS += -Wno-aggressive-loop-optimizations -#CFLAGS += -Wno-maybe-uninitialized - # set up KFLAGS appropriately. # ifeq (,$(KFLAGS)) KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc index c38f713082b..5e6a37d1619 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc @@ -39,13 +39,13 @@ ifeq (BE,$(ENDIAN_MODE)) #While BE mode is supported, it's use is very limited. We had a specific customer #request for BE support but don't currently mainstream it. So a 5.1.0 version #has not been built. Continue using 5.0.3 for any BE support -TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk61-be/XLDK32 +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk63-be/XLDK32 KERN_BASE_DIR ?= $(TOOLCHAIN_BASE_DIR) TARGET_ARCHITECTURE:=armeb-broadcom-linux-uclibcgnueabi KERNDIR ?= $(TOOLCHAIN_BASE_DIR)/kernel/linux else -TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK32 -KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK32 +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk63/XLDK32 +KERN_BASE_DIR ?= $(TOOLCHAIN_BASE_DIR) TARGET_ARCHITECTURE:= arm-broadcom-linux-uclibcgnueabi KERNDIR ?= $(KERN_BASE_DIR)/kernel/linux endif @@ -77,32 +77,32 @@ ENDIAN = LE_HOST=1 endif CFLAGS += -fno-aggressive-loop-optimizations -CFLAGS += -Wno-error=maybe-uninitialized -CFLAGS += -Wno-error=unused-function -CFLAGS += -Wno-error=array-bounds -CFLAGS += -Wno-error=unused-variable -CFLAGS += -Wno-error=memset-elt-size #SDK-232626 -CFLAGS += -Wno-error=unused-const-variable +OPT_CFLAGS += -Wno-error=maybe-uninitialized +OPT_CFLAGS += -Wno-error=unused-function +OPT_CFLAGS += -Wno-error=array-bounds +OPT_CFLAGS += -Wno-error=unused-variable +OPT_CFLAGS += -Wno-error=memset-elt-size #SDK-232626 +OPT_CFLAGS += -Wno-error=unused-const-variable CFLAGS += -fgnu89-inline ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1" - CFLAGS += -Wno-stringop-overflow - CFLAGS += -Wno-stringop-truncation - CFLAGS += -Wno-error=restrict + OPT_CFLAGS += -Wno-stringop-overflow + OPT_CFLAGS += -Wno-stringop-truncation + OPT_CFLAGS += -Wno-error=restrict endif ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1" - CFLAGS += -Wno-address-of-packed-member + OPT_CFLAGS += -Wno-address-of-packed-member endif ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1" - CFLAGS += -Wno-error=uninitialized - CFLAGS += -Wno-error=format-overflow + OPT_CFLAGS += -Wno-error=uninitialized + OPT_CFLAGS += -Wno-error=format-overflow CFLAGS += -fcommon endif ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" CFLAGS += -flarge-source-files - CFLAGS += -Wno-error=address + OPT_CFLAGS += -Wno-error=address endif ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1" - CFLAGS += -Wno-error=enum-int-mismatch + OPT_CFLAGS += -Wno-error=enum-int-mismatch endif CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 index c98be8a2c04..1a5f5bb7328 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 @@ -43,13 +43,13 @@ endif ifeq (BE,$(ENDIAN_MODE)) #We've never actually built a 64 BE executable. Just here for any future #customer requirements. -TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk61-be/XLDK64 +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk63-be/XLDK64 KERN_BASE_DIR ?= $(TOOLCHAIN_BASE_DIR) TARGET_ARCHITECTURE ?= aarch64_be-broadcom-linux-uclibc KERNDIR ?= $(KERN_BASE_DIR)/kernel/linux else -TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK64 -KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK64 +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk63/XLDK64 +KERN_BASE_DIR ?= $(TOOLCHAIN_BASE_DIR) TARGET_ARCHITECTURE ?= aarch64-broadcom-linux-uclibc KERNDIR ?= $(KERN_BASE_DIR)/kernel/linux endif @@ -59,6 +59,7 @@ CROSS_COMPILE:= $(TARGET_ARCHITECTURE)- endif # A72 tools +# Setting default path # JIRA SONIC-69062 TOOLCHAIN_BIN_DIR?=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/bin override PATH:=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH) @@ -80,34 +81,35 @@ else CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 ENDIAN = LE_HOST=1 endif - -CFLAGS += -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS -CFLAGS += -DPHYS_ADDRS_ARE_64BITS +# JIRA SONIC-69062 +CFGFLAGS += -Wp,-w +CFGFLAGS += -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS +CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS CFLAGS += -fno-aggressive-loop-optimizations -fno-strict-overflow -CFLAGS += -Wno-error=maybe-uninitialized -CFLAGS += -Wno-error=unused-function -CFLAGS += -Wno-error=array-bounds -CFLAGS += -Wno-error=format-overflow +OPT_CFLAGS += -Wno-error=maybe-uninitialized +OPT_CFLAGS += -Wno-error=unused-function +OPT_CFLAGS += -Wno-error=array-bounds +OPT_CFLAGS += -Wno-error=format-overflow CFLAGS += -fgnu89-inline ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1" - CFLAGS += -Wno-stringop-overflow - CFLAGS += -Wno-stringop-truncation - CFLAGS += -Wno-error=restrict + OPT_CFLAGS += -Wno-stringop-overflow + OPT_CFLAGS += -Wno-stringop-truncation + OPT_CFLAGS += -Wno-error=restrict endif ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1" - CFLAGS += -Wno-address-of-packed-member + OPT_CFLAGS += -Wno-address-of-packed-member endif ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1" - CFLAGS += -Wno-error=uninitialized - CFLAGS += -Wno-error=format-overflow + OPT_CFLAGS += -Wno-error=uninitialized + OPT_CFLAGS += -Wno-error=format-overflow CFLAGS += -fcommon endif ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" CFLAGS += -flarge-source-files - CFLAGS += -Wno-error=address + OPT_CFLAGS += -Wno-error=address endif ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1" - CFLAGS += -Wno-error=enum-int-mismatch + OPT_CFLAGS += -Wno-error=enum-int-mismatch endif CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18 index 53522265687..59953d5ab67 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18 @@ -44,6 +44,7 @@ ifeq ($(USE_CLANG),1) CC = $(LSRUN) $(CROSS_COMPILE)gcc endif endif +export CC ifeq ($(origin CXX),default) CXX = $(CROSS_COMPILE)g++ diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk b/platform/broadcom/saibcm-modules/make/Makefile.linux-slk index fe20b9d5892..8cdb29fd8af 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-slk @@ -93,21 +93,21 @@ CLANG_ADD_CFLAGS += --target=$(TARGET_ARCHITECTURE) --gcc-toolchain=$(TOOLCHAIN_ export KERNEL_LLVM = 0 OPT_KERNEL_TOOLCHAIN = CC=$(CROSS_COMPILE)gcc LD=$(CROSS_COMPILE)ld AR=$(CROSS_COMPILE)ar else -CFLAGS += -Wno-unused-value -Wno-unused-but-set-variable -Wno-sizeof-pointer-memaccess -fno-aggressive-loop-optimizations +OPT_CFLAGS += -Wno-unused-value -Wno-unused-but-set-variable -Wno-sizeof-pointer-memaccess -fno-aggressive-loop-optimizations endif ifdef DPP_CHIPS -CFLAGS += -DDUNE_BCM -D__DUNE_LINUX_BCM_CPU_PCP_DMA__ +CFGFLAGS += -DDUNE_BCM -D__DUNE_LINUX_BCM_CPU_PCP_DMA__ CFGFLAGS += -DSOC_CM_FUNCTION endif ifdef DFE_CHIPS -CFLAGS += -DDUNE_BCM +CFGFLAGS += -DDUNE_BCM CFGFLAGS += -DSOC_CM_FUNCTION endif ifdef SAND_CHIPS -CFLAGS += -D__DUNE_SLK_BCM_CPU__ -D__DUNE_LINUX_BCM_CPU_PCIE__ +CFGFLAGS += -D__DUNE_SLK_BCM_CPU__ -D__DUNE_LINUX_BCM_CPU_PCIE__ endif # Enable cached DMA memory by default diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10 index 4463b1c88b3..5d938777473 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10 @@ -44,65 +44,48 @@ # some basic path variables for tools and kernel source, etc # -ifeq (1,$(NO_PRECOMPILED_MODULE)) -# { -# -# This is set due to some issue in binutils which has been fixed, apparently, in versions beyond 2.32. -# If this is not used, an error 'File format not recognized' is ejected and the compilation fails. -# -export BINUTILSVER := 2.33.1 -# } -else -# { -export BINUTILSVER := 2.38 -# } -endif +export BINUTILSVER := 2.41 + # # For ESW compilation, suppress 'stringop-overflow' # ifeq ($(BCM_ESW_SUPPORT),1) - CFGFLAGS += -Wno-error=stringop-overflow + OPT_CFLAGS += -Wno-error=stringop-overflow endif ifeq (1,$(GCC_12_1_0)) - export BINUTILSVER := 2.38 export GCCVER := 12.1.0 TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER) - CFGFLAGS += -Wno-error=address - CFGFLAGS += -Wno-error=format - CFGFLAGS += -Wno-error=long-long - CFGFLAGS += -Wno-error=pedantic - CFGFLAGS += -Wno-variadic-macros - CFGFLAGS += -Wno-error=overlength-strings else ifeq (1,$(GCC_13_1_0)) - export BINUTILSVER := 2.38 export GCCVER := 13.1.0 TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/13.1.0 ifneq ($(DEBUG_OPTIMIZE),FALSE) # { # These flags are required for -O2 'optimized' compilation + # We leave the suppression of array-bounds since, currently, + # GCC emits many 'false positive' errors of this kind (among a + # few that are justified) # - CFGFLAGS += -Wno-error=stringop-truncation - CFGFLAGS += -Wno-error=array-bounds= + OPT_CFLAGS += -Wno-error=array-bounds= # } endif - CFGFLAGS += -Wno-error=address - CFGFLAGS += -Wno-error=enum-int-mismatch - CFGFLAGS += -Wno-error=format - CFGFLAGS += -Wno-variadic-macros else - export BINUTILSVER := 2.38 export GCCVER := 11.2.0 TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/11.2.0-x86_64 ifneq ($(USE_CLANG),1) - CFGFLAGS += -Wno-error=sizeof-array-div - CFGFLAGS += -Wno-error=stringop-truncation - CFGFLAGS += -Wno-error=maybe-uninitialized - CFGFLAGS += -Wno-error=stringop-overread - CFGFLAGS += -Wno-error=format-overflow - CFGFLAGS += -Wno-error=array-bounds + OPT_CFLAGS += -Wno-error=array-bounds endif endif +#The LCOV tool is not compatible with GCC version 9.x and newer, thus we are forced to compile with older one. +ifeq (1,$(GCOV)) + ifeq ($(targetplat),user) + # GCC 8.1 does not work with binutils 2.41 and newer + export BINUTILSVER := 2.38 + export GCCVER := 8.1.0 + TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER) + endif +endif + BINUTILS_DIR = /tools/oss/packages/x86_64-rhel7/binutils/$(BINUTILSVER)/bin export TCL860 := 1 @@ -138,20 +121,20 @@ export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(GCCVER)/inclu # CFLAGS/CFGFLAGS # ifdef SAND_CHIPS -CFLAGS += -D__DUNE_GTS_BCM_CPU__ +CFGFLAGS += -D__DUNE_GTS_BCM_CPU__ endif -CFLAGS += -DUSE_LINUX_BDE_MMAP=1 -#CFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT +CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1 +#CFGFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT # #Flags to prevent gcc 8.1.0 new warnings to appear as errors. #(All these flags have been removed so as to activate the maximal types of #warning) # -#CFLAGS += -Wno-error=unused-value -#CFLAGS += -Wno-error=unused-but-set-variable -#CFLAGS += -Wno-error=maybe-uninitialized -#CFLAGS += -Wno-error=aggressive-loop-optimizations -#CFLAGS += -Wno-error=array-bounds +#OPT_CFLAGS += -Wno-error=unused-value +#OPT_CFLAGS += -Wno-error=unused-but-set-variable +#OPT_CFLAGS += -Wno-error=maybe-uninitialized +#OPT_CFLAGS += -Wno-error=aggressive-loop-optimizations +#OPT_CFLAGS += -Wno-error=array-bounds # set up KFLAGS appropriately. # # -fno-builtin needed for using kernel's version of memcpy instead of the gcc inline version @@ -191,13 +174,13 @@ endif CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ ifeq (,$(BUILD_32BITS_EXEC)) -CFLAGS += -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS +CFGFLAGS += -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS else CFLAGS += -m32 EXTRA_USER_LDFLAGS += -m32 CFGFLAGS += -DSAL_BDE_32BIT_USER_64BIT_KERNEL endif -CFLAGS += -DPHYS_ADDRS_ARE_64BITS +CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS ########################################################################################### diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28 index 5e86e1d579f..1533626e508 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28 @@ -44,64 +44,40 @@ # some basic path variables for tools and kernel source, etc # -ifeq (1,$(NO_PRECOMPILED_MODULE)) -# { -# -# This is set due to some issue in binutils which has been fixed, apparently, in versions beyond 2.32. -# If this is not used, an error 'File format not recognized' is ejected and the compilation fails. -# -export BINUTILSVER := 2.33.1 -# } -else -# { -export BINUTILSVER := 2.38 -# } -endif - # # For ESW compilation, suppress 'stringop-overflow' # ifeq ($(BCM_ESW_SUPPORT),1) - CFGFLAGS += -Wno-error=stringop-overflow + OPT_CFLAGS += -Wno-error=stringop-overflow endif ifeq (1,$(GCC_11_2_0)) - export BINUTILSVER := 2.38 + export BINUTILSVER := 2.41 export GCCVER := 11.2.0 TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/11.2.0-x86_64 - CFGFLAGS += -Wno-error=stringop-truncation - CFGFLAGS += -Wno-error=maybe-uninitialized - CFGFLAGS += -Wno-error=stringop-overread - CFGFLAGS += -Wno-error=format-overflow - CFGFLAGS += -Wno-error=array-bounds + OPT_CFLAGS += -Wno-error=array-bounds else ifeq (1,$(GCC_12_1_0)) - export BINUTILSVER := 2.38 + export BINUTILSVER := 2.41 export GCCVER := 12.1.0 TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER) - CFGFLAGS += -Wno-error=address - CFGFLAGS += -Wno-error=format - CFGFLAGS += -Wno-error=long-long - CFGFLAGS += -Wno-error=pedantic - CFGFLAGS += -Wno-variadic-macros - CFGFLAGS += -Wno-error=overlength-strings else ifeq (1,$(GCC_13_1_0)) - export BINUTILSVER := 2.38 + export BINUTILSVER := 2.41 export GCCVER := 13.1.0 TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/13.1.0 ifneq ($(DEBUG_OPTIMIZE),FALSE) # { # These flags are required for -O2 'optimized' compilation + # We leave the suppression of array-bounds since, currently, + # GCC emits many 'false positive' errors of this kind (among a + # few that are justified) # - CFGFLAGS += -Wno-error=stringop-truncation - CFGFLAGS += -Wno-error=array-bounds= + OPT_CFLAGS += -Wno-error=array-bounds= # } endif - CFGFLAGS += -Wno-error=address - CFGFLAGS += -Wno-error=enum-int-mismatch - CFGFLAGS += -Wno-error=format - CFGFLAGS += -Wno-variadic-macros else + # GCC 8.1 does not work with binutils 2.41 and newer + export BINUTILSVER := 2.38 export GCCVER := 8.1.0 TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER) endif @@ -155,11 +131,11 @@ CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1 #(All these flags have been removed so as to activate the maximal types of #warning) # -#CFLAGS += -Wno-error=unused-value -#CFLAGS += -Wno-error=unused-but-set-variable -#CFLAGS += -Wno-error=maybe-uninitialized -#CFLAGS += -Wno-error=aggressive-loop-optimizations -#CFLAGS += -Wno-error=array-bounds +#OPT_CFLAGS += -Wno-error=unused-value +#OPT_CFLAGS += -Wno-error=unused-but-set-variable +#OPT_CFLAGS += -Wno-error=maybe-uninitialized +#OPT_CFLAGS += -Wno-error=aggressive-loop-optimizations +#OPT_CFLAGS += -Wno-error=array-bounds # set up KFLAGS appropriately. # # -fno-builtin needed for using kernel's version of memcpy instead of the gcc inline version diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 index 726c2ea29e8..bbfcc82867c 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 @@ -34,12 +34,15 @@ endif # Default architecture ifeq (,$(ARCH)) -ARCH = $(shell uname -p) +ARCH = $(shell uname -m) ifneq (x86_64,$(ARCH)) ARCH = i386 endif endif +# Target machine for EDK-Host defconfig +TARGET_MACHINE ?= x86_64 + # Noisy kernel build KBUILD_VERBOSE = 1 diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 index e34cc42b305..90651a35729 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 @@ -45,6 +45,17 @@ ifneq (,$(shell ls $(LINUX_UAPI) 2>/dev/null)) KFLAGS += -I$(LINUX_INCLUDE)/uapi -I$(LINUX_INCLUDE)/generated/uapi -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/arch/x86/include/generated/uapi endif +GCC_MAJOR_VER = $(shell GCCVER=$(GCCVER) $(CC) -dumpversion | cut -d'.' -f1) + +ifeq (${GCC_MAJOR_VER}, 11) + CFGFLAGS += -Wno-error=sizeof-array-div + CFGFLAGS += -Wno-error=stringop-overread +endif +CFGFLAGS += -Wno-error=stringop-truncation +CFGFLAGS += -Wno-error=maybe-uninitialized +CFGFLAGS += -Wno-error=format-overflow +CFGFLAGS += -Wno-error=array-bounds + ifdef LTSW_CHIPS # Ensure we do not use an out-of-date libelf.so ELFUTILS_MIN = 158 diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr b/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr index 5ac089618a6..2f7b90d0636 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr @@ -43,14 +43,18 @@ #endif # some basic path variables for tools and kernel source, etc # -XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/gcc12.2 +XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-66 TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr -KERNDIR ?= /projects/ntsw-tools/linux/xlr-510/kernel/linux +ifeq (1,$(USE_CLANG)) +KERNDIR = $(XLR_TOOLS_BASE)/kernel/linux-clang +endif +KERNDIR ?= $(XLR_TOOLS_BASE)/kernel/linux + # Target machine for EDK-Host defconfig TARGET_MACHINE ?= x86_64 # set up cross compile prefix, tools dir variables. # -export CROSS_COMPILE := x86_64-broadcom-linux-gnu- +export CROSS_COMPILE := x86_64-linux- export TOOLS_DIR := $(TOOLCHAIN_DIR)/bin # architecture. # @@ -68,6 +72,7 @@ export PATH := $(TOOLCHAIN_DIR)/bin:$(KERNDIR):$(PATH) # set up SYSINC path # CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_DIR)/bin/$(CROSS_COMPILE)gcc -dumpversion) +CROSS_GCC_VER_MAJOR := $(shell echo $(CROSS_GCC_VER) | cut -f1 -d.) export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include # Glibc 2.27 or later version doesn't support SVID libm error handling. @@ -75,67 +80,61 @@ export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER export TCL840 := 1 # Common CFLAGS -CFLAGS += -DUSE_LINUX_BDE_MMAP=1 -#CFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT -CFLAGS += -Wno-error=unused-value -CFLAGS += -Wno-error=unused-function -CFLAGS += -Wno-error=cpp -CFLAGS += -Wno-error=array-bounds -CFLAGS += -Wno-error=strict-overflow +CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1 +#CFGFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT +OPT_CFLAGS += -Wno-error=unused-value +OPT_CFLAGS += -Wno-error=unused-function +OPT_CFLAGS += -Wno-error=cpp +OPT_CFLAGS += -Wno-error=array-bounds +OPT_CFLAGS += -Wno-error=strict-overflow CFLAGS += -L$(TOOLCHAIN_DIR)/lib CFLAGS += -L$(TOOLCHAIN_DIR)/lib64 -#CFLAGS += -Wl,--rpath=/lib64 # may need to set rpath and dynamic-linker path here (and possibly in KLFAGS below) in the future, # -#CFLAGS += -Wl,--dynamic-linker=/lib64/ld-linux-x86-64.so.2 # if we want to build the target executable to be used with shared libs # +#OPT_CFLAGS += -Wl,--rpath=/lib64 # may need to set rpath and dynamic-linker path here (and possibly in KLFAGS below) in the future, # +#OPT_CFLAGS += -Wl,--dynamic-linker=/lib64/ld-linux-x86-64.so.2 # if we want to build the target executable to be used with shared libs # # Compiler-specific CFLAGS ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS -CFLAGS += -Wno-strlcpy-strlcat-size -CFLAGS += -Wno-strncat-size -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 12)" "1" -export LIBNSL_DEPRECATED := 1 +OPT_CFLAGS += -Wno-strlcpy-strlcat-size +OPT_CFLAGS += -Wno-strncat-size +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" + export LIBNSL_DEPRECATED := 1 endif - else # GCC-specific CFLAGS -CFLAGS += -Wno-error=unused-but-set-variable -CFLAGS += -Wno-error=maybe-uninitialized -CFLAGS += -Wno-error=aggressive-loop-optimizations -CFLAGS += -Wno-error=sizeof-pointer-div #SDK-233830 -CFLAGS += -Wno-error=memset-elt-size #SDK-232626 -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 8)" "1" - CFLAGS += -Wno-stringop-overflow - CFLAGS += -Wno-stringop-truncation - CFLAGS += -Wno-error=restrict +OPT_CFLAGS += -Wno-error=unused-but-set-variable +OPT_CFLAGS += -Wno-error=maybe-uninitialized +OPT_CFLAGS += -Wno-error=aggressive-loop-optimizations +OPT_CFLAGS += -Wno-error=sizeof-pointer-div #SDK-233830 +OPT_CFLAGS += -Wno-error=memset-elt-size #SDK-232626 +OPT_CFLAGS += -Wno-error=unused-variable #SDK-232993 +OPT_CFLAGS += -Wno-deprecated-declarations #SDK-233174 +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1" + OPT_CFLAGS += -Wno-stringop-overflow + OPT_CFLAGS += -Wno-stringop-truncation + OPT_CFLAGS += -Wno-error=restrict endif -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 9)" "1" - CFLAGS += -Wno-address-of-packed-member +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1" + OPT_CFLAGS += -Wno-address-of-packed-member endif -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 10)" "1" - #There might be a bug in GCC10 that cannot detect initialization correctly. - CFLAGS += -Wno-error=uninitialized - CFLAGS += -Wno-error=format-overflow +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1" + OPT_CFLAGS += -Wno-error=uninitialized + OPT_CFLAGS += -Wno-error=format-overflow CFLAGS += -fcommon -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f2 -d.` \== 2)" "1" - CFLAGS += -Wno-zero-length-bounds + OPT_CFLAGS += -Wno-zero-length-bounds endif -endif -ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 12)" "1" - CFGFLAGS += -flarge-source-files - CFGFLAGS += -Wno-error=address +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" + CFLAGS += -flarge-source-files + OPT_CFLAGS += -Wno-error=address export LIBNSL_DEPRECATED := 1 endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1" + OPT_CFLAGS += -Wno-error=enum-int-mismatch + CFLAGS += -fcf-protection +endif endif # Compiler-specific CFLAGS #XLDK-568 fix inline references CFGFLAGS += -fgnu89-inline -#XLR-54 -CFLAGS += -Wno-unused-variable #SDK-232993 -CFLAGS += -Wno-deprecated-declarations #SDK-233174 - -#CFLAGS += -Wno-unused-function -#CFLAGS += -Wno-aggressive-loop-optimizations -#CFLAGS += -Wno-maybe-uninitialized - # set up KFLAGS appropriately. # ifeq (,$(KFLAGS)) KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm diff --git a/platform/broadcom/saibcm-modules/sdklt/Makefile b/platform/broadcom/saibcm-modules/sdklt/Makefile index 5600a33a350..968d2ad3e39 100644 --- a/platform/broadcom/saibcm-modules/sdklt/Makefile +++ b/platform/broadcom/saibcm-modules/sdklt/Makefile @@ -56,11 +56,13 @@ KNET_BLDDIR := $(OUTPUT_DIR)/knet KNETCB_BLDDIR := $(OUTPUT_DIR)/knetcb BCMGENL_BLDDIR := $(OUTPUT_DIR)/bcmgenl GENL_PACKET_BLDDIR := $(OUTPUT_DIR)/genl-packet +EDK_BLDDIR := $(OUTPUT_DIR)/edk +PTP_BLDDIR := $(OUTPUT_DIR)/ptpclock LKM_CFLAGS += -UNGKNET_NETIF_MAX -DNGKNET_NETIF_MAX=1056 -UNGKNET_FILTER_MAX -DNGKNET_FILTER_MAX=1025 export LKM_CFLAGS -kmod: bde knet knetcb genl-packet bcmgenl +kmod: bde knet knetcb genl-packet bcmgenl edk ptpclock bde: $(MAKE) -C $(SDK)/linux/bde SDK=$(SDK) \ @@ -82,7 +84,6 @@ knetcb: knet bcmgenl: knet genl-packet $(MAKE) -C $(SDK)/linux/bcmgenl SDK=$(SDK) \ KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \ - KBUILD_EXTRA_SYMBOLS+=$(GENL_PACKET_BLDDIR)/Module.symvers \ LKM_BLDDIR=$(BCMGENL_BLDDIR) $(TARGET) ln -sf $(BCMGENL_BLDDIR)/*.ko $(OUTPUT_DIR) @@ -91,6 +92,19 @@ genl-packet: LKM_BLDDIR=$(GENL_PACKET_BLDDIR) $(TARGET) ln -sf $(GENL_PACKET_BLDDIR)/*.ko $(OUTPUT_DIR) +edk: bde + $(MAKE) -C $(SDK)/linux/edk SDK=$(SDK) \ + KBUILD_EXTRA_SYMBOLS=$(BDE_BLDDIR)/Module.symvers \ + LKM_BLDDIR=$(EDK_BLDDIR) $(TARGET) + ln -sf $(EDK_BLDDIR)/*.ko $(OUTPUT_DIR) + +ptpclock: knet edk + $(MAKE) -C $(SDK)/linux/ptpclock SDK=$(SDK) \ + KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \ + KBUILD_EXTRA_SYMBOLS+=$(EDK_BLDDIR)/Module.symvers \ + KBUILD_EXTRA_SYMBOLS+=$(BDE_BLDDIR)/Module.symvers \ + LKM_BLDDIR=$(PTP_BLDDIR) $(TARGET) + ln -sf $(PTP_BLDDIR)/*.ko $(OUTPUT_DIR) clean: $(MAKE) kmod TARGET=$@ rm -f $(OUTPUT_DIR)/*.ko @@ -99,4 +113,4 @@ distclean: $(MAKE) kmod TARGET=$@ rm -rf $(OUTPUT_DIR) -.PHONY: help kmod bde knet knetcb genl-packet bcmgenl clean distclean +.PHONY: help kmod bde knet knetcb genl-packet bcmgenl edk ptpclock clean distclean diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c index de9e2e3bdf0..74c78973fd1 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c @@ -351,6 +351,8 @@ bcmcnet_cmicr2_pdma_driver_attach(struct pdma_dev *dev) hw->dops.pkt_xmit = cmicr2_pdma_pkt_xmit; + dev->flags |= PDMA_NO_FCS; + return SHR_E_NONE; } diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h index 6ab4327a3ff..edc77c18335 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h @@ -23,8 +23,8 @@ #ifndef BCMCNET_CORE_H #define BCMCNET_CORE_H -#include "bcmcnet_types.h" -#include "bcmcnet_internal.h" +#include +#include /*! * \brief Packet header structure. @@ -923,6 +923,8 @@ struct pdma_dev { #define PDMA_VNET_DOCKED (1 << 5) /*! Abort PDMA mode for suspend and resume */ #define PDMA_ABORT (1 << 6) + /*! No FCS for Rx/Tx packets */ +#define PDMA_NO_FCS (1 << 7) /*! Extra poll time in microseconds */ int extra_poll_time; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h index 2dfa87a635f..ea14c91f8df 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h @@ -186,7 +186,7 @@ bcmdrd_pbmp_parse(const char *str, bcmdrd_pbmp_t *pbmp); * the subsequent statement for all bits set in the port bitmap. * * \param [in] _pbmp Port bitmap. - * \param [in] _port Port iterator variable. + * \param [out] _port Port iterator variable. */ #define BCMDRD_PBMP_ITER(_pbmp, _port) \ for (_port = 0; _port < BCMDRD_CONFIG_MAX_PORTS; _port++) \ @@ -194,6 +194,28 @@ bcmdrd_pbmp_parse(const char *str, bcmdrd_pbmp_t *pbmp); _port += 31; \ else if (BCMDRD_PBMP_MEMBER(_pbmp, _port)) +/*! + * \brief Iterate over a port bitmap with maximum. + * + * Iterate over a port bitmap of type \ref bcmdrd_pbmp_t and execute + * the subsequent statement for all bits set in the port bitmap. + * + * The iteration will be terminated if the iterator variable reaches + * the value of \c _port_max. This macro is mainly intended to prevent + * false errors from static analysis tools like Coverity. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _port_max Maximum number of ports. + * \param [out] _port Port iterator variable. + */ +#define BCMDRD_PBMP_MAX_ITER(_pbmp, _port_max, _port) \ + for (_port = 0; \ + _port < _port_max && _port < BCMDRD_CONFIG_MAX_PORTS; \ + _port++) \ + if (BCMDRD_PBMP_WORD(_pbmp, _port) == 0) \ + _port += 31; \ + else if (BCMDRD_PBMP_MEMBER(_pbmp, _port)) + /*! * \brief Add a port to a port bitmap. * @@ -500,11 +522,34 @@ bcmdrd_pipemap_is_null(const bcmdrd_pipemap_t *pm); * bitmap. * * \param [in] _pm Pipe map. - * \param [in] _pipe Pipe iterator variable. + * \param [out] _pipe Pipe iterator variable. */ -#define BCMDRD_PIPEMAP_ITER(_pm, _pipe) \ +#define BCMDRD_PIPEMAP_ITER(_pm, _pipe) \ for (_pipe = 0; _pipe < BCMDRD_CONFIG_MAX_PIPES; _pipe++) \ - if (BCMDRD_PIPEMAP_WORD(_pm, _pipe) == 0) \ + if (BCMDRD_PIPEMAP_WORD(_pm, _pipe) == 0) \ + _pipe += 31; \ + else if (BCMDRD_PIPEMAP_MEMBER(_pm, _pipe)) + +/*! + * \brief Iterate over a pipe map with maximum. + * + * Iterate over a pipe map of type \ref bcmdrd_pipemap_t and + * execute the subsequent statement for all bits set in the pipe + * bitmap. + * + * The iteration will be terminated if the iterator variable reaches + * the value of \c _pipe_max. This macro is mainly intended to prevent + * false errors from static analysis tools like Coverity. + * + * \param [in] _pm Pipe map. + * \param [in] _pipe_max Maximum number of pipes. + * \param [out] _pipe Pipe iterator variable. + */ +#define BCMDRD_PIPEMAP_MAX_ITER(_pm, _pipe_max, _pipe) \ + for (_pipe = 0; \ + _pipe < _pipe_max && _pipe < BCMDRD_CONFIG_MAX_PIPES; \ + _pipe++) \ + if (BCMDRD_PIPEMAP_WORD(_pm, _pipe) == 0) \ _pipe += 31; \ else if (BCMDRD_PIPEMAP_MEMBER(_pm, _pipe)) diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h index f222215a68f..1829a216394 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h @@ -26,17 +26,17 @@ * * (1) #define BCMDRD_CONFIG_INCLUDE_ [1|0] * -- Include or exclude all revisions of the given device - * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780 1 + * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080 1 * * (2) #define BCMDRD_CONFIG_INCLUDE__X [1|0] * -- Include or exclude all versions of the given revision - * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780_Ax 0 - * #define BCMDRD_CONFIG_INCLUde_BCM56780_Bx 1 + * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_Ax 0 + * #define BCMDRD_CONFIG_INCLUde_BCM56080_Bx 1 * * (3) #define BCMDRD_CONFIG_INCLUDE_ [1|0] * -- Include or exclude an exact device - * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1 - * #define BCMDRD_CONFIG_INCLUDE_BCM56780_A1 0 + * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 + * #define BCMDRD_CONFIG_INCLUDE_BCM56080_A1 0 * * * The value of BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT is used for any diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h index 79da85ad8a8..f30dacf5d1f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h @@ -159,6 +159,9 @@ typedef struct bcmlrd_pdd_info_s { /*! If set, then PDD is aligned from LSB. */ bool is_lsb; + + /*! Absolute offset of container in the container list. */ + uint16_t bit_offset; } bcmlrd_pdd_info_t; /*! diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h index 20e2df1b9ee..684b80a9970 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h @@ -29,7 +29,7 @@ /*+replace reverse */ #include "../../defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h" #include "../../defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h" -#include "../../defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_lrd_variant_def.h" +#include "../../defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_lrd_variant_def.h" #include "../../defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h" #include "../../defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h" #include "../../defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h" @@ -37,18 +37,18 @@ #include "../../defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h" #include "../../defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h" #include "../../defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_lrd_variant_def.h" #include "../../defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_lrd_variant_def.h" #include "../../defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_lrd_variant_def.h" #include "../../defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_lrd_variant_def.h" #include "../../defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h" #include "../../defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h" /*-replace*/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_lrd_variant_def.h old mode 100755 new mode 100644 similarity index 80% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_lrd_variant_def.h index 73fa0876d1b..c5376c11ef1 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_lrd_variant_def.h @@ -24,13 +24,13 @@ * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_HNA_6_5_30_6_0_LRD_VARIANT_DEF_H -#define GEN_BCM56780_A0_HNA_6_5_30_6_0_LRD_VARIANT_DEF_H +#ifndef GEN_BCM56690_A0_DNA_6_5_31_7_0_LRD_VARIANT_DEF_H +#define GEN_BCM56690_A0_DNA_6_5_31_7_0_LRD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLRD_VARIANT_BCM56780_A0_HNA_6_5_30_6_0 BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_30_6_0 +#define BCMLRD_VARIANT_BCM56690_A0_DNA_6_5_31_7_0 BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_31_7_0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56780_A0_HNA_6_5_30_6_0_LRD_VARIANT_DEF_H */ +#endif /* GEN_BCM56690_A0_DNA_6_5_31_7_0_LRD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_lrd_variant_def.h old mode 100755 new mode 100644 similarity index 80% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_lrd_variant_def.h index 4bc81f8e474..57b0eb30cd0 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_lrd_variant_def.h @@ -24,13 +24,13 @@ * ******************************************************************************/ -#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LRD_VARIANT_DEF_H -#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LRD_VARIANT_DEF_H +#ifndef GEN_BCM56780_A0_CNA_6_5_31_3_0_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_CNA_6_5_31_3_0_LRD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLRD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1 BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1 +#define BCMLRD_VARIANT_BCM56780_A0_CNA_6_5_31_3_0 BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_31_3_0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LRD_VARIANT_DEF_H */ +#endif /* GEN_BCM56780_A0_CNA_6_5_31_3_0_LRD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_lrd_variant_def.h old mode 100755 new mode 100644 similarity index 80% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_lrd_variant_def.h index 05347a2d6aa..bdb8f646cfd --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_lrd_variant_def.h @@ -24,13 +24,13 @@ * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H -#define GEN_BCM56780_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H +#ifndef GEN_BCM56780_A0_DNA_6_5_31_7_0_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_DNA_6_5_31_7_0_LRD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLRD_VARIANT_BCM56780_A0_CNA_6_5_30_2_0 BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_30_2_0 +#define BCMLRD_VARIANT_BCM56780_A0_DNA_6_5_31_7_0 BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_31_7_0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56780_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H */ +#endif /* GEN_BCM56780_A0_DNA_6_5_31_7_0_LRD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_lrd_variant_def.h old mode 100755 new mode 100644 similarity index 80% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_lrd_variant_def.h index 23f5c62f6f4..99fc561ffe8 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_lrd_variant_def.h @@ -24,13 +24,13 @@ * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_DNA_6_5_30_2_0_LRD_VARIANT_DEF_H -#define GEN_BCM56780_A0_DNA_6_5_30_2_0_LRD_VARIANT_DEF_H +#ifndef GEN_BCM56780_A0_HNA_6_5_31_3_0_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_HNA_6_5_31_3_0_LRD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLRD_VARIANT_BCM56780_A0_DNA_6_5_30_2_0 BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_30_2_0 +#define BCMLRD_VARIANT_BCM56780_A0_HNA_6_5_31_3_0 BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_31_3_0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56780_A0_DNA_6_5_30_2_0_LRD_VARIANT_DEF_H */ +#endif /* GEN_BCM56780_A0_HNA_6_5_31_3_0_LRD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_lrd_variant_def.h deleted file mode 100755 index e0984c1463c..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_lrd_variant_def.h +++ /dev/null @@ -1,36 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_DNA_6_5_30_1_1_LRD_VARIANT_DEF_H -#define GEN_BCM56880_A0_DNA_6_5_30_1_1_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM56880_A0_DNA_6_5_30_1_1 BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_30_1_1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_DNA_6_5_30_1_1_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_lrd_variant_def.h new file mode 100644 index 00000000000..97c79ac4736 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_DNA_6_5_31_6_0_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_DNA_6_5_31_6_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_DNA_6_5_31_6_0 BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_31_6_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_DNA_6_5_31_6_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_lrd_variant_def.h deleted file mode 100755 index 1af4ea229bf..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_lrd_variant_def.h +++ /dev/null @@ -1,36 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_HNA_6_5_30_3_0_LRD_VARIANT_DEF_H -#define GEN_BCM56880_A0_HNA_6_5_30_3_0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM56880_A0_HNA_6_5_30_3_0 BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_30_3_0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_HNA_6_5_30_3_0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_lrd_variant_def.h new file mode 100644 index 00000000000..1a1e632b9ed --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_31_3_0_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_HNA_6_5_31_3_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_HNA_6_5_31_3_0 BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_31_3_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_HNA_6_5_31_3_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h deleted file mode 100755 index af6ea4ed85b..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h +++ /dev/null @@ -1,36 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_NFA_6_5_30_1_1_LRD_VARIANT_DEF_H -#define GEN_BCM56880_A0_NFA_6_5_30_1_1_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM56880_A0_NFA_6_5_30_1_1 BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_30_1_1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_NFA_6_5_30_1_1_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_lrd_variant_def.h new file mode 100644 index 00000000000..e7e9cb62e80 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_6_5_31_3_1_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_NFA_6_5_31_3_1_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_NFA_6_5_31_3_1 BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_31_3_1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_NFA_6_5_31_3_1_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_lrd_variant_def.h deleted file mode 100755 index dc5af3486b9..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_lrd_variant_def.h +++ /dev/null @@ -1,36 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H -#define GEN_BCM56890_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM56890_A0_CNA_6_5_30_2_0 BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_30_2_0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56890_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_lrd_variant_def.h new file mode 100644 index 00000000000..70385f1d6ac --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_31_3_0_LRD_VARIANT_DEF_H +#define GEN_BCM56890_A0_CNA_6_5_31_3_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56890_A0_CNA_6_5_31_3_0 BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_31_3_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_CNA_6_5_31_3_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_lrd_variant_def.h deleted file mode 100755 index 32ca4177798..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_lrd_variant_def.h +++ /dev/null @@ -1,36 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_DNA_6_5_30_8_0_LRD_VARIANT_DEF_H -#define GEN_BCM56890_A0_DNA_6_5_30_8_0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM56890_A0_DNA_6_5_30_8_0 BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_30_8_0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56890_A0_DNA_6_5_30_8_0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_lrd_variant_def.h new file mode 100644 index 00000000000..1203b6c1d7d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_31_6_0_LRD_VARIANT_DEF_H +#define GEN_BCM56890_A0_DNA_6_5_31_6_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56890_A0_DNA_6_5_31_6_0 BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_31_6_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_DNA_6_5_31_6_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_lrd_variant_def.h deleted file mode 100755 index 4708d71d8f5..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_lrd_variant_def.h +++ /dev/null @@ -1,36 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78800_A0_DNA_6_5_30_3_1_LRD_VARIANT_DEF_H -#define GEN_BCM78800_A0_DNA_6_5_30_3_1_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM78800_A0_DNA_6_5_30_3_1 BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_30_3_1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78800_A0_DNA_6_5_30_3_1_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_lrd_variant_def.h new file mode 100644 index 00000000000..7d884106722 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_DNA_6_5_31_5_0_LRD_VARIANT_DEF_H +#define GEN_BCM78800_A0_DNA_6_5_31_5_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM78800_A0_DNA_6_5_31_5_0 BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_31_5_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78800_A0_DNA_6_5_31_5_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h index b677351a447..3938c50b64e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h @@ -1,13 +1,13 @@ /*! \file bcmltd_variant.h * - * \brief BCMLTD Variant initerfaces and definitions + * \brief BCMLTD Variant interfaces and definitions * * Logical table variant inclusion and exclusion support within the * BCMLTD can be specified as a combination of the following defines: * * #define BCMLTD_CONFIG_INCLUDE__X_ [1|0] * -- Include or exclude the specified variant - * Example: #define BCMLTD_CONFIG_INCLUDE_BCM56880_UTLTM 1 + * Example: #define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 1 * * The value of BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT is used for any * variants which are left unspecified. Set this value to 1 or 0 to diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h old mode 100755 new mode 100644 index 804903e0934..d459f0845d3 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h @@ -29,7 +29,7 @@ /*+replace reverse */ #include "../../conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h" #include "../../conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h" -#include "../../conf/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_config_variant.h" +#include "../../conf/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_config_variant.h" #include "../../conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h" #include "../../conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h" #include "../../conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h" @@ -37,18 +37,18 @@ #include "../../conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h" #include "../../conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h" #include "../../conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_config_variant.h" #include "../../conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_config_variant.h" -#include "../../conf/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_config_variant.h" #include "../../conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_config_variant.h" #include "../../conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h" +#include "../../conf/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_config_variant.h" #include "../../conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h" #include "../../conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h" /*-replace*/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h old mode 100755 new mode 100644 index 079bbb5be10..7592194dda5 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h @@ -29,7 +29,7 @@ /*+replace reverse */ #include "../../defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h" #include "../../defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h" -#include "../../defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h" +#include "../../defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_def.h" #include "../../defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h" #include "../../defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h" #include "../../defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h" @@ -37,18 +37,18 @@ #include "../../defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h" #include "../../defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h" #include "../../defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_def.h" #include "../../defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h" #include "../../defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_def.h" #include "../../defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_def.h" #include "../../defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h" #include "../../defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h" /*-replace*/ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h old mode 100755 new mode 100644 index 7d68a5e0255..98eced708e0 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h @@ -43,15 +43,15 @@ #include "../../entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h" #include "../../entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h" #include "../../entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h" -#include "../../entry/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_entry.h" -#include "../../entry/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h" -#include "../../entry/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_entry.h" +#include "../../entry/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_entry.h" +#include "../../entry/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_entry.h" /*-replace*/ #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_config_variant.h old mode 100755 new mode 100644 similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_config_variant.h index 8b436739ed3..c683383ecee --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_config_variant.h @@ -24,26 +24,26 @@ * ******************************************************************************/ -#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_CONFIG_VARIANT_H -#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_CONFIG_VARIANT_H +#ifndef GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN #if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 -#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_31_7_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_31_7_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT #endif -#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 == 1 +#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_31_7_0 == 1 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE #define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE 1 #endif #if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1=1, BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE=0. +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_31_7_0=1, BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE=0. #endif #endif #else -#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 0 +#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_31_7_0 0 #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_CONFIG_VARIANT_H */ +#endif /* GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_config_variant.h old mode 100755 new mode 100644 similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_config_variant.h index 0001e457e63..7a296324c3e --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_config_variant.h @@ -24,26 +24,26 @@ * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H +#ifndef GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN #if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 -#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_31_3_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_31_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT #endif -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 == 1 +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_31_3_0 == 1 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE #define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 #endif #if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_31_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. #endif #endif #else -#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 0 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_31_3_0 0 #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H */ +#endif /* GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_config_variant.h old mode 100755 new mode 100644 similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_config_variant.h index 2156d844ac4..16ac6abc404 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_config_variant.h @@ -24,26 +24,26 @@ * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H +#ifndef GEN_BCM56780_A0_DNA_6_5_31_7_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_DNA_6_5_31_7_0_LTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN #if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 -#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_31_7_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_31_7_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT #endif -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 == 1 +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_31_7_0 == 1 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE #define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 #endif #if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_31_7_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. #endif #endif #else -#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 0 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_31_7_0 0 #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H */ +#endif /* GEN_BCM56780_A0_DNA_6_5_31_7_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_config_variant.h old mode 100755 new mode 100644 similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_config_variant.h index d4642e4ca1b..24eaa4a6926 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_config_variant.h @@ -24,26 +24,26 @@ * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_CONFIG_VARIANT_H +#ifndef GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN #if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 -#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_31_3_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_31_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT #endif -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 == 1 +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_31_3_0 == 1 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE #define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 #endif #if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_31_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. #endif #endif #else -#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 0 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_31_3_0 0 #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_CONFIG_VARIANT_H */ +#endif /* GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_config_variant.h old mode 100755 new mode 100644 similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_config_variant.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_config_variant.h index 762391e56e0..f9a9c4f8032 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_config_variant.h @@ -24,26 +24,26 @@ * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_CONFIG_VARIANT_H -#define GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_CONFIG_VARIANT_H +#ifndef GEN_BCM56880_A0_DNA_6_5_31_6_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_DNA_6_5_31_6_0_LTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN #if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 -#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_31_6_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_31_6_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT #endif -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 == 1 +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_31_6_0 == 1 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE #define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 #endif #if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_31_6_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. #endif #endif #else -#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 0 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_31_6_0 0 #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_CONFIG_VARIANT_H */ +#endif /* GEN_BCM56880_A0_DNA_6_5_31_6_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_config_variant.h old mode 100755 new mode 100644 similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_config_variant.h index cf6f78a3440..3a9bdb8cd5d --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_config_variant.h @@ -24,26 +24,26 @@ * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_CONFIG_VARIANT_H +#ifndef GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN #if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 -#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_31_3_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_31_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT #endif -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 == 1 +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_31_3_0 == 1 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE #define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 #endif #if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_31_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. #endif #endif #else -#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 0 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_31_3_0 0 #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_CONFIG_VARIANT_H */ +#endif /* GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_config_variant.h old mode 100755 new mode 100644 similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_config_variant.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_config_variant.h index d5fefbeb296..485fb9fac68 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_config_variant.h @@ -24,26 +24,26 @@ * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_CONFIG_VARIANT_H -#define GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_CONFIG_VARIANT_H +#ifndef GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN #if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 -#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_31_3_1 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_31_3_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT #endif -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 == 1 +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_31_3_1 == 1 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE #define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 #endif #if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_31_3_1=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. #endif #endif #else -#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 0 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_31_3_1 0 #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_CONFIG_VARIANT_H */ +#endif /* GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_config_variant.h old mode 100755 new mode 100644 similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_config_variant.h index ec40fd40676..74e6cbc17a4 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_config_variant.h @@ -24,26 +24,26 @@ * ******************************************************************************/ -#ifndef GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H +#ifndef GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN #if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 -#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_31_3_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_31_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT #endif -#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 == 1 +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_31_3_0 == 1 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE #define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1 #endif #if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0. +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_31_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0. #endif #endif #else -#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 0 +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_31_3_0 0 #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H */ +#endif /* GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_config_variant.h old mode 100755 new mode 100644 similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_config_variant.h index 78af73f2edd..b4681302bc6 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_config_variant.h @@ -24,26 +24,26 @@ * ******************************************************************************/ -#ifndef GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_CONFIG_VARIANT_H +#ifndef GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN #if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 -#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_31_6_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_31_6_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT #endif -#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 == 1 +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_31_6_0 == 1 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE #define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1 #endif #if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0. +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_31_6_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0. #endif #endif #else -#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 0 +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_31_6_0 0 #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_CONFIG_VARIANT_H */ +#endif /* GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_config_variant.h old mode 100755 new mode 100644 similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_config_variant.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_config_variant.h index 96d06c9656d..35271bf4f8a --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_config_variant.h @@ -24,26 +24,26 @@ * ******************************************************************************/ -#ifndef GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_CONFIG_VARIANT_H -#define GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_CONFIG_VARIANT_H +#ifndef GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN #if BCMDRD_CONFIG_INCLUDE_BCM78800_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 -#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_31_5_0 +#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_31_5_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT #endif -#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 == 1 +#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_31_5_0 == 1 #ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE #define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE 1 #endif #if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1=1, BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE=0. +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_31_5_0=1, BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE=0. #endif #endif #else -#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 0 +#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_31_5_0 0 #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_CONFIG_VARIANT_H */ +#endif /* GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h deleted file mode 100755 index 0a39b63ed1e..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_DEF_H -#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1 15 -#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_29_0_1 1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_def.h new file mode 100644 index 00000000000..6fb7c867c37 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_VARIANT_DEF_H +#define GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_31_7_0 15 +#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_31_7_0 1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h deleted file mode 100755 index 44c23d04e69..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H -#define GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_30_2_0 16 -#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_30_2_0 1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_def.h new file mode 100644 index 00000000000..d707be6af2b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_VARIANT_DEF_H +#define GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_31_3_0 16 +#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_31_3_0 1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h deleted file mode 100755 index 99163f509a1..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_DEF_H -#define GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_30_2_0 17 -#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_6_5_30_2_0 2 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h new file mode 100644 index 00000000000..163fec8a8bf --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_DNA_6_5_31_7_0_LTD_VARIANT_DEF_H +#define GEN_BCM56780_A0_DNA_6_5_31_7_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_31_7_0 17 +#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_6_5_31_7_0 2 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_DNA_6_5_31_7_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h deleted file mode 100755 index b8378adb1cc..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_DEF_H -#define GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_30_6_0 18 -#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_30_6_0 3 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_def.h new file mode 100644 index 00000000000..838935637d4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_VARIANT_DEF_H +#define GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_31_3_0 18 +#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_31_3_0 3 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h deleted file mode 100755 index 40df3e6b0c9..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_30_1_1 19 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_6_5_30_1_1 1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h new file mode 100644 index 00000000000..4873018ebe7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_DNA_6_5_31_6_0_LTD_VARIANT_DEF_H +#define GEN_BCM56880_A0_DNA_6_5_31_6_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_31_6_0 19 +#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_6_5_31_6_0 1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_DNA_6_5_31_6_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h deleted file mode 100755 index 8528d3a8452..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_30_3_0 20 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_30_3_0 2 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_def.h new file mode 100644 index 00000000000..bde6d690d8a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_VARIANT_DEF_H +#define GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_31_3_0 20 +#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_31_3_0 2 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h deleted file mode 100755 index b99fdff0333..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_30_1_1 21 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_30_1_1 3 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_def.h new file mode 100644 index 00000000000..0795df27263 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_VARIANT_DEF_H +#define GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_31_3_1 21 +#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_31_3_1 3 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h deleted file mode 100755 index d4fd99e762a..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H -#define GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_30_2_0 22 -#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_30_2_0 1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_def.h new file mode 100644 index 00000000000..648b0bb7be9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_VARIANT_DEF_H +#define GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_31_3_0 22 +#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_31_3_0 1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h deleted file mode 100755 index 6e094163dd9..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_DEF_H -#define GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_30_8_0 23 -#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_30_8_0 2 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_def.h new file mode 100644 index 00000000000..fef26892e23 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_VARIANT_DEF_H +#define GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_31_6_0 23 +#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_31_6_0 2 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h deleted file mode 100755 index 752feaa57d4..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_DEF_H -#define GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_30_3_1 24 -#define BCMLTD_VARIANT_LOCAL_BCM78800_A0_DNA_6_5_30_3_1 1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_def.h new file mode 100644 index 00000000000..9aa5fa6be63 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_VARIANT_DEF_H +#define GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_31_5_0 24 +#define BCMLTD_VARIANT_LOCAL_BCM78800_A0_DNA_6_5_31_5_0 1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_entry.h old mode 100755 new mode 100644 similarity index 68% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_entry.h index 63d52143e94..a0df0dec630 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_entry.h @@ -24,15 +24,15 @@ * ******************************************************************************/ -#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_ENTRY_H -#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_VARIANT_ENTRY_H */ #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56690_a0,BCM56690_A0,dna_6_5_29_0_1,DNA_6_5_29_0_1,_,BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1,BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_29_0_1,NULL,0,0) +#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_31_7_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56690_a0,BCM56690_A0,dna_6_5_31_7_0,DNA_6_5_31_7_0,_,BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_31_7_0,BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_31_7_0,NULL,0,0) #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_entry.h old mode 100755 new mode 100644 similarity index 68% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_entry.h index 82e276e6ab1..fe5104f682e --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_entry.h @@ -24,15 +24,15 @@ * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H */ #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_6_5_30_2_0,CNA_6_5_30_2_0,_,BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_30_2_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_30_2_0,NULL,0,0) +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_31_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_6_5_31_3_0,CNA_6_5_31_3_0,_,BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_31_3_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_31_3_0,NULL,0,0) #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_entry.h old mode 100755 new mode 100644 similarity index 68% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_entry.h index 6fe0337c0d6..ede67f27bbd --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_entry.h @@ -24,15 +24,15 @@ * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56780_A0_DNA_6_5_31_7_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56780_A0_DNA_6_5_31_7_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56780_A0_DNA_6_5_31_7_0_LTD_VARIANT_ENTRY_H */ #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,dna_6_5_30_2_0,DNA_6_5_30_2_0,_,BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_30_2_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_6_5_30_2_0,NULL,0,0) +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_31_7_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,dna_6_5_31_7_0,DNA_6_5_31_7_0,_,BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_31_7_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_6_5_31_7_0,NULL,0,0) #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_entry.h old mode 100755 new mode 100644 similarity index 68% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_entry.h index a462d25fc85..5d05e665042 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_entry.h @@ -24,15 +24,15 @@ * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H */ #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_6_5_30_6_0,HNA_6_5_30_6_0,_,BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_30_6_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_30_6_0,NULL,0,0) +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_31_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_6_5_31_3_0,HNA_6_5_31_3_0,_,BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_31_3_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_31_3_0,NULL,0,0) #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_entry.h deleted file mode 100755 index f8b70cd7c2d..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_entry.h +++ /dev/null @@ -1,40 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,dna_6_5_30_1_1,DNA_6_5_30_1_1,_,BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_30_1_1,BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_6_5_30_1_1,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_entry.h new file mode 100644 index 00000000000..feadd4e888d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_DNA_6_5_31_6_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56880_A0_DNA_6_5_31_6_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56880_A0_DNA_6_5_31_6_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_31_6_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,dna_6_5_31_6_0,DNA_6_5_31_6_0,_,BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_31_6_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_6_5_31_6_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_entry.h deleted file mode 100755 index 9eeb8ddbb21..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_entry.h +++ /dev/null @@ -1,40 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_6_5_30_3_0,HNA_6_5_30_3_0,_,BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_30_3_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_30_3_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_entry.h new file mode 100644 index 00000000000..84fca45e908 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_31_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_6_5_31_3_0,HNA_6_5_31_3_0,_,BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_31_3_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_31_3_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h deleted file mode 100755 index 99fed8f6ffd..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h +++ /dev/null @@ -1,40 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,nfa_6_5_30_1_1,NFA_6_5_30_1_1,_,BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_30_1_1,BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_30_1_1,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_entry.h new file mode 100644 index 00000000000..c99f56d3960 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_VARIANT_ENTRY_H +#define GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_31_3_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,nfa_6_5_31_3_1,NFA_6_5_31_3_1,_,BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_31_3_1,BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_31_3_1,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_entry.h deleted file mode 100755 index 4ac79fbe627..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_entry.h +++ /dev/null @@ -1,40 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,cna_6_5_30_2_0,CNA_6_5_30_2_0,_,BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_30_2_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_30_2_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_entry.h new file mode 100644 index 00000000000..b0af4c032f9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_31_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,cna_6_5_31_3_0,CNA_6_5_31_3_0,_,BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_31_3_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_31_3_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_entry.h deleted file mode 100755 index 6200261b3df..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_entry.h +++ /dev/null @@ -1,40 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_6_5_30_8_0,DNA_6_5_30_8_0,_,BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_30_8_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_30_8_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_entry.h new file mode 100644 index 00000000000..ae3385c9c03 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_31_6_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_6_5_31_6_0,DNA_6_5_31_6_0,_,BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_31_6_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_31_6_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_entry.h deleted file mode 100755 index a69f9ba238c..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_entry.h +++ /dev/null @@ -1,40 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_ENTRY_H -#define GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm78800_a0,BCM78800_A0,dna_6_5_30_3_1,DNA_6_5_30_3_1,_,BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_30_3_1,BCMLTD_VARIANT_LOCAL_BCM78800_A0_DNA_6_5_30_3_1,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_entry.h new file mode 100644 index 00000000000..7421d022d0f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_31_5_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm78800_a0,BCM78800_A0,dna_6_5_31_5_0,DNA_6_5_31_5_0,_,BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_31_5_0,BCMLTD_VARIANT_LOCAL_BCM78800_A0_DNA_6_5_31_5_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h old mode 100755 new mode 100644 diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c index fb0db69dc94..296dbdedd67 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c @@ -250,6 +250,7 @@ const bcmpkt_lbhdr_fget_t bcm56080_a0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -311,6 +312,7 @@ const bcmpkt_lbhdr_fset_t bcm56080_a0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -331,7 +333,7 @@ static int bcm56080_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c index 4c73216593c..c5afc525b72 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c @@ -1197,6 +1197,45 @@ const bcmpkt_txpmd_fget_t bcm56080_a0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -1293,6 +1332,45 @@ const bcmpkt_txpmd_fset_t bcm56080_a0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -1318,7 +1396,10 @@ static int bcm56080_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c index cf8d9663d92..41cedab3911 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c @@ -88,6 +88,7 @@ const bcmpkt_lbhdr_fget_t bcm56690_a0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -149,6 +150,7 @@ const bcmpkt_lbhdr_fset_t bcm56690_a0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -169,7 +171,7 @@ static int bcm56690_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c index d452bf6d844..8dd5a62bed2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c @@ -482,6 +482,45 @@ const bcmpkt_txpmd_fget_t bcm56690_a0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -578,6 +617,45 @@ const bcmpkt_txpmd_fset_t bcm56690_a0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -600,7 +678,10 @@ static int bcm56690_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c index 1337f4d115d..4a987adc72b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c @@ -88,6 +88,7 @@ const bcmpkt_lbhdr_fget_t bcm56780_a0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -149,6 +150,7 @@ const bcmpkt_lbhdr_fset_t bcm56780_a0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -169,7 +171,7 @@ static int bcm56780_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c index 2a78f6b96a5..d02b97769a2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c @@ -397,6 +397,45 @@ const bcmpkt_txpmd_fget_t bcm56780_a0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -493,6 +532,45 @@ const bcmpkt_txpmd_fset_t bcm56780_a0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -515,7 +593,10 @@ static int bcm56780_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c index 97c1234d65f..b03a6b61958 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c @@ -88,6 +88,7 @@ const bcmpkt_lbhdr_fget_t bcm56880_a0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -149,6 +150,7 @@ const bcmpkt_lbhdr_fset_t bcm56880_a0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -169,7 +171,7 @@ static int bcm56880_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c index 73e94d4efc0..10903d9878a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c @@ -397,6 +397,45 @@ const bcmpkt_txpmd_fget_t bcm56880_a0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -493,6 +532,45 @@ const bcmpkt_txpmd_fset_t bcm56880_a0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -515,7 +593,10 @@ static int bcm56880_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c index 435fedc9430..c2cc9de6779 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c @@ -88,6 +88,7 @@ const bcmpkt_lbhdr_fget_t bcm56890_a0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -149,6 +150,7 @@ const bcmpkt_lbhdr_fset_t bcm56890_a0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -169,7 +171,7 @@ static int bcm56890_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c index f76028c09ef..560b2990dd3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c @@ -483,6 +483,45 @@ const bcmpkt_txpmd_fget_t bcm56890_a0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -579,6 +618,45 @@ const bcmpkt_txpmd_fset_t bcm56890_a0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -601,7 +679,10 @@ static int bcm56890_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c index 3fa7c9d881b..0075799c744 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c @@ -508,6 +508,7 @@ const bcmpkt_lbhdr_fget_t bcm56990_a0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -569,6 +570,7 @@ const bcmpkt_lbhdr_fset_t bcm56990_a0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -592,7 +594,7 @@ static int bcm56990_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c index bc93655d3e8..3a3bbc451b2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c @@ -410,6 +410,45 @@ const bcmpkt_txpmd_fget_t bcm56990_a0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -506,6 +545,45 @@ const bcmpkt_txpmd_fset_t bcm56990_a0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -528,7 +606,10 @@ static int bcm56990_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c index 49ac1724fbe..62a0b38ce76 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c @@ -508,6 +508,7 @@ const bcmpkt_lbhdr_fget_t bcm56990_b0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -569,6 +570,7 @@ const bcmpkt_lbhdr_fset_t bcm56990_b0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -592,7 +594,7 @@ static int bcm56990_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c index d8d86e8770c..209f2dad1cd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c @@ -410,6 +410,45 @@ const bcmpkt_txpmd_fget_t bcm56990_b0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -506,6 +545,45 @@ const bcmpkt_txpmd_fset_t bcm56990_b0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -528,7 +606,10 @@ static int bcm56990_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c index 4b1249b9261..e5af6791080 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c @@ -508,6 +508,7 @@ const bcmpkt_lbhdr_fget_t bcm56996_a0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -569,6 +570,7 @@ const bcmpkt_lbhdr_fset_t bcm56996_a0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -592,7 +594,7 @@ static int bcm56996_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c index 7ac67f73f99..c9503facfc1 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c @@ -410,6 +410,45 @@ const bcmpkt_txpmd_fget_t bcm56996_a0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -506,6 +545,45 @@ const bcmpkt_txpmd_fset_t bcm56996_a0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -528,7 +606,10 @@ static int bcm56996_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c index 12dc7734cba..1a84e343ceb 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c @@ -508,6 +508,7 @@ const bcmpkt_lbhdr_fget_t bcm56996_b0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -569,6 +570,7 @@ const bcmpkt_lbhdr_fset_t bcm56996_b0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -592,7 +594,7 @@ static int bcm56996_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c index 4cf35746658..86155aa1272 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c @@ -410,6 +410,45 @@ const bcmpkt_txpmd_fget_t bcm56996_b0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -506,6 +545,45 @@ const bcmpkt_txpmd_fset_t bcm56996_b0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -528,7 +606,10 @@ static int bcm56996_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c index 530e6f33934..0e2f538a370 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c @@ -508,6 +508,7 @@ const bcmpkt_lbhdr_fget_t bcm56998_a0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -569,6 +570,7 @@ const bcmpkt_lbhdr_fset_t bcm56998_a0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -592,7 +594,7 @@ static int bcm56998_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c index 779a1650c85..d5d17b82bef 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c @@ -410,6 +410,45 @@ const bcmpkt_txpmd_fget_t bcm56998_a0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -506,6 +545,45 @@ const bcmpkt_txpmd_fset_t bcm56998_a0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -528,7 +606,10 @@ static int bcm56998_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c index a7bdc076971..c2870f507f6 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c @@ -508,6 +508,7 @@ const bcmpkt_lbhdr_fget_t bcm56999_a0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -569,6 +570,7 @@ const bcmpkt_lbhdr_fset_t bcm56999_a0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -592,7 +594,7 @@ static int bcm56999_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c index 525f34c0e67..6ff890582d3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c @@ -410,6 +410,45 @@ const bcmpkt_txpmd_fget_t bcm56999_a0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -506,6 +545,45 @@ const bcmpkt_txpmd_fset_t bcm56999_a0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -528,7 +606,10 @@ static int bcm56999_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c index e977ea83fcd..fd8db6259be 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c @@ -88,6 +88,7 @@ const bcmpkt_lbhdr_fget_t bcm78800_a0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -149,6 +150,7 @@ const bcmpkt_lbhdr_fset_t bcm78800_a0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -169,7 +171,7 @@ static int bcm78800_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c index 76901a19f33..df3ecbf00ca 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c @@ -529,6 +529,45 @@ const bcmpkt_txpmd_fget_t bcm78800_a0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -625,6 +664,45 @@ const bcmpkt_txpmd_fset_t bcm78800_a0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -647,7 +725,10 @@ static int bcm78800_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c index 3e601cc5659..42607a2ef87 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c @@ -266,6 +266,7 @@ const bcmpkt_lbhdr_fget_t bcm78900_b0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -327,6 +328,7 @@ const bcmpkt_lbhdr_fset_t bcm78900_b0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -347,7 +349,7 @@ static int bcm78900_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c index 1d368e0c674..e897c4001ea 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c @@ -753,6 +753,45 @@ const bcmpkt_txpmd_fget_t bcm78900_b0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -849,6 +888,45 @@ const bcmpkt_txpmd_fset_t bcm78900_b0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -873,7 +951,10 @@ static int bcm78900_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, -2, -2, 2, 2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c index ddded01f218..4bae4436d0f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c @@ -266,6 +266,7 @@ const bcmpkt_lbhdr_fget_t bcm78905_a0_lbhdr_fget = { NULL, NULL, NULL, + NULL, NULL } }; @@ -327,6 +328,7 @@ const bcmpkt_lbhdr_fset_t bcm78905_a0_lbhdr_fset = { NULL, NULL, NULL, + NULL, NULL } }; @@ -347,7 +349,7 @@ static int bcm78905_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c index 2da68250217..2884f806135 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c @@ -753,6 +753,45 @@ const bcmpkt_txpmd_fget_t bcm78905_a0_txpmd_fget = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -849,6 +888,45 @@ const bcmpkt_txpmd_fset_t bcm78905_a0_txpmd_fset = { NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, NULL } }; @@ -873,7 +951,10 @@ static int bcm78905_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, -2, -2, 2, 2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c index 46d43820e6a..b4a85434bcd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c @@ -166,6 +166,8 @@ bcmpkt_flexhdr_len_get(bcmlrd_variant_t variant, uint32_t hid, } else if (sal_strcasecmp(name, "hg3_base_t") == 0 || sal_strcasecmp(name, "hg3_extension_0_t") == 0) { *len = 8; + } else if (sal_strcasecmp(name, "vlan_t") == 0) { + *len = 4; } else { /* no support*/ *len = 0; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h index c240b6e55f8..12184bda483 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h @@ -37,6 +37,9 @@ /*! Max profile count. */ #define BCMPKT_FLEXHDR_PROFILE_MAX 64 +/*! Max profile count. */ +#define BCMPKT_FLEXHDR_PROFILE_BITMAP_MAX 4 + /*! CELL Error status bitmap. */ #define BCMPKT_RXFLEXMETA_ST_CELL_ERROR (0x1 << 18) @@ -139,6 +142,11 @@ typedef struct bcmpkt_flex_field_info_s { /*! Header field names. */ bcmpkt_flex_field_metadata_t *info; + /*! Profile bitmap count. */ + int profile_bmp_cnt; + + /*! Profile bitmap. */ + uint32_t profile_bmp[BCMPKT_FLEXHDR_PROFILE_BITMAP_MAX]; } bcmpkt_flex_field_info_t; /*! RXPMD data update function pointer. */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h index c61ec241189..a5b27b0609c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h @@ -35,7 +35,7 @@ #define BCMPKT_LBHDR_SIZE_WORDS 4 /*! - * \name LBHDR Dumping flags. + * \name LBHDR Dump flags. (deprecated by BCMPKT_DUMP_F_XXX) * \anchor BCMPKT_LBHDR_DUMP_F_XXX */ /*! \{ */ @@ -44,7 +44,7 @@ */ #define BCMPKT_LBHDR_DUMP_F_ALL 0 /*! - * Dump none zero field content only. + * Dump non-zero field content only. */ #define BCMPKT_LBHDR_DUMP_F_NONE_ZERO 1 /*! \} */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h index 85ded0cb45b..ef2f1e1896d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h @@ -191,8 +191,10 @@ #define BCMPKT_LBHDR_TRUNCATE_OFFSET_MD_ETH 53 /*! */ #define BCMPKT_LBHDR_SVP_MD_ETH 54 +/*! */ +#define BCMPKT_LBHDR_CNP_OR_CNM_MD_ETH 55 /*! LBHDR FIELD ID NUMBER */ -#define BCMPKT_LBHDR_FID_COUNT 55 +#define BCMPKT_LBHDR_FID_COUNT 56 /*! \} */ /*! LBHDR field name strings for debugging. */ @@ -252,6 +254,7 @@ {"TRUNCATE_MD_ETH", BCMPKT_LBHDR_TRUNCATE_MD_ETH},\ {"TRUNCATE_OFFSET_MD_ETH", BCMPKT_LBHDR_TRUNCATE_OFFSET_MD_ETH},\ {"SVP_MD_ETH", BCMPKT_LBHDR_SVP_MD_ETH},\ + {"CNP_OR_CNM_MD_ETH", BCMPKT_LBHDR_CNP_OR_CNM_MD_ETH},\ {"fid count", BCMPKT_LBHDR_FID_COUNT} /*! diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h index dd9f99fff6f..20ff6afda2d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h @@ -40,15 +40,6 @@ /*! Bitmap array size. */ #define BCMPKT_BITMAP_WORD_SIZE 16 -/*! - * \name BCMPKT Dumping flags. - * \anchor BCMPKT_DUMP_F_XXX - */ -/*! Dump all fields contents. */ -#define BCMPKT_DUMP_F_ALL 0 -/*! Dump none zero field content only. */ -#define BCMPKT_DUMP_F_NONE_ZERO 1 - /*! PMD header field ID bit array. */ typedef struct bcmpkt_bitmap_s { /*! Bit array */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h index c97a4497894..a028547fe91 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h @@ -51,7 +51,7 @@ typedef struct bcmpkt_rx_reasons_s { } bcmpkt_rx_reasons_t; /*! - * \name RXPMD Dumping flags. + * \name RXPMD Dump flags. (deprecated by BCMPKT_DUMP_F_XXX) * \anchor BCMPKT_RXPMD_DUMP_F_XXX */ /*! \{ */ @@ -60,7 +60,7 @@ typedef struct bcmpkt_rx_reasons_s { */ #define BCMPKT_RXPMD_DUMP_F_ALL 0 /*! - * Dump none zero field content only. + * Dump non-zero field content only. */ #define BCMPKT_RXPMD_DUMP_F_NONE_ZERO 1 /*! \} */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h index c3e4ad12808..3b94fe60a2a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h @@ -790,20 +790,18 @@ #define BCMPKT_RX_REASON_INVALID_GSH_NON_GSH 137 /*! Copy to CPU triggered at egress pipeline. */ #define BCMPKT_RX_REASON_EP_CTC 138 -/*! Indicates SVTAG.ERROR !=0 or SVTAG.CPU = 1. */ -#define BCMPKT_RX_REASON_MACSEC 139 /*! APU Policy CTC. */ -#define BCMPKT_RX_REASON_APU_POLICY_CTC 140 +#define BCMPKT_RX_REASON_APU_POLICY_CTC 139 /*! Delayed CTC. */ -#define BCMPKT_RX_REASON_DELAYED_CTC 141 +#define BCMPKT_RX_REASON_DELAYED_CTC 140 /*! Indicates Copy to CPU is for PORT_DOWN event. */ -#define BCMPKT_RX_REASON_PORT_DOWN 142 +#define BCMPKT_RX_REASON_PORT_DOWN 141 /*! SRV6 Control Packet */ -#define BCMPKT_RX_REASON_SRV6_CONTROL_PKT 143 +#define BCMPKT_RX_REASON_SRV6_CONTROL_PKT 142 /*! OUI Compression miss */ -#define BCMPKT_RX_REASON_OUI_COMPRESSION_MISS 144 +#define BCMPKT_RX_REASON_OUI_COMPRESSION_MISS 143 /*! BCMPKT_RX_REASON TYPE NUMBER */ -#define BCMPKT_RX_REASON_COUNT 145 +#define BCMPKT_RX_REASON_COUNT 144 /*! \} */ /*! RXPMD reason name strings for debugging. */ @@ -947,7 +945,6 @@ {"RESERVED_REASON", 136},\ {"INVALID_GSH_NON_GSH", BCMPKT_RX_REASON_INVALID_GSH_NON_GSH},\ {"EP_CTC", BCMPKT_RX_REASON_EP_CTC},\ - {"MACSEC", BCMPKT_RX_REASON_MACSEC},\ {"APU_POLICY_CTC", BCMPKT_RX_REASON_APU_POLICY_CTC},\ {"DELAYED_CTC", BCMPKT_RX_REASON_DELAYED_CTC},\ {"PORT_DOWN", BCMPKT_RX_REASON_PORT_DOWN},\ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h index 2e5f10be956..cb07deee402 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h @@ -35,7 +35,7 @@ #define BCMPKT_TXPMD_SIZE_WORDS 4 /*! - * \name TXPMD Dumping flags. + * \name TXPMD Dump flags. (deprecated by BCMPKT_DUMP_F_XXX) * \anchor BCMPKT_TXPMD_DUMP_F_XXX */ /*! \{ */ @@ -44,7 +44,7 @@ */ #define BCMPKT_TXPMD_DUMP_F_ALL 0 /*! - * Dump none zero field content only. + * Dump non-zero field content only. */ #define BCMPKT_TXPMD_DUMP_F_NONE_ZERO 1 /*! \} */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h index e7cfa9d7cf5..7658474bf62 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h @@ -199,32 +199,114 @@ #define BCMPKT_TXPMD_COOKIE_7_0 76 /*! The MSB of Cookie corresponding to 1588 2-Step */ #define BCMPKT_TXPMD_COOKIE_8 77 -/*! Unicast Valid. */ -#define BCMPKT_TXPMD_UNICAST_VALID 78 -/*! Indicates the vpp port to send a SOBMH packet out. */ -#define BCMPKT_TXPMD_DST_VPP_PORT_NUM 79 -/*! Indicates for TS packet transmitted from CPU into IP that the outgoing packet needs to have its transmit timestamp captured by the port. */ -#define BCMPKT_TXPMD_IEEE1588_TX_TS 80 -/*! Destination chip port number. */ -#define BCMPKT_TXPMD_DST_CHIP_PORT_NUM 81 -/*! Source chip port number. */ -#define BCMPKT_TXPMD_SRC_CHIP_PORT_NUM 82 /*! Unicast packet type. */ -#define BCMPKT_TXPMD_UNICAST_PKT_TYPE 83 -/*! Unicast packet. */ -#define BCMPKT_TXPMD_UNICAST_PKT_VALID 84 +#define BCMPKT_TXPMD_AUX_SOBMH_UNICAST_PKT 78 /*! vpp_port to send a SOBMH packet out. */ -#define BCMPKT_TXPMD_TX_VPP_PORT 85 +#define BCMPKT_TXPMD_AUX_SOBMH_TX_VPP_PORT 79 /*! Destination chip_port number. */ -#define BCMPKT_TXPMD_TX_CHIP_PORT 86 +#define BCMPKT_TXPMD_AUX_SOBMH_TX_CHIP_PORT 80 /*! RX chip port. */ -#define BCMPKT_TXPMD_RX_CHIP_PORT 87 -/*! Ingress vpp port. */ -#define BCMPKT_TXPMD_RX_VPP_PORT 88 +#define BCMPKT_TXPMD_AUX_SOBMH_RX_CHIP_PORT 81 /*! SVP */ -#define BCMPKT_TXPMD_CPU_TX_SVP 89 +#define BCMPKT_TXPMD_CPU_TX_SVP 82 +/*! Switch packet copy is accepted. */ +#define BCMPKT_TXPMD_SWITCH_COPY 83 +/*! Switch packet copy type. */ +#define BCMPKT_TXPMD_SWITCH_COPY_TYPE 84 +/*! Destination port of switch packet copy. */ +#define BCMPKT_TXPMD_SWITCH_COPY_DEST_PORT 85 +/*! Queue number of the switch packet copy. */ +#define BCMPKT_TXPMD_SWITCH_COPY_COS 86 +/*! Adaptive routing group. */ +#define BCMPKT_TXPMD_CPU_TX_AR_GROUP 87 +/*! INCA group ID. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_GROUP_ID 88 +/*! INCA collective ID. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_COLLECTIVE_ID 89 +/*! INCA internal QP ID. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_INTERNAL_QP_ID 90 +/*! INCA source host profile. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_SRC_HOST_PROFILE 91 +/*! INCA flow type. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_FLOW_TYPE 92 +/*! INCA Reduction required: 0 : Reduction not required (Broadcast), 1 : Reduction required (AllReduce/Reduce) */ +#define BCMPKT_TXPMD_CPU_TX_INCA_REDN_REQD 93 +/*! INCA Replication required: 0 : Replication not required (Reduce), 1 : Replication required (AllReduce/Broadcast) */ +#define BCMPKT_TXPMD_CPU_TX_INCA_REPL_REQD 94 +/*! INCA Second pass destination. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_SECOND_PASS_DEST 95 +/*! + * Operation type. 0-Sum, 1-Sum and Scale, 2-15 - Reserved. + * Valid only when the INCA_REDN_REQD==1 where INCA reduction is required. + * This field is consumed by ICE and not carried beyond to second pass. + */ +#define BCMPKT_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE 96 +/*! Vlan profile. */ +#define BCMPKT_TXPMD_CPU_TX_VLAN_PROFILE 97 +/*! Forwarding profile. */ +#define BCMPKT_TXPMD_CPU_TX_FWD_PROFILE 98 +/*! Data format. Valid only when INCA_REDN_REQD==1 where INCA reduction is required. This field is consumed by ICE and not carried beyond to second pass. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT 99 +/*! Indicates the offset at 2B granularity from beginning of the pkt to the start of INCA DATA for reduction.Valid only when INCA_REDN_REQD==1 where INCA reduction is required. This is consumed by IDN and not carried beyond to second pass. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_OFFSET 100 +/*! CNG field. */ +#define BCMPKT_TXPMD_CPU_TX_CNG 101 +/*! Packet Entropy. */ +#define BCMPKT_TXPMD_CPU_TX_PACKET_ENTROPY 102 +/*! Source port number. */ +#define BCMPKT_TXPMD_CPU_TX_SRC_PORT_NUM 103 +/*! Packet control profile. */ +#define BCMPKT_TXPMD_CPU_TX_PKT_CTRL_PROFILE 104 +/*! Queue number. */ +#define BCMPKT_TXPMD_CPU_TX_COS 105 +/*! Internal priority valid. */ +#define BCMPKT_TXPMD_CPU_TX_INT_PRI_VALID 106 +/*! CNG vaild. */ +#define BCMPKT_TXPMD_CPU_TX_CNG_VALID 107 +/*! Internal congestion valid. */ +#define BCMPKT_TXPMD_CPU_TX_INT_CN_VALID 108 +/*! Input priority valid. */ +#define BCMPKT_TXPMD_CPU_TX_INPUT_PRI_VALID 109 +/*! COS valid. */ +#define BCMPKT_TXPMD_CPU_TX_COS_VALID 110 +/*! CPU Tx Type. */ +#define BCMPKT_TXPMD_CPU_TX_CPU_TX_TYPE 111 +/*! DOP Trigger. */ +#define BCMPKT_TXPMD_CPU_TX_DOP_TRIGGER 112 +/*! Aux to LPP class ID. */ +#define BCMPKT_TXPMD_CPU_TX_VPP_TO_LPP_CLASS_ID 113 +/*! Cell length */ +#define BCMPKT_TXPMD_AUX_SOBMH_CELL_LENGTH 114 +/*! End of Packet indication. */ +#define BCMPKT_TXPMD_AUX_SOBMH_EOP 115 +/*! Start of packet indication. */ +#define BCMPKT_TXPMD_AUX_SOBMH_SOP 116 +/*! Packet length. */ +#define BCMPKT_TXPMD_AUX_SOBMH_PKT_LENGTH 117 +/*! Copy to CPU. */ +#define BCMPKT_TXPMD_AUX_SOBMH_COPY_TO_CPU 118 +/*! Copy to debug. */ +#define BCMPKT_TXPMD_AUX_SOBMH_COPY_TO_DEBUG 119 +/*! CNG field. */ +#define BCMPKT_TXPMD_AUX_SOBMH_CNG 120 +/*! Queue number. */ +#define BCMPKT_TXPMD_AUX_SOBMH_COS 121 +/*! Indicates that PBI.UNICAST should be set to queue as unicast packet. */ +#define BCMPKT_TXPMD_AUX_SOBMH_UNICAST 122 +/*! Indicates that PBI.L2_BITMAP should be set (to queue as L2MC packet). */ +#define BCMPKT_TXPMD_AUX_SOBMH_SET_L2BM 123 +/*! RQE queue number. */ +#define BCMPKT_TXPMD_AUX_SOBMH_RQE_Q_NUM 124 +/*! Input priority. */ +#define BCMPKT_TXPMD_AUX_SOBMH_INPUT_PRI 125 +/*! Cell error indication. */ +#define BCMPKT_TXPMD_AUX_SOBMH_CELL_ERROR 126 +/*! Header type. */ +#define BCMPKT_TXPMD_AUX_SOBMH_HEADER_TYPE 127 +/*! Start of frame indicator. */ +#define BCMPKT_TXPMD_AUX_SOBMH_START 128 /*! TXPMD FIELD ID NUMBER */ -#define BCMPKT_TXPMD_FID_COUNT 90 +#define BCMPKT_TXPMD_FID_COUNT 129 /*! \} */ /*! TXPMD field name strings for debugging. */ @@ -307,18 +389,57 @@ {"CPU_TX::COOKIE_VALID", BCMPKT_TXPMD_CPU_TX_COOKIE_VALID},\ {"COOKIE_7_0", BCMPKT_TXPMD_COOKIE_7_0},\ {"COOKIE_8", BCMPKT_TXPMD_COOKIE_8},\ - {"UNICAST_VALID", BCMPKT_TXPMD_UNICAST_VALID},\ - {"DST_VPP_PORT_NUM", BCMPKT_TXPMD_DST_VPP_PORT_NUM},\ - {"IEEE1588_TX_TS", BCMPKT_TXPMD_IEEE1588_TX_TS},\ - {"DST_CHIP_PORT_NUM", BCMPKT_TXPMD_DST_CHIP_PORT_NUM},\ - {"SRC_CHIP_PORT_NUM", BCMPKT_TXPMD_SRC_CHIP_PORT_NUM},\ - {"UNICAST_PKT_TYPE", BCMPKT_TXPMD_UNICAST_PKT_TYPE},\ - {"UNICAST_PKT_VALID", BCMPKT_TXPMD_UNICAST_PKT_VALID},\ - {"TX_VPP_PORT", BCMPKT_TXPMD_TX_VPP_PORT},\ - {"TX_CHIP_PORT", BCMPKT_TXPMD_TX_CHIP_PORT},\ - {"RX_CHIP_PORT", BCMPKT_TXPMD_RX_CHIP_PORT},\ - {"RX_VPP_PORT", BCMPKT_TXPMD_RX_VPP_PORT},\ + {"AUX_SOBMH::UNICAST_PKT", BCMPKT_TXPMD_AUX_SOBMH_UNICAST_PKT},\ + {"AUX_SOBMH::TX_VPP_PORT", BCMPKT_TXPMD_AUX_SOBMH_TX_VPP_PORT},\ + {"AUX_SOBMH::TX_CHIP_PORT", BCMPKT_TXPMD_AUX_SOBMH_TX_CHIP_PORT},\ + {"AUX_SOBMH::RX_CHIP_PORT", BCMPKT_TXPMD_AUX_SOBMH_RX_CHIP_PORT},\ {"CPU_TX::SVP", BCMPKT_TXPMD_CPU_TX_SVP},\ + {"SWITCH_COPY", BCMPKT_TXPMD_SWITCH_COPY},\ + {"SWITCH_COPY_TYPE", BCMPKT_TXPMD_SWITCH_COPY_TYPE},\ + {"SWITCH_COPY_DEST_PORT", BCMPKT_TXPMD_SWITCH_COPY_DEST_PORT},\ + {"SWITCH_COPY_COS", BCMPKT_TXPMD_SWITCH_COPY_COS},\ + {"CPU_TX::AR_GROUP", BCMPKT_TXPMD_CPU_TX_AR_GROUP},\ + {"CPU_TX::INCA_GROUP_ID", BCMPKT_TXPMD_CPU_TX_INCA_GROUP_ID},\ + {"CPU_TX::INCA_COLLECTIVE_ID", BCMPKT_TXPMD_CPU_TX_INCA_COLLECTIVE_ID},\ + {"CPU_TX::INCA_INTERNAL_QP_ID", BCMPKT_TXPMD_CPU_TX_INCA_INTERNAL_QP_ID},\ + {"CPU_TX::INCA_SRC_HOST_PROFILE", BCMPKT_TXPMD_CPU_TX_INCA_SRC_HOST_PROFILE},\ + {"CPU_TX::INCA_FLOW_TYPE", BCMPKT_TXPMD_CPU_TX_INCA_FLOW_TYPE},\ + {"CPU_TX::INCA_REDN_REQD", BCMPKT_TXPMD_CPU_TX_INCA_REDN_REQD},\ + {"CPU_TX::INCA_REPL_REQD", BCMPKT_TXPMD_CPU_TX_INCA_REPL_REQD},\ + {"CPU_TX::INCA_SECOND_PASS_DEST", BCMPKT_TXPMD_CPU_TX_INCA_SECOND_PASS_DEST},\ + {"CPU_TX::INCA_ICE_OPER_TYPE", BCMPKT_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE},\ + {"CPU_TX::VLAN_PROFILE", BCMPKT_TXPMD_CPU_TX_VLAN_PROFILE},\ + {"CPU_TX::FWD_PROFILE", BCMPKT_TXPMD_CPU_TX_FWD_PROFILE},\ + {"CPU_TX::INCA_ICE_DATA_FORMAT", BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT},\ + {"CPU_TX::INCA_ICE_DATA_OFFSET", BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_OFFSET},\ + {"CPU_TX::CNG", BCMPKT_TXPMD_CPU_TX_CNG},\ + {"CPU_TX::PACKET_ENTROPY", BCMPKT_TXPMD_CPU_TX_PACKET_ENTROPY},\ + {"CPU_TX::SRC_PORT_NUM", BCMPKT_TXPMD_CPU_TX_SRC_PORT_NUM},\ + {"CPU_TX::PKT_CTRL_PROFILE", BCMPKT_TXPMD_CPU_TX_PKT_CTRL_PROFILE},\ + {"CPU_TX::COS", BCMPKT_TXPMD_CPU_TX_COS},\ + {"CPU_TX::INT_PRI_VALID", BCMPKT_TXPMD_CPU_TX_INT_PRI_VALID},\ + {"CPU_TX::CNG_VALID", BCMPKT_TXPMD_CPU_TX_CNG_VALID},\ + {"CPU_TX::INT_CN_VALID", BCMPKT_TXPMD_CPU_TX_INT_CN_VALID},\ + {"CPU_TX::INPUT_PRI_VALID", BCMPKT_TXPMD_CPU_TX_INPUT_PRI_VALID},\ + {"CPU_TX::COS_VALID", BCMPKT_TXPMD_CPU_TX_COS_VALID},\ + {"CPU_TX::CPU_TX_TYPE", BCMPKT_TXPMD_CPU_TX_CPU_TX_TYPE},\ + {"CPU_TX::DOP_TRIGGER", BCMPKT_TXPMD_CPU_TX_DOP_TRIGGER},\ + {"CPU_TX::VPP_TO_LPP_CLASS_ID", BCMPKT_TXPMD_CPU_TX_VPP_TO_LPP_CLASS_ID},\ + {"AUX_SOBMH::CELL_LENGTH", BCMPKT_TXPMD_AUX_SOBMH_CELL_LENGTH},\ + {"AUX_SOBMH::EOP", BCMPKT_TXPMD_AUX_SOBMH_EOP},\ + {"AUX_SOBMH::SOP", BCMPKT_TXPMD_AUX_SOBMH_SOP},\ + {"AUX_SOBMH::PKT_LENGTH", BCMPKT_TXPMD_AUX_SOBMH_PKT_LENGTH},\ + {"AUX_SOBMH::COPY_TO_CPU", BCMPKT_TXPMD_AUX_SOBMH_COPY_TO_CPU},\ + {"AUX_SOBMH::COPY_TO_DEBUG", BCMPKT_TXPMD_AUX_SOBMH_COPY_TO_DEBUG},\ + {"AUX_SOBMH::CNG", BCMPKT_TXPMD_AUX_SOBMH_CNG},\ + {"AUX_SOBMH::COS", BCMPKT_TXPMD_AUX_SOBMH_COS},\ + {"AUX_SOBMH::UNICAST", BCMPKT_TXPMD_AUX_SOBMH_UNICAST},\ + {"AUX_SOBMH::SET_L2BM", BCMPKT_TXPMD_AUX_SOBMH_SET_L2BM},\ + {"AUX_SOBMH::RQE_Q_NUM", BCMPKT_TXPMD_AUX_SOBMH_RQE_Q_NUM},\ + {"AUX_SOBMH::INPUT_PRI", BCMPKT_TXPMD_AUX_SOBMH_INPUT_PRI},\ + {"AUX_SOBMH::CELL_ERROR", BCMPKT_TXPMD_AUX_SOBMH_CELL_ERROR},\ + {"AUX_SOBMH::HEADER_TYPE", BCMPKT_TXPMD_AUX_SOBMH_HEADER_TYPE},\ + {"AUX_SOBMH::START", BCMPKT_TXPMD_AUX_SOBMH_START},\ {"fid count", BCMPKT_TXPMD_FID_COUNT} /*! @@ -348,10 +469,16 @@ #define BCMPKT_TXPMD_HEADER_T_TO_CPU 0 /*! Packets from CPU with SOBMH header format to Passthru NLF */ #define BCMPKT_TXPMD_HEADER_T_FROM_CPU 1 +/*! Header type CPU_TX in LPP pipeline */ +#define BCMPKT_TXPMD_HEADER_T_LPP_CPU_TX 1 /*! Header type CPU_TX */ #define BCMPKT_TXPMD_HEADER_T_CPU_TX 2 +/*! Header type TX_MD in LPP pipeline */ +#define BCMPKT_TXPMD_HEADER_T_LPP_TX_MD_HEADER 2 /*! MAC in MAC packets to Passthru NLF */ #define BCMPKT_TXPMD_HEADER_T_MIM 2 +/*! Packet with SOBMH header format */ +#define BCMPKT_TXPMD_HEADER_T_LPP_SOBMH 3 /*! MPLS packets to Passthru NLF */ #define BCMPKT_TXPMD_HEADER_T_MPLS_PMP 3 /*! Trill Network Packets to Passthru NLF */ @@ -380,8 +507,11 @@ #define BCMPKT_TXPMD_HEADER_TYPE_NAME_MAP_INIT \ {"SOBMH_EP_COPY_TO_CPU", BCMPKT_TXPMD_HEADER_T_TO_CPU},\ {"SOBMH_FROM_CPU", BCMPKT_TXPMD_HEADER_T_FROM_CPU},\ + {"LPP_CPU_TX", BCMPKT_TXPMD_HEADER_T_LPP_CPU_TX},\ {"CPU_TX", BCMPKT_TXPMD_HEADER_T_CPU_TX},\ + {"LPP_TX_MD_HEADER", BCMPKT_TXPMD_HEADER_T_LPP_TX_MD_HEADER},\ {"MIM", BCMPKT_TXPMD_HEADER_T_MIM},\ + {"LPP_SOBMH", BCMPKT_TXPMD_HEADER_T_LPP_SOBMH},\ {"MPLS_PMP", BCMPKT_TXPMD_HEADER_T_MPLS_PMP},\ {"TRILL_NW", BCMPKT_TXPMD_HEADER_T_TRILL_NW},\ {"TRILL_AC", BCMPKT_TXPMD_HEADER_T_TRILL_AC},\ @@ -433,12 +563,20 @@ /*! \{ */ /*! Egress Port */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_EGRESS_PORT 0 +/*! Destination is Invalid */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NULL 0 +/*! Egress Port */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_DEST_PORT 1 /*! Next Hop Index */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NHI 1 /*! ECMP Group */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP 2 +/*! Trunk ID */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_TGID 2 /*! ECMP member id */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP_MEMBER 3 +/*! Next Hop Index */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NEXT_HOP 3 /*! IP Multicast Group */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_IPMC 4 /*! L2MC group */ @@ -458,18 +596,18 @@ /*! BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE encoding name strings for debugging. */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT \ {"EGRESS_PORT", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_EGRESS_PORT},\ + {"NULL", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NULL},\ + {"DEST_PORT", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_DEST_PORT},\ {"NHI", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NHI},\ {"ECMP", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP},\ + {"TGID", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_TGID},\ {"ECMP_MEMBER", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP_MEMBER},\ + {"NEXT_HOP", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NEXT_HOP},\ {"IPMC", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_IPMC},\ {"L2MC", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2MC},\ {"VLAN_FLOOD", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_VLAN_FLOOD},\ {"L2_PBM", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2_PBM},\ {"LAG_ID", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_LAG_ID},\ - {"RESERVED_COUNTER", 9},\ - {"RESERVED_COUNTER", 10},\ - {"RESERVED_COUNTER", 11},\ - {"RESERVED_COUNTER", 12},\ {"RESERVED_COUNTER", 13},\ {"RESERVED_COUNTER", 14},\ {"FORWARD", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_FORWARD},\ @@ -546,6 +684,111 @@ {"NO_OP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_NO_OP},\ {"SAMPLE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_SAMPLE},\ +/*! + * \name BCMPKT_TXPMD_CPU_TX_INCA_REDN_REQD encodings. + * \anchor BCMPKT_TXPMD_CPU_TX_INCA_REDN_REQD_XXX + */ +/*! \{ */ +/*! Reduction not required. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_REDN_REQD_BROADCAST 0 +/*! Reduction required. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_REDN_REQD_REDUCE 1 +/*! \} */ + +/*! BCMPKT_TXPMD_CPU_TX_INCA_REDN_REQD encoding name strings for debugging. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_REDN_REQD_NAME_MAP_INIT \ + {"BROADCAST", BCMPKT_TXPMD_CPU_TX_INCA_REDN_REQD_BROADCAST},\ + {"REDUCE", BCMPKT_TXPMD_CPU_TX_INCA_REDN_REQD_REDUCE},\ + +/*! + * \name BCMPKT_TXPMD_CPU_TX_INCA_REPL_REQD encodings. + * \anchor BCMPKT_TXPMD_CPU_TX_INCA_REPL_REQD_XXX + */ +/*! \{ */ +/*! Replication required. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_REPL_REQD_REDUCE 0 +/*! Replication not required. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_REPL_REQD_BROADCAST 1 +/*! \} */ + +/*! BCMPKT_TXPMD_CPU_TX_INCA_REPL_REQD encoding name strings for debugging. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_REPL_REQD_NAME_MAP_INIT \ + {"REDUCE", BCMPKT_TXPMD_CPU_TX_INCA_REPL_REQD_REDUCE},\ + {"BROADCAST", BCMPKT_TXPMD_CPU_TX_INCA_REPL_REQD_BROADCAST},\ + +/*! + * \name BCMPKT_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE encodings. + * \anchor BCMPKT_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE_XXX + */ +/*! \{ */ +/*! */ +#define BCMPKT_TXPMD_CPU_TX_INCA_ICE_OPER_T_SUM 0 +/*! */ +#define BCMPKT_TXPMD_CPU_TX_INCA_ICE_OPER_T_SUM_AND_SCALE 1 +/*! \} */ + +/*! BCMPKT_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE encoding name strings for debugging. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE_NAME_MAP_INIT \ + {"SUM", BCMPKT_TXPMD_CPU_TX_INCA_ICE_OPER_T_SUM},\ + {"SUM_AND_SCALE", BCMPKT_TXPMD_CPU_TX_INCA_ICE_OPER_T_SUM_AND_SCALE},\ + +/*! + * \name BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT encodings. + * \anchor BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_XXX + */ +/*! \{ */ +/*! */ +#define BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_FP32 0 +/*! */ +#define BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_FP16 1 +/*! */ +#define BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_BF16 2 +/*! */ +#define BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_INT32 3 +/*! */ +#define BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_FP8 4 +/*! \} */ + +/*! BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT encoding name strings for debugging. */ +#define BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_NAME_MAP_INIT \ + {"FP32", BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_FP32},\ + {"FP16", BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_FP16},\ + {"BF16", BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_BF16},\ + {"INT32", BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_INT32},\ + {"FP8", BCMPKT_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_FP8},\ + +/*! + * \name BCMPKT_TXPMD_CPU_TX_CPU_TX_TYPE encodings. + * \anchor BCMPKT_TXPMD_CPU_TX_CPU_TX_TYPE_XXX + */ +/*! \{ */ +/*! Classic CPU TX (Masquerade, Dest-based). */ +#define BCMPKT_TXPMD_CPU_TX_CPU_TX_T_MASQUERADE 0 +/*! Sample timestamp. */ +#define BCMPKT_TXPMD_CPU_TX_CPU_TX_T_INCA 1 +/*! \} */ + +/*! BCMPKT_TXPMD_CPU_TX_CPU_TX_TYPE encoding name strings for debugging. */ +#define BCMPKT_TXPMD_CPU_TX_CPU_TX_TYPE_NAME_MAP_INIT \ + {"MASQUERADE", BCMPKT_TXPMD_CPU_TX_CPU_TX_T_MASQUERADE},\ + {"INCA", BCMPKT_TXPMD_CPU_TX_CPU_TX_T_INCA},\ + +/*! + * \name BCMPKT_TXPMD_AUX_SOBMH_HEADER_TYPE encodings. + * \anchor BCMPKT_TXPMD_AUX_SOBMH_HEADER_TYPE_XXX + */ +/*! \{ */ +/*! Reserved. */ +#define BCMPKT_TXPMD_AUX_SOBMH_HEADER_T_RESERVED 0 +/*! Packets from CPU with SOBMH header format to Passthru NLF */ +#define BCMPKT_TXPMD_AUX_SOBMH_HEADER_T_FROM_CPU 1 +/*! \} */ + +/*! BCMPKT_TXPMD_AUX_SOBMH_HEADER_TYPE encoding name strings for debugging. */ +#define BCMPKT_TXPMD_AUX_SOBMH_HEADER_TYPE_NAME_MAP_INIT \ + {"RESERVED", BCMPKT_TXPMD_AUX_SOBMH_HEADER_T_RESERVED},\ + {"SOBMH_FROM_CPU", BCMPKT_TXPMD_AUX_SOBMH_HEADER_T_FROM_CPU},\ + /*! * \name TX packet metadata internal usage field IDs. * \anchor BCMPKT_TXPMD_I_XXX diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h index 136d4fd5471..a9ad7bab3e4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h @@ -45,7 +45,7 @@ bcmpkt_util_dev_type_get(const char *dev_name); * Device and variant names are case-insensitive. * * \param [in] dev_name Device name, e.g. "bcm56000_a0". - * \param [in] var_name Variant name, e.g. "utltm". + * \param [in] var_name Variant name, e.g. "dna_6_5_30_1_1". * * \return Variant dispatch type or BCMLRD_VARIANT_T_NONE if not found. */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h deleted file mode 100644 index 65f14a67a9e..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h +++ /dev/null @@ -1,182 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_H -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_H - -#include - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T 8 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T 9 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T 10 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T 11 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T 12 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T 13 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T 14 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T 15 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T 16 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T 17 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T 18 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T 19 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T 20 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T 21 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T 22 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T 23 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T 24 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T 25 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T 26 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T 27 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T 28 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T 29 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T 30 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T 31 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T 32 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T 33 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T 34 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T 35 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T 36 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T 37 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T 38 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T 39 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T 40 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T 41 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T 42 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T 43 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T 44 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T 45 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T 46 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T 47 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T 48 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 49 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 50 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T 51 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T 52 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T 53 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T 54 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T 55 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T 56 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T 57 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T 58 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T 59 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T 60 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T 61 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T 62 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T 63 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T 64 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T 65 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T 66 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T 67 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T 68 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T 69 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_T 70 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT 71 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T},\ - {"authen_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T},\ - {"bfd_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T},\ - {"cntag_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T},\ - {"cpu_composites_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T},\ - {"dest_option_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T},\ - {"ep_nih_header_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"esp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T},\ - {"ethertype_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T},\ - {"frag_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T},\ - {"gbp_ethernet_shim_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T},\ - {"generic_loopback_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T},\ - {"gpe_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T},\ - {"gre_chksum_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T},\ - {"gre_key_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T},\ - {"gre_rout_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T},\ - {"gre_seq_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T},\ - {"gre_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T},\ - {"hg3_base_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T},\ - {"hg3_extension_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T},\ - {"hop_by_hop_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T},\ - {"icmp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T},\ - {"ifa_flex_md_0_a_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T},\ - {"ifa_flex_md_0_b_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T},\ - {"ifa_flex_md_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T},\ - {"ifa_flex_md_2_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T},\ - {"ifa_flex_md_3_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T},\ - {"ifa_header_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T},\ - {"ifa_md_base_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T},\ - {"ifa_metadata_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T},\ - {"igmp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T},\ - {"ioam_e2e_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T},\ - {"ipfix_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T},\ - {"l2_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T},\ - {"mpls_ach_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T},\ - {"mpls_bv_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T},\ - {"mpls_cw_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T},\ - {"mpls_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T},\ - {"p_1588_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T},\ - {"prog_ext_hdr_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T},\ - {"psamp_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T},\ - {"psamp_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T},\ - {"psamp_mirror_on_drop_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"rarp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T},\ - {"routing_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T},\ - {"rspan_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T},\ - {"segment_routing_srh_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T},\ - {"segment_routing_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T},\ - {"sflow_shim_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T},\ - {"snap_llc_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T},\ - {"std_segment_id_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T},\ - {"tcp_first_4bytes_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T},\ - {"vxlan_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T},\ - {"wesp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T},\ - {"RXPMD_FLEX_T", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h deleted file mode 100644 index 6c9aacbba37..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,1392 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_DATA_H -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_OPERATION 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name AUTHEN_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_DATA 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_RESERVED 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SEQ_NUM 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SPI 5 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT 6 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_DATA},\ - {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\ - {"PAYLOAD_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ - {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_RESERVED},\ - {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SEQ_NUM},\ - {"SPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SPI},\ - {"authen_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT} - -/*! - * \name BFD_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_AP 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_BFD_LENGTH 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_CPI 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DEM 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DESMINTXINTV 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DETECTMULT 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DIAG 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIN 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MINECHORXINTV 8 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MPT 9 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MYDISCRIM 10 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_POLL 11 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_REQMINRXINTV 12 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_STA 13 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_URDISCRIM 14 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_VERSION 15 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT 16 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ - {"AP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_AP},\ - {"BFD_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_BFD_LENGTH},\ - {"CPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_CPI},\ - {"DEM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DEM},\ - {"DESMINTXINTV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DESMINTXINTV},\ - {"DETECTMULT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DETECTMULT},\ - {"DIAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DIAG},\ - {"FIN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIN},\ - {"MINECHORXINTV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MINECHORXINTV},\ - {"MPT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MPT},\ - {"MYDISCRIM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MYDISCRIM},\ - {"POLL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_POLL},\ - {"REQMINRXINTV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_REQMINRXINTV},\ - {"STA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_STA},\ - {"URDISCRIM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_URDISCRIM},\ - {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_VERSION},\ - {"bfd_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT} - -/*! - * \name CNTAG_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_RPID 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_TPID 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ - {"RPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_RPID},\ - {"TPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_TPID},\ - {"cntag_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name DEST_OPTION_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_OPTION 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ - {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_OPTION},\ - {"dest_option_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ESP_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_NEXT_HEADER 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD_LEN 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SEQ_NUM 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SPI 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT 5 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ - {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_NEXT_HEADER},\ - {"PAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD},\ - {"PAD_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD_LEN},\ - {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SEQ_NUM},\ - {"SPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SPI},\ - {"esp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name FRAG_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FRAG_INFO 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_ID 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_NEXT_HEADER 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_RESERVED 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ - {"FRAG_INFO", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FRAG_INFO},\ - {"ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_ID},\ - {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_NEXT_HEADER},\ - {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_RESERVED},\ - {"frag_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT} - -/*! - * \name GBP_ETHERNET_SHIM_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER 5 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT 6 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \ - {"ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\ - {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\ - {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\ - {"SID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\ - {"SUBTYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\ - {"VER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\ - {"gbp_ethernet_shim_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM 13 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"SOURCE_SYSTEM_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"SRC_SUBPORT_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\ - {"START_BYTE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 - -/*! - * \name GPE_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FLAGS 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED0 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED1 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_VNI 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT 5 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED0},\ - {"RESERVED1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED1},\ - {"VNI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_VNI},\ - {"gpe_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT} - -/*! - * \name GRE_CHKSUM_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_OFFSET 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ - {"OFFSET", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\ - {"gre_chksum_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT} - -/*! - * \name GRE_KEY_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_KEY 0 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ - {"KEY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_KEY},\ - {"gre_key_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT} - -/*! - * \name GRE_ROUT_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_ROUTING 0 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ - {"ROUTING", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_ROUTING},\ - {"gre_rout_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT} - -/*! - * \name GRE_SEQ_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\ - {"gre_seq_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT} - -/*! - * \name GRE_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_C_R_K_S 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_PROTOCOL 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_RESERVED 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_VERSION 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ - {"C_R_K_S", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_C_R_K_S},\ - {"PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_PROTOCOL},\ - {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_RESERVED},\ - {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_VERSION},\ - {"gre_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT} - -/*! - * \name HG3_BASE_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CN 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CNG 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_ENTROPY 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_L3_ROUTED 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_TC 11 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_VERSION 12 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT 13 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CN},\ - {"CNG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CNG},\ - {"ENTROPY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_ENTROPY},\ - {"EXT_HDR_PRESENT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ - {"HG3_RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ - {"L3_ROUTED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_L3_ROUTED},\ - {"MIRROR_COPY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ - {"RESERVED_ETYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ - {"SYSTEM_DESTINATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ - {"SYSTEM_DESTINATION_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ - {"SYSTEM_SOURCE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ - {"TC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_TC},\ - {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_VERSION},\ - {"hg3_base_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT} - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 - -/*! - * \name HG3_EXTENSION_0_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_SVP 5 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ - {"CLASS_ID_LSB", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ - {"CLASS_ID_MSB", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ - {"DVP_OR_L3_IIF", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ - {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ - {"FORWARDING_DOMAIN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ - {"SVP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_SVP},\ - {"hg3_extension_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} - -/*! - * \name HOP_BY_HOP_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_OPTION 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ - {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_OPTION},\ - {"hop_by_hop_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT} - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CODE 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_A_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ - {"FWD_HDR_TTL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ - {"ifa_flex_md_0_a_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_B_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ - {"PORT_SPEED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ - {"QUEUE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ - {"ifa_flex_md_0_b_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_1_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ - {"RX_TIMESTAMP_NANOSEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ - {"ifa_flex_md_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_2_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ - {"RESIDENCE_TIME_NANOSEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_flex_md_2_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_3_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ - {"MMU_STAT_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ - {"ifa_flex_md_3_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_MD_BASE_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ - {"ifa_md_base_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT} - -/*! - * \name IFA_METADATA_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_METADATA 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"METADATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_METADATA},\ - {"REQUEST_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ - {"ifa_metadata_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT} - -/*! - * \name IGMP_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_CHECKSUM 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_IGMP_TYPE 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_CHECKSUM},\ - {"GROUP_ADDRESS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\ - {"IGMP_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_IGMP_TYPE},\ - {"MAX_RESP_TIME", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\ - {"igmp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT} - -/*! - * \name IOAM_E2E_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_RESERVED 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_TYPE 6 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT 7 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \ - {"IOAM_E2E_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\ - {"IOAM_E2E_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\ - {"IOAM_HDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\ - {"NAMESPACE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\ - {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\ - {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_RESERVED},\ - {"TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_TYPE},\ - {"ioam_e2e_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_DA 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_ID 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_OPTION 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_SA 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOS 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TTL 9 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_DA 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_SA 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACDA 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACSA 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name MPLS_ACH_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CW_TYPE 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_RESERVED 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_VERSION 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ - {"CHANNEL_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ - {"CW_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\ - {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_RESERVED},\ - {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_VERSION},\ - {"mpls_ach_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT} - -/*! - * \name MPLS_BV_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_VALUE 0 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ - {"VALUE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_VALUE},\ - {"mpls_bv_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT} - -/*! - * \name MPLS_CW_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_CW_TYPE 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_RESERVED 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ - {"CW_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_CW_TYPE},\ - {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_RESERVED},\ - {"SEQ_NUMBER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ - {"mpls_cw_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT} - -/*! - * \name MPLS_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_BOS 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_EXP 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_LABEL 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_TTL 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ - {"BOS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_BOS},\ - {"EXP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_EXP},\ - {"LABEL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_LABEL},\ - {"TTL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_TTL},\ - {"mpls_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT} - -/*! - * \name P_1588_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CNTRL 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CORRECTION 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_DOMAIN_NB 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FLAGS 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_LENGTH 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_TYPE 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED1 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED2 8 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED3 9 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SEQ_ID 10 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SRCPORTID 11 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_TRANSPORTSPEC 12 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_VERSION 13 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT 14 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ - {"CNTRL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CNTRL},\ - {"CORRECTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CORRECTION},\ - {"DOMAIN_NB", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_DOMAIN_NB},\ - {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FLAGS},\ - {"LOGMSGINTERVAL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ - {"MSG_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_LENGTH},\ - {"MSG_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_TYPE},\ - {"RESERVED1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED1},\ - {"RESERVED2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED2},\ - {"RESERVED3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED3},\ - {"SEQ_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SEQ_ID},\ - {"SRCPORTID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SRCPORTID},\ - {"TRANSPORTSPEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\ - {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_VERSION},\ - {"p_1588_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT} - -/*! - * \name PROG_EXT_HDR_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_OPTION 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ - {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\ - {"prog_ext_hdr_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} - -/*! - * \name PSAMP_0_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FLOWSET 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_LENGTH 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT 6 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ - {"FLOWSET", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FLOWSET},\ - {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_LENGTH},\ - {"NEXT_HOP_INDEX", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ - {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ - {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ - {"psamp_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT} - -/*! - * \name PSAMP_1_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_DLB_ID 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EPOCH 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT 7 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ - {"DLB_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_DLB_ID},\ - {"EGRESS_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ - {"EPOCH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EPOCH},\ - {"INGRESS_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ - {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\ - {"VARIABLE_FLAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ - {"psamp_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"RESERVED_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"SMOD_STATE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ - {"UC_COS__COLOR__PROB_IDX", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_OPERATION 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name ROUTING_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_DATA 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_NEXT_HEADER 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_ROUTING_TYPE 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT 5 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_DATA},\ - {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ - {"routing_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT} - -/*! - * \name RSPAN_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TAG 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TPID 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TAG},\ - {"TPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TPID},\ - {"rspan_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT} - -/*! - * \name SEGMENT_ROUTING_SRH_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG 6 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT 7 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\ - {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\ - {"LAST_ENTRY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\ - {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\ - {"TAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\ - {"segment_routing_srh_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT} - -/*! - * \name SEGMENT_ROUTING_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_TAG 6 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT 7 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\ - {"LAST_ENTRY_FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\ - {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\ - {"SEG_LIST", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\ - {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\ - {"TAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_TAG},\ - {"segment_routing_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SNAP_LLC_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_LENGTH 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ - {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_LENGTH},\ - {"SNAP_LLC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ - {"snap_llc_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT} - -/*! - * \name STD_SEGMENT_ID_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_DATA 0 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_DATA},\ - {"std_segment_id_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"L5_BYTES_8_9", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ - {"unknown_l5_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_CFI 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_PCP 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_TPID 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_VID 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT} - -/*! - * \name WESP_T field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FLAGS 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_HEADER_LEN 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_NEXT_HEADER 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SEQ_NUM 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SPI 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_TRAILER_LEN 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_WESP_IV 6 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT 7 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FLAGS},\ - {"HEADER_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_HEADER_LEN},\ - {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_NEXT_HEADER},\ - {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SEQ_NUM},\ - {"SPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SPI},\ - {"TRAILER_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_TRAILER_LEN},\ - {"WESP_IV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_WESP_IV},\ - {"wesp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT} - - -#endif /* BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index de8fe7cae02..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,191 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DVP_15_0 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 8 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 9 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 10 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 11 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 12 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 13 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 14 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 15 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 16 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_6_0 20 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L2_IIF_11_0 24 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L2_OIF_11_0 25 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0 26 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 27 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 28 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0 29 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 30 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 31 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 32 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 33 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 34 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0 35 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0 36 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0 37 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_TUNNEL_NEXT_SID_SELECT_3_0 38 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVP_15_0 39 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 40 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0 41 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 42 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 43 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 44 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 45 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 46 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VFI_15_0 47 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 48 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_FID_COUNT 49 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_COUNT 48 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT 2 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 4 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 5 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 6 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP 7 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT 8 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS 9 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP 10 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 11 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 12 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT 13 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 14 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 15 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 16 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 17 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 18 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 19 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 20 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 21 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 22 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 23 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 24 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 25 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 26 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 27 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 28 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 29 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 30 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 31 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 32 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 33 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 34 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 35 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 36 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 37 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 38 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6 41 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP 42 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 44 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 45 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 46 -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP 47 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CB_STATION_MOVE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ - {"CML_FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"DEFAULT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\ - {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_ECMP_PKT_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ - {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_LAG_PKT_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ - {"DST_FP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ - {"EM_FT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"EM_FT_HPAE_MISS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\ - {"IFP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ - {"IVXLT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_STATIC_MOVE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_IIF_EQ_L3_OIF", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ - {"L3_TTL_ERROR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST_RSVD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ - {"MATCHED_RULE_BIT_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ - {"MATCHED_RULE_BIT_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ - {"MATCHED_RULE_BIT_2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ - {"MATCHED_RULE_BIT_3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ - {"MATCHED_RULE_BIT_4", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ - {"MATCHED_RULE_BIT_5", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ - {"MATCHED_RULE_BIT_6", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ - {"MATCHED_RULE_BIT_7", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ - {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"MPLS_CTRL_PKT_TO_CPU", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ - {"NO_COPY_TO_CPU", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"SER_DROP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ - {"SRV6", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6},\ - {"SVP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\ - {"TRACE_DOP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"TRACE_DO_NOT_COPY_TO_CPU", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ - {"TRACE_DO_NOT_MIRROR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ - {"URPF_CHECK_FAILED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ - {"VFP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index 6a4d0c14cd5..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,505 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56690_a0_dna_6_5_29_0_1_sf_match_id_info.yml - * for device bcm56690_a0 and variant dna_6_5_29_0_1. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG 0 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM 1 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 2 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 3 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 4 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 5 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 6 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 7 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 8 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 13 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 14 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 15 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 16 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 17 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 18 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 19 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 20 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 21 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 22 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 23 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 24 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 25 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 26 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 27 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 28 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 29 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 30 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E 31 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 32 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 33 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 34 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 35 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 36 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 37 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 38 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 39 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 40 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 41 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 42 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 43 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 44 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 45 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 46 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 47 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 48 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 49 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 50 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 51 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 52 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 53 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 54 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 55 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 56 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 57 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 58 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 59 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 60 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 61 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 62 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG 63 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM 64 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 65 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 66 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 67 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 68 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 69 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 70 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 71 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 72 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 73 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 74 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 75 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 76 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 77 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 78 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 79 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 80 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 81 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 82 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 83 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 84 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 85 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 86 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 87 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 88 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 89 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 90 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 91 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 92 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 93 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E 94 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 95 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 96 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 97 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 98 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 99 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 100 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 101 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 102 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 103 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 104 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 105 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 106 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 107 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 108 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 109 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 110 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 111 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 112 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 113 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 114 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 115 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 116 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 117 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 118 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 119 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 120 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 121 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 122 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG 123 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 124 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 125 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 126 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 127 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 128 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 129 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 130 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 131 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 132 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 133 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 134 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 135 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 136 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 137 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 138 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 139 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 140 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 141 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 142 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 143 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 144 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 145 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 146 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 147 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 148 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 149 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 150 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 151 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 152 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 153 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 154 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 155 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 156 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 157 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 158 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 159 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG 160 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM 161 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 162 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 163 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 164 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 165 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 166 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 167 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 168 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 169 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 170 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 171 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 172 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 173 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 174 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 175 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 176 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 177 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 178 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 179 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 180 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 181 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 182 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 183 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 184 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 185 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 186 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 187 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 188 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 189 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 190 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E 191 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 192 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 193 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 194 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 195 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 196 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 197 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 198 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 199 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 200 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 201 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 202 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 203 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 204 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 205 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 206 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 207 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 208 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 209 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 210 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 211 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 212 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 213 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 214 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 215 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 216 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 217 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 218 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 219 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 220 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 221 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 222 -#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_COUNT 223 - -#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \ - {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ - {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \ - {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..e439f6b7b41 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h @@ -0,0 +1,168 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_H +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T 10 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T 11 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T 12 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T 13 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T 15 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T 17 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T 18 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T 19 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T 20 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T 21 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T 22 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T 24 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T 25 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T 26 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T 27 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T 28 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T 29 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T 30 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T 31 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T 32 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T 33 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T 34 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T 35 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T 36 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T 37 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T 38 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T 39 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T 40 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T 41 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T 42 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T 43 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T 44 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 45 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 46 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T 47 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T 48 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T 49 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T 50 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T 51 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T 52 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T 53 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T 54 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T 55 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T 56 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T 57 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T 58 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T 59 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T 60 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T 61 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T 62 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_T 63 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_COUNT 64 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T},\ + {"ethertype_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T},\ + {"gbp_ethernet_shim_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T},\ + {"generic_loopback_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T},\ + {"ifa_header_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_metadata_a_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T},\ + {"ifa_metadata_b_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T},\ + {"ifa_metadata_base_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T},\ + {"igmp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T},\ + {"ioam_e2e_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T},\ + {"ipfix_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..3141fd211e5 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1291 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_AP 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_CPI 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DEM 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FIN 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MPT 9 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_POLL 11 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_STA 13 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_PAD 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_ID 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GBP_ETHERNET_SHIM_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER 5 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \ + {"ETHERTYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\ + {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\ + {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\ + {"SID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\ + {"SUBTYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\ + {"VER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\ + {"gbp_ethernet_shim_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM 13 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"SRC_SUBPORT_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\ + {"START_BYTE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_SVP 5 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID_LSB", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ + {"CLASS_ID_MSB", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ + {"DVP_OR_L3_IIF", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_METADATA_A_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_CN 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_CN},\ + {"FWD_HDR_TTL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\ + {"PORT_SPEED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\ + {"ifa_metadata_a_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT} + +/*! + * \name IFA_METADATA_B_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT 6 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\ + {"MMU_STAT_0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\ + {"RESIDENCE_TIME_NANOSEC", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\ + {"RX_TIMESTAMP_NANOSEC", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_metadata_b_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT} + +/*! + * \name IFA_METADATA_BASE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\ + {"ifa_metadata_base_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IOAM_E2E_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_RESERVED 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_TYPE 6 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \ + {"IOAM_E2E_DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\ + {"IOAM_E2E_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\ + {"IOAM_HDR_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\ + {"NAMESPACE_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\ + {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\ + {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_RESERVED},\ + {"TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_TYPE},\ + {"ioam_e2e_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_DA 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_ID 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_SA 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_DA 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_SA 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_MACDA 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"L5_BYTES_8_9", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ + {"unknown_l5_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_SPI 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..fbd78518868 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,187 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DVP_15_0 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 8 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 9 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 10 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 11 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 12 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 13 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 14 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 15 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 16 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_6_0 20 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0 24 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0 25 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0 26 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 27 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 28 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0 29 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 30 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 31 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 32 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 33 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 34 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVP_15_0 35 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 36 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0 37 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 38 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 39 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 40 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 41 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 42 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_VFI_15_0 43 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 44 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_FID_COUNT 45 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 48 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT 2 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 4 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 5 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 6 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 7 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 8 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS 9 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP 10 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 11 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 12 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 13 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 14 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 15 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 16 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 17 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 18 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 19 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 20 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 21 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 22 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 23 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 24 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 25 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 26 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 27 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 28 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 29 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 30 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 31 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 32 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 33 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 34 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 35 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 36 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 37 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 38 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SRV6 41 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP 42 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 44 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 45 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 46 +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP 47 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DEFAULT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"EM_FT_HPAE_MISS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\ + {"IFP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SRV6", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SRV6},\ + {"SVP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..09bd86c3c1d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,503 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56690_a0_dna_6_5_31_7_0_sf_match_id_info.yml + * for device bcm56690_a0 and variant dna_6_5_31_7_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG 0 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM 1 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 2 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 3 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 4 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 5 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 6 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 7 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 8 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 13 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 14 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 15 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 16 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 17 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 18 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 19 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 20 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 21 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 22 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 23 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 24 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 25 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 26 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 27 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 28 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE 29 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 30 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E 31 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 32 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 33 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 34 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 35 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 36 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 37 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 38 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 39 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 40 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 41 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 42 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 43 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 44 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 45 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 46 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 47 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 48 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 49 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 50 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 51 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 52 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 53 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 54 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 55 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 56 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 57 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 58 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 59 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 60 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 61 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG 62 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM 63 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 64 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 65 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 66 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 67 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 68 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 69 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 70 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 71 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 72 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 73 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 74 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 75 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 76 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 77 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 78 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 79 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 80 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 81 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 82 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 83 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 84 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 85 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 86 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 87 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 88 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 89 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 90 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE 91 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 92 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E 93 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 94 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 95 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 96 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 97 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 98 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 99 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 100 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 101 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 102 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 103 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 104 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 105 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 106 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 107 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 108 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 109 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 110 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 111 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 112 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 113 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 114 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 115 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 116 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 117 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 118 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 119 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 120 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG 121 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 122 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 123 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 124 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 125 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 126 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 127 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 128 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 129 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 130 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 131 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 132 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 133 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 134 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 135 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 136 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 137 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 138 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 139 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 140 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE 141 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 142 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 143 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 144 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 145 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 146 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 147 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 148 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 149 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 150 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 151 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 152 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 153 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 154 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 155 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 156 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 157 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 158 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 159 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG 160 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM 161 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 162 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 163 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 164 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 165 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 166 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 167 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 168 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 169 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 170 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 171 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 172 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 173 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 174 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 175 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 176 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 177 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 178 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 179 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 180 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 181 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 182 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 183 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 184 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 185 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 186 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 187 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 188 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE 189 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 190 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E 191 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 192 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 193 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 194 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 195 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 196 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 197 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 198 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 199 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 200 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 201 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 202 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 203 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 204 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 205 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 206 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 207 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 208 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 209 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 210 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 211 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 212 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 213 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 214 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 215 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 216 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 217 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 218 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 219 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 220 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 221 +#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_COUNT 222 + +#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h deleted file mode 100644 index b8df0d5c6ae..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,96 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T 6 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T 7 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T 8 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T 9 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T 10 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T 11 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T 12 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 13 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T 14 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 15 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 16 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T 17 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T 18 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T 19 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T 20 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T 21 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T 22 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T 23 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T 24 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T 25 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T 26 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T 27 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT 28 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T},\ - {"cpu_composites_0_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"ep_nih_header_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"ethertype_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T},\ - {"generic_loopback_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"icmp_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T},\ - {"ipfix_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"psamp_mirror_on_drop_0_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_1_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ - {"psamp_mirror_on_drop_2_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\ - {"rarp_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T},\ - {"tcp_first_4bytes_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T},\ - {"vxlan_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T},\ - {"RXPMD_FLEX_T", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index 965147346b1..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,592 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"RESERVED_2", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ - {"SOURCE_SYSTEM_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_DA 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_ID 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_SA 6 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS 7 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL 9 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_DA 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_SA 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACDA 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACSA 1 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ - {"ING_DROP_REASON", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ - {"MIRROR_ON_DROP_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ - {"MMU_DROP_CTRL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ - {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_2_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR 5 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT 6 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \ - {"EGR_DROP_REASON", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\ - {"EP_COPY_SESSION_INDEX", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\ - {"RESERVED_0", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_VID 3 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT} - - -#endif /* BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index 4754761fedf..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,124 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 14 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 15 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 16 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 18 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 19 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 20 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 21 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0 22 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 23 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 24 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 25 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 26 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 27 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 28 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 29 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 30 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 31 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 32 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 33 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 34 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 35 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 36 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 21 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 1 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 2 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 3 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 4 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 5 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 6 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 7 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 8 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 9 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 10 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 11 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 12 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 13 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 14 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 15 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 17 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 19 -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 20 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CML_FLAGS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"IFP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IVXLT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_DISCARD", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ - {"L2_SRC_STATIC_MOVE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_TTL_ERROR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ - {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ - {"NO_COPY_TO_CPU", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ - {"TRACE_DOP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"VFP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index 7b58853c385..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,213 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56780_a0_cna_6_5_30_2_0_sf_match_id_info.yml - * for device bcm56780_a0 and variant cna_6_5_30_2_0. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 7 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 8 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 9 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 10 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 11 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 12 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 13 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 14 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 15 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 16 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 17 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 18 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 19 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 20 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 21 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 22 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 23 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 24 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 25 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 26 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 27 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 28 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 29 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 30 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 31 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 32 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 33 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 34 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 35 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 36 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 37 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 38 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 39 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 40 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 41 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 42 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 43 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 44 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 45 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 46 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 47 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 48 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 49 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 50 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 51 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 52 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 53 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 54 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 55 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 56 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 57 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 58 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 59 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 60 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 61 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 62 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 63 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 64 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 65 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 66 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 67 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 68 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 69 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 70 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 71 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 72 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 73 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 74 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 75 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 76 -#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT 77 - -#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..f97f7df1072 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h @@ -0,0 +1,96 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_H +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T 6 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T 7 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T 8 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T 9 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T 10 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T 11 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T 12 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T 13 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T 14 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 15 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 16 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T 17 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T 18 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T 19 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T 20 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T 21 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T 22 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T 23 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T 24 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T 25 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T 26 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T 27 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT 28 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T},\ + {"cpu_composites_0_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"ep_nih_header_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"ethertype_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T},\ + {"generic_loopback_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"icmp_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T},\ + {"ipfix_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"psamp_mirror_on_drop_0_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"psamp_mirror_on_drop_2_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\ + {"rarp_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T},\ + {"tcp_first_4bytes_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T},\ + {"RXPMD_FLEX_T", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..65c6f0c4a8e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,592 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_DA 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_ID 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_SA 6 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_DA 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_SA 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACDA 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_2_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR 5 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT 6 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \ + {"EGR_DROP_REASON", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\ + {"EP_COPY_SESSION_INDEX", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\ + {"RESERVED_0", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT} + + +#endif /* BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..c03e4160486 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,124 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 14 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 15 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 16 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 18 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 19 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 20 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 21 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0 22 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 23 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 24 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 25 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 26 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 27 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 28 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 29 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 30 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 31 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 32 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 33 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 34 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0 35 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT 36 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 21 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP 1 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 2 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 3 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 4 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 5 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 6 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 7 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 8 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 9 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 10 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 11 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 12 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 13 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 14 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 15 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 17 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 19 +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP 20 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"IFP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IVXLT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_TTL_ERROR", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"NO_COPY_TO_CPU", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"TRACE_DOP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"VFP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..6df919ecd6c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,213 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_cna_6_5_31_3_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant cna_6_5_31_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 7 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 8 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 9 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 10 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 11 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 12 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 13 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 14 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 15 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 16 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 17 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 18 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 19 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 20 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 21 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 22 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 23 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 24 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 25 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 26 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 27 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 28 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 29 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 30 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 31 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 32 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 33 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 34 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 35 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 36 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 37 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 38 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 39 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 40 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 41 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 42 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 43 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 44 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 45 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 46 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 47 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 48 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 49 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 50 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 51 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 52 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 53 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 54 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 55 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 56 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 57 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 58 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 59 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 60 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 61 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 62 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 63 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 64 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 65 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 66 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 67 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 68 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 69 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 70 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 71 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 72 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 73 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 74 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 75 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 76 +#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT 77 + +#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr.h deleted file mode 100644 index 8dd7a520e07..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,180 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_H -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T 10 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T 11 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T 12 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T 13 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T 14 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T 15 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T 16 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T 17 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T 18 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T 19 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T 20 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T 21 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T 22 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T 23 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T 24 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T 25 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T 26 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T 27 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T 28 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T 29 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T 30 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T 31 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T 32 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T 33 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T 34 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T 35 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T 36 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T 37 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 38 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T 39 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T 40 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T 41 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T 42 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T 43 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T 44 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T 45 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T 46 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T 47 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T 48 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 49 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 50 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T 51 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T 52 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T 53 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T 54 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T 55 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T 56 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T 57 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T 58 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T 59 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T 60 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T 61 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T 62 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T 63 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T 64 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T 65 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T 66 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T 67 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T 68 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T 69 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT 70 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T},\ - {"authen_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T},\ - {"bfd_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T},\ - {"cntag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T},\ - {"cpu_composites_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"dest_option_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T},\ - {"ep_nih_header_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"esp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T},\ - {"etag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T},\ - {"ethertype_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T},\ - {"frag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T},\ - {"generic_loopback_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"gpe_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T},\ - {"gre_chksum_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T},\ - {"gre_key_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T},\ - {"gre_rout_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T},\ - {"gre_seq_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T},\ - {"gre_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T},\ - {"hg3_base_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T},\ - {"hg3_extension_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T},\ - {"hop_by_hop_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T},\ - {"icmp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T},\ - {"ifa_flex_md_0_a_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ - {"ifa_flex_md_0_b_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ - {"ifa_flex_md_1_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T},\ - {"ifa_flex_md_2_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T},\ - {"ifa_flex_md_3_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T},\ - {"ifa_header_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T},\ - {"ifa_md_base_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T},\ - {"ifa_metadata_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T},\ - {"igmp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T},\ - {"ipfix_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"mpls_ach_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T},\ - {"mpls_bv_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T},\ - {"mpls_cw_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T},\ - {"mpls_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T},\ - {"p_1588_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T},\ - {"pim_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T},\ - {"prog_ext_hdr_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T},\ - {"psamp_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T},\ - {"psamp_1_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T},\ - {"psamp_mirror_on_drop_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"rarp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T},\ - {"routing_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T},\ - {"rspan_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T},\ - {"sflow_shim_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T},\ - {"snap_llc_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T},\ - {"svtag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T},\ - {"tcp_first_4bytes_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T},\ - {"vntag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T},\ - {"vxlan_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T},\ - {"wesp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T},\ - {"RXPMD_FLEX_T", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index 905781ac660..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,1343 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name AUTHEN_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_DATA 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_RESERVED 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_SPI 5 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT 6 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_DATA},\ - {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ - {"PAYLOAD_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ - {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_RESERVED},\ - {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ - {"SPI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_SPI},\ - {"authen_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT} - -/*! - * \name BFD_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_AP 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_BFD_LENGTH 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_CPI 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DEM 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DESMINTXINTV 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DETECTMULT 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DIAG 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FIN 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MINECHORXINTV 8 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MPT 9 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MYDISCRIM 10 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_POLL 11 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_REQMINRXINTV 12 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_STA 13 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_URDISCRIM 14 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_VERSION 15 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT 16 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ - {"AP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_AP},\ - {"BFD_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_BFD_LENGTH},\ - {"CPI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_CPI},\ - {"DEM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DEM},\ - {"DESMINTXINTV", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DESMINTXINTV},\ - {"DETECTMULT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DETECTMULT},\ - {"DIAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DIAG},\ - {"FIN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FIN},\ - {"MINECHORXINTV", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MINECHORXINTV},\ - {"MPT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MPT},\ - {"MYDISCRIM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MYDISCRIM},\ - {"POLL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_POLL},\ - {"REQMINRXINTV", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_REQMINRXINTV},\ - {"STA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_STA},\ - {"URDISCRIM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_URDISCRIM},\ - {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_VERSION},\ - {"bfd_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT} - -/*! - * \name CNTAG_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_RPID 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_TPID 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ - {"RPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_RPID},\ - {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_TPID},\ - {"cntag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name DEST_OPTION_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_OPTION 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ - {"OPTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_OPTION},\ - {"dest_option_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ESP_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_NEXT_HEADER 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_PAD 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_PAD_LEN 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_SEQ_NUM 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_SPI 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT 5 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ - {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_NEXT_HEADER},\ - {"PAD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_PAD},\ - {"PAD_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_PAD_LEN},\ - {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_SEQ_NUM},\ - {"SPI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_SPI},\ - {"esp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT} - -/*! - * \name ETAG_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_TAG 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_TPID 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_TAG},\ - {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_TPID},\ - {"etag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name FRAG_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FRAG_INFO 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_ID 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_NEXT_HEADER 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_RESERVED 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ - {"FRAG_INFO", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FRAG_INFO},\ - {"ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_ID},\ - {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_NEXT_HEADER},\ - {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_RESERVED},\ - {"frag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"RESERVED_2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ - {"SOURCE_SYSTEM_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 - -/*! - * \name GPE_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FLAGS 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_RESERVED0 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_RESERVED1 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_VNI 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT 5 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_RESERVED0},\ - {"RESERVED1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_RESERVED1},\ - {"VNI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_VNI},\ - {"gpe_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT} - -/*! - * \name GRE_CHKSUM_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ - {"OFFSET", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ - {"gre_chksum_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} - -/*! - * \name GRE_KEY_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_KEY 0 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ - {"KEY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_KEY},\ - {"gre_key_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT} - -/*! - * \name GRE_ROUT_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_ROUTING 0 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ - {"ROUTING", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_ROUTING},\ - {"gre_rout_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT} - -/*! - * \name GRE_SEQ_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ - {"gre_seq_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT} - -/*! - * \name GRE_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_C_R_K_S 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_PROTOCOL 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_RESERVED 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_VERSION 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ - {"C_R_K_S", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_C_R_K_S},\ - {"PROTOCOL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_PROTOCOL},\ - {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_RESERVED},\ - {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_VERSION},\ - {"gre_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT} - -/*! - * \name HG3_BASE_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_CN 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_CNG 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_ENTROPY 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_TC 11 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_VERSION 12 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_CN},\ - {"CNG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_CNG},\ - {"ENTROPY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_ENTROPY},\ - {"EXT_HDR_PRESENT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ - {"HG3_RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ - {"L3_ROUTED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ - {"MIRROR_COPY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ - {"RESERVED_ETYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ - {"SYSTEM_DESTINATION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ - {"SYSTEM_DESTINATION_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ - {"SYSTEM_SOURCE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ - {"TC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_TC},\ - {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_VERSION},\ - {"hg3_base_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT} - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 - -/*! - * \name HG3_EXTENSION_0_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_SVP 5 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ - {"CLASS_ID_LSB", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ - {"CLASS_ID_MSB", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ - {"DVP_OR_L3_IIF", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ - {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ - {"FORWARDING_DOMAIN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ - {"SVP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ - {"hg3_extension_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} - -/*! - * \name HOP_BY_HOP_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ - {"OPTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ - {"hop_by_hop_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_A_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ - {"FWD_HDR_TTL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ - {"ifa_flex_md_0_a_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_B_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ - {"PORT_SPEED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ - {"QUEUE_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ - {"ifa_flex_md_0_b_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_1_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ - {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ - {"ifa_flex_md_1_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_2_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ - {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_flex_md_2_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_3_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ - {"MMU_STAT_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ - {"ifa_flex_md_3_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_MD_BASE_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ - {"ifa_md_base_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} - -/*! - * \name IFA_METADATA_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_METADATA 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"METADATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_METADATA},\ - {"REQUEST_VECTOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ - {"ifa_metadata_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT} - -/*! - * \name IGMP_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_CHECKSUM 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_IGMP_TYPE 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_CHECKSUM},\ - {"GROUP_ADDRESS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ - {"IGMP_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_IGMP_TYPE},\ - {"MAX_RESP_TIME", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ - {"igmp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_DA 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_ID 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_SA 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL 9 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_DA 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_SA 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_MACDA 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_MACSA 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name MPLS_ACH_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_RESERVED 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_VERSION 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ - {"CHANNEL_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ - {"CW_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ - {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_RESERVED},\ - {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_VERSION},\ - {"mpls_ach_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT} - -/*! - * \name MPLS_BV_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_VALUE 0 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ - {"VALUE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_VALUE},\ - {"mpls_bv_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT} - -/*! - * \name MPLS_CW_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_RESERVED 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ - {"CW_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ - {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_RESERVED},\ - {"SEQ_NUMBER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ - {"mpls_cw_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT} - -/*! - * \name MPLS_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_BOS 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_EXP 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_LABEL 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_TTL 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ - {"BOS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_BOS},\ - {"EXP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_EXP},\ - {"LABEL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_LABEL},\ - {"TTL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_TTL},\ - {"mpls_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT} - -/*! - * \name P_1588_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_CNTRL 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_CORRECTION 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_DOMAIN_NB 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FLAGS 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_MSG_LENGTH 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_MSG_TYPE 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED1 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED2 8 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED3 9 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_SEQ_ID 10 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_SRCPORTID 11 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_VERSION 13 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT 14 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ - {"CNTRL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_CNTRL},\ - {"CORRECTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_CORRECTION},\ - {"DOMAIN_NB", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_DOMAIN_NB},\ - {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FLAGS},\ - {"LOGMSGINTERVAL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ - {"MSG_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_MSG_LENGTH},\ - {"MSG_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_MSG_TYPE},\ - {"RESERVED1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED1},\ - {"RESERVED2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED2},\ - {"RESERVED3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED3},\ - {"SEQ_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_SEQ_ID},\ - {"SRCPORTID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_SRCPORTID},\ - {"TRANSPORTSPEC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ - {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_VERSION},\ - {"p_1588_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT} - -/*! - * \name PIM_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_0_1 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_2_3 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_4_5 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_6_7 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT \ - {"HDR_BYTES_0_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_0_1},\ - {"HDR_BYTES_2_3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_2_3},\ - {"HDR_BYTES_4_5", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_4_5},\ - {"HDR_BYTES_6_7", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_6_7},\ - {"pim_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT} - -/*! - * \name PROG_EXT_HDR_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ - {"OPTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ - {"prog_ext_hdr_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} - -/*! - * \name PSAMP_0_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FLOWSET 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_LENGTH 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ - {"FLOWSET", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FLOWSET},\ - {"LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_LENGTH},\ - {"NEXT_HOP_INDEX", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ - {"OBS_TIME_NS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ - {"TEMPLATE_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ - {"psamp_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT} - -/*! - * \name PSAMP_1_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_DLB_ID 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_EPOCH 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ - {"DLB_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_DLB_ID},\ - {"EGRESS_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ - {"EPOCH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_EPOCH},\ - {"INGRESS_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ - {"SAMPLED_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ - {"VARIABLE_FLAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ - {"psamp_1_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"RESERVED_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"SMOD_STATE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ - {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name ROUTING_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_DATA 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT 5 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_DATA},\ - {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ - {"routing_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT} - -/*! - * \name RSPAN_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_TAG 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_TPID 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_TAG},\ - {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_TPID},\ - {"rspan_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SNAP_LLC_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_LENGTH 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ - {"LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_LENGTH},\ - {"SNAP_LLC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ - {"snap_llc_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT} - -/*! - * \name SVTAG_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_DATA_LWR 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_DATA_UPR 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ - {"DATA_LWR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_DATA_LWR},\ - {"DATA_UPR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_DATA_UPR},\ - {"svtag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_VID 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VNTAG_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_TAG 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_TPID 1 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_TAG},\ - {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_TPID},\ - {"vntag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT} - -/*! - * \name WESP_T field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FLAGS 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_HEADER_LEN 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_NEXT_HEADER 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_SEQ_NUM 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_SPI 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_TRAILER_LEN 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_WESP_IV 6 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT 7 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FLAGS},\ - {"HEADER_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_HEADER_LEN},\ - {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_NEXT_HEADER},\ - {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_SEQ_NUM},\ - {"SPI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_SPI},\ - {"TRAILER_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_TRAILER_LEN},\ - {"WESP_IV", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_WESP_IV},\ - {"wesp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT} - - -#endif /* BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index 62a3cf94f74..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,180 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 9 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 10 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 11 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 12 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 13 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 14 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 15 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0 16 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 20 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 24 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 25 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 26 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 27 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 28 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 29 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 30 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 31 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 32 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0 33 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 34 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 35 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 36 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 37 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 38 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 39 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 40 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0 41 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 42 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 46 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 2 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 3 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 4 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 5 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 6 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 7 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 8 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 9 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 10 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 11 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 12 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 13 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 14 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 15 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 16 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 17 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 18 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 19 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 20 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 21 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 22 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 23 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 24 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 25 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 26 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 27 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 28 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 29 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 30 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 31 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 32 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY 33 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 34 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 35 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 36 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 37 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 38 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 39 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP 40 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 41 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 42 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 43 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 44 -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 45 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CML_FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ - {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ - {"DST_FP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ - {"EM_FT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IFP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ - {"IVXLT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_STATIC_MOVE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_IIF_EQ_L3_OIF", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ - {"L3_TTL_ERROR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST_RSVD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ - {"MATCHED_RULE_BIT_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ - {"MATCHED_RULE_BIT_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ - {"MATCHED_RULE_BIT_2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ - {"MATCHED_RULE_BIT_3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ - {"MATCHED_RULE_BIT_4", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ - {"MATCHED_RULE_BIT_5", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ - {"MATCHED_RULE_BIT_6", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ - {"MATCHED_RULE_BIT_7", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ - {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ - {"MTOP_IPV4_GATEWAY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\ - {"NO_COPY_TO_CPU", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"RESERVED_TRACE_BIT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ - {"SER_DROP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ - {"SVP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ - {"TRACE_DOP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ - {"TRACE_DO_NOT_MIRROR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ - {"URPF_CHECK_FAILED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ - {"VFP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index 9e921fc797e..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,417 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56780_a0_dna_6_5_30_2_0_sf_match_id_info.yml - * for device bcm56780_a0 and variant dna_6_5_30_2_0. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 1 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 2 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 3 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 4 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 5 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 6 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 8 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 9 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 10 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 11 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 12 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 13 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 14 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 15 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 16 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 17 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 18 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 19 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 20 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 21 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 22 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 23 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 24 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 25 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 26 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 27 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 28 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 29 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 30 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 31 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 32 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 33 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 34 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 35 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 36 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 37 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 38 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 39 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 40 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 41 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 42 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 43 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 44 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 45 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 46 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 47 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 48 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 49 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 50 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 51 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 52 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 53 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 54 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 55 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 56 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 57 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 58 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 59 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 60 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 61 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 62 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 63 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 64 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 65 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 66 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 67 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 68 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 69 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 70 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 71 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 72 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 73 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 74 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 75 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 76 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 77 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 78 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 79 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 80 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 81 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 82 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 83 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 84 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 85 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 86 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 87 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 88 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 89 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 90 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 91 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 92 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 93 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 94 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 95 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 96 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 97 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 98 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 99 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 100 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 101 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 102 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 103 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 104 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 105 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 106 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 107 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 108 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 109 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 110 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 111 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 112 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 113 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 114 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 115 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 116 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 117 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 118 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 119 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 120 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 121 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 122 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 123 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 124 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 125 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 126 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 127 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 128 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 129 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 130 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 131 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 132 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 133 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 134 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 135 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 136 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 137 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 138 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 139 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 140 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 141 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 142 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 143 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 144 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 145 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 146 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 147 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 148 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 149 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 150 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 151 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 152 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 153 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 154 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 155 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 156 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 157 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 158 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 159 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 160 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 161 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 162 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 163 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 164 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 165 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 166 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 167 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 168 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 169 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 170 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 171 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 172 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 173 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 174 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 175 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 176 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 177 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 178 -#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT 179 - -#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ - {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..5752e0528f8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h @@ -0,0 +1,180 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_H +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T 10 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETAG_T 11 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T 12 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T 13 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T 15 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T 17 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T 18 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T 19 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T 20 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T 21 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T 22 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T 24 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_A_T 25 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T 26 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T 27 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_2_T 28 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_3_T 29 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T 30 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T 31 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T 32 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T 33 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T 34 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T 35 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T 36 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_L2_T 37 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T 38 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T 39 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T 40 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T 41 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T 42 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T 43 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T 44 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T 45 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T 46 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T 47 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T 48 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 49 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 50 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T 51 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T 52 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T 53 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T 54 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T 55 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T 56 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T 57 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SVTAG_T 58 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T 59 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T 60 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T 61 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T 62 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T 63 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T 64 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T 65 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VNTAG_T 66 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T 67 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T 68 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_T 69 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_COUNT 70 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T},\ + {"pim_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T},\ + {"prog_ext_hdr_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T},\ + {"svtag_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SVTAG_T},\ + {"tcp_first_4bytes_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..cc84e22ed59 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1343 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_AP 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_CPI 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DEM 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FIN 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MPT 9 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_POLL 11 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_STA 13 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_PAD 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETAG_T_TAG 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETAG_T_TPID 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_ID 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 13 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_SVP 14 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"SVP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\ + {"generic_loopback_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_SVP 5 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID_LSB", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ + {"CLASS_ID_MSB", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ + {"DVP_OR_L3_IIF", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_DA 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_ID 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_SA 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_DA 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_SA 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_MACDA 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PIM_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_HDR_BYTES_0_1 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_HDR_BYTES_2_3 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_HDR_BYTES_4_5 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_HDR_BYTES_6_7 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT \ + {"HDR_BYTES_0_1", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_HDR_BYTES_0_1},\ + {"HDR_BYTES_2_3", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_HDR_BYTES_2_3},\ + {"HDR_BYTES_4_5", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_HDR_BYTES_4_5},\ + {"HDR_BYTES_6_7", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_HDR_BYTES_6_7},\ + {"pim_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name SVTAG_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SVTAG_T_DATA_LWR 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SVTAG_T_DATA_UPR 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SVTAG_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ + {"DATA_LWR", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SVTAG_T_DATA_LWR},\ + {"DATA_UPR", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SVTAG_T_DATA_UPR},\ + {"svtag_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SVTAG_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_SPI 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..f88da896c06 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,181 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 9 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 10 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 11 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 12 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 13 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 14 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 15 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0 16 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 20 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 24 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 25 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 26 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 27 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 28 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 29 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 30 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 31 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 32 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVP_15_0 33 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 34 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 35 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_ENTROPY_15_0 36 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 37 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 38 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 39 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 40 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_VFI_15_0 41 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0 42 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_FID_COUNT 43 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 46 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 2 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 4 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 5 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 6 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP 7 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 8 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 9 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 10 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 11 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 12 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 13 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 14 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 15 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 16 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 17 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 18 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 19 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 20 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 21 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 22 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 23 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 24 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 25 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 26 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 27 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 28 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 29 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 30 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 31 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 32 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY 33 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 34 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 35 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 36 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 37 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 38 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 39 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP 40 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 41 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 42 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 43 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 44 +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP 45 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"MTOP_IPV4_GATEWAY", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\ + {"NO_COPY_TO_CPU", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..be31c26a21f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,417 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_dna_6_5_31_7_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant dna_6_5_31_7_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56780_a0_dna_6_5_31_7_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56780_a0_dna_6_5_31_7_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 1 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 2 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 3 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 4 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 5 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 6 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 8 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 9 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 10 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 11 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 12 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 13 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 14 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 15 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 16 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 17 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 18 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 19 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 20 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 21 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 22 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 23 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 24 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 25 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 26 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 27 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 28 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 29 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 30 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 31 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 32 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 33 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 34 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 35 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 36 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 37 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 38 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 39 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 40 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 41 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 42 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 43 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 44 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 45 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 46 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 47 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 48 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 49 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 50 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 51 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 52 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 53 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 54 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 55 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 56 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 57 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 58 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 59 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 60 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 61 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 62 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 63 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 64 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 65 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 66 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 67 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 68 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 69 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 70 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 71 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 72 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 73 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 74 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 75 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 76 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 77 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 78 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 79 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 80 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 81 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 82 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 83 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 84 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 85 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 86 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 87 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 88 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 89 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 90 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 91 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 92 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 93 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 94 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 95 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 96 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 97 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 98 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 99 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 100 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 101 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 102 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 103 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 104 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 105 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 106 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 107 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 108 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 109 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 110 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 111 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 112 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 113 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 114 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 115 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 116 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 117 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 118 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 119 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 120 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 121 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 122 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 123 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 124 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 125 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 126 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 127 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 128 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 129 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 130 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 131 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 132 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 133 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 134 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 135 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 136 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 137 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 138 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 139 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 140 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 141 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 142 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 143 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 144 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 145 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 146 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 147 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 148 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 149 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 150 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 151 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 152 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 153 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 154 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 155 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 156 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 157 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 158 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 159 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 160 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 161 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 162 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 163 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 164 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 165 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 166 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 167 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 168 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 169 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 170 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 171 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 172 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 173 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 174 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 175 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 176 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 177 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 178 +#define BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_COUNT 179 + +#define BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr.h deleted file mode 100644 index 093abf95c16..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,174 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_H -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T 7 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T 10 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T 11 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T 12 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T 13 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T 14 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T 15 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T 16 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T 17 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T 18 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T 19 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T 20 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T 21 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T 22 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T 23 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T 24 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T 25 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T 26 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T 27 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T 28 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T 29 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T 30 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T 31 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T 32 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T 33 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T 34 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T 35 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T 36 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T 37 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T 38 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T 39 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T 40 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T 41 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T 42 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T 43 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T 44 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T 45 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 46 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 47 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T 48 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T 49 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T 50 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T 51 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T 52 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T 53 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T 54 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T 55 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T 56 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T 57 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T 58 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T 59 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T 60 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T 61 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T 62 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T 63 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T 64 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T 65 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_T 66 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_COUNT 67 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T},\ - {"authen_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T},\ - {"bfd_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T},\ - {"cntag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T},\ - {"cpu_composites_0_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"dest_option_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T},\ - {"ep_nih_header_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"esp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T},\ - {"etag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T},\ - {"ethertype_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T},\ - {"frag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T},\ - {"generic_loopback_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"gpe_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T},\ - {"gre_chksum_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T},\ - {"gre_key_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T},\ - {"gre_rout_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T},\ - {"gre_seq_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T},\ - {"gre_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T},\ - {"hop_by_hop_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T},\ - {"icmp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T},\ - {"ifa_flex_md_0_a_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ - {"ifa_flex_md_0_b_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ - {"ifa_flex_md_1_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T},\ - {"ifa_flex_md_2_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T},\ - {"ifa_flex_md_3_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T},\ - {"ifa_header_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T},\ - {"ifa_md_base_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T},\ - {"ifa_metadata_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T},\ - {"igmp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T},\ - {"ipfix_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"mpls_ach_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T},\ - {"mpls_bv_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T},\ - {"mpls_cw_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T},\ - {"mpls_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T},\ - {"p_1588_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T},\ - {"prog_ext_hdr_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T},\ - {"psamp_0_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T},\ - {"psamp_1_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T},\ - {"psamp_mirror_on_drop_0_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"rarp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T},\ - {"routing_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T},\ - {"rspan_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T},\ - {"sflow_shim_0_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T},\ - {"snap_llc_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T},\ - {"svtag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T},\ - {"tcp_first_4bytes_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T},\ - {"vntag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T},\ - {"vxlan_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T},\ - {"wesp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T},\ - {"RXPMD_FLEX_T", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index 8afacd3d535..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,1258 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_DATA_H -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name AUTHEN_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_DATA 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_RESERVED 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_SPI 5 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT 6 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_DATA},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ - {"PAYLOAD_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ - {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_RESERVED},\ - {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ - {"SPI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_SPI},\ - {"authen_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT} - -/*! - * \name BFD_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_AP 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_BFD_LENGTH 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_CPI 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DEM 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DESMINTXINTV 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DETECTMULT 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DIAG 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FIN 7 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MINECHORXINTV 8 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MPT 9 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MYDISCRIM 10 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_POLL 11 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_REQMINRXINTV 12 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_STA 13 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_URDISCRIM 14 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_VERSION 15 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT 16 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ - {"AP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_AP},\ - {"BFD_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_BFD_LENGTH},\ - {"CPI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_CPI},\ - {"DEM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DEM},\ - {"DESMINTXINTV", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DESMINTXINTV},\ - {"DETECTMULT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DETECTMULT},\ - {"DIAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DIAG},\ - {"FIN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FIN},\ - {"MINECHORXINTV", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MINECHORXINTV},\ - {"MPT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MPT},\ - {"MYDISCRIM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MYDISCRIM},\ - {"POLL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_POLL},\ - {"REQMINRXINTV", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_REQMINRXINTV},\ - {"STA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_STA},\ - {"URDISCRIM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_URDISCRIM},\ - {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_VERSION},\ - {"bfd_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT} - -/*! - * \name CNTAG_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_RPID 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_TPID 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ - {"RPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_RPID},\ - {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_TPID},\ - {"cntag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name DEST_OPTION_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_OPTION 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ - {"OPTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_OPTION},\ - {"dest_option_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ESP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_NEXT_HEADER 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_PAD 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_PAD_LEN 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_SEQ_NUM 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_SPI 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT 5 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_NEXT_HEADER},\ - {"PAD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_PAD},\ - {"PAD_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_PAD_LEN},\ - {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_SEQ_NUM},\ - {"SPI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_SPI},\ - {"esp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT} - -/*! - * \name ETAG_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_TAG 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_TPID 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_TAG},\ - {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_TPID},\ - {"etag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name FRAG_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FRAG_INFO 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_ID 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_NEXT_HEADER 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_RESERVED 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ - {"FRAG_INFO", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FRAG_INFO},\ - {"ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_ID},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_NEXT_HEADER},\ - {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_RESERVED},\ - {"frag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 13 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_SVP 14 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"SOURCE_SYSTEM_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"SVP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\ - {"generic_loopback_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 - -/*! - * \name GPE_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FLAGS 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_RESERVED0 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_RESERVED1 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_VNI 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT 5 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_RESERVED0},\ - {"RESERVED1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_RESERVED1},\ - {"VNI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_VNI},\ - {"gpe_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT} - -/*! - * \name GRE_CHKSUM_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ - {"OFFSET", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ - {"gre_chksum_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} - -/*! - * \name GRE_KEY_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_KEY 0 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ - {"KEY", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_KEY},\ - {"gre_key_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT} - -/*! - * \name GRE_ROUT_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_ROUTING 0 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ - {"ROUTING", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_ROUTING},\ - {"gre_rout_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT} - -/*! - * \name GRE_SEQ_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ - {"gre_seq_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT} - -/*! - * \name GRE_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_C_R_K_S 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_PROTOCOL 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_RESERVED 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_VERSION 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ - {"C_R_K_S", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_C_R_K_S},\ - {"PROTOCOL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_PROTOCOL},\ - {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_RESERVED},\ - {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_VERSION},\ - {"gre_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT} - -/*! - * \name HOP_BY_HOP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ - {"OPTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ - {"hop_by_hop_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_CODE 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_A_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ - {"FWD_HDR_TTL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ - {"ifa_flex_md_0_a_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_B_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ - {"PORT_SPEED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ - {"QUEUE_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ - {"ifa_flex_md_0_b_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_1_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ - {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ - {"ifa_flex_md_1_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_2_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ - {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_flex_md_2_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_3_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ - {"MMU_STAT_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ - {"ifa_flex_md_3_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_MD_BASE_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ - {"ifa_md_base_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} - -/*! - * \name IFA_METADATA_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_METADATA 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"METADATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_METADATA},\ - {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ - {"ifa_metadata_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT} - -/*! - * \name IGMP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_CHECKSUM 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_IGMP_TYPE 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_CHECKSUM},\ - {"GROUP_ADDRESS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ - {"IGMP_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_IGMP_TYPE},\ - {"MAX_RESP_TIME", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ - {"igmp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_DA 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_ID 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_SA 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TOS 7 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TTL 9 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_DA 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_SA 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_MACDA 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_MACSA 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name MPLS_ACH_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_RESERVED 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_VERSION 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ - {"CHANNEL_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ - {"CW_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ - {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_RESERVED},\ - {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_VERSION},\ - {"mpls_ach_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT} - -/*! - * \name MPLS_BV_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_VALUE 0 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ - {"VALUE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_VALUE},\ - {"mpls_bv_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT} - -/*! - * \name MPLS_CW_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_RESERVED 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ - {"CW_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ - {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_RESERVED},\ - {"SEQ_NUMBER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ - {"mpls_cw_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT} - -/*! - * \name MPLS_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_BOS 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_EXP 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_LABEL 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_TTL 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ - {"BOS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_BOS},\ - {"EXP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_EXP},\ - {"LABEL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_LABEL},\ - {"TTL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_TTL},\ - {"mpls_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT} - -/*! - * \name P_1588_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_CNTRL 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_CORRECTION 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_DOMAIN_NB 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FLAGS 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_MSG_LENGTH 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_MSG_TYPE 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED1 7 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED2 8 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED3 9 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_SEQ_ID 10 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_SRCPORTID 11 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_VERSION 13 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT 14 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ - {"CNTRL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_CNTRL},\ - {"CORRECTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_CORRECTION},\ - {"DOMAIN_NB", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_DOMAIN_NB},\ - {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FLAGS},\ - {"LOGMSGINTERVAL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ - {"MSG_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_MSG_LENGTH},\ - {"MSG_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_MSG_TYPE},\ - {"RESERVED1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED1},\ - {"RESERVED2", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED2},\ - {"RESERVED3", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED3},\ - {"SEQ_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_SEQ_ID},\ - {"SRCPORTID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_SRCPORTID},\ - {"TRANSPORTSPEC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ - {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_VERSION},\ - {"p_1588_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT} - -/*! - * \name PROG_EXT_HDR_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ - {"OPTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ - {"prog_ext_hdr_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} - -/*! - * \name PSAMP_0_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FLOWSET 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_LENGTH 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ - {"FLOWSET", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FLOWSET},\ - {"LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_LENGTH},\ - {"NEXT_HOP_INDEX", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ - {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ - {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ - {"psamp_0_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT} - -/*! - * \name PSAMP_1_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_DLB_ID 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_EPOCH 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ - {"DLB_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_DLB_ID},\ - {"EGRESS_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ - {"EPOCH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_EPOCH},\ - {"INGRESS_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ - {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ - {"VARIABLE_FLAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ - {"psamp_1_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"RESERVED_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"SMOD_STATE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ - {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name ROUTING_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_DATA 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT 5 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_DATA},\ - {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ - {"routing_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT} - -/*! - * \name RSPAN_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_TAG 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_TPID 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_TAG},\ - {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_TPID},\ - {"rspan_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SNAP_LLC_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_LENGTH 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ - {"LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_LENGTH},\ - {"SNAP_LLC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ - {"snap_llc_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT} - -/*! - * \name SVTAG_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_DATA_LWR 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_DATA_UPR 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ - {"DATA_LWR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_DATA_LWR},\ - {"DATA_UPR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_DATA_UPR},\ - {"svtag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_CFI 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_PCP 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_TPID 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_VID 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VNTAG_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_TAG 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_TPID 1 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_TAG},\ - {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_TPID},\ - {"vntag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT} - -/*! - * \name WESP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FLAGS 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_HEADER_LEN 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_NEXT_HEADER 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_SEQ_NUM 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_SPI 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_TRAILER_LEN 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_WESP_IV 6 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT 7 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FLAGS},\ - {"HEADER_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_HEADER_LEN},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_NEXT_HEADER},\ - {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_SEQ_NUM},\ - {"SPI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_SPI},\ - {"TRAILER_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_TRAILER_LEN},\ - {"WESP_IV", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_WESP_IV},\ - {"wesp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT} - - -#endif /* BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index dd9b0bafb4b..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,181 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 9 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 10 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 11 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 12 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 13 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 14 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 15 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0 16 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 20 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 24 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 25 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 26 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 27 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 28 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 29 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 30 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 31 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SVP_15_0 32 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 33 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 34 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 35 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 36 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 37 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 38 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_VFI_15_0 39 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 40 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_FID_COUNT 41 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 47 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 3 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 4 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 5 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 6 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 7 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP 8 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 9 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 10 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 11 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 12 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 13 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 14 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 15 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 16 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 17 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 18 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 19 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 20 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 21 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 22 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 23 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 24 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 25 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 26 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 27 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 28 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 29 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 30 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 31 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 32 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 33 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY 34 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 35 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 36 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 37 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 38 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP 41 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 42 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 43 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 44 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 45 -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP 46 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CB_STATION_MOVE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ - {"CML_FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ - {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ - {"DST_FP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ - {"EM_FT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IFP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ - {"IVXLT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_STATIC_MOVE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_IIF_EQ_L3_OIF", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ - {"L3_TTL_ERROR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST_RSVD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ - {"MATCHED_RULE_BIT_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ - {"MATCHED_RULE_BIT_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ - {"MATCHED_RULE_BIT_2", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ - {"MATCHED_RULE_BIT_3", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ - {"MATCHED_RULE_BIT_4", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ - {"MATCHED_RULE_BIT_5", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ - {"MATCHED_RULE_BIT_6", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ - {"MATCHED_RULE_BIT_7", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ - {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ - {"MTOP_IPV4_GATEWAY", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\ - {"NO_COPY_TO_CPU", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"RESERVED_TRACE_BIT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ - {"SER_DROP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ - {"SVP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ - {"TRACE_DOP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ - {"TRACE_DO_NOT_MIRROR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ - {"URPF_CHECK_FAILED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ - {"VFP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index ccb7e42c51e..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,405 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56780_a0_hna_6_5_30_6_0_sf_match_id_info.yml - * for device bcm56780_a0 and variant hna_6_5_30_6_0. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 4 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 5 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 6 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 7 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 8 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 9 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 10 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 11 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 12 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 13 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 14 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 15 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 16 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 17 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 18 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 19 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 20 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 21 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 22 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 23 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 24 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 25 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 26 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 27 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 28 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 29 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 30 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 31 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 32 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 33 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 34 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 35 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 36 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 37 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 38 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 39 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 40 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 41 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 42 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 43 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 44 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 45 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 46 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 47 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 48 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 49 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 50 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 51 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 52 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 53 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 54 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 55 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 56 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 57 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 58 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 59 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 60 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 61 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 62 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 63 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 64 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 65 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 66 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 67 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 68 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 69 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 70 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 71 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 72 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 73 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 74 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 75 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 76 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 77 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 78 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 79 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 80 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 81 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 82 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 83 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 84 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 85 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 86 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 87 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 88 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 89 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 90 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 91 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 92 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 93 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 94 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 95 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 96 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 97 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 98 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 99 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 100 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 101 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 102 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 103 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 104 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 105 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 106 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 107 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 108 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 109 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 110 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 111 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 112 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 113 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 114 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 115 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 116 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 117 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 118 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 119 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 120 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 121 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 122 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 123 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 124 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 125 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 126 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 127 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 128 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 129 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 130 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 131 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 132 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 133 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 134 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 135 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 136 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 137 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 138 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 139 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 140 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 141 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 142 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 143 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 144 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 145 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 146 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 147 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 148 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 149 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 150 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 151 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 152 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 153 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 154 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 155 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 156 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 157 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 158 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 159 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 160 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 161 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 162 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 163 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 164 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 165 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 166 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 167 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 168 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 169 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 170 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 171 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 172 -#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_COUNT 173 - -#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..9a3103736d7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h @@ -0,0 +1,174 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_H +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T 10 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T 11 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T 12 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T 13 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T 15 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T 17 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T 18 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T 19 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T 20 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T 21 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T 22 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T 23 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T 24 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T 25 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T 26 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T 27 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T 28 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T 29 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T 30 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T 31 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T 32 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T 33 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T 34 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T 35 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T 36 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T 37 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T 38 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T 39 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T 40 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T 41 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T 42 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T 43 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T 44 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T 45 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 46 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 47 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T 48 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T 49 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T 50 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T 51 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T 52 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T 53 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T 54 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T 55 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T 56 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T 57 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T 58 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T 59 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T 60 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T 61 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T 62 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T 63 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T 64 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T 65 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T 66 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT 67 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T},\ + {"hop_by_hop_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T},\ + {"svtag_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T},\ + {"tcp_first_4bytes_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..b63c0b7c345 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1258 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_AP 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_CPI 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DEM 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIN 7 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MPT 9 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_POLL 11 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_STA 13 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TAG 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_ID 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 13 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP 14 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"SVP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\ + {"generic_loopback_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_DA 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_ID 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_SA 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_DA 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_SA 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACDA 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name SVTAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_DATA_LWR 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_DATA_UPR 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ + {"DATA_LWR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_DATA_LWR},\ + {"DATA_UPR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_DATA_UPR},\ + {"svtag_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SPI 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..6db8d7ce812 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,181 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 9 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 10 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 11 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 12 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 13 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 14 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 15 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0 16 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 20 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 24 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 25 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 26 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 27 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 28 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 29 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 30 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 31 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0 32 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 33 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 34 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 35 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 36 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 37 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 38 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0 39 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 40 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT 41 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 47 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 3 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 4 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 5 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 6 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 7 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP 8 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 9 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 10 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 11 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 12 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 13 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 14 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 15 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 16 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 17 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 18 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 19 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 20 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 21 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 22 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 23 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 24 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 25 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 26 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 27 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 28 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 29 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 30 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 31 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 32 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 33 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY 34 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 35 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 36 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 37 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 38 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP 41 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 42 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 43 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 44 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 45 +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP 46 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"MTOP_IPV4_GATEWAY", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\ + {"NO_COPY_TO_CPU", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..965fa079889 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,405 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_hna_6_5_31_3_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant hna_6_5_31_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 4 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 5 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 6 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 7 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 8 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 9 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 10 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 11 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 12 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 13 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 14 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 15 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 16 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 17 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 18 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 19 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 20 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 21 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 22 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 23 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 24 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 25 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 26 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 27 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 28 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 29 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 30 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 31 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 32 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 33 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 34 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 35 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 36 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 37 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 38 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 39 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 40 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 41 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 42 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 43 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 44 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 45 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 46 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 47 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 48 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 49 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 50 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 51 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 52 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 53 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 54 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 55 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 56 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 57 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 58 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 59 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 60 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 61 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 62 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 63 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 64 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 65 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 66 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 67 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 68 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 69 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 70 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 71 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 72 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 73 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 74 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 75 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 76 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 77 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 78 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 79 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 80 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 81 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 82 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 83 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 84 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 85 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 86 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 87 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 88 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 89 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 90 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 91 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 92 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 93 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 94 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 95 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 96 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 97 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 98 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 99 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 100 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 101 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 102 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 103 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 104 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 105 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 106 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 107 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 108 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 109 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 110 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 111 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 112 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 113 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 114 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 115 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 116 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 117 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 118 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 119 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 120 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 121 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 122 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 123 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 124 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 125 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 126 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 127 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 128 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 129 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 130 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 131 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 132 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 133 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 134 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 135 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 136 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 137 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 138 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 139 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 140 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 141 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 142 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 143 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 144 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 145 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 146 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 147 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 148 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 149 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 150 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 151 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 152 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 153 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 154 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 155 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 156 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 157 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 158 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 159 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 160 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 161 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 162 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 163 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 164 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 165 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 166 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 167 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 168 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 169 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 170 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 171 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 172 +#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT 173 + +#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr.h deleted file mode 100644 index 30e952c7335..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr.h +++ /dev/null @@ -1,178 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_H -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_H - -#include - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T 8 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T 9 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T 10 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T 11 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T 12 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T 13 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T 14 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T 15 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T 16 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T 17 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T 18 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T 19 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T 20 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T 21 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T 22 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T 23 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T 24 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T 25 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T 26 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T 27 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T 28 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T 29 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T 30 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T 31 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T 32 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T 33 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T 34 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T 35 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T 36 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T 37 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T 38 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T 39 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T 40 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T 41 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T 42 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T 43 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T 44 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T 45 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T 46 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T 47 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T 48 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 49 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 50 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T 51 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T 52 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T 53 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T 54 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T 55 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T 56 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T 57 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T 58 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T 59 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T 60 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T 61 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T 62 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T 63 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T 64 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T 65 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T 66 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T 67 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T 68 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT 69 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T},\ - {"authen_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T},\ - {"bfd_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T},\ - {"cntag_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T},\ - {"cpu_composites_0_ifa_l2_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T},\ - {"cpu_composites_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T},\ - {"dest_option_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T},\ - {"erspan3_fixed_hdr_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"esp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T},\ - {"etag_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T},\ - {"ethertype_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T},\ - {"frag_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T},\ - {"generic_loopback_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T},\ - {"gpe_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T},\ - {"gre_chksum_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T},\ - {"gre_key_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T},\ - {"gre_rout_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T},\ - {"gre_seq_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T},\ - {"gre_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T},\ - {"hg3_base_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T},\ - {"hg3_extension_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T},\ - {"hop_by_hop_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T},\ - {"icmp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T},\ - {"ifa_flex_md_0_a_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T},\ - {"ifa_flex_md_0_b_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T},\ - {"ifa_flex_md_1_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T},\ - {"ifa_flex_md_2_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T},\ - {"ifa_flex_md_3_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T},\ - {"ifa_header_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T},\ - {"ifa_md_base_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T},\ - {"ifa_metadata_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T},\ - {"igmp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T},\ - {"ipfix_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T},\ - {"l2_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T},\ - {"mpls_ach_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T},\ - {"mpls_bv_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T},\ - {"mpls_cw_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T},\ - {"mpls_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T},\ - {"p_1588_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T},\ - {"pim_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T},\ - {"prog_ext_hdr_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T},\ - {"psamp_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T},\ - {"psamp_1_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T},\ - {"psamp_mirror_on_drop_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"rarp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T},\ - {"routing_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T},\ - {"rspan_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T},\ - {"sflow_shim_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T},\ - {"snap_llc_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T},\ - {"tcp_first_4bytes_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T},\ - {"vntag_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T},\ - {"vxlan_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T},\ - {"wesp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T},\ - {"RXPMD_FLEX_T", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr_data.h deleted file mode 100644 index 2635fe09026..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,1324 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_OPERATION 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name AUTHEN_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_DATA 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_RESERVED 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_SEQ_NUM 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_SPI 5 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT 6 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_DATA},\ - {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\ - {"PAYLOAD_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ - {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_RESERVED},\ - {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_SPI},\ - {"authen_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT} - -/*! - * \name BFD_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_AP 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_BFD_LENGTH 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_CPI 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DEM 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DESMINTXINTV 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DETECTMULT 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DIAG 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FIN 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MINECHORXINTV 8 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MPT 9 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MYDISCRIM 10 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_POLL 11 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_REQMINRXINTV 12 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_STA 13 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_URDISCRIM 14 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_VERSION 15 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT 16 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ - {"AP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_AP},\ - {"BFD_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_BFD_LENGTH},\ - {"CPI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_CPI},\ - {"DEM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DEM},\ - {"DESMINTXINTV", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DESMINTXINTV},\ - {"DETECTMULT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DETECTMULT},\ - {"DIAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DIAG},\ - {"FIN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FIN},\ - {"MINECHORXINTV", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MINECHORXINTV},\ - {"MPT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MPT},\ - {"MYDISCRIM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MYDISCRIM},\ - {"POLL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_POLL},\ - {"REQMINRXINTV", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_REQMINRXINTV},\ - {"STA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_STA},\ - {"URDISCRIM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_URDISCRIM},\ - {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_VERSION},\ - {"bfd_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT} - -/*! - * \name CNTAG_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_RPID 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_TPID 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ - {"RPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_RPID},\ - {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_TPID},\ - {"cntag_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_IFA_L2_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT0 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT1 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT2 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT3 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT4 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT5 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT6 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACDA 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACSA 8 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT 9 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT6},\ - {"MACDA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACDA},\ - {"MACSA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACSA},\ - {"cpu_composites_0_ifa_l2_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name DEST_OPTION_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_OPTION 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_OPTION},\ - {"dest_option_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ESP_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_NEXT_HEADER 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_PAD 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_PAD_LEN 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_SEQ_NUM 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_SPI 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT 5 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ - {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_NEXT_HEADER},\ - {"PAD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_PAD},\ - {"PAD_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_PAD_LEN},\ - {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_SPI},\ - {"esp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT} - -/*! - * \name ETAG_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_TAG 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_TPID 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_TAG},\ - {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_TPID},\ - {"etag_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name FRAG_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FRAG_INFO 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_ID 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_NEXT_HEADER 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_RESERVED 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ - {"FRAG_INFO", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FRAG_INFO},\ - {"ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_ID},\ - {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_NEXT_HEADER},\ - {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_RESERVED},\ - {"frag_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"RESERVED_2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ - {"SOURCE_SYSTEM_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 - -/*! - * \name GPE_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FLAGS 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED0 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED1 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_VNI 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT 5 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED0},\ - {"RESERVED1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED1},\ - {"VNI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_VNI},\ - {"gpe_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT} - -/*! - * \name GRE_CHKSUM_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_OFFSET 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ - {"OFFSET", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\ - {"gre_chksum_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT} - -/*! - * \name GRE_KEY_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_KEY 0 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ - {"KEY", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_KEY},\ - {"gre_key_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT} - -/*! - * \name GRE_ROUT_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_ROUTING 0 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ - {"ROUTING", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_ROUTING},\ - {"gre_rout_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT} - -/*! - * \name GRE_SEQ_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\ - {"gre_seq_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT} - -/*! - * \name GRE_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_C_R_K_S 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_PROTOCOL 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_RESERVED 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_VERSION 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ - {"C_R_K_S", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_C_R_K_S},\ - {"PROTOCOL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_PROTOCOL},\ - {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_RESERVED},\ - {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_VERSION},\ - {"gre_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT} - -/*! - * \name HG3_BASE_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_CN 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_CNG 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_ENTROPY 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_L3_ROUTED 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_TC 11 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_VERSION 12 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT 13 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_CN},\ - {"CNG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_CNG},\ - {"ENTROPY", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_ENTROPY},\ - {"EXT_HDR_PRESENT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ - {"HG3_RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ - {"L3_ROUTED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_L3_ROUTED},\ - {"MIRROR_COPY", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ - {"RESERVED_ETYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ - {"SYSTEM_DESTINATION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ - {"SYSTEM_DESTINATION_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ - {"SYSTEM_SOURCE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ - {"TC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_TC},\ - {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_VERSION},\ - {"hg3_base_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT} - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 - -/*! - * \name HG3_EXTENSION_0_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_SVP 5 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ - {"CLASS_ID_LSB", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ - {"CLASS_ID_MSB", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ - {"DVP_OR_L3_IIF", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ - {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ - {"FORWARDING_DOMAIN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ - {"SVP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_SVP},\ - {"hg3_extension_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} - -/*! - * \name HOP_BY_HOP_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_OPTION 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_OPTION},\ - {"hop_by_hop_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT} - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_CODE 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_A_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ - {"FWD_HDR_TTL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ - {"ifa_flex_md_0_a_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_B_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ - {"PORT_SPEED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ - {"QUEUE_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ - {"ifa_flex_md_0_b_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_1_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ - {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ - {"ifa_flex_md_1_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_2_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ - {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_flex_md_2_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_3_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ - {"MMU_STAT_0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ - {"ifa_flex_md_3_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_MD_BASE_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ - {"ifa_md_base_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT} - -/*! - * \name IFA_METADATA_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_METADATA 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"METADATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_METADATA},\ - {"REQUEST_VECTOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ - {"ifa_metadata_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT} - -/*! - * \name IGMP_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_CHECKSUM 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_IGMP_TYPE 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_CHECKSUM},\ - {"GROUP_ADDRESS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\ - {"IGMP_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_IGMP_TYPE},\ - {"MAX_RESP_TIME", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\ - {"igmp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_DA 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_ID 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_OPTION 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_SA 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TOS 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TTL 9 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_DA 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_SA 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_MACDA 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_MACSA 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name MPLS_ACH_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CW_TYPE 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_RESERVED 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_VERSION 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ - {"CHANNEL_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ - {"CW_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\ - {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_RESERVED},\ - {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_VERSION},\ - {"mpls_ach_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT} - -/*! - * \name MPLS_BV_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_VALUE 0 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ - {"VALUE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_VALUE},\ - {"mpls_bv_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT} - -/*! - * \name MPLS_CW_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_CW_TYPE 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_RESERVED 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ - {"CW_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_CW_TYPE},\ - {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_RESERVED},\ - {"SEQ_NUMBER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ - {"mpls_cw_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT} - -/*! - * \name MPLS_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_BOS 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_EXP 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_LABEL 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_TTL 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ - {"BOS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_BOS},\ - {"EXP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_EXP},\ - {"LABEL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_LABEL},\ - {"TTL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_TTL},\ - {"mpls_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT} - -/*! - * \name P_1588_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_CNTRL 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_CORRECTION 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_DOMAIN_NB 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FLAGS 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_LENGTH 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_TYPE 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED1 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED2 8 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED3 9 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_SEQ_ID 10 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_SRCPORTID 11 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_TRANSPORTSPEC 12 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_VERSION 13 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT 14 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ - {"CNTRL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_CNTRL},\ - {"CORRECTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_CORRECTION},\ - {"DOMAIN_NB", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_DOMAIN_NB},\ - {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FLAGS},\ - {"LOGMSGINTERVAL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ - {"MSG_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_LENGTH},\ - {"MSG_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_TYPE},\ - {"RESERVED1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED1},\ - {"RESERVED2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED2},\ - {"RESERVED3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED3},\ - {"SEQ_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_SEQ_ID},\ - {"SRCPORTID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_SRCPORTID},\ - {"TRANSPORTSPEC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\ - {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_VERSION},\ - {"p_1588_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT} - -/*! - * \name PIM_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_0_1 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_2_3 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_4_5 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_6_7 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT \ - {"HDR_BYTES_0_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_0_1},\ - {"HDR_BYTES_2_3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_2_3},\ - {"HDR_BYTES_4_5", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_4_5},\ - {"HDR_BYTES_6_7", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_6_7},\ - {"pim_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT} - -/*! - * \name PROG_EXT_HDR_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_OPTION 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\ - {"prog_ext_hdr_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} - -/*! - * \name PSAMP_0_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FLOWSET 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_LENGTH 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT 6 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ - {"FLOWSET", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FLOWSET},\ - {"LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_LENGTH},\ - {"NEXT_HOP_INDEX", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ - {"OBS_TIME_NS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ - {"TEMPLATE_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ - {"psamp_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT} - -/*! - * \name PSAMP_1_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_DLB_ID 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EPOCH 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT 7 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ - {"DLB_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_DLB_ID},\ - {"EGRESS_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ - {"EPOCH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EPOCH},\ - {"INGRESS_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ - {"SAMPLED_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\ - {"VARIABLE_FLAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ - {"psamp_1_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"MOD_STATE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\ - {"RESERVED_0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_OPERATION 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name ROUTING_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_DATA 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_NEXT_HEADER 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_ROUTING_TYPE 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT 5 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_DATA},\ - {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ - {"routing_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT} - -/*! - * \name RSPAN_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_TAG 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_TPID 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_TAG},\ - {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_TPID},\ - {"rspan_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SNAP_LLC_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_LENGTH 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ - {"LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_LENGTH},\ - {"SNAP_LLC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ - {"snap_llc_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_CFI 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_PCP 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_TPID 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_VID 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VNTAG_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_TAG 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_TPID 1 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_TAG},\ - {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_TPID},\ - {"vntag_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT} - -/*! - * \name WESP_T field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FLAGS 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_HEADER_LEN 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_NEXT_HEADER 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_SEQ_NUM 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_SPI 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_TRAILER_LEN 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_WESP_IV 6 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT 7 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FLAGS},\ - {"HEADER_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_HEADER_LEN},\ - {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_NEXT_HEADER},\ - {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_SPI},\ - {"TRAILER_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_TRAILER_LEN},\ - {"WESP_IV", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_WESP_IV},\ - {"wesp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT} - - -#endif /* BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index a869f77fbca..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,163 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DVP_15_0 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 8 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 9 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 10 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 11 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 12 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 13 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 15 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 16 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 17 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 18 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 19 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 20 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 21 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 22 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 23 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 24 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 25 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_15_0 26 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 27 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 28 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 29 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 30 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 31 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 32 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VFI_15_0 33 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0 34 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_FID_COUNT 35 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT 41 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 2 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP 3 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT 4 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP 5 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 6 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 7 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT 8 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 9 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 10 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 11 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 12 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 13 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 14 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 15 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 16 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 17 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 18 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 19 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 20 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 21 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 22 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 23 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 24 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 25 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 26 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 27 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 28 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 29 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 30 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 31 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 32 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 33 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 34 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 35 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 36 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP 37 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 38 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 39 -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP 40 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CML_FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DST_FP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ - {"EM_FT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IFP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ - {"IVXLT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_STATIC_MOVE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_IIF_EQ_L3_OIF", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ - {"L3_TTL_ERROR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST_RSVD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ - {"MATCHED_RULE_BIT_0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ - {"MATCHED_RULE_BIT_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ - {"MATCHED_RULE_BIT_2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ - {"MATCHED_RULE_BIT_3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ - {"MATCHED_RULE_BIT_4", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ - {"MATCHED_RULE_BIT_5", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ - {"MATCHED_RULE_BIT_6", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ - {"MATCHED_RULE_BIT_7", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ - {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ - {"NO_COPY_TO_CPU", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"RESERVED_TRACE_BIT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ - {"SER_DROP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ - {"SVP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\ - {"TRACE_DOP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"URPF_CHECK_FAILED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ - {"VFP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index af0fc82d32a..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,407 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56880_a0_dna_6_5_30_1_1_sf_match_id_info.yml - * for device bcm56880_a0 and variant dna_6_5_30_1_1. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 1 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 2 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 3 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 4 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 5 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 6 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 8 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 13 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 14 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 15 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 16 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 17 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 18 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 19 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 20 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 21 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 22 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 23 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 24 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 25 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 26 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 27 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 28 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 29 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 30 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 31 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 32 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 33 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 34 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 35 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 36 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 37 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 38 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 39 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 40 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 41 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 42 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 43 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 44 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 45 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 46 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 47 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 48 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 49 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 50 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 51 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 52 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 53 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 54 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 55 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 56 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 57 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 58 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 59 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 60 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 61 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 62 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 63 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 64 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 65 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 66 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 67 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 68 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 69 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 70 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 71 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 72 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 73 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 74 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 75 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 76 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 77 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 78 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 79 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 80 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 81 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 82 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 83 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 84 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 85 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 86 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 87 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 88 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 89 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 90 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 91 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 92 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 93 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 94 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 95 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 96 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 97 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 98 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 99 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 100 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 101 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 102 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 103 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 104 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 105 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 106 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 107 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 108 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 109 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 110 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 111 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 112 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 113 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 114 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 115 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 116 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 117 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 118 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 119 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 120 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 121 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 122 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 123 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 124 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 125 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 126 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 127 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 128 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 129 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 130 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 131 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 132 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 133 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 134 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 135 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 136 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 137 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 138 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 139 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 140 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 141 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 142 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 143 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 144 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 145 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 146 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 147 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 148 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 149 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 150 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 151 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 152 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 153 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 154 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 155 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 156 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 157 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 158 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 159 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 160 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 161 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 162 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 163 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 164 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 165 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 166 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 167 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 168 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 169 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 170 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 171 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 172 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 173 -#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT 174 - -#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ - {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..b76f75a3c38 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h @@ -0,0 +1,178 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_H +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T 10 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETAG_T 11 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T 12 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T 13 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T 15 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T 17 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T 18 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T 19 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T 20 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T 21 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T 22 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T 24 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_A_T 25 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T 26 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T 27 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_2_T 28 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_3_T 29 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T 30 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T 31 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T 32 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T 33 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T 34 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T 35 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T 36 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_L2_T 37 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T 38 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T 39 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T 40 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T 41 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T 42 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T 43 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T 44 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T 45 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T 46 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T 47 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T 48 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 49 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 50 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T 51 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T 52 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T 53 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T 54 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T 55 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T 56 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T 57 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T 58 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T 59 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T 60 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T 61 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T 62 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T 63 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T 64 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VNTAG_T 65 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T 66 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T 67 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_T 68 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_COUNT 69 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_ifa_l2_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T},\ + {"cpu_composites_0_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T},\ + {"erspan3_fixed_hdr_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T},\ + {"pim_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T},\ + {"prog_ext_hdr_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..91a29b26cb3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1324 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_AP 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_CPI 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DEM 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FIN 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MPT 9 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_POLL 11 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_STA 13 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_IFA_L2_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT0 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT1 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT2 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT3 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT4 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT5 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT6 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACDA 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACSA 8 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT 9 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT6},\ + {"MACDA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACSA},\ + {"cpu_composites_0_ifa_l2_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_PAD 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETAG_T_TAG 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETAG_T_TPID 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_ID 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 13 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_SVP 14 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"SVP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\ + {"generic_loopback_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_SVP 5 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID_LSB", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ + {"CLASS_ID_MSB", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ + {"DVP_OR_L3_IIF", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_DA 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_ID 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_SA 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_DA 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_SA 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_MACDA 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PIM_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_HDR_BYTES_0_1 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_HDR_BYTES_2_3 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_HDR_BYTES_4_5 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_HDR_BYTES_6_7 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT \ + {"HDR_BYTES_0_1", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_HDR_BYTES_0_1},\ + {"HDR_BYTES_2_3", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_HDR_BYTES_2_3},\ + {"HDR_BYTES_4_5", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_HDR_BYTES_4_5},\ + {"HDR_BYTES_6_7", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_HDR_BYTES_6_7},\ + {"pim_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"MOD_STATE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\ + {"RESERVED_0", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_SPI 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..be757a27bc8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,164 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 8 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 9 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 10 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 11 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 12 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 13 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 15 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 16 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 17 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 18 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 19 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 20 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 21 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 22 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 23 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 24 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 25 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVP_15_0 26 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 27 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 28 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_ENTROPY_15_0 29 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 30 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 31 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 32 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 33 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_VFI_15_0 34 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0 35 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_FID_COUNT 36 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 41 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 3 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 4 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP 5 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 6 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 7 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 8 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 9 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 10 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 11 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 12 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 13 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 14 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 15 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 16 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 17 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 18 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 19 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 20 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 21 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 22 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 23 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 24 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 25 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 26 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 27 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 28 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 29 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 30 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 31 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 32 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 33 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 34 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 35 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 36 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP 37 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 38 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 39 +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP 40 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DST_FP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"URPF_CHECK_FAILED", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..f1f6fffac54 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,407 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_dna_6_5_31_6_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant dna_6_5_31_6_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56880_a0_dna_6_5_31_6_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56880_a0_dna_6_5_31_6_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 1 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 2 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 3 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 4 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 5 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 6 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 8 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 13 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 14 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 15 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 16 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 17 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 18 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 19 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 20 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 21 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 22 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 23 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 24 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 25 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 26 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 27 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 28 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 29 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 30 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 31 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 32 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 33 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 34 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 35 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 36 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 37 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 38 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 39 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 40 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 41 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 42 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 43 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 44 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 45 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 46 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 47 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 48 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 49 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 50 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 51 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 52 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 53 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 54 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 55 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 56 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 57 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 58 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 59 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 60 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 61 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 62 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 63 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 64 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 65 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 66 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 67 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 68 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 69 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 70 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 71 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 72 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 73 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 74 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 75 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 76 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 77 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 78 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 79 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 80 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 81 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 82 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 83 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 84 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 85 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 86 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 87 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 88 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 89 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 90 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 91 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 92 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 93 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 94 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 95 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 96 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 97 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 98 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 99 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 100 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 101 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 102 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 103 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 104 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 105 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 106 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 107 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 108 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 109 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 110 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 111 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 112 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 113 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 114 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 115 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 116 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 117 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 118 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 119 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 120 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 121 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 122 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 123 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 124 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 125 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 126 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 127 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 128 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 129 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 130 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 131 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 132 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 133 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 134 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 135 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 136 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 137 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 138 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 139 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 140 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 141 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 142 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 143 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 144 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 145 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 146 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 147 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 148 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 149 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 150 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 151 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 152 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 153 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 154 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 155 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 156 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 157 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 158 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 159 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 160 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 161 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 162 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 163 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 164 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 165 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 166 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 167 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 168 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 169 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 170 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 171 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 172 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 173 +#define BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_COUNT 174 + +#define BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr.h deleted file mode 100644 index 1e4c749bfc1..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,170 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_H -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T 7 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T 8 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T 9 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T 10 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T 11 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T 12 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T 13 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T 14 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T 15 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T 16 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T 17 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T 18 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T 19 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T 20 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T 21 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T 22 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T 23 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T 24 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T 25 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T 26 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T 27 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T 28 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T 29 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T 30 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T 31 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T 32 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T 33 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T 34 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T 35 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T 36 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T 37 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T 38 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T 39 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T 40 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T 41 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T 42 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T 43 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T 44 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 45 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 46 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T 47 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T 48 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T 49 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T 50 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T 51 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T 52 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T 53 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T 54 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T 55 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T 56 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T 57 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T 58 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T 59 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T 60 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T 61 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T 62 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T 63 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_T 64 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_COUNT 65 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T},\ - {"authen_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T},\ - {"bfd_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T},\ - {"cntag_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T},\ - {"cpu_composites_0_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"dest_option_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T},\ - {"erspan3_fixed_hdr_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"esp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T},\ - {"etag_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T},\ - {"ethertype_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T},\ - {"frag_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T},\ - {"generic_loopback_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"gpe_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T},\ - {"gre_chksum_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T},\ - {"gre_key_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T},\ - {"gre_rout_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T},\ - {"gre_seq_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T},\ - {"gre_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T},\ - {"hop_by_hop_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T},\ - {"icmp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T},\ - {"ifa_flex_md_0_a_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ - {"ifa_flex_md_0_b_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ - {"ifa_flex_md_1_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T},\ - {"ifa_flex_md_2_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T},\ - {"ifa_flex_md_3_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T},\ - {"ifa_header_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T},\ - {"ifa_md_base_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T},\ - {"ifa_metadata_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T},\ - {"igmp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T},\ - {"ipfix_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"mpls_ach_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T},\ - {"mpls_bv_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T},\ - {"mpls_cw_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T},\ - {"mpls_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T},\ - {"p_1588_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T},\ - {"prog_ext_hdr_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T},\ - {"psamp_0_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T},\ - {"psamp_1_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T},\ - {"psamp_mirror_on_drop_0_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"rarp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T},\ - {"routing_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T},\ - {"rspan_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T},\ - {"sflow_shim_0_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T},\ - {"snap_llc_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T},\ - {"tcp_first_4bytes_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T},\ - {"vntag_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T},\ - {"vxlan_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T},\ - {"wesp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T},\ - {"RXPMD_FLEX_T", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index 6b5f4c667fc..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,1212 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_DATA_H -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name AUTHEN_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_DATA 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_RESERVED 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_SPI 5 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT 6 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_DATA},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ - {"PAYLOAD_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ - {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_RESERVED},\ - {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_SPI},\ - {"authen_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT} - -/*! - * \name BFD_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_AP 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_BFD_LENGTH 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_CPI 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DEM 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DESMINTXINTV 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DETECTMULT 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DIAG 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FIN 7 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MINECHORXINTV 8 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MPT 9 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MYDISCRIM 10 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_POLL 11 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_REQMINRXINTV 12 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_STA 13 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_URDISCRIM 14 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_VERSION 15 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT 16 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ - {"AP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_AP},\ - {"BFD_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_BFD_LENGTH},\ - {"CPI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_CPI},\ - {"DEM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DEM},\ - {"DESMINTXINTV", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DESMINTXINTV},\ - {"DETECTMULT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DETECTMULT},\ - {"DIAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DIAG},\ - {"FIN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FIN},\ - {"MINECHORXINTV", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MINECHORXINTV},\ - {"MPT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MPT},\ - {"MYDISCRIM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MYDISCRIM},\ - {"POLL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_POLL},\ - {"REQMINRXINTV", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_REQMINRXINTV},\ - {"STA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_STA},\ - {"URDISCRIM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_URDISCRIM},\ - {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_VERSION},\ - {"bfd_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT} - -/*! - * \name CNTAG_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_RPID 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_TPID 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ - {"RPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_RPID},\ - {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_TPID},\ - {"cntag_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name DEST_OPTION_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_OPTION 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_OPTION},\ - {"dest_option_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ESP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_NEXT_HEADER 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_PAD 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_PAD_LEN 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_SEQ_NUM 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_SPI 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT 5 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_NEXT_HEADER},\ - {"PAD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_PAD},\ - {"PAD_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_PAD_LEN},\ - {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_SPI},\ - {"esp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT} - -/*! - * \name ETAG_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_TAG 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_TPID 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_TAG},\ - {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_TPID},\ - {"etag_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name FRAG_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FRAG_INFO 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_ID 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_NEXT_HEADER 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_RESERVED 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ - {"FRAG_INFO", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FRAG_INFO},\ - {"ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_ID},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_NEXT_HEADER},\ - {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_RESERVED},\ - {"frag_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 13 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP 14 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"SOURCE_SYSTEM_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"SVP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\ - {"generic_loopback_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 - -/*! - * \name GPE_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FLAGS 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_RESERVED0 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_RESERVED1 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_VNI 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT 5 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_RESERVED0},\ - {"RESERVED1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_RESERVED1},\ - {"VNI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_VNI},\ - {"gpe_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT} - -/*! - * \name GRE_CHKSUM_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ - {"OFFSET", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ - {"gre_chksum_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} - -/*! - * \name GRE_KEY_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_KEY 0 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ - {"KEY", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_KEY},\ - {"gre_key_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT} - -/*! - * \name GRE_ROUT_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_ROUTING 0 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ - {"ROUTING", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_ROUTING},\ - {"gre_rout_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT} - -/*! - * \name GRE_SEQ_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ - {"gre_seq_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT} - -/*! - * \name GRE_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_C_R_K_S 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_PROTOCOL 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_RESERVED 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_VERSION 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ - {"C_R_K_S", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_C_R_K_S},\ - {"PROTOCOL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_PROTOCOL},\ - {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_RESERVED},\ - {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_VERSION},\ - {"gre_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT} - -/*! - * \name HOP_BY_HOP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ - {"hop_by_hop_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_CODE 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_A_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ - {"FWD_HDR_TTL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ - {"ifa_flex_md_0_a_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_B_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ - {"PORT_SPEED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ - {"QUEUE_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ - {"ifa_flex_md_0_b_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_1_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ - {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ - {"ifa_flex_md_1_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_2_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ - {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_flex_md_2_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_3_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ - {"MMU_STAT_0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ - {"ifa_flex_md_3_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_MD_BASE_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ - {"ifa_md_base_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} - -/*! - * \name IFA_METADATA_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_METADATA 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"METADATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_METADATA},\ - {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ - {"ifa_metadata_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT} - -/*! - * \name IGMP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_CHECKSUM 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_IGMP_TYPE 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_CHECKSUM},\ - {"GROUP_ADDRESS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ - {"IGMP_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_IGMP_TYPE},\ - {"MAX_RESP_TIME", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ - {"igmp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_DA 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_ID 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_SA 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TOS 7 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TTL 9 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_DA 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_SA 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_MACDA 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_MACSA 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name MPLS_ACH_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_RESERVED 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_VERSION 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ - {"CHANNEL_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ - {"CW_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ - {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_RESERVED},\ - {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_VERSION},\ - {"mpls_ach_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT} - -/*! - * \name MPLS_BV_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_VALUE 0 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ - {"VALUE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_VALUE},\ - {"mpls_bv_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT} - -/*! - * \name MPLS_CW_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_RESERVED 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ - {"CW_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ - {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_RESERVED},\ - {"SEQ_NUMBER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ - {"mpls_cw_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT} - -/*! - * \name MPLS_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_BOS 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_EXP 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_LABEL 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_TTL 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ - {"BOS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_BOS},\ - {"EXP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_EXP},\ - {"LABEL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_LABEL},\ - {"TTL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_TTL},\ - {"mpls_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT} - -/*! - * \name P_1588_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_CNTRL 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_CORRECTION 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_DOMAIN_NB 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FLAGS 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_MSG_LENGTH 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_MSG_TYPE 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED1 7 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED2 8 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED3 9 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_SEQ_ID 10 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_SRCPORTID 11 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_VERSION 13 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT 14 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ - {"CNTRL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_CNTRL},\ - {"CORRECTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_CORRECTION},\ - {"DOMAIN_NB", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_DOMAIN_NB},\ - {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FLAGS},\ - {"LOGMSGINTERVAL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ - {"MSG_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_MSG_LENGTH},\ - {"MSG_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_MSG_TYPE},\ - {"RESERVED1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED1},\ - {"RESERVED2", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED2},\ - {"RESERVED3", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED3},\ - {"SEQ_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_SEQ_ID},\ - {"SRCPORTID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_SRCPORTID},\ - {"TRANSPORTSPEC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ - {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_VERSION},\ - {"p_1588_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT} - -/*! - * \name PROG_EXT_HDR_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ - {"prog_ext_hdr_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} - -/*! - * \name PSAMP_0_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FLOWSET 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_LENGTH 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ - {"FLOWSET", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FLOWSET},\ - {"LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_LENGTH},\ - {"NEXT_HOP_INDEX", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ - {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ - {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ - {"psamp_0_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT} - -/*! - * \name PSAMP_1_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_DLB_ID 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_EPOCH 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ - {"DLB_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_DLB_ID},\ - {"EGRESS_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ - {"EPOCH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_EPOCH},\ - {"INGRESS_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ - {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ - {"VARIABLE_FLAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ - {"psamp_1_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"MOD_STATE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\ - {"RESERVED_0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name ROUTING_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_DATA 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT 5 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_DATA},\ - {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ - {"routing_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT} - -/*! - * \name RSPAN_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_TAG 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_TPID 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_TAG},\ - {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_TPID},\ - {"rspan_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SNAP_LLC_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_LENGTH 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ - {"LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_LENGTH},\ - {"SNAP_LLC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ - {"snap_llc_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_CFI 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_PCP 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_TPID 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_VID 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VNTAG_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_TAG 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_TPID 1 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_TAG},\ - {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_TPID},\ - {"vntag_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT} - -/*! - * \name WESP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FLAGS 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_HEADER_LEN 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_NEXT_HEADER 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_SEQ_NUM 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_SPI 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_TRAILER_LEN 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_WESP_IV 6 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT 7 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FLAGS},\ - {"HEADER_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_HEADER_LEN},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_NEXT_HEADER},\ - {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_SPI},\ - {"TRAILER_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_TRAILER_LEN},\ - {"WESP_IV", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_WESP_IV},\ - {"wesp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT} - - -#endif /* BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index d986e9c3dc9..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,165 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 7 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 8 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 9 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 10 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 11 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0 12 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0 13 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 14 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0 15 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 16 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 17 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 18 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 19 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 20 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 21 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 22 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 23 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 24 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 25 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 26 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0 27 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 28 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 29 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 30 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 31 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 32 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 33 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0 34 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT 35 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 42 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 3 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 4 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 5 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP 6 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 7 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 8 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 9 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 10 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 11 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 12 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 13 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 14 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 15 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 16 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 17 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 18 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 19 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 20 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 21 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 22 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 23 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 24 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 25 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 26 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 27 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 28 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 29 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 30 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 31 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 32 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 33 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 34 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 35 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 36 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 37 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP 38 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 39 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 40 -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP 41 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CB_STATION_MOVE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ - {"CML_FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DST_FP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ - {"EM_FT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IFP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ - {"IVXLT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_STATIC_MOVE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_IIF_EQ_L3_OIF", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ - {"L3_TTL_ERROR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST_RSVD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ - {"MATCHED_RULE_BIT_0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ - {"MATCHED_RULE_BIT_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ - {"MATCHED_RULE_BIT_2", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ - {"MATCHED_RULE_BIT_3", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ - {"MATCHED_RULE_BIT_4", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ - {"MATCHED_RULE_BIT_5", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ - {"MATCHED_RULE_BIT_6", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ - {"MATCHED_RULE_BIT_7", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ - {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ - {"NO_COPY_TO_CPU", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"RESERVED_TRACE_BIT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ - {"SER_DROP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ - {"SVP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ - {"TRACE_DOP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"URPF_CHECK_FAILED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ - {"VFP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index a0ee1dc92c9..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,395 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56880_a0_hna_6_5_30_3_0_sf_match_id_info.yml - * for device bcm56880_a0 and variant hna_6_5_30_3_0. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 4 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 5 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 6 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 7 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 8 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 9 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 10 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 11 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 12 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 13 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 14 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 15 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 16 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 17 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 18 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 19 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 20 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 21 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 22 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 23 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 24 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 25 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 26 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 27 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 28 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 29 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 30 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 31 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 32 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 33 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 34 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 35 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 36 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 37 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 38 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 39 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 40 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 41 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 42 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 43 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 44 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 45 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 46 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 47 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 48 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 49 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 50 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 51 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 52 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 53 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 54 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 55 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 56 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 57 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 58 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 59 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 60 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 61 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 62 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 63 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 64 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 65 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 66 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 67 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 68 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 69 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 70 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 71 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 72 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 73 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 74 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 75 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 76 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 77 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 78 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 79 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 80 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 81 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 82 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 83 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 84 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 85 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 86 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 87 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 88 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 89 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 90 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 91 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 92 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 93 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 94 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 95 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 96 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 97 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 98 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 99 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 100 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 101 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 102 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 103 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 104 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 105 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 106 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 107 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 108 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 109 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 110 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 111 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 112 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 113 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 114 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 115 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 116 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 117 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 118 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 119 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 120 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 121 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 122 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 123 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 124 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 125 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 126 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 127 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 128 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 129 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 130 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 131 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 132 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 133 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 134 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 135 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 136 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 137 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 138 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 139 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 140 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 141 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 142 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 143 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 144 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 145 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 146 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 147 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 148 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 149 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 150 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 151 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 152 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 153 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 154 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 155 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 156 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 157 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 158 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 159 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 160 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 161 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 162 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 163 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 164 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 165 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 166 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 167 -#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_COUNT 168 - -#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..8717982e665 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h @@ -0,0 +1,170 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_H +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T 7 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T 8 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T 9 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T 10 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T 11 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T 12 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T 13 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T 14 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T 15 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T 16 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T 17 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T 18 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T 19 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T 20 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T 21 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T 22 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T 23 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T 24 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T 25 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T 26 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T 27 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T 28 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T 29 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T 30 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T 31 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T 32 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T 33 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T 34 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T 35 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T 36 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T 37 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T 38 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T 39 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T 40 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T 41 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T 42 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T 43 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T 44 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 45 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 46 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T 47 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T 48 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T 49 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T 50 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T 51 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T 52 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T 53 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T 54 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T 55 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T 56 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T 57 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T 58 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T 59 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T 60 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T 61 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T 62 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T 63 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T 64 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT 65 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T},\ + {"erspan3_fixed_hdr_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T},\ + {"hop_by_hop_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..28d093fe322 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1212 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_AP 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_CPI 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DEM 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIN 7 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MPT 9 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_POLL 11 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_STA 13 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TAG 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_ID 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 13 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP 14 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"SVP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\ + {"generic_loopback_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_DA 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_ID 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_SA 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_DA 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_SA 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACDA 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"MOD_STATE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\ + {"RESERVED_0", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SPI 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..fc2a9c06291 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,165 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 7 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 8 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 9 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 10 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 11 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0 12 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0 13 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 14 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0 15 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 16 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 17 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 18 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 19 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 20 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 21 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 22 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 23 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 24 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 25 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 26 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0 27 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 28 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 29 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 30 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 31 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 32 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 33 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0 34 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT 35 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 42 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 4 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 5 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP 6 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 7 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 8 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 9 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 10 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 11 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 12 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 13 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 14 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 15 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 16 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 17 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 18 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 19 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 20 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 21 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 22 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 23 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 24 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 25 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 26 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 27 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 28 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 29 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 30 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 31 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 32 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 33 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 34 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 35 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 36 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 37 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP 38 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 39 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 40 +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP 41 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DST_FP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"URPF_CHECK_FAILED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..486c0ae5544 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,395 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_hna_6_5_31_3_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant hna_6_5_31_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 4 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 5 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 6 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 7 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 8 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 9 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 10 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 11 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 12 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 13 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 14 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 15 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 16 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 17 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 18 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 19 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 20 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 21 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 22 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 23 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 24 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 25 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 26 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 27 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 28 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 29 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 30 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 31 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 32 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 33 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 34 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 35 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 36 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 37 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 38 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 39 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 40 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 41 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 42 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 43 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 44 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 45 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 46 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 47 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 48 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 49 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 50 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 51 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 52 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 53 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 54 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 55 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 56 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 57 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 58 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 59 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 60 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 61 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 62 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 63 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 64 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 65 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 66 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 67 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 68 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 69 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 70 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 71 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 72 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 73 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 74 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 75 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 76 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 77 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 78 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 79 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 80 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 81 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 82 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 83 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 84 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 85 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 86 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 87 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 88 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 89 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 90 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 91 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 92 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 93 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 94 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 95 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 96 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 97 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 98 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 99 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 100 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 101 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 102 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 103 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 104 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 105 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 106 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 107 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 108 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 109 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 110 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 111 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 112 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 113 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 114 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 115 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 116 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 117 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 118 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 119 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 120 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 121 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 122 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 123 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 124 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 125 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 126 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 127 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 128 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 129 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 130 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 131 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 132 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 133 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 134 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 135 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 136 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 137 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 138 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 139 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 140 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 141 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 142 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 143 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 144 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 145 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 146 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 147 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 148 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 149 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 150 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 151 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 152 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 153 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 154 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 155 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 156 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 157 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 158 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 159 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 160 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 161 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 162 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 163 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 164 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 165 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 166 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 167 +#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT 168 + +#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr.h deleted file mode 100644 index 4b40b142938..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr.h +++ /dev/null @@ -1,162 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_H -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_H - -#include - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T 7 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T 8 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T 9 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T 10 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T 11 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T 12 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T 13 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T 14 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T 15 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T 16 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T 17 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T 18 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T 19 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T 20 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T 21 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T 22 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T 23 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T 24 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T 25 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T 26 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T 27 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T 28 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T 29 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T 30 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T 31 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T 32 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T 33 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T 34 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T 35 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T 36 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T 37 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T 38 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T 39 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T 40 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 41 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 42 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T 43 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T 44 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T 45 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T 46 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T 47 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T 48 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T 49 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T 50 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T 51 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T 52 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T 53 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T 54 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T 55 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T 56 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T 57 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T 58 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T 59 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T 60 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT 61 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T},\ - {"authen_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T},\ - {"bfd_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T},\ - {"cpu_composites_0_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T},\ - {"dest_option_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T},\ - {"erspan3_fixed_hdr_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"esp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T},\ - {"etag_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T},\ - {"ethertype_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T},\ - {"frag_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T},\ - {"generic_loopback_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T},\ - {"gpe_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T},\ - {"gre_chksum_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T},\ - {"gre_key_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T},\ - {"gre_rout_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T},\ - {"gre_seq_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T},\ - {"gre_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T},\ - {"gtp_12byte_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T},\ - {"gtp_8byte_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T},\ - {"gtp_ext_4byte_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T},\ - {"gtp_with_ext_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T},\ - {"hop_by_hop_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T},\ - {"icmp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T},\ - {"igmp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T},\ - {"ipfix_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T},\ - {"l2_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T},\ - {"mpls_ach_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T},\ - {"mpls_bv_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T},\ - {"mpls_cw_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T},\ - {"mpls_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T},\ - {"opaquetag_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T},\ - {"p_1588_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T},\ - {"prog_ext_hdr_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T},\ - {"psamp_0_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T},\ - {"psamp_1_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T},\ - {"psamp_mirror_on_drop_0_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_1_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ - {"rarp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T},\ - {"routing_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T},\ - {"rspan_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T},\ - {"sflow_shim_0_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T},\ - {"snap_llc_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T},\ - {"tcp_first_4bytes_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T},\ - {"vntag_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T},\ - {"vxlan_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T},\ - {"wesp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T},\ - {"RXPMD_FLEX_T", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr_data.h deleted file mode 100644 index 188725e0be5..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,1152 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_OPERATION 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name AUTHEN_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_DATA 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_RESERVED 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_SEQ_NUM 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_SPI 5 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT 6 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_DATA},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\ - {"PAYLOAD_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ - {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_RESERVED},\ - {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_SPI},\ - {"authen_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT} - -/*! - * \name BFD_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_AP 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_BFD_LENGTH 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_CPI 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DEM 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DESMINTXINTV 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DETECTMULT 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DIAG 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FIN 7 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MINECHORXINTV 8 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MPT 9 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MYDISCRIM 10 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_POLL 11 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_REQMINRXINTV 12 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_STA 13 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_URDISCRIM 14 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_VERSION 15 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT 16 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ - {"AP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_AP},\ - {"BFD_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_BFD_LENGTH},\ - {"CPI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_CPI},\ - {"DEM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DEM},\ - {"DESMINTXINTV", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DESMINTXINTV},\ - {"DETECTMULT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DETECTMULT},\ - {"DIAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DIAG},\ - {"FIN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FIN},\ - {"MINECHORXINTV", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MINECHORXINTV},\ - {"MPT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MPT},\ - {"MYDISCRIM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MYDISCRIM},\ - {"POLL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_POLL},\ - {"REQMINRXINTV", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_REQMINRXINTV},\ - {"STA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_STA},\ - {"URDISCRIM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_URDISCRIM},\ - {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_VERSION},\ - {"bfd_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name DEST_OPTION_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_OPTION 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_OPTION},\ - {"dest_option_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ESP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_NEXT_HEADER 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_PAD 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_PAD_LEN 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_SEQ_NUM 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_SPI 4 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT 5 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_NEXT_HEADER},\ - {"PAD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_PAD},\ - {"PAD_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_PAD_LEN},\ - {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_SPI},\ - {"esp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT} - -/*! - * \name ETAG_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_PCP_DEI 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_RSRVD0 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_RSRVD1 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_SVID 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_TPID 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_VID 5 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT 6 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ - {"PCP_DEI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_PCP_DEI},\ - {"RSRVD0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_RSRVD0},\ - {"RSRVD1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_RSRVD1},\ - {"SVID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_SVID},\ - {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_TPID},\ - {"VID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_VID},\ - {"etag_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name FRAG_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FRAG_INFO 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_ID 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_NEXT_HEADER 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_RESERVED 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ - {"FRAG_INFO", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FRAG_INFO},\ - {"ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_ID},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_NEXT_HEADER},\ - {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_RESERVED},\ - {"frag_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"RESERVED_2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ - {"SOURCE_SYSTEM_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 - -/*! - * \name GPE_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FLAGS 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED0 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED1 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_VNI 4 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT 5 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED0},\ - {"RESERVED1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED1},\ - {"VNI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_VNI},\ - {"gpe_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT} - -/*! - * \name GRE_CHKSUM_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_OFFSET 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ - {"OFFSET", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\ - {"gre_chksum_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT} - -/*! - * \name GRE_KEY_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_VN_ID_UPPER 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ - {"VN_ID_LOWER_ENTROPY", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY},\ - {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_VN_ID_UPPER},\ - {"gre_key_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT} - -/*! - * \name GRE_ROUT_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_ROUTING 0 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ - {"ROUTING", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_ROUTING},\ - {"gre_rout_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT} - -/*! - * \name GRE_SEQ_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\ - {"gre_seq_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT} - -/*! - * \name GRE_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_C_R_K_S 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_PROTOCOL 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_RESERVED 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_VERSION 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ - {"C_R_K_S", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_C_R_K_S},\ - {"PROTOCOL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_PROTOCOL},\ - {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_RESERVED},\ - {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_VERSION},\ - {"gre_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT} - -/*! - * \name GTP_12BYTE_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_11_8 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_3_0 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_7_4 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT \ - {"BYTES_11_8", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_11_8},\ - {"BYTES_3_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_3_0},\ - {"BYTES_7_4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_7_4},\ - {"gtp_12byte_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT} - -/*! - * \name GTP_8BYTE_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_BYTES_3_0 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_BYTES_7_4 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT \ - {"BYTES_3_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_BYTES_3_0},\ - {"BYTES_7_4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_BYTES_7_4},\ - {"gtp_8byte_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT} - -/*! - * \name GTP_EXT_4BYTE_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR 0 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT \ - {"EXT_HDR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR},\ - {"gtp_ext_4byte_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT} - -/*! - * \name GTP_WITH_EXT_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT \ - {"BYTES_11_8", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8},\ - {"BYTES_3_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0},\ - {"BYTES_7_4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4},\ - {"gtp_with_ext_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT} - -/*! - * \name HOP_BY_HOP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_OPTION 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_OPTION},\ - {"hop_by_hop_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT} - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_CODE 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IGMP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_CHECKSUM 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_IGMP_TYPE 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_CHECKSUM},\ - {"GROUP_ADDRESS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\ - {"IGMP_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_IGMP_TYPE},\ - {"MAX_RESP_TIME", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\ - {"igmp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_DA 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_ID 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_OPTION 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_SA 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TOS 7 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TTL 9 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_DA 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_SA 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_MACDA 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_MACSA 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name MPLS_ACH_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CW_TYPE 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_RESERVED 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_VERSION 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ - {"CHANNEL_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ - {"CW_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\ - {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_RESERVED},\ - {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_VERSION},\ - {"mpls_ach_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT} - -/*! - * \name MPLS_BV_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_VALUE 0 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ - {"VALUE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_VALUE},\ - {"mpls_bv_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT} - -/*! - * \name MPLS_CW_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_CW_TYPE 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_RESERVED 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ - {"CW_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_CW_TYPE},\ - {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_RESERVED},\ - {"SEQ_NUMBER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ - {"mpls_cw_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT} - -/*! - * \name MPLS_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_BOS 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_EXP 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_LABEL 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_TTL 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ - {"BOS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_BOS},\ - {"EXP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_EXP},\ - {"LABEL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_LABEL},\ - {"TTL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_TTL},\ - {"mpls_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT} - -/*! - * \name OPAQUETAG_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_TPID 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_VLAN_TAG 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT \ - {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_TPID},\ - {"VLAN_TAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_VLAN_TAG},\ - {"opaquetag_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT} - -/*! - * \name P_1588_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_CNTRL 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_CORRECTION 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_DOMAIN_NB 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FLAGS 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_LENGTH 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_TYPE 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED1 7 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED2 8 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED3 9 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_SEQ_ID 10 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_SRCPORTID 11 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_TRANSPORTSPEC 12 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_VERSION 13 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT 14 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ - {"CNTRL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_CNTRL},\ - {"CORRECTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_CORRECTION},\ - {"DOMAIN_NB", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_DOMAIN_NB},\ - {"FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FLAGS},\ - {"LOGMSGINTERVAL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ - {"MSG_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_LENGTH},\ - {"MSG_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_TYPE},\ - {"RESERVED1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED1},\ - {"RESERVED2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED2},\ - {"RESERVED3", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED3},\ - {"SEQ_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_SEQ_ID},\ - {"SRCPORTID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_SRCPORTID},\ - {"TRANSPORTSPEC", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\ - {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_VERSION},\ - {"p_1588_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT} - -/*! - * \name PROG_EXT_HDR_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_OPTION 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\ - {"prog_ext_hdr_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} - -/*! - * \name PSAMP_0_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FLOWSET 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_LENGTH 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT 6 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ - {"FLOWSET", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FLOWSET},\ - {"LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_LENGTH},\ - {"NEXT_HOP_INDEX", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ - {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ - {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ - {"psamp_0_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT} - -/*! - * \name PSAMP_1_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_DLB_ID 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EPOCH 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT 7 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ - {"DLB_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_DLB_ID},\ - {"EGRESS_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ - {"EPOCH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EPOCH},\ - {"INGRESS_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ - {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\ - {"VARIABLE_FLAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ - {"psamp_1_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ - {"ING_DROP_REASON", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ - {"MIRROR_ON_DROP_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ - {"MMU_DROP_CTRL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ - {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_OPERATION 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name ROUTING_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_DATA 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_NEXT_HEADER 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_ROUTING_TYPE 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT 5 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_DATA},\ - {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ - {"routing_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT} - -/*! - * \name RSPAN_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_TAG 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_TPID 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_TAG},\ - {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_TPID},\ - {"rspan_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SNAP_LLC_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_LENGTH 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ - {"LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_LENGTH},\ - {"SNAP_LLC", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ - {"snap_llc_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_CFI 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_PCP 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_TPID 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_VID 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VNTAG_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_TAG 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_TPID 1 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_TAG},\ - {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_TPID},\ - {"vntag_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID_UPPER 2 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"VN_ID_LOWER_RESERVED2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2},\ - {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID_UPPER},\ - {"vxlan_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT} - -/*! - * \name WESP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FLAGS 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_HEADER_LEN 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_NEXT_HEADER 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_SEQ_NUM 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_SPI 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_TRAILER_LEN 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_WESP_IV 6 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT 7 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FLAGS},\ - {"HEADER_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_HEADER_LEN},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_NEXT_HEADER},\ - {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_SPI},\ - {"TRAILER_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_TRAILER_LEN},\ - {"WESP_IV", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_WESP_IV},\ - {"wesp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT} - - -#endif /* BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index 04a86764bd0..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,173 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DVP_15_0 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 7 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 8 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0 9 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0 10 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0 11 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 12 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 13 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 15 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 16 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 17 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 18 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 19 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 20 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 21 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 22 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 23 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 24 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 25 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_15_0 26 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 27 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 28 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 29 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0 30 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 31 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 32 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VFI_15_0 33 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 34 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_FID_COUNT 35 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT 46 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 2 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP 3 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT 4 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP 5 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 6 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 7 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT 8 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 9 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 10 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 11 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 12 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 13 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 14 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 15 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 16 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 17 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 18 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 19 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 20 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 21 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 22 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 23 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 24 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 25 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 26 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 27 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 28 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 29 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 30 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 31 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 32 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF 33 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS 34 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS 35 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED 36 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED 37 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 38 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 39 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 40 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 41 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP 42 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 44 -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP 45 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CML_FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DST_FP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ - {"EM_FT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IFP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ - {"IVXLT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_DISCARD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ - {"L2_SRC_STATIC_MOVE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_IIF_EQ_L3_OIF", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ - {"L3_TTL_ERROR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST_RSVD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ - {"MATCHED_RULE_BIT_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ - {"MATCHED_RULE_BIT_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ - {"MATCHED_RULE_BIT_2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ - {"MATCHED_RULE_BIT_3", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ - {"MATCHED_RULE_BIT_4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ - {"MATCHED_RULE_BIT_5", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ - {"MATCHED_RULE_BIT_6", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ - {"MATCHED_RULE_BIT_7", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ - {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ - {"NO_COPY_TO_CPU", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PE_RPF", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF},\ - {"PE_VID_FWD_MISS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS},\ - {"PE_VID_RPF_MISS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS},\ - {"PKT_ETAG_EXPECTED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED},\ - {"PKT_ETAG_UNEXPECTED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"SER_DROP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ - {"SVP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\ - {"TRACE_DOP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"URPF_CHECK_FAILED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ - {"VFP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index fc064a40e53..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,427 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56880_a0_nfa_6_5_30_1_1_sf_match_id_info.yml - * for device bcm56880_a0 and variant nfa_6_5_30_1_1. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG 4 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 5 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN 6 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 8 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 13 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 14 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 15 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 16 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 17 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 18 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 19 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 20 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 21 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 22 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE 23 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE 24 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE 25 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT 26 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 27 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 28 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 29 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 30 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 31 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 32 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 33 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 34 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 35 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 36 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 37 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 38 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 39 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 40 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 41 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 42 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 43 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 44 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 45 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 46 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 47 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 48 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 49 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 50 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 51 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 52 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 53 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 54 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 55 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG 56 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 57 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN 58 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 59 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 60 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 61 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 62 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 63 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 64 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 65 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 66 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 67 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 68 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 69 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 70 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 71 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 72 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 73 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 74 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE 75 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE 76 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE 77 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT 78 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 79 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 80 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 81 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 82 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 83 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 84 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 85 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 86 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 87 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 88 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 89 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 90 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 91 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 92 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 93 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 94 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 95 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 96 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 97 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 98 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 99 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 100 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 101 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 102 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 103 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 104 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 105 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG 106 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 107 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN 108 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 109 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 110 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 111 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 112 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 113 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 114 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 115 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 116 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 117 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 118 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 119 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 120 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 121 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 122 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 123 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 124 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 125 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 126 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 127 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 128 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 129 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 130 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 131 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 132 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 133 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 134 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 135 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG 136 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 137 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN 138 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 139 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 140 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 141 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 142 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 143 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 144 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 145 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 146 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 147 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 148 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 149 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 150 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 151 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 152 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 153 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 154 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE 155 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE 156 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE 157 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT 158 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 159 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 160 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 161 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 162 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 163 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 164 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 165 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 166 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 167 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 168 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 169 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 170 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 171 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 172 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 173 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 174 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 175 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 176 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 177 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 178 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 179 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 180 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 181 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 182 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 183 -#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT 184 - -#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN}, \ - {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..b7a030bb1ab --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr.h @@ -0,0 +1,162 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_H +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_H + +#include + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T 7 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T 8 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T 9 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T 10 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T 11 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T 12 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T 13 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T 14 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T 15 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T 16 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T 17 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T 18 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T 19 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T 20 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T 21 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T 22 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T 24 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T 25 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T 26 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T 27 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T 28 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T 29 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T 30 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T 31 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T 32 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T 33 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T 34 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T 35 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T 36 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T 37 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T 38 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T 39 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T 40 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 41 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 42 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T 43 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T 44 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T 45 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T 46 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T 47 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T 48 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T 49 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T 50 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T 51 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T 52 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T 53 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T 54 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T 55 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T 56 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T 57 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T 58 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T 59 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_T 60 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_COUNT 61 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T},\ + {"authen_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T},\ + {"cpu_composites_0_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T},\ + {"erspan3_fixed_hdr_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T},\ + {"etag_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T},\ + {"gtp_12byte_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T},\ + {"gtp_8byte_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T},\ + {"gtp_ext_4byte_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T},\ + {"gtp_with_ext_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T},\ + {"hop_by_hop_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T},\ + {"igmp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T},\ + {"l2_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T},\ + {"opaquetag_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T},\ + {"p_1588_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"rarp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T},\ + {"routing_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..33148f9bae2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr_data.h @@ -0,0 +1,1152 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_DATA_H +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_OPERATION 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_AP 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_CPI 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DEM 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DIAG 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FIN 7 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_MPT 9 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_POLL 11 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_STA 13 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_VERSION 15 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_PAD 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_SPI 4 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_PCP_DEI 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_RSRVD0 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_RSRVD1 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_SVID 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_TPID 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_VID 5 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"PCP_DEI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_PCP_DEI},\ + {"RSRVD0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_RSRVD0},\ + {"RSRVD1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_RSRVD1},\ + {"SVID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_SVID},\ + {"TPID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_TPID},\ + {"VID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_VID},\ + {"etag_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_ID 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FLAGS 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_VNI 4 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_VN_ID_UPPER 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"VN_ID_LOWER_ENTROPY", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY},\ + {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_VN_ID_UPPER},\ + {"gre_key_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_RESERVED 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_VERSION 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name GTP_12BYTE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_BYTES_11_8 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_BYTES_3_0 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_BYTES_7_4 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT \ + {"BYTES_11_8", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_BYTES_11_8},\ + {"BYTES_3_0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_BYTES_3_0},\ + {"BYTES_7_4", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_BYTES_7_4},\ + {"gtp_12byte_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FID_COUNT} + +/*! + * \name GTP_8BYTE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_BYTES_3_0 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_BYTES_7_4 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT \ + {"BYTES_3_0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_BYTES_3_0},\ + {"BYTES_7_4", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_BYTES_7_4},\ + {"gtp_8byte_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FID_COUNT} + +/*! + * \name GTP_EXT_4BYTE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR 0 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT \ + {"EXT_HDR", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR},\ + {"gtp_ext_4byte_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT} + +/*! + * \name GTP_WITH_EXT_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT \ + {"BYTES_11_8", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8},\ + {"BYTES_3_0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0},\ + {"BYTES_7_4", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4},\ + {"gtp_with_ext_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_CODE 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_DA 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_ID 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_OPTION 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_SA 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_TOS 7 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_TTL 9 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_DA 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_SA 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_MACDA 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_MACSA 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_BOS 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_EXP 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_LABEL 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_TTL 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name OPAQUETAG_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_TPID 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_VLAN_TAG 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT \ + {"TPID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_TPID},\ + {"VLAN_TAG", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_VLAN_TAG},\ + {"opaquetag_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_OPERATION 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_DATA 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_TAG 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_CFI 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_PCP 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_TPID 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_VID 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_TAG 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_VN_ID_UPPER 2 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"VN_ID_LOWER_RESERVED2", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2},\ + {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_VN_ID_UPPER},\ + {"vxlan_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FLAGS 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_SPI 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..fadbff5d32b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,173 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 7 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 8 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0 9 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0 10 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0 11 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 12 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 13 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 15 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 16 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 17 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 18 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 19 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 20 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 21 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 22 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 23 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 24 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 25 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SVP_15_0 26 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 27 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 28 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 29 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0 30 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 31 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 32 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_VFI_15_0 33 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 34 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_FID_COUNT 35 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT 46 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP 3 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT 4 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP 5 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 6 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 7 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT 8 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 9 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 10 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 11 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 12 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 13 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 14 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 15 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 16 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 17 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 18 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 19 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 20 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 21 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 22 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 23 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 24 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 25 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 26 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 27 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 28 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 29 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 30 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 31 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 32 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF 33 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS 34 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS 35 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED 36 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED 37 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 38 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 39 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 40 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 41 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP 42 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 44 +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP 45 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DST_FP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PE_RPF", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF},\ + {"PE_VID_FWD_MISS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS},\ + {"PE_VID_RPF_MISS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS},\ + {"PKT_ETAG_EXPECTED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED},\ + {"PKT_ETAG_UNEXPECTED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"URPF_CHECK_FAILED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..1a40cb84fbc --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,427 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_nfa_6_5_31_3_1_sf_match_id_info.yml + * for device bcm56880_a0 and variant nfa_6_5_31_3_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG 4 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 5 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN 6 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 8 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 13 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 14 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 15 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 16 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 17 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 18 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 19 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 20 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 21 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 22 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE 23 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE 24 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE 25 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT 26 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 27 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 28 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 29 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 30 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 31 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 32 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 33 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 34 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 35 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 36 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 37 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 38 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 39 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 40 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 41 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 42 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 43 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 44 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 45 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 46 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 47 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 48 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 49 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 50 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 51 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 52 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 53 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 54 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 55 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG 56 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 57 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN 58 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 59 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 60 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 61 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 62 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 63 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 64 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 65 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 66 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 67 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 68 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 69 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 70 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 71 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 72 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 73 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 74 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE 75 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE 76 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE 77 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT 78 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 79 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 80 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 81 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 82 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 83 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 84 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 85 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 86 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 87 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 88 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 89 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 90 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 91 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 92 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 93 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 94 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 95 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 96 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 97 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 98 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 99 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 100 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 101 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 102 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 103 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 104 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 105 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG 106 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 107 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN 108 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 109 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 110 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 111 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 112 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 113 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 114 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 115 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 116 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 117 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 118 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 119 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 120 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 121 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 122 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 123 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 124 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 125 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 126 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 127 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 128 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 129 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 130 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 131 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 132 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 133 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 134 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 135 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG 136 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 137 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN 138 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 139 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 140 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 141 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 142 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 143 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 144 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 145 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 146 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 147 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 148 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 149 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 150 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 151 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 152 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 153 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 154 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE 155 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE 156 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE 157 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT 158 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 159 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 160 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 161 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 162 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 163 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 164 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 165 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 166 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 167 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 168 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 169 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 170 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 171 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 172 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 173 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 174 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 175 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 176 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 177 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 178 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 179 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 180 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 181 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 182 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 183 +#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_COUNT 184 + +#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h deleted file mode 100644 index 5a0497165ae..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,96 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T 6 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T 7 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T 8 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T 9 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T 10 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T 11 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T 12 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 13 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T 14 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 15 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 16 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T 17 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T 18 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T 19 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T 20 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T 21 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T 22 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T 23 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T 24 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T 25 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T 26 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T 27 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT 28 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T},\ - {"cpu_composites_0_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"ep_nih_header_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"ethertype_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T},\ - {"generic_loopback_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"icmp_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T},\ - {"ipfix_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"psamp_mirror_on_drop_0_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_1_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ - {"psamp_mirror_on_drop_2_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\ - {"rarp_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T},\ - {"tcp_first_4bytes_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T},\ - {"vxlan_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T},\ - {"RXPMD_FLEX_T", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index b7c0fb4f349..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,592 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"RESERVED_2", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ - {"SOURCE_SYSTEM_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_DA 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_ID 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_SA 6 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS 7 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL 9 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_DA 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_SA 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACDA 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACSA 1 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ - {"ING_DROP_REASON", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ - {"MIRROR_ON_DROP_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ - {"MMU_DROP_CTRL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ - {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_1_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_2_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR 5 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT 6 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \ - {"EGR_DROP_REASON", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\ - {"EP_COPY_SESSION_INDEX", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\ - {"RESERVED_0", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_2_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_VID 3 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT} - - -#endif /* BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index e4fd6a6ccec..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,124 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 14 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 15 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0 16 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 18 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 19 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 20 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 21 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0 22 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 23 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 24 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 25 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 26 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 27 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 28 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 29 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 30 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 31 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 32 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 33 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 34 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 35 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 36 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 21 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 1 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 2 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 3 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 4 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 5 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 6 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 7 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 8 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 9 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 10 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 11 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 12 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 13 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 14 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 15 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 17 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 19 -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 20 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CML_FLAGS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"IFP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IVXLT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_DISCARD", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ - {"L2_SRC_STATIC_MOVE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_TTL_ERROR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ - {"MEMBERSHIP_CHECK_FAILED", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ - {"NO_COPY_TO_CPU", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"SPANNING_TREE_CHECK_FAILED", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ - {"TRACE_DOP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"VFP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index 6d34bc8283a..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,213 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56890_a0_cna_6_5_30_2_0_sf_match_id_info.yml - * for device bcm56890_a0 and variant cna_6_5_30_2_0. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 7 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 8 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 9 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 10 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 11 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 12 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 13 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 14 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 15 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 16 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 17 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 18 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 19 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 20 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 21 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 22 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 23 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 24 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 25 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 26 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 27 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 28 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 29 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 30 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 31 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 32 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 33 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 34 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 35 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 36 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 37 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 38 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 39 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 40 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 41 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 42 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 43 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 44 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 45 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 46 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 47 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 48 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 49 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 50 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 51 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 52 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 53 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 54 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 55 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 56 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 57 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 58 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 59 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 60 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 61 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 62 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 63 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 64 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 65 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 66 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 67 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 68 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 69 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 70 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 71 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 72 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 73 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 74 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 75 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 76 -#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT 77 - -#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..f40b0e50cd6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h @@ -0,0 +1,96 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_H +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T 6 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T 7 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T 8 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T 9 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T 10 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T 11 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T 12 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T 13 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T 14 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 15 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 16 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T 17 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T 18 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T 19 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T 20 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T 21 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T 22 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T 23 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T 24 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T 25 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T 26 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T 27 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT 28 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T},\ + {"cpu_composites_0_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"ep_nih_header_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"ethertype_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T},\ + {"generic_loopback_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"icmp_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T},\ + {"ipfix_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"psamp_mirror_on_drop_0_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"psamp_mirror_on_drop_2_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\ + {"rarp_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T},\ + {"tcp_first_4bytes_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T},\ + {"RXPMD_FLEX_T", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..430a15cafe9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,592 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_DA 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_ID 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_SA 6 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_DA 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_SA 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACDA 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_2_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR 5 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT 6 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \ + {"EGR_DROP_REASON", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\ + {"EP_COPY_SESSION_INDEX", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\ + {"RESERVED_0", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_2_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT} + + +#endif /* BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..92342a29d0a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,124 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 14 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 15 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0 16 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 18 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 19 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 20 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 21 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0 22 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 23 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 24 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 25 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 26 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 27 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 28 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 29 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 30 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 31 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 32 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 33 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 34 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0 35 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT 36 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 21 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP 1 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 2 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 3 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 4 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 5 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 6 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 7 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 8 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 9 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 10 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 11 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 12 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 13 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 14 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 15 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 17 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 19 +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP 20 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"IFP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IVXLT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_TTL_ERROR", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"NO_COPY_TO_CPU", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SPANNING_TREE_CHECK_FAILED", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"TRACE_DOP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"VFP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..30aa758fba7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,213 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_cna_6_5_31_3_0_sf_match_id_info.yml + * for device bcm56890_a0 and variant cna_6_5_31_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 7 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 8 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 9 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 10 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 11 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 12 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 13 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 14 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 15 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 16 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 17 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 18 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 19 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 20 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 21 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 22 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 23 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 24 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 25 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 26 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 27 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 28 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 29 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 30 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 31 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 32 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 33 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 34 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 35 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 36 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 37 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 38 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 39 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 40 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 41 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 42 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 43 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 44 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 45 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 46 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 47 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 48 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 49 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 50 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 51 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 52 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 53 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 54 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 55 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 56 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 57 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 58 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 59 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 60 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 61 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 62 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 63 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 64 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 65 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 66 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 67 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 68 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 69 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 70 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 71 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 72 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 73 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 74 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 75 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 76 +#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT 77 + +#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr.h deleted file mode 100644 index 52afc1e47ca..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,176 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_H -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T 10 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T 11 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T 12 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T 13 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T 14 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T 15 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T 16 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T 17 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T 18 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T 19 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T 20 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T 21 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T 22 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T 23 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T 24 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T 25 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T 26 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T 27 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T 28 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T 29 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T 30 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T 31 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T 32 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T 33 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T 34 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T 35 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T 36 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T 37 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T 38 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T 39 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T 40 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T 41 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T 42 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T 43 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T 44 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 45 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 46 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T 47 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T 48 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T 49 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T 50 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T 51 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T 52 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T 53 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T 54 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T 55 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T 56 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T 57 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T 58 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T 59 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T 60 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T 61 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T 62 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T 63 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T 64 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T 65 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T 66 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_T 67 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_COUNT 68 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T},\ - {"authen_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T},\ - {"bfd_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T},\ - {"cntag_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T},\ - {"cpu_composites_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"dest_option_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T},\ - {"ep_nih_header_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"esp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T},\ - {"ethertype_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T},\ - {"frag_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T},\ - {"gbp_ethernet_shim_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T},\ - {"generic_loopback_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"gpe_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T},\ - {"gre_chksum_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T},\ - {"gre_key_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T},\ - {"gre_rout_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T},\ - {"gre_seq_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T},\ - {"gre_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T},\ - {"hg3_base_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T},\ - {"hg3_extension_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T},\ - {"hop_by_hop_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T},\ - {"icmp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T},\ - {"ifa_header_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T},\ - {"ifa_metadata_a_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T},\ - {"ifa_metadata_b_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T},\ - {"ifa_metadata_base_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T},\ - {"igmp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T},\ - {"ioam_e2e_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T},\ - {"ipfix_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"mpls_ach_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T},\ - {"mpls_bv_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T},\ - {"mpls_cw_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T},\ - {"mpls_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T},\ - {"p_1588_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T},\ - {"prog_ext_hdr_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T},\ - {"psamp_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T},\ - {"psamp_1_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T},\ - {"psamp_mirror_on_drop_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"rarp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T},\ - {"routing_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T},\ - {"rspan_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T},\ - {"segment_routing_srh_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T},\ - {"segment_routing_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T},\ - {"sflow_shim_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T},\ - {"snap_llc_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T},\ - {"std_segment_id_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T},\ - {"svtag_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T},\ - {"tcp_first_4bytes_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T},\ - {"vxlan_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T},\ - {"wesp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T},\ - {"RXPMD_FLEX_T", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index 765cb7355c7..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,1361 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_DATA_H -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name AUTHEN_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_DATA 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_RESERVED 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_SPI 5 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_DATA},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ - {"PAYLOAD_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ - {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_RESERVED},\ - {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ - {"SPI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_SPI},\ - {"authen_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT} - -/*! - * \name BFD_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_AP 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_BFD_LENGTH 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_CPI 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DEM 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DESMINTXINTV 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DETECTMULT 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DIAG 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FIN 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MINECHORXINTV 8 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MPT 9 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MYDISCRIM 10 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_POLL 11 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_REQMINRXINTV 12 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_STA 13 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_URDISCRIM 14 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_VERSION 15 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT 16 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ - {"AP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_AP},\ - {"BFD_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_BFD_LENGTH},\ - {"CPI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_CPI},\ - {"DEM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DEM},\ - {"DESMINTXINTV", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DESMINTXINTV},\ - {"DETECTMULT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DETECTMULT},\ - {"DIAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DIAG},\ - {"FIN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FIN},\ - {"MINECHORXINTV", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MINECHORXINTV},\ - {"MPT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MPT},\ - {"MYDISCRIM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MYDISCRIM},\ - {"POLL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_POLL},\ - {"REQMINRXINTV", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_REQMINRXINTV},\ - {"STA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_STA},\ - {"URDISCRIM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_URDISCRIM},\ - {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_VERSION},\ - {"bfd_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT} - -/*! - * \name CNTAG_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_RPID 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_TPID 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ - {"RPID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_RPID},\ - {"TPID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_TPID},\ - {"cntag_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name DEST_OPTION_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_OPTION 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ - {"OPTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_OPTION},\ - {"dest_option_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ESP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_NEXT_HEADER 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_PAD 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_PAD_LEN 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_SEQ_NUM 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_SPI 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT 5 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_NEXT_HEADER},\ - {"PAD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_PAD},\ - {"PAD_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_PAD_LEN},\ - {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_SEQ_NUM},\ - {"SPI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_SPI},\ - {"esp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name FRAG_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FRAG_INFO 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_ID 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_NEXT_HEADER 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_RESERVED 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ - {"FRAG_INFO", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FRAG_INFO},\ - {"ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_ID},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_NEXT_HEADER},\ - {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_RESERVED},\ - {"frag_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT} - -/*! - * \name GBP_ETHERNET_SHIM_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER 5 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \ - {"ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\ - {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\ - {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\ - {"SID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\ - {"SUBTYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\ - {"VER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\ - {"gbp_ethernet_shim_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM 13 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"SOURCE_SYSTEM_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"SRC_SUBPORT_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\ - {"START_BYTE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 - -/*! - * \name GPE_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FLAGS 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_RESERVED0 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_RESERVED1 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_VNI 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT 5 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_RESERVED0},\ - {"RESERVED1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_RESERVED1},\ - {"VNI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_VNI},\ - {"gpe_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT} - -/*! - * \name GRE_CHKSUM_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ - {"OFFSET", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ - {"gre_chksum_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} - -/*! - * \name GRE_KEY_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_KEY 0 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ - {"KEY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_KEY},\ - {"gre_key_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT} - -/*! - * \name GRE_ROUT_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_ROUTING 0 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ - {"ROUTING", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_ROUTING},\ - {"gre_rout_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT} - -/*! - * \name GRE_SEQ_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ - {"gre_seq_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT} - -/*! - * \name GRE_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_C_R_K_S 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_PROTOCOL 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_RESERVED 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_VERSION 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ - {"C_R_K_S", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_C_R_K_S},\ - {"PROTOCOL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_PROTOCOL},\ - {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_RESERVED},\ - {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_VERSION},\ - {"gre_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT} - -/*! - * \name HG3_BASE_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_CN 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_CNG 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_ENTROPY 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_TC 11 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_VERSION 12 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_CN},\ - {"CNG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_CNG},\ - {"ENTROPY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_ENTROPY},\ - {"EXT_HDR_PRESENT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ - {"HG3_RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ - {"L3_ROUTED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ - {"MIRROR_COPY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ - {"RESERVED_ETYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ - {"SYSTEM_DESTINATION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ - {"SYSTEM_DESTINATION_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ - {"SYSTEM_SOURCE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ - {"TC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_TC},\ - {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_VERSION},\ - {"hg3_base_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT} - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 - -/*! - * \name HG3_EXTENSION_0_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_SVP 5 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ - {"CLASS_ID_LSB", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ - {"CLASS_ID_MSB", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ - {"DVP_OR_L3_IIF", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ - {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ - {"FORWARDING_DOMAIN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ - {"SVP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ - {"hg3_extension_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} - -/*! - * \name HOP_BY_HOP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ - {"OPTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ - {"hop_by_hop_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_CODE 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_METADATA_A_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_CN 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_CN},\ - {"FWD_HDR_TTL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\ - {"PORT_SPEED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\ - {"QUEUE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\ - {"ifa_metadata_a_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT} - -/*! - * \name IFA_METADATA_B_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\ - {"MMU_STAT_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\ - {"RESIDENCE_TIME_NANOSEC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\ - {"RX_TIMESTAMP_NANOSEC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_metadata_b_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT} - -/*! - * \name IFA_METADATA_BASE_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\ - {"ifa_metadata_base_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT} - -/*! - * \name IGMP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_CHECKSUM 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_IGMP_TYPE 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_CHECKSUM},\ - {"GROUP_ADDRESS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ - {"IGMP_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_IGMP_TYPE},\ - {"MAX_RESP_TIME", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ - {"igmp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT} - -/*! - * \name IOAM_E2E_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_RESERVED 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_TYPE 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \ - {"IOAM_E2E_DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\ - {"IOAM_E2E_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\ - {"IOAM_HDR_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\ - {"NAMESPACE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\ - {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\ - {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_RESERVED},\ - {"TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_TYPE},\ - {"ioam_e2e_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_DA 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_ID 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_SA 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TOS 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TTL 9 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_DA 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_SA 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_MACDA 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_MACSA 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name MPLS_ACH_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_RESERVED 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_VERSION 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ - {"CHANNEL_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ - {"CW_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ - {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_RESERVED},\ - {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_VERSION},\ - {"mpls_ach_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT} - -/*! - * \name MPLS_BV_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_VALUE 0 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ - {"VALUE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_VALUE},\ - {"mpls_bv_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT} - -/*! - * \name MPLS_CW_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_RESERVED 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ - {"CW_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ - {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_RESERVED},\ - {"SEQ_NUMBER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ - {"mpls_cw_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT} - -/*! - * \name MPLS_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_BOS 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_EXP 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_LABEL 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_TTL 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ - {"BOS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_BOS},\ - {"EXP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_EXP},\ - {"LABEL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_LABEL},\ - {"TTL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_TTL},\ - {"mpls_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT} - -/*! - * \name P_1588_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_CNTRL 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_CORRECTION 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_DOMAIN_NB 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FLAGS 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_MSG_LENGTH 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_MSG_TYPE 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED1 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED2 8 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED3 9 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_SEQ_ID 10 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_SRCPORTID 11 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_VERSION 13 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT 14 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ - {"CNTRL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_CNTRL},\ - {"CORRECTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_CORRECTION},\ - {"DOMAIN_NB", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_DOMAIN_NB},\ - {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FLAGS},\ - {"LOGMSGINTERVAL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ - {"MSG_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_MSG_LENGTH},\ - {"MSG_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_MSG_TYPE},\ - {"RESERVED1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED1},\ - {"RESERVED2", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED2},\ - {"RESERVED3", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED3},\ - {"SEQ_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_SEQ_ID},\ - {"SRCPORTID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_SRCPORTID},\ - {"TRANSPORTSPEC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ - {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_VERSION},\ - {"p_1588_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT} - -/*! - * \name PROG_EXT_HDR_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ - {"OPTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ - {"prog_ext_hdr_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} - -/*! - * \name PSAMP_0_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FLOWSET 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_LENGTH 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ - {"FLOWSET", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FLOWSET},\ - {"LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_LENGTH},\ - {"NEXT_HOP_INDEX", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ - {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ - {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ - {"psamp_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT} - -/*! - * \name PSAMP_1_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_DLB_ID 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_EPOCH 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ - {"DLB_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_DLB_ID},\ - {"EGRESS_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ - {"EPOCH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_EPOCH},\ - {"INGRESS_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ - {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ - {"VARIABLE_FLAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ - {"psamp_1_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"RESERVED_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"SMOD_STATE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ - {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name ROUTING_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_DATA 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT 5 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_DATA},\ - {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ - {"routing_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT} - -/*! - * \name RSPAN_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_TAG 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_TPID 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_TAG},\ - {"TPID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_TPID},\ - {"rspan_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT} - -/*! - * \name SEGMENT_ROUTING_SRH_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\ - {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\ - {"LAST_ENTRY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\ - {"TAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\ - {"segment_routing_srh_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT} - -/*! - * \name SEGMENT_ROUTING_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_TAG 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\ - {"LAST_ENTRY_FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\ - {"SEG_LIST", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\ - {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\ - {"TAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_TAG},\ - {"segment_routing_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SNAP_LLC_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_LENGTH 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ - {"LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_LENGTH},\ - {"SNAP_LLC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ - {"snap_llc_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT} - -/*! - * \name STD_SEGMENT_ID_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_DATA 0 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_DATA},\ - {"std_segment_id_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT} - -/*! - * \name SVTAG_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_DATA_LWR 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_DATA_UPR 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ - {"DATA_LWR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_DATA_LWR},\ - {"DATA_UPR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_DATA_UPR},\ - {"svtag_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"L5_BYTES_8_9", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ - {"unknown_l5_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_CFI 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_PCP 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_TPID 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_VID 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT} - -/*! - * \name WESP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FLAGS 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_HEADER_LEN 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_NEXT_HEADER 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_SEQ_NUM 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_SPI 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_TRAILER_LEN 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_WESP_IV 6 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FLAGS},\ - {"HEADER_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_HEADER_LEN},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_NEXT_HEADER},\ - {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_SEQ_NUM},\ - {"SPI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_SPI},\ - {"TRAILER_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_TRAILER_LEN},\ - {"WESP_IV", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_WESP_IV},\ - {"wesp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT} - - -#endif /* BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index 5e273d4c808..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,198 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DVP_15_0 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 8 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 9 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 10 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 11 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 12 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 13 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 14 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 15 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 16 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0 17 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0 18 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 19 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 20 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 21 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 22 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 23 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0 24 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 25 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 26 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 27 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L2_IIF_12_0 28 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L2_OIF_12_0 29 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0 30 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 31 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 32 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0 33 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0 34 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 35 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 36 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 37 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 38 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 39 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0 40 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0 41 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0 42 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0 43 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVP_15_0 44 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 45 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0 46 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0 47 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0 48 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 49 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 50 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 51 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 52 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 53 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_VFI_15_0 54 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 55 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FID_COUNT 56 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 48 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT 2 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 4 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 5 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 6 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 7 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 8 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS 9 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP 10 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 11 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 12 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 13 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 14 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 15 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 16 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 17 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 18 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 19 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 20 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 21 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 22 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 23 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 24 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 25 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 26 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 27 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 28 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 29 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 30 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 31 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 32 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 33 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 34 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 35 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 36 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 37 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 38 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SRV6 41 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP 42 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 44 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 45 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 46 -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP 47 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CB_STATION_MOVE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ - {"CML_FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"DEFAULT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\ - {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_ECMP_PKT_SAMPLED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ - {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_LAG_PKT_SAMPLED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ - {"DST_FP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ - {"EM_FT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"EM_FT_HPAE_MISS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\ - {"IFP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ - {"IVXLT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_STATIC_MOVE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_IIF_EQ_L3_OIF", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ - {"L3_TTL_ERROR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST_RSVD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ - {"MATCHED_RULE_BIT_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ - {"MATCHED_RULE_BIT_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ - {"MATCHED_RULE_BIT_2", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ - {"MATCHED_RULE_BIT_3", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ - {"MATCHED_RULE_BIT_4", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ - {"MATCHED_RULE_BIT_5", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ - {"MATCHED_RULE_BIT_6", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ - {"MATCHED_RULE_BIT_7", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ - {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"MPLS_CTRL_PKT_TO_CPU", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ - {"NO_COPY_TO_CPU", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"SER_DROP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ - {"SRV6", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SRV6},\ - {"SVP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ - {"TRACE_DOP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"TRACE_DO_NOT_COPY_TO_CPU", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ - {"TRACE_DO_NOT_MIRROR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ - {"URPF_CHECK_FAILED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ - {"VFP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index 834579bbe3a..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,515 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56890_a0_dna_6_5_30_8_0_sf_match_id_info.yml - * for device bcm56890_a0 and variant dna_6_5_30_8_0. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG 0 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM 1 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 2 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 3 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 4 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 5 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 6 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 7 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 8 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 9 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 10 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 11 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 12 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 13 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 14 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 15 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 16 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 17 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 18 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 19 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 20 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 21 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 22 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 23 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 24 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 25 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 26 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 27 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 28 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 29 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE 30 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 31 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E 32 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 33 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 34 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 35 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 36 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 37 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 38 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 39 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 40 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 41 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 42 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 43 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 44 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 45 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 46 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 47 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 48 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 49 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 50 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 51 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 52 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 53 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 54 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 55 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 56 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 57 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 58 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 59 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 60 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 61 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 62 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 63 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG 64 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM 65 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 66 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 67 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 68 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 69 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 70 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 71 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 72 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 73 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 74 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 75 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 76 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 77 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 78 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 79 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 80 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 81 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 82 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 83 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 84 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 85 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 86 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 87 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 88 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 89 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 90 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 91 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 92 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 93 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE 94 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 95 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E 96 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 97 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 98 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 99 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 100 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 101 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 102 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 103 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 104 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 105 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 106 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 107 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 108 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 109 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 110 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 111 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 112 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 113 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 114 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 115 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 116 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 117 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 118 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 119 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 120 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 121 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 122 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 123 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 124 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG 125 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 126 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 127 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 128 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 129 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 130 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 131 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 132 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 133 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 134 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 135 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 136 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 137 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 138 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 139 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 140 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 141 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 142 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 143 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 144 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE 145 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 146 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 147 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 148 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 149 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 150 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 151 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 152 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 153 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 154 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 155 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 156 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 157 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 158 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 159 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 160 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 161 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 162 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 163 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG 164 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM 165 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 166 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 167 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 168 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 169 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 170 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 171 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 172 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 173 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 174 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 175 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 176 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 177 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 178 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 179 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 180 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 181 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 182 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 183 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 184 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 185 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 186 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 187 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 188 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 189 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 190 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 191 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 192 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 193 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE 194 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 195 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E 196 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 197 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 198 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 199 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 200 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 201 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 202 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 203 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 204 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 205 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 206 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 207 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 208 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 209 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 210 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 211 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 212 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 213 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 214 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 215 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 216 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 217 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 218 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 219 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 220 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 221 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 222 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 223 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 224 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 225 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 226 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 227 -#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_COUNT 228 - -#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \ - {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ - {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \ - {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..740cd098e3f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h @@ -0,0 +1,176 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_H +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T 10 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T 11 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T 12 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T 13 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T 15 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T 17 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T 18 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T 19 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T 20 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T 21 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T 22 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T 24 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T 25 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T 26 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T 27 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T 28 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T 29 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T 30 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T 31 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T 32 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T 33 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T 34 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T 35 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T 36 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T 37 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T 38 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T 39 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T 40 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T 41 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T 42 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T 43 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T 44 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 45 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 46 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T 47 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T 48 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T 49 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T 50 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T 51 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T 52 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T 53 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T 54 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T 55 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T 56 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T 57 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T 58 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T 59 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T 60 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T 61 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T 62 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T 63 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T 64 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T 65 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T 66 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_T 67 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_COUNT 68 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T},\ + {"ethertype_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T},\ + {"gbp_ethernet_shim_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T},\ + {"generic_loopback_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T},\ + {"ifa_header_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_metadata_a_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T},\ + {"ifa_metadata_b_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T},\ + {"ifa_metadata_base_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T},\ + {"igmp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T},\ + {"ioam_e2e_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T},\ + {"ipfix_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T},\ + {"segment_routing_srh_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T},\ + {"segment_routing_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T},\ + {"sflow_shim_0_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T},\ + {"std_segment_id_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T},\ + {"svtag_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T},\ + {"tcp_first_4bytes_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..fc6e0c2ef07 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1361 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_AP 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_CPI 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DEM 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FIN 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MPT 9 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_POLL 11 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_STA 13 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_PAD 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_ID 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GBP_ETHERNET_SHIM_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER 5 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \ + {"ETHERTYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\ + {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\ + {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\ + {"SID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\ + {"SUBTYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\ + {"VER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\ + {"gbp_ethernet_shim_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM 13 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"SRC_SUBPORT_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\ + {"START_BYTE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_SVP 5 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID_LSB", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ + {"CLASS_ID_MSB", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ + {"DVP_OR_L3_IIF", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_METADATA_A_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_CN 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_CN},\ + {"FWD_HDR_TTL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\ + {"PORT_SPEED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\ + {"ifa_metadata_a_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT} + +/*! + * \name IFA_METADATA_B_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\ + {"MMU_STAT_0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\ + {"RESIDENCE_TIME_NANOSEC", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\ + {"RX_TIMESTAMP_NANOSEC", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_metadata_b_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT} + +/*! + * \name IFA_METADATA_BASE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\ + {"ifa_metadata_base_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IOAM_E2E_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_RESERVED 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_TYPE 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \ + {"IOAM_E2E_DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\ + {"IOAM_E2E_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\ + {"IOAM_HDR_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\ + {"NAMESPACE_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\ + {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\ + {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_RESERVED},\ + {"TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_TYPE},\ + {"ioam_e2e_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_DA 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_ID 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_SA 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_DA 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_SA 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_MACDA 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SEGMENT_ROUTING_SRH_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\ + {"LAST_ENTRY", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\ + {"TAG", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\ + {"segment_routing_srh_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT} + +/*! + * \name SEGMENT_ROUTING_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_TAG 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\ + {"LAST_ENTRY_FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\ + {"SEG_LIST", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\ + {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\ + {"TAG", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_TAG},\ + {"segment_routing_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name STD_SEGMENT_ID_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_DATA 0 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_DATA},\ + {"std_segment_id_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT} + +/*! + * \name SVTAG_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_DATA_LWR 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_DATA_UPR 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ + {"DATA_LWR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_DATA_LWR},\ + {"DATA_UPR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_DATA_UPR},\ + {"svtag_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"L5_BYTES_8_9", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ + {"unknown_l5_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_SPI 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..c65223045a8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,198 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DVP_15_0 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 8 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 9 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 10 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 11 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 12 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 13 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 14 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 15 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 16 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0 17 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0 18 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 19 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 20 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 21 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 22 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 23 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0 24 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 25 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 26 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 27 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L2_IIF_12_0 28 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L2_OIF_12_0 29 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0 30 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 31 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 32 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0 33 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0 34 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 35 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 36 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 37 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 38 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 39 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0 40 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0 41 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0 42 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0 43 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVP_15_0 44 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 45 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0 46 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0 47 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0 48 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 49 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 50 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 51 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 52 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 53 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_VFI_15_0 54 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 55 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_FID_COUNT 56 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 48 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT 2 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 4 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 5 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 6 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 7 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 8 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS 9 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP 10 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 11 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 12 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 13 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 14 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 15 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 16 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 17 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 18 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 19 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 20 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 21 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 22 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 23 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 24 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 25 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 26 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 27 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 28 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 29 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 30 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 31 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 32 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 33 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 34 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 35 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 36 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 37 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 38 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SRV6 41 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP 42 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 44 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 45 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 46 +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP 47 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DEFAULT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"EM_FT_HPAE_MISS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\ + {"IFP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SRV6", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SRV6},\ + {"SVP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..2fc50ab8fa9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,515 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_dna_6_5_31_6_0_sf_match_id_info.yml + * for device bcm56890_a0 and variant dna_6_5_31_6_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG 0 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM 1 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 2 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 3 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 4 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 5 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 6 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 7 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 8 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 9 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 10 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 11 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 12 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 13 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 14 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 15 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 16 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 17 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 18 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 19 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 20 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 21 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 22 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 23 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 24 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 25 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 26 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 27 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 28 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 29 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE 30 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 31 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E 32 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 33 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 34 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 35 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 36 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 37 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 38 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 39 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 40 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 41 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 42 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 43 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 44 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 45 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 46 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 47 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 48 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 49 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 50 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 51 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 52 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 53 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 54 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 55 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 56 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 57 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 58 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 59 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 60 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 61 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 62 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 63 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG 64 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM 65 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 66 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 67 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 68 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 69 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 70 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 71 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 72 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 73 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 74 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 75 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 76 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 77 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 78 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 79 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 80 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 81 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 82 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 83 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 84 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 85 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 86 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 87 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 88 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 89 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 90 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 91 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 92 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 93 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE 94 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 95 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E 96 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 97 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 98 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 99 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 100 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 101 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 102 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 103 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 104 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 105 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 106 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 107 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 108 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 109 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 110 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 111 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 112 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 113 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 114 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 115 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 116 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 117 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 118 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 119 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 120 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 121 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 122 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 123 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 124 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG 125 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 126 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 127 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 128 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 129 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 130 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 131 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 132 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 133 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 134 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 135 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 136 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 137 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 138 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 139 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 140 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 141 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 142 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 143 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 144 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE 145 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 146 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 147 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 148 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 149 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 150 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 151 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 152 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 153 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 154 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 155 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 156 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 157 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 158 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 159 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 160 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 161 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 162 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 163 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG 164 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM 165 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 166 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 167 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 168 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 169 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 170 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 171 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 172 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 173 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 174 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 175 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 176 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 177 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 178 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 179 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 180 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 181 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 182 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 183 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 184 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 185 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 186 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 187 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 188 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 189 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 190 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 191 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 192 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 193 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE 194 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 195 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E 196 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 197 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 198 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 199 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 200 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 201 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 202 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 203 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 204 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 205 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 206 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 207 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 208 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 209 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 210 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 211 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 212 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 213 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 214 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 215 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 216 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 217 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 218 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 219 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 220 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 221 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 222 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 223 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 224 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 225 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 226 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 227 +#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_COUNT 228 + +#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr.h deleted file mode 100644 index 56e234a3604..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr.h +++ /dev/null @@ -1,180 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_H -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_H - -#include - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T 8 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T 9 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T 10 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T 11 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T 12 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T 13 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T 14 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T 15 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T 16 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T 17 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T 18 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T 19 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T 20 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T 21 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T 22 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T 23 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T 24 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T 25 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T 26 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T 27 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T 28 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T 29 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T 30 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T 31 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T 32 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T 33 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T 34 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T 35 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T 36 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T 37 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T 38 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T 39 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T 40 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T 41 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T 42 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T 43 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T 44 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T 45 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 46 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 47 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T 48 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T 49 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T 50 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T 51 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T 52 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T 53 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T 54 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T 55 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T 56 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T 57 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T 58 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T 59 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T 60 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T 61 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T 62 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T 63 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T 64 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T 65 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T 66 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T 67 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T 68 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_T 69 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_COUNT 70 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T},\ - {"authen_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T},\ - {"bfd_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T},\ - {"cntag_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T},\ - {"cpu_composites_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T},\ - {"dcn_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T},\ - {"dest_option_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T},\ - {"ep_nih_header_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"esp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T},\ - {"ethertype_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T},\ - {"frag_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T},\ - {"gbp_ethernet_shim_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T},\ - {"generic_loopback_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T},\ - {"gpe_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T},\ - {"gre_chksum_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T},\ - {"gre_key_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T},\ - {"gre_rout_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T},\ - {"gre_seq_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T},\ - {"gre_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T},\ - {"hg3_base_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T},\ - {"hg3_extension_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T},\ - {"hop_by_hop_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T},\ - {"icmp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T},\ - {"ifa_header_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T},\ - {"ifa_metadata_a_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T},\ - {"ifa_metadata_b_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T},\ - {"ifa_metadata_base_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T},\ - {"igmp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T},\ - {"ioam_e2e_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T},\ - {"ipfix_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T},\ - {"l2_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T},\ - {"mpls_ach_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T},\ - {"mpls_bv_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T},\ - {"mpls_cw_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T},\ - {"mpls_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T},\ - {"p_1588_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T},\ - {"prog_ext_hdr_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T},\ - {"psamp_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T},\ - {"psamp_1_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T},\ - {"psamp_mirror_on_drop_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"psamp_postcard_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T},\ - {"psamp_postcard_1_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T},\ - {"rarp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T},\ - {"routing_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T},\ - {"rspan_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T},\ - {"segment_routing_srh_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T},\ - {"segment_routing_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T},\ - {"sflow_shim_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T},\ - {"snap_llc_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T},\ - {"std_segment_id_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T},\ - {"tcp_first_4bytes_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T},\ - {"vxlan_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T},\ - {"wesp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T},\ - {"RXPMD_FLEX_T", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr_data.h deleted file mode 100644 index fdefb32b0dc..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,1419 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_DATA_H -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_OPERATION 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name AUTHEN_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_DATA 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_RESERVED 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_SEQ_NUM 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_SPI 5 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_DATA},\ - {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\ - {"PAYLOAD_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ - {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_RESERVED},\ - {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_SEQ_NUM},\ - {"SPI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_SPI},\ - {"authen_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT} - -/*! - * \name BFD_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_AP 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_BFD_LENGTH 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_CPI 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DEM 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DESMINTXINTV 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DETECTMULT 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DIAG 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FIN 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MINECHORXINTV 8 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MPT 9 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MYDISCRIM 10 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_POLL 11 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_REQMINRXINTV 12 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_STA 13 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_URDISCRIM 14 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_VERSION 15 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT 16 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ - {"AP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_AP},\ - {"BFD_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_BFD_LENGTH},\ - {"CPI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_CPI},\ - {"DEM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DEM},\ - {"DESMINTXINTV", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DESMINTXINTV},\ - {"DETECTMULT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DETECTMULT},\ - {"DIAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DIAG},\ - {"FIN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FIN},\ - {"MINECHORXINTV", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MINECHORXINTV},\ - {"MPT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MPT},\ - {"MYDISCRIM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MYDISCRIM},\ - {"POLL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_POLL},\ - {"REQMINRXINTV", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_REQMINRXINTV},\ - {"STA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_STA},\ - {"URDISCRIM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_URDISCRIM},\ - {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_VERSION},\ - {"bfd_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT} - -/*! - * \name CNTAG_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_RPID 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_TPID 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ - {"RPID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_RPID},\ - {"TPID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_TPID},\ - {"cntag_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name DCN_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FLAGS 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_NEXT_PROTOCOL 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED0 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED1 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED2 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED3 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED4 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT 7 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED0},\ - {"RESERVED1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED1},\ - {"RESERVED2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED2},\ - {"RESERVED3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED3},\ - {"RESERVED4", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED4},\ - {"dcn_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT} - -/*! - * \name DEST_OPTION_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_OPTION 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ - {"OPTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_OPTION},\ - {"dest_option_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ESP_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_NEXT_HEADER 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_PAD 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_PAD_LEN 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_SEQ_NUM 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_SPI 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT 5 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ - {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_NEXT_HEADER},\ - {"PAD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_PAD},\ - {"PAD_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_PAD_LEN},\ - {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_SEQ_NUM},\ - {"SPI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_SPI},\ - {"esp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name FRAG_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FRAG_INFO 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_ID 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_NEXT_HEADER 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_RESERVED 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ - {"FRAG_INFO", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FRAG_INFO},\ - {"ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_ID},\ - {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_NEXT_HEADER},\ - {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_RESERVED},\ - {"frag_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT} - -/*! - * \name GBP_ETHERNET_SHIM_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER 5 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \ - {"ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\ - {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\ - {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\ - {"SID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\ - {"SUBTYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\ - {"VER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\ - {"gbp_ethernet_shim_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM 13 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"SOURCE_SYSTEM_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"SRC_SUBPORT_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\ - {"START_BYTE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 - -/*! - * \name GPE_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FLAGS 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_RESERVED0 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_RESERVED1 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_VNI 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT 5 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_RESERVED0},\ - {"RESERVED1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_RESERVED1},\ - {"VNI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_VNI},\ - {"gpe_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT} - -/*! - * \name GRE_CHKSUM_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_OFFSET 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ - {"OFFSET", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\ - {"gre_chksum_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT} - -/*! - * \name GRE_KEY_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_KEY 0 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ - {"KEY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_KEY},\ - {"gre_key_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT} - -/*! - * \name GRE_ROUT_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_ROUTING 0 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ - {"ROUTING", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_ROUTING},\ - {"gre_rout_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT} - -/*! - * \name GRE_SEQ_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\ - {"gre_seq_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT} - -/*! - * \name GRE_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_C_R_K_S 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_PROTOCOL 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_RESERVED 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_VERSION 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ - {"C_R_K_S", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_C_R_K_S},\ - {"PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_PROTOCOL},\ - {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_RESERVED},\ - {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_VERSION},\ - {"gre_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT} - -/*! - * \name HG3_BASE_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_CN 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_CNG 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_ENTROPY 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_L3_ROUTED 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_TC 11 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_VERSION 12 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT 13 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_CN},\ - {"CNG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_CNG},\ - {"ENTROPY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_ENTROPY},\ - {"EXT_HDR_PRESENT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ - {"HG3_RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ - {"L3_ROUTED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_L3_ROUTED},\ - {"MIRROR_COPY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ - {"RESERVED_ETYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ - {"SYSTEM_DESTINATION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ - {"SYSTEM_DESTINATION_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ - {"SYSTEM_SOURCE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ - {"TC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_TC},\ - {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_VERSION},\ - {"hg3_base_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT} - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 - -/*! - * \name HG3_EXTENSION_0_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_SVP 5 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ - {"CLASS_ID_LSB", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ - {"CLASS_ID_MSB", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ - {"DVP_OR_L3_IIF", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ - {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ - {"FORWARDING_DOMAIN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ - {"SVP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_SVP},\ - {"hg3_extension_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} - -/*! - * \name HOP_BY_HOP_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_OPTION 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ - {"OPTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_OPTION},\ - {"hop_by_hop_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT} - -/*! - * \name ICMP_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_CODE 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_METADATA_A_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_CN 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_PORT_SPEED 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_QUEUE_ID 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_CN},\ - {"FWD_HDR_TTL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\ - {"PORT_SPEED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\ - {"QUEUE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\ - {"ifa_metadata_a_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT} - -/*! - * \name IFA_METADATA_B_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT 7 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\ - {"MMU_STAT_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\ - {"RESIDENCE_TIME_NANOSEC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\ - {"RX_TIMESTAMP_NANOSEC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_metadata_b_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT} - -/*! - * \name IFA_METADATA_BASE_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\ - {"ifa_metadata_base_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT} - -/*! - * \name IGMP_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_CHECKSUM 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_IGMP_TYPE 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_CHECKSUM},\ - {"GROUP_ADDRESS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\ - {"IGMP_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_IGMP_TYPE},\ - {"MAX_RESP_TIME", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\ - {"igmp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT} - -/*! - * \name IOAM_E2E_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_RESERVED 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_TYPE 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT 7 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \ - {"IOAM_E2E_DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\ - {"IOAM_E2E_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\ - {"IOAM_HDR_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\ - {"NAMESPACE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\ - {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\ - {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_RESERVED},\ - {"TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_TYPE},\ - {"ioam_e2e_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_DA 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_ID 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_OPTION 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_SA 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TOS 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TTL 9 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_DA 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_SA 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_VERSION 7 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_MACDA 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_MACSA 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name MPLS_ACH_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_CW_TYPE 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_RESERVED 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_VERSION 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ - {"CHANNEL_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ - {"CW_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\ - {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_RESERVED},\ - {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_VERSION},\ - {"mpls_ach_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT} - -/*! - * \name MPLS_BV_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_VALUE 0 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ - {"VALUE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_VALUE},\ - {"mpls_bv_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT} - -/*! - * \name MPLS_CW_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_CW_TYPE 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_RESERVED 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ - {"CW_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_CW_TYPE},\ - {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_RESERVED},\ - {"SEQ_NUMBER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ - {"mpls_cw_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT} - -/*! - * \name MPLS_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_BOS 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_EXP 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_LABEL 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_TTL 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ - {"BOS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_BOS},\ - {"EXP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_EXP},\ - {"LABEL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_LABEL},\ - {"TTL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_TTL},\ - {"mpls_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT} - -/*! - * \name P_1588_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_CNTRL 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_CORRECTION 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_DOMAIN_NB 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FLAGS 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_MSG_LENGTH 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_MSG_TYPE 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED1 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED2 8 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED3 9 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_SEQ_ID 10 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_SRCPORTID 11 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_TRANSPORTSPEC 12 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_VERSION 13 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT 14 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ - {"CNTRL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_CNTRL},\ - {"CORRECTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_CORRECTION},\ - {"DOMAIN_NB", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_DOMAIN_NB},\ - {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FLAGS},\ - {"LOGMSGINTERVAL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ - {"MSG_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_MSG_LENGTH},\ - {"MSG_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_MSG_TYPE},\ - {"RESERVED1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED1},\ - {"RESERVED2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED2},\ - {"RESERVED3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED3},\ - {"SEQ_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_SEQ_ID},\ - {"SRCPORTID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_SRCPORTID},\ - {"TRANSPORTSPEC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\ - {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_VERSION},\ - {"p_1588_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT} - -/*! - * \name PROG_EXT_HDR_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_OPTION 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ - {"OPTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\ - {"prog_ext_hdr_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} - -/*! - * \name PSAMP_0_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FLOWSET 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_LENGTH 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ - {"FLOWSET", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FLOWSET},\ - {"LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_LENGTH},\ - {"NEXT_HOP_INDEX", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ - {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ - {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ - {"psamp_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT} - -/*! - * \name PSAMP_1_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_DLB_ID 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_EPOCH 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT 7 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ - {"DLB_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_DLB_ID},\ - {"EGRESS_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ - {"EPOCH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_EPOCH},\ - {"INGRESS_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ - {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\ - {"VARIABLE_FLAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ - {"psamp_1_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"RESERVED_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"SMOD_STATE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ - {"UC_COS__COLOR__PROB_IDX", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name PSAMP_POSTCARD_0_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID 5 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT},\ - {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S},\ - {"PSAMP_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH},\ - {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID},\ - {"psamp_postcard_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT} - -/*! - * \name PSAMP_POSTCARD_1_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR 8 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT 9 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT \ - {"COLOR_IDX_COS_DROPLOC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC},\ - {"DROP_REASON_CODE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE},\ - {"MMU_STAT_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1},\ - {"QUEUE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID},\ - {"RESERVED_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1},\ - {"RESIDENCE_TIME", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME},\ - {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH},\ - {"VAR_LEN_INDICATOR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR},\ - {"psamp_postcard_1_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_OPERATION 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name ROUTING_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_DATA 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_NEXT_HEADER 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_ROUTING_TYPE 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT 5 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_DATA},\ - {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ - {"routing_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT} - -/*! - * \name RSPAN_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_TAG 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_TPID 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_TAG},\ - {"TPID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_TPID},\ - {"rspan_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT} - -/*! - * \name SEGMENT_ROUTING_SRH_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT 7 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\ - {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\ - {"LAST_ENTRY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\ - {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\ - {"TAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\ - {"segment_routing_srh_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT} - -/*! - * \name SEGMENT_ROUTING_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_TAG 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT 7 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\ - {"LAST_ENTRY_FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\ - {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\ - {"SEG_LIST", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\ - {"SEGMENTS_LEFT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\ - {"TAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_TAG},\ - {"segment_routing_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SNAP_LLC_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_LENGTH 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ - {"LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_LENGTH},\ - {"SNAP_LLC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ - {"snap_llc_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT} - -/*! - * \name STD_SEGMENT_ID_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_DATA 0 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_DATA},\ - {"std_segment_id_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_DST_PORT 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"L5_BYTES_8_9", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ - {"unknown_l5_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_CFI 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_PCP 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_TPID 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_VID 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT} - -/*! - * \name WESP_T field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FLAGS 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_HEADER_LEN 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_NEXT_HEADER 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_SEQ_NUM 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_SPI 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_TRAILER_LEN 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_WESP_IV 6 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT 7 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FLAGS},\ - {"HEADER_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_HEADER_LEN},\ - {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_NEXT_HEADER},\ - {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_SEQ_NUM},\ - {"SPI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_SPI},\ - {"TRAILER_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_TRAILER_LEN},\ - {"WESP_IV", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_WESP_IV},\ - {"wesp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT} - - -#endif /* BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index 259def53034..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,192 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ALLOW_NAT_3_0 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DVP_15_0 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 9 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 10 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 11 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 12 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 13 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 14 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 15 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 16 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 17 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 18 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 19 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 20 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 21 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 22 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 23 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 24 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L2_IIF_11_0 25 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L2_OIF_11_0 26 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0 27 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 28 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 29 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0 30 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0 31 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 32 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 33 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 34 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 35 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 36 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0 37 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0 38 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0 39 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0 40 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SVP_15_0 41 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 42 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 43 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 44 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 45 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 46 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 47 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_VFI_15_0 48 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 49 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_FID_COUNT 50 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT 48 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 3 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 4 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 5 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP 6 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT 7 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU 8 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP 9 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 10 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 11 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT 12 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 13 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 14 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 15 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 16 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 17 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 18 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 19 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 20 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 21 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 22 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 23 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 24 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 25 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 26 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 27 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 28 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 29 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 30 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 31 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 32 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 33 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 34 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 35 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 36 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 37 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 38 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP_EPIPE 39 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 40 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SRV6 41 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP 42 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 44 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 45 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 46 -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP 47 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CB_STATION_MOVE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ - {"CML_FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_ECMP_PKT_SAMPLED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ - {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_LAG_PKT_SAMPLED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ - {"DST_FP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ - {"EM_FT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IDEV_CONFIG_TO_CPU", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU},\ - {"IFP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ - {"IVXLT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_STATIC_MOVE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_IIF_EQ_L3_OIF", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ - {"L3_TTL_ERROR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST_RSVD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ - {"MATCHED_RULE_BIT_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ - {"MATCHED_RULE_BIT_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ - {"MATCHED_RULE_BIT_2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ - {"MATCHED_RULE_BIT_3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ - {"MATCHED_RULE_BIT_4", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ - {"MATCHED_RULE_BIT_5", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ - {"MATCHED_RULE_BIT_6", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ - {"MATCHED_RULE_BIT_7", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ - {"MEMBERSHIP_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"MPLS_CTRL_PKT_TO_CPU", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ - {"NO_COPY_TO_CPU", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"SER_DROP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SER_DROP_EPIPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP_EPIPE},\ - {"SPANNING_TREE_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ - {"SRV6", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SRV6},\ - {"SVP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\ - {"TRACE_DOP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"TRACE_DO_NOT_COPY_TO_CPU", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ - {"TRACE_DO_NOT_MIRROR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ - {"URPF_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ - {"VFP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index edd826cbfda..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,515 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm78800_a0_dna_6_5_30_3_1_sf_match_id_info.yml - * for device bcm78800_a0 and variant dna_6_5_30_3_1. - * Edits to this file will be lost when it is regenerated. - * - * $Id: $ - * Copyright 2018-2024 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * All Rights Reserved.$ - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG 0 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM 1 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 2 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 3 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 4 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 5 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 6 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 7 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 8 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN 13 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 14 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 15 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 16 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 17 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 18 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 19 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 20 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 21 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 22 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 23 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 24 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 25 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 26 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 27 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 28 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 29 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE 30 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 31 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E 32 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 33 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 34 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 35 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 36 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 37 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 38 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 39 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 40 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 41 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 42 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 43 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 44 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 45 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 46 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 47 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 48 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 49 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 50 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 51 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 52 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 53 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 54 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 55 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 56 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 57 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 58 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 59 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 60 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 61 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 62 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 63 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG 64 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM 65 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 66 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 67 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 68 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 69 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 70 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 71 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 72 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 73 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 74 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 75 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 76 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN 77 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 78 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 79 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 80 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 81 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 82 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 83 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 84 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 85 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 86 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 87 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 88 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 89 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 90 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 91 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 92 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 93 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE 94 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 95 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E 96 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 97 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 98 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 99 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 100 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 101 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 102 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 103 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 104 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 105 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 106 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 107 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 108 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 109 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 110 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 111 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 112 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 113 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 114 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 115 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 116 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 117 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 118 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 119 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 120 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 121 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 122 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 123 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 124 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG 125 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 126 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 127 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 128 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 129 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 130 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 131 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 132 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 133 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 134 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 135 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 136 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 137 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 138 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 139 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 140 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 141 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 142 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 143 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 144 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE 145 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 146 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 147 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 148 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 149 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 150 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 151 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 152 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 153 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 154 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 155 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 156 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 157 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 158 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 159 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 160 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 161 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 162 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 163 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG 164 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM 165 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 166 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 167 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 168 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 169 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 170 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 171 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 172 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 173 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 174 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 175 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 176 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN 177 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 178 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 179 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 180 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 181 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 182 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 183 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 184 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 185 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 186 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 187 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 188 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 189 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 190 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 191 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 192 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 193 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE 194 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 195 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E 196 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 197 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 198 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 199 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 200 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 201 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 202 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 203 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 204 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 205 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 206 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 207 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 208 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 209 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 210 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 211 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 212 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 213 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 214 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 215 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 216 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 217 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 218 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 219 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 220 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 221 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 222 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 223 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 224 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 225 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 226 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 227 -#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_COUNT 228 - -#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \ - {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ - {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \ - {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..7917aa9ca92 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr.h @@ -0,0 +1,174 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_H +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T 8 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T 9 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T 10 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T 11 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T 12 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T 13 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T 14 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T 15 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T 16 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T 17 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T 18 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T 19 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T 20 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T 21 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T 22 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T 23 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T 24 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T 25 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T 26 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T 27 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T 28 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T 29 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T 30 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T 31 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T 32 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T 33 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T 34 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T 35 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T 36 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T 37 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T 38 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T 39 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T 40 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T 41 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T 42 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T 43 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T 44 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T 45 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 46 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 47 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T 48 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T 49 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T 50 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T 51 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T 52 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T 53 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T 54 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T 55 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T 56 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T 57 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T 58 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T 59 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T 60 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T 61 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T 62 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T 63 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T 64 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T 65 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_T 66 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_COUNT 67 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T},\ + {"authen_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dcn_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T},\ + {"dest_option_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T},\ + {"ethertype_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T},\ + {"gbp_ethernet_shim_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T},\ + {"generic_loopback_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T},\ + {"ifa_header_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_metadata_a_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T},\ + {"ifa_metadata_b_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T},\ + {"ifa_metadata_base_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T},\ + {"igmp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T},\ + {"ioam_e2e_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T},\ + {"ipfix_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"psamp_postcard_0_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T},\ + {"psamp_postcard_1_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T},\ + {"rarp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T},\ + {"routing_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..6f186ac3a1a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1362 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_DATA_H +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_AP 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_CPI 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DEM 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DIAG 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FIN 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_MPT 9 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_POLL 11 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_STA 13 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DCN_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FLAGS 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_NEXT_PROTOCOL 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED0 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED1 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED2 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED3 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED4 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED0},\ + {"RESERVED1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED1},\ + {"RESERVED2", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED2},\ + {"RESERVED3", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED3},\ + {"RESERVED4", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED4},\ + {"dcn_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_PAD 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_SPI 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_ID 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GBP_ETHERNET_SHIM_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER 5 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \ + {"ETHERTYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\ + {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\ + {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\ + {"SID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\ + {"SUBTYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\ + {"VER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\ + {"gbp_ethernet_shim_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM 13 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"SRC_SUBPORT_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\ + {"START_BYTE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_VNI 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_CN 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_TC 11 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_SVP 5 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID_LSB", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ + {"CLASS_ID_MSB", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ + {"DVP_OR_L3_IIF", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_CODE 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_METADATA_A_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_CN 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_CN},\ + {"FWD_HDR_TTL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\ + {"PORT_SPEED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\ + {"QUEUE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\ + {"ifa_metadata_a_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT} + +/*! + * \name IFA_METADATA_B_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\ + {"MMU_STAT_0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\ + {"RESIDENCE_TIME_NANOSEC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\ + {"RX_TIMESTAMP_NANOSEC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_metadata_b_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT} + +/*! + * \name IFA_METADATA_BASE_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\ + {"ifa_metadata_base_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IOAM_E2E_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_RESERVED 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_TYPE 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \ + {"IOAM_E2E_DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\ + {"IOAM_E2E_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\ + {"IOAM_HDR_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\ + {"NAMESPACE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\ + {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\ + {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_RESERVED},\ + {"TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_TYPE},\ + {"ioam_e2e_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_DA 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_ID 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_SA 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_TOS 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_TTL 9 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_DA 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_SA 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_MACDA 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_MACSA 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_BOS 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_EXP 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name PSAMP_POSTCARD_0_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID 5 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT},\ + {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S},\ + {"PSAMP_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH},\ + {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID},\ + {"psamp_postcard_0_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT} + +/*! + * \name PSAMP_POSTCARD_1_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR 8 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT 9 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT \ + {"COLOR_IDX_COS_DROPLOC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC},\ + {"DROP_REASON_CODE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE},\ + {"MMU_STAT_0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1},\ + {"QUEUE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID},\ + {"RESERVED_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1},\ + {"RESIDENCE_TIME", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME},\ + {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH},\ + {"VAR_LEN_INDICATOR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR},\ + {"psamp_postcard_1_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"L5_BYTES_8_9", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ + {"unknown_l5_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_CFI 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_PCP 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_TPID 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_VID 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_SPI 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..917492f1e1f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,186 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ALLOW_NAT_3_0 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DVP_15_0 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 9 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 10 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 11 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 12 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 13 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 14 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 15 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 16 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 17 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 18 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 19 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 20 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 21 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 22 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 23 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 24 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0 25 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0 26 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0 27 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 28 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 29 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0 30 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0 31 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 32 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 33 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 34 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 35 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 36 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SVP_15_0 37 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 38 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 39 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 40 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 41 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 42 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 43 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_VFI_15_0 44 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 45 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_FID_COUNT 46 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 47 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 3 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 4 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 5 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 6 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 7 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU 8 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP 9 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 10 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 11 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 12 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 13 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 14 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 15 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 16 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 17 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 18 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 19 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 20 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 21 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 22 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 23 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 24 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 25 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 26 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 27 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 28 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 29 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 30 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 31 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 32 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 33 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 34 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 35 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 36 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 37 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 38 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 39 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SRV6 40 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP 41 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 42 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 43 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 44 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 45 +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP 46 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IDEV_CONFIG_TO_CPU", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU},\ + {"IFP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"SRV6", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SRV6},\ + {"SVP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..153181c728c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,509 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm78800_a0_dna_6_5_31_5_0_sf_match_id_info.yml + * for device bcm78800_a0 and variant dna_6_5_31_5_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG 0 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM 1 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 2 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 3 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 4 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 5 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 6 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 7 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 8 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN 13 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 14 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 15 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 16 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 17 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 18 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 19 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 20 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 21 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 22 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 23 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 24 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 25 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 26 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 27 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 28 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 29 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE 30 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 31 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E 32 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 33 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 34 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 35 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 36 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 37 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 38 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 39 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 40 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 41 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 42 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 43 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 44 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 45 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 46 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 47 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 48 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 49 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 50 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 51 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 52 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 53 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 54 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 55 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 56 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 57 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 58 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 59 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 60 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 61 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 62 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG 63 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM 64 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 65 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 66 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 67 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 68 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 69 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 70 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 71 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 72 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 73 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 74 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 75 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN 76 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 77 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 78 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 79 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 80 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 81 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 82 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 83 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 84 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 85 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 86 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 87 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 88 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 89 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 90 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 91 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 92 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE 93 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 94 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E 95 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 96 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 97 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 98 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 99 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 100 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 101 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 102 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 103 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 104 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 105 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 106 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 107 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 108 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 109 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 110 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 111 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 112 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 113 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 114 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 115 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 116 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 117 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 118 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 119 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 120 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 121 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 122 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG 123 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 124 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 125 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 126 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 127 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 128 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 129 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 130 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 131 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 132 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 133 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 134 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 135 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 136 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 137 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 138 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 139 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 140 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 141 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 142 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE 143 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 144 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 145 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 146 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 147 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 148 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 149 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 150 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 151 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 152 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 153 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 154 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 155 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 156 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 157 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 158 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 159 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 160 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 161 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG 162 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM 163 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 164 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 165 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 166 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 167 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 168 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 169 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 170 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 171 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 172 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 173 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 174 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN 175 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 176 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 177 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 178 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 179 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 180 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 181 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 182 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 183 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 184 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 185 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 186 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 187 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 188 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 189 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 190 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 191 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE 192 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 193 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E 194 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 195 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 196 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 197 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 198 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 199 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 200 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 201 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 202 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 203 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 204 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 205 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 206 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 207 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 208 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 209 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 210 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 211 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 212 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 213 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 214 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 215 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 216 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 217 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 218 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 219 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 220 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 221 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 222 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 223 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 224 +#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_COUNT 225 + +#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c similarity index 56% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c index 4c975bc2cbc..dcfb0a09bb8 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c @@ -2,8 +2,8 @@ * * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56690_a0_dna_6_5_29_0_1_sf_match_id_info.yml - * for device bcm56690_a0 and variant dna_6_5_29_0_1. + * from the NPL output file(s) bcm56690_a0_dna_6_5_31_7_0_sf_match_id_info.yml + * for device bcm56690_a0 and variant dna_6_5_31_7_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -29,50 +29,51 @@ #include -#include +#include -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] = { 0x366c, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = { 0x78f0, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = { 0x1fffe, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = { 0xff00, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = { 0x1e4c8, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = { 0x4, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[32] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] = { 0x10, - 0x4000, - 0x2007f8, + 0x400000, + 0x1dd8000, + 0x20, 0x0, 0x0, - 0xfff00000, - 0xffffffff, - 0xffffffff, - 0x1f, 0x0, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0x1, 0x0, 0x0, 0x0, @@ -86,118 +87,144 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0x10000, - 0x4000000, - 0x7f8000, - 0x2, 0x0, 0x0, - 0xffffffff, - 0xffffffff, - 0x1ffff, + 0x0, + 0x0, + 0x400000, + 0x0, + 0x100, + 0x800776, + 0x0, + 0x0, + 0x0, + 0xf77c0000, + 0xefeeff77, + 0x7ddfddfe, + 0x777f7, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[45] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] = { 0x0, 0x0, 0x0, 0x0, 0x0, - 0x7fe00000, 0x0, 0x0, - 0x1ff80, + 0x1dde, 0x0, - 0xfe000000, - 0x7, 0x0, - 0x3ff, + 0x7778, 0x0, - 0xffc0000, 0x0, + 0x1dde0, 0x0, - 0x1ff8, + 0xbc000000, + 0x3b, 0x0, - 0xf0000000, - 0x3f, 0x0, + 0x3bbc0, 0x0, 0x0, + 0x77780, 0x0, 0x0, + 0x3bbc0000, 0x0, 0x0, - 0x7fe, 0x0, - 0x1ff80000, 0x0, 0x0, - 0x7fe0, 0x0, - 0x3ff000, 0x0, - 0xc0000000, - 0xff, 0x0, - 0x1ff8000, 0x0, + 0x77780000, + 0x0, + 0x0, + 0xdde00000, + 0x1, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0xef000000, + 0xe, 0x0, - 0x3ff00, + 0xde000000, + 0x1d, + 0x0, + 0x0, + 0xeef0, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[47] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] = { 0x0, 0x0, - 0x20000080, + 0x100000, + 0x1000000, 0x0, 0x0, - 0x8000010, - 0x4010020, - 0x808020, - 0x802002, - 0x801004, - 0x80080202, - 0x80100200, - 0x8020200, - 0x8010040, - 0x4010020, - 0x1001004, - 0x802004, - 0x40101004, - 0x40080200, - 0x20080100, - 0x808020, - 0x801004, - 0x40401002, - 0x100, + 0x2000, + 0x100100, + 0x4002002, + 0x10010040, + 0x400400, + 0x10008008, + 0x40040100, + 0x1001000, + 0x40040020, + 0x100100, + 0x4002002, + 0x80080040, + 0x200200, + 0x2002000, + 0x80040040, + 0x200800, + 0x4004002, + 0x80080, + 0x401001, + 0x2001004, + 0x40040020, + 0x800800, + 0x2002, 0x0, - 0x80000, - 0x200, 0x0, - 0x10000, - 0x10020080, - 0x8020040, - 0x2002008, - 0x1004008, - 0x80202008, - 0x200800, - 0x20200801, - 0x10040080, - 0x10020080, - 0x1004040, - 0x2004010, - 0x1004008, - 0x80200401, - 0x80100400, - 0x8020200, - 0x1004008, - 0x1002008, - 0x100404, + 0x40, + 0x400, + 0x0, + 0x80000000, + 0x4000000, + 0x80080040, + 0x1001000, + 0x10004004, + 0x200100, + 0x4004002, + 0x40010010, + 0x800400, + 0x4010010, + 0x80080040, + 0x1001000, + 0x8020020, + 0x80000080, + 0x1000800, + 0x20020010, + 0x80080, + 0x2001001, + 0x40040020, + 0x40100100, + 0x800800, + 0x20010010, + 0x80080200, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[35] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] = { 0x0, 0x0, @@ -207,11 +234,12 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0xffffffc0, - 0xffffffff, - 0x7fffff, 0x0, 0x0, + 0xff77f77c, + 0xddfeefee, + 0x77f77ddf, + 0x7, 0x0, 0x0, 0x0, @@ -230,139 +258,170 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0xfffc0000, - 0xffffffff, - 0xffffffff, - 0x7, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xddf00000, + 0xbfbbfddf, + 0xf77f77fb, + 0x1ddfdd, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[45] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] = { 0x0, 0x0, 0x0, 0x0, 0x0, - 0x80000000, - 0x1ff, 0x0, - 0x7fe0000, 0x0, + 0x1dde000, 0x0, - 0x1ff8, 0x0, - 0xffc00, + 0x7778000, 0x0, - 0xf0000000, - 0x3f, 0x0, - 0x7fe000, + 0x1dde0000, 0x0, 0x0, - 0xffc0, + 0x3bbc0, 0x0, 0x0, + 0x3bbc0000, 0x0, 0x0, + 0x77780000, 0x0, 0x0, + 0xc0000000, + 0x3bb, 0x0, - 0x1ff800, 0x0, - 0xe0000000, - 0x7f, 0x0, - 0x1ff8000, 0x0, - 0xffc00000, 0x0, 0x0, - 0x3ff00, 0x0, - 0xfe000000, - 0x7, 0x0, - 0xffc0000, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0x1dde, + 0x0, + 0x0, + 0x7778, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0x0, + 0xeef0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0xeef0000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[45] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] = { 0x0, 0x0, - 0x400000, 0x0, + 0x40, 0x0, 0x0, - 0x200, + 0x0, + 0x2000000, + 0x0, 0x0, 0x8000000, 0x0, - 0x800000, - 0x2000, 0x0, - 0x100000, + 0x20000008, 0x0, 0x0, - 0x40, + 0x40000, 0x0, - 0x800000, 0x0, + 0x40000000, 0x0, - 0x10000, 0x0, + 0x80000000, 0x0, 0x0, 0x0, - 0x4, + 0x400, 0x0, 0x0, - 0x200000, 0x0, 0x0, - 0x80, + 0x1000000, 0x0, - 0x2000008, 0x0, 0x0, - 0x1, 0x0, - 0x40000, + 0x800, 0x0, 0x0, - 0x8, + 0x2000, + 0x0, + 0x200000, + 0x8000, + 0x0, + 0x0, + 0x10, + 0x0, + 0x0, + 0x10000, + 0x0, + 0x0, + 0x20000, + 0x0, 0x0, 0x10000000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[24] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] = { 0x1e, - 0x4000, - 0xffe007f8, - 0x3, - 0x800, - 0xfffc00ff, - 0xffffffff, - 0xffffffff, - 0xffffffdf, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0x6fff, + 0x400000, + 0x1dd8000, + 0x3ddcafe0, + 0x0, + 0x8000, + 0xc003bb00, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0xff77f77d, + 0xddfeefee, + 0x77f77ddf, + 0xfddfddff, + 0x77f77fbb, + 0xbfddfddf, + 0xf77fbbfb, + 0xefeeff77, + 0x7fbbfbbe, + 0xfbbfbbe5, + 0xeff77f77, + 0xbfbbeefe, + 0xf77f77fb, + 0xdfeefeef, + 0x7f77ddfd, + 0xfbbfddf7, + 0x77f77fbb, + 0xbeefeeff, + 0x1bbbfb, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[37] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] = { 0x0, 0x0, @@ -374,12 +433,12 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0xff000000, - 0xffffffff, - 0x7fffffff, 0x0, 0x0, 0x0, + 0xfddfddf0, + 0x77f77fbb, + 0x1ddfddf, 0x0, 0x0, 0x0, @@ -398,12 +457,20 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0xfffffff0, - 0xffffffff, - 0x7ff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77c00000, + 0xfeeff77f, + 0xf77ddfdd, + 0x777, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[46] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] = { 0x0, 0x0, @@ -411,49 +478,59 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0xffc00, + 0x0, + 0xbc000000, + 0x3b, 0x0, 0xf0000000, - 0x3f, + 0xee, 0x0, 0x0, 0x0, - 0x7fe00000, 0x0, + 0x77780000, 0x0, - 0x1ff80, 0x0, - 0xff000000, - 0x3, + 0x80000000, + 0x777, 0x0, - 0x7fe0000, 0x0, + 0xeef, 0x0, 0x0, + 0x777800, + 0x0, 0x0, 0x0, 0x0, 0x0, - 0xffc00000, 0x0, 0x0, - 0x3ff00, 0x0, 0x0, + 0xeef000, 0x0, 0x0, - 0x7fe, + 0x3bbc000, 0x0, - 0x1ff80000, 0x0, 0x0, - 0x3ff0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0x3bbc0000, + 0x0, 0x0, 0xe0000000, - 0x7f, + 0x1dd, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[39] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] = { 0x0, 0x0, @@ -467,13 +544,13 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0x80000000, - 0xffffffff, - 0xffffffff, - 0xffff, 0x0, 0x0, 0x0, + 0xbe000000, + 0xf77fbbfb, + 0xefeeff77, + 0x3bbfbbe, 0x0, 0x0, 0x0, @@ -491,12 +568,21 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0xfffff800, - 0xffffffff, - 0xfffffff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xefeef800, + 0xfddfddfe, + 0xeefbbfbb, + 0xeef, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[46] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] = { 0x0, 0x0, @@ -504,107 +590,159 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0x3ff00000, 0x0, 0x0, - 0xffc0, + 0x3bbc0, + 0x0, 0x0, - 0xffc000, + 0xeef00, + 0x0, + 0xc0000000, + 0x3bb, 0x0, 0x80000000, - 0x1ff, + 0x777, 0x0, - 0x7fe0000, 0x0, + 0x777800, 0x0, - 0xffc, 0x0, - 0xf8000000, - 0x1f, + 0xeef000, 0x0, 0x0, + 0x77800000, + 0x7, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x3ff, 0x0, - 0xffc0000, 0x0, - 0xfc000000, - 0xf, 0x0, - 0x1ff800, + 0xef000000, + 0xe, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0xeef0000, + 0x0, + 0x0, + 0x1dde0000, + 0x0, 0x0, 0xe0000000, - 0x7f, + 0x1dd, 0x0, - 0xffc000, + 0xc0000000, + 0x3bb, 0x0, 0x0, - 0x1ff80, + 0x1dde00, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[47] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] = { 0x0, - 0x4000, - 0x800000, - 0x0, - 0x800, 0x400000, - 0x40200801, - 0x10000401, - 0x20040100, - 0x10050080, - 0x4004000, - 0x5008010, - 0x400010, - 0x400802, - 0x200a01, - 0x20090080, - 0x28040100, - 0x2000080, - 0x2004010, - 0x1005008, - 0x20000400, - 0x10040080, - 0x200a0, - 0x8, - 0x4000000, 0x0, - 0x8, - 0x800000, + 0x80, 0x0, - 0x801004, - 0x401402, - 0x40100100, - 0x50080200, - 0x4000100, - 0x8010040, - 0x10050, - 0x802004, - 0xa01004, - 0x90080002, - 0x40100200, - 0x80280, - 0x4010020, - 0x5008020, - 0x400010, - 0x40080200, - 0x200a0100, 0x8000, + 0x0, + 0x8004004, + 0x140080, + 0x400001, + 0x20010010, + 0x500200, + 0x1000004, + 0x80040040, + 0x1001400, + 0x8004000, + 0x100080, + 0x2002801, + 0x4008000, + 0x80080, + 0x2801001, + 0x8000020, + 0x100100, + 0x5002002, + 0x10000040, + 0x80080000, + 0x1001000, + 0x20028, + 0x80, + 0x0, + 0x100, + 0x2000000, + 0x0, + 0x0, + 0x2, + 0x100000, + 0x2002001, + 0x40050, + 0x400100, + 0x8008004, + 0x100140, + 0x1000400, + 0x50020010, + 0x400, + 0x2002001, + 0xa0040040, + 0x800, + 0x2001002, + 0x40040020, + 0x800a00, + 0x4002000, + 0x80080040, + 0x1001400, + 0x4000, + 0x40020020, + 0xa00400, + 0x2000008, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[29] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] = { 0x0, 0x0, - 0x1200000, + 0x0, + 0xaf00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x78000000, + 0x5, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbc000000, + 0x2, + 0x0, + 0x0, + 0x0, 0x0, 0x0, - 0x40000, 0x0, 0x0, 0x0, @@ -614,6 +752,17 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, + 0x15e000, +}; + +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] = +{ + 0x0, + 0x0, + 0x0, + 0x8800, + 0x0, + 0x0, 0x0, 0x0, 0x0, @@ -625,19 +774,55 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0x12, 0x0, 0x40000000, + 0x4, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x2, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x110000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[29] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] = { - 0x18, - 0x4000, - 0xffe007f8, - 0x3, - 0x800, - 0x400ff, + 0x0, + 0x0, + 0x0, + 0x40020, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, 0x0, 0x0, 0x0, @@ -655,117 +840,233 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0x18000, - 0x4000000, - 0x7f8000, - 0x3ffe, 0x800000, - 0x400ff000, + 0x10, + 0x0, + 0x0, + 0x10000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[47] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] = { + 0x18, + 0x400000, + 0x1dd8000, + 0x3ddcafe0, 0x0, + 0x8000, + 0x4003bb00, 0x0, 0x0, 0x0, 0x0, - 0xfff80000, - 0xffffffff, - 0xffffffff, - 0xffffffdf, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xfff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x600000, + 0x0, + 0x100, + 0xbf800776, + 0xf772, + 0x0, + 0xec000002, + 0x1000e, +}; + +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] = +{ + 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x80000000, - 0xffffffff, - 0xffffffff, - 0xfffdffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffff, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0xff77f77d, + 0xddfeefee, + 0x77f77ddf, + 0xfddfddff, + 0x77f77fbb, + 0xbfddfddf, + 0xf77fbbfb, + 0xefeeff77, + 0x7fbbfbbe, + 0xfbbfbbe5, + 0xeff77f77, + 0xbfbbeefe, + 0xf77f77fb, + 0xdfeefeef, + 0x7f77ddfd, + 0xfbbfddf7, + 0x77f77fbb, + 0xbeefeeff, + 0x3bbfb, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf77e0000, + 0xefeeff77, + 0x7ddfddfe, + 0xddf777f7, + 0xbfbbfddf, + 0xf77f77fb, + 0x77fddfdd, + 0xfeeff77f, + 0xf77ddfdd, + 0xefeeff77, + 0xfddfddfe, + 0xeefbbfbb, + 0xef95feef, + 0xfddfeefe, + 0xbbfbbfdd, + 0xdfeefeef, + 0xfbbfddfd, + 0x77f77fbb, + 0x77ddfddf, + 0xfeefeeff, + 0xbbfddfdd, + 0xefeefbbf, + 0xe, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[47] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] = { 0x0, 0x0, - 0x40000100, + 0x400000, + 0x4000000, + 0x0, + 0x0, + 0x8000, + 0x400400, + 0x10008008, + 0x40040100, + 0x1001000, + 0x40020020, + 0x100400, + 0x4004001, + 0x100080, + 0x400401, + 0x10008008, + 0x200100, + 0x800802, + 0x8008000, + 0x100100, + 0x802002, + 0x10010008, + 0x200200, + 0x1004004, + 0x8004010, + 0x100080, + 0x2002001, + 0x8008, + 0x0, + 0x0, + 0x100, + 0x1000, + 0x0, + 0x0, + 0x10000002, + 0x200100, + 0x4004002, + 0x40010010, + 0x800400, + 0x10010008, + 0x40040, + 0x2001001, + 0x10040040, + 0x200100, + 0x4004002, + 0x20080080, + 0x200, + 0x4002002, + 0x80080040, + 0x200200, + 0x8004004, + 0x100080, + 0x400401, + 0x2002001, + 0x80040040, + 0x200800, + 0x2, +}; + +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbbfbbe0, + 0xeff77f77, + 0xbfbbeefe, + 0x3b, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, 0x0, 0x0, - 0x10000020, - 0x8020040, - 0x1010040, - 0x1004004, - 0x1002008, - 0x100404, - 0x200401, - 0x10040401, - 0x10020080, - 0x8020040, - 0x2002008, - 0x1004008, - 0x80202008, - 0x80100400, - 0x40100200, - 0x1010040, - 0x1002008, - 0x80802004, - 0x200, 0x0, - 0x100000, - 0x400, 0x0, - 0x20000, - 0x20040100, - 0x10040080, - 0x4004010, - 0x2008010, - 0x404010, - 0x401001, - 0x40401002, - 0x20080100, - 0x20040100, - 0x2008080, - 0x4008020, - 0x2008010, - 0x400802, - 0x200801, - 0x10040401, - 0x2008010, - 0x2004010, - 0x200808, + 0x0, + 0x0, + 0x0, + 0xef800000, + 0xfddfeefe, + 0xbbfbbfdd, + 0xeefeef, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[42] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] = { 0x0, 0x0, @@ -775,19 +1076,26 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, + 0x77780000, 0x0, 0x0, + 0xdde00000, + 0x1, 0x0, + 0x777800, 0x0, 0x0, + 0xeef000, 0x0, 0x0, - 0xfffe0000, - 0xffffffff, - 0xffffffff, - 0x3, + 0xef000000, + 0xe, + 0x0, + 0xde000000, + 0x1d, 0x0, 0x0, + 0xeef0, 0x0, 0x0, 0x0, @@ -797,21 +1105,29 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, + 0x1dde0, 0x0, 0x0, + 0x77780, 0x0, + 0xe0000000, + 0x1dd, 0x0, + 0xc0000000, + 0x3bb, 0x0, 0x0, + 0x3bbc00, 0x0, 0x0, - 0xe0000000, - 0xffffffff, - 0xffffffff, - 0x3fff, + 0x777800, + 0x0, + 0x0, + 0xbbc00000, + 0x3, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[46] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] = { 0x0, 0x0, @@ -819,23 +1135,13 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0x80000000, - 0x1ff, 0x0, - 0x7fe0000, 0x0, - 0xfe000000, - 0x7, 0x0, - 0xffc00, 0x0, - 0xf0000000, - 0x3f, 0x0, - 0x7fe000, 0x0, 0x0, - 0xffc0, 0x0, 0x0, 0x0, @@ -843,25 +1149,18 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0x1ff800, 0x0, - 0xe0000000, - 0x7f, 0x0, - 0x7fe0, 0x0, - 0xffc00000, 0x0, 0x0, - 0x3ff00, 0x0, - 0xfe000000, - 0x7, 0x0, - 0xffc0000, + 0x0, + 0x80000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[24] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] = { 0x0, 0x0, @@ -885,12 +1184,10 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0x0, - 0x2000, -}; - -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[44] = -{ + 0xf77f77c0, + 0xdfeefeef, + 0x7f77ddfd, + 0x77, 0x0, 0x0, 0x0, @@ -909,15 +1206,20 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0xfffffffc, - 0xffffffff, - 0x7ffff, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0xdf000000, + 0xfbbfddfd, + 0x77f77fbb, + 0x1ddfddf, +}; + +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] = +{ 0x0, 0x0, 0x0, @@ -926,222 +1228,242 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, + 0x80000000, + 0x777, 0x0, 0x0, + 0x1dde, 0x0, + 0x77800000, + 0x7, 0x0, + 0xef000000, + 0xe, 0x0, 0x0, - 0xffffc000, - 0xffffffff, - 0x7fffffff, -}; - -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[47] = -{ + 0xeef0, 0x0, 0x0, + 0x1dde0, 0x0, 0x0, + 0xeef0000, 0x0, 0x0, 0x0, - 0x7fe00, 0x0, - 0xf8000000, - 0x1f, 0x0, - 0x1ff8, 0x0, - 0x3ff00000, 0x0, 0x0, - 0xffc0, 0x0, - 0xff800000, - 0x1, + 0x1dde0000, 0x0, - 0x3ff0000, 0x0, + 0x77780000, 0x0, 0x0, + 0x1dde00, 0x0, 0x0, + 0x3bbc00, 0x0, 0x0, - 0x7fe00000, + 0xbbc00000, + 0x3, 0x0, + 0x77800000, + 0x7, 0x0, - 0x1ff80, 0x0, - 0x1ff8000, + 0x3bbc, +}; + +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] = +{ 0x0, 0x0, - 0x3ff, + 0x58000, + 0x580e00, 0x0, - 0xffc0000, 0x0, + 0xb00, + 0xb0058058, + 0x1600b00, + 0x5805816, + 0xc0160160, + 0x5802c02, + 0x16016058, + 0x580580, + 0x1601600b, + 0xb0058058, + 0x1600b00, + 0x2c02c016, + 0x700b00b0, + 0xb00b00, + 0x2c016016, + 0xb00b02c0, + 0x1601600, + 0x5802c02c, + 0x60160580, + 0xb00581, + 0x1601600b, + 0xb02c02c0, + 0xb00, 0x0, - 0x1ff8, 0x0, - 0xf0000000, - 0x3f, + 0x38000016, + 0x160, + 0x0, + 0x2c000000, + 0x1600000, + 0x2c02c016, + 0x60580580, + 0x5801601, + 0xb00b0058, + 0x81601600, + 0x16005805, + 0x802c0160, + 0x1605805, + 0x2c02c016, + 0x580580, + 0x2c0b00b, + 0x2c01c02c, + 0x805802c0, + 0xb00b005, + 0x5802c02c, + 0xb00580, + 0x1601600b, + 0x16058058, + 0x802c02c0, + 0xb005805, + 0x2c02c0b0, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[47] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] = { 0x0, 0x0, - 0xe000038, - 0x0, - 0x0, - 0x3800007, - 0x1c0700e, - 0xe038380e, - 0xc0380e00, - 0xe0380701, - 0x380380e0, - 0x380700e0, - 0x380e0e0, - 0x380701c, - 0xc1c0700e, - 0xc0700701, - 0xc0380e01, - 0x1c070701, - 0x1c0380e0, - 0xe038070, - 0xc038380e, - 0xe0380701, - 0x1c1c0700, - 0x70, - 0x0, - 0x38000, - 0xe0, - 0x0, - 0x7000, - 0x700e038, - 0x8380e01c, - 0x80e00e03, - 0x80701c03, - 0x380e0e03, - 0x700e0380, - 0xe0e0380, - 0x701c038, - 0x700e038, - 0x701c1c, - 0x80e01c07, - 0x70701c03, - 0x380e01c0, - 0x380701c0, - 0x8380e0e0, - 0x80701c03, - 0xc0700e03, - 0x701c1, -}; - -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[47] = -{ + 0x50000, + 0x500c00, + 0x0, + 0x0, + 0xa00, + 0xa0050050, + 0x1400a00, + 0x5005014, + 0x80140140, + 0x5002802, + 0x14014050, + 0x500500, + 0x1401400a, + 0xa0050050, + 0x1400a00, + 0x28028014, + 0x600a00a0, + 0xa00a00, + 0x28014014, + 0xa00a0280, + 0x1401400, + 0x50028028, + 0x40140500, + 0xa00501, + 0x1401400a, + 0xa0280280, + 0xa00, + 0x0, 0x0, + 0x30000014, + 0x140, 0x0, - 0xc000030, - 0x0, - 0x0, - 0x3000006, - 0x180600c, - 0xc030300c, - 0x80300c00, - 0xc0300601, - 0x300300c0, - 0x300600c0, - 0x300c0c0, - 0x3006018, - 0x8180600c, - 0x80600601, - 0x80300c01, - 0x18060601, - 0x180300c0, - 0xc030060, - 0x8030300c, - 0xc0300601, - 0x18180600, - 0x60, - 0x0, - 0x30000, - 0xc0, - 0x0, - 0x6000, - 0x600c030, - 0x300c018, - 0xc00c03, - 0x601803, - 0x300c0c03, - 0x600c0300, - 0xc0c0300, - 0x6018030, - 0x600c030, - 0x601818, - 0xc01806, - 0x60601803, - 0x300c0180, - 0x30060180, - 0x300c0c0, - 0x601803, - 0x80600c03, - 0x60181, + 0x28000000, + 0x1400000, + 0x28028014, + 0x40500500, + 0x5001401, + 0xa00a0050, + 0x1401400, + 0x14005005, + 0x280140, + 0x1405005, + 0x28028014, + 0x500500, + 0x280a00a, + 0x28018028, + 0x500280, + 0xa00a005, + 0x50028028, + 0xa00500, + 0x1401400a, + 0x14050050, + 0x280280, + 0xa005005, + 0x280280a0, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[47] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] = { 0x0, 0x0, - 0xf00003c0, - 0x0, - 0x0, - 0x3c000078, - 0x1e0780f0, - 0x3c3c0f0, - 0x3c0f00f, - 0x3c0781e, - 0xc03c0f0f, - 0xc0780f03, - 0x3c0f0f03, - 0x3c0781e0, - 0x1e0780f0, - 0x780781e, - 0x3c0f01e, - 0xe078781e, - 0xe03c0f01, - 0xf03c0781, - 0x3c3c0f0, - 0x3c0781e, - 0xe1e0780f, - 0x781, - 0x0, - 0x3c0000, - 0xf00, - 0x0, - 0x78000, - 0x780f03c0, - 0x3c0f01e0, - 0xf00f03c, - 0x781e03c, - 0xc0f0f03c, - 0x80f03c03, - 0xf0f03c07, - 0x781e03c0, - 0x780f03c0, - 0x781e1e0, - 0xf01e078, - 0x8781e03c, - 0xc0f01e07, - 0xc0781e03, - 0x3c0f0f03, - 0x781e03c, - 0x780f03c, - 0x781e1e, + 0xd80000, + 0xd80a000, + 0x0, + 0x0, + 0x1b000, + 0xd80d80, + 0x3601b01b, + 0xd80d8360, + 0x3603600, + 0xd806c06c, + 0x60360d80, + 0xd80d803, + 0x603601b0, + 0xd80d83, + 0x3601b01b, + 0xc06c0360, + 0x1b01b06, + 0x1b01b005, + 0xc0360360, + 0x1b06c06, + 0x3603601b, + 0x806c06c0, + 0x360d80d, + 0x1b00d836, + 0x603601b0, + 0x6c06c03, + 0x1b01b, + 0x0, + 0x0, + 0x80000360, + 0x3602, + 0x0, + 0xc0000000, + 0x36000006, + 0xc06c0360, + 0xd80d806, + 0xd8036036, + 0x1b00d80, + 0x3603601b, + 0x600d80d8, + 0x6c03603, + 0x360d80d8, + 0xc06c0360, + 0xd80d806, + 0x6c1b01b0, + 0xc01406c0, + 0xd806c06, + 0xb01b00d8, + 0x806c06c1, + 0x1b00d80d, + 0x603601b0, + 0x60d80d83, + 0x6c06c03, + 0xb00d80d8, + 0xc06c1b01, + 0x6, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[24] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] = { 0x0, 0x0, @@ -1166,119 +1488,147 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0x4000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x100000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[47] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] = { 0x0, 0x0, - 0x400, - 0x1, + 0x1000000, + 0x10000000, + 0x0, 0x0, - 0x40000080, - 0x20080100, - 0x4040100, + 0x20000, + 0x1001000, + 0x40020020, + 0x100400, + 0x4004001, + 0x80080, + 0x401001, + 0x10010004, + 0x400200, + 0x1001004, + 0x40020020, + 0x800400, + 0x2002008, + 0x20020000, + 0x400400, + 0x2008008, + 0x40040020, + 0x800800, 0x4010010, - 0x4008020, - 0x401010, - 0x801004, - 0x40101004, - 0x40080200, - 0x20080100, - 0x8008020, - 0x4010020, - 0x808020, - 0x401002, - 0x400802, - 0x4040101, - 0x4008020, - 0x2008010, - 0x802, + 0x20010040, + 0x400200, + 0x8008004, + 0x20020, 0x0, - 0x400000, - 0x1000, 0x0, - 0x80000, - 0x80100400, - 0x40100200, - 0x10010040, - 0x8020040, - 0x1010040, - 0x1004004, - 0x1004008, - 0x80200401, - 0x80100400, - 0x8020200, - 0x10020080, - 0x8020040, - 0x1002008, - 0x802004, - 0x40101004, - 0x8020040, - 0x8010040, - 0x802020, + 0x400, + 0x4000, + 0x0, + 0x0, + 0x40000008, + 0x800400, + 0x10010008, + 0x40040, + 0x2001001, + 0x40040020, + 0x100100, + 0x8004004, + 0x40100100, + 0x800400, + 0x10010008, + 0x80200200, + 0x800, + 0x10008008, + 0x200100, + 0x800802, + 0x20010010, + 0x400200, + 0x1001004, + 0x8008004, + 0x100100, + 0x802002, + 0x8, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[47] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] = { 0x0, 0x0, - 0x88000220, - 0x0, - 0x0, - 0x22000044, - 0x11044088, - 0x82222088, - 0x2208808, - 0x82204411, - 0x20220888, - 0x20440882, - 0x22088882, - 0x22044110, - 0x11044088, - 0x4404411, - 0x2208811, - 0x10444411, - 0x10220881, - 0x88220441, - 0x2222088, - 0x82204411, - 0x11104408, - 0x441, - 0x0, - 0x220000, - 0x880, - 0x0, - 0x44000, - 0x44088220, - 0x22088110, - 0x8808822, - 0x4411022, - 0x20888822, - 0x40882202, - 0x88882204, - 0x44110220, - 0x44088220, - 0x4411110, - 0x8811044, - 0x44411022, - 0x20881104, - 0x20441102, - 0x22088882, - 0x4411022, - 0x4408822, - 0x441111, + 0x840000, + 0x8400000, + 0x0, + 0x0, + 0x10800, + 0x80840840, + 0x21010810, + 0x84084210, + 0x2102100, + 0x84042042, + 0x10210840, + 0x8408402, + 0x10210108, + 0x80840842, + 0x21010810, + 0x20420210, + 0x1081084, + 0x10810800, + 0x20210210, + 0x81084204, + 0x21021010, + 0x40420420, + 0x2108408, + 0x10808421, + 0x10210108, + 0x84204202, + 0x10810, + 0x0, + 0x0, + 0x210, + 0x2100, + 0x0, + 0x20000000, + 0x21000004, + 0x20420210, + 0x8408404, + 0x84021021, + 0x81080840, + 0x21021010, + 0x10084084, + 0x4202102, + 0x21084084, + 0x20420210, + 0x8408404, + 0x42108108, + 0x20000420, + 0x8404204, + 0x8108084, + 0x40420421, + 0x10808408, + 0x10210108, + 0x10840842, + 0x4204202, + 0x8084084, + 0x20421081, + 0x4, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[47] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] = { 0x0, 0x0, 0x0, - 0x2, - 0x800, - 0x400ff, + 0x20000000, + 0x0, + 0x8000, + 0x4003bb00, 0x0, 0x0, 0x0, @@ -1293,21 +1643,21 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0xf8000000, - 0xffffffff, - 0xffffffff, - 0xfff, 0x0, 0x0, - 0x2000, - 0x800000, - 0x400ff000, 0x0, 0x0, + 0xfbbe0000, + 0x77f77fbb, + 0xbeefeeff, + 0x3bbfb, 0x0, 0x0, 0x0, + 0x8000, 0x0, + 0xec000002, + 0x1000e, 0x0, 0x0, 0x0, @@ -1317,12 +1667,22 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0xffffff80, - 0xffffffff, - 0xffffff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfeefeef8, + 0xbbfddfdd, + 0xefeefbbf, + 0xe, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[47] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] = { 0x0, 0x0, @@ -1331,102 +1691,113 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x0, 0x0, 0x0, - 0xf8000000, - 0x1f, 0x0, - 0x7fe000, 0x0, - 0x7fe00000, + 0xdde00000, + 0x1, 0x0, + 0x77800000, + 0x7, 0x0, - 0xffc0, + 0x1dde000, 0x0, - 0xff000000, - 0x3, 0x0, - 0x7fe00, + 0x3bbc000, 0x0, 0x0, - 0xffc, + 0xbc000000, + 0x3b, + 0x0, + 0x78000000, + 0x77, 0x0, 0x0, + 0x3bbc0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x1ff80, 0x0, - 0xfe000000, - 0x7, 0x0, - 0x7fe, 0x0, - 0xffc0000, 0x0, + 0x77780, + 0x0, + 0x0, + 0x1dde00, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0xeef, + 0x0, + 0x0, + 0xeef000, 0x0, - 0x3ff0, 0x0, - 0x7fe00000, + 0x1dde000, 0x0, 0x0, - 0xffc000, + 0xef000000, + 0xe, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[2] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[2] = { 0x33033198, 0xcc66066, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[2] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[2] = { 0x44044220, 0x11088088, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[2] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[2] = { 0xffc00000, 0xffffffff, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[2] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[2] = { 0x0, 0xfffff800, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[2] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[2] = { 0xf80f87c0, 0x3e1f01f0, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[2] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[2] = { 0xfffffffe, 0xffffffff, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[2] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[2] = { 0x1ff800, 0x7fe003ff, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[2] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[2] = { 0xa23a2510, 0xe8944744, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = { 0x4, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[13] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[14] = { 0x10, 0x0, @@ -1437,13 +1808,14 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xfbfdf7c0, - 0x7dfefbfe, - 0xbeff7dff, - 0x7beff7df, + 0xfbe00000, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0x3df7, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[34] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[35] = { 0x0, 0x0, @@ -1454,77 +1826,78 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x3df780, + 0xfbc00000, + 0x1e, 0x0, 0x0, + 0x7bef0000, 0x0, - 0xf7de, 0x0, 0x0, - 0x78000000, - 0x3df, + 0x1efbc00, 0x0, 0x0, - 0x7de00000, - 0xf, 0x0, + 0xdf780000, + 0x3, 0x0, - 0xf0000000, - 0x7be, 0x0, + 0xbc000000, + 0x1ef, 0x0, - 0xfbc00000, - 0x1e, 0x0, + 0xdf780000, + 0x3, 0x0, 0x0, - 0x1efbc00, + 0xde000000, + 0xf7, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[39] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[39] = { 0x0, 0x0, 0x0, 0x40, 0x0, - 0x8, + 0x40000, 0x0, 0x0, - 0x2000, - 0x20004000, - 0x10002000, - 0x8001000, - 0x800100, - 0x800100, - 0x400080, - 0x200040, - 0x20004, - 0x20004, - 0x20002, - 0x10002001, 0x10000000, - 0x8000800, - 0x4000400, - 0x400200, - 0x20, - 0x40008, - 0x20004, - 0x20010002, - 0x20001000, + 0x20000000, 0x10001000, 0x8000800, 0x800400, - 0x100040, - 0x20002, - 0x80010001, - 0x40008000, - 0x4000800, - 0x41000200, - 0x4444, + 0x800040, + 0x400040, + 0x200020, + 0x20010, + 0x20001, + 0x10001, + 0x10008001, + 0x800, + 0x4000000, + 0x2000200, + 0x1000100, + 0x100080, + 0x8, + 0x10002, + 0x80008001, + 0x8004000, + 0x4000400, + 0x2000200, + 0x1000100, + 0x100080, + 0x10008, + 0x80008001, + 0x40004000, + 0x4002000, + 0x88000200, + 0x88888, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[17] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[18] = { 0x0, 0x0, @@ -1539,13 +1912,14 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xfbeff7df, - 0xfdf7fbef, - 0x7efbfdf7, - 0x1efbfdf, + 0xfbef8000, + 0xfdf7fdf7, + 0xfefbfefb, + 0xdfefbf7d, + 0xf7, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[35] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[35] = { 0x0, 0x0, @@ -1556,35 +1930,35 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xfbc00000, - 0x1e, 0x0, + 0xf7de0, 0x0, - 0x7bef0000, 0x0, + 0x80000000, + 0x3df7, 0x0, 0x0, - 0x1efbc00, + 0xde000000, + 0xf7, 0x0, 0x0, 0x0, - 0x7bef0, + 0x1efbc, 0x0, 0x0, 0x0, - 0x3df7800, + 0xf7de00, 0x0, 0x0, 0x0, - 0xf7de0, + 0x1efbc, 0x0, 0x0, 0x0, - 0xde000000, - 0xf7, + 0x7bef00, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[35] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[35] = { 0x0, 0x0, @@ -1596,77 +1970,77 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x20, + 0x100000, 0x0, 0x0, - 0x80000000, 0x0, + 0x4000, 0x0, - 0x2000000, - 0x2000000, 0x0, + 0x100, + 0x100, 0x0, 0x0, - 0x80000, 0x0, + 0x20000, 0x0, 0x0, - 0x4000000, 0x0, + 0x1000000, 0x0, 0x0, - 0x100000, 0x0, + 0x20000, 0x0, 0x0, 0x0, - 0x100, + 0x800000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[39] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[39] = { 0x1e, 0x0, 0x4, 0xe0003df6, - 0xe22fffff, - 0xfbe, + 0xffffffff, + 0x7df7117, 0x0, - 0x200, - 0x1efb00, - 0xfbfdf7f0, - 0x7dfefbfe, - 0xbeff7dff, - 0x7beff7df, - 0xfbeff7df, - 0xfdf7fbef, - 0x7efbfdf7, - 0x7fefbfdf, - 0xbfefbfdf, - 0xdfefbfef, - 0x7dfefbf7, - 0x7dffffff, - 0xbeffbeff, - 0xdf7fdf7f, - 0xfdf7efbf, - 0xf88bfefb, - 0x7fdf7fbe, - 0xbfefbfdf, - 0xfbf7dfef, - 0xfbff7dfe, + 0x1000000, + 0x7d800000, + 0xfbf8000f, 0x7dff7dfe, 0xbeffbeff, 0xfbefdf7f, - 0xbf7dfdf7, - 0xdfefbfef, - 0xeff7dff7, - 0xf7fbeffb, - 0xdf7fbefd, - 0xffe007fb, - 0x7ffff, + 0xfbefbdf7, + 0xfdf7fdf7, + 0xfefbfefb, + 0xdfefbf7d, + 0xdfefbff7, + 0xdff7dff7, + 0x7dfbeff7, + 0xffffbeff, + 0xdf7fffff, + 0xefbfefbf, + 0xf7dff7df, + 0xff7dfbef, + 0xbe22ffbe, + 0xdff7dfef, + 0xeffbeff7, + 0xbefdf7fb, + 0xdf7fdf7f, + 0xefbfefbf, + 0xf7dff7df, + 0xff7dfbef, + 0xdff7dfbe, + 0xeffbeff7, + 0xf7fdf7fb, + 0xdf7efbfd, + 0xfffdefbf, + 0xffffff, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] = { 0x0, 0x0, @@ -1684,14 +2058,14 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x7c000000, - 0xbfefbfdf, - 0xdfefbfef, - 0x7dfefbf7, - 0xf, + 0x0, + 0xdfefbe00, + 0xdff7dff7, + 0x7dfbeff7, + 0x7beff, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[35] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[36] = { 0x0, 0x0, @@ -1703,81 +2077,83 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x1efbc0, - 0x0, + 0x7de00000, + 0xf, 0x0, 0x0, - 0x7bef, + 0x3df78000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0xbef00000, - 0x7, 0x0, + 0xefbc0000, + 0x1, 0x0, - 0x78000000, - 0x3df, 0x0, + 0xde000000, + 0xf7, 0x0, - 0x7de00000, - 0xf, 0x0, + 0xefbc0000, + 0x1, 0x0, 0x0, - 0xf7de00, + 0xef000000, + 0x7b, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[37] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[38] = { 0x0, 0x0, 0x0, 0x180, 0x0, - 0x30, + 0x180000, 0x0, 0x0, - 0xc000, - 0xc0018000, - 0x6000c000, - 0x30006000, - 0x3000600, - 0x3000600, - 0x1800300, - 0xc00180, - 0xc0018, - 0xc0018, - 0xc000c, - 0x6000c006, 0x60000000, - 0x30003000, - 0x18001800, - 0x1800c00, - 0xc0, - 0x180030, - 0xc0018, - 0xc006000c, - 0xc0006000, + 0xc0000000, 0x60006000, 0x30003000, 0x3001800, - 0x600180, - 0xc000c, + 0x3000180, + 0x1800180, + 0xc000c0, + 0xc0060, + 0xc0006, 0x60006, - 0x80030003, - 0x18003001, + 0x60030006, + 0x3000, + 0x18000000, + 0xc000c00, + 0x6000600, + 0x600300, + 0x30, + 0x6000c, + 0x30006, + 0x30018003, + 0x18001800, + 0xc000c00, + 0x6000600, + 0x600300, + 0x60030, + 0x30006, + 0x80018003, + 0x1800c001, + 0xc00, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[21] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[22] = { 0x0, 0x0, 0x0, 0x80000000, - 0x7fff, + 0x3fffffff, 0x0, 0x0, 0x0, @@ -1793,16 +2169,17 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xffff0, + 0xfff80000, + 0x3ffff, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[21] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[22] = { 0x0, 0x0, 0x0, 0x0, - 0x1fe, + 0x1fffe, 0x0, 0x0, 0x0, @@ -1818,16 +2195,17 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x3fc0, + 0xffe00000, + 0x1f, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[21] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[22] = { 0x0, 0x0, 0x0, 0x0, - 0x1e3c, + 0x1fe03fc, 0x0, 0x0, 0x0, @@ -1843,16 +2221,17 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x3c780, + 0x3fc00000, + 0x1fe0, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[21] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[22] = { 0x0, 0x0, 0x0, 0x0, - 0x5568, + 0x31999b30, 0x0, 0x0, 0x0, @@ -1868,16 +2247,17 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xaad00, + 0xb3000000, + 0x31999, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[21] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[22] = { 0x0, 0x0, 0x0, 0x0, - 0x79b0, + 0x3de1e3c0, 0x0, 0x0, 0x0, @@ -1893,10 +2273,11 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xf3600, + 0x3c000000, + 0x3de1e, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[25] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[26] = { 0x0, 0x0, @@ -1918,14 +2299,15 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x7df00000, - 0xbeffbeff, - 0xdf7fdf7f, - 0xfdf7efbf, - 0x1efb, + 0x0, + 0xdf7c0000, + 0xefbfefbf, + 0xf7dff7df, + 0xff7dfbef, + 0x7be, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[36] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[36] = { 0x0, 0x0, @@ -1937,82 +2319,84 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x7de00000, - 0xf, 0x0, + 0x7bef0, 0x0, - 0x3df78000, 0x0, + 0xc0000000, + 0x1efb, 0x0, - 0xbc000000, - 0x1ef, 0x0, + 0xf7de00, 0x0, 0x0, - 0x3df78, 0x0, 0x0, + 0xf7de, 0x0, - 0x1efbc00, 0x0, 0x0, + 0x7bef00, 0x0, - 0x7bef0, 0x0, 0x0, + 0xf7de, 0x0, - 0xef000000, - 0x7b, + 0x0, + 0x0, + 0x3df780, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[37] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[38] = { 0x0, 0x0, 0x4, 0x0, - 0x8000, + 0x40000000, 0x0, 0x0, - 0x200, + 0x1000000, 0x0, - 0x800100, - 0x400080, - 0x200050, - 0x20000, - 0x20004, - 0x40010002, - 0x8001, - 0x10000800, - 0x8000800, - 0x4000a00, - 0x400000, - 0x400000, - 0x200020, - 0x140010, - 0x80000008, - 0x20002000, - 0x10001000, - 0xa000800, - 0x400, - 0x800040, + 0x800000, 0x400040, 0x280020, 0x10, - 0x1, + 0x20001, + 0x80010001, + 0x4000a000, + 0x4000000, 0x4000800, - 0x2000400, - 0x1000280, + 0x5000400, + 0x200, + 0x20, 0x100000, + 0x80008, + 0x50004, + 0x20000002, + 0x8000800, + 0x4000400, + 0x2800200, + 0x100, + 0x100010, + 0x80008, + 0x50004, + 0x20000002, + 0x4000000, + 0x2000200, + 0x1400100, + 0x80, + 0x8, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[25] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[26] = { 0x0, 0x0, 0x0, 0x0, - 0x22f0000, + 0x80000000, + 0x117, 0x0, 0x0, 0x0, @@ -2032,17 +2416,17 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x8bc000, + 0x22f000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata[25] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[26] = { 0x0, 0x0, 0x0, 0x0, - 0x2080000, 0x0, + 0x104, 0x0, 0x0, 0x0, @@ -2061,79 +2445,81 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x820000, + 0x0, + 0x208000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[10] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[10] = { 0x0, 0x0, 0x0, 0x20000000, - 0x20000000, 0x0, + 0x1000, 0x0, 0x0, 0x0, - 0x10, + 0x80000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[37] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[38] = { 0x0, 0x0, 0x0, 0x100, 0x0, - 0x20, + 0x100000, 0x0, 0x0, - 0x8000, - 0x80010000, - 0x40008000, - 0x20004000, - 0x2000400, - 0x2000400, - 0x1000200, - 0x800100, - 0x80010, - 0x80010, - 0x80008, - 0x40008004, 0x40000000, - 0x20002000, - 0x10001000, - 0x1000800, - 0x80, - 0x100020, - 0x80010, - 0x80040008, - 0x80004000, + 0x80000000, 0x40004000, 0x20002000, 0x2001000, - 0x400100, - 0x80008, + 0x2000100, + 0x1000100, + 0x800080, + 0x80040, + 0x80004, 0x40004, - 0x20002, - 0x10002001, + 0x40020004, + 0x2000, + 0x10000000, + 0x8000800, + 0x4000400, + 0x400200, + 0x20, + 0x40008, + 0x20004, + 0x20010002, + 0x10001000, + 0x8000800, + 0x4000400, + 0x400200, + 0x40020, + 0x20004, + 0x10002, + 0x10008001, + 0x800, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] = { 0x18, 0x0, 0x4, 0xe0003df6, - 0xe22fffff, - 0xfbe, + 0xffffffff, + 0x7df7117, 0x0, - 0x200, - 0x1efb00, - 0x10, + 0x1000000, + 0x7d800000, + 0x8000f, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[38] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[38] = { 0x0, 0x0, @@ -2144,38 +2530,38 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xfbfdf7e0, - 0x7dfefbfe, - 0xbeff7dff, - 0x7beff7df, - 0xfbeff7df, - 0xfdf7fbef, - 0x7efbfdf7, - 0x7fefbfdf, - 0xbfefbfdf, - 0xdfefbfef, - 0x7dfefbf7, - 0x7dffffff, - 0xbeffbeff, - 0xdf7fdf7f, - 0xfdf7efbf, - 0xf88bfefb, - 0x7fdf7fbe, - 0xbfefbfdf, - 0xfbf7dfef, - 0xfbff7dfe, + 0xfbf00000, 0x7dff7dfe, 0xbeffbeff, 0xfbefdf7f, - 0xbf7dfdf7, - 0xdfefbfef, - 0xeff7dff7, - 0xf7fbeffb, - 0xdf7fbefd, - 0x3, + 0xfbefbdf7, + 0xfdf7fdf7, + 0xfefbfefb, + 0xdfefbf7d, + 0xdfefbff7, + 0xdff7dff7, + 0x7dfbeff7, + 0xffffbeff, + 0xdf7fffff, + 0xefbfefbf, + 0xf7dff7df, + 0xff7dfbef, + 0xbe22ffbe, + 0xdff7dfef, + 0xeffbeff7, + 0xbefdf7fb, + 0xdf7fdf7f, + 0xefbfefbf, + 0xf7dff7df, + 0xff7dfbef, + 0xdff7dfbe, + 0xeffbeff7, + 0xf7fdf7fb, + 0xdf7efbfd, + 0x1efbf, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[39] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[39] = { 0x0, 0x0, @@ -2214,11 +2600,11 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xffe007f8, - 0xffff, + 0xfffc0000, + 0x1fffff, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[39] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[39] = { 0x0, 0x0, @@ -2257,11 +2643,11 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xffe007f0, - 0xfff, + 0xfff80000, + 0x1ffff, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[39] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[39] = { 0x0, 0x0, @@ -2300,11 +2686,11 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xffe007e0, - 0xff, + 0xfff00000, + 0x1fff, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[39] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[39] = { 0x0, 0x0, @@ -2343,11 +2729,11 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xffe007c0, - 0xf, + 0xffe00000, + 0x1ff, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[39] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[39] = { 0x0, 0x0, @@ -2386,11 +2772,11 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xffe00000, - 0xf, + 0xffc00000, + 0x1f, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[39] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[39] = { 0x0, 0x0, @@ -2429,11 +2815,11 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xfc000000, - 0xf, + 0xff800000, + 0x1, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[38] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[38] = { 0x0, 0x0, @@ -2472,10 +2858,10 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xf8000000, + 0x1f000000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[39] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[39] = { 0x0, 0x0, @@ -2514,11 +2900,11 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x61800300, - 0x6666, + 0xcc000000, + 0xccccc, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[39] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[39] = { 0x0, 0x0, @@ -2557,54 +2943,54 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x82000400, - 0x8888, + 0x10000000, + 0x111111, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[39] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[39] = { 0x0, 0x0, 0x0, 0x400, 0x0, - 0x80, + 0x400000, + 0x0, 0x0, 0x0, - 0x20000, - 0x40000, - 0x20002, - 0x80010001, - 0x8001000, - 0x8001000, - 0x4000800, - 0x2000400, - 0x200040, - 0x200040, - 0x200020, - 0x20010, 0x1, - 0x80008001, - 0x40004000, - 0x4002000, - 0x200, - 0x400080, - 0x200040, - 0x100020, - 0x10002, 0x10002, 0x80008001, 0x8004000, - 0x1000400, - 0x200020, + 0x8000400, + 0x4000400, + 0x2000200, + 0x200100, + 0x200010, 0x100010, - 0x80008, - 0x40008004, - 0x0, - 0x10000, + 0x80010, + 0x8001, + 0x40000000, + 0x20002000, + 0x10001000, + 0x1000800, + 0x80, + 0x100020, + 0x80010, + 0x80040008, + 0x40004000, + 0x20002000, + 0x10001000, + 0x1000800, + 0x100080, + 0x80010, + 0x40008, + 0x40020004, + 0x2000, + 0x200000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[29] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[30] = { 0x0, 0x0, @@ -2630,14 +3016,15 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xf8000000, - 0x7fdf7fbe, - 0xbfefbfdf, - 0xfbf7dfef, - 0xf7dfe, + 0x0, + 0xbe000000, + 0xdff7dfef, + 0xeffbeff7, + 0xbefdf7fb, + 0x3df7f, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[36] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[37] = { 0x0, 0x0, @@ -2650,63 +3037,36 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xf7de0, - 0x0, - 0x0, - 0x80000000, - 0x3df7, - 0x0, - 0x0, - 0x1efbc00, - 0x0, - 0x0, - 0x0, - 0xdf780000, - 0x3, - 0x0, - 0x0, - 0xbc000000, - 0x1ef, - 0x0, - 0x0, 0xbef00000, 0x7, 0x0, 0x0, - 0x0, - 0x7bef00, -}; - -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[39] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, + 0x1efbc000, 0x0, 0x0, + 0xde000000, + 0xf7, 0x0, 0x0, 0x0, + 0xf7de0000, 0x0, 0x0, 0x0, + 0xef000000, + 0x7b, 0x0, 0x0, + 0xf7de0000, 0x0, 0x0, 0x0, + 0xf7800000, + 0x3d, +}; + +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[39] = +{ 0x0, 0x0, 0x0, @@ -2717,11 +3077,6 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x20000, -}; - -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[33] = -{ 0x0, 0x0, 0x0, @@ -2750,14 +3105,10 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xfbe00000, - 0x7dff7dfe, - 0xbeffbeff, - 0xfbefdf7f, - 0x3df7, + 0x400000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[37] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[34] = { 0x0, 0x0, @@ -2770,35 +3121,32 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xbef00000, - 0x7, 0x0, 0x0, - 0x1efbc000, 0x0, 0x0, - 0xde000000, - 0xf7, 0x0, 0x0, 0x0, - 0x1efbc, 0x0, 0x0, 0x0, - 0xf7de00, 0x0, 0x0, 0x0, - 0x3df78, 0x0, 0x0, 0x0, - 0xf7800000, - 0x3d, + 0x0, + 0x0, + 0xdf7c0000, + 0xefbfefbf, + 0xf7dff7df, + 0xff7dfbef, + 0x7be, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[33] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[37] = { 0x0, 0x0, @@ -2812,154 +3160,160 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, + 0x3df78, 0x0, 0x0, + 0xe0000000, + 0xf7d, 0x0, 0x0, + 0x7bef00, 0x0, 0x0, 0x0, 0x0, + 0x7bef, 0x0, 0x0, 0x0, + 0x3df780, 0x0, 0x0, 0x0, + 0x7bef, 0x0, 0x0, 0x0, - 0x0, - 0x0, - 0x0, - 0xf7dc000, + 0x1efbc0, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[37] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[38] = { 0x0, 0x0, 0x0, 0x16, - 0xc00e0000, - 0x2, + 0x0, + 0x16007, 0x0, 0x0, - 0xb00, - 0xb001600, - 0x5800b00, - 0x2c00580, - 0x2c0058, - 0x2c0058, - 0x16002c, - 0x600b0016, - 0x6000b001, - 0xb000b001, - 0x5800b000, - 0x5800b00, 0x5800000, - 0x2c002c0, - 0x1600160, - 0x1600b0, - 0xc003800b, - 0x60016002, - 0xb000b001, - 0xb005800, - 0xb000580, + 0xb000000, 0x5800580, 0x2c002c0, 0x2c0160, - 0xb0058016, + 0x2c0016, + 0x160016, + 0x800b000b, + 0x5800b005, 0x5800b000, - 0x2c005800, - 0x16002c00, - 0x16002c0, + 0x58005800, + 0x5802c00, + 0x2c0, + 0x1600000, + 0xb000b0, + 0x580058, + 0xc005802c, + 0xb000e002, + 0x58005800, + 0x2c002c00, + 0x2c01600, + 0x1600160, + 0xb000b0, + 0x580058, + 0xc005802c, + 0x58005802, + 0x2c002c00, + 0x16001600, + 0x1600b00, + 0xb0, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[37] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[38] = { 0x0, 0x0, 0x0, 0x14, - 0x800c0000, - 0x2, + 0x0, + 0x14006, 0x0, 0x0, - 0xa00, - 0xa001400, - 0x5000a00, - 0x2800500, - 0x280050, - 0x280050, - 0x140028, - 0x400a0014, - 0x4000a001, - 0xa000a001, - 0x5000a000, - 0x5000a00, 0x5000000, - 0x2800280, - 0x1400140, - 0x1400a0, - 0x8003000a, - 0x40014002, - 0xa000a001, - 0xa005000, - 0xa000500, + 0xa000000, 0x5000500, 0x2800280, 0x280140, - 0xa0050014, + 0x280014, + 0x140014, + 0xa000a, + 0x5000a005, 0x5000a000, - 0x28005000, - 0x14002800, - 0x1400280, + 0x50005000, + 0x5002800, + 0x280, + 0x1400000, + 0xa000a0, + 0x500050, + 0x80050028, + 0xa000c002, + 0x50005000, + 0x28002800, + 0x2801400, + 0x1400140, + 0xa000a0, + 0x500050, + 0x80050028, + 0x50005002, + 0x28002800, + 0x14001400, + 0x1400a00, + 0xa0, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[38] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[38] = { 0x0, 0x0, 0x0, 0x1de0, - 0x2200000, - 0x3bc, - 0x0, - 0x0, - 0xef000, - 0xf01de000, - 0x780ef00e, - 0xbc077807, - 0x3bc07783, - 0x3bc07780, - 0x1de03bc0, - 0xef01de0, - 0xef01de, - 0xef01de, - 0x80ef00ef, - 0x780ef077, - 0x78000007, - 0xbc03bc07, - 0xde01de03, - 0x1de0ef01, - 0x880ef0, - 0x1de03bc, - 0xef01de, - 0xf07780ef, - 0xf007780e, + 0x0, + 0x1de0110, + 0x0, + 0x0, + 0x78000000, + 0xf0000007, 0x7807780e, 0xbc03bc07, 0x3bc1de03, - 0x7781de0, - 0x80ef00ef, - 0xc0778077, - 0xe03bc03b, - 0xde03bc1d, - 0x1, + 0x3bc01de0, + 0x1de01de0, + 0xef00ef0, + 0x80ef0778, + 0x80ef0077, + 0x80778077, + 0x783bc077, + 0x3bc07, + 0xde000000, + 0xef00ef01, + 0x77807780, + 0x7783bc0, + 0x2203bc, + 0x807780ef, + 0xc03bc077, + 0xbc1de03b, + 0xde01de03, + 0xef00ef01, + 0x77807780, + 0x7783bc0, + 0x807783bc, + 0xc03bc077, + 0xe01de03b, + 0xde0ef01d, + 0xef01, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[39] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[39] = { 0x0, 0x0, @@ -2999,146 +3353,147 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x40000, + 0x800000, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[38] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[38] = { 0x0, 0x0, 0x0, 0x2000, 0x0, - 0x400, + 0x2000000, + 0x0, 0x0, 0x0, - 0x100000, - 0x200000, - 0x100010, - 0x80008, - 0x40008004, - 0x40008000, - 0x20004000, - 0x10002000, - 0x1000200, - 0x1000200, - 0x1000100, - 0x100080, 0x8, - 0x40008, - 0x20004, - 0x20010002, - 0x1000, - 0x2000400, - 0x1000200, - 0x800100, - 0x80010, 0x80010, 0x40008, 0x40020004, - 0x8002000, - 0x1000100, + 0x40002000, + 0x20002000, + 0x10001000, + 0x1000800, + 0x1000080, 0x800080, - 0x400040, - 0x40020, - 0x2, + 0x400080, + 0x40008, + 0x0, + 0x10002, + 0x80008001, + 0x8004000, + 0x400, + 0x800100, + 0x400080, + 0x200040, + 0x20004, + 0x10002, + 0x80008001, + 0x8004000, + 0x800400, + 0x400080, + 0x200040, + 0x100020, + 0x10002, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[37] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[38] = { 0x0, 0x0, 0x0, 0x810, 0x0, - 0x102, - 0x0, - 0x0, - 0x40800, - 0x8081000, - 0x4040804, - 0x2020402, - 0x10202041, - 0x10202040, - 0x8101020, - 0x4080810, - 0x408081, - 0x80408081, - 0x40408040, - 0x4040820, - 0x4000002, - 0x2010202, - 0x81008101, - 0x8104080, - 0x408, - 0x810102, - 0x80408081, - 0x8204040, - 0x8020404, + 0x810000, + 0x0, + 0x0, + 0x4000000, + 0x8000002, 0x4020404, 0x2010202, 0x10208101, - 0x82040810, - 0x40408040, - 0x20204020, - 0x10102010, - 0x81010208, + 0x10200810, + 0x8100810, + 0x4080408, + 0x40408204, + 0x40408020, + 0x40204020, + 0x4102020, + 0x10202, + 0x81000000, + 0x40804080, + 0x20402040, + 0x2041020, + 0x80000102, + 0x40204040, + 0x20102020, + 0x2081010, + 0x81008101, + 0x40804080, + 0x20402040, + 0x2041020, + 0x40204102, + 0x20102020, + 0x10081010, + 0x81040808, + 0x4080, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[38] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[38] = { 0x0, 0x0, 0x0, 0x1000, 0x0, - 0x200, + 0x1000000, + 0x0, 0x0, 0x0, - 0x80000, - 0x100000, - 0x80008, - 0x40004, - 0x20004002, - 0x20004000, - 0x10002000, - 0x8001000, - 0x800100, - 0x800100, - 0x800080, - 0x80040, 0x4, - 0x20004, - 0x10002, - 0x10008001, - 0x800, - 0x1000200, - 0x800100, - 0x400080, - 0x40008, 0x40008, 0x20004, 0x20010002, - 0x4001000, - 0x800080, + 0x20001000, + 0x10001000, + 0x8000800, + 0x800400, + 0x800040, 0x400040, - 0x200020, - 0x20010, - 0x1, + 0x200040, + 0x20004, + 0x0, + 0x80008001, + 0x40004000, + 0x4002000, + 0x200, + 0x400080, + 0x200040, + 0x100020, + 0x10002, + 0x80008001, + 0x40004000, + 0x4002000, + 0x400200, + 0x200040, + 0x100020, + 0x80010, + 0x8001, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[38] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[38] = { 0x0, 0x0, 0x0, 0x0, 0x0, - 0x800, + 0x4000000, 0x0, - 0x200, - 0x1efb00, - 0x10, + 0x1000000, + 0x7d800000, + 0x8000f, 0x0, 0x0, 0x0, @@ -3162,14 +3517,14 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xdfefbe00, - 0xeff7dff7, - 0xf7fbeffb, - 0xdf7fbefd, - 0x3, + 0xdf000000, + 0xeffbeff7, + 0xf7fdf7fb, + 0xdf7efbfd, + 0x1efbf, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[38] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[38] = { 0x0, 0x0, @@ -3183,889 +3538,875 @@ static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x7bef0000, + 0x80000000, + 0x3df7, 0x0, 0x0, + 0xde000000, + 0xf7, 0x0, - 0x1efbc00, 0x0, + 0x7bef0, 0x0, - 0x7de00000, - 0xf, 0x0, 0x0, - 0xc0000000, - 0x1efb, + 0xf0000000, + 0x7be, 0x0, 0x0, 0x0, - 0xf7de0, + 0x3df78, 0x0, 0x0, - 0x80000000, - 0x3df7, + 0xf0000000, + 0x7be, 0x0, 0x0, 0x0, - 0xdf780000, - 0x3, + 0x1efbc, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = { 0x4, }; -static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = { 0x8, }; static bcmpkt_rxpmd_match_id_db_t -bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_COUNT] = { +bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_COUNT] = { { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_CNTAG", .match = 0x80, .match_mask = 0xc0, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 7, .minbit = 6, .value = 0x2, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */ .name = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", .match = 0x40, .match_mask = 0xc0, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 7, .minbit = 6, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", .match = 0x2, .match_mask = 0x2, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 1, .minbit = 1, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", .match = 0x8, .match_mask = 0x8, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 3, .minbit = 3, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", .match = 0x20, .match_mask = 0x20, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ .name = "EGRESS_PKT_FWD_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 0, .minbit = 0, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ .name = "EGRESS_PKT_FWD_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 7, .minbit = 0, .value = 0x0, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", .match = 0x10, .match_mask = 0x10, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 4, .minbit = 4, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 2, .minbit = 2, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", .match = 0x4000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match_mask = 0x7c006, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", - .match = 0x24000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x10000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x9, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", .match = 0x140, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x5, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", .match = 0x3000, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x6, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x2c000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0xc004, + .match_mask = 0x1c406, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xb, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", .match = 0x200, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x8, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", .match = 0x40, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 0, .minbit = 0, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", - .match = 0x30000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x18000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xc, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", .match = 0x240, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x9, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", .match = 0x30, .match_mask = 0x438, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", - .match = 0x18, - .match_mask = 0x418, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 4, - .minbit = 3, - .value = 0x3, - .pmaxbit = 53, - .pminbit = 36, + .match = 0x40000, + .match_mask = 0x40000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 18, + .minbit = 18, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", .match = 0x80, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", .match = 0x1800, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x3, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", - .match = 0x10000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x44000, + .match_mask = 0x5c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x4, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", - .match = 0x38, - .match_mask = 0x438, - .match_maxbit = 53, - .match_minbit = 36, + .match = 0x40020, + .match_mask = 0x40020, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x4004, + .match_mask = 0x7c406, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", .match = 0xc0, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x3, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3818, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", - .match = 0x2c0, - .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 9, - .minbit = 6, - .value = 0xb, - .pmaxbit = 53, - .pminbit = 36, + .match = 0x20000, + .match_mask = 0x20000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 17, + .minbit = 17, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", - .match = 0xc000, + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0x24000, .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x3, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", .match = 0x100, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x4, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", .match = 0x1000, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", .match = 0x2, .match_mask = 0x406, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 2, .minbit = 1, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", .match = 0x4, .match_mask = 0x406, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 2, .minbit = 1, .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", .match = 0x400, .match_mask = 0x400, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 10, .minbit = 10, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", .match = 0x402, .match_mask = 0x402, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 1, .minbit = 1, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", .match = 0x404, .match_mask = 0x404, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 2, .minbit = 2, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", .match = 0x408, .match_mask = 0x408, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 3, .minbit = 3, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", .match = 0x410, .match_mask = 0x410, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 4, .minbit = 4, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", .match = 0x420, .match_mask = 0x420, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", .match = 0x440, .match_mask = 0x440, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 6, .minbit = 6, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", .match = 0x480, .match_mask = 0x480, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 7, .minbit = 7, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", .match = 0x500, .match_mask = 0x500, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 8, .minbit = 8, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", .match = 0x0, - .match_mask = 0x3ffff, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match_mask = 0x7ffff, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 18, .minbit = 0, .value = 0x0, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", .match = 0x2800, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x5, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", - .match = 0x34000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x1c000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xd, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", .match = 0x280, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0xa, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", - .match = 0x14000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x8000, + .match_mask = 0x1c006, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x5, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", - .match = 0x20000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x8004, + .match_mask = 0x1c406, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x8, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", .match = 0x1c0, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x7, - .pmaxbit = 53, - .pminbit = 36, - - }, - { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", - .match = 0x18000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, - .minbit = 14, - .value = 0x6, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x8, .match_mask = 0x418, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 4, .minbit = 3, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x28, .match_mask = 0x438, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", .match = 0x10, .match_mask = 0x418, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 4, .minbit = 3, .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", - .match = 0x1c000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0xc000, + .match_mask = 0x1c006, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x7, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", .match = 0x2000, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x4, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", .match = 0x3800, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x7, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", .match = 0x810, .match_mask = 0x3c18, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", - .match = 0x28000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x14000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xa, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", .match = 0x180, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x6, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ .name = "EGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -4079,7 +4420,7 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -4093,7 +4434,7 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ .name = "EGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -4107,7 +4448,7 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", .match = 0x80, .match_mask = 0xc0, @@ -4121,7 +4462,7 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", .match = 0x40, .match_mask = 0xc0, @@ -4135,7 +4476,7 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", .match = 0x2, .match_mask = 0x2, @@ -4149,7 +4490,7 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", .match = 0x8, .match_mask = 0x8, @@ -4163,7 +4504,7 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", .match = 0x20, .match_mask = 0x20, @@ -4177,7 +4518,7 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -4191,7 +4532,7 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -4205,7 +4546,7 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", .match = 0x10, .match_mask = 0x10, @@ -4219,7 +4560,7 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -4233,1383 +4574,1405 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", .match = 0x4000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match_mask = 0x7c006, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", - .match = 0x24000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x10000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x9, - .pmaxbit = 27, + .value = 0x4, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", .match = 0x140, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x5, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", .match = 0x3000, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x6, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x2c000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0xc004, + .match_mask = 0x1c406, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xb, - .pmaxbit = 27, + .value = 0x3, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", .match = 0x200, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x8, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", .match = 0x40, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 0, .minbit = 0, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", - .match = 0x30000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x18000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xc, - .pmaxbit = 27, + .value = 0x6, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", .match = 0x240, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x9, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", .match = 0x30, .match_mask = 0x438, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", - .match = 0x18, - .match_mask = 0x418, - .match_maxbit = 27, + .match = 0x40000, + .match_mask = 0x40000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 4, - .minbit = 3, - .value = 0x3, - .pmaxbit = 27, + .maxbit = 18, + .minbit = 18, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", .match = 0x80, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", .match = 0x1800, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x3, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", - .match = 0x10000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x44000, + .match_mask = 0x5c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x4, - .pmaxbit = 27, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", - .match = 0x38, - .match_mask = 0x438, - .match_maxbit = 27, + .match = 0x40020, + .match_mask = 0x40020, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x4004, + .match_mask = 0x7c406, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x2, - .pmaxbit = 27, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", .match = 0xc0, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x3, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3818, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", - .match = 0x2c0, - .match_mask = 0x7c0, - .match_maxbit = 27, + .match = 0x20000, + .match_mask = 0x20000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 9, - .minbit = 6, - .value = 0xb, - .pmaxbit = 27, + .maxbit = 17, + .minbit = 17, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", - .match = 0xc000, + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0x24000, .match_mask = 0x3c000, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x3, - .pmaxbit = 27, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", .match = 0x100, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x4, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", .match = 0x1000, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", .match = 0x2, .match_mask = 0x406, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 2, .minbit = 1, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", .match = 0x4, .match_mask = 0x406, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 2, .minbit = 1, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", .match = 0x400, .match_mask = 0x400, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 10, .minbit = 10, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", .match = 0x402, .match_mask = 0x402, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 1, .minbit = 1, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", .match = 0x404, .match_mask = 0x404, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 2, .minbit = 2, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", .match = 0x408, .match_mask = 0x408, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 3, .minbit = 3, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", .match = 0x410, .match_mask = 0x410, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 4, .minbit = 4, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", .match = 0x420, .match_mask = 0x420, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", .match = 0x440, .match_mask = 0x440, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 6, .minbit = 6, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", .match = 0x480, .match_mask = 0x480, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 7, .minbit = 7, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", .match = 0x500, .match_mask = 0x500, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 8, .minbit = 8, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", .match = 0x0, - .match_mask = 0x3ffff, - .match_maxbit = 27, + .match_mask = 0x7ffff, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 18, .minbit = 0, .value = 0x0, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", .match = 0x2800, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x5, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", - .match = 0x34000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x1c000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xd, - .pmaxbit = 27, + .value = 0x7, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", .match = 0x280, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0xa, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", - .match = 0x14000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x8000, + .match_mask = 0x1c006, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x5, - .pmaxbit = 27, + .value = 0x2, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", - .match = 0x20000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x8004, + .match_mask = 0x1c406, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x8, - .pmaxbit = 27, + .value = 0x2, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", .match = 0x1c0, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x7, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", - .match = 0x18000, - .match_mask = 0x3c000, - .match_maxbit = 27, - .match_minbit = 10, - .maxbit = 17, - .minbit = 14, - .value = 0x6, - .pmaxbit = 27, - .pminbit = 10, - - }, - { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x8, .match_mask = 0x418, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 4, .minbit = 3, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x28, .match_mask = 0x438, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", .match = 0x10, .match_mask = 0x418, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 4, .minbit = 3, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", - .match = 0x1c000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0xc000, + .match_mask = 0x1c006, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x7, - .pmaxbit = 27, + .value = 0x3, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", .match = 0x2000, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x4, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", .match = 0x3800, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x7, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", .match = 0x810, .match_mask = 0x3c18, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", - .match = 0x28000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x14000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xa, - .pmaxbit = 27, + .value = 0x5, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", .match = 0x180, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x6, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_CNTAG", .match = 0x80, .match_mask = 0xc0, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 7, .minbit = 6, .value = 0x2, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, .zone_minbit = 19, .arc_id_mask = 0xf80000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", .match = 0x20, .match_mask = 0x20, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, .zone_minbit = 19, .arc_id_mask = 0xf80000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ .name = "INGRESS_PKT_INNER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 0, .minbit = 0, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, .zone_minbit = 19, .arc_id_mask = 0xf80000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ .name = "INGRESS_PKT_INNER_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 7, .minbit = 0, .value = 0x0, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, .zone_minbit = 19, .arc_id_mask = 0xf80000, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", .match = 0x10, .match_mask = 0x10, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 4, .minbit = 4, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, .zone_minbit = 19, .arc_id_mask = 0xf80000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 2, .minbit = 2, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, .zone_minbit = 19, .arc_id_mask = 0xf80000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", .match = 0x4000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match_mask = 0x7c006, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", - .match = 0x24000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x10000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x9, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 32, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", .match = 0x140, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x5, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 45, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2, + .num_zone_bmp_words = 55, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", .match = 0x3000, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x6, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 47, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x2c000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0xc004, + .match_mask = 0x1c406, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xb, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 35, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1, + .num_zone_bmp_words = 42, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", .match = 0x200, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x8, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 45, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2, + .num_zone_bmp_words = 55, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", .match = 0x40, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 45, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext, + .num_zone_bmp_words = 55, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 0, .minbit = 0, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 24, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", - .match = 0x30000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x18000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xc, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 37, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1, + .num_zone_bmp_words = 45, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", .match = 0x240, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x9, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 46, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2, + .num_zone_bmp_words = 56, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x4004, + .match_mask = 0x7c406, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1, + .num_zone_bmp_words = 48, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", .match = 0xc0, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x3, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 46, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2, + .num_zone_bmp_words = 56, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3818, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + + }, + { + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", + .match = 0x20000, + .match_mask = 0x20000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 17, + .minbit = 17, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 48, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header, + + }, + { + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 47, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + .num_zone_bmp_words = 48, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", .match = 0x100, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x4, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 29, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", .match = 0x2, .match_mask = 0x406, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 2, .minbit = 1, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 29, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", .match = 0x4, .match_mask = 0x406, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 2, .minbit = 1, .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 47, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", .match = 0x0, - .match_mask = 0x3ffff, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match_mask = 0x7ffff, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 18, .minbit = 0, .value = 0x0, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", .match = 0x2800, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x5, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 47, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", - .match = 0x34000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x1c000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xd, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 42, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1, + .num_zone_bmp_words = 51, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", .match = 0x280, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0xa, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 46, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", - .match = 0x14000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x8000, + .match_mask = 0x1c006, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x5, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 24, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", - .match = 0x20000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x8004, + .match_mask = 0x1c406, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x8, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 44, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1, + .num_zone_bmp_words = 54, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", .match = 0x1c0, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x7, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 47, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x8, .match_mask = 0x418, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 4, .minbit = 3, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 47, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x28, .match_mask = 0x438, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 47, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", .match = 0x10, .match_mask = 0x418, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 4, .minbit = 3, .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 47, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x1c000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0xc000, + .match_mask = 0x1c006, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x7, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 24, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2000, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x4, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 47, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", .match = 0x3800, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x7, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 47, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", - .match = 0x28000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x14000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xa, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 47, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", .match = 0x180, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x6, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 24, .arc_id_mask = 0x7ff000000, - .num_zone_bmp_words = 47, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_CNTAG", .match = 0x80, .match_mask = 0xc0, @@ -5623,11 +5986,11 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0xfc, .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */ .name = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", .match = 0x40, .match_mask = 0xc0, @@ -5641,11 +6004,11 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0xfc, .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", .match = 0x2, .match_mask = 0x2, @@ -5659,11 +6022,11 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0xfc, .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", .match = 0x8, .match_mask = 0x8, @@ -5677,11 +6040,11 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0xfc, .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", .match = 0x20, .match_mask = 0x20, @@ -5695,11 +6058,11 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0xfc, .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ .name = "INGRESS_PKT_OUTER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -5713,11 +6076,11 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0xfc, .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -5733,7 +6096,7 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", .match = 0x10, .match_mask = 0x10, @@ -5747,11 +6110,11 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0xfc, .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -5765,927 +6128,909 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0xfc, .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", .match = 0x4000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match_mask = 0x7c006, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", - .match = 0x24000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x10000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x9, - .pmaxbit = 27, + .value = 0x4, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 13, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, + .num_zone_bmp_words = 14, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", .match = 0x140, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x5, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 34, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", .match = 0x3000, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x6, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x2c000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0xc004, + .match_mask = 0x1c406, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xb, - .pmaxbit = 27, + .value = 0x3, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 17, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, + .num_zone_bmp_words = 18, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", .match = 0x200, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x8, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 35, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", .match = 0x40, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 35, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 0, .minbit = 0, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", - .match = 0x30000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x18000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xc, - .pmaxbit = 27, + .value = 0x6, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 21, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", .match = 0x240, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x9, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 35, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", .match = 0x30, .match_mask = 0x438, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 37, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", - .match = 0x18, - .match_mask = 0x418, - .match_maxbit = 27, + .match = 0x40000, + .match_mask = 0x40000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 4, - .minbit = 3, - .value = 0x3, - .pmaxbit = 27, + .maxbit = 18, + .minbit = 18, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 21, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, + .num_zone_bmp_words = 22, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", .match = 0x80, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 21, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, + .num_zone_bmp_words = 22, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", .match = 0x1800, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x3, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 21, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, + .num_zone_bmp_words = 22, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", - .match = 0x10000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x44000, + .match_mask = 0x5c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x4, - .pmaxbit = 27, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 21, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, + .num_zone_bmp_words = 22, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", - .match = 0x38, - .match_mask = 0x438, - .match_maxbit = 27, + .match = 0x40020, + .match_mask = 0x40020, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 21, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, + .num_zone_bmp_words = 22, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x4004, + .match_mask = 0x7c406, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x2, - .pmaxbit = 27, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 25, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, + .num_zone_bmp_words = 26, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", .match = 0xc0, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x3, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 36, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3818, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 37, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", - .match = 0x2c0, - .match_mask = 0x7c0, - .match_maxbit = 27, + .match = 0x20000, + .match_mask = 0x20000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 9, - .minbit = 6, - .value = 0xb, - .pmaxbit = 27, + .maxbit = 17, + .minbit = 17, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 25, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, + .num_zone_bmp_words = 26, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", - .match = 0xc000, + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0x24000, .match_mask = 0x3c000, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x3, - .pmaxbit = 27, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 25, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata, + .num_zone_bmp_words = 26, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", .match = 0x100, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x4, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 10, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", .match = 0x1000, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 37, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", .match = 0x2, .match_mask = 0x406, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 2, .minbit = 1, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 10, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", .match = 0x4, .match_mask = 0x406, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 2, .minbit = 1, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 38, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", .match = 0x400, .match_mask = 0x400, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 10, .minbit = 10, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", .match = 0x402, .match_mask = 0x402, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 1, .minbit = 1, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", .match = 0x404, .match_mask = 0x404, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 2, .minbit = 2, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", .match = 0x408, .match_mask = 0x408, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 3, .minbit = 3, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", .match = 0x410, .match_mask = 0x410, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 4, .minbit = 4, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", .match = 0x420, .match_mask = 0x420, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", .match = 0x440, .match_mask = 0x440, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 6, .minbit = 6, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 38, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", .match = 0x480, .match_mask = 0x480, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 7, .minbit = 7, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", .match = 0x500, .match_mask = 0x500, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 8, .minbit = 8, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", .match = 0x0, - .match_mask = 0x3ffff, - .match_maxbit = 27, + .match_mask = 0x7ffff, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 18, .minbit = 0, .value = 0x0, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", .match = 0x2800, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x5, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", - .match = 0x34000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x1c000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xd, - .pmaxbit = 27, + .value = 0x7, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 29, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1, + .num_zone_bmp_words = 30, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", .match = 0x280, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0xa, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 36, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", - .match = 0x14000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x8000, + .match_mask = 0x1c006, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x5, - .pmaxbit = 27, + .value = 0x2, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", - .match = 0x20000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x8004, + .match_mask = 0x1c406, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x8, - .pmaxbit = 27, + .value = 0x2, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 33, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, + .num_zone_bmp_words = 34, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", .match = 0x1c0, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x7, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 37, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, - - }, - { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", - .match = 0x18000, - .match_mask = 0x3c000, - .match_maxbit = 27, - .match_minbit = 10, - .maxbit = 17, - .minbit = 14, - .value = 0x6, - .pmaxbit = 27, - .pminbit = 10, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 33, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x8, .match_mask = 0x418, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 4, .minbit = 3, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 37, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x28, .match_mask = 0x438, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 37, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", .match = 0x10, .match_mask = 0x418, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 4, .minbit = 3, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 38, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x1c000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0xc000, + .match_mask = 0x1c006, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x7, - .pmaxbit = 27, + .value = 0x3, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2000, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x4, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 38, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", .match = 0x3800, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x7, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 37, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", .match = 0x810, .match_mask = 0x3c18, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 38, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", - .match = 0x28000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x14000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xa, - .pmaxbit = 27, + .value = 0x5, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 38, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", .match = 0x180, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x6, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 8, .arc_id_mask = 0x7ff00, .num_zone_bmp_words = 38, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ .name = "INGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -6699,11 +7044,11 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA .zone_minbit = 0, .arc_id_mask = 0x3, .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -6717,11 +7062,11 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA .zone_minbit = 0, .arc_id_mask = 0x3, .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, }, { - /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ .name = "INGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -6738,23 +7083,23 @@ bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MA }, }; -static bcmpkt_rxpmd_match_id_db_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info = { - .num_entries = 223, - .db = bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db +static bcmpkt_rxpmd_match_id_db_info_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_db_info = { + .num_entries = 222, + .db = bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_db }; -bcmpkt_rxpmd_match_id_db_info_t * bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info_get(void) { - return &bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info; +bcmpkt_rxpmd_match_id_db_info_t * bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_db_info_get(void) { + return &bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_db_info; } -static shr_enum_map_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +static shr_enum_map_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_map[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT }; -static bcmpkt_rxpmd_match_id_map_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info = { - .num_entries = 223, - .map = bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map +static bcmpkt_rxpmd_match_id_map_info_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_map_info = { + .num_entries = 222, + .map = bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_map }; -bcmpkt_rxpmd_match_id_map_info_t * bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info_get(void) { - return &bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info; +bcmpkt_rxpmd_match_id_map_info_t * bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_map_info_get(void) { + return &bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_map_info; } diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_pkt_flexhdr.c similarity index 58% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_pkt_flexhdr.c index d77e5612470..e39a952cf40 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_pkt_flexhdr.c @@ -3,7 +3,7 @@ * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser * from the NPL output file(s) map.yml - * for device bcm78800_a0 and variant dna_6_5_30_3_1. + * for device bcm56690_a0 and variant dna_6_5_31_7_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -30,387 +30,322 @@ #include #include #include -#include -#include -#include -#include +#include +#include +#include +#include #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -static void bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +static void bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) { uint32_t *reason = data + 0; if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); } if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); } if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); } if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS); } if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); } if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); } if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); } if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); } if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); } if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); } if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); } if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); } if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); } if (reason[13] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); } if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); } if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP); } if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP); } if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); } if (reason[13] & (0x1 << 20)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); } if (reason[13] & (0x1 << 21)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP); } if (reason[13] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); } if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); } if (reason[13] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); } if (reason[13] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); } if (reason[13] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); } if (reason[13] & (0x1 << 27)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); } if (reason[13] & (0x1 << 28)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); } if (reason[13] & (0x1 << 29)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[13] & (0x1 << 30)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[13] & (0x1 << 31)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); } if (reason[12] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); } if (reason[12] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); } if (reason[12] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); } if (reason[12] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); } if (reason[12] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); } if (reason[12] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); } if (reason[12] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); } if (reason[12] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); } if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT); } if (reason[12] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); } if (reason[12] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); } if (reason[12] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SRV6); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SRV6); } if (reason[12] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); } if (reason[12] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); } if (reason[12] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP_EPIPE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); } if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); } } -static void bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +static void bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) { uint32_t *reason = data + 0; reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { reason[13] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { reason[13] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { reason[13] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) { reason[13] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { reason[13] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { reason[13] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { reason[13] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { reason[13] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { reason[13] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { reason[13] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { reason[13] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { reason[13] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { reason[13] |= (0x1 << 14); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { reason[13] |= (0x1 << 15); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { reason[13] |= (0x1 << 16); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { reason[13] |= (0x1 << 17); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { reason[13] |= (0x1 << 18); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { reason[13] |= (0x1 << 19); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { reason[13] |= (0x1 << 20); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { reason[13] |= (0x1 << 21); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { reason[13] |= (0x1 << 22); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { reason[13] |= (0x1 << 23); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { reason[13] |= (0x1 << 24); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { reason[13] |= (0x1 << 25); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { reason[13] |= (0x1 << 26); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { reason[13] |= (0x1 << 27); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { reason[13] |= (0x1 << 28); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[13] |= (0x1 << 29); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[13] |= (0x1 << 30); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { reason[13] |= (0x1 << 31); } reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { reason[12] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { reason[12] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { reason[12] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { reason[12] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { reason[12] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { reason[12] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { reason[12] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { reason[12] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) { reason[12] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { reason[12] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { reason[12] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SRV6)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SRV6)) { reason[12] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { reason[12] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { reason[12] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP_EPIPE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { reason[12] |= (0x1 << 14); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { reason[12] |= (0x1 << 15); } } -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_data[] = { - { - .name = "ALLOW_NAT_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ALLOW_NAT_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 416, 419 }, /* Profile 2. */ - { 408, 411 }, /* Profile 3. */ - { 416, 419 }, /* Profile 4. */ - { 416, 419 }, /* Profile 5. */ - { 416, 419 }, /* Profile 6. */ - { 416, 419 }, /* Profile 7. */ - { 408, 411 }, /* Profile 8. */ - { 416, 419 }, /* Profile 9. */ - { 416, 419 }, /* Profile 10. */ - { 416, 419 }, /* Profile 11. */ - { 412, 415 }, /* Profile 12. */ - { 404, 407 }, /* Profile 13. */ - { 412, 415 }, /* Profile 14. */ - { 412, 415 }, /* Profile 15. */ - { 416, 419 }, /* Profile 16. */ - { 408, 411 }, /* Profile 17. */ - { 416, 419 }, /* Profile 18. */ - { 416, 419 }, /* Profile 19. */ - { 416, 419 }, /* Profile 20. */ - { 416, 419 }, /* Profile 21. */ - { 408, 411 }, /* Profile 22. */ - { 416, 419 }, /* Profile 23. */ - { 416, 419 }, /* Profile 24. */ - { 416, 419 }, /* Profile 25. */ - { 412, 415 }, /* Profile 26. */ - { 404, 407 }, /* Profile 27. */ - { 412, 415 }, /* Profile 28. */ - { 412, 415 }, /* Profile 29. */ - { 416, 419 }, /* Profile 30. */ - { 408, 411 }, /* Profile 31. */ - { 416, 419 }, /* Profile 32. */ - { 416, 419 }, /* Profile 33. */ - { 416, 419 }, /* Profile 34. */ - { 416, 419 }, /* Profile 35. */ - { 408, 411 }, /* Profile 36. */ - { 416, 419 }, /* Profile 37. */ - { 416, 419 }, /* Profile 38. */ - { 416, 419 }, /* Profile 39. */ - { 412, 415 }, /* Profile 40. */ - { 404, 407 }, /* Profile 41. */ - { 412, 415 }, /* Profile 42. */ - { 412, 415 }, /* Profile 43. */ - { 416, 419 }, /* Profile 44. */ - { 408, 411 }, /* Profile 45. */ - { 416, 419 }, /* Profile 46. */ - { 416, 419 }, /* Profile 47. */ - { 416, 419 }, /* Profile 48. */ - { 416, 419 }, /* Profile 49. */ - { 408, 411 }, /* Profile 50. */ - { 416, 419 }, /* Profile 51. */ - { 416, 419 }, /* Profile 52. */ - { 416, 419 }, /* Profile 53. */ - { 412, 415 }, /* Profile 54. */ - { 404, 407 }, /* Profile 55. */ - { 412, 415 }, /* Profile 56. */ - { 412, 415 }, /* Profile 57. */ - }, - .profile_cnt = 58, - }, +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_field_data[] = { { .name = "DLB_ECMP_DESTINATION_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -422,141 +357,93 @@ static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_ { -1, -1 }, /* Profile 7. */ { -1, -1 }, /* Profile 8. */ { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { 208, 223 }, /* Profile 16. */ - { 192, 207 }, /* Profile 17. */ - { 208, 223 }, /* Profile 18. */ - { 192, 207 }, /* Profile 19. */ - { 192, 207 }, /* Profile 20. */ - { 208, 223 }, /* Profile 21. */ - { 192, 207 }, /* Profile 22. */ - { 208, 223 }, /* Profile 23. */ - { 192, 207 }, /* Profile 24. */ - { 192, 207 }, /* Profile 25. */ - { 208, 223 }, /* Profile 26. */ - { 192, 207 }, /* Profile 27. */ - { 208, 223 }, /* Profile 28. */ - { 192, 207 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { 224, 239 }, /* Profile 44. */ - { 208, 223 }, /* Profile 45. */ - { 224, 239 }, /* Profile 46. */ - { 208, 223 }, /* Profile 47. */ - { 208, 223 }, /* Profile 48. */ - { 224, 239 }, /* Profile 49. */ - { 208, 223 }, /* Profile 50. */ - { 224, 239 }, /* Profile 51. */ - { 208, 223 }, /* Profile 52. */ - { 208, 223 }, /* Profile 53. */ - { 224, 239 }, /* Profile 54. */ - { 208, 223 }, /* Profile 55. */ - { 224, 239 }, /* Profile 56. */ - { 208, 223 }, /* Profile 57. */ + { 320, 335 }, /* Profile 10. */ + { 320, 335 }, /* Profile 11. */ + { 320, 335 }, /* Profile 12. */ + { 320, 335 }, /* Profile 13. */ + { 320, 335 }, /* Profile 14. */ + { 320, 335 }, /* Profile 15. */ + { 320, 335 }, /* Profile 16. */ + { 320, 335 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { 320, 335 }, /* Profile 26. */ + { 320, 335 }, /* Profile 27. */ + { 320, 335 }, /* Profile 28. */ + { 320, 335 }, /* Profile 29. */ + { 320, 335 }, /* Profile 30. */ + { 320, 335 }, /* Profile 31. */ + { 320, 335 }, /* Profile 32. */ + { 320, 335 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "DNAT_CTRL_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ + { 368, 371 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ - { 372, 375 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ { -1, -1 }, /* Profile 6. */ { -1, -1 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { 372, 375 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ + { 368, 371 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 368, 371 }, /* Profile 10. */ { -1, -1 }, /* Profile 11. */ { -1, -1 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { 368, 371 }, /* Profile 14. */ + { 368, 371 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ { -1, -1 }, /* Profile 15. */ - { -1, -1 }, /* Profile 16. */ + { 368, 371 }, /* Profile 16. */ { -1, -1 }, /* Profile 17. */ - { 372, 375 }, /* Profile 18. */ + { 368, 371 }, /* Profile 18. */ { -1, -1 }, /* Profile 19. */ { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ + { 368, 371 }, /* Profile 21. */ { -1, -1 }, /* Profile 22. */ - { 372, 375 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 23. */ + { 368, 371 }, /* Profile 24. */ { -1, -1 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ + { 368, 371 }, /* Profile 26. */ { -1, -1 }, /* Profile 27. */ - { 368, 371 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 28. */ + { 368, 371 }, /* Profile 29. */ { -1, -1 }, /* Profile 30. */ { -1, -1 }, /* Profile 31. */ - { 372, 375 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { 372, 375 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { 368, 371 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { -1, -1 }, /* Profile 44. */ - { -1, -1 }, /* Profile 45. */ - { 372, 375 }, /* Profile 46. */ - { -1, -1 }, /* Profile 47. */ - { -1, -1 }, /* Profile 48. */ - { -1, -1 }, /* Profile 49. */ - { -1, -1 }, /* Profile 50. */ - { 372, 375 }, /* Profile 51. */ - { -1, -1 }, /* Profile 52. */ - { -1, -1 }, /* Profile 53. */ - { -1, -1 }, /* Profile 54. */ - { -1, -1 }, /* Profile 55. */ - { 368, 371 }, /* Profile 56. */ + { 368, 371 }, /* Profile 32. */ }, - .profile_cnt = 57, + .profile_cnt = 33, }, { .name = "DROP_CODE_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 48, 63 }, /* Profile 2. */ { 48, 63 }, /* Profile 3. */ { 48, 63 }, /* Profile 4. */ - { 48, 63 }, /* Profile 5. */ - { 48, 63 }, /* Profile 6. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ { -1, -1 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ + { 48, 63 }, /* Profile 10. */ + { 48, 63 }, /* Profile 11. */ { 48, 63 }, /* Profile 12. */ - { 48, 63 }, /* Profile 13. */ - { 48, 63 }, /* Profile 14. */ - { 48, 63 }, /* Profile 15. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ { 48, 63 }, /* Profile 16. */ { 48, 63 }, /* Profile 17. */ { 48, 63 }, /* Profile 18. */ @@ -565,374 +452,236 @@ static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_ { -1, -1 }, /* Profile 21. */ { -1, -1 }, /* Profile 22. */ { -1, -1 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ + { 48, 63 }, /* Profile 24. */ + { 48, 63 }, /* Profile 25. */ { 48, 63 }, /* Profile 26. */ { 48, 63 }, /* Profile 27. */ { 48, 63 }, /* Profile 28. */ - { 48, 63 }, /* Profile 29. */ - { 48, 63 }, /* Profile 30. */ - { 48, 63 }, /* Profile 31. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ { 48, 63 }, /* Profile 32. */ { 48, 63 }, /* Profile 33. */ - { 48, 63 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { 48, 63 }, /* Profile 40. */ - { 48, 63 }, /* Profile 41. */ - { 48, 63 }, /* Profile 42. */ - { 48, 63 }, /* Profile 43. */ - { 48, 63 }, /* Profile 44. */ - { 48, 63 }, /* Profile 45. */ - { 48, 63 }, /* Profile 46. */ - { 48, 63 }, /* Profile 47. */ - { 48, 63 }, /* Profile 48. */ - { -1, -1 }, /* Profile 49. */ - { -1, -1 }, /* Profile 50. */ - { -1, -1 }, /* Profile 51. */ - { -1, -1 }, /* Profile 52. */ - { -1, -1 }, /* Profile 53. */ - { 48, 63 }, /* Profile 54. */ - { 48, 63 }, /* Profile 55. */ - { 48, 63 }, /* Profile 56. */ - { 48, 63 }, /* Profile 57. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "DVP_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DVP_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 176, 191 }, /* Profile 2. */ - { 176, 191 }, /* Profile 3. */ - { 176, 191 }, /* Profile 4. */ + { 208, 223 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ { 176, 191 }, /* Profile 5. */ - { 176, 191 }, /* Profile 6. */ - { 176, 191 }, /* Profile 7. */ + { 208, 223 }, /* Profile 6. */ + { 208, 223 }, /* Profile 7. */ { 176, 191 }, /* Profile 8. */ - { 176, 191 }, /* Profile 9. */ + { 208, 223 }, /* Profile 9. */ { 176, 191 }, /* Profile 10. */ - { 176, 191 }, /* Profile 11. */ - { 176, 191 }, /* Profile 12. */ + { 208, 223 }, /* Profile 11. */ + { 208, 223 }, /* Profile 12. */ { 176, 191 }, /* Profile 13. */ - { 176, 191 }, /* Profile 14. */ - { 176, 191 }, /* Profile 15. */ + { 208, 223 }, /* Profile 14. */ + { 208, 223 }, /* Profile 15. */ { 176, 191 }, /* Profile 16. */ - { 176, 191 }, /* Profile 17. */ - { 176, 191 }, /* Profile 18. */ - { 176, 191 }, /* Profile 19. */ - { 176, 191 }, /* Profile 20. */ - { 176, 191 }, /* Profile 21. */ - { 176, 191 }, /* Profile 22. */ - { 176, 191 }, /* Profile 23. */ - { 176, 191 }, /* Profile 24. */ - { 176, 191 }, /* Profile 25. */ - { 176, 191 }, /* Profile 26. */ - { 176, 191 }, /* Profile 27. */ - { 176, 191 }, /* Profile 28. */ - { 176, 191 }, /* Profile 29. */ - { 192, 207 }, /* Profile 30. */ - { 192, 207 }, /* Profile 31. */ + { 208, 223 }, /* Profile 17. */ + { 192, 207 }, /* Profile 18. */ + { 224, 239 }, /* Profile 19. */ + { 224, 239 }, /* Profile 20. */ + { 192, 207 }, /* Profile 21. */ + { 224, 239 }, /* Profile 22. */ + { 224, 239 }, /* Profile 23. */ + { 192, 207 }, /* Profile 24. */ + { 224, 239 }, /* Profile 25. */ + { 192, 207 }, /* Profile 26. */ + { 224, 239 }, /* Profile 27. */ + { 224, 239 }, /* Profile 28. */ + { 192, 207 }, /* Profile 29. */ + { 224, 239 }, /* Profile 30. */ + { 224, 239 }, /* Profile 31. */ { 192, 207 }, /* Profile 32. */ - { 192, 207 }, /* Profile 33. */ - { 192, 207 }, /* Profile 34. */ - { 192, 207 }, /* Profile 35. */ - { 192, 207 }, /* Profile 36. */ - { 192, 207 }, /* Profile 37. */ - { 192, 207 }, /* Profile 38. */ - { 192, 207 }, /* Profile 39. */ - { 192, 207 }, /* Profile 40. */ - { 192, 207 }, /* Profile 41. */ - { 192, 207 }, /* Profile 42. */ - { 192, 207 }, /* Profile 43. */ - { 192, 207 }, /* Profile 44. */ - { 192, 207 }, /* Profile 45. */ - { 192, 207 }, /* Profile 46. */ - { 192, 207 }, /* Profile 47. */ - { 192, 207 }, /* Profile 48. */ - { 192, 207 }, /* Profile 49. */ - { 192, 207 }, /* Profile 50. */ - { 192, 207 }, /* Profile 51. */ - { 192, 207 }, /* Profile 52. */ - { 192, 207 }, /* Profile 53. */ - { 192, 207 }, /* Profile 54. */ - { 192, 207 }, /* Profile 55. */ - { 192, 207 }, /* Profile 56. */ - { 192, 207 }, /* Profile 57. */ + { 224, 239 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "EFFECTIVE_TTL_AND_SNAT_CTRL_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 144, 159 }, /* Profile 2. */ - { 144, 159 }, /* Profile 3. */ - { 144, 159 }, /* Profile 4. */ + { 176, 191 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ { 144, 159 }, /* Profile 5. */ - { 144, 159 }, /* Profile 6. */ - { 144, 159 }, /* Profile 7. */ + { 176, 191 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ { 144, 159 }, /* Profile 8. */ - { 144, 159 }, /* Profile 9. */ + { 176, 191 }, /* Profile 9. */ { 144, 159 }, /* Profile 10. */ - { 144, 159 }, /* Profile 11. */ - { 144, 159 }, /* Profile 12. */ + { 176, 191 }, /* Profile 11. */ + { 176, 191 }, /* Profile 12. */ { 144, 159 }, /* Profile 13. */ - { 144, 159 }, /* Profile 14. */ - { 144, 159 }, /* Profile 15. */ + { 176, 191 }, /* Profile 14. */ + { 176, 191 }, /* Profile 15. */ { 144, 159 }, /* Profile 16. */ - { 144, 159 }, /* Profile 17. */ - { 144, 159 }, /* Profile 18. */ - { 144, 159 }, /* Profile 19. */ - { 144, 159 }, /* Profile 20. */ - { 144, 159 }, /* Profile 21. */ - { 144, 159 }, /* Profile 22. */ - { 144, 159 }, /* Profile 23. */ - { 144, 159 }, /* Profile 24. */ - { 144, 159 }, /* Profile 25. */ - { 144, 159 }, /* Profile 26. */ - { 144, 159 }, /* Profile 27. */ - { 144, 159 }, /* Profile 28. */ - { 144, 159 }, /* Profile 29. */ - { 144, 159 }, /* Profile 30. */ - { 144, 159 }, /* Profile 31. */ - { 144, 159 }, /* Profile 32. */ - { 144, 159 }, /* Profile 33. */ - { 144, 159 }, /* Profile 34. */ - { 144, 159 }, /* Profile 35. */ - { 144, 159 }, /* Profile 36. */ - { 144, 159 }, /* Profile 37. */ - { 144, 159 }, /* Profile 38. */ - { 144, 159 }, /* Profile 39. */ - { 144, 159 }, /* Profile 40. */ - { 144, 159 }, /* Profile 41. */ - { 144, 159 }, /* Profile 42. */ - { 144, 159 }, /* Profile 43. */ - { 144, 159 }, /* Profile 44. */ - { 144, 159 }, /* Profile 45. */ - { 144, 159 }, /* Profile 46. */ - { 144, 159 }, /* Profile 47. */ - { 144, 159 }, /* Profile 48. */ - { 144, 159 }, /* Profile 49. */ - { 144, 159 }, /* Profile 50. */ - { 144, 159 }, /* Profile 51. */ - { 144, 159 }, /* Profile 52. */ - { 144, 159 }, /* Profile 53. */ - { 144, 159 }, /* Profile 54. */ - { 144, 159 }, /* Profile 55. */ - { 144, 159 }, /* Profile 56. */ - { 144, 159 }, /* Profile 57. */ + { 176, 191 }, /* Profile 17. */ + { 160, 175 }, /* Profile 18. */ + { 192, 207 }, /* Profile 19. */ + { 192, 207 }, /* Profile 20. */ + { 160, 175 }, /* Profile 21. */ + { 192, 207 }, /* Profile 22. */ + { 192, 207 }, /* Profile 23. */ + { 160, 175 }, /* Profile 24. */ + { 192, 207 }, /* Profile 25. */ + { 160, 175 }, /* Profile 26. */ + { 192, 207 }, /* Profile 27. */ + { 192, 207 }, /* Profile 28. */ + { 160, 175 }, /* Profile 29. */ + { 192, 207 }, /* Profile 30. */ + { 192, 207 }, /* Profile 31. */ + { 160, 175 }, /* Profile 32. */ + { 192, 207 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 208, 223 }, /* Profile 2. */ - { 192, 207 }, /* Profile 3. */ - { 208, 223 }, /* Profile 4. */ - { 192, 207 }, /* Profile 5. */ - { 192, 207 }, /* Profile 6. */ - { 208, 223 }, /* Profile 7. */ - { 192, 207 }, /* Profile 8. */ - { 208, 223 }, /* Profile 9. */ - { 192, 207 }, /* Profile 10. */ - { 192, 207 }, /* Profile 11. */ - { 208, 223 }, /* Profile 12. */ - { 192, 207 }, /* Profile 13. */ - { 208, 223 }, /* Profile 14. */ - { 192, 207 }, /* Profile 15. */ + { 320, 335 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + { 320, 335 }, /* Profile 6. */ + { 320, 335 }, /* Profile 7. */ + { 320, 335 }, /* Profile 8. */ + { 320, 335 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ { -1, -1 }, /* Profile 16. */ { -1, -1 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { 224, 239 }, /* Profile 30. */ - { 208, 223 }, /* Profile 31. */ - { 224, 239 }, /* Profile 32. */ - { 208, 223 }, /* Profile 33. */ - { 208, 223 }, /* Profile 34. */ - { 224, 239 }, /* Profile 35. */ - { 208, 223 }, /* Profile 36. */ - { 224, 239 }, /* Profile 37. */ - { 208, 223 }, /* Profile 38. */ - { 208, 223 }, /* Profile 39. */ - { 224, 239 }, /* Profile 40. */ - { 208, 223 }, /* Profile 41. */ - { 224, 239 }, /* Profile 42. */ - { 208, 223 }, /* Profile 43. */ + { 320, 335 }, /* Profile 18. */ + { 320, 335 }, /* Profile 19. */ + { 320, 335 }, /* Profile 20. */ + { 320, 335 }, /* Profile 21. */ + { 320, 335 }, /* Profile 22. */ + { 320, 335 }, /* Profile 23. */ + { 320, 335 }, /* Profile 24. */ + { 320, 335 }, /* Profile 25. */ }, - .profile_cnt = 44, + .profile_cnt = 26, }, { .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 388, 391 }, /* Profile 2. */ + { 384, 387 }, /* Profile 2. */ { 380, 383 }, /* Profile 3. */ - { 392, 395 }, /* Profile 4. */ - { 388, 391 }, /* Profile 5. */ - { 388, 391 }, /* Profile 6. */ - { 388, 391 }, /* Profile 7. */ - { 380, 383 }, /* Profile 8. */ - { 392, 395 }, /* Profile 9. */ - { 388, 391 }, /* Profile 10. */ - { 388, 391 }, /* Profile 11. */ - { 384, 387 }, /* Profile 12. */ - { 376, 379 }, /* Profile 13. */ - { 388, 391 }, /* Profile 14. */ - { 384, 387 }, /* Profile 15. */ - { 388, 391 }, /* Profile 16. */ + { 380, 383 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 380, 383 }, /* Profile 6. */ + { 380, 383 }, /* Profile 7. */ + { 384, 387 }, /* Profile 8. */ + { 380, 383 }, /* Profile 9. */ + { 384, 387 }, /* Profile 10. */ + { 380, 383 }, /* Profile 11. */ + { 380, 383 }, /* Profile 12. */ + { 384, 387 }, /* Profile 13. */ + { 380, 383 }, /* Profile 14. */ + { 380, 383 }, /* Profile 15. */ + { 384, 387 }, /* Profile 16. */ { 380, 383 }, /* Profile 17. */ - { 392, 395 }, /* Profile 18. */ - { 388, 391 }, /* Profile 19. */ - { 388, 391 }, /* Profile 20. */ - { 388, 391 }, /* Profile 21. */ + { 384, 387 }, /* Profile 18. */ + { 380, 383 }, /* Profile 19. */ + { 380, 383 }, /* Profile 20. */ + { 384, 387 }, /* Profile 21. */ { 380, 383 }, /* Profile 22. */ - { 392, 395 }, /* Profile 23. */ - { 388, 391 }, /* Profile 24. */ - { 388, 391 }, /* Profile 25. */ + { 380, 383 }, /* Profile 23. */ + { 384, 387 }, /* Profile 24. */ + { 380, 383 }, /* Profile 25. */ { 384, 387 }, /* Profile 26. */ - { 376, 379 }, /* Profile 27. */ - { 388, 391 }, /* Profile 28. */ + { 380, 383 }, /* Profile 27. */ + { 380, 383 }, /* Profile 28. */ { 384, 387 }, /* Profile 29. */ - { 388, 391 }, /* Profile 30. */ + { 380, 383 }, /* Profile 30. */ { 380, 383 }, /* Profile 31. */ - { 392, 395 }, /* Profile 32. */ - { 388, 391 }, /* Profile 33. */ - { 388, 391 }, /* Profile 34. */ - { 388, 391 }, /* Profile 35. */ - { 380, 383 }, /* Profile 36. */ - { 392, 395 }, /* Profile 37. */ - { 388, 391 }, /* Profile 38. */ - { 388, 391 }, /* Profile 39. */ - { 384, 387 }, /* Profile 40. */ - { 376, 379 }, /* Profile 41. */ - { 388, 391 }, /* Profile 42. */ - { 384, 387 }, /* Profile 43. */ - { 388, 391 }, /* Profile 44. */ - { 380, 383 }, /* Profile 45. */ - { 392, 395 }, /* Profile 46. */ - { 388, 391 }, /* Profile 47. */ - { 388, 391 }, /* Profile 48. */ - { 388, 391 }, /* Profile 49. */ - { 380, 383 }, /* Profile 50. */ - { 392, 395 }, /* Profile 51. */ - { 388, 391 }, /* Profile 52. */ - { 388, 391 }, /* Profile 53. */ - { 384, 387 }, /* Profile 54. */ - { 376, 379 }, /* Profile 55. */ - { 388, 391 }, /* Profile 56. */ - { 384, 387 }, /* Profile 57. */ + { 384, 387 }, /* Profile 32. */ + { 380, 383 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 128, 143 }, /* Profile 2. */ - { 128, 143 }, /* Profile 3. */ - { 128, 143 }, /* Profile 4. */ - { 128, 143 }, /* Profile 5. */ - { 128, 143 }, /* Profile 6. */ - { 128, 143 }, /* Profile 7. */ - { 128, 143 }, /* Profile 8. */ - { 128, 143 }, /* Profile 9. */ - { 128, 143 }, /* Profile 10. */ - { 128, 143 }, /* Profile 11. */ - { 128, 143 }, /* Profile 12. */ - { 128, 143 }, /* Profile 13. */ - { 128, 143 }, /* Profile 14. */ - { 128, 143 }, /* Profile 15. */ - { 128, 143 }, /* Profile 16. */ - { 128, 143 }, /* Profile 17. */ - { 128, 143 }, /* Profile 18. */ - { 128, 143 }, /* Profile 19. */ - { 128, 143 }, /* Profile 20. */ - { 128, 143 }, /* Profile 21. */ - { 128, 143 }, /* Profile 22. */ - { 128, 143 }, /* Profile 23. */ - { 128, 143 }, /* Profile 24. */ - { 128, 143 }, /* Profile 25. */ - { 128, 143 }, /* Profile 26. */ - { 128, 143 }, /* Profile 27. */ - { 128, 143 }, /* Profile 28. */ - { 128, 143 }, /* Profile 29. */ - { 128, 143 }, /* Profile 30. */ - { 128, 143 }, /* Profile 31. */ - { 128, 143 }, /* Profile 32. */ - { 128, 143 }, /* Profile 33. */ - { 128, 143 }, /* Profile 34. */ - { 128, 143 }, /* Profile 35. */ - { 128, 143 }, /* Profile 36. */ - { 128, 143 }, /* Profile 37. */ - { 128, 143 }, /* Profile 38. */ - { 128, 143 }, /* Profile 39. */ - { 128, 143 }, /* Profile 40. */ - { 128, 143 }, /* Profile 41. */ - { 128, 143 }, /* Profile 42. */ - { 128, 143 }, /* Profile 43. */ - { 128, 143 }, /* Profile 44. */ - { 128, 143 }, /* Profile 45. */ - { 128, 143 }, /* Profile 46. */ - { 128, 143 }, /* Profile 47. */ - { 128, 143 }, /* Profile 48. */ - { 128, 143 }, /* Profile 49. */ - { 128, 143 }, /* Profile 50. */ - { 128, 143 }, /* Profile 51. */ - { 128, 143 }, /* Profile 52. */ - { 128, 143 }, /* Profile 53. */ - { 128, 143 }, /* Profile 54. */ - { 128, 143 }, /* Profile 55. */ - { 128, 143 }, /* Profile 56. */ - { 128, 143 }, /* Profile 57. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ + { 96, 111 }, /* Profile 10. */ + { 96, 111 }, /* Profile 11. */ + { 96, 111 }, /* Profile 12. */ + { 96, 111 }, /* Profile 13. */ + { 96, 111 }, /* Profile 14. */ + { 96, 111 }, /* Profile 15. */ + { 96, 111 }, /* Profile 16. */ + { 96, 111 }, /* Profile 17. */ + { 96, 111 }, /* Profile 18. */ + { 96, 111 }, /* Profile 19. */ + { 96, 111 }, /* Profile 20. */ + { 96, 111 }, /* Profile 21. */ + { 96, 111 }, /* Profile 22. */ + { 96, 111 }, /* Profile 23. */ + { 96, 111 }, /* Profile 24. */ + { 96, 111 }, /* Profile 25. */ + { 96, 111 }, /* Profile 26. */ + { 96, 111 }, /* Profile 27. */ + { 96, 111 }, /* Profile 28. */ + { 96, 111 }, /* Profile 29. */ + { 96, 111 }, /* Profile 30. */ + { 96, 111 }, /* Profile 31. */ + { 96, 111 }, /* Profile 32. */ + { 96, 111 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ + { 48, 63 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ { 48, 63 }, /* Profile 7. */ - { 48, 63 }, /* Profile 8. */ - { 48, 63 }, /* Profile 9. */ - { 48, 63 }, /* Profile 10. */ - { 48, 63 }, /* Profile 11. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ { -1, -1 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ + { 48, 63 }, /* Profile 13. */ + { 48, 63 }, /* Profile 14. */ + { 48, 63 }, /* Profile 15. */ { -1, -1 }, /* Profile 16. */ { -1, -1 }, /* Profile 17. */ { -1, -1 }, /* Profile 18. */ @@ -941,223 +690,135 @@ static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_ { 48, 63 }, /* Profile 21. */ { 48, 63 }, /* Profile 22. */ { 48, 63 }, /* Profile 23. */ - { 48, 63 }, /* Profile 24. */ - { 48, 63 }, /* Profile 25. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ { -1, -1 }, /* Profile 26. */ { -1, -1 }, /* Profile 27. */ { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { 48, 63 }, /* Profile 35. */ - { 48, 63 }, /* Profile 36. */ - { 48, 63 }, /* Profile 37. */ - { 48, 63 }, /* Profile 38. */ - { 48, 63 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { -1, -1 }, /* Profile 44. */ - { -1, -1 }, /* Profile 45. */ - { -1, -1 }, /* Profile 46. */ - { -1, -1 }, /* Profile 47. */ - { -1, -1 }, /* Profile 48. */ - { 48, 63 }, /* Profile 49. */ - { 48, 63 }, /* Profile 50. */ - { 48, 63 }, /* Profile 51. */ - { 48, 63 }, /* Profile 52. */ - { 48, 63 }, /* Profile 53. */ + { 48, 63 }, /* Profile 29. */ + { 48, 63 }, /* Profile 30. */ + { 48, 63 }, /* Profile 31. */ }, - .profile_cnt = 54, + .profile_cnt = 32, }, { .name = "EP_NIH_HDR_RECIRC_CODE_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 368, 371 }, /* Profile 2. */ - { 352, 355 }, /* Profile 3. */ - { 368, 371 }, /* Profile 4. */ - { 368, 371 }, /* Profile 5. */ - { 368, 371 }, /* Profile 6. */ - { 368, 371 }, /* Profile 7. */ - { 352, 355 }, /* Profile 8. */ - { 368, 371 }, /* Profile 9. */ - { 368, 371 }, /* Profile 10. */ - { 368, 371 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { 368, 371 }, /* Profile 16. */ - { 352, 355 }, /* Profile 17. */ - { 368, 371 }, /* Profile 18. */ - { 368, 371 }, /* Profile 19. */ - { 368, 371 }, /* Profile 20. */ - { 368, 371 }, /* Profile 21. */ - { 352, 355 }, /* Profile 22. */ - { 368, 371 }, /* Profile 23. */ - { 368, 371 }, /* Profile 24. */ - { 368, 371 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { 368, 371 }, /* Profile 30. */ - { 352, 355 }, /* Profile 31. */ - { 368, 371 }, /* Profile 32. */ - { 368, 371 }, /* Profile 33. */ - { 368, 371 }, /* Profile 34. */ - { 368, 371 }, /* Profile 35. */ - { 352, 355 }, /* Profile 36. */ - { 368, 371 }, /* Profile 37. */ - { 368, 371 }, /* Profile 38. */ - { 368, 371 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { 368, 371 }, /* Profile 44. */ - { 352, 355 }, /* Profile 45. */ - { 368, 371 }, /* Profile 46. */ - { 368, 371 }, /* Profile 47. */ - { 368, 371 }, /* Profile 48. */ - { 368, 371 }, /* Profile 49. */ - { 352, 355 }, /* Profile 50. */ - { 368, 371 }, /* Profile 51. */ - { 368, 371 }, /* Profile 52. */ - { 368, 371 }, /* Profile 53. */ + { 388, 391 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 388, 391 }, /* Profile 10. */ + { 384, 387 }, /* Profile 11. */ + { 384, 387 }, /* Profile 12. */ + { 388, 391 }, /* Profile 13. */ + { 384, 387 }, /* Profile 14. */ + { 384, 387 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 388, 391 }, /* Profile 18. */ + { 384, 387 }, /* Profile 19. */ + { 384, 387 }, /* Profile 20. */ + { 388, 391 }, /* Profile 21. */ + { 384, 387 }, /* Profile 22. */ + { 384, 387 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { 388, 391 }, /* Profile 26. */ + { 384, 387 }, /* Profile 27. */ + { 384, 387 }, /* Profile 28. */ + { 388, 391 }, /* Profile 29. */ + { 384, 387 }, /* Profile 30. */ + { 384, 387 }, /* Profile 31. */ }, - .profile_cnt = 54, + .profile_cnt = 32, }, { .name = "EP_NIH_HDR_TIMESTAMP_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ + { 128, 143 }, /* Profile 3. */ { -1, -1 }, /* Profile 4. */ - { 288, 303 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ { -1, -1 }, /* Profile 7. */ { -1, -1 }, /* Profile 8. */ { -1, -1 }, /* Profile 9. */ - { 288, 303 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 10. */ + { 128, 143 }, /* Profile 11. */ { -1, -1 }, /* Profile 12. */ { -1, -1 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ + { 128, 143 }, /* Profile 14. */ { -1, -1 }, /* Profile 15. */ { -1, -1 }, /* Profile 16. */ { -1, -1 }, /* Profile 17. */ { -1, -1 }, /* Profile 18. */ - { 288, 303 }, /* Profile 19. */ + { 144, 159 }, /* Profile 19. */ { -1, -1 }, /* Profile 20. */ { -1, -1 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ + { 144, 159 }, /* Profile 22. */ { -1, -1 }, /* Profile 23. */ - { 288, 303 }, /* Profile 24. */ + { -1, -1 }, /* Profile 24. */ { -1, -1 }, /* Profile 25. */ { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ + { 144, 159 }, /* Profile 27. */ { -1, -1 }, /* Profile 28. */ { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { 304, 319 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { 304, 319 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { -1, -1 }, /* Profile 44. */ - { -1, -1 }, /* Profile 45. */ - { -1, -1 }, /* Profile 46. */ - { 304, 319 }, /* Profile 47. */ - { -1, -1 }, /* Profile 48. */ - { -1, -1 }, /* Profile 49. */ - { -1, -1 }, /* Profile 50. */ - { -1, -1 }, /* Profile 51. */ - { 304, 319 }, /* Profile 52. */ + { 144, 159 }, /* Profile 30. */ }, - .profile_cnt = 53, + .profile_cnt = 31, }, { .name = "EP_NIH_HDR_TIMESTAMP_31_16", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ + { 144, 159 }, /* Profile 3. */ { -1, -1 }, /* Profile 4. */ - { 304, 319 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ { -1, -1 }, /* Profile 7. */ { -1, -1 }, /* Profile 8. */ { -1, -1 }, /* Profile 9. */ - { 304, 319 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 10. */ + { 144, 159 }, /* Profile 11. */ { -1, -1 }, /* Profile 12. */ { -1, -1 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ + { 144, 159 }, /* Profile 14. */ { -1, -1 }, /* Profile 15. */ { -1, -1 }, /* Profile 16. */ { -1, -1 }, /* Profile 17. */ { -1, -1 }, /* Profile 18. */ - { 304, 319 }, /* Profile 19. */ + { 160, 175 }, /* Profile 19. */ { -1, -1 }, /* Profile 20. */ { -1, -1 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ + { 160, 175 }, /* Profile 22. */ { -1, -1 }, /* Profile 23. */ - { 304, 319 }, /* Profile 24. */ + { -1, -1 }, /* Profile 24. */ { -1, -1 }, /* Profile 25. */ { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ + { 160, 175 }, /* Profile 27. */ { -1, -1 }, /* Profile 28. */ { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { 320, 335 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { 320, 335 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { -1, -1 }, /* Profile 44. */ - { -1, -1 }, /* Profile 45. */ - { -1, -1 }, /* Profile 46. */ - { 320, 335 }, /* Profile 47. */ - { -1, -1 }, /* Profile 48. */ - { -1, -1 }, /* Profile 49. */ - { -1, -1 }, /* Profile 50. */ - { -1, -1 }, /* Profile 51. */ - { 320, 335 }, /* Profile 52. */ + { 160, 175 }, /* Profile 30. */ }, - .profile_cnt = 53, + .profile_cnt = 31, }, { .name = "EVENT_TRACE_VECTOR_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1193,36 +854,12 @@ static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_ { 0, 15 }, /* Profile 31. */ { 0, 15 }, /* Profile 32. */ { 0, 15 }, /* Profile 33. */ - { 0, 15 }, /* Profile 34. */ - { 0, 15 }, /* Profile 35. */ - { 0, 15 }, /* Profile 36. */ - { 0, 15 }, /* Profile 37. */ - { 0, 15 }, /* Profile 38. */ - { 0, 15 }, /* Profile 39. */ - { 0, 15 }, /* Profile 40. */ - { 0, 15 }, /* Profile 41. */ - { 0, 15 }, /* Profile 42. */ - { 0, 15 }, /* Profile 43. */ - { 0, 15 }, /* Profile 44. */ - { 0, 15 }, /* Profile 45. */ - { 0, 15 }, /* Profile 46. */ - { 0, 15 }, /* Profile 47. */ - { 0, 15 }, /* Profile 48. */ - { 0, 15 }, /* Profile 49. */ - { 0, 15 }, /* Profile 50. */ - { 0, 15 }, /* Profile 51. */ - { 0, 15 }, /* Profile 52. */ - { 0, 15 }, /* Profile 53. */ - { 0, 15 }, /* Profile 54. */ - { 0, 15 }, /* Profile 55. */ - { 0, 15 }, /* Profile 56. */ - { 0, 15 }, /* Profile 57. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "EVENT_TRACE_VECTOR_31_16", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1258,36 +895,12 @@ static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_ { 16, 31 }, /* Profile 31. */ { 16, 31 }, /* Profile 32. */ { 16, 31 }, /* Profile 33. */ - { 16, 31 }, /* Profile 34. */ - { 16, 31 }, /* Profile 35. */ - { 16, 31 }, /* Profile 36. */ - { 16, 31 }, /* Profile 37. */ - { 16, 31 }, /* Profile 38. */ - { 16, 31 }, /* Profile 39. */ - { 16, 31 }, /* Profile 40. */ - { 16, 31 }, /* Profile 41. */ - { 16, 31 }, /* Profile 42. */ - { 16, 31 }, /* Profile 43. */ - { 16, 31 }, /* Profile 44. */ - { 16, 31 }, /* Profile 45. */ - { 16, 31 }, /* Profile 46. */ - { 16, 31 }, /* Profile 47. */ - { 16, 31 }, /* Profile 48. */ - { 16, 31 }, /* Profile 49. */ - { 16, 31 }, /* Profile 50. */ - { 16, 31 }, /* Profile 51. */ - { 16, 31 }, /* Profile 52. */ - { 16, 31 }, /* Profile 53. */ - { 16, 31 }, /* Profile 54. */ - { 16, 31 }, /* Profile 55. */ - { 16, 31 }, /* Profile 56. */ - { 16, 31 }, /* Profile 57. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1323,658 +936,406 @@ static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_ { 32, 47 }, /* Profile 31. */ { 32, 47 }, /* Profile 32. */ { 32, 47 }, /* Profile 33. */ - { 32, 47 }, /* Profile 34. */ - { 32, 47 }, /* Profile 35. */ - { 32, 47 }, /* Profile 36. */ - { 32, 47 }, /* Profile 37. */ - { 32, 47 }, /* Profile 38. */ - { 32, 47 }, /* Profile 39. */ - { 32, 47 }, /* Profile 40. */ - { 32, 47 }, /* Profile 41. */ - { 32, 47 }, /* Profile 42. */ - { 32, 47 }, /* Profile 43. */ - { 32, 47 }, /* Profile 44. */ - { 32, 47 }, /* Profile 45. */ - { 32, 47 }, /* Profile 46. */ - { 32, 47 }, /* Profile 47. */ - { 32, 47 }, /* Profile 48. */ - { 32, 47 }, /* Profile 49. */ - { 32, 47 }, /* Profile 50. */ - { 32, 47 }, /* Profile 51. */ - { 32, 47 }, /* Profile 52. */ - { 32, 47 }, /* Profile 53. */ - { 32, 47 }, /* Profile 54. */ - { 32, 47 }, /* Profile 55. */ - { 32, 47 }, /* Profile 56. */ - { 32, 47 }, /* Profile 57. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "I2E_CLASS_ID_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 320, 335 }, /* Profile 2. */ - { 288, 303 }, /* Profile 3. */ - { 320, 335 }, /* Profile 4. */ - { 320, 335 }, /* Profile 5. */ - { 320, 335 }, /* Profile 6. */ - { 320, 335 }, /* Profile 7. */ - { 288, 303 }, /* Profile 8. */ - { 320, 335 }, /* Profile 9. */ - { 320, 335 }, /* Profile 10. */ - { 320, 335 }, /* Profile 11. */ - { 320, 335 }, /* Profile 12. */ - { 288, 303 }, /* Profile 13. */ - { 320, 335 }, /* Profile 14. */ - { 320, 335 }, /* Profile 15. */ - { 320, 335 }, /* Profile 16. */ - { 288, 303 }, /* Profile 17. */ - { 320, 335 }, /* Profile 18. */ - { 320, 335 }, /* Profile 19. */ - { 320, 335 }, /* Profile 20. */ - { 320, 335 }, /* Profile 21. */ - { 288, 303 }, /* Profile 22. */ - { 320, 335 }, /* Profile 23. */ - { 320, 335 }, /* Profile 24. */ - { 320, 335 }, /* Profile 25. */ - { 320, 335 }, /* Profile 26. */ - { 288, 303 }, /* Profile 27. */ - { 320, 335 }, /* Profile 28. */ - { 320, 335 }, /* Profile 29. */ - { 336, 351 }, /* Profile 30. */ - { 304, 319 }, /* Profile 31. */ - { 336, 351 }, /* Profile 32. */ - { 336, 351 }, /* Profile 33. */ - { 336, 351 }, /* Profile 34. */ - { 336, 351 }, /* Profile 35. */ - { 304, 319 }, /* Profile 36. */ - { 336, 351 }, /* Profile 37. */ - { 336, 351 }, /* Profile 38. */ - { 336, 351 }, /* Profile 39. */ - { 336, 351 }, /* Profile 40. */ - { 304, 319 }, /* Profile 41. */ - { 336, 351 }, /* Profile 42. */ - { 336, 351 }, /* Profile 43. */ - { 336, 351 }, /* Profile 44. */ - { 304, 319 }, /* Profile 45. */ - { 336, 351 }, /* Profile 46. */ - { 336, 351 }, /* Profile 47. */ - { 336, 351 }, /* Profile 48. */ - { 336, 351 }, /* Profile 49. */ - { 304, 319 }, /* Profile 50. */ - { 336, 351 }, /* Profile 51. */ - { 336, 351 }, /* Profile 52. */ - { 336, 351 }, /* Profile 53. */ - { 336, 351 }, /* Profile 54. */ - { 304, 319 }, /* Profile 55. */ - { 336, 351 }, /* Profile 56. */ - { 336, 351 }, /* Profile 57. */ + { 192, 207 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + { 224, 239 }, /* Profile 6. */ + { 224, 239 }, /* Profile 7. */ + { 192, 207 }, /* Profile 8. */ + { 224, 239 }, /* Profile 9. */ + { 192, 207 }, /* Profile 10. */ + { 224, 239 }, /* Profile 11. */ + { 224, 239 }, /* Profile 12. */ + { 192, 207 }, /* Profile 13. */ + { 224, 239 }, /* Profile 14. */ + { 224, 239 }, /* Profile 15. */ + { 192, 207 }, /* Profile 16. */ + { 224, 239 }, /* Profile 17. */ + { 208, 223 }, /* Profile 18. */ + { 240, 255 }, /* Profile 19. */ + { 240, 255 }, /* Profile 20. */ + { 208, 223 }, /* Profile 21. */ + { 240, 255 }, /* Profile 22. */ + { 240, 255 }, /* Profile 23. */ + { 208, 223 }, /* Profile 24. */ + { 240, 255 }, /* Profile 25. */ + { 208, 223 }, /* Profile 26. */ + { 240, 255 }, /* Profile 27. */ + { 240, 255 }, /* Profile 28. */ + { 208, 223 }, /* Profile 29. */ + { 240, 255 }, /* Profile 30. */ + { 240, 255 }, /* Profile 31. */ + { 208, 223 }, /* Profile 32. */ + { 240, 255 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "IFP_IOAM_GBP_ACTION_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 408, 411 }, /* Profile 2. */ - { 400, 403 }, /* Profile 3. */ - { 408, 411 }, /* Profile 4. */ - { 404, 407 }, /* Profile 5. */ - { 404, 407 }, /* Profile 6. */ - { 408, 411 }, /* Profile 7. */ - { 400, 403 }, /* Profile 8. */ - { 408, 411 }, /* Profile 9. */ - { 404, 407 }, /* Profile 10. */ - { 404, 407 }, /* Profile 11. */ - { 404, 407 }, /* Profile 12. */ - { 396, 399 }, /* Profile 13. */ - { 404, 407 }, /* Profile 14. */ - { 400, 403 }, /* Profile 15. */ - { 408, 411 }, /* Profile 16. */ - { 400, 403 }, /* Profile 17. */ - { 408, 411 }, /* Profile 18. */ - { 404, 407 }, /* Profile 19. */ - { 404, 407 }, /* Profile 20. */ - { 408, 411 }, /* Profile 21. */ - { 400, 403 }, /* Profile 22. */ - { 408, 411 }, /* Profile 23. */ - { 404, 407 }, /* Profile 24. */ - { 404, 407 }, /* Profile 25. */ - { 404, 407 }, /* Profile 26. */ - { 396, 399 }, /* Profile 27. */ - { 404, 407 }, /* Profile 28. */ - { 400, 403 }, /* Profile 29. */ - { 408, 411 }, /* Profile 30. */ - { 400, 403 }, /* Profile 31. */ - { 408, 411 }, /* Profile 32. */ - { 404, 407 }, /* Profile 33. */ - { 404, 407 }, /* Profile 34. */ - { 408, 411 }, /* Profile 35. */ - { 400, 403 }, /* Profile 36. */ - { 408, 411 }, /* Profile 37. */ - { 404, 407 }, /* Profile 38. */ - { 404, 407 }, /* Profile 39. */ - { 404, 407 }, /* Profile 40. */ - { 396, 399 }, /* Profile 41. */ - { 404, 407 }, /* Profile 42. */ - { 400, 403 }, /* Profile 43. */ - { 408, 411 }, /* Profile 44. */ - { 400, 403 }, /* Profile 45. */ - { 408, 411 }, /* Profile 46. */ - { 404, 407 }, /* Profile 47. */ - { 404, 407 }, /* Profile 48. */ - { 408, 411 }, /* Profile 49. */ - { 400, 403 }, /* Profile 50. */ - { 408, 411 }, /* Profile 51. */ - { 404, 407 }, /* Profile 52. */ - { 404, 407 }, /* Profile 53. */ - { 404, 407 }, /* Profile 54. */ - { 396, 399 }, /* Profile 55. */ - { 404, 407 }, /* Profile 56. */ - { 400, 403 }, /* Profile 57. */ - }, - .profile_cnt = 58, - }, - { - .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 372, 375 }, /* Profile 2. */ - { 356, 359 }, /* Profile 3. */ - { 376, 379 }, /* Profile 4. */ - { 372, 375 }, /* Profile 5. */ + { 376, 379 }, /* Profile 2. */ + { 372, 375 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ { 372, 375 }, /* Profile 6. */ { 372, 375 }, /* Profile 7. */ - { 356, 359 }, /* Profile 8. */ - { 376, 379 }, /* Profile 9. */ - { 372, 375 }, /* Profile 10. */ + { 376, 379 }, /* Profile 8. */ + { 372, 375 }, /* Profile 9. */ + { 376, 379 }, /* Profile 10. */ { 372, 375 }, /* Profile 11. */ - { 368, 371 }, /* Profile 12. */ - { 352, 355 }, /* Profile 13. */ + { 372, 375 }, /* Profile 12. */ + { 376, 379 }, /* Profile 13. */ { 372, 375 }, /* Profile 14. */ - { 368, 371 }, /* Profile 15. */ - { 372, 375 }, /* Profile 16. */ - { 356, 359 }, /* Profile 17. */ + { 372, 375 }, /* Profile 15. */ + { 376, 379 }, /* Profile 16. */ + { 372, 375 }, /* Profile 17. */ { 376, 379 }, /* Profile 18. */ { 372, 375 }, /* Profile 19. */ { 372, 375 }, /* Profile 20. */ - { 372, 375 }, /* Profile 21. */ - { 356, 359 }, /* Profile 22. */ - { 376, 379 }, /* Profile 23. */ - { 372, 375 }, /* Profile 24. */ + { 376, 379 }, /* Profile 21. */ + { 372, 375 }, /* Profile 22. */ + { 372, 375 }, /* Profile 23. */ + { 376, 379 }, /* Profile 24. */ { 372, 375 }, /* Profile 25. */ - { 368, 371 }, /* Profile 26. */ - { 352, 355 }, /* Profile 27. */ + { 376, 379 }, /* Profile 26. */ + { 372, 375 }, /* Profile 27. */ { 372, 375 }, /* Profile 28. */ - { 368, 371 }, /* Profile 29. */ + { 376, 379 }, /* Profile 29. */ { 372, 375 }, /* Profile 30. */ - { 356, 359 }, /* Profile 31. */ + { 372, 375 }, /* Profile 31. */ { 376, 379 }, /* Profile 32. */ { 372, 375 }, /* Profile 33. */ - { 372, 375 }, /* Profile 34. */ - { 372, 375 }, /* Profile 35. */ - { 356, 359 }, /* Profile 36. */ - { 376, 379 }, /* Profile 37. */ - { 372, 375 }, /* Profile 38. */ - { 372, 375 }, /* Profile 39. */ - { 368, 371 }, /* Profile 40. */ - { 352, 355 }, /* Profile 41. */ - { 372, 375 }, /* Profile 42. */ - { 368, 371 }, /* Profile 43. */ - { 372, 375 }, /* Profile 44. */ - { 356, 359 }, /* Profile 45. */ - { 376, 379 }, /* Profile 46. */ - { 372, 375 }, /* Profile 47. */ - { 372, 375 }, /* Profile 48. */ - { 372, 375 }, /* Profile 49. */ - { 356, 359 }, /* Profile 50. */ - { 376, 379 }, /* Profile 51. */ - { 372, 375 }, /* Profile 52. */ - { 372, 375 }, /* Profile 53. */ - { 368, 371 }, /* Profile 54. */ - { 352, 355 }, /* Profile 55. */ - { 372, 375 }, /* Profile 56. */ - { 368, 371 }, /* Profile 57. */ }, - .profile_cnt = 58, + .profile_cnt = 34, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 392, 395 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 388, 391 }, /* Profile 9. */ + { 396, 399 }, /* Profile 10. */ + { 392, 395 }, /* Profile 11. */ + { 392, 395 }, /* Profile 12. */ + { 396, 399 }, /* Profile 13. */ + { 392, 395 }, /* Profile 14. */ + { 392, 395 }, /* Profile 15. */ + { 392, 395 }, /* Profile 16. */ + { 388, 391 }, /* Profile 17. */ + { 396, 399 }, /* Profile 18. */ + { 392, 395 }, /* Profile 19. */ + { 392, 395 }, /* Profile 20. */ + { 396, 399 }, /* Profile 21. */ + { 392, 395 }, /* Profile 22. */ + { 392, 395 }, /* Profile 23. */ + { 392, 395 }, /* Profile 24. */ + { 388, 391 }, /* Profile 25. */ + { 396, 399 }, /* Profile 26. */ + { 392, 395 }, /* Profile 27. */ + { 392, 395 }, /* Profile 28. */ + { 396, 399 }, /* Profile 29. */ + { 392, 395 }, /* Profile 30. */ + { 392, 395 }, /* Profile 31. */ + { 392, 395 }, /* Profile 32. */ + { 388, 391 }, /* Profile 33. */ + }, + .profile_cnt = 34, }, { .name = "ING_TIMESTAMP_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ + { 128, 143 }, /* Profile 4. */ { -1, -1 }, /* Profile 5. */ - { 288, 303 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ + { 128, 143 }, /* Profile 9. */ { -1, -1 }, /* Profile 10. */ - { 288, 303 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 11. */ + { 128, 143 }, /* Profile 12. */ { -1, -1 }, /* Profile 13. */ { -1, -1 }, /* Profile 14. */ - { 288, 303 }, /* Profile 15. */ + { 128, 143 }, /* Profile 15. */ { -1, -1 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ + { 128, 143 }, /* Profile 17. */ { -1, -1 }, /* Profile 18. */ { -1, -1 }, /* Profile 19. */ - { 288, 303 }, /* Profile 20. */ + { 144, 159 }, /* Profile 20. */ { -1, -1 }, /* Profile 21. */ { -1, -1 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ + { 144, 159 }, /* Profile 23. */ { -1, -1 }, /* Profile 24. */ - { 288, 303 }, /* Profile 25. */ + { 144, 159 }, /* Profile 25. */ { -1, -1 }, /* Profile 26. */ { -1, -1 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { 288, 303 }, /* Profile 29. */ + { 144, 159 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ + { 144, 159 }, /* Profile 31. */ { -1, -1 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { 304, 319 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { 304, 319 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { 304, 319 }, /* Profile 43. */ - { -1, -1 }, /* Profile 44. */ - { -1, -1 }, /* Profile 45. */ - { -1, -1 }, /* Profile 46. */ - { -1, -1 }, /* Profile 47. */ - { 304, 319 }, /* Profile 48. */ - { -1, -1 }, /* Profile 49. */ - { -1, -1 }, /* Profile 50. */ - { -1, -1 }, /* Profile 51. */ - { -1, -1 }, /* Profile 52. */ - { 304, 319 }, /* Profile 53. */ - { -1, -1 }, /* Profile 54. */ - { -1, -1 }, /* Profile 55. */ - { -1, -1 }, /* Profile 56. */ - { 304, 319 }, /* Profile 57. */ + { 144, 159 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "ING_TIMESTAMP_31_16", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ + { 144, 159 }, /* Profile 4. */ { -1, -1 }, /* Profile 5. */ - { 304, 319 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 6. */ + { 144, 159 }, /* Profile 7. */ { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ + { 144, 159 }, /* Profile 9. */ { -1, -1 }, /* Profile 10. */ - { 304, 319 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 11. */ + { 144, 159 }, /* Profile 12. */ { -1, -1 }, /* Profile 13. */ { -1, -1 }, /* Profile 14. */ - { 304, 319 }, /* Profile 15. */ + { 144, 159 }, /* Profile 15. */ { -1, -1 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ + { 144, 159 }, /* Profile 17. */ { -1, -1 }, /* Profile 18. */ { -1, -1 }, /* Profile 19. */ - { 304, 319 }, /* Profile 20. */ + { 160, 175 }, /* Profile 20. */ { -1, -1 }, /* Profile 21. */ { -1, -1 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ + { 160, 175 }, /* Profile 23. */ { -1, -1 }, /* Profile 24. */ - { 304, 319 }, /* Profile 25. */ + { 160, 175 }, /* Profile 25. */ { -1, -1 }, /* Profile 26. */ { -1, -1 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { 304, 319 }, /* Profile 29. */ + { 160, 175 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ + { 160, 175 }, /* Profile 31. */ { -1, -1 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { 320, 335 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { 320, 335 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { 320, 335 }, /* Profile 43. */ - { -1, -1 }, /* Profile 44. */ - { -1, -1 }, /* Profile 45. */ - { -1, -1 }, /* Profile 46. */ - { -1, -1 }, /* Profile 47. */ - { 320, 335 }, /* Profile 48. */ - { -1, -1 }, /* Profile 49. */ - { -1, -1 }, /* Profile 50. */ - { -1, -1 }, /* Profile 51. */ - { -1, -1 }, /* Profile 52. */ - { 320, 335 }, /* Profile 53. */ - { -1, -1 }, /* Profile 54. */ - { -1, -1 }, /* Profile 55. */ - { -1, -1 }, /* Profile 56. */ - { 320, 335 }, /* Profile 57. */ + { 160, 175 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { - .name = "INGRESS_PP_PORT_7_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .name = "INGRESS_DEVICE_PORT_6_0", + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_6_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 272, 279 }, /* Profile 2. */ - { 256, 263 }, /* Profile 3. */ - { 272, 279 }, /* Profile 4. */ - { 256, 263 }, /* Profile 5. */ - { 256, 263 }, /* Profile 6. */ - { 272, 279 }, /* Profile 7. */ - { 256, 263 }, /* Profile 8. */ - { 272, 279 }, /* Profile 9. */ - { 256, 263 }, /* Profile 10. */ - { 256, 263 }, /* Profile 11. */ - { 272, 279 }, /* Profile 12. */ - { 256, 263 }, /* Profile 13. */ - { 272, 279 }, /* Profile 14. */ - { 256, 263 }, /* Profile 15. */ - { 272, 279 }, /* Profile 16. */ - { 256, 263 }, /* Profile 17. */ - { 272, 279 }, /* Profile 18. */ - { 256, 263 }, /* Profile 19. */ - { 256, 263 }, /* Profile 20. */ - { 272, 279 }, /* Profile 21. */ - { 256, 263 }, /* Profile 22. */ - { 272, 279 }, /* Profile 23. */ - { 256, 263 }, /* Profile 24. */ - { 256, 263 }, /* Profile 25. */ - { 272, 279 }, /* Profile 26. */ - { 256, 263 }, /* Profile 27. */ - { 272, 279 }, /* Profile 28. */ - { 256, 263 }, /* Profile 29. */ - { 288, 295 }, /* Profile 30. */ - { 272, 279 }, /* Profile 31. */ - { 288, 295 }, /* Profile 32. */ - { 272, 279 }, /* Profile 33. */ - { 272, 279 }, /* Profile 34. */ - { 288, 295 }, /* Profile 35. */ - { 272, 279 }, /* Profile 36. */ - { 288, 295 }, /* Profile 37. */ - { 272, 279 }, /* Profile 38. */ - { 272, 279 }, /* Profile 39. */ - { 288, 295 }, /* Profile 40. */ - { 272, 279 }, /* Profile 41. */ - { 288, 295 }, /* Profile 42. */ - { 272, 279 }, /* Profile 43. */ - { 288, 295 }, /* Profile 44. */ - { 272, 279 }, /* Profile 45. */ - { 288, 295 }, /* Profile 46. */ - { 272, 279 }, /* Profile 47. */ - { 272, 279 }, /* Profile 48. */ - { 288, 295 }, /* Profile 49. */ - { 272, 279 }, /* Profile 50. */ - { 288, 295 }, /* Profile 51. */ - { 272, 279 }, /* Profile 52. */ - { 272, 279 }, /* Profile 53. */ - { 288, 295 }, /* Profile 54. */ - { 272, 279 }, /* Profile 55. */ - { 288, 295 }, /* Profile 56. */ - { 272, 279 }, /* Profile 57. */ + { 304, 310 }, /* Profile 2. */ + { 304, 310 }, /* Profile 3. */ + { 304, 310 }, /* Profile 4. */ + { 304, 310 }, /* Profile 5. */ + { 304, 310 }, /* Profile 6. */ + { 304, 310 }, /* Profile 7. */ + { 304, 310 }, /* Profile 8. */ + { 304, 310 }, /* Profile 9. */ + { 304, 310 }, /* Profile 10. */ + { 304, 310 }, /* Profile 11. */ + { 304, 310 }, /* Profile 12. */ + { 304, 310 }, /* Profile 13. */ + { 304, 310 }, /* Profile 14. */ + { 304, 310 }, /* Profile 15. */ + { 304, 310 }, /* Profile 16. */ + { 304, 310 }, /* Profile 17. */ + { 304, 310 }, /* Profile 18. */ + { 304, 310 }, /* Profile 19. */ + { 304, 310 }, /* Profile 20. */ + { 304, 310 }, /* Profile 21. */ + { 304, 310 }, /* Profile 22. */ + { 304, 310 }, /* Profile 23. */ + { 304, 310 }, /* Profile 24. */ + { 304, 310 }, /* Profile 25. */ + { 304, 310 }, /* Profile 26. */ + { 304, 310 }, /* Profile 27. */ + { 304, 310 }, /* Profile 28. */ + { 304, 310 }, /* Profile 29. */ + { 304, 310 }, /* Profile 30. */ + { 304, 310 }, /* Profile 31. */ + { 304, 310 }, /* Profile 32. */ + { 304, 310 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 224, 239 }, /* Profile 2. */ - { 208, 223 }, /* Profile 3. */ - { 224, 239 }, /* Profile 4. */ - { 208, 223 }, /* Profile 5. */ - { 208, 223 }, /* Profile 6. */ - { 224, 239 }, /* Profile 7. */ - { 208, 223 }, /* Profile 8. */ - { 224, 239 }, /* Profile 9. */ - { 208, 223 }, /* Profile 10. */ - { 208, 223 }, /* Profile 11. */ - { 224, 239 }, /* Profile 12. */ - { 208, 223 }, /* Profile 13. */ - { 224, 239 }, /* Profile 14. */ - { 208, 223 }, /* Profile 15. */ + { 256, 271 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { 224, 239 }, /* Profile 5. */ + { 256, 271 }, /* Profile 6. */ + { 256, 271 }, /* Profile 7. */ + { 224, 239 }, /* Profile 8. */ + { 256, 271 }, /* Profile 9. */ + { 224, 239 }, /* Profile 10. */ + { 256, 271 }, /* Profile 11. */ + { 256, 271 }, /* Profile 12. */ + { 224, 239 }, /* Profile 13. */ + { 256, 271 }, /* Profile 14. */ + { 256, 271 }, /* Profile 15. */ { 224, 239 }, /* Profile 16. */ - { 208, 223 }, /* Profile 17. */ + { 256, 271 }, /* Profile 17. */ { 224, 239 }, /* Profile 18. */ - { 208, 223 }, /* Profile 19. */ - { 208, 223 }, /* Profile 20. */ + { 256, 271 }, /* Profile 19. */ + { 256, 271 }, /* Profile 20. */ { 224, 239 }, /* Profile 21. */ - { 208, 223 }, /* Profile 22. */ - { 224, 239 }, /* Profile 23. */ - { 208, 223 }, /* Profile 24. */ - { 208, 223 }, /* Profile 25. */ + { 256, 271 }, /* Profile 22. */ + { 256, 271 }, /* Profile 23. */ + { 224, 239 }, /* Profile 24. */ + { 256, 271 }, /* Profile 25. */ { 224, 239 }, /* Profile 26. */ - { 208, 223 }, /* Profile 27. */ - { 224, 239 }, /* Profile 28. */ - { 208, 223 }, /* Profile 29. */ - { 240, 255 }, /* Profile 30. */ - { 224, 239 }, /* Profile 31. */ - { 240, 255 }, /* Profile 32. */ - { 224, 239 }, /* Profile 33. */ - { 224, 239 }, /* Profile 34. */ - { 240, 255 }, /* Profile 35. */ - { 224, 239 }, /* Profile 36. */ - { 240, 255 }, /* Profile 37. */ - { 224, 239 }, /* Profile 38. */ - { 224, 239 }, /* Profile 39. */ - { 240, 255 }, /* Profile 40. */ - { 224, 239 }, /* Profile 41. */ - { 240, 255 }, /* Profile 42. */ - { 224, 239 }, /* Profile 43. */ - { 240, 255 }, /* Profile 44. */ - { 224, 239 }, /* Profile 45. */ - { 240, 255 }, /* Profile 46. */ - { 224, 239 }, /* Profile 47. */ - { 224, 239 }, /* Profile 48. */ - { 240, 255 }, /* Profile 49. */ - { 224, 239 }, /* Profile 50. */ - { 240, 255 }, /* Profile 51. */ - { 224, 239 }, /* Profile 52. */ - { 224, 239 }, /* Profile 53. */ - { 240, 255 }, /* Profile 54. */ - { 224, 239 }, /* Profile 55. */ - { 240, 255 }, /* Profile 56. */ - { 224, 239 }, /* Profile 57. */ + { 256, 271 }, /* Profile 27. */ + { 256, 271 }, /* Profile 28. */ + { 224, 239 }, /* Profile 29. */ + { 256, 271 }, /* Profile 30. */ + { 256, 271 }, /* Profile 31. */ + { 224, 239 }, /* Profile 32. */ + { 256, 271 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 404, 407 }, /* Profile 2. */ - { 396, 399 }, /* Profile 3. */ + { 408, 411 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ { 404, 407 }, /* Profile 4. */ - { 400, 403 }, /* Profile 5. */ - { 400, 403 }, /* Profile 6. */ + { 408, 411 }, /* Profile 5. */ + { 404, 407 }, /* Profile 6. */ { 404, 407 }, /* Profile 7. */ - { 396, 399 }, /* Profile 8. */ - { 404, 407 }, /* Profile 9. */ - { 400, 403 }, /* Profile 10. */ - { 400, 403 }, /* Profile 11. */ - { 400, 403 }, /* Profile 12. */ - { 392, 395 }, /* Profile 13. */ - { 400, 403 }, /* Profile 14. */ - { 396, 399 }, /* Profile 15. */ + { 404, 407 }, /* Profile 8. */ + { 400, 403 }, /* Profile 9. */ + { 408, 411 }, /* Profile 10. */ + { 404, 407 }, /* Profile 11. */ + { 404, 407 }, /* Profile 12. */ + { 408, 411 }, /* Profile 13. */ + { 404, 407 }, /* Profile 14. */ + { 404, 407 }, /* Profile 15. */ { 404, 407 }, /* Profile 16. */ - { 396, 399 }, /* Profile 17. */ - { 404, 407 }, /* Profile 18. */ - { 400, 403 }, /* Profile 19. */ - { 400, 403 }, /* Profile 20. */ - { 404, 407 }, /* Profile 21. */ - { 396, 399 }, /* Profile 22. */ - { 404, 407 }, /* Profile 23. */ - { 400, 403 }, /* Profile 24. */ - { 400, 403 }, /* Profile 25. */ - { 400, 403 }, /* Profile 26. */ - { 392, 395 }, /* Profile 27. */ - { 400, 403 }, /* Profile 28. */ - { 396, 399 }, /* Profile 29. */ + { 400, 403 }, /* Profile 17. */ + { 408, 411 }, /* Profile 18. */ + { 404, 407 }, /* Profile 19. */ + { 404, 407 }, /* Profile 20. */ + { 408, 411 }, /* Profile 21. */ + { 404, 407 }, /* Profile 22. */ + { 404, 407 }, /* Profile 23. */ + { 404, 407 }, /* Profile 24. */ + { 400, 403 }, /* Profile 25. */ + { 408, 411 }, /* Profile 26. */ + { 404, 407 }, /* Profile 27. */ + { 404, 407 }, /* Profile 28. */ + { 408, 411 }, /* Profile 29. */ { 404, 407 }, /* Profile 30. */ - { 396, 399 }, /* Profile 31. */ + { 404, 407 }, /* Profile 31. */ { 404, 407 }, /* Profile 32. */ { 400, 403 }, /* Profile 33. */ - { 400, 403 }, /* Profile 34. */ - { 404, 407 }, /* Profile 35. */ - { 396, 399 }, /* Profile 36. */ - { 404, 407 }, /* Profile 37. */ - { 400, 403 }, /* Profile 38. */ - { 400, 403 }, /* Profile 39. */ - { 400, 403 }, /* Profile 40. */ - { 392, 395 }, /* Profile 41. */ - { 400, 403 }, /* Profile 42. */ - { 396, 399 }, /* Profile 43. */ - { 404, 407 }, /* Profile 44. */ - { 396, 399 }, /* Profile 45. */ - { 404, 407 }, /* Profile 46. */ - { 400, 403 }, /* Profile 47. */ - { 400, 403 }, /* Profile 48. */ - { 404, 407 }, /* Profile 49. */ - { 396, 399 }, /* Profile 50. */ - { 404, 407 }, /* Profile 51. */ - { 400, 403 }, /* Profile 52. */ - { 400, 403 }, /* Profile 53. */ - { 400, 403 }, /* Profile 54. */ - { 392, 395 }, /* Profile 55. */ - { 400, 403 }, /* Profile 56. */ - { 396, 399 }, /* Profile 57. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "INT_PRI_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 420, 423 }, /* Profile 2. */ - { 412, 415 }, /* Profile 3. */ - { 420, 423 }, /* Profile 4. */ - { 420, 423 }, /* Profile 5. */ - { 420, 423 }, /* Profile 6. */ - { 420, 423 }, /* Profile 7. */ - { 412, 415 }, /* Profile 8. */ - { 420, 423 }, /* Profile 9. */ - { 420, 423 }, /* Profile 10. */ - { 420, 423 }, /* Profile 11. */ - { 416, 419 }, /* Profile 12. */ - { 408, 411 }, /* Profile 13. */ - { 416, 419 }, /* Profile 14. */ - { 416, 419 }, /* Profile 15. */ - { 420, 423 }, /* Profile 16. */ - { 412, 415 }, /* Profile 17. */ - { 420, 423 }, /* Profile 18. */ - { 420, 423 }, /* Profile 19. */ - { 420, 423 }, /* Profile 20. */ - { 420, 423 }, /* Profile 21. */ - { 412, 415 }, /* Profile 22. */ - { 420, 423 }, /* Profile 23. */ - { 420, 423 }, /* Profile 24. */ - { 420, 423 }, /* Profile 25. */ - { 416, 419 }, /* Profile 26. */ - { 408, 411 }, /* Profile 27. */ - { 416, 419 }, /* Profile 28. */ - { 416, 419 }, /* Profile 29. */ - { 420, 423 }, /* Profile 30. */ - { 412, 415 }, /* Profile 31. */ - { 420, 423 }, /* Profile 32. */ - { 420, 423 }, /* Profile 33. */ - { 420, 423 }, /* Profile 34. */ - { 420, 423 }, /* Profile 35. */ - { 412, 415 }, /* Profile 36. */ - { 420, 423 }, /* Profile 37. */ - { 420, 423 }, /* Profile 38. */ - { 420, 423 }, /* Profile 39. */ - { 416, 419 }, /* Profile 40. */ - { 408, 411 }, /* Profile 41. */ - { 416, 419 }, /* Profile 42. */ - { 416, 419 }, /* Profile 43. */ - { 420, 423 }, /* Profile 44. */ - { 412, 415 }, /* Profile 45. */ - { 420, 423 }, /* Profile 46. */ - { 420, 423 }, /* Profile 47. */ - { 420, 423 }, /* Profile 48. */ - { 420, 423 }, /* Profile 49. */ - { 412, 415 }, /* Profile 50. */ - { 420, 423 }, /* Profile 51. */ - { 420, 423 }, /* Profile 52. */ - { 420, 423 }, /* Profile 53. */ - { 416, 419 }, /* Profile 54. */ - { 408, 411 }, /* Profile 55. */ - { 416, 419 }, /* Profile 56. */ - { 416, 419 }, /* Profile 57. */ + { 392, 395 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 388, 391 }, /* Profile 6. */ + { 388, 391 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 384, 387 }, /* Profile 9. */ + { 392, 395 }, /* Profile 10. */ + { 388, 391 }, /* Profile 11. */ + { 388, 391 }, /* Profile 12. */ + { 392, 395 }, /* Profile 13. */ + { 388, 391 }, /* Profile 14. */ + { 388, 391 }, /* Profile 15. */ + { 388, 391 }, /* Profile 16. */ + { 384, 387 }, /* Profile 17. */ + { 392, 395 }, /* Profile 18. */ + { 388, 391 }, /* Profile 19. */ + { 388, 391 }, /* Profile 20. */ + { 392, 395 }, /* Profile 21. */ + { 388, 391 }, /* Profile 22. */ + { 388, 391 }, /* Profile 23. */ + { 388, 391 }, /* Profile 24. */ + { 384, 387 }, /* Profile 25. */ + { 392, 395 }, /* Profile 26. */ + { 388, 391 }, /* Profile 27. */ + { 388, 391 }, /* Profile 28. */ + { 392, 395 }, /* Profile 29. */ + { 388, 391 }, /* Profile 30. */ + { 388, 391 }, /* Profile 31. */ + { 388, 391 }, /* Profile 32. */ + { 384, 387 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "L2_IIF_11_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L2_IIF_11_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 336, 347 }, /* Profile 2. */ - { 304, 315 }, /* Profile 3. */ - { 336, 347 }, /* Profile 4. */ - { 336, 347 }, /* Profile 5. */ - { 336, 347 }, /* Profile 6. */ - { 336, 347 }, /* Profile 7. */ - { 304, 315 }, /* Profile 8. */ - { 336, 347 }, /* Profile 9. */ - { 336, 347 }, /* Profile 10. */ - { 336, 347 }, /* Profile 11. */ - { 336, 347 }, /* Profile 12. */ - { 304, 315 }, /* Profile 13. */ - { 336, 347 }, /* Profile 14. */ - { 336, 347 }, /* Profile 15. */ - { 336, 347 }, /* Profile 16. */ - { 304, 315 }, /* Profile 17. */ - { 336, 347 }, /* Profile 18. */ - { 336, 347 }, /* Profile 19. */ - { 336, 347 }, /* Profile 20. */ - { 336, 347 }, /* Profile 21. */ - { 304, 315 }, /* Profile 22. */ - { 336, 347 }, /* Profile 23. */ - { 336, 347 }, /* Profile 24. */ - { 336, 347 }, /* Profile 25. */ - { 336, 347 }, /* Profile 26. */ - { 304, 315 }, /* Profile 27. */ - { 336, 347 }, /* Profile 28. */ - { 336, 347 }, /* Profile 29. */ + { 208, 219 }, /* Profile 2. */ + { 240, 251 }, /* Profile 3. */ + { 240, 251 }, /* Profile 4. */ + { 208, 219 }, /* Profile 5. */ + { 240, 251 }, /* Profile 6. */ + { 240, 251 }, /* Profile 7. */ + { 208, 219 }, /* Profile 8. */ + { 240, 251 }, /* Profile 9. */ + { 208, 219 }, /* Profile 10. */ + { 240, 251 }, /* Profile 11. */ + { 240, 251 }, /* Profile 12. */ + { 208, 219 }, /* Profile 13. */ + { 240, 251 }, /* Profile 14. */ + { 240, 251 }, /* Profile 15. */ + { 208, 219 }, /* Profile 16. */ + { 240, 251 }, /* Profile 17. */ }, - .profile_cnt = 30, + .profile_cnt = 18, }, { .name = "L2_OIF_11_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L2_OIF_11_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1994,567 +1355,313 @@ static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_ { -1, -1 }, /* Profile 15. */ { -1, -1 }, /* Profile 16. */ { -1, -1 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { 160, 171 }, /* Profile 30. */ - { 160, 171 }, /* Profile 31. */ - { 160, 171 }, /* Profile 32. */ - { 160, 171 }, /* Profile 33. */ - { 160, 171 }, /* Profile 34. */ - { 160, 171 }, /* Profile 35. */ - { 160, 171 }, /* Profile 36. */ - { 160, 171 }, /* Profile 37. */ - { 160, 171 }, /* Profile 38. */ - { 160, 171 }, /* Profile 39. */ - { 160, 171 }, /* Profile 40. */ - { 160, 171 }, /* Profile 41. */ - { 160, 171 }, /* Profile 42. */ - { 160, 171 }, /* Profile 43. */ - { 160, 171 }, /* Profile 44. */ - { 160, 171 }, /* Profile 45. */ - { 160, 171 }, /* Profile 46. */ - { 160, 171 }, /* Profile 47. */ - { 160, 171 }, /* Profile 48. */ - { 160, 171 }, /* Profile 49. */ - { 160, 171 }, /* Profile 50. */ - { 160, 171 }, /* Profile 51. */ - { 160, 171 }, /* Profile 52. */ - { 160, 171 }, /* Profile 53. */ - { 160, 171 }, /* Profile 54. */ - { 160, 171 }, /* Profile 55. */ - { 160, 171 }, /* Profile 56. */ - { 160, 171 }, /* Profile 57. */ + { 128, 139 }, /* Profile 18. */ + { 128, 139 }, /* Profile 19. */ + { 128, 139 }, /* Profile 20. */ + { 128, 139 }, /* Profile 21. */ + { 128, 139 }, /* Profile 22. */ + { 128, 139 }, /* Profile 23. */ + { 128, 139 }, /* Profile 24. */ + { 128, 139 }, /* Profile 25. */ + { 128, 139 }, /* Profile 26. */ + { 128, 139 }, /* Profile 27. */ + { 128, 139 }, /* Profile 28. */ + { 128, 139 }, /* Profile 29. */ + { 128, 139 }, /* Profile 30. */ + { 128, 139 }, /* Profile 31. */ + { 128, 139 }, /* Profile 32. */ + { 128, 139 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "L3_DNAT_INDEX_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 192, 207 }, /* Profile 2. */ + { 256, 271 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ - { 192, 207 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ { -1, -1 }, /* Profile 6. */ - { 192, 207 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { 192, 207 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 7. */ + { 256, 271 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 256, 271 }, /* Profile 10. */ { -1, -1 }, /* Profile 11. */ - { 192, 207 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { 192, 207 }, /* Profile 14. */ + { -1, -1 }, /* Profile 12. */ + { 256, 271 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ { -1, -1 }, /* Profile 15. */ - { 192, 207 }, /* Profile 16. */ + { 256, 271 }, /* Profile 16. */ { -1, -1 }, /* Profile 17. */ - { 192, 207 }, /* Profile 18. */ + { 256, 271 }, /* Profile 18. */ { -1, -1 }, /* Profile 19. */ { -1, -1 }, /* Profile 20. */ - { 192, 207 }, /* Profile 21. */ + { 256, 271 }, /* Profile 21. */ { -1, -1 }, /* Profile 22. */ - { 192, 207 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 23. */ + { 256, 271 }, /* Profile 24. */ { -1, -1 }, /* Profile 25. */ - { 192, 207 }, /* Profile 26. */ + { 256, 271 }, /* Profile 26. */ { -1, -1 }, /* Profile 27. */ - { 192, 207 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { 208, 223 }, /* Profile 30. */ + { -1, -1 }, /* Profile 28. */ + { 256, 271 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ { -1, -1 }, /* Profile 31. */ - { 208, 223 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { 208, 223 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { 208, 223 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { 208, 223 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { 208, 223 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { 208, 223 }, /* Profile 44. */ - { -1, -1 }, /* Profile 45. */ - { 208, 223 }, /* Profile 46. */ - { -1, -1 }, /* Profile 47. */ - { -1, -1 }, /* Profile 48. */ - { 208, 223 }, /* Profile 49. */ - { -1, -1 }, /* Profile 50. */ - { 208, 223 }, /* Profile 51. */ - { -1, -1 }, /* Profile 52. */ - { -1, -1 }, /* Profile 53. */ - { 208, 223 }, /* Profile 54. */ - { -1, -1 }, /* Profile 55. */ - { 208, 223 }, /* Profile 56. */ + { 256, 271 }, /* Profile 32. */ }, - .profile_cnt = 57, + .profile_cnt = 33, }, { .name = "L3_IIF_13_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 352, 365 }, /* Profile 2. */ - { 320, 333 }, /* Profile 3. */ - { 352, 365 }, /* Profile 4. */ - { 352, 365 }, /* Profile 5. */ - { 352, 365 }, /* Profile 6. */ - { 352, 365 }, /* Profile 7. */ - { 320, 333 }, /* Profile 8. */ - { 352, 365 }, /* Profile 9. */ - { 352, 365 }, /* Profile 10. */ - { 352, 365 }, /* Profile 11. */ - { 352, 365 }, /* Profile 12. */ - { 320, 333 }, /* Profile 13. */ - { 352, 365 }, /* Profile 14. */ - { 352, 365 }, /* Profile 15. */ - { 352, 365 }, /* Profile 16. */ - { 320, 333 }, /* Profile 17. */ - { 352, 365 }, /* Profile 18. */ - { 352, 365 }, /* Profile 19. */ - { 352, 365 }, /* Profile 20. */ - { 352, 365 }, /* Profile 21. */ - { 320, 333 }, /* Profile 22. */ - { 352, 365 }, /* Profile 23. */ - { 352, 365 }, /* Profile 24. */ - { 352, 365 }, /* Profile 25. */ - { 352, 365 }, /* Profile 26. */ - { 320, 333 }, /* Profile 27. */ - { 352, 365 }, /* Profile 28. */ - { 352, 365 }, /* Profile 29. */ - { 352, 365 }, /* Profile 30. */ - { 320, 333 }, /* Profile 31. */ - { 352, 365 }, /* Profile 32. */ - { 352, 365 }, /* Profile 33. */ - { 352, 365 }, /* Profile 34. */ - { 352, 365 }, /* Profile 35. */ - { 320, 333 }, /* Profile 36. */ - { 352, 365 }, /* Profile 37. */ - { 352, 365 }, /* Profile 38. */ - { 352, 365 }, /* Profile 39. */ - { 352, 365 }, /* Profile 40. */ - { 320, 333 }, /* Profile 41. */ - { 352, 365 }, /* Profile 42. */ - { 352, 365 }, /* Profile 43. */ - { 352, 365 }, /* Profile 44. */ - { 320, 333 }, /* Profile 45. */ - { 352, 365 }, /* Profile 46. */ - { 352, 365 }, /* Profile 47. */ - { 352, 365 }, /* Profile 48. */ - { 352, 365 }, /* Profile 49. */ - { 320, 333 }, /* Profile 50. */ - { 352, 365 }, /* Profile 51. */ - { 352, 365 }, /* Profile 52. */ - { 352, 365 }, /* Profile 53. */ - { 352, 365 }, /* Profile 54. */ - { 320, 333 }, /* Profile 55. */ - { 352, 365 }, /* Profile 56. */ - { 352, 365 }, /* Profile 57. */ + { 288, 301 }, /* Profile 2. */ + { 288, 301 }, /* Profile 3. */ + { 288, 301 }, /* Profile 4. */ + { 288, 301 }, /* Profile 5. */ + { 288, 301 }, /* Profile 6. */ + { 288, 301 }, /* Profile 7. */ + { 288, 301 }, /* Profile 8. */ + { 288, 301 }, /* Profile 9. */ + { 288, 301 }, /* Profile 10. */ + { 288, 301 }, /* Profile 11. */ + { 288, 301 }, /* Profile 12. */ + { 288, 301 }, /* Profile 13. */ + { 288, 301 }, /* Profile 14. */ + { 288, 301 }, /* Profile 15. */ + { 288, 301 }, /* Profile 16. */ + { 288, 301 }, /* Profile 17. */ + { 288, 301 }, /* Profile 18. */ + { 288, 301 }, /* Profile 19. */ + { 288, 301 }, /* Profile 20. */ + { 288, 301 }, /* Profile 21. */ + { 288, 301 }, /* Profile 22. */ + { 288, 301 }, /* Profile 23. */ + { 288, 301 }, /* Profile 24. */ + { 288, 301 }, /* Profile 25. */ + { 288, 301 }, /* Profile 26. */ + { 288, 301 }, /* Profile 27. */ + { 288, 301 }, /* Profile 28. */ + { 288, 301 }, /* Profile 29. */ + { 288, 301 }, /* Profile 30. */ + { 288, 301 }, /* Profile 31. */ + { 288, 301 }, /* Profile 32. */ + { 288, 301 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "L3_OIF_1_13_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 160, 173 }, /* Profile 2. */ - { 160, 173 }, /* Profile 3. */ - { 160, 173 }, /* Profile 4. */ + { 192, 205 }, /* Profile 3. */ + { 192, 205 }, /* Profile 4. */ { 160, 173 }, /* Profile 5. */ - { 160, 173 }, /* Profile 6. */ - { 160, 173 }, /* Profile 7. */ + { 192, 205 }, /* Profile 6. */ + { 192, 205 }, /* Profile 7. */ { 160, 173 }, /* Profile 8. */ - { 160, 173 }, /* Profile 9. */ + { 192, 205 }, /* Profile 9. */ { 160, 173 }, /* Profile 10. */ - { 160, 173 }, /* Profile 11. */ - { 160, 173 }, /* Profile 12. */ + { 192, 205 }, /* Profile 11. */ + { 192, 205 }, /* Profile 12. */ { 160, 173 }, /* Profile 13. */ - { 160, 173 }, /* Profile 14. */ - { 160, 173 }, /* Profile 15. */ + { 192, 205 }, /* Profile 14. */ + { 192, 205 }, /* Profile 15. */ { 160, 173 }, /* Profile 16. */ - { 160, 173 }, /* Profile 17. */ - { 160, 173 }, /* Profile 18. */ - { 160, 173 }, /* Profile 19. */ - { 160, 173 }, /* Profile 20. */ - { 160, 173 }, /* Profile 21. */ - { 160, 173 }, /* Profile 22. */ - { 160, 173 }, /* Profile 23. */ - { 160, 173 }, /* Profile 24. */ - { 160, 173 }, /* Profile 25. */ - { 160, 173 }, /* Profile 26. */ - { 160, 173 }, /* Profile 27. */ - { 160, 173 }, /* Profile 28. */ - { 160, 173 }, /* Profile 29. */ - { 176, 189 }, /* Profile 30. */ - { 176, 189 }, /* Profile 31. */ + { 192, 205 }, /* Profile 17. */ + { 176, 189 }, /* Profile 18. */ + { 208, 221 }, /* Profile 19. */ + { 208, 221 }, /* Profile 20. */ + { 176, 189 }, /* Profile 21. */ + { 208, 221 }, /* Profile 22. */ + { 208, 221 }, /* Profile 23. */ + { 176, 189 }, /* Profile 24. */ + { 208, 221 }, /* Profile 25. */ + { 176, 189 }, /* Profile 26. */ + { 208, 221 }, /* Profile 27. */ + { 208, 221 }, /* Profile 28. */ + { 176, 189 }, /* Profile 29. */ + { 208, 221 }, /* Profile 30. */ + { 208, 221 }, /* Profile 31. */ { 176, 189 }, /* Profile 32. */ - { 176, 189 }, /* Profile 33. */ - { 176, 189 }, /* Profile 34. */ - { 176, 189 }, /* Profile 35. */ - { 176, 189 }, /* Profile 36. */ - { 176, 189 }, /* Profile 37. */ - { 176, 189 }, /* Profile 38. */ - { 176, 189 }, /* Profile 39. */ - { 176, 189 }, /* Profile 40. */ - { 176, 189 }, /* Profile 41. */ - { 176, 189 }, /* Profile 42. */ - { 176, 189 }, /* Profile 43. */ - { 176, 189 }, /* Profile 44. */ - { 176, 189 }, /* Profile 45. */ - { 176, 189 }, /* Profile 46. */ - { 176, 189 }, /* Profile 47. */ - { 176, 189 }, /* Profile 48. */ - { 176, 189 }, /* Profile 49. */ - { 176, 189 }, /* Profile 50. */ - { 176, 189 }, /* Profile 51. */ - { 176, 189 }, /* Profile 52. */ - { 176, 189 }, /* Profile 53. */ - { 176, 189 }, /* Profile 54. */ - { 176, 189 }, /* Profile 55. */ - { 176, 189 }, /* Profile 56. */ - { 176, 189 }, /* Profile 57. */ + { 208, 221 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "L3_SNAT_INDEX_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 304, 319 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 304, 319 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { 304, 319 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { 304, 319 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { 304, 319 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { 304, 319 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { 304, 319 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ - { 304, 319 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { 304, 319 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ - { 304, 319 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { 304, 319 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { 304, 319 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { 320, 335 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { 320, 335 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { 320, 335 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { 320, 335 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { 320, 335 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { 320, 335 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { 320, 335 }, /* Profile 44. */ - { -1, -1 }, /* Profile 45. */ - { 320, 335 }, /* Profile 46. */ - { -1, -1 }, /* Profile 47. */ - { -1, -1 }, /* Profile 48. */ - { 320, 335 }, /* Profile 49. */ - { -1, -1 }, /* Profile 50. */ - { 320, 335 }, /* Profile 51. */ - { -1, -1 }, /* Profile 52. */ - { -1, -1 }, /* Profile 53. */ - { 320, 335 }, /* Profile 54. */ - { -1, -1 }, /* Profile 55. */ - { 320, 335 }, /* Profile 56. */ - }, - .profile_cnt = 57, - }, - { - .name = "MAC_DA_23_20_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 392, 395 }, /* Profile 2. */ + { 240, 255 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ + { 240, 255 }, /* Profile 5. */ { -1, -1 }, /* Profile 6. */ - { 392, 395 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 7. */ + { 240, 255 }, /* Profile 8. */ { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ + { 240, 255 }, /* Profile 10. */ { -1, -1 }, /* Profile 11. */ - { 388, 391 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 12. */ + { 240, 255 }, /* Profile 13. */ { -1, -1 }, /* Profile 14. */ { -1, -1 }, /* Profile 15. */ - { 392, 395 }, /* Profile 16. */ + { 240, 255 }, /* Profile 16. */ { -1, -1 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ + { 240, 255 }, /* Profile 18. */ { -1, -1 }, /* Profile 19. */ { -1, -1 }, /* Profile 20. */ - { 392, 395 }, /* Profile 21. */ + { 240, 255 }, /* Profile 21. */ { -1, -1 }, /* Profile 22. */ { -1, -1 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ + { 240, 255 }, /* Profile 24. */ { -1, -1 }, /* Profile 25. */ - { 388, 391 }, /* Profile 26. */ + { 240, 255 }, /* Profile 26. */ { -1, -1 }, /* Profile 27. */ { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { 392, 395 }, /* Profile 30. */ + { 240, 255 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ { -1, -1 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { 392, 395 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { 388, 391 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { 392, 395 }, /* Profile 44. */ - { -1, -1 }, /* Profile 45. */ - { -1, -1 }, /* Profile 46. */ - { -1, -1 }, /* Profile 47. */ - { -1, -1 }, /* Profile 48. */ - { 392, 395 }, /* Profile 49. */ - { -1, -1 }, /* Profile 50. */ - { -1, -1 }, /* Profile 51. */ - { -1, -1 }, /* Profile 52. */ - { -1, -1 }, /* Profile 53. */ - { 388, 391 }, /* Profile 54. */ + { 240, 255 }, /* Profile 32. */ }, - .profile_cnt = 55, + .profile_cnt = 33, }, { .name = "MPLS_LABEL_DECAP_COUNT_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 400, 403 }, /* Profile 2. */ - { 392, 395 }, /* Profile 3. */ - { 400, 403 }, /* Profile 4. */ - { 396, 399 }, /* Profile 5. */ - { 396, 399 }, /* Profile 6. */ - { 400, 403 }, /* Profile 7. */ - { 392, 395 }, /* Profile 8. */ - { 400, 403 }, /* Profile 9. */ - { 396, 399 }, /* Profile 10. */ - { 396, 399 }, /* Profile 11. */ - { 396, 399 }, /* Profile 12. */ - { 388, 391 }, /* Profile 13. */ - { 396, 399 }, /* Profile 14. */ - { 392, 395 }, /* Profile 15. */ - { 400, 403 }, /* Profile 16. */ - { 392, 395 }, /* Profile 17. */ - { 400, 403 }, /* Profile 18. */ - { 396, 399 }, /* Profile 19. */ - { 396, 399 }, /* Profile 20. */ - { 400, 403 }, /* Profile 21. */ - { 392, 395 }, /* Profile 22. */ - { 400, 403 }, /* Profile 23. */ - { 396, 399 }, /* Profile 24. */ - { 396, 399 }, /* Profile 25. */ - { 396, 399 }, /* Profile 26. */ - { 388, 391 }, /* Profile 27. */ - { 396, 399 }, /* Profile 28. */ - { 392, 395 }, /* Profile 29. */ - { 400, 403 }, /* Profile 30. */ - { 392, 395 }, /* Profile 31. */ - { 400, 403 }, /* Profile 32. */ - { 396, 399 }, /* Profile 33. */ - { 396, 399 }, /* Profile 34. */ - { 400, 403 }, /* Profile 35. */ - { 392, 395 }, /* Profile 36. */ - { 400, 403 }, /* Profile 37. */ - { 396, 399 }, /* Profile 38. */ - { 396, 399 }, /* Profile 39. */ - { 396, 399 }, /* Profile 40. */ - { 388, 391 }, /* Profile 41. */ - { 396, 399 }, /* Profile 42. */ - { 392, 395 }, /* Profile 43. */ - { 400, 403 }, /* Profile 44. */ - { 392, 395 }, /* Profile 45. */ - { 400, 403 }, /* Profile 46. */ - { 396, 399 }, /* Profile 47. */ - { 396, 399 }, /* Profile 48. */ - { 400, 403 }, /* Profile 49. */ - { 392, 395 }, /* Profile 50. */ - { 400, 403 }, /* Profile 51. */ - { 396, 399 }, /* Profile 52. */ - { 396, 399 }, /* Profile 53. */ - { 396, 399 }, /* Profile 54. */ - { 388, 391 }, /* Profile 55. */ - { 396, 399 }, /* Profile 56. */ - { 392, 395 }, /* Profile 57. */ + { 412, 415 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 408, 411 }, /* Profile 6. */ + { 408, 411 }, /* Profile 7. */ + { 408, 411 }, /* Profile 8. */ + { 404, 407 }, /* Profile 9. */ + { 412, 415 }, /* Profile 10. */ + { 408, 411 }, /* Profile 11. */ + { 408, 411 }, /* Profile 12. */ + { 412, 415 }, /* Profile 13. */ + { 408, 411 }, /* Profile 14. */ + { 408, 411 }, /* Profile 15. */ + { 408, 411 }, /* Profile 16. */ + { 404, 407 }, /* Profile 17. */ + { 412, 415 }, /* Profile 18. */ + { 408, 411 }, /* Profile 19. */ + { 408, 411 }, /* Profile 20. */ + { 412, 415 }, /* Profile 21. */ + { 408, 411 }, /* Profile 22. */ + { 408, 411 }, /* Profile 23. */ + { 408, 411 }, /* Profile 24. */ + { 404, 407 }, /* Profile 25. */ + { 412, 415 }, /* Profile 26. */ + { 408, 411 }, /* Profile 27. */ + { 408, 411 }, /* Profile 28. */ + { 412, 415 }, /* Profile 29. */ + { 408, 411 }, /* Profile 30. */ + { 408, 411 }, /* Profile 31. */ + { 408, 411 }, /* Profile 32. */ + { 404, 407 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 288, 303 }, /* Profile 2. */ + { 272, 287 }, /* Profile 2. */ { 272, 287 }, /* Profile 3. */ - { 288, 303 }, /* Profile 4. */ + { 272, 287 }, /* Profile 4. */ { 272, 287 }, /* Profile 5. */ { 272, 287 }, /* Profile 6. */ - { 288, 303 }, /* Profile 7. */ + { 272, 287 }, /* Profile 7. */ { 272, 287 }, /* Profile 8. */ - { 288, 303 }, /* Profile 9. */ + { 272, 287 }, /* Profile 9. */ { 272, 287 }, /* Profile 10. */ { 272, 287 }, /* Profile 11. */ - { 288, 303 }, /* Profile 12. */ + { 272, 287 }, /* Profile 12. */ { 272, 287 }, /* Profile 13. */ - { 288, 303 }, /* Profile 14. */ + { 272, 287 }, /* Profile 14. */ { 272, 287 }, /* Profile 15. */ - { 288, 303 }, /* Profile 16. */ + { 272, 287 }, /* Profile 16. */ { 272, 287 }, /* Profile 17. */ - { 288, 303 }, /* Profile 18. */ + { 272, 287 }, /* Profile 18. */ { 272, 287 }, /* Profile 19. */ { 272, 287 }, /* Profile 20. */ - { 288, 303 }, /* Profile 21. */ + { 272, 287 }, /* Profile 21. */ { 272, 287 }, /* Profile 22. */ - { 288, 303 }, /* Profile 23. */ + { 272, 287 }, /* Profile 23. */ { 272, 287 }, /* Profile 24. */ { 272, 287 }, /* Profile 25. */ - { 288, 303 }, /* Profile 26. */ + { 272, 287 }, /* Profile 26. */ { 272, 287 }, /* Profile 27. */ - { 288, 303 }, /* Profile 28. */ + { 272, 287 }, /* Profile 28. */ { 272, 287 }, /* Profile 29. */ - { 304, 319 }, /* Profile 30. */ - { 288, 303 }, /* Profile 31. */ - { 304, 319 }, /* Profile 32. */ - { 288, 303 }, /* Profile 33. */ - { 288, 303 }, /* Profile 34. */ - { 304, 319 }, /* Profile 35. */ - { 288, 303 }, /* Profile 36. */ - { 304, 319 }, /* Profile 37. */ - { 288, 303 }, /* Profile 38. */ - { 288, 303 }, /* Profile 39. */ - { 304, 319 }, /* Profile 40. */ - { 288, 303 }, /* Profile 41. */ - { 304, 319 }, /* Profile 42. */ - { 288, 303 }, /* Profile 43. */ - { 304, 319 }, /* Profile 44. */ - { 288, 303 }, /* Profile 45. */ - { 304, 319 }, /* Profile 46. */ - { 288, 303 }, /* Profile 47. */ - { 288, 303 }, /* Profile 48. */ - { 304, 319 }, /* Profile 49. */ - { 288, 303 }, /* Profile 50. */ - { 304, 319 }, /* Profile 51. */ - { 288, 303 }, /* Profile 52. */ - { 288, 303 }, /* Profile 53. */ - { 304, 319 }, /* Profile 54. */ - { 288, 303 }, /* Profile 55. */ - { 304, 319 }, /* Profile 56. */ - { 288, 303 }, /* Profile 57. */ + { 272, 287 }, /* Profile 30. */ + { 272, 287 }, /* Profile 31. */ + { 272, 287 }, /* Profile 32. */ + { 272, 287 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "NHOP_INDEX_1_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 256, 271 }, /* Profile 2. */ - { 240, 255 }, /* Profile 3. */ - { 256, 271 }, /* Profile 4. */ - { 240, 255 }, /* Profile 5. */ - { 240, 255 }, /* Profile 6. */ - { 256, 271 }, /* Profile 7. */ - { 240, 255 }, /* Profile 8. */ - { 256, 271 }, /* Profile 9. */ - { 240, 255 }, /* Profile 10. */ - { 240, 255 }, /* Profile 11. */ - { 256, 271 }, /* Profile 12. */ - { 240, 255 }, /* Profile 13. */ - { 256, 271 }, /* Profile 14. */ - { 240, 255 }, /* Profile 15. */ - { 256, 271 }, /* Profile 16. */ - { 240, 255 }, /* Profile 17. */ - { 256, 271 }, /* Profile 18. */ - { 240, 255 }, /* Profile 19. */ - { 240, 255 }, /* Profile 20. */ - { 256, 271 }, /* Profile 21. */ - { 240, 255 }, /* Profile 22. */ - { 256, 271 }, /* Profile 23. */ - { 240, 255 }, /* Profile 24. */ - { 240, 255 }, /* Profile 25. */ - { 256, 271 }, /* Profile 26. */ - { 240, 255 }, /* Profile 27. */ - { 256, 271 }, /* Profile 28. */ - { 240, 255 }, /* Profile 29. */ - { 272, 287 }, /* Profile 30. */ - { 256, 271 }, /* Profile 31. */ - { 272, 287 }, /* Profile 32. */ - { 256, 271 }, /* Profile 33. */ - { 256, 271 }, /* Profile 34. */ - { 272, 287 }, /* Profile 35. */ - { 256, 271 }, /* Profile 36. */ - { 272, 287 }, /* Profile 37. */ - { 256, 271 }, /* Profile 38. */ - { 256, 271 }, /* Profile 39. */ - { 272, 287 }, /* Profile 40. */ - { 256, 271 }, /* Profile 41. */ - { 272, 287 }, /* Profile 42. */ - { 256, 271 }, /* Profile 43. */ - { 272, 287 }, /* Profile 44. */ - { 256, 271 }, /* Profile 45. */ - { 272, 287 }, /* Profile 46. */ - { 256, 271 }, /* Profile 47. */ - { 256, 271 }, /* Profile 48. */ - { 272, 287 }, /* Profile 49. */ - { 256, 271 }, /* Profile 50. */ - { 272, 287 }, /* Profile 51. */ - { 256, 271 }, /* Profile 52. */ - { 256, 271 }, /* Profile 53. */ - { 272, 287 }, /* Profile 54. */ - { 256, 271 }, /* Profile 55. */ - { 272, 287 }, /* Profile 56. */ - { 256, 271 }, /* Profile 57. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 336, 351 }, /* Profile 5. */ + { 336, 351 }, /* Profile 6. */ + { 336, 351 }, /* Profile 7. */ + { 336, 351 }, /* Profile 8. */ + { 336, 351 }, /* Profile 9. */ + { 336, 351 }, /* Profile 10. */ + { 336, 351 }, /* Profile 11. */ + { 336, 351 }, /* Profile 12. */ + { 336, 351 }, /* Profile 13. */ + { 336, 351 }, /* Profile 14. */ + { 336, 351 }, /* Profile 15. */ + { 336, 351 }, /* Profile 16. */ + { 336, 351 }, /* Profile 17. */ + { 336, 351 }, /* Profile 18. */ + { 336, 351 }, /* Profile 19. */ + { 336, 351 }, /* Profile 20. */ + { 336, 351 }, /* Profile 21. */ + { 336, 351 }, /* Profile 22. */ + { 336, 351 }, /* Profile 23. */ + { 336, 351 }, /* Profile 24. */ + { 336, 351 }, /* Profile 25. */ + { 336, 351 }, /* Profile 26. */ + { 336, 351 }, /* Profile 27. */ + { 336, 351 }, /* Profile 28. */ + { 336, 351 }, /* Profile 29. */ + { 336, 351 }, /* Profile 30. */ + { 336, 351 }, /* Profile 31. */ + { 336, 351 }, /* Profile 32. */ + { 336, 351 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "PARSER_VHLEN_0_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2590,483 +1697,258 @@ static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_ { 64, 79 }, /* Profile 31. */ { 64, 79 }, /* Profile 32. */ { 64, 79 }, /* Profile 33. */ - { 64, 79 }, /* Profile 34. */ - { 64, 79 }, /* Profile 35. */ - { 64, 79 }, /* Profile 36. */ - { 64, 79 }, /* Profile 37. */ - { 64, 79 }, /* Profile 38. */ - { 64, 79 }, /* Profile 39. */ - { 64, 79 }, /* Profile 40. */ - { 64, 79 }, /* Profile 41. */ - { 64, 79 }, /* Profile 42. */ - { 64, 79 }, /* Profile 43. */ - { 64, 79 }, /* Profile 44. */ - { 64, 79 }, /* Profile 45. */ - { 64, 79 }, /* Profile 46. */ - { 64, 79 }, /* Profile 47. */ - { 64, 79 }, /* Profile 48. */ - { 64, 79 }, /* Profile 49. */ - { 64, 79 }, /* Profile 50. */ - { 64, 79 }, /* Profile 51. */ - { 64, 79 }, /* Profile 52. */ - { 64, 79 }, /* Profile 53. */ - { 64, 79 }, /* Profile 54. */ - { 64, 79 }, /* Profile 55. */ - { 64, 79 }, /* Profile 56. */ - { 64, 79 }, /* Profile 57. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 376, 379 }, /* Profile 2. */ - { 360, 363 }, /* Profile 3. */ - { 380, 383 }, /* Profile 4. */ - { 376, 379 }, /* Profile 5. */ + { 400, 403 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + { 396, 399 }, /* Profile 6. */ + { 396, 399 }, /* Profile 7. */ + { 396, 399 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ + { 400, 403 }, /* Profile 10. */ + { 396, 399 }, /* Profile 11. */ + { 396, 399 }, /* Profile 12. */ + { 400, 403 }, /* Profile 13. */ + { 396, 399 }, /* Profile 14. */ + { 396, 399 }, /* Profile 15. */ + { 396, 399 }, /* Profile 16. */ + { 392, 395 }, /* Profile 17. */ + { 400, 403 }, /* Profile 18. */ + { 396, 399 }, /* Profile 19. */ + { 396, 399 }, /* Profile 20. */ + { 400, 403 }, /* Profile 21. */ + { 396, 399 }, /* Profile 22. */ + { 396, 399 }, /* Profile 23. */ + { 396, 399 }, /* Profile 24. */ + { 392, 395 }, /* Profile 25. */ + { 400, 403 }, /* Profile 26. */ + { 396, 399 }, /* Profile 27. */ + { 396, 399 }, /* Profile 28. */ + { 400, 403 }, /* Profile 29. */ + { 396, 399 }, /* Profile 30. */ + { 396, 399 }, /* Profile 31. */ + { 396, 399 }, /* Profile 32. */ + { 392, 395 }, /* Profile 33. */ + }, + .profile_cnt = 34, + }, + { + .name = "SVP_15_0", + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 367 }, /* Profile 2. */ + { 352, 367 }, /* Profile 3. */ + { 352, 367 }, /* Profile 4. */ + { 352, 367 }, /* Profile 5. */ + { 352, 367 }, /* Profile 6. */ + { 352, 367 }, /* Profile 7. */ + { 352, 367 }, /* Profile 8. */ + { 352, 367 }, /* Profile 9. */ + { 352, 367 }, /* Profile 10. */ + { 352, 367 }, /* Profile 11. */ + { 352, 367 }, /* Profile 12. */ + { 352, 367 }, /* Profile 13. */ + { 352, 367 }, /* Profile 14. */ + { 352, 367 }, /* Profile 15. */ + { 352, 367 }, /* Profile 16. */ + { 352, 367 }, /* Profile 17. */ + { 352, 367 }, /* Profile 18. */ + { 352, 367 }, /* Profile 19. */ + { 352, 367 }, /* Profile 20. */ + { 352, 367 }, /* Profile 21. */ + { 352, 367 }, /* Profile 22. */ + { 352, 367 }, /* Profile 23. */ + { 352, 367 }, /* Profile 24. */ + { 352, 367 }, /* Profile 25. */ + { 352, 367 }, /* Profile 26. */ + { 352, 367 }, /* Profile 27. */ + { 352, 367 }, /* Profile 28. */ + { 352, 367 }, /* Profile 29. */ + { 352, 367 }, /* Profile 30. */ + { 352, 367 }, /* Profile 31. */ + { 352, 367 }, /* Profile 32. */ + { 352, 367 }, /* Profile 33. */ + }, + .profile_cnt = 34, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 376, 379 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ { 376, 379 }, /* Profile 6. */ { 376, 379 }, /* Profile 7. */ - { 360, 363 }, /* Profile 8. */ - { 380, 383 }, /* Profile 9. */ - { 376, 379 }, /* Profile 10. */ + { 380, 383 }, /* Profile 8. */ + { 376, 379 }, /* Profile 9. */ + { 380, 383 }, /* Profile 10. */ { 376, 379 }, /* Profile 11. */ - { 372, 375 }, /* Profile 12. */ - { 356, 359 }, /* Profile 13. */ + { 376, 379 }, /* Profile 12. */ + { 380, 383 }, /* Profile 13. */ { 376, 379 }, /* Profile 14. */ - { 372, 375 }, /* Profile 15. */ - { 376, 379 }, /* Profile 16. */ - { 360, 363 }, /* Profile 17. */ + { 376, 379 }, /* Profile 15. */ + { 380, 383 }, /* Profile 16. */ + { 376, 379 }, /* Profile 17. */ { 380, 383 }, /* Profile 18. */ { 376, 379 }, /* Profile 19. */ { 376, 379 }, /* Profile 20. */ - { 376, 379 }, /* Profile 21. */ - { 360, 363 }, /* Profile 22. */ - { 380, 383 }, /* Profile 23. */ - { 376, 379 }, /* Profile 24. */ + { 380, 383 }, /* Profile 21. */ + { 376, 379 }, /* Profile 22. */ + { 376, 379 }, /* Profile 23. */ + { 380, 383 }, /* Profile 24. */ { 376, 379 }, /* Profile 25. */ - { 372, 375 }, /* Profile 26. */ - { 356, 359 }, /* Profile 27. */ + { 380, 383 }, /* Profile 26. */ + { 376, 379 }, /* Profile 27. */ { 376, 379 }, /* Profile 28. */ - { 372, 375 }, /* Profile 29. */ + { 380, 383 }, /* Profile 29. */ { 376, 379 }, /* Profile 30. */ - { 360, 363 }, /* Profile 31. */ + { 376, 379 }, /* Profile 31. */ { 380, 383 }, /* Profile 32. */ { 376, 379 }, /* Profile 33. */ - { 376, 379 }, /* Profile 34. */ - { 376, 379 }, /* Profile 35. */ - { 360, 363 }, /* Profile 36. */ - { 380, 383 }, /* Profile 37. */ - { 376, 379 }, /* Profile 38. */ - { 376, 379 }, /* Profile 39. */ - { 372, 375 }, /* Profile 40. */ - { 356, 359 }, /* Profile 41. */ - { 376, 379 }, /* Profile 42. */ - { 372, 375 }, /* Profile 43. */ - { 376, 379 }, /* Profile 44. */ - { 360, 363 }, /* Profile 45. */ - { 380, 383 }, /* Profile 46. */ - { 376, 379 }, /* Profile 47. */ - { 376, 379 }, /* Profile 48. */ - { 376, 379 }, /* Profile 49. */ - { 360, 363 }, /* Profile 50. */ - { 380, 383 }, /* Profile 51. */ - { 376, 379 }, /* Profile 52. */ - { 376, 379 }, /* Profile 53. */ - { 372, 375 }, /* Profile 54. */ - { 356, 359 }, /* Profile 55. */ - { 376, 379 }, /* Profile 56. */ - { 372, 375 }, /* Profile 57. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { - .name = "SRV6_DIP_EDIT_CTRL_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0, + .name = "SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0", + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 384, 387 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { 384, 387 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { 380, 383 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { -1, -1 }, /* Profile 16. */ - { 384, 387 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { 384, 387 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { 380, 383 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { 384, 387 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { 384, 387 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { 380, 383 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { -1, -1 }, /* Profile 44. */ - { 384, 387 }, /* Profile 45. */ - { -1, -1 }, /* Profile 46. */ - { -1, -1 }, /* Profile 47. */ - { -1, -1 }, /* Profile 48. */ - { -1, -1 }, /* Profile 49. */ - { 384, 387 }, /* Profile 50. */ - { -1, -1 }, /* Profile 51. */ - { -1, -1 }, /* Profile 52. */ - { -1, -1 }, /* Profile 53. */ - { -1, -1 }, /* Profile 54. */ - { 380, 383 }, /* Profile 55. */ - }, - .profile_cnt = 56, - }, - { - .name = "SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 416, 419 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ + { 420, 423 }, /* Profile 2. */ + { 420, 423 }, /* Profile 3. */ + { 420, 423 }, /* Profile 4. */ + { 420, 423 }, /* Profile 5. */ + { 420, 423 }, /* Profile 6. */ + { 420, 423 }, /* Profile 7. */ { 416, 419 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { 412, 415 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { -1, -1 }, /* Profile 16. */ + { 416, 419 }, /* Profile 9. */ + { 420, 423 }, /* Profile 10. */ + { 420, 423 }, /* Profile 11. */ + { 420, 423 }, /* Profile 12. */ + { 420, 423 }, /* Profile 13. */ + { 420, 423 }, /* Profile 14. */ + { 420, 423 }, /* Profile 15. */ + { 416, 419 }, /* Profile 16. */ { 416, 419 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { 416, 419 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { 412, 415 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { 416, 419 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { 416, 419 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { 412, 415 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { -1, -1 }, /* Profile 44. */ - { 416, 419 }, /* Profile 45. */ - { -1, -1 }, /* Profile 46. */ - { -1, -1 }, /* Profile 47. */ - { -1, -1 }, /* Profile 48. */ - { -1, -1 }, /* Profile 49. */ - { 416, 419 }, /* Profile 50. */ - { -1, -1 }, /* Profile 51. */ - { -1, -1 }, /* Profile 52. */ - { -1, -1 }, /* Profile 53. */ - { -1, -1 }, /* Profile 54. */ - { 412, 415 }, /* Profile 55. */ - }, - .profile_cnt = 56, - }, - { - .name = "SRV6_NEW_GSID_SI_2_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 372, 374 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { 372, 374 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { 368, 370 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { -1, -1 }, /* Profile 16. */ - { 372, 374 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { 372, 374 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { 368, 370 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { 372, 374 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { 372, 374 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { 368, 370 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { -1, -1 }, /* Profile 44. */ - { 372, 374 }, /* Profile 45. */ - { -1, -1 }, /* Profile 46. */ - { -1, -1 }, /* Profile 47. */ - { -1, -1 }, /* Profile 48. */ - { -1, -1 }, /* Profile 49. */ - { 372, 374 }, /* Profile 50. */ - { -1, -1 }, /* Profile 51. */ - { -1, -1 }, /* Profile 52. */ - { -1, -1 }, /* Profile 53. */ - { -1, -1 }, /* Profile 54. */ - { 368, 370 }, /* Profile 55. */ - }, - .profile_cnt = 56, - }, - { - .name = "SRV6_SID_AND_PREFIX_LEN_ENC_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 368, 371 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { 368, 371 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { 364, 367 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { -1, -1 }, /* Profile 16. */ - { 368, 371 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { 368, 371 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { 364, 367 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { 368, 371 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { 368, 371 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { 364, 367 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { -1, -1 }, /* Profile 44. */ - { 368, 371 }, /* Profile 45. */ - { -1, -1 }, /* Profile 46. */ - { -1, -1 }, /* Profile 47. */ - { -1, -1 }, /* Profile 48. */ - { -1, -1 }, /* Profile 49. */ - { 368, 371 }, /* Profile 50. */ - { -1, -1 }, /* Profile 51. */ - { -1, -1 }, /* Profile 52. */ - { -1, -1 }, /* Profile 53. */ - { -1, -1 }, /* Profile 54. */ - { 364, 367 }, /* Profile 55. */ + { 420, 423 }, /* Profile 18. */ + { 420, 423 }, /* Profile 19. */ + { 420, 423 }, /* Profile 20. */ + { 420, 423 }, /* Profile 21. */ + { 420, 423 }, /* Profile 22. */ + { 420, 423 }, /* Profile 23. */ + { 416, 419 }, /* Profile 24. */ + { 416, 419 }, /* Profile 25. */ + { 420, 423 }, /* Profile 26. */ + { 420, 423 }, /* Profile 27. */ + { 420, 423 }, /* Profile 28. */ + { 420, 423 }, /* Profile 29. */ + { 420, 423 }, /* Profile 30. */ + { 420, 423 }, /* Profile 31. */ + { 416, 419 }, /* Profile 32. */ + { 416, 419 }, /* Profile 33. */ }, - .profile_cnt = 56, + .profile_cnt = 34, }, { - .name = "SVP_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SVP_15_0, + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 240, 255 }, /* Profile 2. */ - { 224, 239 }, /* Profile 3. */ - { 240, 255 }, /* Profile 4. */ - { 224, 239 }, /* Profile 5. */ - { 224, 239 }, /* Profile 6. */ - { 240, 255 }, /* Profile 7. */ - { 224, 239 }, /* Profile 8. */ - { 240, 255 }, /* Profile 9. */ - { 224, 239 }, /* Profile 10. */ - { 224, 239 }, /* Profile 11. */ - { 240, 255 }, /* Profile 12. */ - { 224, 239 }, /* Profile 13. */ - { 240, 255 }, /* Profile 14. */ - { 224, 239 }, /* Profile 15. */ - { 240, 255 }, /* Profile 16. */ - { 224, 239 }, /* Profile 17. */ - { 240, 255 }, /* Profile 18. */ - { 224, 239 }, /* Profile 19. */ - { 224, 239 }, /* Profile 20. */ - { 240, 255 }, /* Profile 21. */ - { 224, 239 }, /* Profile 22. */ - { 240, 255 }, /* Profile 23. */ - { 224, 239 }, /* Profile 24. */ - { 224, 239 }, /* Profile 25. */ - { 240, 255 }, /* Profile 26. */ - { 224, 239 }, /* Profile 27. */ - { 240, 255 }, /* Profile 28. */ - { 224, 239 }, /* Profile 29. */ - { 256, 271 }, /* Profile 30. */ - { 240, 255 }, /* Profile 31. */ - { 256, 271 }, /* Profile 32. */ - { 240, 255 }, /* Profile 33. */ - { 240, 255 }, /* Profile 34. */ - { 256, 271 }, /* Profile 35. */ - { 240, 255 }, /* Profile 36. */ - { 256, 271 }, /* Profile 37. */ - { 240, 255 }, /* Profile 38. */ - { 240, 255 }, /* Profile 39. */ - { 256, 271 }, /* Profile 40. */ - { 240, 255 }, /* Profile 41. */ - { 256, 271 }, /* Profile 42. */ - { 240, 255 }, /* Profile 43. */ - { 256, 271 }, /* Profile 44. */ - { 240, 255 }, /* Profile 45. */ - { 256, 271 }, /* Profile 46. */ - { 240, 255 }, /* Profile 47. */ - { 240, 255 }, /* Profile 48. */ - { 256, 271 }, /* Profile 49. */ - { 240, 255 }, /* Profile 50. */ - { 256, 271 }, /* Profile 51. */ - { 240, 255 }, /* Profile 52. */ - { 240, 255 }, /* Profile 53. */ - { 256, 271 }, /* Profile 54. */ - { 240, 255 }, /* Profile 55. */ - { 256, 271 }, /* Profile 56. */ - { 240, 255 }, /* Profile 57. */ + { 128, 143 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 160, 175 }, /* Profile 6. */ + { 160, 175 }, /* Profile 7. */ + { 128, 143 }, /* Profile 8. */ + { 160, 175 }, /* Profile 9. */ + { 128, 143 }, /* Profile 10. */ + { 160, 175 }, /* Profile 11. */ + { 160, 175 }, /* Profile 12. */ + { 128, 143 }, /* Profile 13. */ + { 160, 175 }, /* Profile 14. */ + { 160, 175 }, /* Profile 15. */ + { 128, 143 }, /* Profile 16. */ + { 160, 175 }, /* Profile 17. */ + { 144, 159 }, /* Profile 18. */ + { 176, 191 }, /* Profile 19. */ + { 176, 191 }, /* Profile 20. */ + { 144, 159 }, /* Profile 21. */ + { 176, 191 }, /* Profile 22. */ + { 176, 191 }, /* Profile 23. */ + { 144, 159 }, /* Profile 24. */ + { 176, 191 }, /* Profile 25. */ + { 144, 159 }, /* Profile 26. */ + { 176, 191 }, /* Profile 27. */ + { 176, 191 }, /* Profile 28. */ + { 144, 159 }, /* Profile 29. */ + { 176, 191 }, /* Profile 30. */ + { 176, 191 }, /* Profile 31. */ + { 144, 159 }, /* Profile 32. */ + { 176, 191 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { - .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 384, 387 }, /* Profile 2. */ - { 376, 379 }, /* Profile 3. */ - { 388, 391 }, /* Profile 4. */ - { 384, 387 }, /* Profile 5. */ - { 384, 387 }, /* Profile 6. */ - { 384, 387 }, /* Profile 7. */ - { 376, 379 }, /* Profile 8. */ - { 388, 391 }, /* Profile 9. */ - { 384, 387 }, /* Profile 10. */ - { 384, 387 }, /* Profile 11. */ - { 380, 383 }, /* Profile 12. */ - { 372, 375 }, /* Profile 13. */ - { 384, 387 }, /* Profile 14. */ - { 380, 383 }, /* Profile 15. */ - { 384, 387 }, /* Profile 16. */ - { 376, 379 }, /* Profile 17. */ - { 388, 391 }, /* Profile 18. */ - { 384, 387 }, /* Profile 19. */ - { 384, 387 }, /* Profile 20. */ - { 384, 387 }, /* Profile 21. */ - { 376, 379 }, /* Profile 22. */ - { 388, 391 }, /* Profile 23. */ - { 384, 387 }, /* Profile 24. */ - { 384, 387 }, /* Profile 25. */ - { 380, 383 }, /* Profile 26. */ - { 372, 375 }, /* Profile 27. */ - { 384, 387 }, /* Profile 28. */ - { 380, 383 }, /* Profile 29. */ - { 384, 387 }, /* Profile 30. */ - { 376, 379 }, /* Profile 31. */ - { 388, 391 }, /* Profile 32. */ - { 384, 387 }, /* Profile 33. */ - { 384, 387 }, /* Profile 34. */ - { 384, 387 }, /* Profile 35. */ - { 376, 379 }, /* Profile 36. */ - { 388, 391 }, /* Profile 37. */ - { 384, 387 }, /* Profile 38. */ - { 384, 387 }, /* Profile 39. */ - { 380, 383 }, /* Profile 40. */ - { 372, 375 }, /* Profile 41. */ - { 384, 387 }, /* Profile 42. */ - { 380, 383 }, /* Profile 43. */ - { 384, 387 }, /* Profile 44. */ - { 376, 379 }, /* Profile 45. */ - { 388, 391 }, /* Profile 46. */ - { 384, 387 }, /* Profile 47. */ - { 384, 387 }, /* Profile 48. */ - { 384, 387 }, /* Profile 49. */ - { 376, 379 }, /* Profile 50. */ - { 388, 391 }, /* Profile 51. */ - { 384, 387 }, /* Profile 52. */ - { 384, 387 }, /* Profile 53. */ - { 380, 383 }, /* Profile 54. */ - { 372, 375 }, /* Profile 55. */ - { 384, 387 }, /* Profile 56. */ - { 380, 383 }, /* Profile 57. */ + { 404, 407 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + { 400, 403 }, /* Profile 6. */ + { 400, 403 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 396, 399 }, /* Profile 9. */ + { 404, 407 }, /* Profile 10. */ + { 400, 403 }, /* Profile 11. */ + { 400, 403 }, /* Profile 12. */ + { 404, 407 }, /* Profile 13. */ + { 400, 403 }, /* Profile 14. */ + { 400, 403 }, /* Profile 15. */ + { 400, 403 }, /* Profile 16. */ + { 396, 399 }, /* Profile 17. */ + { 404, 407 }, /* Profile 18. */ + { 400, 403 }, /* Profile 19. */ + { 400, 403 }, /* Profile 20. */ + { 404, 407 }, /* Profile 21. */ + { 400, 403 }, /* Profile 22. */ + { 400, 403 }, /* Profile 23. */ + { 400, 403 }, /* Profile 24. */ + { 396, 399 }, /* Profile 25. */ + { 404, 407 }, /* Profile 26. */ + { 400, 403 }, /* Profile 27. */ + { 400, 403 }, /* Profile 28. */ + { 404, 407 }, /* Profile 29. */ + { 400, 403 }, /* Profile 30. */ + { 400, 403 }, /* Profile 31. */ + { 400, 403 }, /* Profile 32. */ + { 396, 399 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { - .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3102,296 +1984,94 @@ static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_ { 80, 95 }, /* Profile 31. */ { 80, 95 }, /* Profile 32. */ { 80, 95 }, /* Profile 33. */ - { 80, 95 }, /* Profile 34. */ - { 80, 95 }, /* Profile 35. */ - { 80, 95 }, /* Profile 36. */ - { 80, 95 }, /* Profile 37. */ - { 80, 95 }, /* Profile 38. */ - { 80, 95 }, /* Profile 39. */ - { 80, 95 }, /* Profile 40. */ - { 80, 95 }, /* Profile 41. */ - { 80, 95 }, /* Profile 42. */ - { 80, 95 }, /* Profile 43. */ - { 80, 95 }, /* Profile 44. */ - { 80, 95 }, /* Profile 45. */ - { 80, 95 }, /* Profile 46. */ - { 80, 95 }, /* Profile 47. */ - { 80, 95 }, /* Profile 48. */ - { 80, 95 }, /* Profile 49. */ - { 80, 95 }, /* Profile 50. */ - { 80, 95 }, /* Profile 51. */ - { 80, 95 }, /* Profile 52. */ - { 80, 95 }, /* Profile 53. */ - { 80, 95 }, /* Profile 54. */ - { 80, 95 }, /* Profile 55. */ - { 80, 95 }, /* Profile 56. */ - { 80, 95 }, /* Profile 57. */ - }, - .profile_cnt = 58, - }, - { - .name = "SYSTEM_OPCODE_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 396, 399 }, /* Profile 2. */ - { 388, 391 }, /* Profile 3. */ - { 396, 399 }, /* Profile 4. */ - { 392, 395 }, /* Profile 5. */ - { 392, 395 }, /* Profile 6. */ - { 396, 399 }, /* Profile 7. */ - { 388, 391 }, /* Profile 8. */ - { 396, 399 }, /* Profile 9. */ - { 392, 395 }, /* Profile 10. */ - { 392, 395 }, /* Profile 11. */ - { 392, 395 }, /* Profile 12. */ - { 384, 387 }, /* Profile 13. */ - { 392, 395 }, /* Profile 14. */ - { 388, 391 }, /* Profile 15. */ - { 396, 399 }, /* Profile 16. */ - { 388, 391 }, /* Profile 17. */ - { 396, 399 }, /* Profile 18. */ - { 392, 395 }, /* Profile 19. */ - { 392, 395 }, /* Profile 20. */ - { 396, 399 }, /* Profile 21. */ - { 388, 391 }, /* Profile 22. */ - { 396, 399 }, /* Profile 23. */ - { 392, 395 }, /* Profile 24. */ - { 392, 395 }, /* Profile 25. */ - { 392, 395 }, /* Profile 26. */ - { 384, 387 }, /* Profile 27. */ - { 392, 395 }, /* Profile 28. */ - { 388, 391 }, /* Profile 29. */ - { 396, 399 }, /* Profile 30. */ - { 388, 391 }, /* Profile 31. */ - { 396, 399 }, /* Profile 32. */ - { 392, 395 }, /* Profile 33. */ - { 392, 395 }, /* Profile 34. */ - { 396, 399 }, /* Profile 35. */ - { 388, 391 }, /* Profile 36. */ - { 396, 399 }, /* Profile 37. */ - { 392, 395 }, /* Profile 38. */ - { 392, 395 }, /* Profile 39. */ - { 392, 395 }, /* Profile 40. */ - { 384, 387 }, /* Profile 41. */ - { 392, 395 }, /* Profile 42. */ - { 388, 391 }, /* Profile 43. */ - { 396, 399 }, /* Profile 44. */ - { 388, 391 }, /* Profile 45. */ - { 396, 399 }, /* Profile 46. */ - { 392, 395 }, /* Profile 47. */ - { 392, 395 }, /* Profile 48. */ - { 396, 399 }, /* Profile 49. */ - { 388, 391 }, /* Profile 50. */ - { 396, 399 }, /* Profile 51. */ - { 392, 395 }, /* Profile 52. */ - { 392, 395 }, /* Profile 53. */ - { 392, 395 }, /* Profile 54. */ - { 384, 387 }, /* Profile 55. */ - { 392, 395 }, /* Profile 56. */ - { 388, 391 }, /* Profile 57. */ - }, - .profile_cnt = 58, - }, - { - .name = "SYSTEM_SOURCE_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 96, 111 }, /* Profile 2. */ - { 96, 111 }, /* Profile 3. */ - { 96, 111 }, /* Profile 4. */ - { 96, 111 }, /* Profile 5. */ - { 96, 111 }, /* Profile 6. */ - { 96, 111 }, /* Profile 7. */ - { 96, 111 }, /* Profile 8. */ - { 96, 111 }, /* Profile 9. */ - { 96, 111 }, /* Profile 10. */ - { 96, 111 }, /* Profile 11. */ - { 96, 111 }, /* Profile 12. */ - { 96, 111 }, /* Profile 13. */ - { 96, 111 }, /* Profile 14. */ - { 96, 111 }, /* Profile 15. */ - { 96, 111 }, /* Profile 16. */ - { 96, 111 }, /* Profile 17. */ - { 96, 111 }, /* Profile 18. */ - { 96, 111 }, /* Profile 19. */ - { 96, 111 }, /* Profile 20. */ - { 96, 111 }, /* Profile 21. */ - { 96, 111 }, /* Profile 22. */ - { 96, 111 }, /* Profile 23. */ - { 96, 111 }, /* Profile 24. */ - { 96, 111 }, /* Profile 25. */ - { 96, 111 }, /* Profile 26. */ - { 96, 111 }, /* Profile 27. */ - { 96, 111 }, /* Profile 28. */ - { 96, 111 }, /* Profile 29. */ - { 96, 111 }, /* Profile 30. */ - { 96, 111 }, /* Profile 31. */ - { 96, 111 }, /* Profile 32. */ - { 96, 111 }, /* Profile 33. */ - { 96, 111 }, /* Profile 34. */ - { 96, 111 }, /* Profile 35. */ - { 96, 111 }, /* Profile 36. */ - { 96, 111 }, /* Profile 37. */ - { 96, 111 }, /* Profile 38. */ - { 96, 111 }, /* Profile 39. */ - { 96, 111 }, /* Profile 40. */ - { 96, 111 }, /* Profile 41. */ - { 96, 111 }, /* Profile 42. */ - { 96, 111 }, /* Profile 43. */ - { 96, 111 }, /* Profile 44. */ - { 96, 111 }, /* Profile 45. */ - { 96, 111 }, /* Profile 46. */ - { 96, 111 }, /* Profile 47. */ - { 96, 111 }, /* Profile 48. */ - { 96, 111 }, /* Profile 49. */ - { 96, 111 }, /* Profile 50. */ - { 96, 111 }, /* Profile 51. */ - { 96, 111 }, /* Profile 52. */ - { 96, 111 }, /* Profile 53. */ - { 96, 111 }, /* Profile 54. */ - { 96, 111 }, /* Profile 55. */ - { 96, 111 }, /* Profile 56. */ - { 96, 111 }, /* Profile 57. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { 412, 415 }, /* Profile 5. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ { 412, 415 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ + { 412, 415 }, /* Profile 7. */ { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { 412, 415 }, /* Profile 10. */ + { 408, 411 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ { 412, 415 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ + { 412, 415 }, /* Profile 12. */ { -1, -1 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { 408, 411 }, /* Profile 15. */ + { 412, 415 }, /* Profile 14. */ + { 412, 415 }, /* Profile 15. */ { -1, -1 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ + { 408, 411 }, /* Profile 17. */ { -1, -1 }, /* Profile 18. */ { 412, 415 }, /* Profile 19. */ { 412, 415 }, /* Profile 20. */ { -1, -1 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { 412, 415 }, /* Profile 24. */ - { 412, 415 }, /* Profile 25. */ + { 412, 415 }, /* Profile 22. */ + { 412, 415 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { 408, 411 }, /* Profile 25. */ { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { 408, 411 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ + { 412, 415 }, /* Profile 27. */ + { 412, 415 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { 412, 415 }, /* Profile 30. */ + { 412, 415 }, /* Profile 31. */ { -1, -1 }, /* Profile 32. */ - { 412, 415 }, /* Profile 33. */ - { 412, 415 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { 412, 415 }, /* Profile 38. */ - { 412, 415 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { 408, 411 }, /* Profile 43. */ - { -1, -1 }, /* Profile 44. */ - { -1, -1 }, /* Profile 45. */ - { -1, -1 }, /* Profile 46. */ - { 412, 415 }, /* Profile 47. */ - { 412, 415 }, /* Profile 48. */ - { -1, -1 }, /* Profile 49. */ - { -1, -1 }, /* Profile 50. */ - { -1, -1 }, /* Profile 51. */ - { 412, 415 }, /* Profile 52. */ - { 412, 415 }, /* Profile 53. */ - { -1, -1 }, /* Profile 54. */ - { -1, -1 }, /* Profile 55. */ - { -1, -1 }, /* Profile 56. */ - { 408, 411 }, /* Profile 57. */ + { 408, 411 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 412, 415 }, /* Profile 2. */ - { 404, 407 }, /* Profile 3. */ - { 412, 415 }, /* Profile 4. */ - { 408, 411 }, /* Profile 5. */ - { 408, 411 }, /* Profile 6. */ - { 412, 415 }, /* Profile 7. */ - { 404, 407 }, /* Profile 8. */ + { 416, 419 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + { 416, 419 }, /* Profile 5. */ + { 416, 419 }, /* Profile 6. */ + { 416, 419 }, /* Profile 7. */ + { 412, 415 }, /* Profile 8. */ { 412, 415 }, /* Profile 9. */ - { 408, 411 }, /* Profile 10. */ - { 408, 411 }, /* Profile 11. */ - { 408, 411 }, /* Profile 12. */ - { 400, 403 }, /* Profile 13. */ - { 408, 411 }, /* Profile 14. */ - { 404, 407 }, /* Profile 15. */ + { 416, 419 }, /* Profile 10. */ + { 416, 419 }, /* Profile 11. */ + { 416, 419 }, /* Profile 12. */ + { 416, 419 }, /* Profile 13. */ + { 416, 419 }, /* Profile 14. */ + { 416, 419 }, /* Profile 15. */ { 412, 415 }, /* Profile 16. */ - { 404, 407 }, /* Profile 17. */ - { 412, 415 }, /* Profile 18. */ - { 408, 411 }, /* Profile 19. */ - { 408, 411 }, /* Profile 20. */ - { 412, 415 }, /* Profile 21. */ - { 404, 407 }, /* Profile 22. */ - { 412, 415 }, /* Profile 23. */ - { 408, 411 }, /* Profile 24. */ - { 408, 411 }, /* Profile 25. */ - { 408, 411 }, /* Profile 26. */ - { 400, 403 }, /* Profile 27. */ - { 408, 411 }, /* Profile 28. */ - { 404, 407 }, /* Profile 29. */ - { 412, 415 }, /* Profile 30. */ - { 404, 407 }, /* Profile 31. */ + { 412, 415 }, /* Profile 17. */ + { 416, 419 }, /* Profile 18. */ + { 416, 419 }, /* Profile 19. */ + { 416, 419 }, /* Profile 20. */ + { 416, 419 }, /* Profile 21. */ + { 416, 419 }, /* Profile 22. */ + { 416, 419 }, /* Profile 23. */ + { 412, 415 }, /* Profile 24. */ + { 412, 415 }, /* Profile 25. */ + { 416, 419 }, /* Profile 26. */ + { 416, 419 }, /* Profile 27. */ + { 416, 419 }, /* Profile 28. */ + { 416, 419 }, /* Profile 29. */ + { 416, 419 }, /* Profile 30. */ + { 416, 419 }, /* Profile 31. */ { 412, 415 }, /* Profile 32. */ - { 408, 411 }, /* Profile 33. */ - { 408, 411 }, /* Profile 34. */ - { 412, 415 }, /* Profile 35. */ - { 404, 407 }, /* Profile 36. */ - { 412, 415 }, /* Profile 37. */ - { 408, 411 }, /* Profile 38. */ - { 408, 411 }, /* Profile 39. */ - { 408, 411 }, /* Profile 40. */ - { 400, 403 }, /* Profile 41. */ - { 408, 411 }, /* Profile 42. */ - { 404, 407 }, /* Profile 43. */ - { 412, 415 }, /* Profile 44. */ - { 404, 407 }, /* Profile 45. */ - { 412, 415 }, /* Profile 46. */ - { 408, 411 }, /* Profile 47. */ - { 408, 411 }, /* Profile 48. */ - { 412, 415 }, /* Profile 49. */ - { 404, 407 }, /* Profile 50. */ - { 412, 415 }, /* Profile 51. */ - { 408, 411 }, /* Profile 52. */ - { 408, 411 }, /* Profile 53. */ - { 408, 411 }, /* Profile 54. */ - { 400, 403 }, /* Profile 55. */ - { 408, 411 }, /* Profile 56. */ - { 404, 407 }, /* Profile 57. */ + { 412, 415 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "VFI_15_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_VFI_15_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_VFI_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3427,112 +2107,69 @@ static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_ { 112, 127 }, /* Profile 31. */ { 112, 127 }, /* Profile 32. */ { 112, 127 }, /* Profile 33. */ - { 112, 127 }, /* Profile 34. */ - { 112, 127 }, /* Profile 35. */ - { 112, 127 }, /* Profile 36. */ - { 112, 127 }, /* Profile 37. */ - { 112, 127 }, /* Profile 38. */ - { 112, 127 }, /* Profile 39. */ - { 112, 127 }, /* Profile 40. */ - { 112, 127 }, /* Profile 41. */ - { 112, 127 }, /* Profile 42. */ - { 112, 127 }, /* Profile 43. */ - { 112, 127 }, /* Profile 44. */ - { 112, 127 }, /* Profile 45. */ - { 112, 127 }, /* Profile 46. */ - { 112, 127 }, /* Profile 47. */ - { 112, 127 }, /* Profile 48. */ - { 112, 127 }, /* Profile 49. */ - { 112, 127 }, /* Profile 50. */ - { 112, 127 }, /* Profile 51. */ - { 112, 127 }, /* Profile 52. */ - { 112, 127 }, /* Profile 53. */ - { 112, 127 }, /* Profile 54. */ - { 112, 127 }, /* Profile 55. */ - { 112, 127 }, /* Profile 56. */ - { 112, 127 }, /* Profile 57. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, { .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", - .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 380, 383 }, /* Profile 2. */ - { 364, 367 }, /* Profile 3. */ - { 384, 387 }, /* Profile 4. */ - { 380, 383 }, /* Profile 5. */ - { 380, 383 }, /* Profile 6. */ - { 380, 383 }, /* Profile 7. */ - { 364, 367 }, /* Profile 8. */ - { 384, 387 }, /* Profile 9. */ - { 380, 383 }, /* Profile 10. */ - { 380, 383 }, /* Profile 11. */ - { 376, 379 }, /* Profile 12. */ - { 360, 363 }, /* Profile 13. */ - { 380, 383 }, /* Profile 14. */ - { 376, 379 }, /* Profile 15. */ - { 380, 383 }, /* Profile 16. */ - { 364, 367 }, /* Profile 17. */ - { 384, 387 }, /* Profile 18. */ - { 380, 383 }, /* Profile 19. */ - { 380, 383 }, /* Profile 20. */ - { 380, 383 }, /* Profile 21. */ - { 364, 367 }, /* Profile 22. */ - { 384, 387 }, /* Profile 23. */ - { 380, 383 }, /* Profile 24. */ - { 380, 383 }, /* Profile 25. */ - { 376, 379 }, /* Profile 26. */ - { 360, 363 }, /* Profile 27. */ - { 380, 383 }, /* Profile 28. */ - { 376, 379 }, /* Profile 29. */ - { 380, 383 }, /* Profile 30. */ - { 364, 367 }, /* Profile 31. */ - { 384, 387 }, /* Profile 32. */ - { 380, 383 }, /* Profile 33. */ - { 380, 383 }, /* Profile 34. */ - { 380, 383 }, /* Profile 35. */ - { 364, 367 }, /* Profile 36. */ - { 384, 387 }, /* Profile 37. */ - { 380, 383 }, /* Profile 38. */ - { 380, 383 }, /* Profile 39. */ - { 376, 379 }, /* Profile 40. */ - { 360, 363 }, /* Profile 41. */ - { 380, 383 }, /* Profile 42. */ - { 376, 379 }, /* Profile 43. */ - { 380, 383 }, /* Profile 44. */ - { 364, 367 }, /* Profile 45. */ - { 384, 387 }, /* Profile 46. */ - { 380, 383 }, /* Profile 47. */ - { 380, 383 }, /* Profile 48. */ - { 380, 383 }, /* Profile 49. */ - { 364, 367 }, /* Profile 50. */ - { 384, 387 }, /* Profile 51. */ - { 380, 383 }, /* Profile 52. */ - { 380, 383 }, /* Profile 53. */ - { 376, 379 }, /* Profile 54. */ - { 360, 363 }, /* Profile 55. */ - { 380, 383 }, /* Profile 56. */ - { 376, 379 }, /* Profile 57. */ + { 372, 375 }, /* Profile 2. */ + { 368, 371 }, /* Profile 3. */ + { 368, 371 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + { 368, 371 }, /* Profile 6. */ + { 368, 371 }, /* Profile 7. */ + { 372, 375 }, /* Profile 8. */ + { 368, 371 }, /* Profile 9. */ + { 372, 375 }, /* Profile 10. */ + { 368, 371 }, /* Profile 11. */ + { 368, 371 }, /* Profile 12. */ + { 372, 375 }, /* Profile 13. */ + { 368, 371 }, /* Profile 14. */ + { 368, 371 }, /* Profile 15. */ + { 372, 375 }, /* Profile 16. */ + { 368, 371 }, /* Profile 17. */ + { 372, 375 }, /* Profile 18. */ + { 368, 371 }, /* Profile 19. */ + { 368, 371 }, /* Profile 20. */ + { 372, 375 }, /* Profile 21. */ + { 368, 371 }, /* Profile 22. */ + { 368, 371 }, /* Profile 23. */ + { 372, 375 }, /* Profile 24. */ + { 368, 371 }, /* Profile 25. */ + { 372, 375 }, /* Profile 26. */ + { 368, 371 }, /* Profile 27. */ + { 368, 371 }, /* Profile 28. */ + { 372, 375 }, /* Profile 29. */ + { 368, 371 }, /* Profile 30. */ + { 368, 371 }, /* Profile 31. */ + { 372, 375 }, /* Profile 32. */ + { 368, 371 }, /* Profile 33. */ }, - .profile_cnt = 58, + .profile_cnt = 34, }, -};static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_data, +}; +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 2, + .profile_bmp[0] = 0xfffffffc, + .profile_bmp[1] = 0x3, + }; -static shr_enum_map_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_names[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +static shr_enum_map_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reason_names[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT }; -static bcmpkt_flex_reasons_info_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reasons_info = { - .num_reasons = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_names, - .reason_encode = bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_encode, - .reason_decode = bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_decode, +static bcmpkt_flex_reasons_info_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reason_names, + .reason_encode = bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reason_decode, }; @@ -3675,7 +2312,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_arp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_arp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_get, bcmpkt_arp_t_hardware_type_get, bcmpkt_arp_t_operation_get, @@ -3687,7 +2324,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_arp_t_fget[BCM78800_A0_DNA_6_ bcmpkt_arp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_arp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_arp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_set, bcmpkt_arp_t_hardware_type_set, bcmpkt_arp_t_operation_set, @@ -3699,13 +2336,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_arp_t_fset[BCM78800_A0_DNA_6_ bcmpkt_arp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_arp_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_arp_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_arp_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_arp_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_arp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_arp_t_field_data, }; @@ -3802,7 +2439,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_authen_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_authen_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_get, bcmpkt_authen_t_next_header_get, bcmpkt_authen_t_payload_len_get, @@ -3811,7 +2448,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_authen_t_fget[BCM78800_A0_DNA bcmpkt_authen_t_spi_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_authen_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_authen_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_set, bcmpkt_authen_t_next_header_set, bcmpkt_authen_t_payload_len_set, @@ -3820,13 +2457,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_authen_t_fset[BCM78800_A0_DNA bcmpkt_authen_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_authen_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_authen_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_authen_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_authen_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_authen_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_authen_t_field_data, }; @@ -4075,7 +2712,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_bfd_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_bfd_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_get, bcmpkt_bfd_t_bfd_length_get, bcmpkt_bfd_t_cpi_get, @@ -4094,7 +2731,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_bfd_t_fget[BCM78800_A0_DNA_6_ bcmpkt_bfd_t_version_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_bfd_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_bfd_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_set, bcmpkt_bfd_t_bfd_length_set, bcmpkt_bfd_t_cpi_set, @@ -4113,13 +2750,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_bfd_t_fset[BCM78800_A0_DNA_6_ bcmpkt_bfd_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_bfd_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_bfd_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_bfd_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_bfd_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_bfd_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_bfd_t_field_data, }; @@ -4153,23 +2790,23 @@ static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_cntag_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_cntag_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_get, bcmpkt_cntag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_cntag_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_cntag_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_set, bcmpkt_cntag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_cntag_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_cntag_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_cntag_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_cntag_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_cntag_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_cntag_t_field_data, }; @@ -4285,7 +2922,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_get, bcmpkt_cpu_composites_0_t_dma_cont1_get, bcmpkt_cpu_composites_0_t_dma_cont2_get, @@ -4295,7 +2932,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fget[BCM78 bcmpkt_cpu_composites_0_t_dma_cont6_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_set, bcmpkt_cpu_composites_0_t_dma_cont1_set, bcmpkt_cpu_composites_0_t_dma_cont2_set, @@ -4305,13 +2942,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fset[BCM78 bcmpkt_cpu_composites_0_t_dma_cont6_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_field_data, }; @@ -4462,205 +3099,70 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profi static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_get, - bcmpkt_cpu_composites_1_t_dma_cont11_get, - bcmpkt_cpu_composites_1_t_dma_cont12_get, - bcmpkt_cpu_composites_1_t_dma_cont13_get, - bcmpkt_cpu_composites_1_t_dma_cont14_get, - bcmpkt_cpu_composites_1_t_dma_cont15_get, - bcmpkt_cpu_composites_1_t_dma_cont16_get, - bcmpkt_cpu_composites_1_t_dma_cont17_get, - bcmpkt_cpu_composites_1_t_dma_cont7_get, - bcmpkt_cpu_composites_1_t_dma_cont8_get, - bcmpkt_cpu_composites_1_t_dma_cont9_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_set, - bcmpkt_cpu_composites_1_t_dma_cont11_set, - bcmpkt_cpu_composites_1_t_dma_cont12_set, - bcmpkt_cpu_composites_1_t_dma_cont13_set, - bcmpkt_cpu_composites_1_t_dma_cont14_set, - bcmpkt_cpu_composites_1_t_dma_cont15_set, - bcmpkt_cpu_composites_1_t_dma_cont16_set, - bcmpkt_cpu_composites_1_t_dma_cont17_set, - bcmpkt_cpu_composites_1_t_dma_cont7_set, - bcmpkt_cpu_composites_1_t_dma_cont8_set, - bcmpkt_cpu_composites_1_t_dma_cont9_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_field_data, -}; - - -static int32_t bcmpkt_dcn_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_dcn_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_dcn_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_dcn_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_dcn_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_dcn_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_dcn_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_dcn_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_dcn_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_dcn_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_dcn_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); + ret = SHR_E_PARAM; return ret; } -static int32_t bcmpkt_dcn_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[1], 16, 8, val); + ret = SHR_E_PARAM; + return ret; } -static int32_t bcmpkt_dcn_t_reserved4_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[1], 8, 8); + ret = SHR_E_PARAM; return ret; } -static int32_t bcmpkt_dcn_t_reserved4_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[1], 8, 8, val); + ret = SHR_E_PARAM; + return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_dcn_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT] = { - bcmpkt_dcn_t_flags_get, - bcmpkt_dcn_t_next_protocol_get, - bcmpkt_dcn_t_reserved0_get, - bcmpkt_dcn_t_reserved1_get, - bcmpkt_dcn_t_reserved2_get, - bcmpkt_dcn_t_reserved3_get, - bcmpkt_dcn_t_reserved4_get, +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_dcn_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT] = { - bcmpkt_dcn_t_flags_set, - bcmpkt_dcn_t_next_protocol_set, - bcmpkt_dcn_t_reserved0_set, - bcmpkt_dcn_t_reserved1_set, - bcmpkt_dcn_t_reserved2_set, - bcmpkt_dcn_t_reserved3_set, - bcmpkt_dcn_t_reserved4_set, +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_dcn_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_dcn_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_dcn_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_field_data, }; @@ -4710,25 +3212,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_dest_option_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_dest_option_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_get, bcmpkt_dest_option_t_next_header_get, bcmpkt_dest_option_t_option_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_dest_option_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_dest_option_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_set, bcmpkt_dest_option_t_next_header_set, bcmpkt_dest_option_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_dest_option_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_dest_option_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_dest_option_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_dest_option_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_dest_option_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_dest_option_t_field_data, }; @@ -4914,7 +3416,7 @@ static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_get, bcmpkt_ep_nih_header_t_header_type_get, bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, @@ -4929,7 +3431,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fget[BCM78800 bcmpkt_ep_nih_header_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_set, bcmpkt_ep_nih_header_t_header_type_set, bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, @@ -4944,13 +3446,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fset[BCM78800 bcmpkt_ep_nih_header_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_field_data, }; @@ -5090,7 +3592,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_get, bcmpkt_erspan3_fixed_hdr_t_cos_get, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, @@ -5102,7 +3604,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fget[BCM7 bcmpkt_erspan3_fixed_hdr_t_vlan_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_set, bcmpkt_erspan3_fixed_hdr_t_cos_set, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, @@ -5114,13 +3616,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fset[BCM7 bcmpkt_erspan3_fixed_hdr_t_vlan_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_field_data, }; @@ -5185,27 +3687,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_get, bcmpkt_erspan3_subhdr_5_t_port_id_get, bcmpkt_erspan3_subhdr_5_t_switch_id_get, bcmpkt_erspan3_subhdr_5_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_set, bcmpkt_erspan3_subhdr_5_t_port_id_set, bcmpkt_erspan3_subhdr_5_t_switch_id_set, bcmpkt_erspan3_subhdr_5_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_field_data, }; @@ -5286,7 +3788,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_esp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_esp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_get, bcmpkt_esp_t_pad_get, bcmpkt_esp_t_pad_len_get, @@ -5294,7 +3796,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_esp_t_fget[BCM78800_A0_DNA_6_ bcmpkt_esp_t_spi_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_esp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_esp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_set, bcmpkt_esp_t_pad_set, bcmpkt_esp_t_pad_len_set, @@ -5302,13 +3804,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_esp_t_fset[BCM78800_A0_DNA_6_ bcmpkt_esp_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_esp_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_esp_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_esp_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_esp_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_esp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_esp_t_field_data, }; @@ -5327,21 +3829,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ethertype_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ethertype_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ethertype_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ethertype_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ethertype_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ethertype_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ethertype_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_ethertype_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ethertype_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_ethertype_t_field_data, }; @@ -5406,27 +3908,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_frag_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_frag_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_get, bcmpkt_frag_t_id_get, bcmpkt_frag_t_next_header_get, bcmpkt_frag_t_reserved_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_frag_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_frag_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_set, bcmpkt_frag_t_id_set, bcmpkt_frag_t_next_header_set, bcmpkt_frag_t_reserved_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_frag_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_frag_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_frag_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_frag_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_frag_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_frag_t_field_data, }; @@ -5520,7 +4022,7 @@ static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { bcmpkt_gbp_ethernet_shim_t_ethertype_get, bcmpkt_gbp_ethernet_shim_t_flags_get, bcmpkt_gbp_ethernet_shim_t_reserved_get, @@ -5529,7 +4031,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fget[BCM7 bcmpkt_gbp_ethernet_shim_t_ver_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { bcmpkt_gbp_ethernet_shim_t_ethertype_set, bcmpkt_gbp_ethernet_shim_t_flags_set, bcmpkt_gbp_ethernet_shim_t_reserved_set, @@ -5538,13 +4040,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fset[BCM7 bcmpkt_gbp_ethernet_shim_t_ver_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_field_data, }; @@ -5773,7 +4275,7 @@ static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_get, bcmpkt_generic_loopback_t_destination_type_get, bcmpkt_generic_loopback_t_entropy_obj_get, @@ -5791,7 +4293,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fget[BCM78 bcmpkt_generic_loopback_t_start_byte_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_set, bcmpkt_generic_loopback_t_destination_type_set, bcmpkt_generic_loopback_t_entropy_obj_set, @@ -5809,13 +4311,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fset[BCM78 bcmpkt_generic_loopback_t_start_byte_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_field_data, }; @@ -5894,7 +4396,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gpe_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gpe_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_get, bcmpkt_gpe_t_next_protocol_get, bcmpkt_gpe_t_reserved0_get, @@ -5902,7 +4404,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gpe_t_fget[BCM78800_A0_DNA_6_ bcmpkt_gpe_t_vni_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gpe_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gpe_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_set, bcmpkt_gpe_t_next_protocol_set, bcmpkt_gpe_t_reserved0_set, @@ -5910,13 +4412,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gpe_t_fset[BCM78800_A0_DNA_6_ bcmpkt_gpe_t_vni_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gpe_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gpe_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gpe_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_gpe_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gpe_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_gpe_t_field_data, }; @@ -5950,23 +4452,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_get, bcmpkt_gre_chksum_t_offset_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_set, bcmpkt_gre_chksum_t_offset_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_field_data, }; @@ -5986,21 +4488,21 @@ static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_key_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gre_key_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_key_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gre_key_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_key_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gre_key_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_key_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_gre_key_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gre_key_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_gre_key_t_field_data, }; @@ -6020,21 +4522,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_field_data, }; @@ -6054,21 +4556,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_field_data, }; @@ -6132,27 +4634,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gre_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_get, bcmpkt_gre_t_protocol_get, bcmpkt_gre_t_reserved_get, bcmpkt_gre_t_version_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gre_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_set, bcmpkt_gre_t_protocol_set, bcmpkt_gre_t_reserved_set, bcmpkt_gre_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gre_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_gre_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gre_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_gre_t_field_data, }; @@ -6351,7 +4853,7 @@ static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { bcmpkt_hg3_base_t_cn_get, bcmpkt_hg3_base_t_cng_get, bcmpkt_hg3_base_t_entropy_get, @@ -6367,7 +4869,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fget[BCM78800_A0_D bcmpkt_hg3_base_t_version_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { bcmpkt_hg3_base_t_cn_set, bcmpkt_hg3_base_t_cng_set, bcmpkt_hg3_base_t_entropy_set, @@ -6383,13 +4885,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fset[BCM78800_A0_D bcmpkt_hg3_base_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_field_data, }; @@ -6483,7 +4985,7 @@ static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { bcmpkt_hg3_extension_0_t_class_id_lsb_get, bcmpkt_hg3_extension_0_t_class_id_msb_get, bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, @@ -6492,7 +4994,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fget[BCM788 bcmpkt_hg3_extension_0_t_svp_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { bcmpkt_hg3_extension_0_t_class_id_lsb_set, bcmpkt_hg3_extension_0_t_class_id_msb_set, bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, @@ -6501,13 +5003,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fset[BCM788 bcmpkt_hg3_extension_0_t_svp_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_field_data, }; @@ -6557,25 +5059,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_get, bcmpkt_hop_by_hop_t_next_header_get, bcmpkt_hop_by_hop_t_option_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_set, bcmpkt_hop_by_hop_t_next_header_set, bcmpkt_hop_by_hop_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_field_data, }; @@ -6624,25 +5126,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_icmp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_icmp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_get, bcmpkt_icmp_t_code_get, bcmpkt_icmp_t_icmp_type_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_icmp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_icmp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_set, bcmpkt_icmp_t_code_set, bcmpkt_icmp_t_icmp_type_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_icmp_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_icmp_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_icmp_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_icmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_icmp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_icmp_t_field_data, }; @@ -6721,7 +5223,7 @@ static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { bcmpkt_ifa_header_t_flags_get, bcmpkt_ifa_header_t_gns_get, bcmpkt_ifa_header_t_max_length_get, @@ -6729,7 +5231,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fget[BCM78800_A0 bcmpkt_ifa_header_t_ver_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { bcmpkt_ifa_header_t_flags_set, bcmpkt_ifa_header_t_gns_set, bcmpkt_ifa_header_t_max_length_set, @@ -6737,13 +5239,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fset[BCM78800_A0 bcmpkt_ifa_header_t_ver_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_field_data, }; @@ -6837,7 +5339,7 @@ static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { bcmpkt_ifa_metadata_a_t_cn_get, bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get, bcmpkt_ifa_metadata_a_t_lns_device_id_get, @@ -6846,7 +5348,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fget[BCM7880 bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { bcmpkt_ifa_metadata_a_t_cn_set, bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set, bcmpkt_ifa_metadata_a_t_lns_device_id_set, @@ -6855,13 +5357,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fset[BCM7880 bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_field_data, }; @@ -6975,7 +5477,7 @@ static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { bcmpkt_ifa_metadata_b_t_egress_port_id_get, bcmpkt_ifa_metadata_b_t_ingress_port_id_get, bcmpkt_ifa_metadata_b_t_mmu_stat_0_get, @@ -6985,7 +5487,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fget[BCM7880 bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { bcmpkt_ifa_metadata_b_t_egress_port_id_set, bcmpkt_ifa_metadata_b_t_ingress_port_id_set, bcmpkt_ifa_metadata_b_t_mmu_stat_0_set, @@ -6995,13 +5497,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fset[BCM7880 bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_field_data, }; @@ -7050,25 +5552,25 @@ static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { bcmpkt_ifa_metadata_base_t_action_vector_get, bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get, bcmpkt_ifa_metadata_base_t_request_vector_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { bcmpkt_ifa_metadata_base_t_action_vector_set, bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set, bcmpkt_ifa_metadata_base_t_request_vector_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_field_data, }; @@ -7133,27 +5635,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_igmp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_igmp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_get, bcmpkt_igmp_t_group_address_get, bcmpkt_igmp_t_igmp_type_get, bcmpkt_igmp_t_max_resp_time_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_igmp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_igmp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_set, bcmpkt_igmp_t_group_address_set, bcmpkt_igmp_t_igmp_type_set, bcmpkt_igmp_t_max_resp_time_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_igmp_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_igmp_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_igmp_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_igmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_igmp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_igmp_t_field_data, }; @@ -7263,7 +5765,7 @@ static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { bcmpkt_ioam_e2e_t_ioam_e2e_data_get, bcmpkt_ioam_e2e_t_ioam_e2e_type_get, bcmpkt_ioam_e2e_t_ioam_hdr_len_get, @@ -7273,7 +5775,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fget[BCM78800_A0_D bcmpkt_ioam_e2e_t_type_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { bcmpkt_ioam_e2e_t_ioam_e2e_data_set, bcmpkt_ioam_e2e_t_ioam_e2e_type_set, bcmpkt_ioam_e2e_t_ioam_hdr_len_set, @@ -7283,13 +5785,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fset[BCM78800_A0_D bcmpkt_ioam_e2e_t_type_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_field_data, }; @@ -7371,7 +5873,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ipfix_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_get, bcmpkt_ipfix_t_length_get, bcmpkt_ipfix_t_obs_domain_id_get, @@ -7379,7 +5881,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fget[BCM78800_A0_DNA_ bcmpkt_ipfix_t_version_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ipfix_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_set, bcmpkt_ipfix_t_length_set, bcmpkt_ipfix_t_obs_domain_id_set, @@ -7387,13 +5889,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fset[BCM78800_A0_DNA_ bcmpkt_ipfix_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ipfix_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ipfix_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ipfix_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_ipfix_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ipfix_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_ipfix_t_field_data, }; @@ -7565,7 +6067,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ipv4_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_get, bcmpkt_ipv4_t_flags_frag_offset_get, bcmpkt_ipv4_t_hdr_checksum_get, @@ -7579,7 +6081,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fget[BCM78800_A0_DNA_6 bcmpkt_ipv4_t_version_hdr_len_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ipv4_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_set, bcmpkt_ipv4_t_flags_frag_offset_set, bcmpkt_ipv4_t_hdr_checksum_set, @@ -7593,13 +6095,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fset[BCM78800_A0_DNA_6 bcmpkt_ipv4_t_version_hdr_len_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ipv4_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ipv4_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ipv4_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_ipv4_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ipv4_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_ipv4_t_field_data, }; @@ -7725,7 +6227,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ipv6_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_get, bcmpkt_ipv6_t_flow_label_get, bcmpkt_ipv6_t_hop_limit_get, @@ -7736,7 +6238,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fget[BCM78800_A0_DNA_6 bcmpkt_ipv6_t_version_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ipv6_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_set, bcmpkt_ipv6_t_flow_label_set, bcmpkt_ipv6_t_hop_limit_set, @@ -7747,13 +6249,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fset[BCM78800_A0_DNA_6 bcmpkt_ipv6_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ipv6_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ipv6_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ipv6_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_ipv6_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ipv6_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_ipv6_t_field_data, }; @@ -7789,23 +6291,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_l2_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_l2_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_get, bcmpkt_l2_t_macsa_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_l2_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_l2_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_set, bcmpkt_l2_t_macsa_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_l2_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_l2_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_l2_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_l2_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_l2_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_l2_t_field_data, }; @@ -7825,21 +6327,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_field_data, }; @@ -7859,21 +6361,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_field_data, }; @@ -7937,27 +6439,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_get, bcmpkt_mpls_ach_t_cw_type_get, bcmpkt_mpls_ach_t_reserved_get, bcmpkt_mpls_ach_t_version_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_set, bcmpkt_mpls_ach_t_cw_type_set, bcmpkt_mpls_ach_t_reserved_set, bcmpkt_mpls_ach_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_field_data, }; @@ -7977,21 +6479,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_field_data, }; @@ -8040,25 +6542,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_get, bcmpkt_mpls_cw_t_reserved_get, bcmpkt_mpls_cw_t_seq_number_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_set, bcmpkt_mpls_cw_t_reserved_set, bcmpkt_mpls_cw_t_seq_number_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_field_data, }; @@ -8122,27 +6624,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mpls_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_mpls_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_get, bcmpkt_mpls_t_exp_get, bcmpkt_mpls_t_label_get, bcmpkt_mpls_t_ttl_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mpls_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_mpls_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_set, bcmpkt_mpls_t_exp_set, bcmpkt_mpls_t_label_set, bcmpkt_mpls_t_ttl_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mpls_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_mpls_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mpls_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_mpls_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_mpls_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_mpls_t_field_data, }; @@ -8359,7 +6861,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_p_1588_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_get, bcmpkt_p_1588_t_correction_get, bcmpkt_p_1588_t_domain_nb_get, @@ -8376,7 +6878,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fget[BCM78800_A0_DNA bcmpkt_p_1588_t_version_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_p_1588_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_set, bcmpkt_p_1588_t_correction_set, bcmpkt_p_1588_t_domain_nb_set, @@ -8393,13 +6895,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fset[BCM78800_A0_DNA bcmpkt_p_1588_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_p_1588_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_p_1588_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_p_1588_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_p_1588_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_p_1588_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_p_1588_t_field_data, }; @@ -8449,25 +6951,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, bcmpkt_prog_ext_hdr_t_next_header_get, bcmpkt_prog_ext_hdr_t_option_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, bcmpkt_prog_ext_hdr_t_next_header_set, bcmpkt_prog_ext_hdr_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_field_data, }; @@ -8563,7 +7065,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_get, bcmpkt_psamp_0_t_length_get, bcmpkt_psamp_0_t_next_hop_index_get, @@ -8572,7 +7074,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fget[BCM78800_A0_DN bcmpkt_psamp_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_set, bcmpkt_psamp_0_t_length_set, bcmpkt_psamp_0_t_next_hop_index_set, @@ -8581,13 +7083,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fset[BCM78800_A0_DN bcmpkt_psamp_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_field_data, }; @@ -8696,7 +7198,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_get, bcmpkt_psamp_1_t_egress_port_get, bcmpkt_psamp_1_t_epoch_get, @@ -8706,7 +7208,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fget[BCM78800_A0_DN bcmpkt_psamp_1_t_variable_flag_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_set, bcmpkt_psamp_1_t_egress_port_set, bcmpkt_psamp_1_t_epoch_set, @@ -8716,13 +7218,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fset[BCM78800_A0_DN bcmpkt_psamp_1_t_variable_flag_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_field_data, }; @@ -8834,7 +7336,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, bcmpkt_psamp_mirror_on_drop_0_t_length_get, @@ -8844,7 +7346,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fget bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, bcmpkt_psamp_mirror_on_drop_0_t_length_set, @@ -8854,13 +7356,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fset bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_field_data, }; @@ -8969,325 +7471,33 @@ static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *d return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_field_data, -}; - - -static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = { - bcmpkt_psamp_postcard_0_t_egress_mod_port_get, - bcmpkt_psamp_postcard_0_t_ingress_port_get, - bcmpkt_psamp_postcard_0_t_obs_time_ns_get, - bcmpkt_psamp_postcard_0_t_obs_time_s_get, - bcmpkt_psamp_postcard_0_t_psamp_length_get, - bcmpkt_psamp_postcard_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = { - bcmpkt_psamp_postcard_0_t_egress_mod_port_set, - bcmpkt_psamp_postcard_0_t_ingress_port_set, - bcmpkt_psamp_postcard_0_t_obs_time_ns_set, - bcmpkt_psamp_postcard_0_t_obs_time_s_set, - bcmpkt_psamp_postcard_0_t_psamp_length_set, - bcmpkt_psamp_postcard_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_residence_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_residence_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = { - bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get, - bcmpkt_psamp_postcard_1_t_drop_reason_code_get, - bcmpkt_psamp_postcard_1_t_mmu_stat_0_get, - bcmpkt_psamp_postcard_1_t_mmu_stat_1_get, - bcmpkt_psamp_postcard_1_t_queue_id_get, - bcmpkt_psamp_postcard_1_t_reserved_1_get, - bcmpkt_psamp_postcard_1_t_residence_time_get, - bcmpkt_psamp_postcard_1_t_sampled_length_get, - bcmpkt_psamp_postcard_1_t_var_len_indicator_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = { - bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set, - bcmpkt_psamp_postcard_1_t_drop_reason_code_set, - bcmpkt_psamp_postcard_1_t_mmu_stat_0_set, - bcmpkt_psamp_postcard_1_t_mmu_stat_1_set, - bcmpkt_psamp_postcard_1_t_queue_id_set, - bcmpkt_psamp_postcard_1_t_reserved_1_set, - bcmpkt_psamp_postcard_1_t_residence_time_set, - bcmpkt_psamp_postcard_1_t_sampled_length_set, - bcmpkt_psamp_postcard_1_t_var_len_indicator_set, +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_field_data, }; @@ -9430,7 +7640,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_rarp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_rarp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_get, bcmpkt_rarp_t_hardware_type_get, bcmpkt_rarp_t_operation_get, @@ -9442,7 +7652,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_rarp_t_fget[BCM78800_A0_DNA_6 bcmpkt_rarp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_rarp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_rarp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_set, bcmpkt_rarp_t_hardware_type_set, bcmpkt_rarp_t_operation_set, @@ -9454,13 +7664,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_rarp_t_fset[BCM78800_A0_DNA_6 bcmpkt_rarp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rarp_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_rarp_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_rarp_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_rarp_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_rarp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_rarp_t_field_data, }; @@ -9540,7 +7750,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_routing_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_routing_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_get, bcmpkt_routing_t_hdr_ext_len_get, bcmpkt_routing_t_next_header_get, @@ -9548,7 +7758,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_routing_t_fget[BCM78800_A0_DN bcmpkt_routing_t_segments_left_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_routing_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_routing_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_set, bcmpkt_routing_t_hdr_ext_len_set, bcmpkt_routing_t_next_header_set, @@ -9556,13 +7766,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_routing_t_fset[BCM78800_A0_DN bcmpkt_routing_t_segments_left_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_routing_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_routing_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_routing_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_routing_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_routing_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_routing_t_field_data, }; @@ -9596,294 +7806,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_rspan_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_rspan_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_get, bcmpkt_rspan_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_rspan_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_rspan_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_set, bcmpkt_rspan_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rspan_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_rspan_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_rspan_t_field_data, -}; - - -static int32_t bcmpkt_segment_routing_srh_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_last_entry_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_last_entry_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { - bcmpkt_segment_routing_srh_t_flags_get, - bcmpkt_segment_routing_srh_t_hdr_ext_len_get, - bcmpkt_segment_routing_srh_t_last_entry_get, - bcmpkt_segment_routing_srh_t_next_header_get, - bcmpkt_segment_routing_srh_t_routing_type_get, - bcmpkt_segment_routing_srh_t_segments_left_get, - bcmpkt_segment_routing_srh_t_tag_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { - bcmpkt_segment_routing_srh_t_flags_set, - bcmpkt_segment_routing_srh_t_hdr_ext_len_set, - bcmpkt_segment_routing_srh_t_last_entry_set, - bcmpkt_segment_routing_srh_t_next_header_set, - bcmpkt_segment_routing_srh_t_routing_type_set, - bcmpkt_segment_routing_srh_t_segments_left_set, - bcmpkt_segment_routing_srh_t_tag_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_field_data, -}; - - -static int32_t bcmpkt_segment_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_t_last_entry_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_last_entry_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_t_seg_list_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_seg_list_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { - bcmpkt_segment_routing_t_hdr_ext_len_get, - bcmpkt_segment_routing_t_last_entry_flags_get, - bcmpkt_segment_routing_t_next_header_get, - bcmpkt_segment_routing_t_routing_type_get, - bcmpkt_segment_routing_t_seg_list_get, - bcmpkt_segment_routing_t_segments_left_get, - bcmpkt_segment_routing_t_tag_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { - bcmpkt_segment_routing_t_hdr_ext_len_set, - bcmpkt_segment_routing_t_last_entry_flags_set, - bcmpkt_segment_routing_t_next_header_set, - bcmpkt_segment_routing_t_routing_type_set, - bcmpkt_segment_routing_t_seg_list_set, - bcmpkt_segment_routing_t_segments_left_set, - bcmpkt_segment_routing_t_tag_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_rspan_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_rspan_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_rspan_t_field_data, }; @@ -9933,25 +7872,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_get, bcmpkt_sflow_shim_0_t_sys_source_get, bcmpkt_sflow_shim_0_t_version_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_set, bcmpkt_sflow_shim_0_t_sys_source_set, bcmpkt_sflow_shim_0_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_field_data, }; @@ -10075,7 +8014,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_get, bcmpkt_sflow_shim_1_t_flag_discarded_get, bcmpkt_sflow_shim_1_t_flag_flex_sample_get, @@ -10086,7 +8025,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fget[BCM78800_ bcmpkt_sflow_shim_1_t_sys_opcode_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_set, bcmpkt_sflow_shim_1_t_flag_discarded_set, bcmpkt_sflow_shim_1_t_flag_flex_sample_set, @@ -10097,13 +8036,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fset[BCM78800_ bcmpkt_sflow_shim_1_t_sys_opcode_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_field_data, }; @@ -10138,23 +8077,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_get, bcmpkt_sflow_shim_2_t_user_meta_data_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_set, bcmpkt_sflow_shim_2_t_user_meta_data_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_field_data, }; @@ -10189,57 +8128,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_get, bcmpkt_snap_llc_t_snap_llc_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_set, bcmpkt_snap_llc_t_snap_llc_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_field_data, -}; - - -static int32_t bcmpkt_std_segment_id_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_std_segment_id_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { - bcmpkt_std_segment_id_t_data_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { - bcmpkt_std_segment_id_t_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_field_data, }; @@ -10273,23 +8178,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_get, bcmpkt_tcp_first_4bytes_t_src_port_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_set, bcmpkt_tcp_first_4bytes_t_src_port_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_field_data, }; @@ -10385,7 +8290,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_get, bcmpkt_tcp_last_16bytes_t_checksum_get, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, @@ -10394,7 +8299,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fget[BCM78 bcmpkt_tcp_last_16bytes_t_win_size_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_set, bcmpkt_tcp_last_16bytes_t_checksum_set, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, @@ -10403,13 +8308,13 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fset[BCM78 bcmpkt_tcp_last_16bytes_t_win_size_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_field_data, }; @@ -10473,27 +8378,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_udp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_udp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_get, bcmpkt_udp_t_dst_port_get, bcmpkt_udp_t_src_port_get, bcmpkt_udp_t_udp_length_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_udp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_udp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_set, bcmpkt_udp_t_dst_port_set, bcmpkt_udp_t_src_port_set, bcmpkt_udp_t_udp_length_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_udp_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_udp_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_udp_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_udp_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_udp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_udp_t_field_data, }; @@ -10529,23 +8434,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_field_data, }; @@ -10565,21 +8470,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_field_data, }; @@ -10644,27 +8549,27 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_get, bcmpkt_unknown_l5_t_l5_bytes_2_3_get, bcmpkt_unknown_l5_t_l5_bytes_4_7_get, bcmpkt_unknown_l5_t_l5_bytes_8_9_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_set, bcmpkt_unknown_l5_t_l5_bytes_2_3_set, bcmpkt_unknown_l5_t_l5_bytes_4_7_set, bcmpkt_unknown_l5_t_l5_bytes_8_9_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_field_data, }; @@ -10728,27 +8633,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_vlan_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_vlan_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_get, bcmpkt_vlan_t_pcp_get, bcmpkt_vlan_t_tpid_get, bcmpkt_vlan_t_vid_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_vlan_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_vlan_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_set, bcmpkt_vlan_t_pcp_set, bcmpkt_vlan_t_tpid_set, bcmpkt_vlan_t_vid_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_vlan_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_vlan_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_vlan_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_vlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_vlan_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_vlan_t_field_data, }; @@ -10798,25 +8703,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_vxlan_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_vxlan_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_get, bcmpkt_vxlan_t_reserved2_get, bcmpkt_vxlan_t_vn_id_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_vxlan_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_vxlan_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_set, bcmpkt_vxlan_t_reserved2_set, bcmpkt_vxlan_t_vn_id_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_vxlan_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_vxlan_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_vxlan_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_vxlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_vxlan_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_vxlan_t_field_data, }; @@ -10928,7 +8833,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_wesp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_wesp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_get, bcmpkt_wesp_t_header_len_get, bcmpkt_wesp_t_next_header_get, @@ -10938,7 +8843,7 @@ bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_wesp_t_fget[BCM78800_A0_DNA_6 bcmpkt_wesp_t_wesp_iv_get, }; -bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_wesp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_wesp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_set, bcmpkt_wesp_t_header_len_set, bcmpkt_wesp_t_next_header_set, @@ -10948,529 +8853,487 @@ bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_wesp_t_fset[BCM78800_A0_DNA_6 bcmpkt_wesp_t_wesp_iv_set, }; -static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_wesp_t_field_data[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_wesp_t_field_data[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_wesp_t_field_info = { - .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT, - .info = bcm78800_a0_dna_6_5_30_3_1_wesp_t_field_data, +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_wesp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_31_7_0_wesp_t_field_data, }; -static bcmpkt_flex_pmd_info_t bcm78800_a0_dna_6_5_30_3_1_flexhdr_info_list[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_COUNT] = { - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_arp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_arp_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_arp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_authen_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_authen_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_authen_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_bfd_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_bfd_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_bfd_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_cntag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_cntag_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_cntag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_fset, - }, +static bcmpkt_flex_pmd_info_t bcm56690_a0_dna_6_5_31_7_0_flexhdr_info_list[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_COUNT] = { { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_dcn_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_arp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_dcn_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_dcn_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_arp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_arp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_dest_option_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_authen_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_dest_option_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_dest_option_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_authen_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_authen_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_bfd_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_bfd_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_bfd_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_cntag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_cntag_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_cntag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_esp_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_esp_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_esp_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_ethertype_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_dest_option_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ethertype_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ethertype_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_dest_option_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_dest_option_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_frag_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_frag_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_frag_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_gpe_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_esp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gpe_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gpe_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_esp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_esp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_ethertype_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ethertype_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ethertype_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_key_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_frag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_key_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_key_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_frag_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_frag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_gpe_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gpe_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gpe_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_gre_key_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gre_key_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gre_key_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_icmp_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_icmp_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_icmp_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_gre_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gre_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gre_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_igmp_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_icmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_igmp_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_igmp_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_icmp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_icmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_ipfix_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_ipv4_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_ipv6_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_l2_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_igmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_l2_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_l2_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_igmp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_igmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_ipfix_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ipfix_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ipfix_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_ipv4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ipv4_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ipv4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_ipv6_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ipv6_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ipv6_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_l2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_l2_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_l2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_mpls_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mpls_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mpls_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_p_1588_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_mpls_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_mpls_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_mpls_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_p_1588_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_p_1588_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_p_1588_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_rarp_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_rarp_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_rarp_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_routing_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_routing_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_routing_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_rspan_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_rspan_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_rspan_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_rarp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_rarp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_rarp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_routing_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_routing_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_routing_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_rspan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_rspan_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_rspan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_udp_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_udp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_udp_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_udp_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_udp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_udp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_vlan_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_vlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_vlan_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_vlan_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_vlan_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_vlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_vxlan_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_vxlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_vxlan_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_vxlan_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_vxlan_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_vxlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_wesp_t_field_info, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_wesp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm78800_a0_dna_6_5_30_3_1_wesp_t_fget, - .flex_fset = bcm78800_a0_dna_6_5_30_3_1_wesp_t_fset, + .flex_fget = bcm56690_a0_dna_6_5_31_7_0_wesp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_31_7_0_wesp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_info, - .reasons_info = &bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reasons_info, - .flex_common_fget = bcm78800_a0_rxpmd_flex_fget, - .flex_common_fset = bcm78800_a0_rxpmd_flex_fset, + .field_info = &bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_field_info, + .reasons_info = &bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56690_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56690_a0_rxpmd_flex_fset, }, }; -static shr_enum_map_t bcm78800_a0_dna_6_5_30_3_1_flexhdr_id_map[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_NAME_MAP_INIT +static shr_enum_map_t bcm56690_a0_dna_6_5_31_7_0_flexhdr_id_map[] = { + BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_NAME_MAP_INIT }; -shr_enum_map_t * bcm78800_a0_dna_6_5_30_3_1_flexhdr_map_get(void) +shr_enum_map_t * bcm56690_a0_dna_6_5_31_7_0_flexhdr_map_get(void) { - return bcm78800_a0_dna_6_5_30_3_1_flexhdr_id_map; + return bcm56690_a0_dna_6_5_31_7_0_flexhdr_id_map; } -bcmpkt_flex_pmd_info_t * bcm78800_a0_dna_6_5_30_3_1_flex_pmd_info_get(uint32_t hid) +bcmpkt_flex_pmd_info_t * bcm56690_a0_dna_6_5_31_7_0_flex_pmd_info_get(uint32_t hid) { - if (hid >= BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_COUNT) { + if (hid >= BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_COUNT) { return NULL; } - return &bcm78800_a0_dna_6_5_30_3_1_flexhdr_info_list[hid]; + return &bcm56690_a0_dna_6_5_31_7_0_flexhdr_info_list[hid]; } -int bcm78800_a0_dna_6_5_30_3_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { - 15, +int bcm56690_a0_dna_6_5_31_7_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 14, + 21, 22, - 23, - 69, + 63, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c similarity index 82% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c index 4f381c8b403..579afded471 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c @@ -2,8 +2,8 @@ * * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56780_a0_cna_6_5_30_2_0_sf_match_id_info.yml - * for device bcm56780_a0 and variant cna_6_5_30_2_0. + * from the NPL output file(s) bcm56780_a0_cna_6_5_31_3_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant cna_6_5_31_3_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -29,13 +29,13 @@ #include -#include +#include static bcmpkt_rxpmd_match_id_db_t -bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT] = { +bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT] = { { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", .match = 0x2, .match_mask = 0x2, @@ -49,7 +49,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ .name = "EGRESS_PKT_FWD_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -63,7 +63,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ .name = "EGRESS_PKT_FWD_L2_HDR_NONE", .match = 0x0, .match_mask = 0x7, @@ -77,7 +77,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", .match = 0x4, .match_mask = 0x4, @@ -91,7 +91,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", .match = 0x20, .match_mask = 0x66, @@ -105,7 +105,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -119,7 +119,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", .match = 0x40, .match_mask = 0x66, @@ -133,7 +133,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", .match = 0x8, .match_mask = 0x18, @@ -147,7 +147,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", .match = 0x10, .match_mask = 0x18, @@ -161,7 +161,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x7f, @@ -175,7 +175,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", .match = 0x2, .match_mask = 0x6, @@ -189,7 +189,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x4, .match_mask = 0x6, @@ -203,7 +203,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x24, .match_mask = 0x66, @@ -217,7 +217,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", .match = 0x6, .match_mask = 0x6, @@ -231,7 +231,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", .match = 0x18, .match_mask = 0x18, @@ -245,7 +245,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", .match = 0x60, .match_mask = 0x60, @@ -259,7 +259,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", .match = 0x46, .match_mask = 0x66, @@ -273,7 +273,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", .match = 0x26, .match_mask = 0x66, @@ -287,7 +287,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ .name = "EGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -301,7 +301,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -315,7 +315,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ .name = "EGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -329,7 +329,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", .match = 0x2, .match_mask = 0x2, @@ -343,7 +343,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -357,7 +357,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", .match = 0x0, .match_mask = 0x7, @@ -371,7 +371,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", .match = 0x4, .match_mask = 0x4, @@ -385,7 +385,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", .match = 0x20, .match_mask = 0x66, @@ -399,7 +399,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -413,7 +413,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", .match = 0x40, .match_mask = 0x66, @@ -427,7 +427,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", .match = 0x8, .match_mask = 0x18, @@ -441,7 +441,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", .match = 0x10, .match_mask = 0x18, @@ -455,7 +455,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x7f, @@ -469,7 +469,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", .match = 0x2, .match_mask = 0x6, @@ -483,7 +483,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x4, .match_mask = 0x6, @@ -497,7 +497,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x24, .match_mask = 0x66, @@ -511,7 +511,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", .match = 0x6, .match_mask = 0x6, @@ -525,7 +525,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", .match = 0x18, .match_mask = 0x18, @@ -539,7 +539,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", .match = 0x60, .match_mask = 0x60, @@ -553,7 +553,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", .match = 0x46, .match_mask = 0x66, @@ -567,7 +567,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", .match = 0x26, .match_mask = 0x66, @@ -581,7 +581,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", .match = 0x2, .match_mask = 0x2, @@ -595,7 +595,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ .name = "INGRESS_PKT_INNER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -609,7 +609,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ .name = "INGRESS_PKT_INNER_L2_HDR_NONE", .match = 0x0, .match_mask = 0x7, @@ -623,7 +623,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", .match = 0x4, .match_mask = 0x4, @@ -637,7 +637,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", .match = 0x20, .match_mask = 0x66, @@ -651,7 +651,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -665,7 +665,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", .match = 0x40, .match_mask = 0x66, @@ -679,7 +679,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", .match = 0x8, .match_mask = 0x18, @@ -693,7 +693,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", .match = 0x10, .match_mask = 0x18, @@ -707,7 +707,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x7f, @@ -721,7 +721,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", .match = 0x2, .match_mask = 0x6, @@ -735,7 +735,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x4, .match_mask = 0x6, @@ -749,7 +749,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x24, .match_mask = 0x66, @@ -763,7 +763,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", .match = 0x6, .match_mask = 0x6, @@ -777,7 +777,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", .match = 0x18, .match_mask = 0x18, @@ -791,7 +791,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", .match = 0x60, .match_mask = 0x60, @@ -805,7 +805,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", .match = 0x46, .match_mask = 0x66, @@ -819,7 +819,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", .match = 0x2, .match_mask = 0x2, @@ -833,7 +833,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ .name = "INGRESS_PKT_OUTER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -847,7 +847,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", .match = 0x0, .match_mask = 0x7, @@ -861,7 +861,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", .match = 0x4, .match_mask = 0x4, @@ -875,7 +875,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", .match = 0x20, .match_mask = 0x66, @@ -889,7 +889,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -903,7 +903,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", .match = 0x40, .match_mask = 0x66, @@ -917,7 +917,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", .match = 0x8, .match_mask = 0x18, @@ -931,7 +931,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", .match = 0x10, .match_mask = 0x18, @@ -945,7 +945,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x7f, @@ -959,7 +959,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", .match = 0x2, .match_mask = 0x6, @@ -973,7 +973,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x4, .match_mask = 0x6, @@ -987,7 +987,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x24, .match_mask = 0x66, @@ -1001,7 +1001,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", .match = 0x6, .match_mask = 0x6, @@ -1015,7 +1015,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", .match = 0x18, .match_mask = 0x18, @@ -1029,7 +1029,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", .match = 0x60, .match_mask = 0x60, @@ -1043,7 +1043,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", .match = 0x46, .match_mask = 0x66, @@ -1057,7 +1057,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", .match = 0x26, .match_mask = 0x66, @@ -1071,7 +1071,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ .name = "INGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -1085,7 +1085,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -1099,7 +1099,7 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ .name = "INGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -1114,23 +1114,23 @@ bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MA }, }; -static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info = { +static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info = { .num_entries = 77, - .db = bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db + .db = bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_db }; -bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info_get(void) { - return &bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info; +bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info_get(void) { + return &bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info; } -static shr_enum_map_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +static shr_enum_map_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_map[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT }; -static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info = { +static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info = { .num_entries = 77, - .map = bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map + .map = bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_map }; -bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info_get(void) { - return &bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info; +bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info_get(void) { + return &bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info; } diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_pkt_flexhdr.c similarity index 73% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_pkt_flexhdr.c index e0fd5d917d7..88676df6b79 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_pkt_flexhdr.c @@ -3,7 +3,7 @@ * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser * from the NPL output file(s) map.yml - * for device bcm56780_a0 and variant cna_6_5_30_2_0. + * for device bcm56780_a0 and variant cna_6_5_31_3_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -31,543 +31,468 @@ #include #include #include -#include -#include -#include +#include +#include +#include #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -static void bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +static void bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) { uint32_t *reason = data + 0; if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); } if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); } if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); } if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); } if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); } if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); } if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); } if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); } if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); } if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); } if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); } if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); } if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); } if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); } if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP); } if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP); } if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); } if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); } if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); } } -static void bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +static void bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) { uint32_t *reason = data + 0; reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { reason[13] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { reason[13] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { reason[13] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { reason[13] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { reason[13] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { reason[13] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { reason[13] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { reason[13] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { reason[13] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { reason[13] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { reason[13] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { reason[13] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { reason[13] |= (0x1 << 14); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { reason[13] |= (0x1 << 16); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { reason[13] |= (0x1 << 17); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { reason[13] |= (0x1 << 18); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { reason[13] |= (0x1 << 19); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { reason[13] |= (0x1 << 23); } reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { reason[12] |= (0x1 << 15); } } -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_field_data[] = { +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_field_data[] = { { .name = "DROP_CODE_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 48, 63 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ { 48, 63 }, /* Profile 4. */ - { 48, 63 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { 48, 63 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "DVP_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 336, 351 }, /* Profile 2. */ { 336, 351 }, /* Profile 3. */ { 336, 351 }, /* Profile 4. */ - { 320, 335 }, /* Profile 5. */ - { 320, 335 }, /* Profile 6. */ - { 320, 335 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "EFFECTIVE_TTL_7_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 128, 135 }, /* Profile 2. */ { 128, 135 }, /* Profile 3. */ { 128, 135 }, /* Profile 4. */ - { 128, 135 }, /* Profile 5. */ - { 128, 135 }, /* Profile 6. */ - { 128, 135 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 416, 419 }, /* Profile 2. */ { 416, 419 }, /* Profile 3. */ { 416, 419 }, /* Profile 4. */ - { 384, 387 }, /* Profile 5. */ - { 384, 387 }, /* Profile 6. */ - { 384, 387 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 160, 175 }, /* Profile 2. */ { 160, 175 }, /* Profile 3. */ { 160, 175 }, /* Profile 4. */ - { 160, 175 }, /* Profile 5. */ - { 160, 175 }, /* Profile 6. */ - { 160, 175 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "EP_NIH_HDR_DROP_CODE_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { 48, 63 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { 48, 63 }, /* Profile 6. */ }, - .profile_cnt = 7, + .profile_cnt = 4, }, { .name = "EP_NIH_HDR_RECIRC_CODE_3_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 396, 399 }, /* Profile 2. */ { 396, 399 }, /* Profile 3. */ { 396, 399 }, /* Profile 4. */ - { 364, 367 }, /* Profile 5. */ - { 364, 367 }, /* Profile 6. */ - { 364, 367 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "EP_NIH_HDR_TIMESTAMP_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 256, 271 }, /* Profile 2. */ - { 256, 271 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { 240, 255 }, /* Profile 5. */ - { 240, 255 }, /* Profile 6. */ + { 272, 287 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ }, - .profile_cnt = 7, + .profile_cnt = 4, }, { .name = "EP_NIH_HDR_TIMESTAMP_31_16", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 272, 287 }, /* Profile 2. */ - { 272, 287 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { 256, 271 }, /* Profile 5. */ - { 256, 271 }, /* Profile 6. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ }, - .profile_cnt = 7, + .profile_cnt = 4, }, { .name = "ERSPAN3_GBP_SID_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 144, 159 }, /* Profile 2. */ { 144, 159 }, /* Profile 3. */ { 144, 159 }, /* Profile 4. */ - { 144, 159 }, /* Profile 5. */ - { 144, 159 }, /* Profile 6. */ - { 144, 159 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "EVENT_TRACE_VECTOR_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 0, 15 }, /* Profile 2. */ { 0, 15 }, /* Profile 3. */ { 0, 15 }, /* Profile 4. */ - { 0, 15 }, /* Profile 5. */ - { 0, 15 }, /* Profile 6. */ - { 0, 15 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "EVENT_TRACE_VECTOR_31_16", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 16, 31 }, /* Profile 2. */ { 16, 31 }, /* Profile 3. */ { 16, 31 }, /* Profile 4. */ - { 16, 31 }, /* Profile 5. */ - { 16, 31 }, /* Profile 6. */ - { 16, 31 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 32, 47 }, /* Profile 2. */ { 32, 47 }, /* Profile 3. */ { 32, 47 }, /* Profile 4. */ - { 32, 47 }, /* Profile 5. */ - { 32, 47 }, /* Profile 6. */ - { 32, 47 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "I2E_CLASS_ID_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 320, 335 }, /* Profile 2. */ { 320, 335 }, /* Profile 3. */ { 320, 335 }, /* Profile 4. */ - { 304, 319 }, /* Profile 5. */ - { 304, 319 }, /* Profile 6. */ - { 304, 319 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "ING_TIMESTAMP_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ - { 256, 271 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { 240, 255 }, /* Profile 7. */ + { 272, 287 }, /* Profile 4. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "ING_TIMESTAMP_31_16", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ - { 272, 287 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { 256, 271 }, /* Profile 7. */ + { 288, 303 }, /* Profile 4. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "INGRESS_PP_PORT_7_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 240, 247 }, /* Profile 2. */ - { 240, 247 }, /* Profile 3. */ - { 240, 247 }, /* Profile 4. */ - { 224, 231 }, /* Profile 5. */ - { 224, 231 }, /* Profile 6. */ - { 224, 231 }, /* Profile 7. */ + { 256, 263 }, /* Profile 2. */ + { 256, 263 }, /* Profile 3. */ + { 256, 263 }, /* Profile 4. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 176, 191 }, /* Profile 2. */ { 176, 191 }, /* Profile 3. */ { 176, 191 }, /* Profile 4. */ - { 176, 191 }, /* Profile 5. */ - { 176, 191 }, /* Profile 6. */ - { 176, 191 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 404, 407 }, /* Profile 2. */ { 404, 407 }, /* Profile 3. */ { 404, 407 }, /* Profile 4. */ - { 372, 375 }, /* Profile 5. */ - { 372, 375 }, /* Profile 6. */ - { 372, 375 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "INT_PRI_3_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 392, 395 }, /* Profile 2. */ - { 392, 395 }, /* Profile 3. */ - { 392, 395 }, /* Profile 4. */ - { 360, 363 }, /* Profile 5. */ - { 360, 363 }, /* Profile 6. */ - { 360, 363 }, /* Profile 7. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "L2_IIF_10_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 304, 314 }, /* Profile 2. */ { 304, 314 }, /* Profile 3. */ { 304, 314 }, /* Profile 4. */ - { 288, 298 }, /* Profile 5. */ - { 288, 298 }, /* Profile 6. */ - { 288, 298 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "L2_OIF_10_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 208, 218 }, /* Profile 2. */ - { 208, 218 }, /* Profile 3. */ - { 208, 218 }, /* Profile 4. */ - { 208, 218 }, /* Profile 5. */ - { 208, 218 }, /* Profile 6. */ - { 208, 218 }, /* Profile 7. */ + { 224, 234 }, /* Profile 2. */ + { 224, 234 }, /* Profile 3. */ + { 224, 234 }, /* Profile 4. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "L2_TUNNEL_SVP_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 288, 303 }, /* Profile 2. */ - { 288, 303 }, /* Profile 3. */ - { 288, 303 }, /* Profile 4. */ - { 272, 287 }, /* Profile 5. */ - { 272, 287 }, /* Profile 6. */ - { 272, 287 }, /* Profile 7. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "L3_IIF_13_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 352, 365 }, /* Profile 2. */ { 352, 365 }, /* Profile 3. */ { 352, 365 }, /* Profile 4. */ - { 336, 349 }, /* Profile 5. */ - { 336, 349 }, /* Profile 6. */ - { 336, 349 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "L3_OIF_1_13_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 224, 237 }, /* Profile 2. */ - { 224, 237 }, /* Profile 3. */ - { 224, 237 }, /* Profile 4. */ + { 240, 253 }, /* Profile 2. */ + { 240, 253 }, /* Profile 3. */ + { 240, 253 }, /* Profile 4. */ }, .profile_cnt = 5, }, { .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 80, 94 }, /* Profile 2. */ { 80, 94 }, /* Profile 3. */ { 80, 94 }, /* Profile 4. */ - { 80, 94 }, /* Profile 5. */ - { 80, 94 }, /* Profile 6. */ - { 80, 94 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "NHOP_INDEX_1_14_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -579,153 +504,130 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_field_ }, { .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 64, 79 }, /* Profile 2. */ { 64, 79 }, /* Profile 3. */ { 64, 79 }, /* Profile 4. */ - { 64, 79 }, /* Profile 5. */ - { 64, 79 }, /* Profile 6. */ - { 64, 79 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 400, 403 }, /* Profile 2. */ { 400, 403 }, /* Profile 3. */ { 400, 403 }, /* Profile 4. */ - { 368, 371 }, /* Profile 5. */ - { 368, 371 }, /* Profile 6. */ - { 368, 371 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 384, 387 }, /* Profile 2. */ - { 384, 387 }, /* Profile 3. */ - { 384, 387 }, /* Profile 4. */ - { 352, 355 }, /* Profile 5. */ - { 352, 355 }, /* Profile 6. */ - { 352, 355 }, /* Profile 7. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 112, 127 }, /* Profile 2. */ { 112, 127 }, /* Profile 3. */ { 112, 127 }, /* Profile 4. */ - { 112, 127 }, /* Profile 5. */ - { 112, 127 }, /* Profile 6. */ - { 112, 127 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 412, 415 }, /* Profile 2. */ { 412, 415 }, /* Profile 3. */ { 412, 415 }, /* Profile 4. */ - { 380, 383 }, /* Profile 5. */ - { 380, 383 }, /* Profile 6. */ - { 380, 383 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 96, 111 }, /* Profile 2. */ { 96, 111 }, /* Profile 3. */ { 96, 111 }, /* Profile 4. */ - { 96, 111 }, /* Profile 5. */ - { 96, 111 }, /* Profile 6. */ - { 96, 111 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "TAG_ACTION_CTRL_1_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 408, 409 }, /* Profile 2. */ { 408, 409 }, /* Profile 3. */ { 408, 409 }, /* Profile 4. */ - { 376, 377 }, /* Profile 5. */ - { 376, 377 }, /* Profile 6. */ - { 376, 377 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 388, 391 }, /* Profile 2. */ - { 388, 391 }, /* Profile 3. */ - { 388, 391 }, /* Profile 4. */ - { 356, 359 }, /* Profile 5. */ - { 356, 359 }, /* Profile 6. */ - { 356, 359 }, /* Profile 7. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "VFI_15_0", - .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 192, 207 }, /* Profile 2. */ - { 192, 207 }, /* Profile 3. */ - { 192, 207 }, /* Profile 4. */ - { 192, 207 }, /* Profile 5. */ - { 192, 207 }, /* Profile 6. */ - { 192, 207 }, /* Profile 7. */ + { 208, 223 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, -};static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_field_data, +}; +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 1, + .profile_bmp[0] = 0x1c, + }; -static shr_enum_map_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_names[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +static shr_enum_map_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reason_names[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT }; -static bcmpkt_flex_reasons_info_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_names, - .reason_encode = bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_encode, - .reason_decode = bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_decode, +static bcmpkt_flex_reasons_info_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reason_names, + .reason_encode = bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reason_decode, }; @@ -868,7 +770,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_arp_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_arp_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_get, bcmpkt_arp_t_hardware_type_get, bcmpkt_arp_t_operation_get, @@ -880,7 +782,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_arp_t_fget[BCM56780_A0_CNA_6_ bcmpkt_arp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_arp_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_arp_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_set, bcmpkt_arp_t_hardware_type_set, bcmpkt_arp_t_operation_set, @@ -892,13 +794,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_arp_t_fset[BCM56780_A0_CNA_6_ bcmpkt_arp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_arp_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_arp_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_arp_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_arp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_arp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_arp_t_field_data, }; @@ -1014,7 +916,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_get, bcmpkt_cpu_composites_0_t_dma_cont1_get, bcmpkt_cpu_composites_0_t_dma_cont2_get, @@ -1024,7 +926,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_set, bcmpkt_cpu_composites_0_t_dma_cont1_set, bcmpkt_cpu_composites_0_t_dma_cont2_set, @@ -1034,13 +936,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_data, }; @@ -1220,7 +1122,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_get, bcmpkt_cpu_composites_1_t_dma_cont11_get, bcmpkt_cpu_composites_1_t_dma_cont12_get, @@ -1234,7 +1136,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_set, bcmpkt_cpu_composites_1_t_dma_cont11_set, bcmpkt_cpu_composites_1_t_dma_cont12_set, @@ -1248,13 +1150,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_data, }; @@ -1440,7 +1342,7 @@ static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_get, bcmpkt_ep_nih_header_t_header_type_get, bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, @@ -1455,7 +1357,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fget[BCM56780 bcmpkt_ep_nih_header_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_set, bcmpkt_ep_nih_header_t_header_type_set, bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, @@ -1470,13 +1372,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fset[BCM56780 bcmpkt_ep_nih_header_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_field_data, }; @@ -1616,7 +1518,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_get, bcmpkt_erspan3_fixed_hdr_t_cos_get, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, @@ -1628,7 +1530,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_set, bcmpkt_erspan3_fixed_hdr_t_cos_set, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, @@ -1640,13 +1542,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data, }; @@ -1711,27 +1613,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_get, bcmpkt_erspan3_subhdr_5_t_port_id_get, bcmpkt_erspan3_subhdr_5_t_switch_id_get, bcmpkt_erspan3_subhdr_5_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_set, bcmpkt_erspan3_subhdr_5_t_port_id_set, bcmpkt_erspan3_subhdr_5_t_switch_id_set, bcmpkt_erspan3_subhdr_5_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_data, }; @@ -1750,21 +1652,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ethertype_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_ethertype_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ethertype_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_ethertype_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ethertype_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_ethertype_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ethertype_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_ethertype_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_ethertype_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_ethertype_t_field_data, }; @@ -1993,7 +1895,7 @@ static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_get, bcmpkt_generic_loopback_t_destination_type_get, bcmpkt_generic_loopback_t_entropy_obj_get, @@ -2011,7 +1913,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fget[BCM56 bcmpkt_generic_loopback_t_start_byte_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_set, bcmpkt_generic_loopback_t_destination_type_set, bcmpkt_generic_loopback_t_entropy_obj_set, @@ -2029,13 +1931,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fset[BCM56 bcmpkt_generic_loopback_t_start_byte_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_field_data, }; @@ -2084,25 +1986,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_icmp_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_icmp_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_get, bcmpkt_icmp_t_code_get, bcmpkt_icmp_t_icmp_type_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_icmp_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_icmp_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_set, bcmpkt_icmp_t_code_set, bcmpkt_icmp_t_icmp_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_icmp_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_icmp_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_icmp_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_icmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_icmp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_icmp_t_field_data, }; @@ -2184,7 +2086,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_ipfix_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_get, bcmpkt_ipfix_t_length_get, bcmpkt_ipfix_t_obs_domain_id_get, @@ -2192,7 +2094,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fget[BCM56780_A0_CNA_ bcmpkt_ipfix_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_ipfix_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_set, bcmpkt_ipfix_t_length_set, bcmpkt_ipfix_t_obs_domain_id_set, @@ -2200,13 +2102,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fset[BCM56780_A0_CNA_ bcmpkt_ipfix_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ipfix_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_ipfix_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ipfix_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_ipfix_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_ipfix_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_ipfix_t_field_data, }; @@ -2378,7 +2280,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_ipv4_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_get, bcmpkt_ipv4_t_flags_frag_offset_get, bcmpkt_ipv4_t_hdr_checksum_get, @@ -2392,7 +2294,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fget[BCM56780_A0_CNA_6 bcmpkt_ipv4_t_version_hdr_len_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_ipv4_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_set, bcmpkt_ipv4_t_flags_frag_offset_set, bcmpkt_ipv4_t_hdr_checksum_set, @@ -2406,13 +2308,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fset[BCM56780_A0_CNA_6 bcmpkt_ipv4_t_version_hdr_len_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ipv4_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_ipv4_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ipv4_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_ipv4_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_ipv4_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_ipv4_t_field_data, }; @@ -2538,7 +2440,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_ipv6_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_get, bcmpkt_ipv6_t_flow_label_get, bcmpkt_ipv6_t_hop_limit_get, @@ -2549,7 +2451,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fget[BCM56780_A0_CNA_6 bcmpkt_ipv6_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_ipv6_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_set, bcmpkt_ipv6_t_flow_label_set, bcmpkt_ipv6_t_hop_limit_set, @@ -2560,13 +2462,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fset[BCM56780_A0_CNA_6 bcmpkt_ipv6_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ipv6_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_ipv6_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ipv6_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_ipv6_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_ipv6_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_ipv6_t_field_data, }; @@ -2602,23 +2504,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_l2_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_l2_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_get, bcmpkt_l2_t_macsa_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_l2_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_l2_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_set, bcmpkt_l2_t_macsa_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_l2_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_l2_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_l2_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_l2_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_l2_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_l2_t_field_data, }; @@ -2638,21 +2540,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_data, }; @@ -2672,21 +2574,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_field_data, }; @@ -2798,7 +2700,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, bcmpkt_psamp_mirror_on_drop_0_t_length_get, @@ -2808,7 +2710,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, bcmpkt_psamp_mirror_on_drop_0_t_length_set, @@ -2818,13 +2720,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data, }; @@ -2918,7 +2820,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *d return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, @@ -2927,7 +2829,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, @@ -2936,13 +2838,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_data, }; @@ -3036,7 +2938,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *d return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get, bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get, bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get, @@ -3045,7 +2947,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set, bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set, bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set, @@ -3054,13 +2956,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_data, }; @@ -3203,7 +3105,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_rarp_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_rarp_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_get, bcmpkt_rarp_t_hardware_type_get, bcmpkt_rarp_t_operation_get, @@ -3215,7 +3117,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_rarp_t_fget[BCM56780_A0_CNA_6 bcmpkt_rarp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_rarp_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_rarp_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_set, bcmpkt_rarp_t_hardware_type_set, bcmpkt_rarp_t_operation_set, @@ -3227,13 +3129,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_rarp_t_fset[BCM56780_A0_CNA_6 bcmpkt_rarp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_rarp_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_rarp_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_rarp_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_rarp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_rarp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_rarp_t_field_data, }; @@ -3267,23 +3169,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_get, bcmpkt_tcp_first_4bytes_t_src_port_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_set, bcmpkt_tcp_first_4bytes_t_src_port_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_data, }; @@ -3379,7 +3281,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_get, bcmpkt_tcp_last_16bytes_t_checksum_get, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, @@ -3388,7 +3290,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_set, bcmpkt_tcp_last_16bytes_t_checksum_set, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, @@ -3397,13 +3299,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_data, }; @@ -3467,27 +3369,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_udp_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_udp_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_get, bcmpkt_udp_t_dst_port_get, bcmpkt_udp_t_src_port_get, bcmpkt_udp_t_udp_length_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_udp_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_udp_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_set, bcmpkt_udp_t_dst_port_set, bcmpkt_udp_t_src_port_set, bcmpkt_udp_t_udp_length_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_udp_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_udp_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_udp_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_udp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_udp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_udp_t_field_data, }; @@ -3523,23 +3425,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_field_data, }; @@ -3559,21 +3461,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_field_data, }; @@ -3623,25 +3525,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_get, bcmpkt_unknown_l5_t_l5_bytes_2_3_get, bcmpkt_unknown_l5_t_l5_bytes_4_7_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_set, bcmpkt_unknown_l5_t_l5_bytes_2_3_set, bcmpkt_unknown_l5_t_l5_bytes_4_7_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_field_data, }; @@ -3705,27 +3607,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_vlan_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_vlan_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_get, bcmpkt_vlan_t_pcp_get, bcmpkt_vlan_t_tpid_get, bcmpkt_vlan_t_vid_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_vlan_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_vlan_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_set, bcmpkt_vlan_t_pcp_set, bcmpkt_vlan_t_tpid_set, bcmpkt_vlan_t_vid_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_vlan_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_vlan_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_vlan_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_vlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_vlan_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_vlan_t_field_data, }; @@ -3775,245 +3677,245 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_vxlan_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_vxlan_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_get, bcmpkt_vxlan_t_reserved2_get, bcmpkt_vxlan_t_vn_id_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_vxlan_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_vxlan_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_set, bcmpkt_vxlan_t_reserved2_set, bcmpkt_vxlan_t_vn_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_vxlan_t_field_data[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_vxlan_t_field_data[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_vxlan_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_30_2_0_vxlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_vxlan_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_31_3_0_vxlan_t_field_data, }; -static bcmpkt_flex_pmd_info_t bcm56780_a0_cna_6_5_30_2_0_flexhdr_info_list[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT] = { +static bcmpkt_flex_pmd_info_t bcm56780_a0_cna_6_5_31_3_0_flexhdr_info_list[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT] = { { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_arp_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_arp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_arp_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_arp_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_arp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_arp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_ethertype_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_ethertype_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ethertype_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ethertype_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_ethertype_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_ethertype_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_icmp_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_icmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_icmp_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_icmp_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_icmp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_icmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_ipfix_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_ipfix_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_ipfix_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_ipfix_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_ipv4_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_ipv4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_ipv4_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_ipv4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_ipv6_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_ipv6_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_ipv6_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_ipv6_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_l2_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_l2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_l2_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_l2_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_l2_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_l2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_rarp_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_rarp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_rarp_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_rarp_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_rarp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_rarp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_udp_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_udp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_udp_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_udp_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_udp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_udp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_vlan_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_vlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_vlan_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_vlan_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_vlan_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_vlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_vxlan_t_field_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_vxlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_30_2_0_vxlan_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_30_2_0_vxlan_t_fset, + .flex_fget = bcm56780_a0_cna_6_5_31_3_0_vxlan_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_31_3_0_vxlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_field_info, - .reasons_info = &bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reasons_info, + .field_info = &bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_field_info, + .reasons_info = &bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reasons_info, .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, }, }; -static shr_enum_map_t bcm56780_a0_cna_6_5_30_2_0_flexhdr_id_map[] = { - BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +static shr_enum_map_t bcm56780_a0_cna_6_5_31_3_0_flexhdr_id_map[] = { + BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT }; -shr_enum_map_t * bcm56780_a0_cna_6_5_30_2_0_flexhdr_map_get(void) +shr_enum_map_t * bcm56780_a0_cna_6_5_31_3_0_flexhdr_map_get(void) { - return bcm56780_a0_cna_6_5_30_2_0_flexhdr_id_map; + return bcm56780_a0_cna_6_5_31_3_0_flexhdr_id_map; } -bcmpkt_flex_pmd_info_t * bcm56780_a0_cna_6_5_30_2_0_flex_pmd_info_get(uint32_t hid) +bcmpkt_flex_pmd_info_t * bcm56780_a0_cna_6_5_31_3_0_flex_pmd_info_get(uint32_t hid) { - if (hid >= BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT) { + if (hid >= BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT) { return NULL; } - return &bcm56780_a0_cna_6_5_30_2_0_flexhdr_info_list[hid]; + return &bcm56780_a0_cna_6_5_31_3_0_flexhdr_info_list[hid]; } -int bcm56780_a0_cna_6_5_30_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { +int bcm56780_a0_cna_6_5_31_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { 7, -1, -1, diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c similarity index 84% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c index da2f4202ced..3836608aac4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c @@ -2,8 +2,8 @@ * * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56780_a0_dna_6_5_30_2_0_sf_match_id_info.yml - * for device bcm56780_a0 and variant dna_6_5_30_2_0. + * from the NPL output file(s) bcm56780_a0_dna_6_5_31_7_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant dna_6_5_31_7_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -29,13 +29,13 @@ #include -#include +#include static bcmpkt_rxpmd_match_id_db_t -bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT] = { +bcm56780_a0_dna_6_5_31_7_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_COUNT] = { { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", .match = 0x80, .match_mask = 0xc0, @@ -49,7 +49,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", .match = 0x2, .match_mask = 0x2, @@ -63,7 +63,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", .match = 0x22, .match_mask = 0x22, @@ -77,7 +77,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", .match = 0x10, .match_mask = 0x10, @@ -91,7 +91,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ .name = "EGRESS_PKT_FWD_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -105,7 +105,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ .name = "EGRESS_PKT_FWD_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -119,7 +119,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", .match = 0x8, .match_mask = 0x8, @@ -133,7 +133,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -147,7 +147,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", .match = 0x20, .match_mask = 0x22, @@ -161,7 +161,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", .match = 0x40, .match_mask = 0xc0, @@ -175,7 +175,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -189,7 +189,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -203,7 +203,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -217,7 +217,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -231,7 +231,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -245,7 +245,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -259,7 +259,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -273,7 +273,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -287,7 +287,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", .match = 0x1830, .match_mask = 0x3870, @@ -301,7 +301,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", .match = 0x2, .match_mask = 0x42, @@ -315,7 +315,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", .match = 0x202, .match_mask = 0x642, @@ -329,7 +329,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", .match = 0x1000, .match_mask = 0x3800, @@ -343,7 +343,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", .match = 0x82, .match_mask = 0x1c2, @@ -357,7 +357,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", .match = 0x12, .match_mask = 0x72, @@ -371,7 +371,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -385,7 +385,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -399,7 +399,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -413,7 +413,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -427,7 +427,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -441,7 +441,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -455,7 +455,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -469,7 +469,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -483,7 +483,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -497,7 +497,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -511,7 +511,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -525,7 +525,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -539,7 +539,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -553,7 +553,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -567,7 +567,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -581,7 +581,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -595,7 +595,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -609,7 +609,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -623,7 +623,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -637,7 +637,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -651,7 +651,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -665,7 +665,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -679,7 +679,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -693,7 +693,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", .match = 0x830, .match_mask = 0x3870, @@ -707,7 +707,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ .name = "EGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -721,7 +721,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -735,7 +735,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ .name = "EGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -749,7 +749,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", .match = 0x80, .match_mask = 0xc0, @@ -763,7 +763,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", .match = 0x2, .match_mask = 0x2, @@ -777,7 +777,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", .match = 0x22, .match_mask = 0x22, @@ -791,7 +791,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", .match = 0x10, .match_mask = 0x10, @@ -805,7 +805,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -819,7 +819,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -833,7 +833,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", .match = 0x8, .match_mask = 0x8, @@ -847,7 +847,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -861,7 +861,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", .match = 0x20, .match_mask = 0x22, @@ -875,7 +875,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", .match = 0x40, .match_mask = 0xc0, @@ -889,7 +889,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -903,7 +903,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -917,7 +917,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -931,7 +931,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -945,7 +945,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -959,7 +959,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -973,7 +973,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -987,7 +987,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -1001,7 +1001,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", .match = 0x1830, .match_mask = 0x3870, @@ -1015,7 +1015,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", .match = 0x2, .match_mask = 0x42, @@ -1029,7 +1029,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", .match = 0x202, .match_mask = 0x642, @@ -1043,7 +1043,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", .match = 0x1000, .match_mask = 0x3800, @@ -1057,7 +1057,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", .match = 0x82, .match_mask = 0x1c2, @@ -1071,7 +1071,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", .match = 0x12, .match_mask = 0x72, @@ -1085,7 +1085,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -1099,7 +1099,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -1113,7 +1113,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -1127,7 +1127,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -1141,7 +1141,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -1155,7 +1155,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -1169,7 +1169,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -1183,7 +1183,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -1197,7 +1197,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -1211,7 +1211,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -1225,7 +1225,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -1239,7 +1239,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -1253,7 +1253,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -1267,7 +1267,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -1281,7 +1281,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -1295,7 +1295,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -1309,7 +1309,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -1323,7 +1323,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -1337,7 +1337,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -1351,7 +1351,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -1365,7 +1365,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -1379,7 +1379,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -1393,7 +1393,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -1407,7 +1407,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", .match = 0x830, .match_mask = 0x3870, @@ -1421,7 +1421,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", .match = 0x80, .match_mask = 0xc0, @@ -1435,7 +1435,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", .match = 0x10, .match_mask = 0x10, @@ -1449,7 +1449,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ .name = "INGRESS_PKT_INNER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -1463,7 +1463,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ .name = "INGRESS_PKT_INNER_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -1477,7 +1477,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", .match = 0x8, .match_mask = 0x8, @@ -1491,7 +1491,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -1505,7 +1505,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", .match = 0x40, .match_mask = 0xc0, @@ -1519,7 +1519,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -1533,7 +1533,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -1547,7 +1547,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -1561,7 +1561,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -1575,7 +1575,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -1589,7 +1589,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -1603,7 +1603,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -1617,7 +1617,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -1631,7 +1631,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -1645,7 +1645,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -1659,7 +1659,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -1673,7 +1673,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -1687,7 +1687,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -1701,7 +1701,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -1715,7 +1715,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -1729,7 +1729,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -1743,7 +1743,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -1757,7 +1757,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -1771,7 +1771,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -1785,7 +1785,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -1799,7 +1799,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -1813,7 +1813,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -1827,7 +1827,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", .match = 0x80, .match_mask = 0xc0, @@ -1841,7 +1841,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", .match = 0x2, .match_mask = 0x2, @@ -1855,7 +1855,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", .match = 0x22, .match_mask = 0x22, @@ -1869,7 +1869,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", .match = 0x10, .match_mask = 0x10, @@ -1883,7 +1883,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ .name = "INGRESS_PKT_OUTER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -1897,7 +1897,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -1911,7 +1911,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", .match = 0x8, .match_mask = 0x8, @@ -1925,7 +1925,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -1939,7 +1939,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", .match = 0x20, .match_mask = 0x22, @@ -1953,7 +1953,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", .match = 0x40, .match_mask = 0xc0, @@ -1967,7 +1967,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -1981,7 +1981,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -1995,7 +1995,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -2009,7 +2009,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -2023,7 +2023,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -2037,7 +2037,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -2051,7 +2051,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -2065,7 +2065,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -2079,7 +2079,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", .match = 0x1830, .match_mask = 0x3870, @@ -2093,7 +2093,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", .match = 0x2, .match_mask = 0x42, @@ -2107,7 +2107,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", .match = 0x202, .match_mask = 0x642, @@ -2121,7 +2121,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", .match = 0x1000, .match_mask = 0x3800, @@ -2135,7 +2135,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", .match = 0x82, .match_mask = 0x1c2, @@ -2149,7 +2149,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", .match = 0x12, .match_mask = 0x72, @@ -2163,7 +2163,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -2177,7 +2177,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -2191,7 +2191,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -2205,7 +2205,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -2219,7 +2219,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -2233,7 +2233,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -2247,7 +2247,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -2261,7 +2261,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -2275,7 +2275,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -2289,7 +2289,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -2303,7 +2303,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -2317,7 +2317,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -2331,7 +2331,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -2345,7 +2345,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -2359,7 +2359,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -2373,7 +2373,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -2387,7 +2387,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -2401,7 +2401,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -2415,7 +2415,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -2429,7 +2429,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -2443,7 +2443,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -2457,7 +2457,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -2471,7 +2471,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -2485,7 +2485,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", .match = 0x830, .match_mask = 0x3870, @@ -2499,7 +2499,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ .name = "INGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -2513,7 +2513,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -2527,7 +2527,7 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + /* BCM56780_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ .name = "INGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -2542,23 +2542,23 @@ bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MA }, }; -static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db_info = { +static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_dna_6_5_31_7_0_rxpmd_match_id_db_info = { .num_entries = 179, - .db = bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db + .db = bcm56780_a0_dna_6_5_31_7_0_rxpmd_match_id_db }; -bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db_info_get(void) { - return &bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db_info; +bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_dna_6_5_31_7_0_rxpmd_match_id_db_info_get(void) { + return &bcm56780_a0_dna_6_5_31_7_0_rxpmd_match_id_db_info; } -static shr_enum_map_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +static shr_enum_map_t bcm56780_a0_dna_6_5_31_7_0_rxpmd_match_id_map[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT }; -static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map_info = { +static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_dna_6_5_31_7_0_rxpmd_match_id_map_info = { .num_entries = 179, - .map = bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map + .map = bcm56780_a0_dna_6_5_31_7_0_rxpmd_match_id_map }; -bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map_info_get(void) { - return &bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map_info; +bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_dna_6_5_31_7_0_rxpmd_match_id_map_info_get(void) { + return &bcm56780_a0_dna_6_5_31_7_0_rxpmd_match_id_map_info; } diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_pkt_flexhdr.c similarity index 70% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_pkt_flexhdr.c index a66a52e569c..d3da80cbbc3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_pkt_flexhdr.c @@ -3,7 +3,7 @@ * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser * from the NPL output file(s) map.yml - * for device bcm56780_a0 and variant dna_6_5_30_2_0. + * for device bcm56780_a0 and variant dna_6_5_31_7_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -31,309 +31,309 @@ #include #include #include -#include -#include -#include +#include +#include +#include #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -static void bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +static void bcm56780_a0_dna_6_5_31_7_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) { uint32_t *reason = data + 0; if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); } if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); } if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); } if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); } if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); } if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); } if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); } if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); } if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); } if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); } if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); } if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); } if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); } if (reason[13] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); } if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); } if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP); } if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP); } if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); } if (reason[13] & (0x1 << 20)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); } if (reason[13] & (0x1 << 21)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP); } if (reason[13] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); } if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); } if (reason[13] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); } if (reason[13] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); } if (reason[13] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); } if (reason[13] & (0x1 << 27)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); } if (reason[13] & (0x1 << 28)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); } if (reason[13] & (0x1 << 29)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[13] & (0x1 << 30)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[13] & (0x1 << 31)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); } if (reason[12] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); } if (reason[12] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); } if (reason[12] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); } if (reason[12] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); } if (reason[12] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); } if (reason[12] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); } if (reason[12] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); } if (reason[12] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); } if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY); } if (reason[12] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); } if (reason[12] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); } if (reason[12] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); } if (reason[12] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); } if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); } } -static void bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +static void bcm56780_a0_dna_6_5_31_7_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) { uint32_t *reason = data + 0; reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { reason[13] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { reason[13] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { reason[13] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { reason[13] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { reason[13] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { reason[13] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { reason[13] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { reason[13] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { reason[13] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { reason[13] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { reason[13] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { reason[13] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { reason[13] |= (0x1 << 14); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { reason[13] |= (0x1 << 15); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { reason[13] |= (0x1 << 16); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { reason[13] |= (0x1 << 17); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { reason[13] |= (0x1 << 18); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { reason[13] |= (0x1 << 19); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { reason[13] |= (0x1 << 20); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { reason[13] |= (0x1 << 21); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { reason[13] |= (0x1 << 22); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { reason[13] |= (0x1 << 23); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { reason[13] |= (0x1 << 24); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { reason[13] |= (0x1 << 25); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { reason[13] |= (0x1 << 26); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { reason[13] |= (0x1 << 27); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { reason[13] |= (0x1 << 28); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[13] |= (0x1 << 29); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[13] |= (0x1 << 30); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { reason[13] |= (0x1 << 31); } reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { reason[12] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { reason[12] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { reason[12] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { reason[12] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { reason[12] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { reason[12] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { reason[12] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { reason[12] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) { reason[12] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { reason[12] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { reason[12] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { reason[12] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { reason[12] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { reason[12] |= (0x1 << 15); } } -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_data[] = { +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_rxpmd_flex_field_data[] = { { .name = "DLB_ECMP_DESTINATION_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -349,12 +349,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 224, 239 }, /* Profile 11. */ { 240, 255 }, /* Profile 12. */ { 224, 239 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 240, 255 }, /* Profile 20. */ + { 224, 239 }, /* Profile 21. */ + { 240, 255 }, /* Profile 22. */ + { 224, 239 }, /* Profile 23. */ + { 240, 255 }, /* Profile 24. */ + { 224, 239 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "DROP_CODE_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -370,12 +382,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { -1, -1 }, /* Profile 11. */ { 48, 63 }, /* Profile 12. */ { 48, 63 }, /* Profile 13. */ + { 48, 63 }, /* Profile 14. */ + { 48, 63 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 48, 63 }, /* Profile 18. */ + { 48, 63 }, /* Profile 19. */ + { 48, 63 }, /* Profile 20. */ + { 48, 63 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 48, 63 }, /* Profile 24. */ + { 48, 63 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "DVP_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -391,12 +415,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 368, 383 }, /* Profile 11. */ { 368, 383 }, /* Profile 12. */ { 368, 383 }, /* Profile 13. */ + { 368, 383 }, /* Profile 14. */ + { 368, 383 }, /* Profile 15. */ + { 368, 383 }, /* Profile 16. */ + { 368, 383 }, /* Profile 17. */ + { 368, 383 }, /* Profile 18. */ + { 368, 383 }, /* Profile 19. */ + { 368, 383 }, /* Profile 20. */ + { 368, 383 }, /* Profile 21. */ + { 368, 383 }, /* Profile 22. */ + { 368, 383 }, /* Profile 23. */ + { 368, 383 }, /* Profile 24. */ + { 368, 383 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "EFFECTIVE_TTL_7_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -412,12 +448,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 240, 247 }, /* Profile 11. */ { 256, 263 }, /* Profile 12. */ { 240, 247 }, /* Profile 13. */ + { 256, 263 }, /* Profile 14. */ + { 240, 247 }, /* Profile 15. */ + { 256, 263 }, /* Profile 16. */ + { 240, 247 }, /* Profile 17. */ + { 256, 263 }, /* Profile 18. */ + { 240, 247 }, /* Profile 19. */ + { 256, 263 }, /* Profile 20. */ + { 240, 247 }, /* Profile 21. */ + { 256, 263 }, /* Profile 22. */ + { 240, 247 }, /* Profile 23. */ + { 256, 263 }, /* Profile 24. */ + { 240, 247 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "EGR_MTOP_INDEX_HI_3_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -433,12 +481,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 384, 387 }, /* Profile 11. */ { 384, 387 }, /* Profile 12. */ { 384, 387 }, /* Profile 13. */ + { 384, 387 }, /* Profile 14. */ + { 384, 387 }, /* Profile 15. */ + { 384, 387 }, /* Profile 16. */ + { 384, 387 }, /* Profile 17. */ + { 384, 387 }, /* Profile 18. */ + { 384, 387 }, /* Profile 19. */ + { 384, 387 }, /* Profile 20. */ + { 384, 387 }, /* Profile 21. */ + { 384, 387 }, /* Profile 22. */ + { 384, 387 }, /* Profile 23. */ + { 384, 387 }, /* Profile 24. */ + { 384, 387 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -452,12 +512,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { -1, -1 }, /* Profile 9. */ { 48, 63 }, /* Profile 10. */ { 48, 63 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 48, 63 }, /* Profile 16. */ + { 48, 63 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 48, 63 }, /* Profile 22. */ + { 48, 63 }, /* Profile 23. */ }, - .profile_cnt = 12, + .profile_cnt = 24, }, { .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -467,12 +539,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 224, 239 }, /* Profile 5. */ { 240, 255 }, /* Profile 6. */ { 224, 239 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 240, 255 }, /* Profile 14. */ + { 224, 239 }, /* Profile 15. */ + { 240, 255 }, /* Profile 16. */ + { 224, 239 }, /* Profile 17. */ + { 240, 255 }, /* Profile 18. */ + { 224, 239 }, /* Profile 19. */ }, - .profile_cnt = 8, + .profile_cnt = 20, }, { .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -488,12 +572,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 404, 407 }, /* Profile 11. */ { 404, 407 }, /* Profile 12. */ { 404, 407 }, /* Profile 13. */ + { 404, 407 }, /* Profile 14. */ + { 404, 407 }, /* Profile 15. */ + { 404, 407 }, /* Profile 16. */ + { 404, 407 }, /* Profile 17. */ + { 404, 407 }, /* Profile 18. */ + { 404, 407 }, /* Profile 19. */ + { 404, 407 }, /* Profile 20. */ + { 404, 407 }, /* Profile 21. */ + { 404, 407 }, /* Profile 22. */ + { 404, 407 }, /* Profile 23. */ + { 404, 407 }, /* Profile 24. */ + { 404, 407 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -509,12 +605,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 112, 127 }, /* Profile 11. */ { 112, 127 }, /* Profile 12. */ { 112, 127 }, /* Profile 13. */ + { 112, 127 }, /* Profile 14. */ + { 112, 127 }, /* Profile 15. */ + { 112, 127 }, /* Profile 16. */ + { 112, 127 }, /* Profile 17. */ + { 112, 127 }, /* Profile 18. */ + { 112, 127 }, /* Profile 19. */ + { 112, 127 }, /* Profile 20. */ + { 112, 127 }, /* Profile 21. */ + { 112, 127 }, /* Profile 22. */ + { 112, 127 }, /* Profile 23. */ + { 112, 127 }, /* Profile 24. */ + { 112, 127 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "EP_NIH_HDR_TIMESTAMP_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -528,12 +636,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 272, 287 }, /* Profile 9. */ { 288, 303 }, /* Profile 10. */ { 272, 287 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 288, 303 }, /* Profile 14. */ + { 272, 287 }, /* Profile 15. */ + { 288, 303 }, /* Profile 16. */ + { 272, 287 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 288, 303 }, /* Profile 20. */ + { 272, 287 }, /* Profile 21. */ + { 288, 303 }, /* Profile 22. */ + { 272, 287 }, /* Profile 23. */ }, - .profile_cnt = 12, + .profile_cnt = 24, }, { .name = "EP_NIH_HDR_TIMESTAMP_31_16", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -547,12 +667,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 288, 303 }, /* Profile 9. */ { 304, 319 }, /* Profile 10. */ { 288, 303 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 304, 319 }, /* Profile 14. */ + { 288, 303 }, /* Profile 15. */ + { 304, 319 }, /* Profile 16. */ + { 288, 303 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 304, 319 }, /* Profile 20. */ + { 288, 303 }, /* Profile 21. */ + { 304, 319 }, /* Profile 22. */ + { 288, 303 }, /* Profile 23. */ }, - .profile_cnt = 12, + .profile_cnt = 24, }, { .name = "EVENT_TRACE_VECTOR_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -568,12 +700,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 0, 15 }, /* Profile 11. */ { 0, 15 }, /* Profile 12. */ { 0, 15 }, /* Profile 13. */ + { 0, 15 }, /* Profile 14. */ + { 0, 15 }, /* Profile 15. */ + { 0, 15 }, /* Profile 16. */ + { 0, 15 }, /* Profile 17. */ + { 0, 15 }, /* Profile 18. */ + { 0, 15 }, /* Profile 19. */ + { 0, 15 }, /* Profile 20. */ + { 0, 15 }, /* Profile 21. */ + { 0, 15 }, /* Profile 22. */ + { 0, 15 }, /* Profile 23. */ + { 0, 15 }, /* Profile 24. */ + { 0, 15 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "EVENT_TRACE_VECTOR_31_16", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -589,12 +733,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 16, 31 }, /* Profile 11. */ { 16, 31 }, /* Profile 12. */ { 16, 31 }, /* Profile 13. */ + { 16, 31 }, /* Profile 14. */ + { 16, 31 }, /* Profile 15. */ + { 16, 31 }, /* Profile 16. */ + { 16, 31 }, /* Profile 17. */ + { 16, 31 }, /* Profile 18. */ + { 16, 31 }, /* Profile 19. */ + { 16, 31 }, /* Profile 20. */ + { 16, 31 }, /* Profile 21. */ + { 16, 31 }, /* Profile 22. */ + { 16, 31 }, /* Profile 23. */ + { 16, 31 }, /* Profile 24. */ + { 16, 31 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -610,12 +766,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 32, 47 }, /* Profile 11. */ { 32, 47 }, /* Profile 12. */ { 32, 47 }, /* Profile 13. */ + { 32, 47 }, /* Profile 14. */ + { 32, 47 }, /* Profile 15. */ + { 32, 47 }, /* Profile 16. */ + { 32, 47 }, /* Profile 17. */ + { 32, 47 }, /* Profile 18. */ + { 32, 47 }, /* Profile 19. */ + { 32, 47 }, /* Profile 20. */ + { 32, 47 }, /* Profile 21. */ + { 32, 47 }, /* Profile 22. */ + { 32, 47 }, /* Profile 23. */ + { 32, 47 }, /* Profile 24. */ + { 32, 47 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "I2E_CLASS_ID_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -631,12 +799,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 192, 207 }, /* Profile 11. */ { 208, 223 }, /* Profile 12. */ { 192, 207 }, /* Profile 13. */ + { 208, 223 }, /* Profile 14. */ + { 192, 207 }, /* Profile 15. */ + { 208, 223 }, /* Profile 16. */ + { 192, 207 }, /* Profile 17. */ + { 208, 223 }, /* Profile 18. */ + { 192, 207 }, /* Profile 19. */ + { 208, 223 }, /* Profile 20. */ + { 192, 207 }, /* Profile 21. */ + { 208, 223 }, /* Profile 22. */ + { 192, 207 }, /* Profile 23. */ + { 208, 223 }, /* Profile 24. */ + { 192, 207 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "IFP_IOAM_GBP_ACTION_3_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -652,12 +832,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 392, 395 }, /* Profile 11. */ { 392, 395 }, /* Profile 12. */ { 392, 395 }, /* Profile 13. */ + { 392, 395 }, /* Profile 14. */ + { 392, 395 }, /* Profile 15. */ + { 392, 395 }, /* Profile 16. */ + { 392, 395 }, /* Profile 17. */ + { 392, 395 }, /* Profile 18. */ + { 392, 395 }, /* Profile 19. */ + { 392, 395 }, /* Profile 20. */ + { 392, 395 }, /* Profile 21. */ + { 392, 395 }, /* Profile 22. */ + { 392, 395 }, /* Profile 23. */ + { 392, 395 }, /* Profile 24. */ + { 392, 395 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -673,12 +865,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 80, 95 }, /* Profile 11. */ { 80, 95 }, /* Profile 12. */ { 80, 95 }, /* Profile 13. */ + { 80, 95 }, /* Profile 14. */ + { 80, 95 }, /* Profile 15. */ + { 80, 95 }, /* Profile 16. */ + { 80, 95 }, /* Profile 17. */ + { 80, 95 }, /* Profile 18. */ + { 80, 95 }, /* Profile 19. */ + { 80, 95 }, /* Profile 20. */ + { 80, 95 }, /* Profile 21. */ + { 80, 95 }, /* Profile 22. */ + { 80, 95 }, /* Profile 23. */ + { 80, 95 }, /* Profile 24. */ + { 80, 95 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -694,12 +898,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 400, 403 }, /* Profile 11. */ { 400, 403 }, /* Profile 12. */ { 400, 403 }, /* Profile 13. */ + { 400, 403 }, /* Profile 14. */ + { 400, 403 }, /* Profile 15. */ + { 400, 403 }, /* Profile 16. */ + { 400, 403 }, /* Profile 17. */ + { 400, 403 }, /* Profile 18. */ + { 400, 403 }, /* Profile 19. */ + { 400, 403 }, /* Profile 20. */ + { 400, 403 }, /* Profile 21. */ + { 400, 403 }, /* Profile 22. */ + { 400, 403 }, /* Profile 23. */ + { 400, 403 }, /* Profile 24. */ + { 400, 403 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "ING_TIMESTAMP_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -715,12 +931,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { -1, -1 }, /* Profile 11. */ { 288, 303 }, /* Profile 12. */ { 272, 287 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 288, 303 }, /* Profile 18. */ + { 272, 287 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 288, 303 }, /* Profile 24. */ + { 272, 287 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "ING_TIMESTAMP_31_16", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -736,12 +964,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { -1, -1 }, /* Profile 11. */ { 304, 319 }, /* Profile 12. */ { 288, 303 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 304, 319 }, /* Profile 18. */ + { 288, 303 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 304, 319 }, /* Profile 24. */ + { 288, 303 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "INGRESS_PP_PORT_7_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -757,12 +997,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 208, 215 }, /* Profile 11. */ { 224, 231 }, /* Profile 12. */ { 208, 215 }, /* Profile 13. */ + { 224, 231 }, /* Profile 14. */ + { 208, 215 }, /* Profile 15. */ + { 224, 231 }, /* Profile 16. */ + { 208, 215 }, /* Profile 17. */ + { 224, 231 }, /* Profile 18. */ + { 208, 215 }, /* Profile 19. */ + { 224, 231 }, /* Profile 20. */ + { 208, 215 }, /* Profile 21. */ + { 224, 231 }, /* Profile 22. */ + { 208, 215 }, /* Profile 23. */ + { 224, 231 }, /* Profile 24. */ + { 208, 215 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -778,12 +1030,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 304, 319 }, /* Profile 11. */ { 320, 335 }, /* Profile 12. */ { 304, 319 }, /* Profile 13. */ + { 320, 335 }, /* Profile 14. */ + { 304, 319 }, /* Profile 15. */ + { 320, 335 }, /* Profile 16. */ + { 304, 319 }, /* Profile 17. */ + { 320, 335 }, /* Profile 18. */ + { 304, 319 }, /* Profile 19. */ + { 320, 335 }, /* Profile 20. */ + { 304, 319 }, /* Profile 21. */ + { 320, 335 }, /* Profile 22. */ + { 304, 319 }, /* Profile 23. */ + { 320, 335 }, /* Profile 24. */ + { 304, 319 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -799,12 +1063,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 424, 427 }, /* Profile 11. */ { 424, 427 }, /* Profile 12. */ { 424, 427 }, /* Profile 13. */ + { 424, 427 }, /* Profile 14. */ + { 424, 427 }, /* Profile 15. */ + { 424, 427 }, /* Profile 16. */ + { 424, 427 }, /* Profile 17. */ + { 424, 427 }, /* Profile 18. */ + { 424, 427 }, /* Profile 19. */ + { 424, 427 }, /* Profile 20. */ + { 424, 427 }, /* Profile 21. */ + { 424, 427 }, /* Profile 22. */ + { 424, 427 }, /* Profile 23. */ + { 424, 427 }, /* Profile 24. */ + { 424, 427 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "INT_PRI_3_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -820,12 +1096,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 388, 391 }, /* Profile 11. */ { 388, 391 }, /* Profile 12. */ { 388, 391 }, /* Profile 13. */ + { 388, 391 }, /* Profile 14. */ + { 388, 391 }, /* Profile 15. */ + { 388, 391 }, /* Profile 16. */ + { 388, 391 }, /* Profile 17. */ + { 388, 391 }, /* Profile 18. */ + { 388, 391 }, /* Profile 19. */ + { 388, 391 }, /* Profile 20. */ + { 388, 391 }, /* Profile 21. */ + { 388, 391 }, /* Profile 22. */ + { 388, 391 }, /* Profile 23. */ + { 388, 391 }, /* Profile 24. */ + { 388, 391 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "L2_IIF_10_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -840,12 +1128,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 192, 202 }, /* Profile 10. */ { -1, -1 }, /* Profile 11. */ { 192, 202 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 192, 202 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 192, 202 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 192, 202 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 192, 202 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 192, 202 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 192, 202 }, /* Profile 24. */ }, - .profile_cnt = 13, + .profile_cnt = 25, }, { .name = "L2_OIF_10_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -861,12 +1161,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 336, 346 }, /* Profile 11. */ { -1, -1 }, /* Profile 12. */ { 336, 346 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 336, 346 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 336, 346 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 336, 346 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 336, 346 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { 336, 346 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { 336, 346 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "L3_IIF_13_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -882,12 +1194,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 256, 269 }, /* Profile 11. */ { 272, 285 }, /* Profile 12. */ { 256, 269 }, /* Profile 13. */ + { 272, 285 }, /* Profile 14. */ + { 256, 269 }, /* Profile 15. */ + { 272, 285 }, /* Profile 16. */ + { 256, 269 }, /* Profile 17. */ + { 272, 285 }, /* Profile 18. */ + { 256, 269 }, /* Profile 19. */ + { 272, 285 }, /* Profile 20. */ + { 256, 269 }, /* Profile 21. */ + { 272, 285 }, /* Profile 22. */ + { 256, 269 }, /* Profile 23. */ + { 272, 285 }, /* Profile 24. */ + { 256, 269 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "L3_OIF_1_13_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -903,12 +1227,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 352, 365 }, /* Profile 11. */ { 352, 365 }, /* Profile 12. */ { 352, 365 }, /* Profile 13. */ + { 352, 365 }, /* Profile 14. */ + { 352, 365 }, /* Profile 15. */ + { 352, 365 }, /* Profile 16. */ + { 352, 365 }, /* Profile 17. */ + { 352, 365 }, /* Profile 18. */ + { 352, 365 }, /* Profile 19. */ + { 352, 365 }, /* Profile 20. */ + { 352, 365 }, /* Profile 21. */ + { 352, 365 }, /* Profile 22. */ + { 352, 365 }, /* Profile 23. */ + { 352, 365 }, /* Profile 24. */ + { 352, 365 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "MPLS_LABEL_DECAP_COUNT_3_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -924,12 +1260,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 432, 435 }, /* Profile 11. */ { 432, 435 }, /* Profile 12. */ { 432, 435 }, /* Profile 13. */ + { 432, 435 }, /* Profile 14. */ + { 432, 435 }, /* Profile 15. */ + { 432, 435 }, /* Profile 16. */ + { 432, 435 }, /* Profile 17. */ + { 432, 435 }, /* Profile 18. */ + { 432, 435 }, /* Profile 19. */ + { 432, 435 }, /* Profile 20. */ + { 432, 435 }, /* Profile 21. */ + { 432, 435 }, /* Profile 22. */ + { 432, 435 }, /* Profile 23. */ + { 432, 435 }, /* Profile 24. */ + { 432, 435 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -945,12 +1293,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 176, 191 }, /* Profile 11. */ { 176, 191 }, /* Profile 12. */ { 176, 191 }, /* Profile 13. */ + { 176, 191 }, /* Profile 14. */ + { 176, 191 }, /* Profile 15. */ + { 176, 191 }, /* Profile 16. */ + { 176, 191 }, /* Profile 17. */ + { 176, 191 }, /* Profile 18. */ + { 176, 191 }, /* Profile 19. */ + { 176, 191 }, /* Profile 20. */ + { 176, 191 }, /* Profile 21. */ + { 176, 191 }, /* Profile 22. */ + { 176, 191 }, /* Profile 23. */ + { 176, 191 }, /* Profile 24. */ + { 176, 191 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "NHOP_INDEX_1_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -966,12 +1326,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 128, 143 }, /* Profile 11. */ { 128, 143 }, /* Profile 12. */ { 128, 143 }, /* Profile 13. */ + { 128, 143 }, /* Profile 14. */ + { 128, 143 }, /* Profile 15. */ + { 128, 143 }, /* Profile 16. */ + { 128, 143 }, /* Profile 17. */ + { 128, 143 }, /* Profile 18. */ + { 128, 143 }, /* Profile 19. */ + { 128, 143 }, /* Profile 20. */ + { 128, 143 }, /* Profile 21. */ + { 128, 143 }, /* Profile 22. */ + { 128, 143 }, /* Profile 23. */ + { 128, 143 }, /* Profile 24. */ + { 128, 143 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -987,12 +1359,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 64, 79 }, /* Profile 11. */ { 64, 79 }, /* Profile 12. */ { 64, 79 }, /* Profile 13. */ + { 64, 79 }, /* Profile 14. */ + { 64, 79 }, /* Profile 15. */ + { 64, 79 }, /* Profile 16. */ + { 64, 79 }, /* Profile 17. */ + { 64, 79 }, /* Profile 18. */ + { 64, 79 }, /* Profile 19. */ + { 64, 79 }, /* Profile 20. */ + { 64, 79 }, /* Profile 21. */ + { 64, 79 }, /* Profile 22. */ + { 64, 79 }, /* Profile 23. */ + { 64, 79 }, /* Profile 24. */ + { 64, 79 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1008,33 +1392,57 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 428, 431 }, /* Profile 11. */ { 428, 431 }, /* Profile 12. */ { 428, 431 }, /* Profile 13. */ + { 428, 431 }, /* Profile 14. */ + { 428, 431 }, /* Profile 15. */ + { 428, 431 }, /* Profile 16. */ + { 428, 431 }, /* Profile 17. */ + { 428, 431 }, /* Profile 18. */ + { 428, 431 }, /* Profile 19. */ + { 428, 431 }, /* Profile 20. */ + { 428, 431 }, /* Profile 21. */ + { 428, 431 }, /* Profile 22. */ + { 428, 431 }, /* Profile 23. */ + { 428, 431 }, /* Profile 24. */ + { 428, 431 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "SVP_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 96, 111 }, /* Profile 2. */ - { 96, 111 }, /* Profile 3. */ - { 96, 111 }, /* Profile 4. */ - { 96, 111 }, /* Profile 5. */ - { 96, 111 }, /* Profile 6. */ - { 96, 111 }, /* Profile 7. */ - { 96, 111 }, /* Profile 8. */ - { 96, 111 }, /* Profile 9. */ - { 96, 111 }, /* Profile 10. */ - { 96, 111 }, /* Profile 11. */ - { 96, 111 }, /* Profile 12. */ - { 96, 111 }, /* Profile 13. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ + { 144, 159 }, /* Profile 7. */ + { 144, 159 }, /* Profile 8. */ + { 144, 159 }, /* Profile 9. */ + { 144, 159 }, /* Profile 10. */ + { 144, 159 }, /* Profile 11. */ + { 144, 159 }, /* Profile 12. */ + { 144, 159 }, /* Profile 13. */ + { 96, 111 }, /* Profile 14. */ + { 96, 111 }, /* Profile 15. */ + { 96, 111 }, /* Profile 16. */ + { 96, 111 }, /* Profile 17. */ + { 96, 111 }, /* Profile 18. */ + { 96, 111 }, /* Profile 19. */ + { 96, 111 }, /* Profile 20. */ + { 96, 111 }, /* Profile 21. */ + { 96, 111 }, /* Profile 22. */ + { 96, 111 }, /* Profile 23. */ + { 96, 111 }, /* Profile 24. */ + { 96, 111 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1050,12 +1458,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 416, 419 }, /* Profile 11. */ { 416, 419 }, /* Profile 12. */ { 416, 419 }, /* Profile 13. */ + { 416, 419 }, /* Profile 14. */ + { 416, 419 }, /* Profile 15. */ + { 416, 419 }, /* Profile 16. */ + { 416, 419 }, /* Profile 17. */ + { 416, 419 }, /* Profile 18. */ + { 416, 419 }, /* Profile 19. */ + { 416, 419 }, /* Profile 20. */ + { 416, 419 }, /* Profile 21. */ + { 416, 419 }, /* Profile 22. */ + { 416, 419 }, /* Profile 23. */ + { 416, 419 }, /* Profile 24. */ + { 416, 419 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1071,12 +1491,45 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 160, 175 }, /* Profile 11. */ { 160, 175 }, /* Profile 12. */ { 160, 175 }, /* Profile 13. */ + { 160, 175 }, /* Profile 14. */ + { 160, 175 }, /* Profile 15. */ + { 160, 175 }, /* Profile 16. */ + { 160, 175 }, /* Profile 17. */ + { 160, 175 }, /* Profile 18. */ + { 160, 175 }, /* Profile 19. */ + { 160, 175 }, /* Profile 20. */ + { 160, 175 }, /* Profile 21. */ + { 160, 175 }, /* Profile 22. */ + { 160, 175 }, /* Profile 23. */ + { 160, 175 }, /* Profile 24. */ + { 160, 175 }, /* Profile 25. */ + }, + .profile_cnt = 26, + }, + { + .name = "SYSTEM_ENTROPY_15_0", + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_ENTROPY_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ + { 96, 111 }, /* Profile 10. */ + { 96, 111 }, /* Profile 11. */ + { 96, 111 }, /* Profile 12. */ + { 96, 111 }, /* Profile 13. */ }, .profile_cnt = 14, }, { .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1092,33 +1545,57 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 420, 423 }, /* Profile 11. */ { 420, 423 }, /* Profile 12. */ { 420, 423 }, /* Profile 13. */ + { 420, 423 }, /* Profile 14. */ + { 420, 423 }, /* Profile 15. */ + { 420, 423 }, /* Profile 16. */ + { 420, 423 }, /* Profile 17. */ + { 420, 423 }, /* Profile 18. */ + { 420, 423 }, /* Profile 19. */ + { 420, 423 }, /* Profile 20. */ + { 420, 423 }, /* Profile 21. */ + { 420, 423 }, /* Profile 22. */ + { 420, 423 }, /* Profile 23. */ + { 420, 423 }, /* Profile 24. */ + { 420, 423 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 144, 159 }, /* Profile 2. */ - { 144, 159 }, /* Profile 3. */ - { 144, 159 }, /* Profile 4. */ - { 144, 159 }, /* Profile 5. */ - { 144, 159 }, /* Profile 6. */ - { 144, 159 }, /* Profile 7. */ - { 144, 159 }, /* Profile 8. */ - { 144, 159 }, /* Profile 9. */ - { 144, 159 }, /* Profile 10. */ - { 144, 159 }, /* Profile 11. */ - { 144, 159 }, /* Profile 12. */ - { 144, 159 }, /* Profile 13. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 144, 159 }, /* Profile 14. */ + { 144, 159 }, /* Profile 15. */ + { 144, 159 }, /* Profile 16. */ + { 144, 159 }, /* Profile 17. */ + { 144, 159 }, /* Profile 18. */ + { 144, 159 }, /* Profile 19. */ + { 144, 159 }, /* Profile 20. */ + { 144, 159 }, /* Profile 21. */ + { 144, 159 }, /* Profile 22. */ + { 144, 159 }, /* Profile 23. */ + { 144, 159 }, /* Profile 24. */ + { 144, 159 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1134,12 +1611,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 408, 411 }, /* Profile 11. */ { 408, 411 }, /* Profile 12. */ { 408, 411 }, /* Profile 13. */ + { 408, 411 }, /* Profile 14. */ + { 408, 411 }, /* Profile 15. */ + { 408, 411 }, /* Profile 16. */ + { 408, 411 }, /* Profile 17. */ + { 408, 411 }, /* Profile 18. */ + { 408, 411 }, /* Profile 19. */ + { 408, 411 }, /* Profile 20. */ + { 408, 411 }, /* Profile 21. */ + { 408, 411 }, /* Profile 22. */ + { 408, 411 }, /* Profile 23. */ + { 408, 411 }, /* Profile 24. */ + { 408, 411 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1155,12 +1644,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 412, 415 }, /* Profile 11. */ { 412, 415 }, /* Profile 12. */ { 412, 415 }, /* Profile 13. */ + { 412, 415 }, /* Profile 14. */ + { 412, 415 }, /* Profile 15. */ + { 412, 415 }, /* Profile 16. */ + { 412, 415 }, /* Profile 17. */ + { 412, 415 }, /* Profile 18. */ + { 412, 415 }, /* Profile 19. */ + { 412, 415 }, /* Profile 20. */ + { 412, 415 }, /* Profile 21. */ + { 412, 415 }, /* Profile 22. */ + { 412, 415 }, /* Profile 23. */ + { 412, 415 }, /* Profile 24. */ + { 412, 415 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "VFI_15_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_VFI_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1176,12 +1677,24 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 320, 335 }, /* Profile 11. */ { 336, 351 }, /* Profile 12. */ { 320, 335 }, /* Profile 13. */ + { 336, 351 }, /* Profile 14. */ + { 320, 335 }, /* Profile 15. */ + { 336, 351 }, /* Profile 16. */ + { 320, 335 }, /* Profile 17. */ + { 336, 351 }, /* Profile 18. */ + { 320, 335 }, /* Profile 19. */ + { 336, 351 }, /* Profile 20. */ + { 320, 335 }, /* Profile 21. */ + { 336, 351 }, /* Profile 22. */ + { 320, 335 }, /* Profile 23. */ + { 336, 351 }, /* Profile 24. */ + { 320, 335 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, { .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0", - .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0, + .fid = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1197,23 +1710,39 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_ { 396, 397 }, /* Profile 11. */ { 396, 397 }, /* Profile 12. */ { 396, 397 }, /* Profile 13. */ + { 396, 397 }, /* Profile 14. */ + { 396, 397 }, /* Profile 15. */ + { 396, 397 }, /* Profile 16. */ + { 396, 397 }, /* Profile 17. */ + { 396, 397 }, /* Profile 18. */ + { 396, 397 }, /* Profile 19. */ + { 396, 397 }, /* Profile 20. */ + { 396, 397 }, /* Profile 21. */ + { 396, 397 }, /* Profile 22. */ + { 396, 397 }, /* Profile 23. */ + { 396, 397 }, /* Profile 24. */ + { 396, 397 }, /* Profile 25. */ }, - .profile_cnt = 14, + .profile_cnt = 26, }, -};static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_data, +}; +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_rxpmd_flex_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 1, + .profile_bmp[0] = 0x3fffffc, + }; -static shr_enum_map_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_names[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +static shr_enum_map_t bcm56780_a0_dna_6_5_31_7_0_rxpmd_flex_reason_names[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT }; -static bcmpkt_flex_reasons_info_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_names, - .reason_encode = bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_encode, - .reason_decode = bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_decode, +static bcmpkt_flex_reasons_info_t bcm56780_a0_dna_6_5_31_7_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56780_a0_dna_6_5_31_7_0_rxpmd_flex_reason_names, + .reason_encode = bcm56780_a0_dna_6_5_31_7_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56780_a0_dna_6_5_31_7_0_rxpmd_flex_reason_decode, }; @@ -1356,7 +1885,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_arp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_arp_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_get, bcmpkt_arp_t_hardware_type_get, bcmpkt_arp_t_operation_get, @@ -1368,7 +1897,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_arp_t_fget[BCM56780_A0_DNA_6_ bcmpkt_arp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_arp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_arp_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_set, bcmpkt_arp_t_hardware_type_set, bcmpkt_arp_t_operation_set, @@ -1380,13 +1909,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_arp_t_fset[BCM56780_A0_DNA_6_ bcmpkt_arp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_arp_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_arp_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_arp_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_arp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_arp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_arp_t_field_data, }; @@ -1483,7 +2012,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_authen_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_authen_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_get, bcmpkt_authen_t_next_header_get, bcmpkt_authen_t_payload_len_get, @@ -1492,7 +2021,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_authen_t_fget[BCM56780_A0_DNA bcmpkt_authen_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_authen_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_authen_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_set, bcmpkt_authen_t_next_header_set, bcmpkt_authen_t_payload_len_set, @@ -1501,13 +2030,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_authen_t_fset[BCM56780_A0_DNA bcmpkt_authen_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_authen_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_authen_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_authen_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_authen_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_authen_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_authen_t_field_data, }; @@ -1756,7 +2285,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_bfd_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_bfd_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_get, bcmpkt_bfd_t_bfd_length_get, bcmpkt_bfd_t_cpi_get, @@ -1775,7 +2304,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_bfd_t_fget[BCM56780_A0_DNA_6_ bcmpkt_bfd_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_bfd_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_bfd_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_set, bcmpkt_bfd_t_bfd_length_set, bcmpkt_bfd_t_cpi_set, @@ -1794,13 +2323,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_bfd_t_fset[BCM56780_A0_DNA_6_ bcmpkt_bfd_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_bfd_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_bfd_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_bfd_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_bfd_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_bfd_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_bfd_t_field_data, }; @@ -1834,23 +2363,23 @@ static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_cntag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_cntag_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_get, bcmpkt_cntag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_cntag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_cntag_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_set, bcmpkt_cntag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_cntag_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_cntag_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_cntag_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_cntag_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_cntag_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_cntag_t_field_data, }; @@ -1966,7 +2495,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_cpu_composites_0_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_get, bcmpkt_cpu_composites_0_t_dma_cont1_get, bcmpkt_cpu_composites_0_t_dma_cont2_get, @@ -1976,7 +2505,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fget[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_cpu_composites_0_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_set, bcmpkt_cpu_composites_0_t_dma_cont1_set, bcmpkt_cpu_composites_0_t_dma_cont2_set, @@ -1986,13 +2515,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fset[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_cpu_composites_0_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_cpu_composites_0_t_field_data, }; @@ -2172,7 +2701,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_cpu_composites_1_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_get, bcmpkt_cpu_composites_1_t_dma_cont11_get, bcmpkt_cpu_composites_1_t_dma_cont12_get, @@ -2186,7 +2715,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fget[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_cpu_composites_1_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_set, bcmpkt_cpu_composites_1_t_dma_cont11_set, bcmpkt_cpu_composites_1_t_dma_cont12_set, @@ -2200,13 +2729,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fset[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_cpu_composites_1_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_cpu_composites_1_t_field_data, }; @@ -2256,25 +2785,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_dest_option_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_dest_option_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_get, bcmpkt_dest_option_t_next_header_get, bcmpkt_dest_option_t_option_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_dest_option_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_dest_option_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_set, bcmpkt_dest_option_t_next_header_set, bcmpkt_dest_option_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_dest_option_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_dest_option_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_dest_option_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_dest_option_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_dest_option_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_dest_option_t_field_data, }; @@ -2460,7 +2989,7 @@ static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_ep_nih_header_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_get, bcmpkt_ep_nih_header_t_header_type_get, bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, @@ -2475,7 +3004,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fget[BCM56780 bcmpkt_ep_nih_header_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_ep_nih_header_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_set, bcmpkt_ep_nih_header_t_header_type_set, bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, @@ -2490,13 +3019,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fset[BCM56780 bcmpkt_ep_nih_header_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_ep_nih_header_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_ep_nih_header_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_ep_nih_header_t_field_data, }; @@ -2636,7 +3165,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_get, bcmpkt_erspan3_fixed_hdr_t_cos_get, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, @@ -2648,7 +3177,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fget[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_set, bcmpkt_erspan3_fixed_hdr_t_cos_set, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, @@ -2660,13 +3189,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fset[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_field_data, }; @@ -2731,27 +3260,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_get, bcmpkt_erspan3_subhdr_5_t_port_id_get, bcmpkt_erspan3_subhdr_5_t_switch_id_get, bcmpkt_erspan3_subhdr_5_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_set, bcmpkt_erspan3_subhdr_5_t_port_id_set, bcmpkt_erspan3_subhdr_5_t_switch_id_set, bcmpkt_erspan3_subhdr_5_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_field_data, }; @@ -2832,7 +3361,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_esp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_esp_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_get, bcmpkt_esp_t_pad_get, bcmpkt_esp_t_pad_len_get, @@ -2840,7 +3369,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_esp_t_fget[BCM56780_A0_DNA_6_ bcmpkt_esp_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_esp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_esp_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_set, bcmpkt_esp_t_pad_set, bcmpkt_esp_t_pad_len_set, @@ -2848,13 +3377,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_esp_t_fset[BCM56780_A0_DNA_6_ bcmpkt_esp_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_esp_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_esp_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_esp_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_esp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_esp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_esp_t_field_data, }; @@ -2889,23 +3418,23 @@ static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_etag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_etag_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETAG_T_FID_COUNT] = { bcmpkt_etag_t_tag_get, bcmpkt_etag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_etag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_etag_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETAG_T_FID_COUNT] = { bcmpkt_etag_t_tag_set, bcmpkt_etag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_etag_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_etag_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_etag_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_etag_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_etag_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_etag_t_field_data, }; @@ -2924,21 +3453,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ethertype_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_ethertype_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ethertype_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_ethertype_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ethertype_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_ethertype_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ethertype_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_ethertype_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_ethertype_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_ethertype_t_field_data, }; @@ -3003,27 +3532,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_frag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_frag_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_get, bcmpkt_frag_t_id_get, bcmpkt_frag_t_next_header_get, bcmpkt_frag_t_reserved_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_frag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_frag_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_set, bcmpkt_frag_t_id_set, bcmpkt_frag_t_next_header_set, bcmpkt_frag_t_reserved_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_frag_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_frag_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_frag_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_frag_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_frag_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_frag_t_field_data, }; @@ -3207,52 +3736,52 @@ static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int prof return ret; } -static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[3], 0, 16); + *val = WORD_FIELD_GET(data[2], 16, 16); return ret; } -static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[3], 0, 16, val); + WORD_FIELD_SET(data[2], 16, 16, val); return ret; } -static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[2], 16, 16); + *val = WORD_FIELD_GET(data[0], 24, 8); return ret; } -static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[2], 16, 16, val); + WORD_FIELD_SET(data[0], 24, 8, val); return ret; } -static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 24, 8); + *val = WORD_FIELD_GET(data[3], 0, 16); return ret; } -static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 24, 8, val); + WORD_FIELD_SET(data[3], 0, 16, val); return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_generic_loopback_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_get, bcmpkt_generic_loopback_t_destination_type_get, bcmpkt_generic_loopback_t_entropy_obj_get, @@ -3265,12 +3794,12 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fget[BCM56 bcmpkt_generic_loopback_t_processing_ctrl_1_get, bcmpkt_generic_loopback_t_qos_obj_get, bcmpkt_generic_loopback_t_reserved_1_get, - bcmpkt_generic_loopback_t_reserved_2_get, bcmpkt_generic_loopback_t_source_system_port_get, bcmpkt_generic_loopback_t_start_byte_get, + bcmpkt_generic_loopback_t_svp_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_generic_loopback_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_set, bcmpkt_generic_loopback_t_destination_type_set, bcmpkt_generic_loopback_t_entropy_obj_set, @@ -3283,18 +3812,18 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fset[BCM56 bcmpkt_generic_loopback_t_processing_ctrl_1_set, bcmpkt_generic_loopback_t_qos_obj_set, bcmpkt_generic_loopback_t_reserved_1_set, - bcmpkt_generic_loopback_t_reserved_2_set, bcmpkt_generic_loopback_t_source_system_port_set, bcmpkt_generic_loopback_t_start_byte_set, + bcmpkt_generic_loopback_t_svp_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_generic_loopback_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_generic_loopback_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_generic_loopback_t_field_data, }; @@ -3373,7 +3902,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gpe_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_gpe_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_get, bcmpkt_gpe_t_next_protocol_get, bcmpkt_gpe_t_reserved0_get, @@ -3381,7 +3910,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gpe_t_fget[BCM56780_A0_DNA_6_ bcmpkt_gpe_t_vni_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gpe_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_gpe_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_set, bcmpkt_gpe_t_next_protocol_set, bcmpkt_gpe_t_reserved0_set, @@ -3389,13 +3918,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gpe_t_fset[BCM56780_A0_DNA_6_ bcmpkt_gpe_t_vni_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gpe_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_gpe_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gpe_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_gpe_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_gpe_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_gpe_t_field_data, }; @@ -3429,23 +3958,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_gre_chksum_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_get, bcmpkt_gre_chksum_t_offset_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_gre_chksum_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_set, bcmpkt_gre_chksum_t_offset_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_gre_chksum_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_gre_chksum_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_gre_chksum_t_field_data, }; @@ -3465,21 +3994,21 @@ static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_key_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_gre_key_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_key_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_gre_key_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_key_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_gre_key_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_key_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_gre_key_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_gre_key_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_gre_key_t_field_data, }; @@ -3499,21 +4028,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_gre_rout_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_gre_rout_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_gre_rout_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_gre_rout_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_gre_rout_t_field_data, }; @@ -3533,21 +4062,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_gre_seq_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_gre_seq_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_gre_seq_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_gre_seq_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_gre_seq_t_field_data, }; @@ -3611,27 +4140,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_gre_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_get, bcmpkt_gre_t_protocol_get, bcmpkt_gre_t_reserved_get, bcmpkt_gre_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_gre_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_set, bcmpkt_gre_t_protocol_set, bcmpkt_gre_t_reserved_set, bcmpkt_gre_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_gre_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_gre_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_gre_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_gre_t_field_data, }; @@ -3830,7 +4359,7 @@ static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_hg3_base_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { bcmpkt_hg3_base_t_cn_get, bcmpkt_hg3_base_t_cng_get, bcmpkt_hg3_base_t_entropy_get, @@ -3846,7 +4375,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fget[BCM56780_A0_D bcmpkt_hg3_base_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_hg3_base_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { bcmpkt_hg3_base_t_cn_set, bcmpkt_hg3_base_t_cng_set, bcmpkt_hg3_base_t_entropy_set, @@ -3862,13 +4391,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fset[BCM56780_A0_D bcmpkt_hg3_base_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_hg3_base_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_hg3_base_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_hg3_base_t_field_data, }; @@ -3962,7 +4491,7 @@ static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_hg3_extension_0_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { bcmpkt_hg3_extension_0_t_class_id_lsb_get, bcmpkt_hg3_extension_0_t_class_id_msb_get, bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, @@ -3971,7 +4500,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fget[BCM567 bcmpkt_hg3_extension_0_t_svp_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_hg3_extension_0_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { bcmpkt_hg3_extension_0_t_class_id_lsb_set, bcmpkt_hg3_extension_0_t_class_id_msb_set, bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, @@ -3980,13 +4509,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fset[BCM567 bcmpkt_hg3_extension_0_t_svp_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_hg3_extension_0_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_hg3_extension_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_hg3_extension_0_t_field_data, }; @@ -4036,25 +4565,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_hop_by_hop_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_get, bcmpkt_hop_by_hop_t_next_header_get, bcmpkt_hop_by_hop_t_option_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_hop_by_hop_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_set, bcmpkt_hop_by_hop_t_next_header_set, bcmpkt_hop_by_hop_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_hop_by_hop_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_hop_by_hop_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_hop_by_hop_t_field_data, }; @@ -4103,25 +4632,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_icmp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_icmp_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_get, bcmpkt_icmp_t_code_get, bcmpkt_icmp_t_icmp_type_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_icmp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_icmp_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_set, bcmpkt_icmp_t_code_set, bcmpkt_icmp_t_icmp_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_icmp_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_icmp_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_icmp_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_icmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_icmp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_icmp_t_field_data, }; @@ -4155,23 +4684,23 @@ static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int pr return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_a_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_a_t_field_data, }; @@ -4235,27 +4764,27 @@ static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_b_t_cn_get, bcmpkt_ifa_flex_md_0_b_t_port_speed_get, bcmpkt_ifa_flex_md_0_b_t_queue_id_get, bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_b_t_cn_set, bcmpkt_ifa_flex_md_0_b_t_port_speed_set, bcmpkt_ifa_flex_md_0_b_t_queue_id_set, bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_b_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_b_t_field_data, }; @@ -4305,25 +4834,25 @@ static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_1_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { bcmpkt_ifa_flex_md_1_t_egress_port_id_get, bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_1_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { bcmpkt_ifa_flex_md_1_t_egress_port_id_set, bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_1_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_1_t_field_data, }; @@ -4359,23 +4888,23 @@ static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, in return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_2_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_2_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_2_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_2_t_field_data, }; @@ -4411,23 +4940,23 @@ static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_3_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_3_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_3_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_3_t_field_data, }; @@ -4506,7 +5035,7 @@ static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_ifa_header_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { bcmpkt_ifa_header_t_flags_get, bcmpkt_ifa_header_t_gns_get, bcmpkt_ifa_header_t_max_length_get, @@ -4514,7 +5043,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fget[BCM56780_A0 bcmpkt_ifa_header_t_ver_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_ifa_header_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { bcmpkt_ifa_header_t_flags_set, bcmpkt_ifa_header_t_gns_set, bcmpkt_ifa_header_t_max_length_set, @@ -4522,13 +5051,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fset[BCM56780_A0 bcmpkt_ifa_header_t_ver_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_ifa_header_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_ifa_header_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_ifa_header_t_field_data, }; @@ -4577,25 +5106,25 @@ static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_ifa_md_base_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { bcmpkt_ifa_md_base_t_action_vector_get, bcmpkt_ifa_md_base_t_hop_limit_current_length_get, bcmpkt_ifa_md_base_t_request_vector_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_ifa_md_base_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { bcmpkt_ifa_md_base_t_action_vector_set, bcmpkt_ifa_md_base_t_hop_limit_current_length_set, bcmpkt_ifa_md_base_t_request_vector_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_ifa_md_base_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_ifa_md_base_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_ifa_md_base_t_field_data, }; @@ -4660,27 +5189,27 @@ static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_ifa_metadata_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { bcmpkt_ifa_metadata_t_action_vector_get, bcmpkt_ifa_metadata_t_hop_limit_current_length_get, bcmpkt_ifa_metadata_t_metadata_get, bcmpkt_ifa_metadata_t_request_vector_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_ifa_metadata_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { bcmpkt_ifa_metadata_t_action_vector_set, bcmpkt_ifa_metadata_t_hop_limit_current_length_set, bcmpkt_ifa_metadata_t_metadata_set, bcmpkt_ifa_metadata_t_request_vector_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_ifa_metadata_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_ifa_metadata_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_ifa_metadata_t_field_data, }; @@ -4745,27 +5274,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_igmp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_igmp_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_get, bcmpkt_igmp_t_group_address_get, bcmpkt_igmp_t_igmp_type_get, bcmpkt_igmp_t_max_resp_time_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_igmp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_igmp_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_set, bcmpkt_igmp_t_group_address_set, bcmpkt_igmp_t_igmp_type_set, bcmpkt_igmp_t_max_resp_time_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_igmp_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_igmp_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_igmp_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_igmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_igmp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_igmp_t_field_data, }; @@ -4847,7 +5376,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_ipfix_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_get, bcmpkt_ipfix_t_length_get, bcmpkt_ipfix_t_obs_domain_id_get, @@ -4855,7 +5384,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fget[BCM56780_A0_DNA_ bcmpkt_ipfix_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_ipfix_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_set, bcmpkt_ipfix_t_length_set, bcmpkt_ipfix_t_obs_domain_id_set, @@ -4863,13 +5392,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fset[BCM56780_A0_DNA_ bcmpkt_ipfix_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ipfix_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_ipfix_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ipfix_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_ipfix_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_ipfix_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_ipfix_t_field_data, }; @@ -5041,7 +5570,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_ipv4_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_get, bcmpkt_ipv4_t_flags_frag_offset_get, bcmpkt_ipv4_t_hdr_checksum_get, @@ -5055,7 +5584,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fget[BCM56780_A0_DNA_6 bcmpkt_ipv4_t_version_hdr_len_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_ipv4_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_set, bcmpkt_ipv4_t_flags_frag_offset_set, bcmpkt_ipv4_t_hdr_checksum_set, @@ -5069,13 +5598,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fset[BCM56780_A0_DNA_6 bcmpkt_ipv4_t_version_hdr_len_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ipv4_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_ipv4_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ipv4_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_ipv4_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_ipv4_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_ipv4_t_field_data, }; @@ -5201,7 +5730,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_ipv6_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_get, bcmpkt_ipv6_t_flow_label_get, bcmpkt_ipv6_t_hop_limit_get, @@ -5212,7 +5741,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fget[BCM56780_A0_DNA_6 bcmpkt_ipv6_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_ipv6_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_set, bcmpkt_ipv6_t_flow_label_set, bcmpkt_ipv6_t_hop_limit_set, @@ -5223,13 +5752,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fset[BCM56780_A0_DNA_6 bcmpkt_ipv6_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ipv6_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_ipv6_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ipv6_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_ipv6_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_ipv6_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_ipv6_t_field_data, }; @@ -5265,23 +5794,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_l2_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_l2_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_get, bcmpkt_l2_t_macsa_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_l2_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_l2_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_set, bcmpkt_l2_t_macsa_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_l2_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_l2_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_l2_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_l2_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_l2_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_l2_t_field_data, }; @@ -5301,21 +5830,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_field_data, }; @@ -5335,21 +5864,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_mirror_transport_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_mirror_transport_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_mirror_transport_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_mirror_transport_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_mirror_transport_t_field_data, }; @@ -5413,27 +5942,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_mpls_ach_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_get, bcmpkt_mpls_ach_t_cw_type_get, bcmpkt_mpls_ach_t_reserved_get, bcmpkt_mpls_ach_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_mpls_ach_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_set, bcmpkt_mpls_ach_t_cw_type_set, bcmpkt_mpls_ach_t_reserved_set, bcmpkt_mpls_ach_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_mpls_ach_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_mpls_ach_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_mpls_ach_t_field_data, }; @@ -5453,21 +5982,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_mpls_bv_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_mpls_bv_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_mpls_bv_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_mpls_bv_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_mpls_bv_t_field_data, }; @@ -5516,25 +6045,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_mpls_cw_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_get, bcmpkt_mpls_cw_t_reserved_get, bcmpkt_mpls_cw_t_seq_number_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_mpls_cw_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_set, bcmpkt_mpls_cw_t_reserved_set, bcmpkt_mpls_cw_t_seq_number_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_mpls_cw_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_mpls_cw_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_mpls_cw_t_field_data, }; @@ -5598,27 +6127,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mpls_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_mpls_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_get, bcmpkt_mpls_t_exp_get, bcmpkt_mpls_t_label_get, bcmpkt_mpls_t_ttl_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mpls_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_mpls_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_set, bcmpkt_mpls_t_exp_set, bcmpkt_mpls_t_label_set, bcmpkt_mpls_t_ttl_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mpls_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_mpls_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mpls_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_mpls_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_mpls_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_mpls_t_field_data, }; @@ -5835,7 +6364,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_p_1588_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_get, bcmpkt_p_1588_t_correction_get, bcmpkt_p_1588_t_domain_nb_get, @@ -5852,7 +6381,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fget[BCM56780_A0_DNA bcmpkt_p_1588_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_p_1588_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_set, bcmpkt_p_1588_t_correction_set, bcmpkt_p_1588_t_domain_nb_set, @@ -5869,13 +6398,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fset[BCM56780_A0_DNA bcmpkt_p_1588_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_p_1588_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_p_1588_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_p_1588_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_p_1588_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_p_1588_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_p_1588_t_field_data, }; @@ -5939,27 +6468,27 @@ static int32_t bcmpkt_pim_t_hdr_bytes_6_7_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_pim_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_pim_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_FID_COUNT] = { bcmpkt_pim_t_hdr_bytes_0_1_get, bcmpkt_pim_t_hdr_bytes_2_3_get, bcmpkt_pim_t_hdr_bytes_4_5_get, bcmpkt_pim_t_hdr_bytes_6_7_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_pim_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_pim_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_FID_COUNT] = { bcmpkt_pim_t_hdr_bytes_0_1_set, bcmpkt_pim_t_hdr_bytes_2_3_set, bcmpkt_pim_t_hdr_bytes_4_5_set, bcmpkt_pim_t_hdr_bytes_6_7_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_pim_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_pim_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_pim_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_pim_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_pim_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PIM_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_pim_t_field_data, }; @@ -6009,25 +6538,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_prog_ext_hdr_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, bcmpkt_prog_ext_hdr_t_next_header_get, bcmpkt_prog_ext_hdr_t_option_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_prog_ext_hdr_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, bcmpkt_prog_ext_hdr_t_next_header_set, bcmpkt_prog_ext_hdr_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_prog_ext_hdr_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_prog_ext_hdr_t_field_data, }; @@ -6123,7 +6652,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_psamp_0_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_get, bcmpkt_psamp_0_t_length_get, bcmpkt_psamp_0_t_next_hop_index_get, @@ -6132,7 +6661,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fget[BCM56780_A0_DN bcmpkt_psamp_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_psamp_0_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_set, bcmpkt_psamp_0_t_length_set, bcmpkt_psamp_0_t_next_hop_index_set, @@ -6141,13 +6670,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fset[BCM56780_A0_DN bcmpkt_psamp_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_psamp_0_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_psamp_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_psamp_0_t_field_data, }; @@ -6256,7 +6785,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_psamp_1_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_get, bcmpkt_psamp_1_t_egress_port_get, bcmpkt_psamp_1_t_epoch_get, @@ -6266,7 +6795,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fget[BCM56780_A0_DN bcmpkt_psamp_1_t_variable_flag_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_psamp_1_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_set, bcmpkt_psamp_1_t_egress_port_set, bcmpkt_psamp_1_t_epoch_set, @@ -6276,13 +6805,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fset[BCM56780_A0_DN bcmpkt_psamp_1_t_variable_flag_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_psamp_1_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_psamp_1_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_psamp_1_t_field_data, }; @@ -6394,7 +6923,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, bcmpkt_psamp_mirror_on_drop_0_t_length_get, @@ -6404,7 +6933,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, bcmpkt_psamp_mirror_on_drop_0_t_length_set, @@ -6414,13 +6943,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_field_data, }; @@ -6529,7 +7058,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *d return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, @@ -6539,7 +7068,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fget bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, @@ -6549,13 +7078,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fset bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_field_data, }; @@ -6698,7 +7227,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_rarp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_rarp_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_get, bcmpkt_rarp_t_hardware_type_get, bcmpkt_rarp_t_operation_get, @@ -6710,7 +7239,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_rarp_t_fget[BCM56780_A0_DNA_6 bcmpkt_rarp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_rarp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_rarp_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_set, bcmpkt_rarp_t_hardware_type_set, bcmpkt_rarp_t_operation_set, @@ -6722,13 +7251,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_rarp_t_fset[BCM56780_A0_DNA_6 bcmpkt_rarp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rarp_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_rarp_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_rarp_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_rarp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_rarp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_rarp_t_field_data, }; @@ -6808,7 +7337,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_routing_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_routing_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_get, bcmpkt_routing_t_hdr_ext_len_get, bcmpkt_routing_t_next_header_get, @@ -6816,7 +7345,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_routing_t_fget[BCM56780_A0_DN bcmpkt_routing_t_segments_left_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_routing_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_routing_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_set, bcmpkt_routing_t_hdr_ext_len_set, bcmpkt_routing_t_next_header_set, @@ -6824,13 +7353,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_routing_t_fset[BCM56780_A0_DN bcmpkt_routing_t_segments_left_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_routing_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_routing_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_routing_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_routing_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_routing_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_routing_t_field_data, }; @@ -6864,23 +7393,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_rspan_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_rspan_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_get, bcmpkt_rspan_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_rspan_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_rspan_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_set, bcmpkt_rspan_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rspan_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_rspan_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_rspan_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_rspan_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_rspan_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_rspan_t_field_data, }; @@ -6930,25 +7459,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_sflow_shim_0_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_get, bcmpkt_sflow_shim_0_t_sys_source_get, bcmpkt_sflow_shim_0_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_sflow_shim_0_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_set, bcmpkt_sflow_shim_0_t_sys_source_set, bcmpkt_sflow_shim_0_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_sflow_shim_0_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_sflow_shim_0_t_field_data, }; @@ -7072,7 +7601,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_sflow_shim_1_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_get, bcmpkt_sflow_shim_1_t_flag_discarded_get, bcmpkt_sflow_shim_1_t_flag_flex_sample_get, @@ -7083,7 +7612,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fget[BCM56780_ bcmpkt_sflow_shim_1_t_sys_opcode_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_sflow_shim_1_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_set, bcmpkt_sflow_shim_1_t_flag_discarded_set, bcmpkt_sflow_shim_1_t_flag_flex_sample_set, @@ -7094,13 +7623,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fset[BCM56780_ bcmpkt_sflow_shim_1_t_sys_opcode_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_sflow_shim_1_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_sflow_shim_1_t_field_data, }; @@ -7135,23 +7664,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_sflow_shim_2_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_get, bcmpkt_sflow_shim_2_t_user_meta_data_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_sflow_shim_2_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_set, bcmpkt_sflow_shim_2_t_user_meta_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_sflow_shim_2_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_sflow_shim_2_t_field_data, }; @@ -7186,23 +7715,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_snap_llc_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_get, bcmpkt_snap_llc_t_snap_llc_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_snap_llc_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_set, bcmpkt_snap_llc_t_snap_llc_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_snap_llc_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_snap_llc_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_snap_llc_t_field_data, }; @@ -7236,23 +7765,23 @@ static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_svtag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_svtag_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SVTAG_T_FID_COUNT] = { bcmpkt_svtag_t_data_lwr_get, bcmpkt_svtag_t_data_upr_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_svtag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_svtag_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SVTAG_T_FID_COUNT] = { bcmpkt_svtag_t_data_lwr_set, bcmpkt_svtag_t_data_upr_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_svtag_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_svtag_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_svtag_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_svtag_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_svtag_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_SVTAG_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_svtag_t_field_data, }; @@ -7286,23 +7815,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_get, bcmpkt_tcp_first_4bytes_t_src_port_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_set, bcmpkt_tcp_first_4bytes_t_src_port_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_field_data, }; @@ -7398,7 +7927,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_get, bcmpkt_tcp_last_16bytes_t_checksum_get, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, @@ -7407,7 +7936,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fget[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_set, bcmpkt_tcp_last_16bytes_t_checksum_set, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, @@ -7416,13 +7945,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fset[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_field_data, }; @@ -7486,27 +8015,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_udp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_udp_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_get, bcmpkt_udp_t_dst_port_get, bcmpkt_udp_t_src_port_get, bcmpkt_udp_t_udp_length_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_udp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_udp_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_set, bcmpkt_udp_t_dst_port_set, bcmpkt_udp_t_src_port_set, bcmpkt_udp_t_udp_length_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_udp_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_udp_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_udp_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_udp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_udp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_udp_t_field_data, }; @@ -7542,23 +8071,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_unknown_l3_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_unknown_l3_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_unknown_l3_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_unknown_l3_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_unknown_l3_t_field_data, }; @@ -7578,21 +8107,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_unknown_l4_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_unknown_l4_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_unknown_l4_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_unknown_l4_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_unknown_l4_t_field_data, }; @@ -7642,25 +8171,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_unknown_l5_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_get, bcmpkt_unknown_l5_t_l5_bytes_2_3_get, bcmpkt_unknown_l5_t_l5_bytes_4_7_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_unknown_l5_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_set, bcmpkt_unknown_l5_t_l5_bytes_2_3_set, bcmpkt_unknown_l5_t_l5_bytes_4_7_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_unknown_l5_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_unknown_l5_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_unknown_l5_t_field_data, }; @@ -7724,27 +8253,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_vlan_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_vlan_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_get, bcmpkt_vlan_t_pcp_get, bcmpkt_vlan_t_tpid_get, bcmpkt_vlan_t_vid_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_vlan_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_vlan_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_set, bcmpkt_vlan_t_pcp_set, bcmpkt_vlan_t_tpid_set, bcmpkt_vlan_t_vid_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_vlan_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_vlan_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_vlan_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_vlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_vlan_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_vlan_t_field_data, }; @@ -7779,23 +8308,23 @@ static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_vntag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_vntag_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VNTAG_T_FID_COUNT] = { bcmpkt_vntag_t_tag_get, bcmpkt_vntag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_vntag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_vntag_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VNTAG_T_FID_COUNT] = { bcmpkt_vntag_t_tag_set, bcmpkt_vntag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_vntag_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_vntag_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_vntag_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_vntag_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_vntag_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_vntag_t_field_data, }; @@ -7845,25 +8374,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_vxlan_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_vxlan_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_get, bcmpkt_vxlan_t_reserved2_get, bcmpkt_vxlan_t_vn_id_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_vxlan_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_vxlan_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_set, bcmpkt_vxlan_t_reserved2_set, bcmpkt_vxlan_t_vn_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_vxlan_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_vxlan_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_vxlan_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_vxlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_vxlan_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_vxlan_t_field_data, }; @@ -7975,7 +8504,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_wesp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_31_7_0_wesp_t_fget[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_get, bcmpkt_wesp_t_header_len_get, bcmpkt_wesp_t_next_header_get, @@ -7985,7 +8514,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_wesp_t_fget[BCM56780_A0_DNA_6 bcmpkt_wesp_t_wesp_iv_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_wesp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_31_7_0_wesp_t_fset[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_set, bcmpkt_wesp_t_header_len_set, bcmpkt_wesp_t_next_header_set, @@ -7995,527 +8524,527 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_wesp_t_fset[BCM56780_A0_DNA_6 bcmpkt_wesp_t_wesp_iv_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_wesp_t_field_data[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_31_7_0_wesp_t_field_data[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_wesp_t_field_info = { - .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT, - .info = bcm56780_a0_dna_6_5_30_2_0_wesp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_31_7_0_wesp_t_field_info = { + .num_fields = BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56780_a0_dna_6_5_31_7_0_wesp_t_field_data, }; -static bcmpkt_flex_pmd_info_t bcm56780_a0_dna_6_5_30_2_0_flexhdr_info_list[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT] = { +static bcmpkt_flex_pmd_info_t bcm56780_a0_dna_6_5_31_7_0_flexhdr_info_list[BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_COUNT] = { { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_arp_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_arp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_arp_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_arp_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_arp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_arp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_authen_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_authen_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_authen_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_authen_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_authen_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_authen_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_bfd_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_bfd_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_bfd_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_bfd_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_bfd_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_bfd_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_cntag_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_cntag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_cntag_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_cntag_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_cntag_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_cntag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_cpu_composites_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_cpu_composites_0_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_cpu_composites_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_cpu_composites_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_cpu_composites_1_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_cpu_composites_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_dest_option_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_dest_option_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_dest_option_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_dest_option_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_dest_option_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_dest_option_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_ep_nih_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_ep_nih_header_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_ep_nih_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_esp_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_esp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_esp_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_esp_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_esp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_esp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_etag_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_etag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_etag_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_etag_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_etag_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_etag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_ethertype_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_ethertype_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ethertype_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ethertype_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_ethertype_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_ethertype_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_frag_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_frag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_frag_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_frag_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_frag_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_frag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_generic_loopback_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_generic_loopback_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_generic_loopback_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_gpe_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_gpe_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gpe_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gpe_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_gpe_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_gpe_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_gre_chksum_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_gre_chksum_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_gre_chksum_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_key_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_gre_key_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_key_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_key_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_gre_key_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_gre_key_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_gre_rout_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_gre_rout_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_gre_rout_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_gre_seq_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_gre_seq_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_gre_seq_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_gre_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_gre_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_gre_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_hg3_base_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_hg3_base_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_hg3_base_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_hg3_extension_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_hg3_extension_0_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_hg3_extension_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_hop_by_hop_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_hop_by_hop_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_hop_by_hop_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_icmp_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_icmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_icmp_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_icmp_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_icmp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_icmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_a_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_a_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_b_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_0_b_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_1_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_2_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_3_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_ifa_flex_md_3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_ifa_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_ifa_header_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_ifa_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_ifa_md_base_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_ifa_md_base_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_ifa_md_base_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_ifa_metadata_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_ifa_metadata_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_ifa_metadata_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_igmp_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_igmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_igmp_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_igmp_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_igmp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_igmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_ipfix_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_ipfix_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_ipfix_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_ipfix_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_ipv4_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_ipv4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_ipv4_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_ipv4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_ipv6_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_ipv6_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_ipv6_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_ipv6_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_l2_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_l2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_l2_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_l2_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_l2_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_l2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_mirror_transport_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_mirror_transport_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_mirror_transport_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_mpls_ach_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_mpls_ach_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_mpls_ach_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_mpls_bv_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_mpls_bv_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_mpls_bv_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_mpls_cw_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_mpls_cw_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_mpls_cw_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_mpls_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_mpls_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mpls_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mpls_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_mpls_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_mpls_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_p_1588_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_p_1588_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_p_1588_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_p_1588_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_pim_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_pim_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_pim_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_pim_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_pim_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_pim_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_prog_ext_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_prog_ext_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_psamp_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_psamp_0_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_psamp_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_psamp_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_psamp_1_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_psamp_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_rarp_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_rarp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_rarp_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_rarp_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_rarp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_rarp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_routing_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_routing_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_routing_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_routing_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_routing_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_routing_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_rspan_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_rspan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_rspan_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_rspan_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_rspan_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_rspan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_sflow_shim_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_sflow_shim_0_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_sflow_shim_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_sflow_shim_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_sflow_shim_1_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_sflow_shim_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_sflow_shim_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_sflow_shim_2_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_sflow_shim_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_snap_llc_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_snap_llc_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_snap_llc_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_svtag_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_svtag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_svtag_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_svtag_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_svtag_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_svtag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_udp_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_udp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_udp_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_udp_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_udp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_udp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_unknown_l3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_unknown_l3_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_unknown_l3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_unknown_l4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_unknown_l4_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_unknown_l4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_unknown_l5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_unknown_l5_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_unknown_l5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_vlan_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_vlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_vlan_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_vlan_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_vlan_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_vlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_vntag_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_vntag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_vntag_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_vntag_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_vntag_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_vntag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_vxlan_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_vxlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_vxlan_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_vxlan_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_vxlan_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_vxlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_wesp_t_field_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_wesp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_dna_6_5_30_2_0_wesp_t_fget, - .flex_fset = bcm56780_a0_dna_6_5_30_2_0_wesp_t_fset, + .flex_fget = bcm56780_a0_dna_6_5_31_7_0_wesp_t_fget, + .flex_fset = bcm56780_a0_dna_6_5_31_7_0_wesp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_info, - .reasons_info = &bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reasons_info, + .field_info = &bcm56780_a0_dna_6_5_31_7_0_rxpmd_flex_field_info, + .reasons_info = &bcm56780_a0_dna_6_5_31_7_0_rxpmd_flex_reasons_info, .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, }, }; -static shr_enum_map_t bcm56780_a0_dna_6_5_30_2_0_flexhdr_id_map[] = { - BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +static shr_enum_map_t bcm56780_a0_dna_6_5_31_7_0_flexhdr_id_map[] = { + BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_NAME_MAP_INIT }; -shr_enum_map_t * bcm56780_a0_dna_6_5_30_2_0_flexhdr_map_get(void) +shr_enum_map_t * bcm56780_a0_dna_6_5_31_7_0_flexhdr_map_get(void) { - return bcm56780_a0_dna_6_5_30_2_0_flexhdr_id_map; + return bcm56780_a0_dna_6_5_31_7_0_flexhdr_id_map; } -bcmpkt_flex_pmd_info_t * bcm56780_a0_dna_6_5_30_2_0_flex_pmd_info_get(uint32_t hid) +bcmpkt_flex_pmd_info_t * bcm56780_a0_dna_6_5_31_7_0_flex_pmd_info_get(uint32_t hid) { - if (hid >= BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT) { + if (hid >= BCM56780_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_COUNT) { return NULL; } - return &bcm56780_a0_dna_6_5_30_2_0_flexhdr_info_list[hid]; + return &bcm56780_a0_dna_6_5_31_7_0_flexhdr_info_list[hid]; } -int bcm56780_a0_dna_6_5_30_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { +int bcm56780_a0_dna_6_5_31_7_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { 14, 21, 22, diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c similarity index 83% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c index 41eeeee2e12..14e29e6984f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c @@ -2,8 +2,8 @@ * * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56780_a0_hna_6_5_30_6_0_sf_match_id_info.yml - * for device bcm56780_a0 and variant hna_6_5_30_6_0. + * from the NPL output file(s) bcm56780_a0_hna_6_5_31_3_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant hna_6_5_31_3_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -29,13 +29,13 @@ #include -#include +#include static bcmpkt_rxpmd_match_id_db_t -bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_COUNT] = { +bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT] = { { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", .match = 0x40, .match_mask = 0x60, @@ -49,7 +49,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", .match = 0x10, .match_mask = 0x10, @@ -63,7 +63,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ .name = "EGRESS_PKT_FWD_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -77,7 +77,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ .name = "EGRESS_PKT_FWD_L2_HDR_NONE", .match = 0x0, .match_mask = 0x7f, @@ -91,7 +91,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", .match = 0x8, .match_mask = 0x8, @@ -105,7 +105,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", .match = 0x2, .match_mask = 0x2, @@ -119,7 +119,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", .match = 0x4, .match_mask = 0x4, @@ -133,7 +133,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", .match = 0x20, .match_mask = 0x60, @@ -147,7 +147,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -161,7 +161,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -175,7 +175,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -189,7 +189,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -203,7 +203,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -217,7 +217,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -231,7 +231,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -245,7 +245,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -259,7 +259,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", .match = 0x1830, .match_mask = 0x3870, @@ -273,7 +273,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", .match = 0x2, .match_mask = 0x42, @@ -287,7 +287,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", .match = 0x202, .match_mask = 0x642, @@ -301,7 +301,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", .match = 0x1000, .match_mask = 0x3800, @@ -315,7 +315,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", .match = 0x82, .match_mask = 0x1c2, @@ -329,7 +329,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", .match = 0x12, .match_mask = 0x72, @@ -343,7 +343,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -357,7 +357,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -371,7 +371,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -385,7 +385,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -399,7 +399,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -413,7 +413,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -427,7 +427,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -441,7 +441,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -455,7 +455,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -469,7 +469,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -483,7 +483,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -497,7 +497,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -511,7 +511,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -525,7 +525,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -539,7 +539,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -553,7 +553,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -567,7 +567,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -581,7 +581,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -595,7 +595,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -609,7 +609,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -623,7 +623,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -637,7 +637,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -651,7 +651,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -665,7 +665,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", .match = 0x830, .match_mask = 0x3870, @@ -679,7 +679,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ .name = "EGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -693,7 +693,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -707,7 +707,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ .name = "EGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -721,7 +721,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", .match = 0x40, .match_mask = 0x60, @@ -735,7 +735,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", .match = 0x10, .match_mask = 0x10, @@ -749,7 +749,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -763,7 +763,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", .match = 0x0, .match_mask = 0x7f, @@ -777,7 +777,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", .match = 0x8, .match_mask = 0x8, @@ -791,7 +791,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", .match = 0x2, .match_mask = 0x2, @@ -805,7 +805,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", .match = 0x4, .match_mask = 0x4, @@ -819,7 +819,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", .match = 0x20, .match_mask = 0x60, @@ -833,7 +833,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -847,7 +847,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -861,7 +861,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -875,7 +875,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -889,7 +889,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -903,7 +903,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -917,7 +917,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -931,7 +931,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -945,7 +945,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", .match = 0x1830, .match_mask = 0x3870, @@ -959,7 +959,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", .match = 0x2, .match_mask = 0x42, @@ -973,7 +973,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", .match = 0x202, .match_mask = 0x642, @@ -987,7 +987,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", .match = 0x1000, .match_mask = 0x3800, @@ -1001,7 +1001,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", .match = 0x82, .match_mask = 0x1c2, @@ -1015,7 +1015,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", .match = 0x12, .match_mask = 0x72, @@ -1029,7 +1029,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -1043,7 +1043,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -1057,7 +1057,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -1071,7 +1071,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -1085,7 +1085,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -1099,7 +1099,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -1113,7 +1113,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -1127,7 +1127,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -1141,7 +1141,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -1155,7 +1155,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -1169,7 +1169,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -1183,7 +1183,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -1197,7 +1197,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -1211,7 +1211,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -1225,7 +1225,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -1239,7 +1239,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -1253,7 +1253,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -1267,7 +1267,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -1281,7 +1281,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -1295,7 +1295,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -1309,7 +1309,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -1323,7 +1323,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -1337,7 +1337,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -1351,7 +1351,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", .match = 0x830, .match_mask = 0x3870, @@ -1365,7 +1365,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", .match = 0x40, .match_mask = 0x60, @@ -1379,7 +1379,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", .match = 0x10, .match_mask = 0x10, @@ -1393,7 +1393,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ .name = "INGRESS_PKT_INNER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -1407,7 +1407,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ .name = "INGRESS_PKT_INNER_L2_HDR_NONE", .match = 0x0, .match_mask = 0x7f, @@ -1421,7 +1421,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", .match = 0x8, .match_mask = 0x8, @@ -1435,7 +1435,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", .match = 0x2, .match_mask = 0x2, @@ -1449,7 +1449,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", .match = 0x20, .match_mask = 0x60, @@ -1463,7 +1463,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -1477,7 +1477,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -1491,7 +1491,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -1505,7 +1505,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -1519,7 +1519,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -1533,7 +1533,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -1547,7 +1547,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -1561,7 +1561,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -1575,7 +1575,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -1589,7 +1589,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -1603,7 +1603,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -1617,7 +1617,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -1631,7 +1631,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -1645,7 +1645,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -1659,7 +1659,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -1673,7 +1673,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -1687,7 +1687,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -1701,7 +1701,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -1715,7 +1715,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -1729,7 +1729,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -1743,7 +1743,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -1757,7 +1757,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -1771,7 +1771,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", .match = 0x40, .match_mask = 0x60, @@ -1785,7 +1785,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", .match = 0x10, .match_mask = 0x10, @@ -1799,7 +1799,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ .name = "INGRESS_PKT_OUTER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -1813,7 +1813,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", .match = 0x0, .match_mask = 0x7f, @@ -1827,7 +1827,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", .match = 0x8, .match_mask = 0x8, @@ -1841,7 +1841,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", .match = 0x2, .match_mask = 0x2, @@ -1855,7 +1855,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", .match = 0x4, .match_mask = 0x4, @@ -1869,7 +1869,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", .match = 0x20, .match_mask = 0x60, @@ -1883,7 +1883,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -1897,7 +1897,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -1911,7 +1911,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -1925,7 +1925,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -1939,7 +1939,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -1953,7 +1953,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -1967,7 +1967,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -1981,7 +1981,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -1995,7 +1995,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", .match = 0x1830, .match_mask = 0x3870, @@ -2009,7 +2009,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", .match = 0x2, .match_mask = 0x42, @@ -2023,7 +2023,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", .match = 0x202, .match_mask = 0x642, @@ -2037,7 +2037,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", .match = 0x1000, .match_mask = 0x3800, @@ -2051,7 +2051,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", .match = 0x82, .match_mask = 0x1c2, @@ -2065,7 +2065,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", .match = 0x12, .match_mask = 0x72, @@ -2079,7 +2079,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -2093,7 +2093,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -2107,7 +2107,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -2121,7 +2121,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -2135,7 +2135,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -2149,7 +2149,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -2163,7 +2163,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -2177,7 +2177,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -2191,7 +2191,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -2205,7 +2205,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -2219,7 +2219,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -2233,7 +2233,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -2247,7 +2247,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -2261,7 +2261,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -2275,7 +2275,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -2289,7 +2289,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -2303,7 +2303,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -2317,7 +2317,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -2331,7 +2331,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -2345,7 +2345,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -2359,7 +2359,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -2373,7 +2373,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -2387,7 +2387,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -2401,7 +2401,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", .match = 0x830, .match_mask = 0x3870, @@ -2415,7 +2415,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ .name = "INGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -2429,7 +2429,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -2443,7 +2443,7 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, { - /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ .name = "INGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -2458,23 +2458,23 @@ bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MA }, }; -static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db_info = { +static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info = { .num_entries = 173, - .db = bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db + .db = bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_db }; -bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db_info_get(void) { - return &bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db_info; +bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info_get(void) { + return &bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info; } -static shr_enum_map_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +static shr_enum_map_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_map[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT }; -static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map_info = { +static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info = { .num_entries = 173, - .map = bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map + .map = bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_map }; -bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map_info_get(void) { - return &bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map_info; +bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info_get(void) { + return &bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info; } diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_pkt_flexhdr.c similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_pkt_flexhdr.c index 75b50b99896..66edd0cacff 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_pkt_flexhdr.c @@ -3,7 +3,7 @@ * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser * from the NPL output file(s) map.yml - * for device bcm56780_a0 and variant hna_6_5_30_6_0. + * for device bcm56780_a0 and variant hna_6_5_31_3_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -31,315 +31,315 @@ #include #include #include -#include -#include -#include +#include +#include +#include #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -static void bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +static void bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) { uint32_t *reason = data + 0; if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); } if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); } if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); } if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); } if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); } if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); } if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); } if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); } if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); } if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); } if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); } if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); } if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); } if (reason[13] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); } if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); } if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP); } if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP); } if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); } if (reason[13] & (0x1 << 20)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); } if (reason[13] & (0x1 << 21)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP); } if (reason[13] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); } if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); } if (reason[13] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); } if (reason[13] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); } if (reason[13] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); } if (reason[13] & (0x1 << 27)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); } if (reason[13] & (0x1 << 28)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); } if (reason[13] & (0x1 << 29)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[13] & (0x1 << 30)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[13] & (0x1 << 31)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); } if (reason[12] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); } if (reason[12] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); } if (reason[12] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); } if (reason[12] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); } if (reason[12] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); } if (reason[12] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); } if (reason[12] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); } if (reason[12] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); } if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY); } if (reason[12] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); } if (reason[12] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); } if (reason[12] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); } if (reason[12] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); } if (reason[12] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); } if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); } } -static void bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +static void bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) { uint32_t *reason = data + 0; reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { reason[13] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { reason[13] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { reason[13] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { reason[13] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { reason[13] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { reason[13] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { reason[13] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { reason[13] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { reason[13] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { reason[13] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { reason[13] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { reason[13] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { reason[13] |= (0x1 << 14); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { reason[13] |= (0x1 << 15); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { reason[13] |= (0x1 << 16); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { reason[13] |= (0x1 << 17); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { reason[13] |= (0x1 << 18); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { reason[13] |= (0x1 << 19); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { reason[13] |= (0x1 << 20); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { reason[13] |= (0x1 << 21); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { reason[13] |= (0x1 << 22); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { reason[13] |= (0x1 << 23); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { reason[13] |= (0x1 << 24); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { reason[13] |= (0x1 << 25); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { reason[13] |= (0x1 << 26); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { reason[13] |= (0x1 << 27); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { reason[13] |= (0x1 << 28); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[13] |= (0x1 << 29); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[13] |= (0x1 << 30); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { reason[13] |= (0x1 << 31); } reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { reason[12] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { reason[12] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { reason[12] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { reason[12] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { reason[12] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { reason[12] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { reason[12] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { reason[12] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) { reason[12] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { reason[12] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { reason[12] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { reason[12] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { reason[12] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { reason[12] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { reason[12] |= (0x1 << 15); } } -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_data[] = { +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_field_data[] = { { .name = "DLB_ECMP_DESTINATION_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -368,7 +368,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "DROP_CODE_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -397,7 +397,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "DVP_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -426,7 +426,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "EFFECTIVE_TTL_7_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -455,7 +455,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "EGR_MTOP_INDEX_HI_3_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -484,7 +484,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -511,7 +511,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -530,36 +530,36 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 392, 395 }, /* Profile 2. */ - { 392, 395 }, /* Profile 3. */ - { 392, 395 }, /* Profile 4. */ - { 392, 395 }, /* Profile 5. */ - { 392, 395 }, /* Profile 6. */ - { 392, 395 }, /* Profile 7. */ - { 392, 395 }, /* Profile 8. */ - { 392, 395 }, /* Profile 9. */ - { 392, 395 }, /* Profile 10. */ - { 392, 395 }, /* Profile 11. */ - { 392, 395 }, /* Profile 12. */ - { 392, 395 }, /* Profile 13. */ - { 392, 395 }, /* Profile 14. */ - { 392, 395 }, /* Profile 15. */ - { 392, 395 }, /* Profile 16. */ - { 392, 395 }, /* Profile 17. */ - { 392, 395 }, /* Profile 18. */ - { 392, 395 }, /* Profile 19. */ - { 392, 395 }, /* Profile 20. */ - { 392, 395 }, /* Profile 21. */ + { 424, 427 }, /* Profile 2. */ + { 424, 427 }, /* Profile 3. */ + { 424, 427 }, /* Profile 4. */ + { 424, 427 }, /* Profile 5. */ + { 424, 427 }, /* Profile 6. */ + { 424, 427 }, /* Profile 7. */ + { 424, 427 }, /* Profile 8. */ + { 424, 427 }, /* Profile 9. */ + { 424, 427 }, /* Profile 10. */ + { 424, 427 }, /* Profile 11. */ + { 424, 427 }, /* Profile 12. */ + { 424, 427 }, /* Profile 13. */ + { 424, 427 }, /* Profile 14. */ + { 424, 427 }, /* Profile 15. */ + { 424, 427 }, /* Profile 16. */ + { 424, 427 }, /* Profile 17. */ + { 424, 427 }, /* Profile 18. */ + { 424, 427 }, /* Profile 19. */ + { 424, 427 }, /* Profile 20. */ + { 424, 427 }, /* Profile 21. */ }, .profile_cnt = 22, }, { .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -588,7 +588,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "EP_NIH_HDR_TIMESTAMP_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -614,7 +614,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "EP_NIH_HDR_TIMESTAMP_31_16", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -640,7 +640,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "EVENT_TRACE_VECTOR_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -669,7 +669,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "EVENT_TRACE_VECTOR_31_16", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -698,7 +698,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -727,7 +727,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "I2E_CLASS_ID_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -756,36 +756,36 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "IFP_IOAM_GBP_ACTION_3_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 408, 411 }, /* Profile 2. */ - { 408, 411 }, /* Profile 3. */ - { 408, 411 }, /* Profile 4. */ - { 408, 411 }, /* Profile 5. */ - { 408, 411 }, /* Profile 6. */ - { 408, 411 }, /* Profile 7. */ - { 408, 411 }, /* Profile 8. */ - { 408, 411 }, /* Profile 9. */ - { 408, 411 }, /* Profile 10. */ - { 408, 411 }, /* Profile 11. */ - { 408, 411 }, /* Profile 12. */ - { 408, 411 }, /* Profile 13. */ - { 408, 411 }, /* Profile 14. */ - { 408, 411 }, /* Profile 15. */ - { 408, 411 }, /* Profile 16. */ - { 408, 411 }, /* Profile 17. */ - { 408, 411 }, /* Profile 18. */ - { 408, 411 }, /* Profile 19. */ - { 408, 411 }, /* Profile 20. */ - { 408, 411 }, /* Profile 21. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + { 396, 399 }, /* Profile 6. */ + { 396, 399 }, /* Profile 7. */ + { 396, 399 }, /* Profile 8. */ + { 396, 399 }, /* Profile 9. */ + { 396, 399 }, /* Profile 10. */ + { 396, 399 }, /* Profile 11. */ + { 396, 399 }, /* Profile 12. */ + { 396, 399 }, /* Profile 13. */ + { 396, 399 }, /* Profile 14. */ + { 396, 399 }, /* Profile 15. */ + { 396, 399 }, /* Profile 16. */ + { 396, 399 }, /* Profile 17. */ + { 396, 399 }, /* Profile 18. */ + { 396, 399 }, /* Profile 19. */ + { 396, 399 }, /* Profile 20. */ + { 396, 399 }, /* Profile 21. */ }, .profile_cnt = 22, }, { .name = "IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -814,36 +814,36 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 420, 423 }, /* Profile 2. */ - { 420, 423 }, /* Profile 3. */ - { 420, 423 }, /* Profile 4. */ - { 420, 423 }, /* Profile 5. */ - { 420, 423 }, /* Profile 6. */ - { 420, 423 }, /* Profile 7. */ - { 420, 423 }, /* Profile 8. */ - { 420, 423 }, /* Profile 9. */ - { 420, 423 }, /* Profile 10. */ - { 420, 423 }, /* Profile 11. */ - { 420, 423 }, /* Profile 12. */ - { 420, 423 }, /* Profile 13. */ - { 420, 423 }, /* Profile 14. */ - { 420, 423 }, /* Profile 15. */ - { 420, 423 }, /* Profile 16. */ - { 420, 423 }, /* Profile 17. */ - { 420, 423 }, /* Profile 18. */ - { 420, 423 }, /* Profile 19. */ - { 420, 423 }, /* Profile 20. */ - { 420, 423 }, /* Profile 21. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + { 404, 407 }, /* Profile 6. */ + { 404, 407 }, /* Profile 7. */ + { 404, 407 }, /* Profile 8. */ + { 404, 407 }, /* Profile 9. */ + { 404, 407 }, /* Profile 10. */ + { 404, 407 }, /* Profile 11. */ + { 404, 407 }, /* Profile 12. */ + { 404, 407 }, /* Profile 13. */ + { 404, 407 }, /* Profile 14. */ + { 404, 407 }, /* Profile 15. */ + { 404, 407 }, /* Profile 16. */ + { 404, 407 }, /* Profile 17. */ + { 404, 407 }, /* Profile 18. */ + { 404, 407 }, /* Profile 19. */ + { 404, 407 }, /* Profile 20. */ + { 404, 407 }, /* Profile 21. */ }, .profile_cnt = 22, }, { .name = "ING_TIMESTAMP_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -872,7 +872,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "ING_TIMESTAMP_31_16", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -901,7 +901,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "INGRESS_PP_PORT_7_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -930,7 +930,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -959,65 +959,65 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 388, 391 }, /* Profile 2. */ - { 388, 391 }, /* Profile 3. */ - { 388, 391 }, /* Profile 4. */ - { 388, 391 }, /* Profile 5. */ - { 388, 391 }, /* Profile 6. */ - { 388, 391 }, /* Profile 7. */ - { 388, 391 }, /* Profile 8. */ - { 388, 391 }, /* Profile 9. */ - { 388, 391 }, /* Profile 10. */ - { 388, 391 }, /* Profile 11. */ - { 388, 391 }, /* Profile 12. */ - { 388, 391 }, /* Profile 13. */ - { 388, 391 }, /* Profile 14. */ - { 388, 391 }, /* Profile 15. */ - { 388, 391 }, /* Profile 16. */ - { 388, 391 }, /* Profile 17. */ - { 388, 391 }, /* Profile 18. */ - { 388, 391 }, /* Profile 19. */ - { 388, 391 }, /* Profile 20. */ - { 388, 391 }, /* Profile 21. */ + { 428, 431 }, /* Profile 2. */ + { 428, 431 }, /* Profile 3. */ + { 428, 431 }, /* Profile 4. */ + { 428, 431 }, /* Profile 5. */ + { 428, 431 }, /* Profile 6. */ + { 428, 431 }, /* Profile 7. */ + { 428, 431 }, /* Profile 8. */ + { 428, 431 }, /* Profile 9. */ + { 428, 431 }, /* Profile 10. */ + { 428, 431 }, /* Profile 11. */ + { 428, 431 }, /* Profile 12. */ + { 428, 431 }, /* Profile 13. */ + { 428, 431 }, /* Profile 14. */ + { 428, 431 }, /* Profile 15. */ + { 428, 431 }, /* Profile 16. */ + { 428, 431 }, /* Profile 17. */ + { 428, 431 }, /* Profile 18. */ + { 428, 431 }, /* Profile 19. */ + { 428, 431 }, /* Profile 20. */ + { 428, 431 }, /* Profile 21. */ }, .profile_cnt = 22, }, { .name = "INT_PRI_3_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 424, 427 }, /* Profile 2. */ - { 424, 427 }, /* Profile 3. */ - { 424, 427 }, /* Profile 4. */ - { 424, 427 }, /* Profile 5. */ - { 424, 427 }, /* Profile 6. */ - { 424, 427 }, /* Profile 7. */ - { 424, 427 }, /* Profile 8. */ - { 424, 427 }, /* Profile 9. */ - { 424, 427 }, /* Profile 10. */ - { 424, 427 }, /* Profile 11. */ - { 424, 427 }, /* Profile 12. */ - { 424, 427 }, /* Profile 13. */ - { 424, 427 }, /* Profile 14. */ - { 424, 427 }, /* Profile 15. */ - { 424, 427 }, /* Profile 16. */ - { 424, 427 }, /* Profile 17. */ - { 424, 427 }, /* Profile 18. */ - { 424, 427 }, /* Profile 19. */ - { 424, 427 }, /* Profile 20. */ - { 424, 427 }, /* Profile 21. */ + { 416, 419 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + { 416, 419 }, /* Profile 5. */ + { 416, 419 }, /* Profile 6. */ + { 416, 419 }, /* Profile 7. */ + { 416, 419 }, /* Profile 8. */ + { 416, 419 }, /* Profile 9. */ + { 416, 419 }, /* Profile 10. */ + { 416, 419 }, /* Profile 11. */ + { 416, 419 }, /* Profile 12. */ + { 416, 419 }, /* Profile 13. */ + { 416, 419 }, /* Profile 14. */ + { 416, 419 }, /* Profile 15. */ + { 416, 419 }, /* Profile 16. */ + { 416, 419 }, /* Profile 17. */ + { 416, 419 }, /* Profile 18. */ + { 416, 419 }, /* Profile 19. */ + { 416, 419 }, /* Profile 20. */ + { 416, 419 }, /* Profile 21. */ }, .profile_cnt = 22, }, { .name = "L2_IIF_10_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1045,7 +1045,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "L2_OIF_10_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1074,7 +1074,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "L3_IIF_13_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1103,7 +1103,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "L3_OIF_1_13_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1132,7 +1132,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1161,7 +1161,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "NHOP_INDEX_1_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1190,7 +1190,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1219,36 +1219,36 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 400, 403 }, /* Profile 2. */ - { 400, 403 }, /* Profile 3. */ - { 400, 403 }, /* Profile 4. */ - { 400, 403 }, /* Profile 5. */ - { 400, 403 }, /* Profile 6. */ - { 400, 403 }, /* Profile 7. */ - { 400, 403 }, /* Profile 8. */ - { 400, 403 }, /* Profile 9. */ - { 400, 403 }, /* Profile 10. */ - { 400, 403 }, /* Profile 11. */ - { 400, 403 }, /* Profile 12. */ - { 400, 403 }, /* Profile 13. */ - { 400, 403 }, /* Profile 14. */ - { 400, 403 }, /* Profile 15. */ - { 400, 403 }, /* Profile 16. */ - { 400, 403 }, /* Profile 17. */ - { 400, 403 }, /* Profile 18. */ - { 400, 403 }, /* Profile 19. */ - { 400, 403 }, /* Profile 20. */ - { 400, 403 }, /* Profile 21. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + { 408, 411 }, /* Profile 6. */ + { 408, 411 }, /* Profile 7. */ + { 408, 411 }, /* Profile 8. */ + { 408, 411 }, /* Profile 9. */ + { 408, 411 }, /* Profile 10. */ + { 408, 411 }, /* Profile 11. */ + { 408, 411 }, /* Profile 12. */ + { 408, 411 }, /* Profile 13. */ + { 408, 411 }, /* Profile 14. */ + { 408, 411 }, /* Profile 15. */ + { 408, 411 }, /* Profile 16. */ + { 408, 411 }, /* Profile 17. */ + { 408, 411 }, /* Profile 18. */ + { 408, 411 }, /* Profile 19. */ + { 408, 411 }, /* Profile 20. */ + { 408, 411 }, /* Profile 21. */ }, .profile_cnt = 22, }, { .name = "SVP_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1277,36 +1277,36 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 412, 415 }, /* Profile 2. */ - { 412, 415 }, /* Profile 3. */ - { 412, 415 }, /* Profile 4. */ - { 412, 415 }, /* Profile 5. */ - { 412, 415 }, /* Profile 6. */ - { 412, 415 }, /* Profile 7. */ - { 412, 415 }, /* Profile 8. */ - { 412, 415 }, /* Profile 9. */ - { 412, 415 }, /* Profile 10. */ - { 412, 415 }, /* Profile 11. */ - { 412, 415 }, /* Profile 12. */ - { 412, 415 }, /* Profile 13. */ - { 412, 415 }, /* Profile 14. */ - { 412, 415 }, /* Profile 15. */ - { 412, 415 }, /* Profile 16. */ - { 412, 415 }, /* Profile 17. */ - { 412, 415 }, /* Profile 18. */ - { 412, 415 }, /* Profile 19. */ - { 412, 415 }, /* Profile 20. */ - { 412, 415 }, /* Profile 21. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + { 400, 403 }, /* Profile 6. */ + { 400, 403 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 400, 403 }, /* Profile 9. */ + { 400, 403 }, /* Profile 10. */ + { 400, 403 }, /* Profile 11. */ + { 400, 403 }, /* Profile 12. */ + { 400, 403 }, /* Profile 13. */ + { 400, 403 }, /* Profile 14. */ + { 400, 403 }, /* Profile 15. */ + { 400, 403 }, /* Profile 16. */ + { 400, 403 }, /* Profile 17. */ + { 400, 403 }, /* Profile 18. */ + { 400, 403 }, /* Profile 19. */ + { 400, 403 }, /* Profile 20. */ + { 400, 403 }, /* Profile 21. */ }, .profile_cnt = 22, }, { .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1335,36 +1335,36 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 396, 399 }, /* Profile 2. */ - { 396, 399 }, /* Profile 3. */ - { 396, 399 }, /* Profile 4. */ - { 396, 399 }, /* Profile 5. */ - { 396, 399 }, /* Profile 6. */ - { 396, 399 }, /* Profile 7. */ - { 396, 399 }, /* Profile 8. */ - { 396, 399 }, /* Profile 9. */ - { 396, 399 }, /* Profile 10. */ - { 396, 399 }, /* Profile 11. */ - { 396, 399 }, /* Profile 12. */ - { 396, 399 }, /* Profile 13. */ - { 396, 399 }, /* Profile 14. */ - { 396, 399 }, /* Profile 15. */ - { 396, 399 }, /* Profile 16. */ - { 396, 399 }, /* Profile 17. */ - { 396, 399 }, /* Profile 18. */ - { 396, 399 }, /* Profile 19. */ - { 396, 399 }, /* Profile 20. */ - { 396, 399 }, /* Profile 21. */ + { 420, 423 }, /* Profile 2. */ + { 420, 423 }, /* Profile 3. */ + { 420, 423 }, /* Profile 4. */ + { 420, 423 }, /* Profile 5. */ + { 420, 423 }, /* Profile 6. */ + { 420, 423 }, /* Profile 7. */ + { 420, 423 }, /* Profile 8. */ + { 420, 423 }, /* Profile 9. */ + { 420, 423 }, /* Profile 10. */ + { 420, 423 }, /* Profile 11. */ + { 420, 423 }, /* Profile 12. */ + { 420, 423 }, /* Profile 13. */ + { 420, 423 }, /* Profile 14. */ + { 420, 423 }, /* Profile 15. */ + { 420, 423 }, /* Profile 16. */ + { 420, 423 }, /* Profile 17. */ + { 420, 423 }, /* Profile 18. */ + { 420, 423 }, /* Profile 19. */ + { 420, 423 }, /* Profile 20. */ + { 420, 423 }, /* Profile 21. */ }, .profile_cnt = 22, }, { .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1393,65 +1393,65 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 428, 431 }, /* Profile 2. */ - { 428, 431 }, /* Profile 3. */ - { 428, 431 }, /* Profile 4. */ - { 428, 431 }, /* Profile 5. */ - { 428, 431 }, /* Profile 6. */ - { 428, 431 }, /* Profile 7. */ - { 428, 431 }, /* Profile 8. */ - { 428, 431 }, /* Profile 9. */ - { 428, 431 }, /* Profile 10. */ - { 428, 431 }, /* Profile 11. */ - { 428, 431 }, /* Profile 12. */ - { 428, 431 }, /* Profile 13. */ - { 428, 431 }, /* Profile 14. */ - { 428, 431 }, /* Profile 15. */ - { 428, 431 }, /* Profile 16. */ - { 428, 431 }, /* Profile 17. */ - { 428, 431 }, /* Profile 18. */ - { 428, 431 }, /* Profile 19. */ - { 428, 431 }, /* Profile 20. */ - { 428, 431 }, /* Profile 21. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + { 388, 391 }, /* Profile 6. */ + { 388, 391 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 388, 391 }, /* Profile 9. */ + { 388, 391 }, /* Profile 10. */ + { 388, 391 }, /* Profile 11. */ + { 388, 391 }, /* Profile 12. */ + { 388, 391 }, /* Profile 13. */ + { 388, 391 }, /* Profile 14. */ + { 388, 391 }, /* Profile 15. */ + { 388, 391 }, /* Profile 16. */ + { 388, 391 }, /* Profile 17. */ + { 388, 391 }, /* Profile 18. */ + { 388, 391 }, /* Profile 19. */ + { 388, 391 }, /* Profile 20. */ + { 388, 391 }, /* Profile 21. */ }, .profile_cnt = 22, }, { .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 416, 419 }, /* Profile 2. */ - { 416, 419 }, /* Profile 3. */ - { 416, 419 }, /* Profile 4. */ - { 416, 419 }, /* Profile 5. */ - { 416, 419 }, /* Profile 6. */ - { 416, 419 }, /* Profile 7. */ - { 416, 419 }, /* Profile 8. */ - { 416, 419 }, /* Profile 9. */ - { 416, 419 }, /* Profile 10. */ - { 416, 419 }, /* Profile 11. */ - { 416, 419 }, /* Profile 12. */ - { 416, 419 }, /* Profile 13. */ - { 416, 419 }, /* Profile 14. */ - { 416, 419 }, /* Profile 15. */ - { 416, 419 }, /* Profile 16. */ - { 416, 419 }, /* Profile 17. */ - { 416, 419 }, /* Profile 18. */ - { 416, 419 }, /* Profile 19. */ - { 416, 419 }, /* Profile 20. */ - { 416, 419 }, /* Profile 21. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 412, 415 }, /* Profile 6. */ + { 412, 415 }, /* Profile 7. */ + { 412, 415 }, /* Profile 8. */ + { 412, 415 }, /* Profile 9. */ + { 412, 415 }, /* Profile 10. */ + { 412, 415 }, /* Profile 11. */ + { 412, 415 }, /* Profile 12. */ + { 412, 415 }, /* Profile 13. */ + { 412, 415 }, /* Profile 14. */ + { 412, 415 }, /* Profile 15. */ + { 412, 415 }, /* Profile 16. */ + { 412, 415 }, /* Profile 17. */ + { 412, 415 }, /* Profile 18. */ + { 412, 415 }, /* Profile 19. */ + { 412, 415 }, /* Profile 20. */ + { 412, 415 }, /* Profile 21. */ }, .profile_cnt = 22, }, { .name = "VFI_15_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1480,47 +1480,51 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_ }, { .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", - .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 404, 407 }, /* Profile 2. */ - { 404, 407 }, /* Profile 3. */ - { 404, 407 }, /* Profile 4. */ - { 404, 407 }, /* Profile 5. */ - { 404, 407 }, /* Profile 6. */ - { 404, 407 }, /* Profile 7. */ - { 404, 407 }, /* Profile 8. */ - { 404, 407 }, /* Profile 9. */ - { 404, 407 }, /* Profile 10. */ - { 404, 407 }, /* Profile 11. */ - { 404, 407 }, /* Profile 12. */ - { 404, 407 }, /* Profile 13. */ - { 404, 407 }, /* Profile 14. */ - { 404, 407 }, /* Profile 15. */ - { 404, 407 }, /* Profile 16. */ - { 404, 407 }, /* Profile 17. */ - { 404, 407 }, /* Profile 18. */ - { 404, 407 }, /* Profile 19. */ - { 404, 407 }, /* Profile 20. */ - { 404, 407 }, /* Profile 21. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 392, 395 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ + { 392, 395 }, /* Profile 10. */ + { 392, 395 }, /* Profile 11. */ + { 392, 395 }, /* Profile 12. */ + { 392, 395 }, /* Profile 13. */ + { 392, 395 }, /* Profile 14. */ + { 392, 395 }, /* Profile 15. */ + { 392, 395 }, /* Profile 16. */ + { 392, 395 }, /* Profile 17. */ + { 392, 395 }, /* Profile 18. */ + { 392, 395 }, /* Profile 19. */ + { 392, 395 }, /* Profile 20. */ + { 392, 395 }, /* Profile 21. */ }, .profile_cnt = 22, }, -};static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_data, +}; +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 1, + .profile_bmp[0] = 0x3ffffc, + }; -static shr_enum_map_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_names[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +static shr_enum_map_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reason_names[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT }; -static bcmpkt_flex_reasons_info_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_names, - .reason_encode = bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_encode, - .reason_decode = bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_decode, +static bcmpkt_flex_reasons_info_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reason_names, + .reason_encode = bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reason_decode, }; @@ -1663,7 +1667,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_arp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_arp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_get, bcmpkt_arp_t_hardware_type_get, bcmpkt_arp_t_operation_get, @@ -1675,7 +1679,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_arp_t_fget[BCM56780_A0_HNA_6_ bcmpkt_arp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_arp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_arp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_set, bcmpkt_arp_t_hardware_type_set, bcmpkt_arp_t_operation_set, @@ -1687,13 +1691,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_arp_t_fset[BCM56780_A0_HNA_6_ bcmpkt_arp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_arp_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_arp_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_arp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_arp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_arp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_arp_t_field_data, }; @@ -1790,7 +1794,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_authen_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_authen_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_get, bcmpkt_authen_t_next_header_get, bcmpkt_authen_t_payload_len_get, @@ -1799,7 +1803,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_authen_t_fget[BCM56780_A0_HNA bcmpkt_authen_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_authen_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_authen_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_set, bcmpkt_authen_t_next_header_set, bcmpkt_authen_t_payload_len_set, @@ -1808,13 +1812,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_authen_t_fset[BCM56780_A0_HNA bcmpkt_authen_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_authen_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_authen_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_authen_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_authen_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_authen_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_authen_t_field_data, }; @@ -2063,7 +2067,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_bfd_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_bfd_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_get, bcmpkt_bfd_t_bfd_length_get, bcmpkt_bfd_t_cpi_get, @@ -2082,7 +2086,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_bfd_t_fget[BCM56780_A0_HNA_6_ bcmpkt_bfd_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_bfd_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_bfd_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_set, bcmpkt_bfd_t_bfd_length_set, bcmpkt_bfd_t_cpi_set, @@ -2101,13 +2105,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_bfd_t_fset[BCM56780_A0_HNA_6_ bcmpkt_bfd_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_bfd_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_bfd_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_bfd_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_bfd_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_bfd_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_bfd_t_field_data, }; @@ -2141,23 +2145,23 @@ static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_cntag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_cntag_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_get, bcmpkt_cntag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_cntag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_cntag_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_set, bcmpkt_cntag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_cntag_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_cntag_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_cntag_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_cntag_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_cntag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_cntag_t_field_data, }; @@ -2273,7 +2277,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_get, bcmpkt_cpu_composites_0_t_dma_cont1_get, bcmpkt_cpu_composites_0_t_dma_cont2_get, @@ -2283,7 +2287,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fget[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_set, bcmpkt_cpu_composites_0_t_dma_cont1_set, bcmpkt_cpu_composites_0_t_dma_cont2_set, @@ -2293,13 +2297,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fset[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_data, }; @@ -2479,7 +2483,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_get, bcmpkt_cpu_composites_1_t_dma_cont11_get, bcmpkt_cpu_composites_1_t_dma_cont12_get, @@ -2493,7 +2497,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fget[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_set, bcmpkt_cpu_composites_1_t_dma_cont11_set, bcmpkt_cpu_composites_1_t_dma_cont12_set, @@ -2507,13 +2511,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fset[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_data, }; @@ -2563,25 +2567,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_dest_option_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_dest_option_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_get, bcmpkt_dest_option_t_next_header_get, bcmpkt_dest_option_t_option_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_dest_option_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_dest_option_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_set, bcmpkt_dest_option_t_next_header_set, bcmpkt_dest_option_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_dest_option_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_dest_option_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_dest_option_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_dest_option_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_dest_option_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_dest_option_t_field_data, }; @@ -2767,7 +2771,7 @@ static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_get, bcmpkt_ep_nih_header_t_header_type_get, bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, @@ -2782,7 +2786,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fget[BCM56780 bcmpkt_ep_nih_header_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_set, bcmpkt_ep_nih_header_t_header_type_set, bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, @@ -2797,13 +2801,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fset[BCM56780 bcmpkt_ep_nih_header_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_field_data, }; @@ -2943,7 +2947,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_get, bcmpkt_erspan3_fixed_hdr_t_cos_get, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, @@ -2955,7 +2959,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fget[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_set, bcmpkt_erspan3_fixed_hdr_t_cos_set, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, @@ -2967,13 +2971,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fset[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data, }; @@ -3038,27 +3042,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_get, bcmpkt_erspan3_subhdr_5_t_port_id_get, bcmpkt_erspan3_subhdr_5_t_switch_id_get, bcmpkt_erspan3_subhdr_5_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_set, bcmpkt_erspan3_subhdr_5_t_port_id_set, bcmpkt_erspan3_subhdr_5_t_switch_id_set, bcmpkt_erspan3_subhdr_5_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_data, }; @@ -3139,7 +3143,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_esp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_esp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_get, bcmpkt_esp_t_pad_get, bcmpkt_esp_t_pad_len_get, @@ -3147,7 +3151,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_esp_t_fget[BCM56780_A0_HNA_6_ bcmpkt_esp_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_esp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_esp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_set, bcmpkt_esp_t_pad_set, bcmpkt_esp_t_pad_len_set, @@ -3155,13 +3159,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_esp_t_fset[BCM56780_A0_HNA_6_ bcmpkt_esp_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_esp_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_esp_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_esp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_esp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_esp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_esp_t_field_data, }; @@ -3196,23 +3200,23 @@ static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_etag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_etag_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT] = { bcmpkt_etag_t_tag_get, bcmpkt_etag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_etag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_etag_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT] = { bcmpkt_etag_t_tag_set, bcmpkt_etag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_etag_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_etag_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_etag_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_etag_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_etag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_etag_t_field_data, }; @@ -3231,21 +3235,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ethertype_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ethertype_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ethertype_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ethertype_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ethertype_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ethertype_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ethertype_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_ethertype_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ethertype_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_ethertype_t_field_data, }; @@ -3310,27 +3314,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_frag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_frag_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_get, bcmpkt_frag_t_id_get, bcmpkt_frag_t_next_header_get, bcmpkt_frag_t_reserved_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_frag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_frag_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_set, bcmpkt_frag_t_id_set, bcmpkt_frag_t_next_header_set, bcmpkt_frag_t_reserved_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_frag_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_frag_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_frag_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_frag_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_frag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_frag_t_field_data, }; @@ -3559,7 +3563,7 @@ static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_get, bcmpkt_generic_loopback_t_destination_type_get, bcmpkt_generic_loopback_t_entropy_obj_get, @@ -3577,7 +3581,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fget[BCM56 bcmpkt_generic_loopback_t_svp_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_set, bcmpkt_generic_loopback_t_destination_type_set, bcmpkt_generic_loopback_t_entropy_obj_set, @@ -3595,13 +3599,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fset[BCM56 bcmpkt_generic_loopback_t_svp_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_field_data, }; @@ -3680,7 +3684,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gpe_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_gpe_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_get, bcmpkt_gpe_t_next_protocol_get, bcmpkt_gpe_t_reserved0_get, @@ -3688,7 +3692,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gpe_t_fget[BCM56780_A0_HNA_6_ bcmpkt_gpe_t_vni_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gpe_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_gpe_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_set, bcmpkt_gpe_t_next_protocol_set, bcmpkt_gpe_t_reserved0_set, @@ -3696,13 +3700,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gpe_t_fset[BCM56780_A0_HNA_6_ bcmpkt_gpe_t_vni_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gpe_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_gpe_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gpe_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_gpe_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_gpe_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_gpe_t_field_data, }; @@ -3736,23 +3740,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_get, bcmpkt_gre_chksum_t_offset_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_set, bcmpkt_gre_chksum_t_offset_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_field_data, }; @@ -3772,21 +3776,21 @@ static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_key_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_gre_key_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_key_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_gre_key_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_key_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_gre_key_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_key_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_gre_key_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_gre_key_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_gre_key_t_field_data, }; @@ -3806,21 +3810,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_field_data, }; @@ -3840,21 +3844,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_field_data, }; @@ -3918,27 +3922,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_gre_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_get, bcmpkt_gre_t_protocol_get, bcmpkt_gre_t_reserved_get, bcmpkt_gre_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_gre_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_set, bcmpkt_gre_t_protocol_set, bcmpkt_gre_t_reserved_set, bcmpkt_gre_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_gre_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_gre_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_gre_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_gre_t_field_data, }; @@ -3988,25 +3992,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_get, bcmpkt_hop_by_hop_t_next_header_get, bcmpkt_hop_by_hop_t_option_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_set, bcmpkt_hop_by_hop_t_next_header_set, bcmpkt_hop_by_hop_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_field_data, }; @@ -4055,25 +4059,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_icmp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_icmp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_get, bcmpkt_icmp_t_code_get, bcmpkt_icmp_t_icmp_type_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_icmp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_icmp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_set, bcmpkt_icmp_t_code_set, bcmpkt_icmp_t_icmp_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_icmp_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_icmp_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_icmp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_icmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_icmp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_icmp_t_field_data, }; @@ -4107,23 +4111,23 @@ static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int pr return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_data, }; @@ -4187,27 +4191,27 @@ static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_b_t_cn_get, bcmpkt_ifa_flex_md_0_b_t_port_speed_get, bcmpkt_ifa_flex_md_0_b_t_queue_id_get, bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_b_t_cn_set, bcmpkt_ifa_flex_md_0_b_t_port_speed_set, bcmpkt_ifa_flex_md_0_b_t_queue_id_set, bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_data, }; @@ -4257,25 +4261,25 @@ static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { bcmpkt_ifa_flex_md_1_t_egress_port_id_get, bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { bcmpkt_ifa_flex_md_1_t_egress_port_id_set, bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_data, }; @@ -4311,23 +4315,23 @@ static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, in return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_data, }; @@ -4363,23 +4367,23 @@ static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_data, }; @@ -4458,7 +4462,7 @@ static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { bcmpkt_ifa_header_t_flags_get, bcmpkt_ifa_header_t_gns_get, bcmpkt_ifa_header_t_max_length_get, @@ -4466,7 +4470,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fget[BCM56780_A0 bcmpkt_ifa_header_t_ver_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { bcmpkt_ifa_header_t_flags_set, bcmpkt_ifa_header_t_gns_set, bcmpkt_ifa_header_t_max_length_set, @@ -4474,13 +4478,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fset[BCM56780_A0 bcmpkt_ifa_header_t_ver_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_field_data, }; @@ -4529,25 +4533,25 @@ static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { bcmpkt_ifa_md_base_t_action_vector_get, bcmpkt_ifa_md_base_t_hop_limit_current_length_get, bcmpkt_ifa_md_base_t_request_vector_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { bcmpkt_ifa_md_base_t_action_vector_set, bcmpkt_ifa_md_base_t_hop_limit_current_length_set, bcmpkt_ifa_md_base_t_request_vector_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_field_data, }; @@ -4612,27 +4616,27 @@ static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { bcmpkt_ifa_metadata_t_action_vector_get, bcmpkt_ifa_metadata_t_hop_limit_current_length_get, bcmpkt_ifa_metadata_t_metadata_get, bcmpkt_ifa_metadata_t_request_vector_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { bcmpkt_ifa_metadata_t_action_vector_set, bcmpkt_ifa_metadata_t_hop_limit_current_length_set, bcmpkt_ifa_metadata_t_metadata_set, bcmpkt_ifa_metadata_t_request_vector_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_field_data, }; @@ -4697,27 +4701,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_igmp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_igmp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_get, bcmpkt_igmp_t_group_address_get, bcmpkt_igmp_t_igmp_type_get, bcmpkt_igmp_t_max_resp_time_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_igmp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_igmp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_set, bcmpkt_igmp_t_group_address_set, bcmpkt_igmp_t_igmp_type_set, bcmpkt_igmp_t_max_resp_time_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_igmp_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_igmp_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_igmp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_igmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_igmp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_igmp_t_field_data, }; @@ -4799,7 +4803,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ipfix_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_get, bcmpkt_ipfix_t_length_get, bcmpkt_ipfix_t_obs_domain_id_get, @@ -4807,7 +4811,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fget[BCM56780_A0_HNA_ bcmpkt_ipfix_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ipfix_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_set, bcmpkt_ipfix_t_length_set, bcmpkt_ipfix_t_obs_domain_id_set, @@ -4815,13 +4819,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fset[BCM56780_A0_HNA_ bcmpkt_ipfix_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ipfix_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ipfix_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ipfix_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_ipfix_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ipfix_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_ipfix_t_field_data, }; @@ -4993,7 +4997,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ipv4_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_get, bcmpkt_ipv4_t_flags_frag_offset_get, bcmpkt_ipv4_t_hdr_checksum_get, @@ -5007,7 +5011,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fget[BCM56780_A0_HNA_6 bcmpkt_ipv4_t_version_hdr_len_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ipv4_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_set, bcmpkt_ipv4_t_flags_frag_offset_set, bcmpkt_ipv4_t_hdr_checksum_set, @@ -5021,13 +5025,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fset[BCM56780_A0_HNA_6 bcmpkt_ipv4_t_version_hdr_len_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ipv4_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ipv4_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ipv4_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_ipv4_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ipv4_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_ipv4_t_field_data, }; @@ -5153,7 +5157,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ipv6_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_get, bcmpkt_ipv6_t_flow_label_get, bcmpkt_ipv6_t_hop_limit_get, @@ -5164,7 +5168,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fget[BCM56780_A0_HNA_6 bcmpkt_ipv6_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ipv6_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_set, bcmpkt_ipv6_t_flow_label_set, bcmpkt_ipv6_t_hop_limit_set, @@ -5175,13 +5179,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fset[BCM56780_A0_HNA_6 bcmpkt_ipv6_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ipv6_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ipv6_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ipv6_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_ipv6_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ipv6_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_ipv6_t_field_data, }; @@ -5217,23 +5221,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_l2_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_l2_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_get, bcmpkt_l2_t_macsa_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_l2_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_l2_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_set, bcmpkt_l2_t_macsa_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_l2_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_l2_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_l2_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_l2_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_l2_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_l2_t_field_data, }; @@ -5253,21 +5257,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_data, }; @@ -5287,21 +5291,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_field_data, }; @@ -5365,27 +5369,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_get, bcmpkt_mpls_ach_t_cw_type_get, bcmpkt_mpls_ach_t_reserved_get, bcmpkt_mpls_ach_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_set, bcmpkt_mpls_ach_t_cw_type_set, bcmpkt_mpls_ach_t_reserved_set, bcmpkt_mpls_ach_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_field_data, }; @@ -5405,21 +5409,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_field_data, }; @@ -5468,25 +5472,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_get, bcmpkt_mpls_cw_t_reserved_get, bcmpkt_mpls_cw_t_seq_number_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_set, bcmpkt_mpls_cw_t_reserved_set, bcmpkt_mpls_cw_t_seq_number_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_field_data, }; @@ -5550,27 +5554,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mpls_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_mpls_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_get, bcmpkt_mpls_t_exp_get, bcmpkt_mpls_t_label_get, bcmpkt_mpls_t_ttl_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mpls_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_mpls_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_set, bcmpkt_mpls_t_exp_set, bcmpkt_mpls_t_label_set, bcmpkt_mpls_t_ttl_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mpls_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_mpls_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mpls_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_mpls_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_mpls_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_mpls_t_field_data, }; @@ -5787,7 +5791,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_p_1588_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_get, bcmpkt_p_1588_t_correction_get, bcmpkt_p_1588_t_domain_nb_get, @@ -5804,7 +5808,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fget[BCM56780_A0_HNA bcmpkt_p_1588_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_p_1588_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_set, bcmpkt_p_1588_t_correction_set, bcmpkt_p_1588_t_domain_nb_set, @@ -5821,13 +5825,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fset[BCM56780_A0_HNA bcmpkt_p_1588_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_p_1588_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_p_1588_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_p_1588_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_p_1588_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_p_1588_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_p_1588_t_field_data, }; @@ -5877,25 +5881,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, bcmpkt_prog_ext_hdr_t_next_header_get, bcmpkt_prog_ext_hdr_t_option_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, bcmpkt_prog_ext_hdr_t_next_header_set, bcmpkt_prog_ext_hdr_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_data, }; @@ -5991,7 +5995,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_get, bcmpkt_psamp_0_t_length_get, bcmpkt_psamp_0_t_next_hop_index_get, @@ -6000,7 +6004,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fget[BCM56780_A0_HN bcmpkt_psamp_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_set, bcmpkt_psamp_0_t_length_set, bcmpkt_psamp_0_t_next_hop_index_set, @@ -6009,13 +6013,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fset[BCM56780_A0_HN bcmpkt_psamp_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_field_data, }; @@ -6124,7 +6128,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_get, bcmpkt_psamp_1_t_egress_port_get, bcmpkt_psamp_1_t_epoch_get, @@ -6134,7 +6138,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fget[BCM56780_A0_HN bcmpkt_psamp_1_t_variable_flag_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_set, bcmpkt_psamp_1_t_egress_port_set, bcmpkt_psamp_1_t_epoch_set, @@ -6144,13 +6148,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fset[BCM56780_A0_HN bcmpkt_psamp_1_t_variable_flag_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_field_data, }; @@ -6262,7 +6266,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, bcmpkt_psamp_mirror_on_drop_0_t_length_get, @@ -6272,7 +6276,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fget bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, bcmpkt_psamp_mirror_on_drop_0_t_length_set, @@ -6282,13 +6286,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fset bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data, }; @@ -6397,7 +6401,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *d return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, @@ -6407,7 +6411,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fget bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, @@ -6417,13 +6421,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fset bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_data, }; @@ -6566,7 +6570,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_rarp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_rarp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_get, bcmpkt_rarp_t_hardware_type_get, bcmpkt_rarp_t_operation_get, @@ -6578,7 +6582,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_rarp_t_fget[BCM56780_A0_HNA_6 bcmpkt_rarp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_rarp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_rarp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_set, bcmpkt_rarp_t_hardware_type_set, bcmpkt_rarp_t_operation_set, @@ -6590,13 +6594,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_rarp_t_fset[BCM56780_A0_HNA_6 bcmpkt_rarp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rarp_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_rarp_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_rarp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_rarp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_rarp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_rarp_t_field_data, }; @@ -6676,7 +6680,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_routing_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_routing_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_get, bcmpkt_routing_t_hdr_ext_len_get, bcmpkt_routing_t_next_header_get, @@ -6684,7 +6688,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_routing_t_fget[BCM56780_A0_HN bcmpkt_routing_t_segments_left_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_routing_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_routing_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_set, bcmpkt_routing_t_hdr_ext_len_set, bcmpkt_routing_t_next_header_set, @@ -6692,13 +6696,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_routing_t_fset[BCM56780_A0_HN bcmpkt_routing_t_segments_left_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_routing_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_routing_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_routing_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_routing_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_routing_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_routing_t_field_data, }; @@ -6732,23 +6736,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_rspan_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_rspan_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_get, bcmpkt_rspan_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_rspan_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_rspan_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_set, bcmpkt_rspan_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rspan_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_rspan_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_rspan_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_rspan_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_rspan_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_rspan_t_field_data, }; @@ -6798,25 +6802,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_get, bcmpkt_sflow_shim_0_t_sys_source_get, bcmpkt_sflow_shim_0_t_version_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_set, bcmpkt_sflow_shim_0_t_sys_source_set, bcmpkt_sflow_shim_0_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_data, }; @@ -6940,7 +6944,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_get, bcmpkt_sflow_shim_1_t_flag_discarded_get, bcmpkt_sflow_shim_1_t_flag_flex_sample_get, @@ -6951,7 +6955,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fget[BCM56780_ bcmpkt_sflow_shim_1_t_sys_opcode_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_set, bcmpkt_sflow_shim_1_t_flag_discarded_set, bcmpkt_sflow_shim_1_t_flag_flex_sample_set, @@ -6962,13 +6966,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fset[BCM56780_ bcmpkt_sflow_shim_1_t_sys_opcode_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_data, }; @@ -7003,23 +7007,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_get, bcmpkt_sflow_shim_2_t_user_meta_data_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_set, bcmpkt_sflow_shim_2_t_user_meta_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_data, }; @@ -7054,23 +7058,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_get, bcmpkt_snap_llc_t_snap_llc_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_set, bcmpkt_snap_llc_t_snap_llc_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_field_data, }; @@ -7104,23 +7108,23 @@ static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_svtag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_svtag_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FID_COUNT] = { bcmpkt_svtag_t_data_lwr_get, bcmpkt_svtag_t_data_upr_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_svtag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_svtag_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FID_COUNT] = { bcmpkt_svtag_t_data_lwr_set, bcmpkt_svtag_t_data_upr_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_svtag_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_svtag_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_svtag_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_svtag_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_svtag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_svtag_t_field_data, }; @@ -7154,23 +7158,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_get, bcmpkt_tcp_first_4bytes_t_src_port_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_set, bcmpkt_tcp_first_4bytes_t_src_port_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_data, }; @@ -7266,7 +7270,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_get, bcmpkt_tcp_last_16bytes_t_checksum_get, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, @@ -7275,7 +7279,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fget[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_set, bcmpkt_tcp_last_16bytes_t_checksum_set, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, @@ -7284,13 +7288,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fset[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_data, }; @@ -7354,27 +7358,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_udp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_udp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_get, bcmpkt_udp_t_dst_port_get, bcmpkt_udp_t_src_port_get, bcmpkt_udp_t_udp_length_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_udp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_udp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_set, bcmpkt_udp_t_dst_port_set, bcmpkt_udp_t_src_port_set, bcmpkt_udp_t_udp_length_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_udp_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_udp_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_udp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_udp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_udp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_udp_t_field_data, }; @@ -7410,23 +7414,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_field_data, }; @@ -7446,21 +7450,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_field_data, }; @@ -7510,25 +7514,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_get, bcmpkt_unknown_l5_t_l5_bytes_2_3_get, bcmpkt_unknown_l5_t_l5_bytes_4_7_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_set, bcmpkt_unknown_l5_t_l5_bytes_2_3_set, bcmpkt_unknown_l5_t_l5_bytes_4_7_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_field_data, }; @@ -7592,27 +7596,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_vlan_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_vlan_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_get, bcmpkt_vlan_t_pcp_get, bcmpkt_vlan_t_tpid_get, bcmpkt_vlan_t_vid_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_vlan_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_vlan_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_set, bcmpkt_vlan_t_pcp_set, bcmpkt_vlan_t_tpid_set, bcmpkt_vlan_t_vid_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_vlan_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_vlan_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_vlan_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_vlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_vlan_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_vlan_t_field_data, }; @@ -7647,23 +7651,23 @@ static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_vntag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_vntag_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT] = { bcmpkt_vntag_t_tag_get, bcmpkt_vntag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_vntag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_vntag_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT] = { bcmpkt_vntag_t_tag_set, bcmpkt_vntag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_vntag_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_vntag_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_vntag_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_vntag_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_vntag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_vntag_t_field_data, }; @@ -7713,25 +7717,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_vxlan_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_vxlan_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_get, bcmpkt_vxlan_t_reserved2_get, bcmpkt_vxlan_t_vn_id_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_vxlan_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_vxlan_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_set, bcmpkt_vxlan_t_reserved2_set, bcmpkt_vxlan_t_vn_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_vxlan_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_vxlan_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_vxlan_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_vxlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_vxlan_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_vxlan_t_field_data, }; @@ -7843,7 +7847,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_wesp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_wesp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_get, bcmpkt_wesp_t_header_len_get, bcmpkt_wesp_t_next_header_get, @@ -7853,7 +7857,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_wesp_t_fget[BCM56780_A0_HNA_6 bcmpkt_wesp_t_wesp_iv_get, }; -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_wesp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_wesp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_set, bcmpkt_wesp_t_header_len_set, bcmpkt_wesp_t_next_header_set, @@ -7863,506 +7867,506 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_wesp_t_fset[BCM56780_A0_HNA_6 bcmpkt_wesp_t_wesp_iv_set, }; -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_wesp_t_field_data[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_wesp_t_field_data[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_wesp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_30_6_0_wesp_t_field_data, +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_wesp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_31_3_0_wesp_t_field_data, }; -static bcmpkt_flex_pmd_info_t bcm56780_a0_hna_6_5_30_6_0_flexhdr_info_list[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_COUNT] = { +static bcmpkt_flex_pmd_info_t bcm56780_a0_hna_6_5_31_3_0_flexhdr_info_list[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT] = { { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_arp_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_arp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_arp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_arp_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_arp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_arp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_authen_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_authen_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_authen_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_authen_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_authen_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_authen_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_bfd_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_bfd_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_bfd_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_bfd_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_bfd_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_bfd_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_cntag_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_cntag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_cntag_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_cntag_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_cntag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_cntag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_dest_option_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_dest_option_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_dest_option_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_dest_option_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_dest_option_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_dest_option_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_esp_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_esp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_esp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_esp_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_esp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_esp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_etag_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_etag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_etag_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_etag_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_etag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_etag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_ethertype_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_ethertype_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ethertype_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ethertype_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ethertype_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ethertype_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_frag_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_frag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_frag_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_frag_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_frag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_frag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_gpe_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_gpe_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gpe_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gpe_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_gpe_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_gpe_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_key_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_gre_key_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_key_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_key_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_gre_key_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_gre_key_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_gre_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_gre_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_gre_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_icmp_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_icmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_icmp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_icmp_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_icmp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_icmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_igmp_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_igmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_igmp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_igmp_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_igmp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_igmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_ipfix_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_ipfix_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ipfix_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ipfix_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_ipv4_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_ipv4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ipv4_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ipv4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_ipv6_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_ipv6_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ipv6_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ipv6_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_l2_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_l2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_l2_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_l2_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_l2_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_l2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_mpls_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_mpls_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mpls_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mpls_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_mpls_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_mpls_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_p_1588_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_p_1588_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_p_1588_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_p_1588_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_rarp_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_rarp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_rarp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_rarp_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_rarp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_rarp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_routing_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_routing_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_routing_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_routing_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_routing_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_routing_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_rspan_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_rspan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_rspan_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_rspan_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_rspan_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_rspan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_svtag_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_svtag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_svtag_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_svtag_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_svtag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_svtag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_udp_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_udp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_udp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_udp_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_udp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_udp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_vlan_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_vlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_vlan_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_vlan_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_vlan_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_vlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_vntag_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_vntag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_vntag_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_vntag_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_vntag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_vntag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_vxlan_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_vxlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_vxlan_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_vxlan_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_vxlan_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_vxlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_wesp_t_field_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_wesp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_30_6_0_wesp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_30_6_0_wesp_t_fset, + .flex_fget = bcm56780_a0_hna_6_5_31_3_0_wesp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_31_3_0_wesp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_info, - .reasons_info = &bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reasons_info, + .field_info = &bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_field_info, + .reasons_info = &bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reasons_info, .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, }, }; -static shr_enum_map_t bcm56780_a0_hna_6_5_30_6_0_flexhdr_id_map[] = { - BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +static shr_enum_map_t bcm56780_a0_hna_6_5_31_3_0_flexhdr_id_map[] = { + BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT }; -shr_enum_map_t * bcm56780_a0_hna_6_5_30_6_0_flexhdr_map_get(void) +shr_enum_map_t * bcm56780_a0_hna_6_5_31_3_0_flexhdr_map_get(void) { - return bcm56780_a0_hna_6_5_30_6_0_flexhdr_id_map; + return bcm56780_a0_hna_6_5_31_3_0_flexhdr_id_map; } -bcmpkt_flex_pmd_info_t * bcm56780_a0_hna_6_5_30_6_0_flex_pmd_info_get(uint32_t hid) +bcmpkt_flex_pmd_info_t * bcm56780_a0_hna_6_5_31_3_0_flex_pmd_info_get(uint32_t hid) { - if (hid >= BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_COUNT) { + if (hid >= BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT) { return NULL; } - return &bcm56780_a0_hna_6_5_30_6_0_flexhdr_info_list[hid]; + return &bcm56780_a0_hna_6_5_31_3_0_flexhdr_info_list[hid]; } -int bcm56780_a0_hna_6_5_30_6_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { +int bcm56780_a0_hna_6_5_31_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { 14, -1, -1, diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c similarity index 83% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c index 1be0c5ede9c..0c419122f5a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c @@ -2,8 +2,8 @@ * * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56880_a0_dna_6_5_30_1_1_sf_match_id_info.yml - * for device bcm56880_a0 and variant dna_6_5_30_1_1. + * from the NPL output file(s) bcm56880_a0_dna_6_5_31_6_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant dna_6_5_31_6_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -29,13 +29,13 @@ #include -#include +#include static bcmpkt_rxpmd_match_id_db_t -bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT] = { +bcm56880_a0_dna_6_5_31_6_0_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_COUNT] = { { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", .match = 0x80, .match_mask = 0xc0, @@ -49,7 +49,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", .match = 0x2, .match_mask = 0x2, @@ -63,7 +63,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", .match = 0x8, .match_mask = 0x8, @@ -77,7 +77,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", .match = 0x20, .match_mask = 0x20, @@ -91,7 +91,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ .name = "EGRESS_PKT_FWD_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -105,7 +105,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ .name = "EGRESS_PKT_FWD_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -119,7 +119,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", .match = 0x10, .match_mask = 0x10, @@ -133,7 +133,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -147,7 +147,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", .match = 0x40, .match_mask = 0xc0, @@ -161,7 +161,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -175,7 +175,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -189,7 +189,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -203,7 +203,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -217,7 +217,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -231,7 +231,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -245,7 +245,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -259,7 +259,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -273,7 +273,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", .match = 0x1830, .match_mask = 0x3870, @@ -287,7 +287,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", .match = 0x2, .match_mask = 0x42, @@ -301,7 +301,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", .match = 0x202, .match_mask = 0x642, @@ -315,7 +315,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", .match = 0x1000, .match_mask = 0x3800, @@ -329,7 +329,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", .match = 0x82, .match_mask = 0x1c2, @@ -343,7 +343,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", .match = 0x12, .match_mask = 0x72, @@ -357,7 +357,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -371,7 +371,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -385,7 +385,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -399,7 +399,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -413,7 +413,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -427,7 +427,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -441,7 +441,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -455,7 +455,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -469,7 +469,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -483,7 +483,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -497,7 +497,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -511,7 +511,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -525,7 +525,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -539,7 +539,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -553,7 +553,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -567,7 +567,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -581,7 +581,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -595,7 +595,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -609,7 +609,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -623,7 +623,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -637,7 +637,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -651,7 +651,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -665,7 +665,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -679,7 +679,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", .match = 0x830, .match_mask = 0x3870, @@ -693,7 +693,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x1, @@ -707,7 +707,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ .name = "EGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x1, @@ -721,7 +721,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", .match = 0x80, .match_mask = 0xc0, @@ -735,7 +735,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", .match = 0x2, .match_mask = 0x2, @@ -749,7 +749,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", .match = 0x8, .match_mask = 0x8, @@ -763,7 +763,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", .match = 0x20, .match_mask = 0x20, @@ -777,7 +777,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -791,7 +791,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -805,7 +805,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", .match = 0x10, .match_mask = 0x10, @@ -819,7 +819,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -833,7 +833,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", .match = 0x40, .match_mask = 0xc0, @@ -847,7 +847,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -861,7 +861,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -875,7 +875,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -889,7 +889,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -903,7 +903,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -917,7 +917,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -931,7 +931,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -945,7 +945,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -959,7 +959,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", .match = 0x1830, .match_mask = 0x3870, @@ -973,7 +973,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", .match = 0x2, .match_mask = 0x42, @@ -987,7 +987,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", .match = 0x202, .match_mask = 0x642, @@ -1001,7 +1001,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", .match = 0x1000, .match_mask = 0x3800, @@ -1015,7 +1015,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", .match = 0x82, .match_mask = 0x1c2, @@ -1029,7 +1029,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", .match = 0x12, .match_mask = 0x72, @@ -1043,7 +1043,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -1057,7 +1057,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -1071,7 +1071,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -1085,7 +1085,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -1099,7 +1099,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -1113,7 +1113,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -1127,7 +1127,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -1141,7 +1141,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -1155,7 +1155,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -1169,7 +1169,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -1183,7 +1183,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -1197,7 +1197,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -1211,7 +1211,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -1225,7 +1225,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -1239,7 +1239,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -1253,7 +1253,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -1267,7 +1267,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -1281,7 +1281,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -1295,7 +1295,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -1309,7 +1309,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -1323,7 +1323,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -1337,7 +1337,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -1351,7 +1351,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -1365,7 +1365,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", .match = 0x830, .match_mask = 0x3870, @@ -1379,7 +1379,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", .match = 0x80, .match_mask = 0xc0, @@ -1393,7 +1393,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", .match = 0x20, .match_mask = 0x20, @@ -1407,7 +1407,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ .name = "INGRESS_PKT_INNER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -1421,7 +1421,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ .name = "INGRESS_PKT_INNER_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -1435,7 +1435,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", .match = 0x10, .match_mask = 0x10, @@ -1449,7 +1449,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -1463,7 +1463,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", .match = 0x40, .match_mask = 0xc0, @@ -1477,7 +1477,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -1491,7 +1491,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -1505,7 +1505,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -1519,7 +1519,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -1533,7 +1533,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -1547,7 +1547,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -1561,7 +1561,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -1575,7 +1575,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -1589,7 +1589,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -1603,7 +1603,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -1617,7 +1617,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -1631,7 +1631,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -1645,7 +1645,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -1659,7 +1659,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -1673,7 +1673,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -1687,7 +1687,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -1701,7 +1701,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -1715,7 +1715,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -1729,7 +1729,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -1743,7 +1743,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -1757,7 +1757,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -1771,7 +1771,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -1785,7 +1785,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", .match = 0x80, .match_mask = 0xc0, @@ -1799,7 +1799,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", .match = 0x2, .match_mask = 0x2, @@ -1813,7 +1813,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", .match = 0x8, .match_mask = 0x8, @@ -1827,7 +1827,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", .match = 0x20, .match_mask = 0x20, @@ -1841,7 +1841,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ .name = "INGRESS_PKT_OUTER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -1855,7 +1855,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -1869,7 +1869,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", .match = 0x10, .match_mask = 0x10, @@ -1883,7 +1883,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -1897,7 +1897,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", .match = 0x40, .match_mask = 0xc0, @@ -1911,7 +1911,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -1925,7 +1925,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -1939,7 +1939,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -1953,7 +1953,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -1967,7 +1967,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -1981,7 +1981,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -1995,7 +1995,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -2009,7 +2009,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -2023,7 +2023,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", .match = 0x1830, .match_mask = 0x3870, @@ -2037,7 +2037,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", .match = 0x2, .match_mask = 0x42, @@ -2051,7 +2051,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", .match = 0x202, .match_mask = 0x642, @@ -2065,7 +2065,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", .match = 0x1000, .match_mask = 0x3800, @@ -2079,7 +2079,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", .match = 0x82, .match_mask = 0x1c2, @@ -2093,7 +2093,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", .match = 0x12, .match_mask = 0x72, @@ -2107,7 +2107,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -2121,7 +2121,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -2135,7 +2135,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -2149,7 +2149,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -2163,7 +2163,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -2177,7 +2177,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -2191,7 +2191,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -2205,7 +2205,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -2219,7 +2219,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -2233,7 +2233,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -2247,7 +2247,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -2261,7 +2261,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -2275,7 +2275,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -2289,7 +2289,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -2303,7 +2303,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -2317,7 +2317,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -2331,7 +2331,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -2345,7 +2345,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -2359,7 +2359,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -2373,7 +2373,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -2387,7 +2387,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -2401,7 +2401,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -2415,7 +2415,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -2429,7 +2429,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", .match = 0x830, .match_mask = 0x3870, @@ -2443,7 +2443,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x1, @@ -2457,7 +2457,7 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + /* BCM56880_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ .name = "INGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x1, @@ -2472,23 +2472,23 @@ bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MA }, }; -static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db_info = { +static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_dna_6_5_31_6_0_rxpmd_match_id_db_info = { .num_entries = 174, - .db = bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db + .db = bcm56880_a0_dna_6_5_31_6_0_rxpmd_match_id_db }; -bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db_info_get(void) { - return &bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db_info; +bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_dna_6_5_31_6_0_rxpmd_match_id_db_info_get(void) { + return &bcm56880_a0_dna_6_5_31_6_0_rxpmd_match_id_db_info; } -static shr_enum_map_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +static shr_enum_map_t bcm56880_a0_dna_6_5_31_6_0_rxpmd_match_id_map[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT }; -static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map_info = { +static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_dna_6_5_31_6_0_rxpmd_match_id_map_info = { .num_entries = 174, - .map = bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map + .map = bcm56880_a0_dna_6_5_31_6_0_rxpmd_match_id_map }; -bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map_info_get(void) { - return &bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map_info; +bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_dna_6_5_31_6_0_rxpmd_match_id_map_info_get(void) { + return &bcm56880_a0_dna_6_5_31_6_0_rxpmd_match_id_map_info; } diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_pkt_flexhdr.c similarity index 72% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_pkt_flexhdr.c index 5ecea72ca06..c74f3da18a7 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_pkt_flexhdr.c @@ -3,7 +3,7 @@ * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser * from the NPL output file(s) map.yml - * for device bcm56880_a0 and variant dna_6_5_30_1_1. + * for device bcm56880_a0 and variant dna_6_5_31_6_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -31,292 +31,296 @@ #include #include #include -#include -#include -#include +#include +#include +#include #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -static void bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +static void bcm56880_a0_dna_6_5_31_6_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) { uint32_t *reason = data + 0; if (reason[12] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); } if (reason[12] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); } if (reason[12] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); } if (reason[12] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); } if (reason[12] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); } if (reason[12] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); } if (reason[12] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); } if (reason[12] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); } if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); } if (reason[12] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); } if (reason[12] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); } if (reason[12] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); } if (reason[12] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); } if (reason[12] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); } if (reason[12] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); } if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); } if (reason[12] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); } if (reason[12] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP); } if (reason[12] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP); } if (reason[12] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); } if (reason[12] & (0x1 << 20)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); } if (reason[12] & (0x1 << 21)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP); } if (reason[12] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); } if (reason[12] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); } if (reason[12] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); } if (reason[12] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); } if (reason[12] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); } if (reason[12] & (0x1 << 27)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); } if (reason[12] & (0x1 << 28)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); } if (reason[12] & (0x1 << 29)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[12] & (0x1 << 30)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[12] & (0x1 << 31)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); } if (reason[11] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); } if (reason[11] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); } if (reason[11] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); } if (reason[11] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); } if (reason[11] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); } if (reason[11] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); } if (reason[11] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); } if (reason[11] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); } if (reason[11] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); } } -static void bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +static void bcm56880_a0_dna_6_5_31_6_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) { uint32_t *reason = data + 0; reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { reason[12] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { reason[12] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { reason[12] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { reason[12] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { reason[12] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { reason[12] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { reason[12] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { reason[12] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { reason[12] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { reason[12] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { reason[12] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { reason[12] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { reason[12] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { reason[12] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { reason[12] |= (0x1 << 14); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { reason[12] |= (0x1 << 15); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { reason[12] |= (0x1 << 16); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { reason[12] |= (0x1 << 17); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { reason[12] |= (0x1 << 18); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { reason[12] |= (0x1 << 19); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { reason[12] |= (0x1 << 20); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { reason[12] |= (0x1 << 21); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { reason[12] |= (0x1 << 22); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { reason[12] |= (0x1 << 23); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { reason[12] |= (0x1 << 24); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { reason[12] |= (0x1 << 25); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { reason[12] |= (0x1 << 26); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { reason[12] |= (0x1 << 27); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { reason[12] |= (0x1 << 28); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[12] |= (0x1 << 29); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[12] |= (0x1 << 30); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { reason[12] |= (0x1 << 31); } reason[11] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { reason[11] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { reason[11] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { reason[11] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { reason[11] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { reason[11] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { reason[11] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { reason[11] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { reason[11] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { reason[11] |= (0x1 << 15); } } -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_data[] = { +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_rxpmd_flex_field_data[] = { { .name = "DLB_ECMP_DESTINATION_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ { 208, 223 }, /* Profile 4. */ - { 208, 223 }, /* Profile 5. */ + { 192, 207 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 208, 223 }, /* Profile 8. */ + { 192, 207 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "DROP_CODE_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -324,75 +328,99 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_ { 48, 63 }, /* Profile 3. */ { 48, 63 }, /* Profile 4. */ { 48, 63 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "DVP_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DVP_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 320, 335 }, /* Profile 2. */ - { 320, 335 }, /* Profile 3. */ - { 320, 335 }, /* Profile 4. */ - { 320, 335 }, /* Profile 5. */ + { 240, 255 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { 224, 239 }, /* Profile 5. */ + { 240, 255 }, /* Profile 6. */ + { 224, 239 }, /* Profile 7. */ + { 240, 255 }, /* Profile 8. */ + { 224, 239 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "EFFECTIVE_TTL_7_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 304, 311 }, /* Profile 2. */ - { 304, 311 }, /* Profile 3. */ - { 304, 311 }, /* Profile 4. */ - { 304, 311 }, /* Profile 5. */ + { 224, 231 }, /* Profile 2. */ + { 208, 215 }, /* Profile 3. */ + { 224, 231 }, /* Profile 4. */ + { 208, 215 }, /* Profile 5. */ + { 224, 231 }, /* Profile 6. */ + { 208, 215 }, /* Profile 7. */ + { 224, 231 }, /* Profile 8. */ + { 208, 215 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 208, 223 }, /* Profile 2. */ - { 208, 223 }, /* Profile 3. */ + { 192, 207 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 208, 223 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ }, - .profile_cnt = 4, + .profile_cnt = 8, }, { .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 376, 379 }, /* Profile 2. */ - { 376, 379 }, /* Profile 3. */ - { 376, 379 }, /* Profile 4. */ - { 376, 379 }, /* Profile 5. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 412, 415 }, /* Profile 6. */ + { 412, 415 }, /* Profile 7. */ + { 412, 415 }, /* Profile 8. */ + { 412, 415 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 272, 287 }, /* Profile 2. */ - { 272, 287 }, /* Profile 3. */ - { 272, 287 }, /* Profile 4. */ - { 272, 287 }, /* Profile 5. */ + { 320, 335 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + { 320, 335 }, /* Profile 6. */ + { 304, 319 }, /* Profile 7. */ + { 320, 335 }, /* Profile 8. */ + { 304, 319 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "EVENT_TRACE_VECTOR_31_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -400,12 +428,16 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_ { 0, 31 }, /* Profile 3. */ { 0, 31 }, /* Profile 4. */ { 0, 31 }, /* Profile 5. */ + { 0, 31 }, /* Profile 6. */ + { 0, 31 }, /* Profile 7. */ + { 0, 31 }, /* Profile 8. */ + { 0, 31 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -413,38 +445,50 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_ { 32, 47 }, /* Profile 3. */ { 32, 47 }, /* Profile 4. */ { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + { 32, 47 }, /* Profile 8. */ + { 32, 47 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "I2E_CLASS_ID_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 192, 207 }, /* Profile 2. */ - { 192, 207 }, /* Profile 3. */ + { 176, 191 }, /* Profile 3. */ { 192, 207 }, /* Profile 4. */ - { 192, 207 }, /* Profile 5. */ + { 176, 191 }, /* Profile 5. */ + { 192, 207 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ + { 192, 207 }, /* Profile 8. */ + { 176, 191 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "IFP_IOAM_GBP_ACTION_3_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 372, 375 }, /* Profile 2. */ - { 372, 375 }, /* Profile 3. */ - { 372, 375 }, /* Profile 4. */ - { 372, 375 }, /* Profile 5. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + { 400, 403 }, /* Profile 6. */ + { 400, 403 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 400, 403 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -452,12 +496,16 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_ { 384, 387 }, /* Profile 3. */ { 384, 387 }, /* Profile 4. */ { 384, 387 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + { 384, 387 }, /* Profile 8. */ + { 384, 387 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "ING_TIMESTAMP_31_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -465,154 +513,202 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_ { 64, 95 }, /* Profile 3. */ { 64, 95 }, /* Profile 4. */ { 64, 95 }, /* Profile 5. */ + { 64, 95 }, /* Profile 6. */ + { 64, 95 }, /* Profile 7. */ + { 64, 95 }, /* Profile 8. */ + { 64, 95 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "INGRESS_PP_PORT_7_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 224, 231 }, /* Profile 2. */ - { 224, 231 }, /* Profile 3. */ - { 224, 231 }, /* Profile 4. */ - { 224, 231 }, /* Profile 5. */ + { 272, 279 }, /* Profile 2. */ + { 256, 263 }, /* Profile 3. */ + { 272, 279 }, /* Profile 4. */ + { 256, 263 }, /* Profile 5. */ + { 272, 279 }, /* Profile 6. */ + { 256, 263 }, /* Profile 7. */ + { 272, 279 }, /* Profile 8. */ + { 256, 263 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 144, 159 }, /* Profile 2. */ - { 160, 175 }, /* Profile 3. */ - { 144, 159 }, /* Profile 4. */ - { 160, 175 }, /* Profile 5. */ + { 352, 367 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 352, 367 }, /* Profile 4. */ + { 336, 351 }, /* Profile 5. */ + { 352, 367 }, /* Profile 6. */ + { 336, 351 }, /* Profile 7. */ + { 352, 367 }, /* Profile 8. */ + { 336, 351 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 408, 411 }, /* Profile 2. */ - { 408, 411 }, /* Profile 3. */ - { 408, 411 }, /* Profile 4. */ - { 408, 411 }, /* Profile 5. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + { 396, 399 }, /* Profile 6. */ + { 396, 399 }, /* Profile 7. */ + { 396, 399 }, /* Profile 8. */ + { 396, 399 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "INT_PRI_3_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 404, 407 }, /* Profile 2. */ - { 404, 407 }, /* Profile 3. */ - { 404, 407 }, /* Profile 4. */ - { 404, 407 }, /* Profile 5. */ + { 372, 375 }, /* Profile 2. */ + { 372, 375 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + { 372, 375 }, /* Profile 6. */ + { 372, 375 }, /* Profile 7. */ + { 372, 375 }, /* Profile 8. */ + { 372, 375 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "L2_IIF_10_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 176, 186 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ { 176, 186 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 176, 186 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 176, 186 }, /* Profile 8. */ }, - .profile_cnt = 5, + .profile_cnt = 9, }, { .name = "L2_OIF_10_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ - { 144, 154 }, /* Profile 3. */ + { 352, 362 }, /* Profile 3. */ { -1, -1 }, /* Profile 4. */ - { 144, 154 }, /* Profile 5. */ + { 352, 362 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 352, 362 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 352, 362 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "L3_IIF_13_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 240, 253 }, /* Profile 2. */ - { 240, 253 }, /* Profile 3. */ - { 240, 253 }, /* Profile 4. */ - { 240, 253 }, /* Profile 5. */ + { 288, 301 }, /* Profile 2. */ + { 272, 285 }, /* Profile 3. */ + { 288, 301 }, /* Profile 4. */ + { 272, 285 }, /* Profile 5. */ + { 288, 301 }, /* Profile 6. */ + { 272, 285 }, /* Profile 7. */ + { 288, 301 }, /* Profile 8. */ + { 272, 285 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "L3_OIF_1_13_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 352, 365 }, /* Profile 2. */ - { 352, 365 }, /* Profile 3. */ - { 352, 365 }, /* Profile 4. */ - { 352, 365 }, /* Profile 5. */ + { 336, 349 }, /* Profile 2. */ + { 320, 333 }, /* Profile 3. */ + { 336, 349 }, /* Profile 4. */ + { 320, 333 }, /* Profile 5. */ + { 336, 349 }, /* Profile 6. */ + { 320, 333 }, /* Profile 7. */ + { 336, 349 }, /* Profile 8. */ + { 320, 333 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "MPLS_LABEL_DECAP_COUNT_3_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 380, 383 }, /* Profile 2. */ - { 380, 383 }, /* Profile 3. */ - { 380, 383 }, /* Profile 4. */ - { 380, 383 }, /* Profile 5. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + { 388, 391 }, /* Profile 6. */ + { 388, 391 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 388, 391 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 160, 175 }, /* Profile 2. */ - { 176, 191 }, /* Profile 3. */ + { 160, 175 }, /* Profile 3. */ { 160, 175 }, /* Profile 4. */ - { 176, 191 }, /* Profile 5. */ + { 160, 175 }, /* Profile 5. */ + { 160, 175 }, /* Profile 6. */ + { 160, 175 }, /* Profile 7. */ + { 160, 175 }, /* Profile 8. */ + { 160, 175 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "NHOP_INDEX_1_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 336, 351 }, /* Profile 2. */ - { 336, 351 }, /* Profile 3. */ - { 336, 351 }, /* Profile 4. */ - { 336, 351 }, /* Profile 5. */ + { 256, 271 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + { 256, 271 }, /* Profile 6. */ + { 240, 255 }, /* Profile 7. */ + { 256, 271 }, /* Profile 8. */ + { 240, 255 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -620,116 +716,165 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_ { 96, 111 }, /* Profile 3. */ { 96, 111 }, /* Profile 4. */ { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 412, 415 }, /* Profile 2. */ - { 412, 415 }, /* Profile 3. */ - { 412, 415 }, /* Profile 4. */ - { 412, 415 }, /* Profile 5. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 392, 395 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "SVP_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 256, 271 }, /* Profile 2. */ - { 256, 271 }, /* Profile 3. */ - { 256, 271 }, /* Profile 4. */ - { 256, 271 }, /* Profile 5. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { 304, 319 }, /* Profile 6. */ + { 288, 303 }, /* Profile 7. */ + { 304, 319 }, /* Profile 8. */ + { 288, 303 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 400, 403 }, /* Profile 2. */ - { 400, 403 }, /* Profile 3. */ - { 400, 403 }, /* Profile 4. */ - { 400, 403 }, /* Profile 5. */ + { 376, 379 }, /* Profile 2. */ + { 376, 379 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ + { 376, 379 }, /* Profile 6. */ + { 376, 379 }, /* Profile 7. */ + { 376, 379 }, /* Profile 8. */ + { 376, 379 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 288, 303 }, /* Profile 2. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 128, 143 }, /* Profile 8. */ + { 128, 143 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "SYSTEM_ENTROPY_15_0", + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_ENTROPY_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ { 288, 303 }, /* Profile 3. */ - { 288, 303 }, /* Profile 4. */ + { 304, 319 }, /* Profile 4. */ { 288, 303 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 396, 399 }, /* Profile 2. */ - { 396, 399 }, /* Profile 3. */ - { 396, 399 }, /* Profile 4. */ - { 396, 399 }, /* Profile 5. */ + { 380, 383 }, /* Profile 2. */ + { 380, 383 }, /* Profile 3. */ + { 380, 383 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + { 380, 383 }, /* Profile 6. */ + { 380, 383 }, /* Profile 7. */ + { 380, 383 }, /* Profile 8. */ + { 380, 383 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 128, 143 }, /* Profile 2. */ - { 128, 143 }, /* Profile 3. */ - { 128, 143 }, /* Profile 4. */ - { 128, 143 }, /* Profile 5. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ + { 144, 159 }, /* Profile 7. */ + { 144, 159 }, /* Profile 8. */ + { 144, 159 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 388, 391 }, /* Profile 2. */ - { 388, 391 }, /* Profile 3. */ - { 388, 391 }, /* Profile 4. */ - { 388, 391 }, /* Profile 5. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + { 408, 411 }, /* Profile 6. */ + { 408, 411 }, /* Profile 7. */ + { 408, 411 }, /* Profile 8. */ + { 408, 411 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 392, 395 }, /* Profile 2. */ - { 392, 395 }, /* Profile 3. */ - { 392, 395 }, /* Profile 4. */ - { 392, 395 }, /* Profile 5. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + { 404, 407 }, /* Profile 6. */ + { 404, 407 }, /* Profile 7. */ + { 404, 407 }, /* Profile 8. */ + { 404, 407 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "VFI_15_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VFI_15_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_VFI_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -737,12 +882,16 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_ { 112, 127 }, /* Profile 3. */ { 112, 127 }, /* Profile 4. */ { 112, 127 }, /* Profile 5. */ + { 112, 127 }, /* Profile 6. */ + { 112, 127 }, /* Profile 7. */ + { 112, 127 }, /* Profile 8. */ + { 112, 127 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, { .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0", - .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0, + .fid = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -750,23 +899,31 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_ { 368, 369 }, /* Profile 3. */ { 368, 369 }, /* Profile 4. */ { 368, 369 }, /* Profile 5. */ + { 368, 369 }, /* Profile 6. */ + { 368, 369 }, /* Profile 7. */ + { 368, 369 }, /* Profile 8. */ + { 368, 369 }, /* Profile 9. */ }, - .profile_cnt = 6, + .profile_cnt = 10, }, -};static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_data, +}; +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_rxpmd_flex_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 1, + .profile_bmp[0] = 0x3fc, + }; -static shr_enum_map_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_names[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +static shr_enum_map_t bcm56880_a0_dna_6_5_31_6_0_rxpmd_flex_reason_names[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT }; -static bcmpkt_flex_reasons_info_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reasons_info = { - .num_reasons = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_names, - .reason_encode = bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_encode, - .reason_decode = bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_decode, +static bcmpkt_flex_reasons_info_t bcm56880_a0_dna_6_5_31_6_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56880_a0_dna_6_5_31_6_0_rxpmd_flex_reason_names, + .reason_encode = bcm56880_a0_dna_6_5_31_6_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56880_a0_dna_6_5_31_6_0_rxpmd_flex_reason_decode, }; @@ -909,7 +1066,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_arp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_arp_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_get, bcmpkt_arp_t_hardware_type_get, bcmpkt_arp_t_operation_get, @@ -921,7 +1078,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_arp_t_fget[BCM56880_A0_DNA_6_ bcmpkt_arp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_arp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_arp_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_set, bcmpkt_arp_t_hardware_type_set, bcmpkt_arp_t_operation_set, @@ -933,13 +1090,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_arp_t_fset[BCM56880_A0_DNA_6_ bcmpkt_arp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_arp_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_arp_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_arp_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_arp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_arp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_arp_t_field_data, }; @@ -1036,7 +1193,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_authen_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_authen_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_get, bcmpkt_authen_t_next_header_get, bcmpkt_authen_t_payload_len_get, @@ -1045,7 +1202,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_authen_t_fget[BCM56880_A0_DNA bcmpkt_authen_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_authen_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_authen_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_set, bcmpkt_authen_t_next_header_set, bcmpkt_authen_t_payload_len_set, @@ -1054,13 +1211,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_authen_t_fset[BCM56880_A0_DNA bcmpkt_authen_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_authen_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_authen_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_authen_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_authen_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_authen_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_authen_t_field_data, }; @@ -1309,7 +1466,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_bfd_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_bfd_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_get, bcmpkt_bfd_t_bfd_length_get, bcmpkt_bfd_t_cpi_get, @@ -1328,7 +1485,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_bfd_t_fget[BCM56880_A0_DNA_6_ bcmpkt_bfd_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_bfd_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_bfd_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_set, bcmpkt_bfd_t_bfd_length_set, bcmpkt_bfd_t_cpi_set, @@ -1347,13 +1504,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_bfd_t_fset[BCM56880_A0_DNA_6_ bcmpkt_bfd_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_bfd_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_bfd_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_bfd_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_bfd_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_bfd_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_bfd_t_field_data, }; @@ -1387,23 +1544,23 @@ static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cntag_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_cntag_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_get, bcmpkt_cntag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cntag_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_cntag_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_set, bcmpkt_cntag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_cntag_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_cntag_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_cntag_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_cntag_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_cntag_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_cntag_t_field_data, }; @@ -1551,7 +1708,7 @@ static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_macsa_set(uint32_t *data, int pr return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_ifa_l2_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT] = { bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont0_get, bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont1_get, bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont2_get, @@ -1563,7 +1720,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fge bcmpkt_cpu_composites_0_ifa_l2_t_macsa_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_ifa_l2_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT] = { bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont0_set, bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont1_set, bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont2_set, @@ -1575,13 +1732,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fse bcmpkt_cpu_composites_0_ifa_l2_t_macsa_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_ifa_l2_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_ifa_l2_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_ifa_l2_t_field_data, }; @@ -1697,7 +1854,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_get, bcmpkt_cpu_composites_0_t_dma_cont1_get, bcmpkt_cpu_composites_0_t_dma_cont2_get, @@ -1707,7 +1864,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fget[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_set, bcmpkt_cpu_composites_0_t_dma_cont1_set, bcmpkt_cpu_composites_0_t_dma_cont2_set, @@ -1717,13 +1874,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fset[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_t_field_data, }; @@ -1903,7 +2060,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_cpu_composites_1_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_get, bcmpkt_cpu_composites_1_t_dma_cont11_get, bcmpkt_cpu_composites_1_t_dma_cont12_get, @@ -1917,7 +2074,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fget[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_cpu_composites_1_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_set, bcmpkt_cpu_composites_1_t_dma_cont11_set, bcmpkt_cpu_composites_1_t_dma_cont12_set, @@ -1931,13 +2088,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fset[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_cpu_composites_1_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_cpu_composites_1_t_field_data, }; @@ -1987,25 +2144,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_dest_option_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_dest_option_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_get, bcmpkt_dest_option_t_next_header_get, bcmpkt_dest_option_t_option_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_dest_option_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_dest_option_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_set, bcmpkt_dest_option_t_next_header_set, bcmpkt_dest_option_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_dest_option_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_dest_option_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_dest_option_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_dest_option_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_dest_option_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_dest_option_t_field_data, }; @@ -2145,7 +2302,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_get, bcmpkt_erspan3_fixed_hdr_t_cos_get, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, @@ -2157,7 +2314,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fget[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_set, bcmpkt_erspan3_fixed_hdr_t_cos_set, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, @@ -2169,13 +2326,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fset[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_field_data, }; @@ -2240,27 +2397,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_get, bcmpkt_erspan3_subhdr_5_t_port_id_get, bcmpkt_erspan3_subhdr_5_t_switch_id_get, bcmpkt_erspan3_subhdr_5_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_set, bcmpkt_erspan3_subhdr_5_t_port_id_set, bcmpkt_erspan3_subhdr_5_t_switch_id_set, bcmpkt_erspan3_subhdr_5_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_field_data, }; @@ -2341,7 +2498,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_esp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_esp_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_get, bcmpkt_esp_t_pad_get, bcmpkt_esp_t_pad_len_get, @@ -2349,7 +2506,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_esp_t_fget[BCM56880_A0_DNA_6_ bcmpkt_esp_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_esp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_esp_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_set, bcmpkt_esp_t_pad_set, bcmpkt_esp_t_pad_len_set, @@ -2357,13 +2514,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_esp_t_fset[BCM56880_A0_DNA_6_ bcmpkt_esp_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_esp_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_esp_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_esp_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_esp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_esp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_esp_t_field_data, }; @@ -2398,23 +2555,23 @@ static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_etag_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_etag_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETAG_T_FID_COUNT] = { bcmpkt_etag_t_tag_get, bcmpkt_etag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_etag_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_etag_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETAG_T_FID_COUNT] = { bcmpkt_etag_t_tag_set, bcmpkt_etag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_etag_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_etag_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_etag_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_etag_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_etag_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_etag_t_field_data, }; @@ -2433,21 +2590,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ethertype_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_ethertype_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ethertype_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_ethertype_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ethertype_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_ethertype_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ethertype_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_ethertype_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_ethertype_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_ethertype_t_field_data, }; @@ -2512,27 +2669,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_frag_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_frag_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_get, bcmpkt_frag_t_id_get, bcmpkt_frag_t_next_header_get, bcmpkt_frag_t_reserved_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_frag_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_frag_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_set, bcmpkt_frag_t_id_set, bcmpkt_frag_t_next_header_set, bcmpkt_frag_t_reserved_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_frag_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_frag_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_frag_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_frag_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_frag_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_frag_t_field_data, }; @@ -2716,52 +2873,52 @@ static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int prof return ret; } -static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[3], 0, 16); + *val = WORD_FIELD_GET(data[2], 16, 16); return ret; } -static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[3], 0, 16, val); + WORD_FIELD_SET(data[2], 16, 16, val); return ret; } -static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[2], 16, 16); + *val = WORD_FIELD_GET(data[0], 24, 8); return ret; } -static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[2], 16, 16, val); + WORD_FIELD_SET(data[0], 24, 8, val); return ret; } -static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 24, 8); + *val = WORD_FIELD_GET(data[3], 0, 16); return ret; } -static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 24, 8, val); + WORD_FIELD_SET(data[3], 0, 16, val); return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_generic_loopback_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_get, bcmpkt_generic_loopback_t_destination_type_get, bcmpkt_generic_loopback_t_entropy_obj_get, @@ -2774,12 +2931,12 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fget[BCM56 bcmpkt_generic_loopback_t_processing_ctrl_1_get, bcmpkt_generic_loopback_t_qos_obj_get, bcmpkt_generic_loopback_t_reserved_1_get, - bcmpkt_generic_loopback_t_reserved_2_get, bcmpkt_generic_loopback_t_source_system_port_get, bcmpkt_generic_loopback_t_start_byte_get, + bcmpkt_generic_loopback_t_svp_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_generic_loopback_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_set, bcmpkt_generic_loopback_t_destination_type_set, bcmpkt_generic_loopback_t_entropy_obj_set, @@ -2792,18 +2949,18 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fset[BCM56 bcmpkt_generic_loopback_t_processing_ctrl_1_set, bcmpkt_generic_loopback_t_qos_obj_set, bcmpkt_generic_loopback_t_reserved_1_set, - bcmpkt_generic_loopback_t_reserved_2_set, bcmpkt_generic_loopback_t_source_system_port_set, bcmpkt_generic_loopback_t_start_byte_set, + bcmpkt_generic_loopback_t_svp_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_generic_loopback_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_generic_loopback_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_generic_loopback_t_field_data, }; @@ -2882,7 +3039,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gpe_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_gpe_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_get, bcmpkt_gpe_t_next_protocol_get, bcmpkt_gpe_t_reserved0_get, @@ -2890,7 +3047,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gpe_t_fget[BCM56880_A0_DNA_6_ bcmpkt_gpe_t_vni_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gpe_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_gpe_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_set, bcmpkt_gpe_t_next_protocol_set, bcmpkt_gpe_t_reserved0_set, @@ -2898,13 +3055,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gpe_t_fset[BCM56880_A0_DNA_6_ bcmpkt_gpe_t_vni_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gpe_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_gpe_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gpe_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_gpe_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_gpe_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_gpe_t_field_data, }; @@ -2938,23 +3095,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_gre_chksum_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_get, bcmpkt_gre_chksum_t_offset_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_gre_chksum_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_set, bcmpkt_gre_chksum_t_offset_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_gre_chksum_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_gre_chksum_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_gre_chksum_t_field_data, }; @@ -2974,21 +3131,21 @@ static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_key_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_gre_key_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_key_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_gre_key_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_key_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_gre_key_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_key_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_gre_key_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_gre_key_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_gre_key_t_field_data, }; @@ -3008,21 +3165,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_gre_rout_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_gre_rout_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_gre_rout_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_gre_rout_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_gre_rout_t_field_data, }; @@ -3042,21 +3199,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_gre_seq_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_gre_seq_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_gre_seq_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_gre_seq_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_gre_seq_t_field_data, }; @@ -3120,27 +3277,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_gre_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_get, bcmpkt_gre_t_protocol_get, bcmpkt_gre_t_reserved_get, bcmpkt_gre_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_gre_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_set, bcmpkt_gre_t_protocol_set, bcmpkt_gre_t_reserved_set, bcmpkt_gre_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_gre_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_gre_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_gre_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_gre_t_field_data, }; @@ -3339,7 +3496,7 @@ static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_hg3_base_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { bcmpkt_hg3_base_t_cn_get, bcmpkt_hg3_base_t_cng_get, bcmpkt_hg3_base_t_entropy_get, @@ -3355,7 +3512,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fget[BCM56880_A0_D bcmpkt_hg3_base_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_hg3_base_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { bcmpkt_hg3_base_t_cn_set, bcmpkt_hg3_base_t_cng_set, bcmpkt_hg3_base_t_entropy_set, @@ -3371,13 +3528,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fset[BCM56880_A0_D bcmpkt_hg3_base_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_hg3_base_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_hg3_base_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_hg3_base_t_field_data, }; @@ -3471,7 +3628,7 @@ static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_hg3_extension_0_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { bcmpkt_hg3_extension_0_t_class_id_lsb_get, bcmpkt_hg3_extension_0_t_class_id_msb_get, bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, @@ -3480,7 +3637,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fget[BCM568 bcmpkt_hg3_extension_0_t_svp_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_hg3_extension_0_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { bcmpkt_hg3_extension_0_t_class_id_lsb_set, bcmpkt_hg3_extension_0_t_class_id_msb_set, bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, @@ -3489,13 +3646,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fset[BCM568 bcmpkt_hg3_extension_0_t_svp_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_hg3_extension_0_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_hg3_extension_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_hg3_extension_0_t_field_data, }; @@ -3545,25 +3702,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_hop_by_hop_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_get, bcmpkt_hop_by_hop_t_next_header_get, bcmpkt_hop_by_hop_t_option_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_hop_by_hop_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_set, bcmpkt_hop_by_hop_t_next_header_set, bcmpkt_hop_by_hop_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_hop_by_hop_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_hop_by_hop_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_hop_by_hop_t_field_data, }; @@ -3612,25 +3769,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_icmp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_icmp_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_get, bcmpkt_icmp_t_code_get, bcmpkt_icmp_t_icmp_type_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_icmp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_icmp_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_set, bcmpkt_icmp_t_code_set, bcmpkt_icmp_t_icmp_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_icmp_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_icmp_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_icmp_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_icmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_icmp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_icmp_t_field_data, }; @@ -3664,23 +3821,23 @@ static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int pr return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_a_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_a_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_a_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_a_t_field_data, }; @@ -3744,27 +3901,27 @@ static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_b_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_b_t_cn_get, bcmpkt_ifa_flex_md_0_b_t_port_speed_get, bcmpkt_ifa_flex_md_0_b_t_queue_id_get, bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_b_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_b_t_cn_set, bcmpkt_ifa_flex_md_0_b_t_port_speed_set, bcmpkt_ifa_flex_md_0_b_t_queue_id_set, bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_b_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_b_t_field_data, }; @@ -3814,25 +3971,25 @@ static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_1_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { bcmpkt_ifa_flex_md_1_t_egress_port_id_get, bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_1_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { bcmpkt_ifa_flex_md_1_t_egress_port_id_set, bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_1_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_1_t_field_data, }; @@ -3868,23 +4025,23 @@ static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, in return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_2_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_2_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_2_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_2_t_field_data, }; @@ -3920,23 +4077,23 @@ static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_3_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_3_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_3_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_3_t_field_data, }; @@ -4015,7 +4172,7 @@ static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_ifa_header_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { bcmpkt_ifa_header_t_flags_get, bcmpkt_ifa_header_t_gns_get, bcmpkt_ifa_header_t_max_length_get, @@ -4023,7 +4180,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fget[BCM56880_A0 bcmpkt_ifa_header_t_ver_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_ifa_header_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { bcmpkt_ifa_header_t_flags_set, bcmpkt_ifa_header_t_gns_set, bcmpkt_ifa_header_t_max_length_set, @@ -4031,13 +4188,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fset[BCM56880_A0 bcmpkt_ifa_header_t_ver_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_ifa_header_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_ifa_header_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_ifa_header_t_field_data, }; @@ -4086,25 +4243,25 @@ static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_ifa_md_base_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { bcmpkt_ifa_md_base_t_action_vector_get, bcmpkt_ifa_md_base_t_hop_limit_current_length_get, bcmpkt_ifa_md_base_t_request_vector_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_ifa_md_base_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { bcmpkt_ifa_md_base_t_action_vector_set, bcmpkt_ifa_md_base_t_hop_limit_current_length_set, bcmpkt_ifa_md_base_t_request_vector_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_ifa_md_base_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_ifa_md_base_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_ifa_md_base_t_field_data, }; @@ -4169,27 +4326,27 @@ static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_ifa_metadata_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { bcmpkt_ifa_metadata_t_action_vector_get, bcmpkt_ifa_metadata_t_hop_limit_current_length_get, bcmpkt_ifa_metadata_t_metadata_get, bcmpkt_ifa_metadata_t_request_vector_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_ifa_metadata_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { bcmpkt_ifa_metadata_t_action_vector_set, bcmpkt_ifa_metadata_t_hop_limit_current_length_set, bcmpkt_ifa_metadata_t_metadata_set, bcmpkt_ifa_metadata_t_request_vector_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_ifa_metadata_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_ifa_metadata_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_ifa_metadata_t_field_data, }; @@ -4254,27 +4411,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_igmp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_igmp_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_get, bcmpkt_igmp_t_group_address_get, bcmpkt_igmp_t_igmp_type_get, bcmpkt_igmp_t_max_resp_time_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_igmp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_igmp_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_set, bcmpkt_igmp_t_group_address_set, bcmpkt_igmp_t_igmp_type_set, bcmpkt_igmp_t_max_resp_time_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_igmp_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_igmp_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_igmp_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_igmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_igmp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_igmp_t_field_data, }; @@ -4356,7 +4513,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_ipfix_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_get, bcmpkt_ipfix_t_length_get, bcmpkt_ipfix_t_obs_domain_id_get, @@ -4364,7 +4521,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fget[BCM56880_A0_DNA_ bcmpkt_ipfix_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_ipfix_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_set, bcmpkt_ipfix_t_length_set, bcmpkt_ipfix_t_obs_domain_id_set, @@ -4372,13 +4529,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fset[BCM56880_A0_DNA_ bcmpkt_ipfix_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ipfix_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_ipfix_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ipfix_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_ipfix_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_ipfix_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_ipfix_t_field_data, }; @@ -4550,7 +4707,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_ipv4_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_get, bcmpkt_ipv4_t_flags_frag_offset_get, bcmpkt_ipv4_t_hdr_checksum_get, @@ -4564,7 +4721,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fget[BCM56880_A0_DNA_6 bcmpkt_ipv4_t_version_hdr_len_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_ipv4_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_set, bcmpkt_ipv4_t_flags_frag_offset_set, bcmpkt_ipv4_t_hdr_checksum_set, @@ -4578,13 +4735,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fset[BCM56880_A0_DNA_6 bcmpkt_ipv4_t_version_hdr_len_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ipv4_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_ipv4_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ipv4_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_ipv4_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_ipv4_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_ipv4_t_field_data, }; @@ -4710,7 +4867,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_ipv6_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_get, bcmpkt_ipv6_t_flow_label_get, bcmpkt_ipv6_t_hop_limit_get, @@ -4721,7 +4878,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fget[BCM56880_A0_DNA_6 bcmpkt_ipv6_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_ipv6_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_set, bcmpkt_ipv6_t_flow_label_set, bcmpkt_ipv6_t_hop_limit_set, @@ -4732,13 +4889,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fset[BCM56880_A0_DNA_6 bcmpkt_ipv6_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ipv6_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_ipv6_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ipv6_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_ipv6_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_ipv6_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_ipv6_t_field_data, }; @@ -4774,23 +4931,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_l2_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_l2_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_get, bcmpkt_l2_t_macsa_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_l2_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_l2_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_set, bcmpkt_l2_t_macsa_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_l2_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_l2_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_l2_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_l2_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_l2_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_l2_t_field_data, }; @@ -4810,21 +4967,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_field_data, }; @@ -4844,21 +5001,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_mirror_transport_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_mirror_transport_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_mirror_transport_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_mirror_transport_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_mirror_transport_t_field_data, }; @@ -4922,27 +5079,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_mpls_ach_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_get, bcmpkt_mpls_ach_t_cw_type_get, bcmpkt_mpls_ach_t_reserved_get, bcmpkt_mpls_ach_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_mpls_ach_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_set, bcmpkt_mpls_ach_t_cw_type_set, bcmpkt_mpls_ach_t_reserved_set, bcmpkt_mpls_ach_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_mpls_ach_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_mpls_ach_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_mpls_ach_t_field_data, }; @@ -4962,21 +5119,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_mpls_bv_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_mpls_bv_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_mpls_bv_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_mpls_bv_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_mpls_bv_t_field_data, }; @@ -5025,25 +5182,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_mpls_cw_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_get, bcmpkt_mpls_cw_t_reserved_get, bcmpkt_mpls_cw_t_seq_number_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_mpls_cw_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_set, bcmpkt_mpls_cw_t_reserved_set, bcmpkt_mpls_cw_t_seq_number_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_mpls_cw_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_mpls_cw_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_mpls_cw_t_field_data, }; @@ -5107,27 +5264,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mpls_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_mpls_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_get, bcmpkt_mpls_t_exp_get, bcmpkt_mpls_t_label_get, bcmpkt_mpls_t_ttl_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mpls_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_mpls_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_set, bcmpkt_mpls_t_exp_set, bcmpkt_mpls_t_label_set, bcmpkt_mpls_t_ttl_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mpls_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_mpls_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mpls_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_mpls_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_mpls_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_mpls_t_field_data, }; @@ -5344,7 +5501,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_p_1588_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_get, bcmpkt_p_1588_t_correction_get, bcmpkt_p_1588_t_domain_nb_get, @@ -5361,7 +5518,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fget[BCM56880_A0_DNA bcmpkt_p_1588_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_p_1588_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_set, bcmpkt_p_1588_t_correction_set, bcmpkt_p_1588_t_domain_nb_set, @@ -5378,13 +5535,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fset[BCM56880_A0_DNA bcmpkt_p_1588_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_p_1588_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_p_1588_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_p_1588_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_p_1588_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_p_1588_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_p_1588_t_field_data, }; @@ -5448,27 +5605,27 @@ static int32_t bcmpkt_pim_t_hdr_bytes_6_7_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_pim_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_pim_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_FID_COUNT] = { bcmpkt_pim_t_hdr_bytes_0_1_get, bcmpkt_pim_t_hdr_bytes_2_3_get, bcmpkt_pim_t_hdr_bytes_4_5_get, bcmpkt_pim_t_hdr_bytes_6_7_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_pim_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_pim_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_FID_COUNT] = { bcmpkt_pim_t_hdr_bytes_0_1_set, bcmpkt_pim_t_hdr_bytes_2_3_set, bcmpkt_pim_t_hdr_bytes_4_5_set, bcmpkt_pim_t_hdr_bytes_6_7_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_pim_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_pim_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_pim_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_pim_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_pim_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PIM_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_pim_t_field_data, }; @@ -5518,25 +5675,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_prog_ext_hdr_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, bcmpkt_prog_ext_hdr_t_next_header_get, bcmpkt_prog_ext_hdr_t_option_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_prog_ext_hdr_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, bcmpkt_prog_ext_hdr_t_next_header_set, bcmpkt_prog_ext_hdr_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_prog_ext_hdr_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_prog_ext_hdr_t_field_data, }; @@ -5632,7 +5789,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_psamp_0_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_get, bcmpkt_psamp_0_t_length_get, bcmpkt_psamp_0_t_next_hop_index_get, @@ -5641,7 +5798,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fget[BCM56880_A0_DN bcmpkt_psamp_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_psamp_0_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_set, bcmpkt_psamp_0_t_length_set, bcmpkt_psamp_0_t_next_hop_index_set, @@ -5650,13 +5807,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fset[BCM56880_A0_DN bcmpkt_psamp_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_psamp_0_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_psamp_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_psamp_0_t_field_data, }; @@ -5765,7 +5922,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_psamp_1_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_get, bcmpkt_psamp_1_t_egress_port_get, bcmpkt_psamp_1_t_epoch_get, @@ -5775,7 +5932,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fget[BCM56880_A0_DN bcmpkt_psamp_1_t_variable_flag_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_psamp_1_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_set, bcmpkt_psamp_1_t_egress_port_set, bcmpkt_psamp_1_t_epoch_set, @@ -5785,13 +5942,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fset[BCM56880_A0_DN bcmpkt_psamp_1_t_variable_flag_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_psamp_1_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_psamp_1_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_psamp_1_t_field_data, }; @@ -5903,7 +6060,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, bcmpkt_psamp_mirror_on_drop_0_t_length_get, @@ -5913,7 +6070,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, bcmpkt_psamp_mirror_on_drop_0_t_length_set, @@ -5923,13 +6080,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_field_data, }; @@ -6038,7 +6195,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *d return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get, bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, @@ -6048,7 +6205,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fget bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set, bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, @@ -6058,13 +6215,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fset bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_field_data, }; @@ -6207,7 +6364,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_rarp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_rarp_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_get, bcmpkt_rarp_t_hardware_type_get, bcmpkt_rarp_t_operation_get, @@ -6219,7 +6376,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_rarp_t_fget[BCM56880_A0_DNA_6 bcmpkt_rarp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_rarp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_rarp_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_set, bcmpkt_rarp_t_hardware_type_set, bcmpkt_rarp_t_operation_set, @@ -6231,13 +6388,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_rarp_t_fset[BCM56880_A0_DNA_6 bcmpkt_rarp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rarp_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_rarp_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_rarp_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_rarp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_rarp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_rarp_t_field_data, }; @@ -6317,7 +6474,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_routing_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_routing_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_get, bcmpkt_routing_t_hdr_ext_len_get, bcmpkt_routing_t_next_header_get, @@ -6325,7 +6482,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_routing_t_fget[BCM56880_A0_DN bcmpkt_routing_t_segments_left_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_routing_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_routing_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_set, bcmpkt_routing_t_hdr_ext_len_set, bcmpkt_routing_t_next_header_set, @@ -6333,13 +6490,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_routing_t_fset[BCM56880_A0_DN bcmpkt_routing_t_segments_left_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_routing_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_routing_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_routing_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_routing_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_routing_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_routing_t_field_data, }; @@ -6373,23 +6530,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_rspan_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_rspan_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_get, bcmpkt_rspan_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_rspan_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_rspan_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_set, bcmpkt_rspan_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rspan_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_rspan_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_rspan_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_rspan_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_rspan_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_rspan_t_field_data, }; @@ -6439,25 +6596,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_sflow_shim_0_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_get, bcmpkt_sflow_shim_0_t_sys_source_get, bcmpkt_sflow_shim_0_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_sflow_shim_0_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_set, bcmpkt_sflow_shim_0_t_sys_source_set, bcmpkt_sflow_shim_0_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_sflow_shim_0_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_sflow_shim_0_t_field_data, }; @@ -6581,7 +6738,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_sflow_shim_1_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_get, bcmpkt_sflow_shim_1_t_flag_discarded_get, bcmpkt_sflow_shim_1_t_flag_flex_sample_get, @@ -6592,7 +6749,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fget[BCM56880_ bcmpkt_sflow_shim_1_t_sys_opcode_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_sflow_shim_1_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_set, bcmpkt_sflow_shim_1_t_flag_discarded_set, bcmpkt_sflow_shim_1_t_flag_flex_sample_set, @@ -6603,13 +6760,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fset[BCM56880_ bcmpkt_sflow_shim_1_t_sys_opcode_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_sflow_shim_1_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_sflow_shim_1_t_field_data, }; @@ -6644,23 +6801,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_sflow_shim_2_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_get, bcmpkt_sflow_shim_2_t_user_meta_data_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_sflow_shim_2_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_set, bcmpkt_sflow_shim_2_t_user_meta_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_sflow_shim_2_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_sflow_shim_2_t_field_data, }; @@ -6695,23 +6852,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_snap_llc_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_get, bcmpkt_snap_llc_t_snap_llc_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_snap_llc_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_set, bcmpkt_snap_llc_t_snap_llc_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_snap_llc_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_snap_llc_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_snap_llc_t_field_data, }; @@ -6745,23 +6902,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_get, bcmpkt_tcp_first_4bytes_t_src_port_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_set, bcmpkt_tcp_first_4bytes_t_src_port_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_field_data, }; @@ -6857,7 +7014,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_get, bcmpkt_tcp_last_16bytes_t_checksum_get, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, @@ -6866,7 +7023,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fget[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_set, bcmpkt_tcp_last_16bytes_t_checksum_set, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, @@ -6875,13 +7032,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fset[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_field_data, }; @@ -6945,27 +7102,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_udp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_udp_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_get, bcmpkt_udp_t_dst_port_get, bcmpkt_udp_t_src_port_get, bcmpkt_udp_t_udp_length_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_udp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_udp_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_set, bcmpkt_udp_t_dst_port_set, bcmpkt_udp_t_src_port_set, bcmpkt_udp_t_udp_length_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_udp_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_udp_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_udp_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_udp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_udp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_udp_t_field_data, }; @@ -7001,23 +7158,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_unknown_l3_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_unknown_l3_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_unknown_l3_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_unknown_l3_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_unknown_l3_t_field_data, }; @@ -7037,21 +7194,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_unknown_l4_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_unknown_l4_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_unknown_l4_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_unknown_l4_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_unknown_l4_t_field_data, }; @@ -7101,25 +7258,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_unknown_l5_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_get, bcmpkt_unknown_l5_t_l5_bytes_2_3_get, bcmpkt_unknown_l5_t_l5_bytes_4_7_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_unknown_l5_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_set, bcmpkt_unknown_l5_t_l5_bytes_2_3_set, bcmpkt_unknown_l5_t_l5_bytes_4_7_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_unknown_l5_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_unknown_l5_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_unknown_l5_t_field_data, }; @@ -7183,27 +7340,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_vlan_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_vlan_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_get, bcmpkt_vlan_t_pcp_get, bcmpkt_vlan_t_tpid_get, bcmpkt_vlan_t_vid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_vlan_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_vlan_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_set, bcmpkt_vlan_t_pcp_set, bcmpkt_vlan_t_tpid_set, bcmpkt_vlan_t_vid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_vlan_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_vlan_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_vlan_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_vlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_vlan_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_vlan_t_field_data, }; @@ -7238,23 +7395,23 @@ static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_vntag_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_vntag_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VNTAG_T_FID_COUNT] = { bcmpkt_vntag_t_tag_get, bcmpkt_vntag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_vntag_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_vntag_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VNTAG_T_FID_COUNT] = { bcmpkt_vntag_t_tag_set, bcmpkt_vntag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_vntag_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_vntag_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_vntag_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_vntag_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_vntag_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_vntag_t_field_data, }; @@ -7304,25 +7461,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_vxlan_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_vxlan_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_get, bcmpkt_vxlan_t_reserved2_get, bcmpkt_vxlan_t_vn_id_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_vxlan_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_vxlan_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_set, bcmpkt_vxlan_t_reserved2_set, bcmpkt_vxlan_t_vn_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_vxlan_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_vxlan_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_vxlan_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_vxlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_vxlan_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_vxlan_t_field_data, }; @@ -7434,7 +7591,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_wesp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_31_6_0_wesp_t_fget[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_get, bcmpkt_wesp_t_header_len_get, bcmpkt_wesp_t_next_header_get, @@ -7444,7 +7601,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_wesp_t_fget[BCM56880_A0_DNA_6 bcmpkt_wesp_t_wesp_iv_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_wesp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_31_6_0_wesp_t_fset[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_set, bcmpkt_wesp_t_header_len_set, bcmpkt_wesp_t_next_header_set, @@ -7454,520 +7611,520 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_wesp_t_fset[BCM56880_A0_DNA_6 bcmpkt_wesp_t_wesp_iv_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_wesp_t_field_data[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_31_6_0_wesp_t_field_data[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_wesp_t_field_info = { - .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT, - .info = bcm56880_a0_dna_6_5_30_1_1_wesp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_31_6_0_wesp_t_field_info = { + .num_fields = BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56880_a0_dna_6_5_31_6_0_wesp_t_field_data, }; -static bcmpkt_flex_pmd_info_t bcm56880_a0_dna_6_5_30_1_1_flexhdr_info_list[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT] = { +static bcmpkt_flex_pmd_info_t bcm56880_a0_dna_6_5_31_6_0_flexhdr_info_list[BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_COUNT] = { { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_arp_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_arp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_arp_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_arp_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_arp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_arp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_authen_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_authen_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_authen_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_authen_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_authen_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_authen_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_bfd_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_bfd_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_bfd_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_bfd_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_bfd_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_bfd_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_cntag_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_cntag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_cntag_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_cntag_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_cntag_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_cntag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_ifa_l2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_ifa_l2_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_ifa_l2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_cpu_composites_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_cpu_composites_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_cpu_composites_1_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_cpu_composites_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_dest_option_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_dest_option_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_dest_option_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_dest_option_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_dest_option_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_dest_option_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_esp_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_esp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_esp_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_esp_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_esp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_esp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_etag_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_etag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_etag_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_etag_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_etag_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_etag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_ethertype_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_ethertype_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ethertype_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ethertype_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_ethertype_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_ethertype_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_frag_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_frag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_frag_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_frag_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_frag_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_frag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_generic_loopback_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_generic_loopback_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_generic_loopback_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_gpe_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_gpe_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gpe_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gpe_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_gpe_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_gpe_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_gre_chksum_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_gre_chksum_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_gre_chksum_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_key_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_gre_key_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_key_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_key_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_gre_key_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_gre_key_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_gre_rout_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_gre_rout_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_gre_rout_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_gre_seq_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_gre_seq_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_gre_seq_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_gre_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_gre_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_gre_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_hg3_base_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_hg3_base_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_hg3_base_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_hg3_extension_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_hg3_extension_0_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_hg3_extension_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_hop_by_hop_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_hop_by_hop_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_hop_by_hop_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_icmp_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_icmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_icmp_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_icmp_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_icmp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_icmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_a_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_a_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_b_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_0_b_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_1_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_2_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_3_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_ifa_flex_md_3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_ifa_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_ifa_header_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_ifa_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_ifa_md_base_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_ifa_md_base_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_ifa_md_base_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_ifa_metadata_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_ifa_metadata_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_ifa_metadata_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_igmp_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_igmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_igmp_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_igmp_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_igmp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_igmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_ipfix_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_ipfix_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_ipfix_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_ipfix_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_ipv4_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_ipv4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_ipv4_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_ipv4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_ipv6_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_ipv6_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_ipv6_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_ipv6_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_l2_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_l2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_l2_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_l2_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_l2_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_l2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_mirror_transport_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_mirror_transport_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_mirror_transport_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_mpls_ach_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_mpls_ach_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_mpls_ach_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_mpls_bv_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_mpls_bv_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_mpls_bv_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_mpls_cw_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_mpls_cw_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_mpls_cw_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_mpls_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_mpls_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mpls_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mpls_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_mpls_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_mpls_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_p_1588_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_p_1588_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_p_1588_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_p_1588_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_pim_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_pim_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_pim_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_pim_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_pim_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_pim_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_prog_ext_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_prog_ext_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_psamp_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_psamp_0_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_psamp_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_psamp_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_psamp_1_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_psamp_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_rarp_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_rarp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_rarp_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_rarp_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_rarp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_rarp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_routing_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_routing_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_routing_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_routing_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_routing_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_routing_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_rspan_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_rspan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_rspan_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_rspan_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_rspan_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_rspan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_sflow_shim_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_sflow_shim_0_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_sflow_shim_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_sflow_shim_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_sflow_shim_1_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_sflow_shim_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_sflow_shim_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_sflow_shim_2_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_sflow_shim_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_snap_llc_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_snap_llc_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_snap_llc_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_udp_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_udp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_udp_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_udp_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_udp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_udp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_unknown_l3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_unknown_l3_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_unknown_l3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_unknown_l4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_unknown_l4_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_unknown_l4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_unknown_l5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_unknown_l5_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_unknown_l5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_vlan_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_vlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_vlan_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_vlan_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_vlan_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_vlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_vntag_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_vntag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_vntag_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_vntag_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_vntag_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_vntag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_vxlan_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_vxlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_vxlan_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_vxlan_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_vxlan_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_vxlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_wesp_t_field_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_wesp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_dna_6_5_30_1_1_wesp_t_fget, - .flex_fset = bcm56880_a0_dna_6_5_30_1_1_wesp_t_fset, + .flex_fget = bcm56880_a0_dna_6_5_31_6_0_wesp_t_fget, + .flex_fset = bcm56880_a0_dna_6_5_31_6_0_wesp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_info, - .reasons_info = &bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reasons_info, + .field_info = &bcm56880_a0_dna_6_5_31_6_0_rxpmd_flex_field_info, + .reasons_info = &bcm56880_a0_dna_6_5_31_6_0_rxpmd_flex_reasons_info, .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, }, }; -static shr_enum_map_t bcm56880_a0_dna_6_5_30_1_1_flexhdr_id_map[] = { - BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_NAME_MAP_INIT +static shr_enum_map_t bcm56880_a0_dna_6_5_31_6_0_flexhdr_id_map[] = { + BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_NAME_MAP_INIT }; -shr_enum_map_t * bcm56880_a0_dna_6_5_30_1_1_flexhdr_map_get(void) +shr_enum_map_t * bcm56880_a0_dna_6_5_31_6_0_flexhdr_map_get(void) { - return bcm56880_a0_dna_6_5_30_1_1_flexhdr_id_map; + return bcm56880_a0_dna_6_5_31_6_0_flexhdr_id_map; } -bcmpkt_flex_pmd_info_t * bcm56880_a0_dna_6_5_30_1_1_flex_pmd_info_get(uint32_t hid) +bcmpkt_flex_pmd_info_t * bcm56880_a0_dna_6_5_31_6_0_flex_pmd_info_get(uint32_t hid) { - if (hid >= BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT) { + if (hid >= BCM56880_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_COUNT) { return NULL; } - return &bcm56880_a0_dna_6_5_30_1_1_flexhdr_info_list[hid]; + return &bcm56880_a0_dna_6_5_31_6_0_flexhdr_info_list[hid]; } -int bcm56880_a0_dna_6_5_30_1_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { +int bcm56880_a0_dna_6_5_31_6_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { 14, 21, 22, diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c similarity index 83% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c index 35f0100826a..46f17d882e6 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c @@ -2,8 +2,8 @@ * * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56880_a0_hna_6_5_30_3_0_sf_match_id_info.yml - * for device bcm56880_a0 and variant hna_6_5_30_3_0. + * from the NPL output file(s) bcm56880_a0_hna_6_5_31_3_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant hna_6_5_31_3_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -29,13 +29,13 @@ #include -#include +#include static bcmpkt_rxpmd_match_id_db_t -bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_COUNT] = { +bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT] = { { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", .match = 0x20, .match_mask = 0x30, @@ -49,7 +49,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", .match = 0x8, .match_mask = 0x8, @@ -63,7 +63,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ .name = "EGRESS_PKT_FWD_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -77,7 +77,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ .name = "EGRESS_PKT_FWD_L2_HDR_NONE", .match = 0x0, .match_mask = 0x3f, @@ -91,7 +91,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", .match = 0x4, .match_mask = 0x4, @@ -105,7 +105,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", .match = 0x2, .match_mask = 0x2, @@ -119,7 +119,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", .match = 0x10, .match_mask = 0x30, @@ -133,7 +133,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -147,7 +147,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -161,7 +161,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -175,7 +175,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -189,7 +189,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -203,7 +203,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -217,7 +217,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -231,7 +231,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -245,7 +245,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", .match = 0x1830, .match_mask = 0x3870, @@ -259,7 +259,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", .match = 0x2, .match_mask = 0x42, @@ -273,7 +273,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", .match = 0x202, .match_mask = 0x642, @@ -287,7 +287,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", .match = 0x1000, .match_mask = 0x3800, @@ -301,7 +301,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", .match = 0x82, .match_mask = 0x1c2, @@ -315,7 +315,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", .match = 0x12, .match_mask = 0x72, @@ -329,7 +329,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -343,7 +343,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -357,7 +357,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -371,7 +371,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -385,7 +385,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -399,7 +399,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -413,7 +413,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -427,7 +427,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -441,7 +441,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -455,7 +455,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -469,7 +469,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -483,7 +483,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -497,7 +497,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -511,7 +511,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -525,7 +525,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -539,7 +539,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -553,7 +553,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -567,7 +567,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -581,7 +581,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -595,7 +595,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -609,7 +609,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -623,7 +623,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -637,7 +637,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -651,7 +651,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", .match = 0x830, .match_mask = 0x3870, @@ -665,7 +665,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x1, @@ -679,7 +679,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ .name = "EGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x1, @@ -693,7 +693,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", .match = 0x20, .match_mask = 0x30, @@ -707,7 +707,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", .match = 0x8, .match_mask = 0x8, @@ -721,7 +721,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -735,7 +735,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", .match = 0x0, .match_mask = 0x3f, @@ -749,7 +749,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", .match = 0x4, .match_mask = 0x4, @@ -763,7 +763,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", .match = 0x2, .match_mask = 0x2, @@ -777,7 +777,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", .match = 0x10, .match_mask = 0x30, @@ -791,7 +791,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -805,7 +805,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -819,7 +819,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -833,7 +833,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -847,7 +847,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -861,7 +861,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -875,7 +875,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -889,7 +889,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -903,7 +903,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", .match = 0x1830, .match_mask = 0x3870, @@ -917,7 +917,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", .match = 0x2, .match_mask = 0x42, @@ -931,7 +931,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", .match = 0x202, .match_mask = 0x642, @@ -945,7 +945,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", .match = 0x1000, .match_mask = 0x3800, @@ -959,7 +959,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", .match = 0x82, .match_mask = 0x1c2, @@ -973,7 +973,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", .match = 0x12, .match_mask = 0x72, @@ -987,7 +987,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -1001,7 +1001,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -1015,7 +1015,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -1029,7 +1029,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -1043,7 +1043,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -1057,7 +1057,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -1071,7 +1071,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -1085,7 +1085,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -1099,7 +1099,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -1113,7 +1113,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -1127,7 +1127,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -1141,7 +1141,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -1155,7 +1155,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -1169,7 +1169,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -1183,7 +1183,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -1197,7 +1197,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -1211,7 +1211,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -1225,7 +1225,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -1239,7 +1239,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -1253,7 +1253,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -1267,7 +1267,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -1281,7 +1281,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -1295,7 +1295,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -1309,7 +1309,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", .match = 0x830, .match_mask = 0x3870, @@ -1323,7 +1323,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", .match = 0x20, .match_mask = 0x30, @@ -1337,7 +1337,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", .match = 0x8, .match_mask = 0x8, @@ -1351,7 +1351,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ .name = "INGRESS_PKT_INNER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -1365,7 +1365,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ .name = "INGRESS_PKT_INNER_L2_HDR_NONE", .match = 0x0, .match_mask = 0x3f, @@ -1379,7 +1379,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", .match = 0x4, .match_mask = 0x4, @@ -1393,7 +1393,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", .match = 0x2, .match_mask = 0x2, @@ -1407,7 +1407,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", .match = 0x10, .match_mask = 0x30, @@ -1421,7 +1421,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -1435,7 +1435,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -1449,7 +1449,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -1463,7 +1463,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -1477,7 +1477,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -1491,7 +1491,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -1505,7 +1505,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -1519,7 +1519,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -1533,7 +1533,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -1547,7 +1547,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -1561,7 +1561,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -1575,7 +1575,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -1589,7 +1589,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -1603,7 +1603,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -1617,7 +1617,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -1631,7 +1631,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -1645,7 +1645,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -1659,7 +1659,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -1673,7 +1673,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -1687,7 +1687,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -1701,7 +1701,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -1715,7 +1715,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -1729,7 +1729,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", .match = 0x20, .match_mask = 0x30, @@ -1743,7 +1743,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", .match = 0x8, .match_mask = 0x8, @@ -1757,7 +1757,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ .name = "INGRESS_PKT_OUTER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -1771,7 +1771,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", .match = 0x0, .match_mask = 0x3f, @@ -1785,7 +1785,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", .match = 0x4, .match_mask = 0x4, @@ -1799,7 +1799,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", .match = 0x2, .match_mask = 0x2, @@ -1813,7 +1813,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", .match = 0x10, .match_mask = 0x30, @@ -1827,7 +1827,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", .match = 0x1800, .match_mask = 0x3830, @@ -1841,7 +1841,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", .match = 0x80, .match_mask = 0x1c2, @@ -1855,7 +1855,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", .match = 0x408, .match_mask = 0x64c, @@ -1869,7 +1869,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -1883,7 +1883,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x642, @@ -1897,7 +1897,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -1911,7 +1911,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", .match = 0x100, .match_mask = 0x1c0, @@ -1925,7 +1925,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -1939,7 +1939,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", .match = 0x1830, .match_mask = 0x3870, @@ -1953,7 +1953,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", .match = 0x2, .match_mask = 0x42, @@ -1967,7 +1967,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", .match = 0x202, .match_mask = 0x642, @@ -1981,7 +1981,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", .match = 0x1000, .match_mask = 0x3800, @@ -1995,7 +1995,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", .match = 0x82, .match_mask = 0x1c2, @@ -2009,7 +2009,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", .match = 0x12, .match_mask = 0x72, @@ -2023,7 +2023,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", .match = 0x2000, .match_mask = 0x3830, @@ -2037,7 +2037,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", .match = 0x180, .match_mask = 0x1c0, @@ -2051,7 +2051,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", .match = 0x404, .match_mask = 0x64c, @@ -2065,7 +2065,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", .match = 0x4, .match_mask = 0x4c, @@ -2079,7 +2079,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", .match = 0x8, .match_mask = 0x4c, @@ -2093,7 +2093,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -2107,7 +2107,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -2121,7 +2121,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -2135,7 +2135,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -2149,7 +2149,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -2163,7 +2163,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -2177,7 +2177,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -2191,7 +2191,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -2205,7 +2205,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -2219,7 +2219,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -2233,7 +2233,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", .match = 0x3000, .match_mask = 0x3800, @@ -2247,7 +2247,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", .match = 0x800, .match_mask = 0x3830, @@ -2261,7 +2261,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x70, @@ -2275,7 +2275,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3870, @@ -2289,7 +2289,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", .match = 0x30, .match_mask = 0x70, @@ -2303,7 +2303,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", .match = 0x10, .match_mask = 0x72, @@ -2317,7 +2317,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2800, .match_mask = 0x3800, @@ -2331,7 +2331,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", .match = 0x2030, .match_mask = 0x3870, @@ -2345,7 +2345,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", .match = 0x830, .match_mask = 0x3870, @@ -2359,7 +2359,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x1, @@ -2373,7 +2373,7 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, { - /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ .name = "INGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x1, @@ -2388,23 +2388,23 @@ bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MA }, }; -static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db_info = { +static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info = { .num_entries = 168, - .db = bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db + .db = bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_db }; -bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db_info_get(void) { - return &bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db_info; +bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info_get(void) { + return &bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info; } -static shr_enum_map_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +static shr_enum_map_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_map[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT }; -static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map_info = { +static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info = { .num_entries = 168, - .map = bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map + .map = bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_map }; -bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map_info_get(void) { - return &bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map_info; +bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info_get(void) { + return &bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info; } diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_pkt_flexhdr.c similarity index 73% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_pkt_flexhdr.c index 808a69c2b68..ee9d6caf69e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_pkt_flexhdr.c @@ -3,7 +3,7 @@ * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser * from the NPL output file(s) map.yml - * for device bcm56880_a0 and variant hna_6_5_30_3_0. + * for device bcm56880_a0 and variant hna_6_5_31_3_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -31,298 +31,298 @@ #include #include #include -#include -#include -#include +#include +#include +#include #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -static void bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +static void bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) { uint32_t *reason = data + 0; if (reason[12] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); } if (reason[12] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); } if (reason[12] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); } if (reason[12] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); } if (reason[12] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); } if (reason[12] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); } if (reason[12] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); } if (reason[12] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); } if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); } if (reason[12] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); } if (reason[12] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); } if (reason[12] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); } if (reason[12] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); } if (reason[12] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); } if (reason[12] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); } if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); } if (reason[12] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); } if (reason[12] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP); } if (reason[12] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP); } if (reason[12] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); } if (reason[12] & (0x1 << 20)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); } if (reason[12] & (0x1 << 21)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP); } if (reason[12] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); } if (reason[12] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); } if (reason[12] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); } if (reason[12] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); } if (reason[12] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); } if (reason[12] & (0x1 << 27)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); } if (reason[12] & (0x1 << 28)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); } if (reason[12] & (0x1 << 29)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[12] & (0x1 << 30)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[12] & (0x1 << 31)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); } if (reason[11] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); } if (reason[11] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); } if (reason[11] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); } if (reason[11] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); } if (reason[11] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); } if (reason[11] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); } if (reason[11] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); } if (reason[11] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); } if (reason[11] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); } if (reason[11] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); } } -static void bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +static void bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) { uint32_t *reason = data + 0; reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { reason[12] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { reason[12] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { reason[12] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { reason[12] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { reason[12] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { reason[12] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { reason[12] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { reason[12] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { reason[12] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { reason[12] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { reason[12] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { reason[12] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { reason[12] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { reason[12] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { reason[12] |= (0x1 << 14); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { reason[12] |= (0x1 << 15); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { reason[12] |= (0x1 << 16); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { reason[12] |= (0x1 << 17); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { reason[12] |= (0x1 << 18); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { reason[12] |= (0x1 << 19); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { reason[12] |= (0x1 << 20); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { reason[12] |= (0x1 << 21); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { reason[12] |= (0x1 << 22); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { reason[12] |= (0x1 << 23); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { reason[12] |= (0x1 << 24); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { reason[12] |= (0x1 << 25); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { reason[12] |= (0x1 << 26); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { reason[12] |= (0x1 << 27); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { reason[12] |= (0x1 << 28); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[12] |= (0x1 << 29); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[12] |= (0x1 << 30); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { reason[12] |= (0x1 << 31); } reason[11] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { reason[11] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { reason[11] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { reason[11] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { reason[11] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { reason[11] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { reason[11] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { reason[11] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { reason[11] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { reason[11] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { reason[11] |= (0x1 << 15); } } -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_data[] = { +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_field_data[] = { { .name = "DLB_ECMP_DESTINATION_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ { 240, 255 }, /* Profile 4. */ - { 240, 255 }, /* Profile 5. */ + { 224, 239 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "DROP_CODE_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -335,7 +335,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "DVP_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -348,31 +348,31 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "EFFECTIVE_TTL_7_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 176, 183 }, /* Profile 2. */ - { 176, 183 }, /* Profile 3. */ - { 176, 183 }, /* Profile 4. */ - { 176, 183 }, /* Profile 5. */ + { 160, 167 }, /* Profile 2. */ + { 144, 151 }, /* Profile 3. */ + { 160, 167 }, /* Profile 4. */ + { 144, 151 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 240, 255 }, /* Profile 2. */ - { 240, 255 }, /* Profile 3. */ + { 224, 239 }, /* Profile 3. */ }, .profile_cnt = 4, }, { .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -385,20 +385,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 192, 207 }, /* Profile 2. */ - { 192, 207 }, /* Profile 3. */ - { 192, 207 }, /* Profile 4. */ - { 192, 207 }, /* Profile 5. */ + { 176, 191 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "EVENT_TRACE_VECTOR_31_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -411,7 +411,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -424,20 +424,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "I2E_CLASS_ID_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 288, 303 }, /* Profile 2. */ - { 288, 303 }, /* Profile 3. */ + { 272, 287 }, /* Profile 3. */ { 288, 303 }, /* Profile 4. */ - { 288, 303 }, /* Profile 5. */ + { 272, 287 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "IFP_IOAM_GBP_ACTION_3_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -450,7 +450,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -463,7 +463,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "ING_PORT_GROUP_ID_3_0_3_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -476,7 +476,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "ING_PORT_GROUP_ID_7_4_3_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -489,7 +489,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "ING_TIMESTAMP_31_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -502,33 +502,33 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "INGRESS_PP_PORT_ITAG_PRESERVE_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 320, 335 }, /* Profile 2. */ - { 320, 335 }, /* Profile 3. */ + { 304, 319 }, /* Profile 3. */ { 320, 335 }, /* Profile 4. */ - { 320, 335 }, /* Profile 5. */ + { 304, 319 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 224, 239 }, /* Profile 2. */ - { 224, 239 }, /* Profile 3. */ - { 224, 239 }, /* Profile 4. */ - { 224, 239 }, /* Profile 5. */ + { 208, 223 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -541,7 +541,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "INT_PRI_3_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -554,7 +554,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "L2_IIF_10_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -566,72 +566,72 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "L2_OIF_10_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ - { 128, 138 }, /* Profile 3. */ + { 320, 330 }, /* Profile 3. */ { -1, -1 }, /* Profile 4. */ - { 128, 138 }, /* Profile 5. */ + { 320, 330 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "L3_IIF_13_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 160, 173 }, /* Profile 2. */ - { 160, 173 }, /* Profile 3. */ - { 160, 173 }, /* Profile 4. */ - { 160, 173 }, /* Profile 5. */ + { 144, 157 }, /* Profile 2. */ + { 128, 141 }, /* Profile 3. */ + { 144, 157 }, /* Profile 4. */ + { 128, 141 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "L3_OIF_1_13_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 128, 141 }, /* Profile 2. */ - { 112, 125 }, /* Profile 3. */ - { 128, 141 }, /* Profile 4. */ - { 112, 125 }, /* Profile 5. */ + { 336, 349 }, /* Profile 2. */ + { 336, 349 }, /* Profile 3. */ + { 336, 349 }, /* Profile 4. */ + { 336, 349 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 336, 351 }, /* Profile 2. */ - { 336, 351 }, /* Profile 3. */ - { 336, 351 }, /* Profile 4. */ - { 336, 351 }, /* Profile 5. */ + { 128, 143 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "NHOP_INDEX_1_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 208, 223 }, /* Profile 2. */ - { 208, 223 }, /* Profile 3. */ - { 208, 223 }, /* Profile 4. */ - { 208, 223 }, /* Profile 5. */ + { 192, 207 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -644,7 +644,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -657,20 +657,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "SVP_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 304, 319 }, /* Profile 2. */ - { 304, 319 }, /* Profile 3. */ + { 288, 303 }, /* Profile 3. */ { 304, 319 }, /* Profile 4. */ - { 304, 319 }, /* Profile 5. */ + { 288, 303 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -683,20 +683,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 272, 287 }, /* Profile 2. */ - { 272, 287 }, /* Profile 3. */ + { 256, 271 }, /* Profile 3. */ { 272, 287 }, /* Profile 4. */ - { 272, 287 }, /* Profile 5. */ + { 256, 271 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -709,20 +709,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 256, 271 }, /* Profile 2. */ - { 256, 271 }, /* Profile 3. */ + { 240, 255 }, /* Profile 3. */ { 256, 271 }, /* Profile 4. */ - { 256, 271 }, /* Profile 5. */ + { 240, 255 }, /* Profile 5. */ }, .profile_cnt = 6, }, { .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -735,7 +735,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -748,31 +748,35 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_ }, { .name = "VFI_15_0", - .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 144, 159 }, /* Profile 2. */ - { 144, 159 }, /* Profile 3. */ - { 144, 159 }, /* Profile 4. */ - { 144, 159 }, /* Profile 5. */ + { 224, 239 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + { 208, 223 }, /* Profile 5. */ }, .profile_cnt = 6, }, -};static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_data, +}; +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 1, + .profile_bmp[0] = 0x3c, + }; -static shr_enum_map_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_names[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +static shr_enum_map_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reason_names[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT }; -static bcmpkt_flex_reasons_info_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_names, - .reason_encode = bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_encode, - .reason_decode = bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_decode, +static bcmpkt_flex_reasons_info_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reason_names, + .reason_encode = bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reason_decode, }; @@ -915,7 +919,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_arp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_arp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_get, bcmpkt_arp_t_hardware_type_get, bcmpkt_arp_t_operation_get, @@ -927,7 +931,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_arp_t_fget[BCM56880_A0_HNA_6_ bcmpkt_arp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_arp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_arp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_set, bcmpkt_arp_t_hardware_type_set, bcmpkt_arp_t_operation_set, @@ -939,13 +943,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_arp_t_fset[BCM56880_A0_HNA_6_ bcmpkt_arp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_arp_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_arp_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_arp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_arp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_arp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_arp_t_field_data, }; @@ -1042,7 +1046,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_authen_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_authen_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_get, bcmpkt_authen_t_next_header_get, bcmpkt_authen_t_payload_len_get, @@ -1051,7 +1055,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_authen_t_fget[BCM56880_A0_HNA bcmpkt_authen_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_authen_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_authen_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_set, bcmpkt_authen_t_next_header_set, bcmpkt_authen_t_payload_len_set, @@ -1060,13 +1064,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_authen_t_fset[BCM56880_A0_HNA bcmpkt_authen_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_authen_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_authen_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_authen_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_authen_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_authen_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_authen_t_field_data, }; @@ -1315,7 +1319,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_bfd_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_bfd_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_get, bcmpkt_bfd_t_bfd_length_get, bcmpkt_bfd_t_cpi_get, @@ -1334,7 +1338,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_bfd_t_fget[BCM56880_A0_HNA_6_ bcmpkt_bfd_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_bfd_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_bfd_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_set, bcmpkt_bfd_t_bfd_length_set, bcmpkt_bfd_t_cpi_set, @@ -1353,13 +1357,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_bfd_t_fset[BCM56880_A0_HNA_6_ bcmpkt_bfd_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_bfd_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_bfd_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_bfd_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_bfd_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_bfd_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_bfd_t_field_data, }; @@ -1393,23 +1397,23 @@ static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_cntag_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_cntag_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_get, bcmpkt_cntag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_cntag_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_cntag_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_set, bcmpkt_cntag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_cntag_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_cntag_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_cntag_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_cntag_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_cntag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_cntag_t_field_data, }; @@ -1525,7 +1529,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_get, bcmpkt_cpu_composites_0_t_dma_cont1_get, bcmpkt_cpu_composites_0_t_dma_cont2_get, @@ -1535,7 +1539,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fget[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_set, bcmpkt_cpu_composites_0_t_dma_cont1_set, bcmpkt_cpu_composites_0_t_dma_cont2_set, @@ -1545,13 +1549,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fset[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_data, }; @@ -1731,7 +1735,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_get, bcmpkt_cpu_composites_1_t_dma_cont11_get, bcmpkt_cpu_composites_1_t_dma_cont12_get, @@ -1745,7 +1749,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fget[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_set, bcmpkt_cpu_composites_1_t_dma_cont11_set, bcmpkt_cpu_composites_1_t_dma_cont12_set, @@ -1759,13 +1763,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fset[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_data, }; @@ -1815,25 +1819,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_dest_option_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_dest_option_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_get, bcmpkt_dest_option_t_next_header_get, bcmpkt_dest_option_t_option_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_dest_option_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_dest_option_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_set, bcmpkt_dest_option_t_next_header_set, bcmpkt_dest_option_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_dest_option_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_dest_option_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_dest_option_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_dest_option_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_dest_option_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_dest_option_t_field_data, }; @@ -1973,7 +1977,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_get, bcmpkt_erspan3_fixed_hdr_t_cos_get, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, @@ -1985,7 +1989,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fget[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_set, bcmpkt_erspan3_fixed_hdr_t_cos_set, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, @@ -1997,13 +2001,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fset[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data, }; @@ -2068,27 +2072,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_get, bcmpkt_erspan3_subhdr_5_t_port_id_get, bcmpkt_erspan3_subhdr_5_t_switch_id_get, bcmpkt_erspan3_subhdr_5_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_set, bcmpkt_erspan3_subhdr_5_t_port_id_set, bcmpkt_erspan3_subhdr_5_t_switch_id_set, bcmpkt_erspan3_subhdr_5_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_data, }; @@ -2169,7 +2173,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_esp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_esp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_get, bcmpkt_esp_t_pad_get, bcmpkt_esp_t_pad_len_get, @@ -2177,7 +2181,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_esp_t_fget[BCM56880_A0_HNA_6_ bcmpkt_esp_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_esp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_esp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_set, bcmpkt_esp_t_pad_set, bcmpkt_esp_t_pad_len_set, @@ -2185,13 +2189,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_esp_t_fset[BCM56880_A0_HNA_6_ bcmpkt_esp_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_esp_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_esp_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_esp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_esp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_esp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_esp_t_field_data, }; @@ -2226,23 +2230,23 @@ static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_etag_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_etag_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT] = { bcmpkt_etag_t_tag_get, bcmpkt_etag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_etag_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_etag_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT] = { bcmpkt_etag_t_tag_set, bcmpkt_etag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_etag_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_etag_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_etag_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_etag_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_etag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_etag_t_field_data, }; @@ -2261,21 +2265,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ethertype_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ethertype_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ethertype_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ethertype_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ethertype_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ethertype_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ethertype_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_ethertype_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ethertype_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_ethertype_t_field_data, }; @@ -2340,27 +2344,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_frag_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_frag_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_get, bcmpkt_frag_t_id_get, bcmpkt_frag_t_next_header_get, bcmpkt_frag_t_reserved_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_frag_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_frag_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_set, bcmpkt_frag_t_id_set, bcmpkt_frag_t_next_header_set, bcmpkt_frag_t_reserved_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_frag_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_frag_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_frag_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_frag_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_frag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_frag_t_field_data, }; @@ -2589,7 +2593,7 @@ static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_get, bcmpkt_generic_loopback_t_destination_type_get, bcmpkt_generic_loopback_t_entropy_obj_get, @@ -2607,7 +2611,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fget[BCM56 bcmpkt_generic_loopback_t_svp_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_set, bcmpkt_generic_loopback_t_destination_type_set, bcmpkt_generic_loopback_t_entropy_obj_set, @@ -2625,13 +2629,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fset[BCM56 bcmpkt_generic_loopback_t_svp_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_field_data, }; @@ -2710,7 +2714,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gpe_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_gpe_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_get, bcmpkt_gpe_t_next_protocol_get, bcmpkt_gpe_t_reserved0_get, @@ -2718,7 +2722,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gpe_t_fget[BCM56880_A0_HNA_6_ bcmpkt_gpe_t_vni_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gpe_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_gpe_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_set, bcmpkt_gpe_t_next_protocol_set, bcmpkt_gpe_t_reserved0_set, @@ -2726,13 +2730,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gpe_t_fset[BCM56880_A0_HNA_6_ bcmpkt_gpe_t_vni_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gpe_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_gpe_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gpe_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_gpe_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_gpe_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_gpe_t_field_data, }; @@ -2766,23 +2770,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_get, bcmpkt_gre_chksum_t_offset_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_set, bcmpkt_gre_chksum_t_offset_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_field_data, }; @@ -2802,21 +2806,21 @@ static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_key_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_gre_key_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_key_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_gre_key_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_key_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_gre_key_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_key_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_gre_key_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_gre_key_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_gre_key_t_field_data, }; @@ -2836,21 +2840,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_field_data, }; @@ -2870,21 +2874,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_field_data, }; @@ -2948,27 +2952,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_gre_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_get, bcmpkt_gre_t_protocol_get, bcmpkt_gre_t_reserved_get, bcmpkt_gre_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_gre_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_set, bcmpkt_gre_t_protocol_set, bcmpkt_gre_t_reserved_set, bcmpkt_gre_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_gre_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_gre_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_gre_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_gre_t_field_data, }; @@ -3018,25 +3022,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_get, bcmpkt_hop_by_hop_t_next_header_get, bcmpkt_hop_by_hop_t_option_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_set, bcmpkt_hop_by_hop_t_next_header_set, bcmpkt_hop_by_hop_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_field_data, }; @@ -3085,25 +3089,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_icmp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_icmp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_get, bcmpkt_icmp_t_code_get, bcmpkt_icmp_t_icmp_type_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_icmp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_icmp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_set, bcmpkt_icmp_t_code_set, bcmpkt_icmp_t_icmp_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_icmp_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_icmp_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_icmp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_icmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_icmp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_icmp_t_field_data, }; @@ -3137,23 +3141,23 @@ static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int pr return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_data, }; @@ -3217,27 +3221,27 @@ static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_b_t_cn_get, bcmpkt_ifa_flex_md_0_b_t_port_speed_get, bcmpkt_ifa_flex_md_0_b_t_queue_id_get, bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { bcmpkt_ifa_flex_md_0_b_t_cn_set, bcmpkt_ifa_flex_md_0_b_t_port_speed_set, bcmpkt_ifa_flex_md_0_b_t_queue_id_set, bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_data, }; @@ -3287,25 +3291,25 @@ static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { bcmpkt_ifa_flex_md_1_t_egress_port_id_get, bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { bcmpkt_ifa_flex_md_1_t_egress_port_id_set, bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_data, }; @@ -3341,23 +3345,23 @@ static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, in return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_data, }; @@ -3393,23 +3397,23 @@ static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_data, }; @@ -3488,7 +3492,7 @@ static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { bcmpkt_ifa_header_t_flags_get, bcmpkt_ifa_header_t_gns_get, bcmpkt_ifa_header_t_max_length_get, @@ -3496,7 +3500,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fget[BCM56880_A0 bcmpkt_ifa_header_t_ver_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { bcmpkt_ifa_header_t_flags_set, bcmpkt_ifa_header_t_gns_set, bcmpkt_ifa_header_t_max_length_set, @@ -3504,13 +3508,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fset[BCM56880_A0 bcmpkt_ifa_header_t_ver_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_field_data, }; @@ -3559,25 +3563,25 @@ static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { bcmpkt_ifa_md_base_t_action_vector_get, bcmpkt_ifa_md_base_t_hop_limit_current_length_get, bcmpkt_ifa_md_base_t_request_vector_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { bcmpkt_ifa_md_base_t_action_vector_set, bcmpkt_ifa_md_base_t_hop_limit_current_length_set, bcmpkt_ifa_md_base_t_request_vector_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_field_data, }; @@ -3642,27 +3646,27 @@ static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { bcmpkt_ifa_metadata_t_action_vector_get, bcmpkt_ifa_metadata_t_hop_limit_current_length_get, bcmpkt_ifa_metadata_t_metadata_get, bcmpkt_ifa_metadata_t_request_vector_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { bcmpkt_ifa_metadata_t_action_vector_set, bcmpkt_ifa_metadata_t_hop_limit_current_length_set, bcmpkt_ifa_metadata_t_metadata_set, bcmpkt_ifa_metadata_t_request_vector_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_field_data, }; @@ -3727,27 +3731,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_igmp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_igmp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_get, bcmpkt_igmp_t_group_address_get, bcmpkt_igmp_t_igmp_type_get, bcmpkt_igmp_t_max_resp_time_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_igmp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_igmp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_set, bcmpkt_igmp_t_group_address_set, bcmpkt_igmp_t_igmp_type_set, bcmpkt_igmp_t_max_resp_time_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_igmp_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_igmp_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_igmp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_igmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_igmp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_igmp_t_field_data, }; @@ -3829,7 +3833,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ipfix_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_get, bcmpkt_ipfix_t_length_get, bcmpkt_ipfix_t_obs_domain_id_get, @@ -3837,7 +3841,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fget[BCM56880_A0_HNA_ bcmpkt_ipfix_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ipfix_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_set, bcmpkt_ipfix_t_length_set, bcmpkt_ipfix_t_obs_domain_id_set, @@ -3845,13 +3849,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fset[BCM56880_A0_HNA_ bcmpkt_ipfix_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ipfix_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ipfix_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ipfix_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_ipfix_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ipfix_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_ipfix_t_field_data, }; @@ -4023,7 +4027,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ipv4_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_get, bcmpkt_ipv4_t_flags_frag_offset_get, bcmpkt_ipv4_t_hdr_checksum_get, @@ -4037,7 +4041,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fget[BCM56880_A0_HNA_6 bcmpkt_ipv4_t_version_hdr_len_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ipv4_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_set, bcmpkt_ipv4_t_flags_frag_offset_set, bcmpkt_ipv4_t_hdr_checksum_set, @@ -4051,13 +4055,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fset[BCM56880_A0_HNA_6 bcmpkt_ipv4_t_version_hdr_len_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ipv4_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ipv4_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ipv4_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_ipv4_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ipv4_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_ipv4_t_field_data, }; @@ -4183,7 +4187,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ipv6_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_get, bcmpkt_ipv6_t_flow_label_get, bcmpkt_ipv6_t_hop_limit_get, @@ -4194,7 +4198,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fget[BCM56880_A0_HNA_6 bcmpkt_ipv6_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ipv6_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_set, bcmpkt_ipv6_t_flow_label_set, bcmpkt_ipv6_t_hop_limit_set, @@ -4205,13 +4209,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fset[BCM56880_A0_HNA_6 bcmpkt_ipv6_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ipv6_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ipv6_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ipv6_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_ipv6_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ipv6_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_ipv6_t_field_data, }; @@ -4247,23 +4251,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_l2_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_l2_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_get, bcmpkt_l2_t_macsa_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_l2_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_l2_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_set, bcmpkt_l2_t_macsa_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_l2_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_l2_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_l2_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_l2_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_l2_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_l2_t_field_data, }; @@ -4283,21 +4287,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_data, }; @@ -4317,21 +4321,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_field_data, }; @@ -4395,27 +4399,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_get, bcmpkt_mpls_ach_t_cw_type_get, bcmpkt_mpls_ach_t_reserved_get, bcmpkt_mpls_ach_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_set, bcmpkt_mpls_ach_t_cw_type_set, bcmpkt_mpls_ach_t_reserved_set, bcmpkt_mpls_ach_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_field_data, }; @@ -4435,21 +4439,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_field_data, }; @@ -4498,25 +4502,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_get, bcmpkt_mpls_cw_t_reserved_get, bcmpkt_mpls_cw_t_seq_number_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_set, bcmpkt_mpls_cw_t_reserved_set, bcmpkt_mpls_cw_t_seq_number_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_field_data, }; @@ -4580,27 +4584,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mpls_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_mpls_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_get, bcmpkt_mpls_t_exp_get, bcmpkt_mpls_t_label_get, bcmpkt_mpls_t_ttl_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mpls_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_mpls_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_set, bcmpkt_mpls_t_exp_set, bcmpkt_mpls_t_label_set, bcmpkt_mpls_t_ttl_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mpls_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_mpls_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mpls_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_mpls_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_mpls_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_mpls_t_field_data, }; @@ -4817,7 +4821,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_p_1588_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_get, bcmpkt_p_1588_t_correction_get, bcmpkt_p_1588_t_domain_nb_get, @@ -4834,7 +4838,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fget[BCM56880_A0_HNA bcmpkt_p_1588_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_p_1588_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_set, bcmpkt_p_1588_t_correction_set, bcmpkt_p_1588_t_domain_nb_set, @@ -4851,13 +4855,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fset[BCM56880_A0_HNA bcmpkt_p_1588_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_p_1588_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_p_1588_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_p_1588_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_p_1588_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_p_1588_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_p_1588_t_field_data, }; @@ -4907,25 +4911,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, bcmpkt_prog_ext_hdr_t_next_header_get, bcmpkt_prog_ext_hdr_t_option_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, bcmpkt_prog_ext_hdr_t_next_header_set, bcmpkt_prog_ext_hdr_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_data, }; @@ -5021,7 +5025,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_get, bcmpkt_psamp_0_t_length_get, bcmpkt_psamp_0_t_next_hop_index_get, @@ -5030,7 +5034,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fget[BCM56880_A0_HN bcmpkt_psamp_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_set, bcmpkt_psamp_0_t_length_set, bcmpkt_psamp_0_t_next_hop_index_set, @@ -5039,13 +5043,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fset[BCM56880_A0_HN bcmpkt_psamp_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_field_data, }; @@ -5154,7 +5158,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_get, bcmpkt_psamp_1_t_egress_port_get, bcmpkt_psamp_1_t_epoch_get, @@ -5164,7 +5168,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fget[BCM56880_A0_HN bcmpkt_psamp_1_t_variable_flag_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_set, bcmpkt_psamp_1_t_egress_port_set, bcmpkt_psamp_1_t_epoch_set, @@ -5174,13 +5178,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fset[BCM56880_A0_HN bcmpkt_psamp_1_t_variable_flag_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_field_data, }; @@ -5292,7 +5296,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, bcmpkt_psamp_mirror_on_drop_0_t_length_get, @@ -5302,7 +5306,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fget bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, bcmpkt_psamp_mirror_on_drop_0_t_length_set, @@ -5312,13 +5316,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fset bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data, }; @@ -5427,7 +5431,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *d return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get, bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, @@ -5437,7 +5441,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fget bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set, bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, @@ -5447,13 +5451,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fset bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_data, }; @@ -5596,7 +5600,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_rarp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_rarp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_get, bcmpkt_rarp_t_hardware_type_get, bcmpkt_rarp_t_operation_get, @@ -5608,7 +5612,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_rarp_t_fget[BCM56880_A0_HNA_6 bcmpkt_rarp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_rarp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_rarp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_set, bcmpkt_rarp_t_hardware_type_set, bcmpkt_rarp_t_operation_set, @@ -5620,13 +5624,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_rarp_t_fset[BCM56880_A0_HNA_6 bcmpkt_rarp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rarp_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_rarp_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_rarp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_rarp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_rarp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_rarp_t_field_data, }; @@ -5706,7 +5710,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_routing_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_routing_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_get, bcmpkt_routing_t_hdr_ext_len_get, bcmpkt_routing_t_next_header_get, @@ -5714,7 +5718,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_routing_t_fget[BCM56880_A0_HN bcmpkt_routing_t_segments_left_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_routing_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_routing_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_set, bcmpkt_routing_t_hdr_ext_len_set, bcmpkt_routing_t_next_header_set, @@ -5722,13 +5726,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_routing_t_fset[BCM56880_A0_HN bcmpkt_routing_t_segments_left_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_routing_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_routing_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_routing_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_routing_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_routing_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_routing_t_field_data, }; @@ -5762,23 +5766,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_rspan_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_rspan_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_get, bcmpkt_rspan_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_rspan_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_rspan_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_set, bcmpkt_rspan_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rspan_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_rspan_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_rspan_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_rspan_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_rspan_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_rspan_t_field_data, }; @@ -5828,25 +5832,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_get, bcmpkt_sflow_shim_0_t_sys_source_get, bcmpkt_sflow_shim_0_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_set, bcmpkt_sflow_shim_0_t_sys_source_set, bcmpkt_sflow_shim_0_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_data, }; @@ -5970,7 +5974,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_get, bcmpkt_sflow_shim_1_t_flag_discarded_get, bcmpkt_sflow_shim_1_t_flag_flex_sample_get, @@ -5981,7 +5985,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fget[BCM56880_ bcmpkt_sflow_shim_1_t_sys_opcode_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_set, bcmpkt_sflow_shim_1_t_flag_discarded_set, bcmpkt_sflow_shim_1_t_flag_flex_sample_set, @@ -5992,13 +5996,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fset[BCM56880_ bcmpkt_sflow_shim_1_t_sys_opcode_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_data, }; @@ -6033,23 +6037,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_get, bcmpkt_sflow_shim_2_t_user_meta_data_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_set, bcmpkt_sflow_shim_2_t_user_meta_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_data, }; @@ -6084,23 +6088,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_get, bcmpkt_snap_llc_t_snap_llc_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_set, bcmpkt_snap_llc_t_snap_llc_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_field_data, }; @@ -6134,23 +6138,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_get, bcmpkt_tcp_first_4bytes_t_src_port_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_set, bcmpkt_tcp_first_4bytes_t_src_port_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_data, }; @@ -6246,7 +6250,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_get, bcmpkt_tcp_last_16bytes_t_checksum_get, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, @@ -6255,7 +6259,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fget[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_set, bcmpkt_tcp_last_16bytes_t_checksum_set, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, @@ -6264,13 +6268,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fset[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_data, }; @@ -6334,27 +6338,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_udp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_udp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_get, bcmpkt_udp_t_dst_port_get, bcmpkt_udp_t_src_port_get, bcmpkt_udp_t_udp_length_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_udp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_udp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_set, bcmpkt_udp_t_dst_port_set, bcmpkt_udp_t_src_port_set, bcmpkt_udp_t_udp_length_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_udp_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_udp_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_udp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_udp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_udp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_udp_t_field_data, }; @@ -6390,23 +6394,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_field_data, }; @@ -6426,21 +6430,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_field_data, }; @@ -6490,25 +6494,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_get, bcmpkt_unknown_l5_t_l5_bytes_2_3_get, bcmpkt_unknown_l5_t_l5_bytes_4_7_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_set, bcmpkt_unknown_l5_t_l5_bytes_2_3_set, bcmpkt_unknown_l5_t_l5_bytes_4_7_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_field_data, }; @@ -6572,27 +6576,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_vlan_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_vlan_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_get, bcmpkt_vlan_t_pcp_get, bcmpkt_vlan_t_tpid_get, bcmpkt_vlan_t_vid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_vlan_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_vlan_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_set, bcmpkt_vlan_t_pcp_set, bcmpkt_vlan_t_tpid_set, bcmpkt_vlan_t_vid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_vlan_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_vlan_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_vlan_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_vlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_vlan_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_vlan_t_field_data, }; @@ -6627,23 +6631,23 @@ static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_vntag_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_vntag_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT] = { bcmpkt_vntag_t_tag_get, bcmpkt_vntag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_vntag_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_vntag_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT] = { bcmpkt_vntag_t_tag_set, bcmpkt_vntag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_vntag_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_vntag_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_vntag_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_vntag_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_vntag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_vntag_t_field_data, }; @@ -6693,25 +6697,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_vxlan_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_vxlan_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_get, bcmpkt_vxlan_t_reserved2_get, bcmpkt_vxlan_t_vn_id_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_vxlan_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_vxlan_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_set, bcmpkt_vxlan_t_reserved2_set, bcmpkt_vxlan_t_vn_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_vxlan_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_vxlan_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_vxlan_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_vxlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_vxlan_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_vxlan_t_field_data, }; @@ -6823,7 +6827,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_wesp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_wesp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_get, bcmpkt_wesp_t_header_len_get, bcmpkt_wesp_t_next_header_get, @@ -6833,7 +6837,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_wesp_t_fget[BCM56880_A0_HNA_6 bcmpkt_wesp_t_wesp_iv_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_wesp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_wesp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_set, bcmpkt_wesp_t_header_len_set, bcmpkt_wesp_t_next_header_set, @@ -6843,492 +6847,492 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_wesp_t_fset[BCM56880_A0_HNA_6 bcmpkt_wesp_t_wesp_iv_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_wesp_t_field_data[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_wesp_t_field_data[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_wesp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_30_3_0_wesp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_wesp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_31_3_0_wesp_t_field_data, }; -static bcmpkt_flex_pmd_info_t bcm56880_a0_hna_6_5_30_3_0_flexhdr_info_list[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_COUNT] = { +static bcmpkt_flex_pmd_info_t bcm56880_a0_hna_6_5_31_3_0_flexhdr_info_list[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT] = { { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_arp_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_arp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_arp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_arp_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_arp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_arp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_authen_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_authen_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_authen_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_authen_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_authen_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_authen_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_bfd_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_bfd_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_bfd_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_bfd_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_bfd_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_bfd_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_cntag_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_cntag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_cntag_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_cntag_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_cntag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_cntag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_dest_option_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_dest_option_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_dest_option_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_dest_option_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_dest_option_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_dest_option_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_esp_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_esp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_esp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_esp_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_esp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_esp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_etag_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_etag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_etag_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_etag_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_etag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_etag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_ethertype_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_ethertype_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ethertype_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ethertype_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ethertype_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ethertype_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_frag_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_frag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_frag_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_frag_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_frag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_frag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_gpe_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_gpe_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gpe_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gpe_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_gpe_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_gpe_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_key_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_gre_key_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_key_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_key_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_gre_key_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_gre_key_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_gre_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_gre_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_gre_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_icmp_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_icmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_icmp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_icmp_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_icmp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_icmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_igmp_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_igmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_igmp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_igmp_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_igmp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_igmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_ipfix_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_ipfix_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ipfix_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ipfix_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_ipv4_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_ipv4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ipv4_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ipv4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_ipv6_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_ipv6_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ipv6_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ipv6_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_l2_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_l2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_l2_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_l2_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_l2_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_l2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_mpls_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_mpls_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mpls_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mpls_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_mpls_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_mpls_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_p_1588_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_p_1588_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_p_1588_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_p_1588_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_rarp_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_rarp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_rarp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_rarp_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_rarp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_rarp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_routing_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_routing_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_routing_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_routing_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_routing_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_routing_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_rspan_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_rspan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_rspan_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_rspan_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_rspan_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_rspan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_udp_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_udp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_udp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_udp_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_udp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_udp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_vlan_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_vlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_vlan_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_vlan_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_vlan_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_vlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_vntag_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_vntag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_vntag_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_vntag_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_vntag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_vntag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_vxlan_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_vxlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_vxlan_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_vxlan_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_vxlan_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_vxlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_wesp_t_field_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_wesp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_30_3_0_wesp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_30_3_0_wesp_t_fset, + .flex_fget = bcm56880_a0_hna_6_5_31_3_0_wesp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_31_3_0_wesp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_info, - .reasons_info = &bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reasons_info, + .field_info = &bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_field_info, + .reasons_info = &bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reasons_info, .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, }, }; -static shr_enum_map_t bcm56880_a0_hna_6_5_30_3_0_flexhdr_id_map[] = { - BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +static shr_enum_map_t bcm56880_a0_hna_6_5_31_3_0_flexhdr_id_map[] = { + BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT }; -shr_enum_map_t * bcm56880_a0_hna_6_5_30_3_0_flexhdr_map_get(void) +shr_enum_map_t * bcm56880_a0_hna_6_5_31_3_0_flexhdr_map_get(void) { - return bcm56880_a0_hna_6_5_30_3_0_flexhdr_id_map; + return bcm56880_a0_hna_6_5_31_3_0_flexhdr_id_map; } -bcmpkt_flex_pmd_info_t * bcm56880_a0_hna_6_5_30_3_0_flex_pmd_info_get(uint32_t hid) +bcmpkt_flex_pmd_info_t * bcm56880_a0_hna_6_5_31_3_0_flex_pmd_info_get(uint32_t hid) { - if (hid >= BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_COUNT) { + if (hid >= BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT) { return NULL; } - return &bcm56880_a0_hna_6_5_30_3_0_flexhdr_info_list[hid]; + return &bcm56880_a0_hna_6_5_31_3_0_flexhdr_info_list[hid]; } -int bcm56880_a0_hna_6_5_30_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { +int bcm56880_a0_hna_6_5_31_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { 13, -1, -1, diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_match_id.c similarity index 84% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_match_id.c index 204bc407c6f..1c4de255495 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_match_id.c @@ -2,8 +2,8 @@ * * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56880_a0_nfa_6_5_30_1_1_sf_match_id_info.yml - * for device bcm56880_a0 and variant nfa_6_5_30_1_1. + * from the NPL output file(s) bcm56880_a0_nfa_6_5_31_3_1_sf_match_id_info.yml + * for device bcm56880_a0 and variant nfa_6_5_31_3_1. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -29,13 +29,13 @@ #include -#include +#include static bcmpkt_rxpmd_match_id_db_t -bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT] = { +bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_COUNT] = { { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", .match = 0x80, .match_mask = 0xc0, @@ -49,7 +49,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", .match = 0x10, .match_mask = 0x10, @@ -63,7 +63,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ .name = "EGRESS_PKT_FWD_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -77,7 +77,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ .name = "EGRESS_PKT_FWD_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -91,7 +91,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG */ .name = "EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", .match = 0x20, .match_mask = 0x20, @@ -105,7 +105,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", .match = 0x8, .match_mask = 0x8, @@ -119,7 +119,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN */ .name = "EGRESS_PKT_FWD_L2_HDR_RSPAN", .match = 0x4, .match_mask = 0x4, @@ -133,7 +133,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", .match = 0x2, .match_mask = 0x2, @@ -147,7 +147,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", .match = 0x40, .match_mask = 0xc0, @@ -161,7 +161,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", .match = 0x8, .match_mask = 0x58, @@ -175,7 +175,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", .match = 0x180, .match_mask = 0x1c0, @@ -189,7 +189,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", .match = 0x418, .match_mask = 0x658, @@ -203,7 +203,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -217,7 +217,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x646, @@ -231,7 +231,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -245,7 +245,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", .match = 0x98, .match_mask = 0x1d8, @@ -259,7 +259,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -273,7 +273,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", .match = 0x1006, .match_mask = 0x3846, @@ -287,7 +287,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", .match = 0x4, .match_mask = 0x46, @@ -301,7 +301,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", .match = 0x204, .match_mask = 0x646, @@ -315,7 +315,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", .match = 0x804, .match_mask = 0x3846, @@ -329,7 +329,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", .match = 0x100, .match_mask = 0x1c0, @@ -343,7 +343,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", .match = 0x24, .match_mask = 0x66, @@ -357,7 +357,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", .match = 0x2800, .match_mask = 0x3800, @@ -371,7 +371,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", .match = 0x2000, .match_mask = 0x3800, @@ -385,7 +385,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE", .match = 0x826, .match_mask = 0x3866, @@ -399,7 +399,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT", .match = 0x26, .match_mask = 0x66, @@ -413,7 +413,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3826, @@ -427,7 +427,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", .match = 0x410, .match_mask = 0x658, @@ -441,7 +441,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", .match = 0x10, .match_mask = 0x58, @@ -455,7 +455,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", .match = 0x18, .match_mask = 0x58, @@ -469,7 +469,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -483,7 +483,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -497,7 +497,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -511,7 +511,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -525,7 +525,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -539,7 +539,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -553,7 +553,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -567,7 +567,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -581,7 +581,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -595,7 +595,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -609,7 +609,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", .match = 0x1800, .match_mask = 0x3800, @@ -623,7 +623,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", .match = 0x2, .match_mask = 0x46, @@ -637,7 +637,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x66, @@ -651,7 +651,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3866, @@ -665,7 +665,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", .match = 0x6, .match_mask = 0x46, @@ -679,7 +679,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", .match = 0x80, .match_mask = 0x1d8, @@ -693,7 +693,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", .match = 0x1000, .match_mask = 0x3806, @@ -707,7 +707,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", .match = 0x3000, .match_mask = 0x3800, @@ -721,7 +721,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", .match = 0x806, .match_mask = 0x3866, @@ -735,7 +735,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x1, @@ -749,7 +749,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ .name = "EGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x1, @@ -763,7 +763,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", .match = 0x80, .match_mask = 0xc0, @@ -777,7 +777,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", .match = 0x10, .match_mask = 0x10, @@ -791,7 +791,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -805,7 +805,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -819,7 +819,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", .match = 0x20, .match_mask = 0x20, @@ -833,7 +833,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", .match = 0x8, .match_mask = 0x8, @@ -847,7 +847,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", .match = 0x4, .match_mask = 0x4, @@ -861,7 +861,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", .match = 0x2, .match_mask = 0x2, @@ -875,7 +875,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", .match = 0x40, .match_mask = 0xc0, @@ -889,7 +889,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", .match = 0x8, .match_mask = 0x58, @@ -903,7 +903,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", .match = 0x180, .match_mask = 0x1c0, @@ -917,7 +917,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", .match = 0x418, .match_mask = 0x658, @@ -931,7 +931,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -945,7 +945,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x646, @@ -959,7 +959,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -973,7 +973,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", .match = 0x98, .match_mask = 0x1d8, @@ -987,7 +987,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -1001,7 +1001,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", .match = 0x1006, .match_mask = 0x3846, @@ -1015,7 +1015,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", .match = 0x4, .match_mask = 0x46, @@ -1029,7 +1029,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", .match = 0x204, .match_mask = 0x646, @@ -1043,7 +1043,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", .match = 0x804, .match_mask = 0x3846, @@ -1057,7 +1057,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", .match = 0x100, .match_mask = 0x1c0, @@ -1071,7 +1071,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", .match = 0x24, .match_mask = 0x66, @@ -1085,7 +1085,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", .match = 0x2800, .match_mask = 0x3800, @@ -1099,7 +1099,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", .match = 0x2000, .match_mask = 0x3800, @@ -1113,7 +1113,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE", .match = 0x826, .match_mask = 0x3866, @@ -1127,7 +1127,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT", .match = 0x26, .match_mask = 0x66, @@ -1141,7 +1141,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3826, @@ -1155,7 +1155,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", .match = 0x410, .match_mask = 0x658, @@ -1169,7 +1169,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", .match = 0x10, .match_mask = 0x58, @@ -1183,7 +1183,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", .match = 0x18, .match_mask = 0x58, @@ -1197,7 +1197,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -1211,7 +1211,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -1225,7 +1225,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -1239,7 +1239,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -1253,7 +1253,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -1267,7 +1267,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -1281,7 +1281,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -1295,7 +1295,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -1309,7 +1309,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -1323,7 +1323,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -1337,7 +1337,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", .match = 0x1800, .match_mask = 0x3800, @@ -1351,7 +1351,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", .match = 0x2, .match_mask = 0x46, @@ -1365,7 +1365,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x66, @@ -1379,7 +1379,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3866, @@ -1393,7 +1393,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", .match = 0x6, .match_mask = 0x46, @@ -1407,7 +1407,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", .match = 0x80, .match_mask = 0x1d8, @@ -1421,7 +1421,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", .match = 0x1000, .match_mask = 0x3806, @@ -1435,7 +1435,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", .match = 0x3000, .match_mask = 0x3800, @@ -1449,7 +1449,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", .match = 0x806, .match_mask = 0x3866, @@ -1463,7 +1463,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", .match = 0x80, .match_mask = 0xc0, @@ -1477,7 +1477,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", .match = 0x10, .match_mask = 0x10, @@ -1491,7 +1491,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ .name = "INGRESS_PKT_INNER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -1505,7 +1505,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ .name = "INGRESS_PKT_INNER_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -1519,7 +1519,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG */ .name = "INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", .match = 0x20, .match_mask = 0x20, @@ -1533,7 +1533,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", .match = 0x8, .match_mask = 0x8, @@ -1547,7 +1547,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN */ .name = "INGRESS_PKT_INNER_L2_HDR_RSPAN", .match = 0x4, .match_mask = 0x4, @@ -1561,7 +1561,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", .match = 0x2, .match_mask = 0x2, @@ -1575,7 +1575,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", .match = 0x40, .match_mask = 0xc0, @@ -1589,7 +1589,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", .match = 0x8, .match_mask = 0x58, @@ -1603,7 +1603,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", .match = 0x180, .match_mask = 0x1c0, @@ -1617,7 +1617,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", .match = 0x418, .match_mask = 0x658, @@ -1631,7 +1631,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -1645,7 +1645,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x646, @@ -1659,7 +1659,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -1673,7 +1673,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", .match = 0x98, .match_mask = 0x1d8, @@ -1687,7 +1687,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -1701,7 +1701,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3826, @@ -1715,7 +1715,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", .match = 0x410, .match_mask = 0x658, @@ -1729,7 +1729,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", .match = 0x10, .match_mask = 0x58, @@ -1743,7 +1743,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", .match = 0x18, .match_mask = 0x58, @@ -1757,7 +1757,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -1771,7 +1771,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", .match = 0x1800, .match_mask = 0x3800, @@ -1785,7 +1785,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", .match = 0x2, .match_mask = 0x46, @@ -1799,7 +1799,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x66, @@ -1813,7 +1813,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3866, @@ -1827,7 +1827,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", .match = 0x6, .match_mask = 0x46, @@ -1841,7 +1841,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", .match = 0x80, .match_mask = 0x1d8, @@ -1855,7 +1855,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", .match = 0x1000, .match_mask = 0x3806, @@ -1869,7 +1869,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", .match = 0x3000, .match_mask = 0x3800, @@ -1883,7 +1883,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", .match = 0x80, .match_mask = 0xc0, @@ -1897,7 +1897,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", .match = 0x10, .match_mask = 0x10, @@ -1911,7 +1911,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ .name = "INGRESS_PKT_OUTER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -1925,7 +1925,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -1939,7 +1939,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", .match = 0x20, .match_mask = 0x20, @@ -1953,7 +1953,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", .match = 0x8, .match_mask = 0x8, @@ -1967,7 +1967,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN */ .name = "INGRESS_PKT_OUTER_L2_HDR_RSPAN", .match = 0x4, .match_mask = 0x4, @@ -1981,7 +1981,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", .match = 0x2, .match_mask = 0x2, @@ -1995,7 +1995,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", .match = 0x40, .match_mask = 0xc0, @@ -2009,7 +2009,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", .match = 0x8, .match_mask = 0x58, @@ -2023,7 +2023,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", .match = 0x180, .match_mask = 0x1c0, @@ -2037,7 +2037,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", .match = 0x418, .match_mask = 0x658, @@ -2051,7 +2051,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", .match = 0x3800, .match_mask = 0x3800, @@ -2065,7 +2065,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", .match = 0x200, .match_mask = 0x646, @@ -2079,7 +2079,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -2093,7 +2093,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", .match = 0x98, .match_mask = 0x1d8, @@ -2107,7 +2107,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", .match = 0x600, .match_mask = 0x640, @@ -2121,7 +2121,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", .match = 0x1006, .match_mask = 0x3846, @@ -2135,7 +2135,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", .match = 0x4, .match_mask = 0x46, @@ -2149,7 +2149,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", .match = 0x204, .match_mask = 0x646, @@ -2163,7 +2163,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", .match = 0x804, .match_mask = 0x3846, @@ -2177,7 +2177,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", .match = 0x100, .match_mask = 0x1c0, @@ -2191,7 +2191,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", .match = 0x24, .match_mask = 0x66, @@ -2205,7 +2205,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", .match = 0x2800, .match_mask = 0x3800, @@ -2219,7 +2219,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", .match = 0x2000, .match_mask = 0x3800, @@ -2233,7 +2233,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE", .match = 0x826, .match_mask = 0x3866, @@ -2247,7 +2247,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT", .match = 0x26, .match_mask = 0x66, @@ -2261,7 +2261,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3826, @@ -2275,7 +2275,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", .match = 0x410, .match_mask = 0x658, @@ -2289,7 +2289,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", .match = 0x10, .match_mask = 0x58, @@ -2303,7 +2303,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", .match = 0x18, .match_mask = 0x58, @@ -2317,7 +2317,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", .match = 0x40, .match_mask = 0x40, @@ -2331,7 +2331,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", .match = 0x42, .match_mask = 0x42, @@ -2345,7 +2345,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", .match = 0x44, .match_mask = 0x44, @@ -2359,7 +2359,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", .match = 0x48, .match_mask = 0x48, @@ -2373,7 +2373,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", .match = 0x50, .match_mask = 0x50, @@ -2387,7 +2387,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", .match = 0x60, .match_mask = 0x60, @@ -2401,7 +2401,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", .match = 0xc0, .match_mask = 0xc0, @@ -2415,7 +2415,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", .match = 0x140, .match_mask = 0x140, @@ -2429,7 +2429,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", .match = 0x240, .match_mask = 0x240, @@ -2443,7 +2443,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3fff, @@ -2457,7 +2457,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", .match = 0x1800, .match_mask = 0x3800, @@ -2471,7 +2471,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", .match = 0x2, .match_mask = 0x46, @@ -2485,7 +2485,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x20, .match_mask = 0x66, @@ -2499,7 +2499,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x820, .match_mask = 0x3866, @@ -2513,7 +2513,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", .match = 0x6, .match_mask = 0x46, @@ -2527,7 +2527,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", .match = 0x80, .match_mask = 0x1d8, @@ -2541,7 +2541,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", .match = 0x1000, .match_mask = 0x3806, @@ -2555,7 +2555,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", .match = 0x3000, .match_mask = 0x3800, @@ -2569,7 +2569,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", .match = 0x806, .match_mask = 0x3866, @@ -2583,7 +2583,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x1, @@ -2597,7 +2597,7 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, { - /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ .name = "INGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x1, @@ -2612,23 +2612,23 @@ bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MA }, }; -static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db_info = { +static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_db_info = { .num_entries = 184, - .db = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db + .db = bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_db }; -bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db_info_get(void) { - return &bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db_info; +bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_db_info_get(void) { + return &bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_db_info; } -static shr_enum_map_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +static shr_enum_map_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_map[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT }; -static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map_info = { +static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_map_info = { .num_entries = 184, - .map = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map + .map = bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_map }; -bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map_info_get(void) { - return &bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map_info; +bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_map_info_get(void) { + return &bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_map_info; } diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_pkt_flexhdr.c similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_pkt_flexhdr.c index 712374abd77..260ad0d6a1d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_pkt_flexhdr.c @@ -3,7 +3,7 @@ * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser * from the NPL output file(s) map.yml - * for device bcm56880_a0 and variant nfa_6_5_30_1_1. + * for device bcm56880_a0 and variant nfa_6_5_31_3_1. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -31,309 +31,309 @@ #include #include #include -#include -#include -#include +#include +#include +#include #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -static void bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +static void bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) { uint32_t *reason = data + 0; if (reason[12] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); } if (reason[12] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); } if (reason[12] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); } if (reason[12] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); } if (reason[12] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); } if (reason[12] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); } if (reason[12] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); } if (reason[12] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); } if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); } if (reason[12] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); } if (reason[12] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); } if (reason[12] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); } if (reason[12] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); } if (reason[12] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); } if (reason[12] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); } if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); } if (reason[12] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); } if (reason[12] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP); } if (reason[12] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP); } if (reason[12] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); } if (reason[12] & (0x1 << 20)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP); } if (reason[12] & (0x1 << 21)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP); } if (reason[12] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT); } if (reason[12] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT); } if (reason[12] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); } if (reason[12] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); } if (reason[12] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); } if (reason[12] & (0x1 << 27)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); } if (reason[12] & (0x1 << 28)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); } if (reason[12] & (0x1 << 29)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[12] & (0x1 << 30)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[12] & (0x1 << 31)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); } if (reason[11] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); } if (reason[11] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); } if (reason[11] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); } if (reason[11] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); } if (reason[11] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); } if (reason[11] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); } if (reason[11] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); } if (reason[11] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); } if (reason[11] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS); } if (reason[11] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS); } if (reason[11] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF); } if (reason[11] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED); } if (reason[11] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED); } if (reason[11] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); } } -static void bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +static void bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) { uint32_t *reason = data + 0; reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { reason[12] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { reason[12] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { reason[12] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { reason[12] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { reason[12] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { reason[12] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { reason[12] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { reason[12] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { reason[12] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { reason[12] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { reason[12] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { reason[12] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { reason[12] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { reason[12] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { reason[12] |= (0x1 << 14); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { reason[12] |= (0x1 << 15); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { reason[12] |= (0x1 << 16); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) { reason[12] |= (0x1 << 17); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) { reason[12] |= (0x1 << 18); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { reason[12] |= (0x1 << 19); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { reason[12] |= (0x1 << 20); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) { reason[12] |= (0x1 << 21); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { reason[12] |= (0x1 << 22); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { reason[12] |= (0x1 << 23); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { reason[12] |= (0x1 << 24); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { reason[12] |= (0x1 << 25); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { reason[12] |= (0x1 << 26); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { reason[12] |= (0x1 << 27); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { reason[12] |= (0x1 << 28); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[12] |= (0x1 << 29); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[12] |= (0x1 << 30); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { reason[12] |= (0x1 << 31); } reason[11] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { reason[11] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { reason[11] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { reason[11] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { reason[11] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { reason[11] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { reason[11] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { reason[11] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { reason[11] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS)) { reason[11] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS)) { reason[11] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF)) { reason[11] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED)) { reason[11] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED)) { reason[11] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { reason[11] |= (0x1 << 15); } } -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_data[] = { +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_field_data[] = { { .name = "DLB_ECMP_DESTINATION_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -344,7 +344,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "DROP_CODE_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -357,7 +357,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "DVP_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DVP_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -370,7 +370,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "EFFECTIVE_TTL_7_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -383,7 +383,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -396,7 +396,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "EVENT_TRACE_VECTOR_31_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -409,7 +409,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -422,7 +422,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "I2E_CLASS_ID_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -435,7 +435,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -448,7 +448,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "ING_ETAG_ACTION_3_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -461,7 +461,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "ING_ETAG_PCP_DEI_3_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -474,7 +474,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "ING_ETAG_VID_16_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -487,7 +487,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "ING_TIMESTAMP_31_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -500,7 +500,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "INGRESS_PP_PORT_7_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -513,7 +513,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -526,7 +526,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -539,7 +539,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "INT_PRI_3_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -552,7 +552,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "L2_IIF_10_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -564,7 +564,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "L2_OIF_10_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -577,7 +577,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "L3_IIF_13_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -590,7 +590,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "L3_OIF_1_13_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -603,7 +603,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "MPLS_LABEL_DECAP_COUNT_3_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -616,7 +616,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -629,7 +629,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "NHOP_INDEX_1_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -642,7 +642,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -655,7 +655,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -668,7 +668,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "SVP_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -681,7 +681,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -694,7 +694,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -707,7 +707,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -720,7 +720,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "T_VLAN_TAG_VALUE_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -733,7 +733,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -746,7 +746,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -759,7 +759,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "VFI_15_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VFI_15_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_VFI_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -772,7 +772,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, { .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", - .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -783,20 +783,24 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_ }, .profile_cnt = 6, }, -};static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_data, }; +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_field_data, + .profile_bmp_cnt = 1, + .profile_bmp[0] = 0x3c, -static shr_enum_map_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_names[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT }; -static bcmpkt_flex_reasons_info_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reasons_info = { - .num_reasons = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_names, - .reason_encode = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_encode, - .reason_decode = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_decode, +static shr_enum_map_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reason_names[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reasons_info = { + .num_reasons = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reason_names, + .reason_encode = bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reason_encode, + .reason_decode = bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reason_decode, }; @@ -939,7 +943,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_arp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_arp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_get, bcmpkt_arp_t_hardware_type_get, bcmpkt_arp_t_operation_get, @@ -951,7 +955,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_arp_t_fget[BCM56880_A0_NFA_6_ bcmpkt_arp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_arp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_arp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_set, bcmpkt_arp_t_hardware_type_set, bcmpkt_arp_t_operation_set, @@ -963,13 +967,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_arp_t_fset[BCM56880_A0_NFA_6_ bcmpkt_arp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_arp_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_arp_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_arp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_arp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_arp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_arp_t_field_data, }; @@ -1066,7 +1070,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_authen_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_authen_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_get, bcmpkt_authen_t_next_header_get, bcmpkt_authen_t_payload_len_get, @@ -1075,7 +1079,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_authen_t_fget[BCM56880_A0_NFA bcmpkt_authen_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_authen_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_authen_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_set, bcmpkt_authen_t_next_header_set, bcmpkt_authen_t_payload_len_set, @@ -1084,13 +1088,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_authen_t_fset[BCM56880_A0_NFA bcmpkt_authen_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_authen_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_authen_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_authen_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_authen_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_authen_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_authen_t_field_data, }; @@ -1339,7 +1343,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_bfd_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_get, bcmpkt_bfd_t_bfd_length_get, bcmpkt_bfd_t_cpi_get, @@ -1358,7 +1362,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fget[BCM56880_A0_NFA_6_ bcmpkt_bfd_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_bfd_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_set, bcmpkt_bfd_t_bfd_length_set, bcmpkt_bfd_t_cpi_set, @@ -1377,13 +1381,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fset[BCM56880_A0_NFA_6_ bcmpkt_bfd_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_bfd_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_bfd_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_bfd_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_bfd_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_bfd_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_bfd_t_field_data, }; @@ -1499,7 +1503,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_get, bcmpkt_cpu_composites_0_t_dma_cont1_get, bcmpkt_cpu_composites_0_t_dma_cont2_get, @@ -1509,7 +1513,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fget[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_set, bcmpkt_cpu_composites_0_t_dma_cont1_set, bcmpkt_cpu_composites_0_t_dma_cont2_set, @@ -1519,13 +1523,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fset[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_field_data, }; @@ -1705,7 +1709,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_get, bcmpkt_cpu_composites_1_t_dma_cont11_get, bcmpkt_cpu_composites_1_t_dma_cont12_get, @@ -1719,7 +1723,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fget[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_set, bcmpkt_cpu_composites_1_t_dma_cont11_set, bcmpkt_cpu_composites_1_t_dma_cont12_set, @@ -1733,13 +1737,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fset[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_field_data, }; @@ -1789,25 +1793,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_get, bcmpkt_dest_option_t_next_header_get, bcmpkt_dest_option_t_option_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_set, bcmpkt_dest_option_t_next_header_set, bcmpkt_dest_option_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_field_data, }; @@ -1947,7 +1951,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_get, bcmpkt_erspan3_fixed_hdr_t_cos_get, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, @@ -1959,7 +1963,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fget[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_set, bcmpkt_erspan3_fixed_hdr_t_cos_set, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, @@ -1971,13 +1975,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fset[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_field_data, }; @@ -2042,27 +2046,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_get, bcmpkt_erspan3_subhdr_5_t_port_id_get, bcmpkt_erspan3_subhdr_5_t_switch_id_get, bcmpkt_erspan3_subhdr_5_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_set, bcmpkt_erspan3_subhdr_5_t_port_id_set, bcmpkt_erspan3_subhdr_5_t_switch_id_set, bcmpkt_erspan3_subhdr_5_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_field_data, }; @@ -2143,7 +2147,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_esp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_esp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_get, bcmpkt_esp_t_pad_get, bcmpkt_esp_t_pad_len_get, @@ -2151,7 +2155,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_esp_t_fget[BCM56880_A0_NFA_6_ bcmpkt_esp_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_esp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_esp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_set, bcmpkt_esp_t_pad_set, bcmpkt_esp_t_pad_len_set, @@ -2159,13 +2163,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_esp_t_fset[BCM56880_A0_NFA_6_ bcmpkt_esp_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_esp_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_esp_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_esp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_esp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_esp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_esp_t_field_data, }; @@ -2259,7 +2263,7 @@ static int32_t bcmpkt_etag_t_vid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_etag_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_etag_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FID_COUNT] = { bcmpkt_etag_t_pcp_dei_get, bcmpkt_etag_t_rsrvd0_get, bcmpkt_etag_t_rsrvd1_get, @@ -2268,7 +2272,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_etag_t_fget[BCM56880_A0_NFA_6 bcmpkt_etag_t_vid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_etag_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_etag_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FID_COUNT] = { bcmpkt_etag_t_pcp_dei_set, bcmpkt_etag_t_rsrvd0_set, bcmpkt_etag_t_rsrvd1_set, @@ -2277,13 +2281,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_etag_t_fset[BCM56880_A0_NFA_6 bcmpkt_etag_t_vid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_etag_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_etag_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_etag_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_etag_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_etag_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_etag_t_field_data, }; @@ -2302,21 +2306,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_field_data, }; @@ -2381,27 +2385,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_frag_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_frag_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_get, bcmpkt_frag_t_id_get, bcmpkt_frag_t_next_header_get, bcmpkt_frag_t_reserved_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_frag_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_frag_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_set, bcmpkt_frag_t_id_set, bcmpkt_frag_t_next_header_set, bcmpkt_frag_t_reserved_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_frag_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_frag_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_frag_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_frag_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_frag_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_frag_t_field_data, }; @@ -2630,7 +2634,7 @@ static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_get, bcmpkt_generic_loopback_t_destination_type_get, bcmpkt_generic_loopback_t_entropy_obj_get, @@ -2648,7 +2652,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fget[BCM56 bcmpkt_generic_loopback_t_start_byte_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_set, bcmpkt_generic_loopback_t_destination_type_set, bcmpkt_generic_loopback_t_entropy_obj_set, @@ -2666,13 +2670,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fset[BCM56 bcmpkt_generic_loopback_t_start_byte_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_field_data, }; @@ -2751,7 +2755,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gpe_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_get, bcmpkt_gpe_t_next_protocol_get, bcmpkt_gpe_t_reserved0_get, @@ -2759,7 +2763,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fget[BCM56880_A0_NFA_6_ bcmpkt_gpe_t_vni_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gpe_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_set, bcmpkt_gpe_t_next_protocol_set, bcmpkt_gpe_t_reserved0_set, @@ -2767,13 +2771,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fset[BCM56880_A0_NFA_6_ bcmpkt_gpe_t_vni_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gpe_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gpe_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gpe_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_gpe_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gpe_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_gpe_t_field_data, }; @@ -2807,23 +2811,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_get, bcmpkt_gre_chksum_t_offset_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_set, bcmpkt_gre_chksum_t_offset_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_field_data, }; @@ -2857,23 +2861,23 @@ static int32_t bcmpkt_gre_key_t_vn_id_upper_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_vn_id_lower_entropy_get, bcmpkt_gre_key_t_vn_id_upper_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_vn_id_lower_entropy_set, bcmpkt_gre_key_t_vn_id_upper_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_field_data, }; @@ -2893,21 +2897,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_field_data, }; @@ -2927,21 +2931,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_field_data, }; @@ -3005,27 +3009,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gre_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_get, bcmpkt_gre_t_protocol_get, bcmpkt_gre_t_reserved_get, bcmpkt_gre_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gre_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_set, bcmpkt_gre_t_protocol_set, bcmpkt_gre_t_reserved_set, bcmpkt_gre_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gre_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_gre_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gre_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_gre_t_field_data, }; @@ -3077,25 +3081,25 @@ static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FID_COUNT] = { bcmpkt_gtp_12byte_t_bytes_11_8_get, bcmpkt_gtp_12byte_t_bytes_3_0_get, bcmpkt_gtp_12byte_t_bytes_7_4_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FID_COUNT] = { bcmpkt_gtp_12byte_t_bytes_11_8_set, bcmpkt_gtp_12byte_t_bytes_3_0_set, bcmpkt_gtp_12byte_t_bytes_7_4_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_field_data, }; @@ -3131,23 +3135,23 @@ static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FID_COUNT] = { bcmpkt_gtp_8byte_t_bytes_3_0_get, bcmpkt_gtp_8byte_t_bytes_7_4_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FID_COUNT] = { bcmpkt_gtp_8byte_t_bytes_3_0_set, bcmpkt_gtp_8byte_t_bytes_7_4_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_field_data, }; @@ -3167,21 +3171,21 @@ static int32_t bcmpkt_gtp_ext_4byte_t_ext_hdr_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = { bcmpkt_gtp_ext_4byte_t_ext_hdr_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = { bcmpkt_gtp_ext_4byte_t_ext_hdr_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_field_data, }; @@ -3233,25 +3237,25 @@ static int32_t bcmpkt_gtp_with_ext_t_bytes_7_4_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = { bcmpkt_gtp_with_ext_t_bytes_11_8_get, bcmpkt_gtp_with_ext_t_bytes_3_0_get, bcmpkt_gtp_with_ext_t_bytes_7_4_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = { bcmpkt_gtp_with_ext_t_bytes_11_8_set, bcmpkt_gtp_with_ext_t_bytes_3_0_set, bcmpkt_gtp_with_ext_t_bytes_7_4_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_field_data, }; @@ -3301,25 +3305,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_get, bcmpkt_hop_by_hop_t_next_header_get, bcmpkt_hop_by_hop_t_option_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_set, bcmpkt_hop_by_hop_t_next_header_set, bcmpkt_hop_by_hop_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_field_data, }; @@ -3368,25 +3372,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_icmp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_icmp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_get, bcmpkt_icmp_t_code_get, bcmpkt_icmp_t_icmp_type_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_icmp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_icmp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_set, bcmpkt_icmp_t_code_set, bcmpkt_icmp_t_icmp_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_icmp_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_icmp_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_icmp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_icmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_icmp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_icmp_t_field_data, }; @@ -3451,27 +3455,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_igmp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_igmp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_get, bcmpkt_igmp_t_group_address_get, bcmpkt_igmp_t_igmp_type_get, bcmpkt_igmp_t_max_resp_time_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_igmp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_igmp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_set, bcmpkt_igmp_t_group_address_set, bcmpkt_igmp_t_igmp_type_set, bcmpkt_igmp_t_max_resp_time_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_igmp_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_igmp_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_igmp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_igmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_igmp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_igmp_t_field_data, }; @@ -3553,7 +3557,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_get, bcmpkt_ipfix_t_length_get, bcmpkt_ipfix_t_obs_domain_id_get, @@ -3561,7 +3565,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fget[BCM56880_A0_NFA_ bcmpkt_ipfix_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_set, bcmpkt_ipfix_t_length_set, bcmpkt_ipfix_t_obs_domain_id_set, @@ -3569,13 +3573,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fset[BCM56880_A0_NFA_ bcmpkt_ipfix_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_field_data, }; @@ -3747,7 +3751,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_get, bcmpkt_ipv4_t_flags_frag_offset_get, bcmpkt_ipv4_t_hdr_checksum_get, @@ -3761,7 +3765,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fget[BCM56880_A0_NFA_6 bcmpkt_ipv4_t_version_hdr_len_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_set, bcmpkt_ipv4_t_flags_frag_offset_set, bcmpkt_ipv4_t_hdr_checksum_set, @@ -3775,13 +3779,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fset[BCM56880_A0_NFA_6 bcmpkt_ipv4_t_version_hdr_len_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_field_data, }; @@ -3907,7 +3911,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_get, bcmpkt_ipv6_t_flow_label_get, bcmpkt_ipv6_t_hop_limit_get, @@ -3918,7 +3922,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fget[BCM56880_A0_NFA_6 bcmpkt_ipv6_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_set, bcmpkt_ipv6_t_flow_label_set, bcmpkt_ipv6_t_hop_limit_set, @@ -3929,13 +3933,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fset[BCM56880_A0_NFA_6 bcmpkt_ipv6_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_field_data, }; @@ -3971,23 +3975,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_l2_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_l2_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_get, bcmpkt_l2_t_macsa_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_l2_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_l2_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_set, bcmpkt_l2_t_macsa_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_l2_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_l2_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_l2_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_l2_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_l2_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_l2_t_field_data, }; @@ -4007,21 +4011,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_field_data, }; @@ -4041,21 +4045,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_field_data, }; @@ -4119,27 +4123,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_get, bcmpkt_mpls_ach_t_cw_type_get, bcmpkt_mpls_ach_t_reserved_get, bcmpkt_mpls_ach_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_set, bcmpkt_mpls_ach_t_cw_type_set, bcmpkt_mpls_ach_t_reserved_set, bcmpkt_mpls_ach_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_field_data, }; @@ -4159,21 +4163,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_field_data, }; @@ -4222,25 +4226,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_get, bcmpkt_mpls_cw_t_reserved_get, bcmpkt_mpls_cw_t_seq_number_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_set, bcmpkt_mpls_cw_t_reserved_set, bcmpkt_mpls_cw_t_seq_number_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_field_data, }; @@ -4304,27 +4308,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mpls_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_mpls_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_get, bcmpkt_mpls_t_exp_get, bcmpkt_mpls_t_label_get, bcmpkt_mpls_t_ttl_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mpls_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_mpls_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_set, bcmpkt_mpls_t_exp_set, bcmpkt_mpls_t_label_set, bcmpkt_mpls_t_ttl_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mpls_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_mpls_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mpls_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_mpls_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_mpls_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_mpls_t_field_data, }; @@ -4358,23 +4362,23 @@ static int32_t bcmpkt_opaquetag_t_vlan_tag_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FID_COUNT] = { bcmpkt_opaquetag_t_tpid_get, bcmpkt_opaquetag_t_vlan_tag_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FID_COUNT] = { bcmpkt_opaquetag_t_tpid_set, bcmpkt_opaquetag_t_vlan_tag_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_field_data, }; @@ -4591,7 +4595,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_get, bcmpkt_p_1588_t_correction_get, bcmpkt_p_1588_t_domain_nb_get, @@ -4608,7 +4612,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fget[BCM56880_A0_NFA bcmpkt_p_1588_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_set, bcmpkt_p_1588_t_correction_set, bcmpkt_p_1588_t_domain_nb_set, @@ -4625,13 +4629,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fset[BCM56880_A0_NFA bcmpkt_p_1588_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_field_data, }; @@ -4681,25 +4685,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, bcmpkt_prog_ext_hdr_t_next_header_get, bcmpkt_prog_ext_hdr_t_option_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, bcmpkt_prog_ext_hdr_t_next_header_set, bcmpkt_prog_ext_hdr_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_field_data, }; @@ -4795,7 +4799,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_get, bcmpkt_psamp_0_t_length_get, bcmpkt_psamp_0_t_next_hop_index_get, @@ -4804,7 +4808,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fget[BCM56880_A0_NF bcmpkt_psamp_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_set, bcmpkt_psamp_0_t_length_set, bcmpkt_psamp_0_t_next_hop_index_set, @@ -4813,13 +4817,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fset[BCM56880_A0_NF bcmpkt_psamp_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_field_data, }; @@ -4928,7 +4932,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_get, bcmpkt_psamp_1_t_egress_port_get, bcmpkt_psamp_1_t_epoch_get, @@ -4938,7 +4942,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fget[BCM56880_A0_NF bcmpkt_psamp_1_t_variable_flag_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_set, bcmpkt_psamp_1_t_egress_port_set, bcmpkt_psamp_1_t_epoch_set, @@ -4948,13 +4952,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fset[BCM56880_A0_NF bcmpkt_psamp_1_t_variable_flag_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_field_data, }; @@ -5066,7 +5070,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, bcmpkt_psamp_mirror_on_drop_0_t_length_get, @@ -5076,7 +5080,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, bcmpkt_psamp_mirror_on_drop_0_t_length_set, @@ -5086,13 +5090,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_field_data, }; @@ -5186,7 +5190,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *d return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, @@ -5195,7 +5199,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fget bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, @@ -5204,13 +5208,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fset bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_field_data, }; @@ -5353,7 +5357,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_rarp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_get, bcmpkt_rarp_t_hardware_type_get, bcmpkt_rarp_t_operation_get, @@ -5365,7 +5369,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fget[BCM56880_A0_NFA_6 bcmpkt_rarp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_rarp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_set, bcmpkt_rarp_t_hardware_type_set, bcmpkt_rarp_t_operation_set, @@ -5377,13 +5381,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fset[BCM56880_A0_NFA_6 bcmpkt_rarp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rarp_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_rarp_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_rarp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_rarp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_rarp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_rarp_t_field_data, }; @@ -5463,7 +5467,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_routing_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_routing_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_get, bcmpkt_routing_t_hdr_ext_len_get, bcmpkt_routing_t_next_header_get, @@ -5471,7 +5475,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_routing_t_fget[BCM56880_A0_NF bcmpkt_routing_t_segments_left_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_routing_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_routing_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_set, bcmpkt_routing_t_hdr_ext_len_set, bcmpkt_routing_t_next_header_set, @@ -5479,13 +5483,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_routing_t_fset[BCM56880_A0_NF bcmpkt_routing_t_segments_left_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_routing_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_routing_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_routing_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_routing_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_routing_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_routing_t_field_data, }; @@ -5519,23 +5523,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_rspan_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_rspan_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_get, bcmpkt_rspan_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_rspan_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_rspan_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_set, bcmpkt_rspan_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rspan_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_rspan_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_rspan_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_rspan_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_rspan_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_rspan_t_field_data, }; @@ -5585,25 +5589,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_get, bcmpkt_sflow_shim_0_t_sys_source_get, bcmpkt_sflow_shim_0_t_version_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_set, bcmpkt_sflow_shim_0_t_sys_source_set, bcmpkt_sflow_shim_0_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_field_data, }; @@ -5727,7 +5731,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_get, bcmpkt_sflow_shim_1_t_flag_discarded_get, bcmpkt_sflow_shim_1_t_flag_flex_sample_get, @@ -5738,7 +5742,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fget[BCM56880_ bcmpkt_sflow_shim_1_t_sys_opcode_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_set, bcmpkt_sflow_shim_1_t_flag_discarded_set, bcmpkt_sflow_shim_1_t_flag_flex_sample_set, @@ -5749,13 +5753,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fset[BCM56880_ bcmpkt_sflow_shim_1_t_sys_opcode_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_field_data, }; @@ -5790,23 +5794,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_get, bcmpkt_sflow_shim_2_t_user_meta_data_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_set, bcmpkt_sflow_shim_2_t_user_meta_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_field_data, }; @@ -5841,23 +5845,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_get, bcmpkt_snap_llc_t_snap_llc_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_set, bcmpkt_snap_llc_t_snap_llc_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_field_data, }; @@ -5891,23 +5895,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_get, bcmpkt_tcp_first_4bytes_t_src_port_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_set, bcmpkt_tcp_first_4bytes_t_src_port_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_field_data, }; @@ -6003,7 +6007,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_get, bcmpkt_tcp_last_16bytes_t_checksum_get, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, @@ -6012,7 +6016,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fget[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_set, bcmpkt_tcp_last_16bytes_t_checksum_set, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, @@ -6021,13 +6025,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fset[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_field_data, }; @@ -6091,27 +6095,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_udp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_udp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_get, bcmpkt_udp_t_dst_port_get, bcmpkt_udp_t_src_port_get, bcmpkt_udp_t_udp_length_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_udp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_udp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_set, bcmpkt_udp_t_dst_port_set, bcmpkt_udp_t_src_port_set, bcmpkt_udp_t_udp_length_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_udp_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_udp_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_udp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_udp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_udp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_udp_t_field_data, }; @@ -6147,23 +6151,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_field_data, }; @@ -6183,21 +6187,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_field_data, }; @@ -6247,25 +6251,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_get, bcmpkt_unknown_l5_t_l5_bytes_2_3_get, bcmpkt_unknown_l5_t_l5_bytes_4_7_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_set, bcmpkt_unknown_l5_t_l5_bytes_2_3_set, bcmpkt_unknown_l5_t_l5_bytes_4_7_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_field_data, }; @@ -6329,27 +6333,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_vlan_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_vlan_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_get, bcmpkt_vlan_t_pcp_get, bcmpkt_vlan_t_tpid_get, bcmpkt_vlan_t_vid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_vlan_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_vlan_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_set, bcmpkt_vlan_t_pcp_set, bcmpkt_vlan_t_tpid_set, bcmpkt_vlan_t_vid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_vlan_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_vlan_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_vlan_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_vlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_vlan_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_vlan_t_field_data, }; @@ -6384,23 +6388,23 @@ static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_vntag_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_vntag_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FID_COUNT] = { bcmpkt_vntag_t_tag_get, bcmpkt_vntag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_vntag_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_vntag_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FID_COUNT] = { bcmpkt_vntag_t_tag_set, bcmpkt_vntag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_vntag_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_vntag_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_vntag_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_vntag_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_vntag_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_vntag_t_field_data, }; @@ -6450,25 +6454,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_upper_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_get, bcmpkt_vxlan_t_vn_id_lower_reserved2_get, bcmpkt_vxlan_t_vn_id_upper_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_set, bcmpkt_vxlan_t_vn_id_lower_reserved2_set, bcmpkt_vxlan_t_vn_id_upper_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_field_data, }; @@ -6580,7 +6584,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_wesp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_get, bcmpkt_wesp_t_header_len_get, bcmpkt_wesp_t_next_header_get, @@ -6590,7 +6594,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fget[BCM56880_A0_NFA_6 bcmpkt_wesp_t_wesp_iv_get, }; -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_wesp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_set, bcmpkt_wesp_t_header_len_set, bcmpkt_wesp_t_next_header_set, @@ -6600,464 +6604,464 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fset[BCM56880_A0_NFA_6 bcmpkt_wesp_t_wesp_iv_set, }; -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_wesp_t_field_data[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_wesp_t_field_data[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_wesp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_30_1_1_wesp_t_field_data, +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_wesp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_31_3_1_wesp_t_field_data, }; -static bcmpkt_flex_pmd_info_t bcm56880_a0_nfa_6_5_30_1_1_flexhdr_info_list[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT] = { +static bcmpkt_flex_pmd_info_t bcm56880_a0_nfa_6_5_31_3_1_flexhdr_info_list[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_COUNT] = { { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_arp_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_arp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_arp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_arp_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_arp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_arp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_authen_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_authen_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_authen_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_authen_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_authen_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_authen_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_bfd_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_bfd_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_bfd_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_bfd_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_esp_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_esp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_esp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_esp_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_esp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_esp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_etag_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_etag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_etag_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_etag_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_etag_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_etag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_frag_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_frag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_frag_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_frag_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_frag_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_frag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gpe_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gpe_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gpe_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gpe_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gre_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gre_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gre_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_icmp_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_icmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_icmp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_icmp_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_icmp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_icmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_igmp_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_igmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_igmp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_igmp_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_igmp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_igmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_l2_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_l2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_l2_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_l2_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_l2_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_l2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mpls_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_mpls_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mpls_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mpls_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_mpls_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_mpls_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_rarp_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_rarp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_rarp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_rarp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_routing_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_routing_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_routing_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_routing_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_routing_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_routing_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_rspan_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_rspan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_rspan_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_rspan_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_rspan_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_rspan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_udp_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_udp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_udp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_udp_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_udp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_udp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_vlan_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_vlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_vlan_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_vlan_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_vlan_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_vlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_vntag_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_vntag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_vntag_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_vntag_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_vntag_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_vntag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_wesp_t_field_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_wesp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fset, + .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_wesp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_wesp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_info, - .reasons_info = &bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reasons_info, + .field_info = &bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_field_info, + .reasons_info = &bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reasons_info, .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, }, }; -static shr_enum_map_t bcm56880_a0_nfa_6_5_30_1_1_flexhdr_id_map[] = { - BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_NAME_MAP_INIT +static shr_enum_map_t bcm56880_a0_nfa_6_5_31_3_1_flexhdr_id_map[] = { + BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_NAME_MAP_INIT }; -shr_enum_map_t * bcm56880_a0_nfa_6_5_30_1_1_flexhdr_map_get(void) +shr_enum_map_t * bcm56880_a0_nfa_6_5_31_3_1_flexhdr_map_get(void) { - return bcm56880_a0_nfa_6_5_30_1_1_flexhdr_id_map; + return bcm56880_a0_nfa_6_5_31_3_1_flexhdr_id_map; } -bcmpkt_flex_pmd_info_t * bcm56880_a0_nfa_6_5_30_1_1_flex_pmd_info_get(uint32_t hid) +bcmpkt_flex_pmd_info_t * bcm56880_a0_nfa_6_5_31_3_1_flex_pmd_info_get(uint32_t hid) { - if (hid >= BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT) { + if (hid >= BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_COUNT) { return NULL; } - return &bcm56880_a0_nfa_6_5_30_1_1_flexhdr_info_list[hid]; + return &bcm56880_a0_nfa_6_5_31_3_1_flexhdr_info_list[hid]; } -int bcm56880_a0_nfa_6_5_30_1_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { +int bcm56880_a0_nfa_6_5_31_3_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { 12, -1, -1, diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c index e881973ef1e..1854e50d6c3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c @@ -2,8 +2,8 @@ * * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56890_a0_cna_6_5_30_2_0_sf_match_id_info.yml - * for device bcm56890_a0 and variant cna_6_5_30_2_0. + * from the NPL output file(s) bcm56890_a0_cna_6_5_31_3_0_sf_match_id_info.yml + * for device bcm56890_a0 and variant cna_6_5_31_3_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -29,178 +29,178 @@ #include -#include +#include -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = { 0x8, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = { 0xe, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = { 0xc, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = { 0x4, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] = { 0x7fffe, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] = { 0x810, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] = { 0x3f8, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] = { 0x1fc00, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] = { 0x20000, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] = { 0x3060, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] = { 0x2040, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] = { 0xc180, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] = { 0x40000, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] = { 0x10200, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] = { 0x8100, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] = { 0x28, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] = { 0x3e, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] = { 0x30, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = { 0x4, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[1] = { 0x1ffffe, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] = { 0x1010, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] = { 0x7f8, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[1] = { 0x7f800, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[1] = { 0x80000, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[1] = { 0x6060, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[1] = { 0x4040, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[1] = { 0x38380, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[1] = { 0x100000, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[1] = { 0x40400, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[1] = { 0x10100, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[1] = { 0x20200, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = { 0x4, }; -static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = { 0x8, }; static bcmpkt_rxpmd_match_id_db_t -bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT] = { +bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT] = { { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", .match = 0x2, .match_mask = 0x2, @@ -214,7 +214,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ .name = "EGRESS_PKT_FWD_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -228,7 +228,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ .name = "EGRESS_PKT_FWD_L2_HDR_NONE", .match = 0x0, .match_mask = 0x7, @@ -242,7 +242,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", .match = 0x4, .match_mask = 0x4, @@ -256,7 +256,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", .match = 0x20, .match_mask = 0x66, @@ -270,7 +270,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -284,7 +284,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", .match = 0x40, .match_mask = 0x66, @@ -298,7 +298,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", .match = 0x8, .match_mask = 0x18, @@ -312,7 +312,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", .match = 0x10, .match_mask = 0x18, @@ -326,7 +326,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x7f, @@ -340,7 +340,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", .match = 0x2, .match_mask = 0x6, @@ -354,7 +354,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x4, .match_mask = 0x6, @@ -368,7 +368,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x24, .match_mask = 0x66, @@ -382,7 +382,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", .match = 0x6, .match_mask = 0x6, @@ -396,7 +396,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", .match = 0x18, .match_mask = 0x18, @@ -410,7 +410,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", .match = 0x60, .match_mask = 0x60, @@ -424,7 +424,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", .match = 0x46, .match_mask = 0x66, @@ -438,7 +438,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", .match = 0x26, .match_mask = 0x66, @@ -452,7 +452,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ .name = "EGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -466,7 +466,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -480,7 +480,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ .name = "EGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -494,7 +494,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", .match = 0x2, .match_mask = 0x2, @@ -508,7 +508,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -522,7 +522,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", .match = 0x0, .match_mask = 0x7, @@ -536,7 +536,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", .match = 0x4, .match_mask = 0x4, @@ -550,7 +550,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", .match = 0x20, .match_mask = 0x66, @@ -564,7 +564,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -578,7 +578,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", .match = 0x40, .match_mask = 0x66, @@ -592,7 +592,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", .match = 0x8, .match_mask = 0x18, @@ -606,7 +606,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", .match = 0x10, .match_mask = 0x18, @@ -620,7 +620,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x7f, @@ -634,7 +634,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", .match = 0x2, .match_mask = 0x6, @@ -648,7 +648,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x4, .match_mask = 0x6, @@ -662,7 +662,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x24, .match_mask = 0x66, @@ -676,7 +676,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", .match = 0x6, .match_mask = 0x6, @@ -690,7 +690,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", .match = 0x18, .match_mask = 0x18, @@ -704,7 +704,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", .match = 0x60, .match_mask = 0x60, @@ -718,7 +718,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", .match = 0x46, .match_mask = 0x66, @@ -732,7 +732,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", .match = 0x26, .match_mask = 0x66, @@ -746,7 +746,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", .match = 0x2, .match_mask = 0x2, @@ -760,11 +760,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 10, .arc_id_mask = 0xc00, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ .name = "INGRESS_PKT_INNER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -778,11 +778,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 10, .arc_id_mask = 0xc00, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ .name = "INGRESS_PKT_INNER_L2_HDR_NONE", .match = 0x0, .match_mask = 0x7, @@ -798,7 +798,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", .match = 0x4, .match_mask = 0x4, @@ -812,11 +812,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 10, .arc_id_mask = 0xc00, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", .match = 0x20, .match_mask = 0x66, @@ -830,11 +830,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 12, .arc_id_mask = 0x1f000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -848,11 +848,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 12, .arc_id_mask = 0x1f000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", .match = 0x40, .match_mask = 0x66, @@ -866,11 +866,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 12, .arc_id_mask = 0x1f000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", .match = 0x8, .match_mask = 0x18, @@ -884,11 +884,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 12, .arc_id_mask = 0x1f000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", .match = 0x10, .match_mask = 0x18, @@ -902,11 +902,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 12, .arc_id_mask = 0x1f000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x7f, @@ -922,7 +922,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", .match = 0x2, .match_mask = 0x6, @@ -936,11 +936,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 12, .arc_id_mask = 0x1f000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x4, .match_mask = 0x6, @@ -954,11 +954,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 12, .arc_id_mask = 0x1f000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x24, .match_mask = 0x66, @@ -972,11 +972,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 12, .arc_id_mask = 0x1f000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", .match = 0x6, .match_mask = 0x6, @@ -990,11 +990,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 12, .arc_id_mask = 0x1f000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", .match = 0x18, .match_mask = 0x18, @@ -1008,11 +1008,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 12, .arc_id_mask = 0x1f000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", .match = 0x60, .match_mask = 0x60, @@ -1026,11 +1026,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 12, .arc_id_mask = 0x1f000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", .match = 0x46, .match_mask = 0x66, @@ -1044,11 +1044,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 12, .arc_id_mask = 0x1f000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", .match = 0x2, .match_mask = 0x2, @@ -1062,11 +1062,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1c, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ .name = "INGRESS_PKT_OUTER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -1080,11 +1080,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1c, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", .match = 0x0, .match_mask = 0x7, @@ -1100,7 +1100,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", .match = 0x4, .match_mask = 0x4, @@ -1114,11 +1114,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1c, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", .match = 0x20, .match_mask = 0x66, @@ -1132,11 +1132,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 5, .arc_id_mask = 0x3e0, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -1150,11 +1150,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 5, .arc_id_mask = 0x3e0, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", .match = 0x40, .match_mask = 0x66, @@ -1168,11 +1168,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 5, .arc_id_mask = 0x3e0, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", .match = 0x8, .match_mask = 0x18, @@ -1186,11 +1186,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 5, .arc_id_mask = 0x3e0, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", .match = 0x10, .match_mask = 0x18, @@ -1204,11 +1204,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 5, .arc_id_mask = 0x3e0, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x7f, @@ -1224,7 +1224,7 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", .match = 0x2, .match_mask = 0x6, @@ -1238,11 +1238,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 5, .arc_id_mask = 0x3e0, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x4, .match_mask = 0x6, @@ -1256,11 +1256,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 5, .arc_id_mask = 0x3e0, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x24, .match_mask = 0x66, @@ -1274,11 +1274,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 5, .arc_id_mask = 0x3e0, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", .match = 0x6, .match_mask = 0x6, @@ -1292,11 +1292,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 5, .arc_id_mask = 0x3e0, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", .match = 0x18, .match_mask = 0x18, @@ -1310,11 +1310,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 5, .arc_id_mask = 0x3e0, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", .match = 0x60, .match_mask = 0x60, @@ -1328,11 +1328,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 5, .arc_id_mask = 0x3e0, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", .match = 0x46, .match_mask = 0x66, @@ -1346,11 +1346,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 5, .arc_id_mask = 0x3e0, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", .match = 0x26, .match_mask = 0x66, @@ -1364,11 +1364,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 5, .arc_id_mask = 0x3e0, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ .name = "INGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -1382,11 +1382,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 0, .arc_id_mask = 0x3, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -1400,11 +1400,11 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA .zone_minbit = 0, .arc_id_mask = 0x3, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, }, { - /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ .name = "INGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -1421,23 +1421,23 @@ bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MA }, }; -static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info = { +static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info = { .num_entries = 77, - .db = bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db + .db = bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_db }; -bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info_get(void) { - return &bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info; +bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info_get(void) { + return &bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info; } -static shr_enum_map_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +static shr_enum_map_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_map[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT }; -static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info = { +static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info = { .num_entries = 77, - .map = bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map + .map = bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_map }; -bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info_get(void) { - return &bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info; +bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info_get(void) { + return &bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info; } diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_pkt_flexhdr.c similarity index 74% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_pkt_flexhdr.c index 93a8aa7726a..254f825fd76 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_pkt_flexhdr.c @@ -3,7 +3,7 @@ * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser * from the NPL output file(s) map.yml - * for device bcm56890_a0 and variant cna_6_5_30_2_0. + * for device bcm56890_a0 and variant cna_6_5_31_3_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -31,516 +31,444 @@ #include #include #include -#include -#include -#include +#include +#include +#include #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -static void bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +static void bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) { uint32_t *reason = data + 0; if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); } if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); } if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); } if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); } if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); } if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); } if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); } if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); } if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); } if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); } if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); } if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); } if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); } if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); } if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP); } if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP); } if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); } if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); } if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); } } -static void bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +static void bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) { uint32_t *reason = data + 0; reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { reason[13] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { reason[13] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { reason[13] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { reason[13] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { reason[13] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { reason[13] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { reason[13] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { reason[13] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { reason[13] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { reason[13] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { reason[13] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { reason[13] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { reason[13] |= (0x1 << 14); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { reason[13] |= (0x1 << 16); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { reason[13] |= (0x1 << 17); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { reason[13] |= (0x1 << 18); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { reason[13] |= (0x1 << 19); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { reason[13] |= (0x1 << 23); } reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { reason[12] |= (0x1 << 15); } } -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_data[] = { +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_field_data[] = { { .name = "DROP_CODE_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 48, 63 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ { 48, 63 }, /* Profile 4. */ - { 48, 63 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { 48, 63 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "DVP_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 128, 143 }, /* Profile 2. */ { 112, 127 }, /* Profile 3. */ { 128, 143 }, /* Profile 4. */ - { 112, 127 }, /* Profile 5. */ - { 96, 111 }, /* Profile 6. */ - { 112, 127 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "EFFECTIVE_TTL_7_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 336, 343 }, /* Profile 2. */ { 336, 343 }, /* Profile 3. */ { 336, 343 }, /* Profile 4. */ - { 304, 311 }, /* Profile 5. */ - { 304, 311 }, /* Profile 6. */ - { 304, 311 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 400, 403 }, /* Profile 2. */ { 400, 403 }, /* Profile 3. */ { 400, 403 }, /* Profile 4. */ - { 368, 371 }, /* Profile 5. */ - { 368, 371 }, /* Profile 6. */ - { 368, 371 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 368, 383 }, /* Profile 2. */ { 368, 383 }, /* Profile 3. */ { 368, 383 }, /* Profile 4. */ - { 336, 351 }, /* Profile 5. */ - { 336, 351 }, /* Profile 6. */ - { 336, 351 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "EP_NIH_HDR_DROP_CODE_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { 176, 191 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { 144, 159 }, /* Profile 6. */ }, - .profile_cnt = 7, + .profile_cnt = 4, }, { .name = "EP_NIH_HDR_RECIRC_CODE_3_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 388, 391 }, /* Profile 2. */ { 388, 391 }, /* Profile 3. */ { 388, 391 }, /* Profile 4. */ - { 356, 359 }, /* Profile 5. */ - { 356, 359 }, /* Profile 6. */ - { 356, 359 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "EP_NIH_HDR_TIMESTAMP_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 144, 159 }, /* Profile 2. */ { 128, 143 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { 128, 143 }, /* Profile 5. */ - { 112, 127 }, /* Profile 6. */ }, - .profile_cnt = 7, + .profile_cnt = 4, }, { .name = "EP_NIH_HDR_TIMESTAMP_31_16", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 160, 175 }, /* Profile 2. */ { 144, 159 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { 144, 159 }, /* Profile 5. */ - { 128, 143 }, /* Profile 6. */ }, - .profile_cnt = 7, + .profile_cnt = 4, }, { .name = "ERSPAN3_GBP_SID_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 352, 367 }, /* Profile 2. */ { 352, 367 }, /* Profile 3. */ { 352, 367 }, /* Profile 4. */ - { 320, 335 }, /* Profile 5. */ - { 320, 335 }, /* Profile 6. */ - { 320, 335 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "EVENT_TRACE_VECTOR_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 0, 15 }, /* Profile 2. */ { 0, 15 }, /* Profile 3. */ { 0, 15 }, /* Profile 4. */ - { 0, 15 }, /* Profile 5. */ - { 0, 15 }, /* Profile 6. */ - { 0, 15 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "EVENT_TRACE_VECTOR_31_16", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 16, 31 }, /* Profile 2. */ { 16, 31 }, /* Profile 3. */ { 16, 31 }, /* Profile 4. */ - { 16, 31 }, /* Profile 5. */ - { 16, 31 }, /* Profile 6. */ - { 16, 31 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 32, 47 }, /* Profile 2. */ { 32, 47 }, /* Profile 3. */ { 32, 47 }, /* Profile 4. */ - { 32, 47 }, /* Profile 5. */ - { 32, 47 }, /* Profile 6. */ - { 32, 47 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "I2E_CLASS_ID_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 208, 223 }, /* Profile 2. */ - { 208, 223 }, /* Profile 3. */ - { 208, 223 }, /* Profile 4. */ - { 176, 191 }, /* Profile 5. */ - { 176, 191 }, /* Profile 6. */ - { 176, 191 }, /* Profile 7. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "ING_TIMESTAMP_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ { 144, 159 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { 128, 143 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "ING_TIMESTAMP_31_16", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ { 160, 175 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { 144, 159 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "INGRESS_PP_PORT_8_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 272, 280 }, /* Profile 2. */ { 272, 280 }, /* Profile 3. */ { 272, 280 }, /* Profile 4. */ - { 240, 248 }, /* Profile 5. */ - { 240, 248 }, /* Profile 6. */ - { 240, 248 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 224, 239 }, /* Profile 2. */ - { 224, 239 }, /* Profile 3. */ - { 224, 239 }, /* Profile 4. */ - { 192, 207 }, /* Profile 5. */ - { 192, 207 }, /* Profile 6. */ - { 192, 207 }, /* Profile 7. */ + { 208, 223 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 408, 411 }, /* Profile 2. */ { 408, 411 }, /* Profile 3. */ { 408, 411 }, /* Profile 4. */ - { 376, 379 }, /* Profile 5. */ - { 376, 379 }, /* Profile 6. */ - { 376, 379 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "INT_PRI_3_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 416, 419 }, /* Profile 2. */ { 416, 419 }, /* Profile 3. */ { 416, 419 }, /* Profile 4. */ - { 384, 387 }, /* Profile 5. */ - { 384, 387 }, /* Profile 6. */ - { 384, 387 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "L2_IIF_10_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 192, 202 }, /* Profile 2. */ - { 192, 202 }, /* Profile 3. */ - { 192, 202 }, /* Profile 4. */ - { 160, 170 }, /* Profile 5. */ - { 160, 170 }, /* Profile 6. */ - { 160, 170 }, /* Profile 7. */ + { 224, 234 }, /* Profile 2. */ + { 224, 234 }, /* Profile 3. */ + { 224, 234 }, /* Profile 4. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "L2_OIF_10_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 96, 106 }, /* Profile 2. */ { 80, 90 }, /* Profile 3. */ { 96, 106 }, /* Profile 4. */ - { 96, 106 }, /* Profile 5. */ - { 80, 90 }, /* Profile 6. */ - { 96, 106 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "L2_TUNNEL_SVP_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 240, 255 }, /* Profile 2. */ { 240, 255 }, /* Profile 3. */ { 240, 255 }, /* Profile 4. */ - { 208, 223 }, /* Profile 5. */ - { 208, 223 }, /* Profile 6. */ - { 208, 223 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "L3_IIF_13_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 256, 269 }, /* Profile 2. */ { 256, 269 }, /* Profile 3. */ { 256, 269 }, /* Profile 4. */ - { 224, 237 }, /* Profile 5. */ - { 224, 237 }, /* Profile 6. */ - { 224, 237 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "L3_OIF_1_13_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -552,22 +480,19 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_ }, { .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 304, 318 }, /* Profile 2. */ { 304, 318 }, /* Profile 3. */ { 304, 318 }, /* Profile 4. */ - { 272, 286 }, /* Profile 5. */ - { 272, 286 }, /* Profile 6. */ - { 272, 286 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "NHOP_INDEX_1_14_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -579,153 +504,130 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_ }, { .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 64, 79 }, /* Profile 2. */ { 48, 63 }, /* Profile 3. */ { 64, 79 }, /* Profile 4. */ - { 64, 79 }, /* Profile 5. */ - { 48, 63 }, /* Profile 6. */ - { 64, 79 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 404, 407 }, /* Profile 2. */ { 404, 407 }, /* Profile 3. */ { 404, 407 }, /* Profile 4. */ - { 372, 375 }, /* Profile 5. */ - { 372, 375 }, /* Profile 6. */ - { 372, 375 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 392, 395 }, /* Profile 2. */ { 392, 395 }, /* Profile 3. */ { 392, 395 }, /* Profile 4. */ - { 360, 363 }, /* Profile 5. */ - { 360, 363 }, /* Profile 6. */ - { 360, 363 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 320, 335 }, /* Profile 2. */ { 320, 335 }, /* Profile 3. */ { 320, 335 }, /* Profile 4. */ - { 288, 303 }, /* Profile 5. */ - { 288, 303 }, /* Profile 6. */ - { 288, 303 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 396, 399 }, /* Profile 2. */ { 396, 399 }, /* Profile 3. */ { 396, 399 }, /* Profile 4. */ - { 364, 367 }, /* Profile 5. */ - { 364, 367 }, /* Profile 6. */ - { 364, 367 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 288, 303 }, /* Profile 2. */ { 288, 303 }, /* Profile 3. */ { 288, 303 }, /* Profile 4. */ - { 256, 271 }, /* Profile 5. */ - { 256, 271 }, /* Profile 6. */ - { 256, 271 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "TAG_ACTION_CTRL_1_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 412, 413 }, /* Profile 2. */ { 412, 413 }, /* Profile 3. */ { 412, 413 }, /* Profile 4. */ - { 380, 381 }, /* Profile 5. */ - { 380, 381 }, /* Profile 6. */ - { 380, 381 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 384, 387 }, /* Profile 2. */ { 384, 387 }, /* Profile 3. */ { 384, 387 }, /* Profile 4. */ - { 352, 355 }, /* Profile 5. */ - { 352, 355 }, /* Profile 6. */ - { 352, 355 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, { .name = "VFI_15_0", - .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 80, 95 }, /* Profile 2. */ { 64, 79 }, /* Profile 3. */ { 80, 95 }, /* Profile 4. */ - { 80, 95 }, /* Profile 5. */ - { 64, 79 }, /* Profile 6. */ - { 80, 95 }, /* Profile 7. */ }, - .profile_cnt = 8, + .profile_cnt = 5, }, -};static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_data, +}; +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 1, + .profile_bmp[0] = 0x1c, + }; -static shr_enum_map_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_names[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +static shr_enum_map_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reason_names[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT }; -static bcmpkt_flex_reasons_info_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_names, - .reason_encode = bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_encode, - .reason_decode = bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_decode, +static bcmpkt_flex_reasons_info_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reason_names, + .reason_encode = bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reason_decode, }; @@ -868,7 +770,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_arp_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_arp_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_get, bcmpkt_arp_t_hardware_type_get, bcmpkt_arp_t_operation_get, @@ -880,7 +782,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_arp_t_fget[BCM56890_A0_CNA_6_ bcmpkt_arp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_arp_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_arp_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_set, bcmpkt_arp_t_hardware_type_set, bcmpkt_arp_t_operation_set, @@ -892,13 +794,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_arp_t_fset[BCM56890_A0_CNA_6_ bcmpkt_arp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_arp_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_arp_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_arp_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_arp_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_arp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_arp_t_field_data, }; @@ -1014,7 +916,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_get, bcmpkt_cpu_composites_0_t_dma_cont1_get, bcmpkt_cpu_composites_0_t_dma_cont2_get, @@ -1024,7 +926,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_set, bcmpkt_cpu_composites_0_t_dma_cont1_set, bcmpkt_cpu_composites_0_t_dma_cont2_set, @@ -1034,13 +936,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_data, }; @@ -1220,7 +1122,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_get, bcmpkt_cpu_composites_1_t_dma_cont11_get, bcmpkt_cpu_composites_1_t_dma_cont12_get, @@ -1234,7 +1136,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_set, bcmpkt_cpu_composites_1_t_dma_cont11_set, bcmpkt_cpu_composites_1_t_dma_cont12_set, @@ -1248,13 +1150,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_data, }; @@ -1440,7 +1342,7 @@ static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_get, bcmpkt_ep_nih_header_t_header_type_get, bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, @@ -1455,7 +1357,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fget[BCM56890 bcmpkt_ep_nih_header_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_set, bcmpkt_ep_nih_header_t_header_type_set, bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, @@ -1470,13 +1372,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fset[BCM56890 bcmpkt_ep_nih_header_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_field_data, }; @@ -1616,7 +1518,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_get, bcmpkt_erspan3_fixed_hdr_t_cos_get, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, @@ -1628,7 +1530,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_set, bcmpkt_erspan3_fixed_hdr_t_cos_set, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, @@ -1640,13 +1542,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data, }; @@ -1711,27 +1613,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_get, bcmpkt_erspan3_subhdr_5_t_port_id_get, bcmpkt_erspan3_subhdr_5_t_switch_id_get, bcmpkt_erspan3_subhdr_5_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_set, bcmpkt_erspan3_subhdr_5_t_port_id_set, bcmpkt_erspan3_subhdr_5_t_switch_id_set, bcmpkt_erspan3_subhdr_5_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_data, }; @@ -1750,21 +1652,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ethertype_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_ethertype_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ethertype_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_ethertype_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ethertype_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_ethertype_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ethertype_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_ethertype_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_ethertype_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_ethertype_t_field_data, }; @@ -1993,7 +1895,7 @@ static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_get, bcmpkt_generic_loopback_t_destination_type_get, bcmpkt_generic_loopback_t_entropy_obj_get, @@ -2011,7 +1913,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fget[BCM56 bcmpkt_generic_loopback_t_start_byte_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_set, bcmpkt_generic_loopback_t_destination_type_set, bcmpkt_generic_loopback_t_entropy_obj_set, @@ -2029,13 +1931,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fset[BCM56 bcmpkt_generic_loopback_t_start_byte_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_field_data, }; @@ -2084,25 +1986,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_icmp_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_icmp_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_get, bcmpkt_icmp_t_code_get, bcmpkt_icmp_t_icmp_type_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_icmp_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_icmp_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_set, bcmpkt_icmp_t_code_set, bcmpkt_icmp_t_icmp_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_icmp_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_icmp_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_icmp_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_icmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_icmp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_icmp_t_field_data, }; @@ -2184,7 +2086,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_ipfix_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_get, bcmpkt_ipfix_t_length_get, bcmpkt_ipfix_t_obs_domain_id_get, @@ -2192,7 +2094,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fget[BCM56890_A0_CNA_ bcmpkt_ipfix_t_version_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_ipfix_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_set, bcmpkt_ipfix_t_length_set, bcmpkt_ipfix_t_obs_domain_id_set, @@ -2200,13 +2102,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fset[BCM56890_A0_CNA_ bcmpkt_ipfix_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ipfix_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_ipfix_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ipfix_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_ipfix_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_ipfix_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_ipfix_t_field_data, }; @@ -2378,7 +2280,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_ipv4_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_get, bcmpkt_ipv4_t_flags_frag_offset_get, bcmpkt_ipv4_t_hdr_checksum_get, @@ -2392,7 +2294,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fget[BCM56890_A0_CNA_6 bcmpkt_ipv4_t_version_hdr_len_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_ipv4_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_set, bcmpkt_ipv4_t_flags_frag_offset_set, bcmpkt_ipv4_t_hdr_checksum_set, @@ -2406,13 +2308,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fset[BCM56890_A0_CNA_6 bcmpkt_ipv4_t_version_hdr_len_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ipv4_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_ipv4_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ipv4_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_ipv4_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_ipv4_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_ipv4_t_field_data, }; @@ -2538,7 +2440,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_ipv6_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_get, bcmpkt_ipv6_t_flow_label_get, bcmpkt_ipv6_t_hop_limit_get, @@ -2549,7 +2451,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fget[BCM56890_A0_CNA_6 bcmpkt_ipv6_t_version_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_ipv6_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_set, bcmpkt_ipv6_t_flow_label_set, bcmpkt_ipv6_t_hop_limit_set, @@ -2560,13 +2462,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fset[BCM56890_A0_CNA_6 bcmpkt_ipv6_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ipv6_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_ipv6_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ipv6_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_ipv6_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_ipv6_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_ipv6_t_field_data, }; @@ -2602,23 +2504,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_l2_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_l2_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_get, bcmpkt_l2_t_macsa_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_l2_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_l2_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_set, bcmpkt_l2_t_macsa_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_l2_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_l2_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_l2_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_l2_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_l2_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_l2_t_field_data, }; @@ -2638,21 +2540,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_data, }; @@ -2672,21 +2574,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_field_data, }; @@ -2798,7 +2700,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, bcmpkt_psamp_mirror_on_drop_0_t_length_get, @@ -2808,7 +2710,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, bcmpkt_psamp_mirror_on_drop_0_t_length_set, @@ -2818,13 +2720,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data, }; @@ -2918,7 +2820,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *d return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, @@ -2927,7 +2829,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, @@ -2936,13 +2838,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_data, }; @@ -3036,7 +2938,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *d return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get, bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get, bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get, @@ -3045,7 +2947,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set, bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set, bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set, @@ -3054,13 +2956,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_data, }; @@ -3203,7 +3105,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_rarp_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_rarp_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_get, bcmpkt_rarp_t_hardware_type_get, bcmpkt_rarp_t_operation_get, @@ -3215,7 +3117,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_rarp_t_fget[BCM56890_A0_CNA_6 bcmpkt_rarp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_rarp_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_rarp_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_set, bcmpkt_rarp_t_hardware_type_set, bcmpkt_rarp_t_operation_set, @@ -3227,13 +3129,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_rarp_t_fset[BCM56890_A0_CNA_6 bcmpkt_rarp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_rarp_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_rarp_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_rarp_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_rarp_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_rarp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_rarp_t_field_data, }; @@ -3267,23 +3169,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_get, bcmpkt_tcp_first_4bytes_t_src_port_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_set, bcmpkt_tcp_first_4bytes_t_src_port_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_data, }; @@ -3379,7 +3281,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_get, bcmpkt_tcp_last_16bytes_t_checksum_get, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, @@ -3388,7 +3290,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_set, bcmpkt_tcp_last_16bytes_t_checksum_set, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, @@ -3397,13 +3299,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_data, }; @@ -3467,27 +3369,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_udp_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_udp_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_get, bcmpkt_udp_t_dst_port_get, bcmpkt_udp_t_src_port_get, bcmpkt_udp_t_udp_length_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_udp_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_udp_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_set, bcmpkt_udp_t_dst_port_set, bcmpkt_udp_t_src_port_set, bcmpkt_udp_t_udp_length_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_udp_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_udp_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_udp_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_udp_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_udp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_udp_t_field_data, }; @@ -3523,23 +3425,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_field_data, }; @@ -3559,21 +3461,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_field_data, }; @@ -3623,25 +3525,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_get, bcmpkt_unknown_l5_t_l5_bytes_2_3_get, bcmpkt_unknown_l5_t_l5_bytes_4_7_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_set, bcmpkt_unknown_l5_t_l5_bytes_2_3_set, bcmpkt_unknown_l5_t_l5_bytes_4_7_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_field_data, }; @@ -3705,27 +3607,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_vlan_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_vlan_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_get, bcmpkt_vlan_t_pcp_get, bcmpkt_vlan_t_tpid_get, bcmpkt_vlan_t_vid_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_vlan_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_vlan_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_set, bcmpkt_vlan_t_pcp_set, bcmpkt_vlan_t_tpid_set, bcmpkt_vlan_t_vid_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_vlan_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_vlan_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_vlan_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_vlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_vlan_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_vlan_t_field_data, }; @@ -3775,245 +3677,245 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_vxlan_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_vxlan_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_get, bcmpkt_vxlan_t_reserved2_get, bcmpkt_vxlan_t_vn_id_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_vxlan_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_vxlan_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_set, bcmpkt_vxlan_t_reserved2_set, bcmpkt_vxlan_t_vn_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_vxlan_t_field_data[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_vxlan_t_field_data[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_vxlan_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_30_2_0_vxlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_vxlan_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_31_3_0_vxlan_t_field_data, }; -static bcmpkt_flex_pmd_info_t bcm56890_a0_cna_6_5_30_2_0_flexhdr_info_list[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT] = { +static bcmpkt_flex_pmd_info_t bcm56890_a0_cna_6_5_31_3_0_flexhdr_info_list[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT] = { { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_arp_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_arp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_arp_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_arp_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_arp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_arp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_ethertype_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_ethertype_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ethertype_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ethertype_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_ethertype_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_ethertype_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_icmp_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_icmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_icmp_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_icmp_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_icmp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_icmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_ipfix_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_ipfix_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_ipfix_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_ipfix_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_ipv4_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_ipv4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_ipv4_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_ipv4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_ipv6_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_ipv6_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_ipv6_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_ipv6_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_l2_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_l2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_l2_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_l2_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_l2_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_l2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_rarp_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_rarp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_rarp_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_rarp_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_rarp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_rarp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_udp_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_udp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_udp_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_udp_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_udp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_udp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_vlan_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_vlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_vlan_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_vlan_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_vlan_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_vlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_vxlan_t_field_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_vxlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_30_2_0_vxlan_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_30_2_0_vxlan_t_fset, + .flex_fget = bcm56890_a0_cna_6_5_31_3_0_vxlan_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_31_3_0_vxlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_info, - .reasons_info = &bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reasons_info, + .field_info = &bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_field_info, + .reasons_info = &bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reasons_info, .flex_common_fget = bcm56890_a0_rxpmd_flex_fget, .flex_common_fset = bcm56890_a0_rxpmd_flex_fset, }, }; -static shr_enum_map_t bcm56890_a0_cna_6_5_30_2_0_flexhdr_id_map[] = { - BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +static shr_enum_map_t bcm56890_a0_cna_6_5_31_3_0_flexhdr_id_map[] = { + BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT }; -shr_enum_map_t * bcm56890_a0_cna_6_5_30_2_0_flexhdr_map_get(void) +shr_enum_map_t * bcm56890_a0_cna_6_5_31_3_0_flexhdr_map_get(void) { - return bcm56890_a0_cna_6_5_30_2_0_flexhdr_id_map; + return bcm56890_a0_cna_6_5_31_3_0_flexhdr_id_map; } -bcmpkt_flex_pmd_info_t * bcm56890_a0_cna_6_5_30_2_0_flex_pmd_info_get(uint32_t hid) +bcmpkt_flex_pmd_info_t * bcm56890_a0_cna_6_5_31_3_0_flex_pmd_info_get(uint32_t hid) { - if (hid >= BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT) { + if (hid >= BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT) { return NULL; } - return &bcm56890_a0_cna_6_5_30_2_0_flexhdr_info_list[hid]; + return &bcm56890_a0_cna_6_5_31_3_0_flexhdr_info_list[hid]; } -int bcm56890_a0_cna_6_5_30_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { +int bcm56890_a0_cna_6_5_31_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { 7, -1, -1, diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c similarity index 82% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c index e15b2d476da..ade5c4c33e1 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c @@ -2,8 +2,8 @@ * * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56890_a0_dna_6_5_30_8_0_sf_match_id_info.yml - * for device bcm56890_a0 and variant dna_6_5_30_8_0. + * from the NPL output file(s) bcm56890_a0_dna_6_5_31_6_0_sf_match_id_info.yml + * for device bcm56890_a0 and variant dna_6_5_31_6_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -29,39 +29,39 @@ #include -#include +#include -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] = { 0x366c, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = { 0x78f0, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = { 0x1fffe, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = { 0xff00, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = { 0x1e4c8, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = { 0x4, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] = { 0x10, 0x400000, @@ -104,7 +104,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x777f7, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] = { 0x0, 0x0, @@ -163,7 +163,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xeef0, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] = { 0x0, 0x0, @@ -224,7 +224,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x80080200, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] = { 0x0, 0x0, @@ -270,7 +270,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x1ddfdd, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] = { 0x0, 0x0, @@ -329,7 +329,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xeef0000, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] = { 0x0, 0x0, @@ -388,7 +388,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x10000000, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] = { 0x1e, 0x400000, @@ -421,7 +421,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x1bbbfb, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] = { 0x0, 0x0, @@ -470,7 +470,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x777, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] = { 0x0, 0x0, @@ -530,7 +530,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x1dd, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] = { 0x0, 0x0, @@ -582,7 +582,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xeef, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] = { 0x0, 0x0, @@ -642,7 +642,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x1dde00, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] = { 0x0, 0x400000, @@ -703,7 +703,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x2000008, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] = { 0x0, 0x0, @@ -755,7 +755,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x15e000, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] = { 0x0, 0x0, @@ -807,7 +807,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x110000, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] = { 0x0, 0x0, @@ -847,7 +847,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x10000, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] = { 0x18, 0x400000, @@ -887,7 +887,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x1000e, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] = { 0x0, 0x0, @@ -949,7 +949,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xe, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] = { 0x0, 0x0, @@ -1011,7 +1011,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x2, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] = { 0x0, 0x0, @@ -1066,7 +1066,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xeefeef, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] = { 0x0, 0x0, @@ -1127,7 +1127,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x3, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] = { 0x0, 0x0, @@ -1160,7 +1160,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x80000, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] = { 0x0, 0x0, @@ -1218,7 +1218,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x1ddfddf, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] = { 0x0, 0x0, @@ -1279,7 +1279,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x3bbc, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] = { 0x0, 0x0, @@ -1340,7 +1340,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x2c02c0b0, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] = { 0x0, 0x0, @@ -1401,7 +1401,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x280280a0, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] = { 0x0, 0x0, @@ -1463,7 +1463,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x6, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] = { 0x0, 0x0, @@ -1496,7 +1496,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x100000, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] = { 0x0, 0x0, @@ -1558,7 +1558,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x8, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] = { 0x0, 0x0, @@ -1620,7 +1620,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x4, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] = { 0x0, 0x0, @@ -1682,7 +1682,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xe, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] = { 0x0, 0x0, @@ -1744,7 +1744,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xe, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[4] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[4] = { 0x33033198, 0xcc66066, @@ -1752,7 +1752,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cn 0x6633033, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[4] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[4] = { 0x44044220, 0x11088088, @@ -1760,7 +1760,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gb 0x8844044, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[4] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[4] = { 0xffc00000, 0xffffffff, @@ -1768,7 +1768,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg 0x7fffffff, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[4] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[4] = { 0x0, 0xfffff800, @@ -1776,7 +1776,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg 0x7ffffc00, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[4] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[4] = { 0xf80f87c0, 0x3e1f01f0, @@ -1784,7 +1784,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_it 0x1f0f80f8, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[4] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[4] = { 0xfffffffe, 0xffffffff, @@ -1792,7 +1792,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2 0x7fffffff, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[4] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[4] = { 0x1ff800, 0x7fe003ff, @@ -1800,7 +1800,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_ot 0x3ff001ff, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[4] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[4] = { 0xa23a2510, 0xe8944744, @@ -1808,7 +1808,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_sn 0x744a23a2, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag[4] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag[4] = { 0x0, 0x0, @@ -1816,12 +1816,12 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_sv 0x7fffffff, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = { 0x4, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[14] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[14] = { 0x10, 0x0, @@ -1839,7 +1839,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x7bef, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[35] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[35] = { 0x0, 0x0, @@ -1878,7 +1878,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x1efbc00, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[40] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[40] = { 0x0, 0x0, @@ -1888,7 +1888,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x80000, 0x0, 0x0, - 0x20000000, + 0x40000000, 0x40000000, 0x20002000, 0x10001000, @@ -1916,13 +1916,13 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x100040, 0x20002, 0x80010001, - 0x40008000, - 0x4000800, + 0x80010000, + 0x8001000, 0x11111000, 0x11, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[18] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[18] = { 0x0, 0x0, @@ -1944,7 +1944,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x1ef, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[36] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[36] = { 0x0, 0x0, @@ -1984,7 +1984,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xf7, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[36] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[36] = { 0x0, 0x0, @@ -2024,7 +2024,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x100, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[40] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[40] = { 0x1e, 0x0, @@ -2033,9 +2033,9 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xffffffff, 0xfbef117, 0x0, - 0x2000000, - 0xfb000000, - 0xf7f0001e, + 0x6000000, + 0xf6000000, + 0xf7e0003d, 0xfbfefbfd, 0x7dff7dfe, 0xf7dfbeff, @@ -2062,13 +2062,13 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xbf7dfdf7, 0xdfefbfef, 0xeff7dff7, - 0xf7fbeffb, - 0xdf7fbefd, - 0xfffffffb, + 0xeff7defb, + 0xbeff7dfb, + 0xffffffff, 0x1ff, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] = { 0x0, 0x0, @@ -2093,7 +2093,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xf7dfe, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[36] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[36] = { 0x0, 0x0, @@ -2133,7 +2133,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xf7de00, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[38] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[38] = { 0x0, 0x0, @@ -2143,8 +2143,8 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x300000, 0x0, 0x0, - 0xc0000000, 0x80000000, + 0x80000001, 0xc000c001, 0x60006000, 0x6003000, @@ -2171,11 +2171,11 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x600180, 0xc000c, 0x60006, - 0x80030003, - 0x18003001, + 0x60003, + 0x30006003, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[22] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[22] = { 0x0, 0x0, @@ -2201,7 +2201,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x7ffff, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[22] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[22] = { 0x0, 0x0, @@ -2227,7 +2227,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3f, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[22] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[22] = { 0x0, 0x0, @@ -2253,7 +2253,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3fc0, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[22] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[22] = { 0x0, 0x0, @@ -2279,7 +2279,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x63333, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[22] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[22] = { 0x0, 0x0, @@ -2305,7 +2305,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x7bc3c, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[26] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[26] = { 0x0, 0x0, @@ -2335,7 +2335,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xf7d, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[37] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[37] = { 0x0, 0x0, @@ -2376,7 +2376,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x7b, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[38] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[38] = { 0x0, 0x0, @@ -2414,11 +2414,11 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x1, 0x4000800, 0x2000400, - 0x1000280, - 0x100000, + 0x2000480, + 0x200000, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[26] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[26] = { 0x0, 0x0, @@ -2448,7 +2448,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x45e000, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[26] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[26] = { 0x0, 0x0, @@ -2478,7 +2478,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x410000, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[10] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[8] = { 0x0, 0x0, @@ -2487,12 +2487,10 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x1000, 0x0, - 0x0, - 0x0, - 0x100000, + 0x4000000, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[38] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[38] = { 0x0, 0x0, @@ -2502,8 +2500,8 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x200000, 0x0, 0x0, - 0x80000000, 0x0, + 0x1, 0x80008001, 0x40004000, 0x4002000, @@ -2530,11 +2528,11 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x400100, 0x80008, 0x40004, - 0x20002, - 0x10002001, + 0x40002, + 0x20004002, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] = { 0x18, 0x0, @@ -2543,12 +2541,12 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xffffffff, 0xfbef117, 0x0, - 0x2000000, - 0xfb000000, - 0x10001e, + 0x6000000, + 0xf6000000, + 0x3d, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[39] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[39] = { 0x0, 0x0, @@ -2586,12 +2584,12 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xbf7dfdf7, 0xdfefbfef, 0xeff7dff7, - 0xf7fbeffb, - 0xdf7fbefd, - 0x3, + 0xeff7defb, + 0xbeff7dfb, + 0x7, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[40] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[40] = { 0x0, 0x0, @@ -2635,7 +2633,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3f, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[40] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[40] = { 0x0, 0x0, @@ -2679,7 +2677,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[39] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[39] = { 0x0, 0x0, @@ -2722,7 +2720,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3fffffe0, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[39] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[39] = { 0x0, 0x0, @@ -2765,7 +2763,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3ffffc0, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[39] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[39] = { 0x0, 0x0, @@ -2808,7 +2806,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3fff80, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[39] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[39] = { 0x0, 0x0, @@ -2851,7 +2849,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3ff00, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[39] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[39] = { 0x0, 0x0, @@ -2894,7 +2892,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3e00, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[40] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[40] = { 0x0, 0x0, @@ -2938,7 +2936,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x19, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[40] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[40] = { 0x0, 0x0, @@ -2982,7 +2980,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x22, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[40] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[40] = { 0x0, 0x0, @@ -2993,7 +2991,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x2, + 0x4, 0x20004, 0x10002, 0x10008001, @@ -3020,13 +3018,13 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x1000400, 0x200020, 0x100010, - 0x80008, - 0x40008004, + 0x100008, + 0x80010008, 0x0, 0x40, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[30] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[30] = { 0x0, 0x0, @@ -3060,7 +3058,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xf7dfe, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[37] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[37] = { 0x0, 0x0, @@ -3098,10 +3096,10 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x7bef00, + 0xf7de00, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[40] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[40] = { 0x0, 0x0, @@ -3145,7 +3143,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x80, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[34] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[34] = { 0x0, 0x0, @@ -3183,7 +3181,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3df7, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[38] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[38] = { 0x0, 0x0, @@ -3221,11 +3219,11 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xf7800000, - 0x3d, + 0xef000000, + 0x7b, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[34] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[34] = { 0x0, 0x0, @@ -3263,7 +3261,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xf7dc000, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[38] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[38] = { 0x0, 0x0, @@ -3273,7 +3271,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x2c007, 0x0, 0x0, - 0xb000000, + 0x16000000, 0x16000000, 0xb000b00, 0x5800580, @@ -3301,11 +3299,11 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xb0058016, 0x5800b000, 0x2c005800, - 0x16002c00, - 0x16002c0, + 0x2c005800, + 0x2c00580, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[38] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[38] = { 0x0, 0x0, @@ -3315,7 +3313,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x28006, 0x0, 0x0, - 0xa000000, + 0x14000000, 0x14000000, 0xa000a00, 0x5000500, @@ -3343,11 +3341,11 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xa0050014, 0x5000a000, 0x28005000, - 0x14002800, - 0x1400280, + 0x28005000, + 0x2800500, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[39] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[39] = { 0x0, 0x0, @@ -3357,8 +3355,8 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3bc0110, 0x0, 0x0, - 0xf0000000, - 0xe000000e, + 0xe0000000, + 0xe000001d, 0xf00ef01d, 0x7807780e, 0x7783bc07, @@ -3385,12 +3383,12 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x7781de0, 0x80ef00ef, 0xc0778077, - 0xe03bc03b, - 0xde03bc1d, - 0x1, + 0xc077803b, + 0xbc07783b, + 0x3, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[40] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[40] = { 0x0, 0x0, @@ -3434,7 +3432,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x100, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[39] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[39] = { 0x0, 0x0, @@ -3445,7 +3443,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x10, + 0x20, 0x100020, 0x80010, 0x80040008, @@ -3472,12 +3470,12 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x8002000, 0x1000100, 0x800080, - 0x400040, - 0x40020, - 0x2, + 0x800040, + 0x80040, + 0x4, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[38] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[39] = { 0x0, 0x0, @@ -3487,8 +3485,8 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x1020000, 0x0, 0x0, - 0x8000000, - 0x10000004, + 0x10000000, + 0x10000008, 0x8040808, 0x4020404, 0x20410202, @@ -3515,11 +3513,12 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x82040810, 0x40408040, 0x20204020, - 0x10102010, - 0x81010208, + 0x20204010, + 0x2020410, + 0x1, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[39] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[39] = { 0x0, 0x0, @@ -3530,7 +3529,7 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x8, + 0x10, 0x80010, 0x40008, 0x40020004, @@ -3557,12 +3556,12 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x4001000, 0x800080, 0x400040, - 0x200020, - 0x20010, - 0x1, + 0x400020, + 0x40020, + 0x2, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[39] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[39] = { 0x0, 0x0, @@ -3571,9 +3570,9 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x8000000, 0x0, - 0x2000000, - 0xfb000000, - 0x10001e, + 0x6000000, + 0xf6000000, + 0x3d, 0x0, 0x0, 0x0, @@ -3600,12 +3599,12 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0xdfefbe00, 0xeff7dff7, - 0xf7fbeffb, - 0xdf7fbefd, - 0x3, + 0xeff7defb, + 0xbeff7dfb, + 0x7, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[39] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[39] = { 0x0, 0x0, @@ -3644,25 +3643,25 @@ static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xdf780000, - 0x3, + 0xbef00000, + 0x7, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = { 0x4, }; -static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = { 0x8, }; static bcmpkt_rxpmd_match_id_db_t -bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_COUNT] = { +bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_COUNT] = { { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_CNTAG", .match = 0x100, .match_mask = 0x180, @@ -3676,7 +3675,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */ .name = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", .match = 0x80, .match_mask = 0x180, @@ -3690,7 +3689,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", .match = 0x1, .match_mask = 0x1, @@ -3704,7 +3703,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", .match = 0x10, .match_mask = 0x10, @@ -3718,7 +3717,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", .match = 0x40, .match_mask = 0x40, @@ -3732,7 +3731,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ .name = "EGRESS_PKT_FWD_L2_HDR_L2", .match = 0x2, .match_mask = 0x2, @@ -3746,7 +3745,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ .name = "EGRESS_PKT_FWD_L2_HDR_NONE", .match = 0x0, .match_mask = 0x1ff, @@ -3760,7 +3759,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", .match = 0x20, .match_mask = 0x20, @@ -3774,7 +3773,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -3788,7 +3787,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", .match = 0x8, .match_mask = 0x8, @@ -3802,7 +3801,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", .match = 0x4000, .match_mask = 0x3c000, @@ -3816,7 +3815,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", .match = 0x24000, .match_mask = 0x3c000, @@ -3830,7 +3829,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", .match = 0x140, .match_mask = 0x7c0, @@ -3844,7 +3843,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", .match = 0x3000, .match_mask = 0x3800, @@ -3858,7 +3857,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", .match = 0x2c000, .match_mask = 0x3c000, @@ -3872,7 +3871,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", .match = 0x200, .match_mask = 0x7c0, @@ -3886,7 +3885,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", .match = 0x40, .match_mask = 0x7c0, @@ -3900,7 +3899,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -3914,7 +3913,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", .match = 0x30000, .match_mask = 0x3c000, @@ -3928,7 +3927,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", .match = 0x240, .match_mask = 0x7c0, @@ -3942,7 +3941,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", .match = 0x30, .match_mask = 0x438, @@ -3956,7 +3955,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", .match = 0x18, .match_mask = 0x418, @@ -3970,7 +3969,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", .match = 0x80, .match_mask = 0x7c0, @@ -3984,7 +3983,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", .match = 0x1800, .match_mask = 0x3800, @@ -3998,7 +3997,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", .match = 0x10000, .match_mask = 0x3c000, @@ -4012,7 +4011,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", .match = 0x38, .match_mask = 0x438, @@ -4026,7 +4025,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", .match = 0x8000, .match_mask = 0x3c000, @@ -4040,7 +4039,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", .match = 0xc0, .match_mask = 0x7c0, @@ -4054,7 +4053,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3818, @@ -4068,7 +4067,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", .match = 0x2c0, .match_mask = 0x7c0, @@ -4082,7 +4081,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", .match = 0xc000, .match_mask = 0x3c000, @@ -4096,7 +4095,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", .match = 0x100, .match_mask = 0x7c0, @@ -4110,7 +4109,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", .match = 0x1000, .match_mask = 0x3800, @@ -4124,7 +4123,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", .match = 0x2, .match_mask = 0x406, @@ -4138,7 +4137,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", .match = 0x4, .match_mask = 0x406, @@ -4152,7 +4151,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", .match = 0x400, .match_mask = 0x400, @@ -4166,7 +4165,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", .match = 0x402, .match_mask = 0x402, @@ -4180,7 +4179,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", .match = 0x404, .match_mask = 0x404, @@ -4194,7 +4193,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", .match = 0x408, .match_mask = 0x408, @@ -4208,7 +4207,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", .match = 0x410, .match_mask = 0x410, @@ -4222,7 +4221,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", .match = 0x420, .match_mask = 0x420, @@ -4236,7 +4235,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", .match = 0x440, .match_mask = 0x440, @@ -4250,7 +4249,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", .match = 0x480, .match_mask = 0x480, @@ -4264,7 +4263,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", .match = 0x500, .match_mask = 0x500, @@ -4278,7 +4277,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3ffff, @@ -4292,7 +4291,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", .match = 0x2800, .match_mask = 0x3800, @@ -4306,7 +4305,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", .match = 0x34000, .match_mask = 0x3c000, @@ -4320,7 +4319,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", .match = 0x280, .match_mask = 0x7c0, @@ -4334,7 +4333,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", .match = 0x14000, .match_mask = 0x3c000, @@ -4348,7 +4347,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", .match = 0x20000, .match_mask = 0x3c000, @@ -4362,7 +4361,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", .match = 0x1c0, .match_mask = 0x7c0, @@ -4376,7 +4375,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", .match = 0x18000, .match_mask = 0x3c000, @@ -4390,7 +4389,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x8, .match_mask = 0x418, @@ -4404,7 +4403,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x28, .match_mask = 0x438, @@ -4418,7 +4417,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", .match = 0x10, .match_mask = 0x418, @@ -4432,7 +4431,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", .match = 0x1c000, .match_mask = 0x3c000, @@ -4446,7 +4445,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", .match = 0x2000, .match_mask = 0x3800, @@ -4460,7 +4459,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", .match = 0x3800, .match_mask = 0x3800, @@ -4474,7 +4473,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", .match = 0x810, .match_mask = 0x3c18, @@ -4488,7 +4487,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", .match = 0x28000, .match_mask = 0x3c000, @@ -4502,7 +4501,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", .match = 0x180, .match_mask = 0x7c0, @@ -4516,7 +4515,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ .name = "EGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -4530,7 +4529,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -4544,7 +4543,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ .name = "EGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -4558,7 +4557,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", .match = 0x100, .match_mask = 0x180, @@ -4572,7 +4571,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", .match = 0x80, .match_mask = 0x180, @@ -4586,7 +4585,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", .match = 0x1, .match_mask = 0x1, @@ -4600,7 +4599,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", .match = 0x10, .match_mask = 0x10, @@ -4614,7 +4613,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", .match = 0x40, .match_mask = 0x40, @@ -4628,7 +4627,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", .match = 0x2, .match_mask = 0x2, @@ -4642,7 +4641,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", .match = 0x0, .match_mask = 0x1ff, @@ -4656,7 +4655,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", .match = 0x20, .match_mask = 0x20, @@ -4670,7 +4669,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -4684,7 +4683,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", .match = 0x8, .match_mask = 0x8, @@ -4698,7 +4697,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", .match = 0x4000, .match_mask = 0x3c000, @@ -4712,7 +4711,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", .match = 0x24000, .match_mask = 0x3c000, @@ -4726,7 +4725,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", .match = 0x140, .match_mask = 0x7c0, @@ -4740,7 +4739,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", .match = 0x3000, .match_mask = 0x3800, @@ -4754,7 +4753,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", .match = 0x2c000, .match_mask = 0x3c000, @@ -4768,7 +4767,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", .match = 0x200, .match_mask = 0x7c0, @@ -4782,7 +4781,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", .match = 0x40, .match_mask = 0x7c0, @@ -4796,7 +4795,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -4810,7 +4809,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", .match = 0x30000, .match_mask = 0x3c000, @@ -4824,7 +4823,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", .match = 0x240, .match_mask = 0x7c0, @@ -4838,7 +4837,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", .match = 0x30, .match_mask = 0x438, @@ -4852,7 +4851,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", .match = 0x18, .match_mask = 0x418, @@ -4866,7 +4865,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", .match = 0x80, .match_mask = 0x7c0, @@ -4880,7 +4879,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", .match = 0x1800, .match_mask = 0x3800, @@ -4894,7 +4893,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", .match = 0x10000, .match_mask = 0x3c000, @@ -4908,7 +4907,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", .match = 0x38, .match_mask = 0x438, @@ -4922,7 +4921,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", .match = 0x8000, .match_mask = 0x3c000, @@ -4936,7 +4935,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", .match = 0xc0, .match_mask = 0x7c0, @@ -4950,7 +4949,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3818, @@ -4964,7 +4963,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", .match = 0x2c0, .match_mask = 0x7c0, @@ -4978,7 +4977,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", .match = 0xc000, .match_mask = 0x3c000, @@ -4992,7 +4991,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", .match = 0x100, .match_mask = 0x7c0, @@ -5006,7 +5005,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", .match = 0x1000, .match_mask = 0x3800, @@ -5020,7 +5019,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", .match = 0x2, .match_mask = 0x406, @@ -5034,7 +5033,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", .match = 0x4, .match_mask = 0x406, @@ -5048,7 +5047,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", .match = 0x400, .match_mask = 0x400, @@ -5062,7 +5061,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", .match = 0x402, .match_mask = 0x402, @@ -5076,7 +5075,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", .match = 0x404, .match_mask = 0x404, @@ -5090,7 +5089,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", .match = 0x408, .match_mask = 0x408, @@ -5104,7 +5103,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", .match = 0x410, .match_mask = 0x410, @@ -5118,7 +5117,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", .match = 0x420, .match_mask = 0x420, @@ -5132,7 +5131,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", .match = 0x440, .match_mask = 0x440, @@ -5146,7 +5145,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", .match = 0x480, .match_mask = 0x480, @@ -5160,7 +5159,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", .match = 0x500, .match_mask = 0x500, @@ -5174,7 +5173,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3ffff, @@ -5188,7 +5187,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", .match = 0x2800, .match_mask = 0x3800, @@ -5202,7 +5201,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", .match = 0x34000, .match_mask = 0x3c000, @@ -5216,7 +5215,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", .match = 0x280, .match_mask = 0x7c0, @@ -5230,7 +5229,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", .match = 0x14000, .match_mask = 0x3c000, @@ -5244,7 +5243,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", .match = 0x20000, .match_mask = 0x3c000, @@ -5258,7 +5257,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", .match = 0x1c0, .match_mask = 0x7c0, @@ -5272,7 +5271,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", .match = 0x18000, .match_mask = 0x3c000, @@ -5286,7 +5285,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x8, .match_mask = 0x418, @@ -5300,7 +5299,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x28, .match_mask = 0x438, @@ -5314,7 +5313,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", .match = 0x10, .match_mask = 0x418, @@ -5328,7 +5327,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", .match = 0x1c000, .match_mask = 0x3c000, @@ -5342,7 +5341,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", .match = 0x2000, .match_mask = 0x3800, @@ -5356,7 +5355,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", .match = 0x3800, .match_mask = 0x3800, @@ -5370,7 +5369,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", .match = 0x810, .match_mask = 0x3c18, @@ -5384,7 +5383,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", .match = 0x28000, .match_mask = 0x3c000, @@ -5398,7 +5397,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", .match = 0x180, .match_mask = 0x7c0, @@ -5412,7 +5411,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_CNTAG", .match = 0x100, .match_mask = 0x180, @@ -5426,11 +5425,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 20, .arc_id_mask = 0x1f00000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", .match = 0x40, .match_mask = 0x40, @@ -5444,11 +5443,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 20, .arc_id_mask = 0x1f00000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ .name = "INGRESS_PKT_INNER_L2_HDR_L2", .match = 0x2, .match_mask = 0x2, @@ -5462,11 +5461,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 20, .arc_id_mask = 0x1f00000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ .name = "INGRESS_PKT_INNER_L2_HDR_NONE", .match = 0x0, .match_mask = 0x1ff, @@ -5482,7 +5481,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", .match = 0x20, .match_mask = 0x20, @@ -5496,11 +5495,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 20, .arc_id_mask = 0x1f00000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -5514,11 +5513,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 20, .arc_id_mask = 0x1f00000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", .match = 0x4000, .match_mask = 0x3c000, @@ -5532,11 +5531,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", .match = 0x24000, .match_mask = 0x3c000, @@ -5550,11 +5549,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", .match = 0x140, .match_mask = 0x7c0, @@ -5568,11 +5567,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 55, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", .match = 0x3000, .match_mask = 0x3800, @@ -5586,11 +5585,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 57, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", .match = 0x2c000, .match_mask = 0x3c000, @@ -5604,11 +5603,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 42, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", .match = 0x200, .match_mask = 0x7c0, @@ -5622,11 +5621,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 55, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", .match = 0x40, .match_mask = 0x7c0, @@ -5640,11 +5639,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 55, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -5658,11 +5657,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 29, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", .match = 0x30000, .match_mask = 0x3c000, @@ -5676,11 +5675,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 45, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", .match = 0x240, .match_mask = 0x7c0, @@ -5694,11 +5693,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 56, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", .match = 0x8000, .match_mask = 0x3c000, @@ -5712,11 +5711,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 48, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", .match = 0xc0, .match_mask = 0x7c0, @@ -5730,11 +5729,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 56, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3818, @@ -5748,11 +5747,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 57, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", .match = 0x2c0, .match_mask = 0x7c0, @@ -5766,11 +5765,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 48, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", .match = 0xc000, .match_mask = 0x3c000, @@ -5784,11 +5783,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 48, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", .match = 0x100, .match_mask = 0x7c0, @@ -5802,11 +5801,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 36, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", .match = 0x2, .match_mask = 0x406, @@ -5820,11 +5819,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 36, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", .match = 0x4, .match_mask = 0x406, @@ -5838,11 +5837,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3ffff, @@ -5858,7 +5857,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", .match = 0x2800, .match_mask = 0x3800, @@ -5872,11 +5871,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", .match = 0x34000, .match_mask = 0x3c000, @@ -5890,11 +5889,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 51, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", .match = 0x280, .match_mask = 0x7c0, @@ -5908,11 +5907,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 57, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", .match = 0x14000, .match_mask = 0x3c000, @@ -5926,11 +5925,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 29, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", .match = 0x20000, .match_mask = 0x3c000, @@ -5944,11 +5943,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 54, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", .match = 0x1c0, .match_mask = 0x7c0, @@ -5962,11 +5961,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 57, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x8, .match_mask = 0x418, @@ -5980,11 +5979,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 57, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x28, .match_mask = 0x438, @@ -5998,11 +5997,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 57, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", .match = 0x10, .match_mask = 0x418, @@ -6016,11 +6015,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", .match = 0x1c000, .match_mask = 0x3c000, @@ -6034,11 +6033,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 29, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2000, .match_mask = 0x3800, @@ -6052,11 +6051,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", .match = 0x3800, .match_mask = 0x3800, @@ -6070,11 +6069,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", .match = 0x28000, .match_mask = 0x3c000, @@ -6088,11 +6087,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", .match = 0x180, .match_mask = 0x7c0, @@ -6106,11 +6105,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_CNTAG", .match = 0x100, .match_mask = 0x180, @@ -6124,11 +6123,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 4, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */ .name = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", .match = 0x80, .match_mask = 0x180, @@ -6142,11 +6141,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 4, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", .match = 0x1, .match_mask = 0x1, @@ -6160,11 +6159,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 4, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", .match = 0x10, .match_mask = 0x10, @@ -6178,11 +6177,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 4, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", .match = 0x40, .match_mask = 0x40, @@ -6196,11 +6195,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 4, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ .name = "INGRESS_PKT_OUTER_L2_HDR_L2", .match = 0x2, .match_mask = 0x2, @@ -6214,11 +6213,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 4, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", .match = 0x0, .match_mask = 0x1ff, @@ -6234,7 +6233,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", .match = 0x20, .match_mask = 0x20, @@ -6248,11 +6247,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 4, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -6266,11 +6265,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 4, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", .match = 0x8, .match_mask = 0x8, @@ -6284,11 +6283,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 4, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", .match = 0x4000, .match_mask = 0x3c000, @@ -6302,11 +6301,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", .match = 0x24000, .match_mask = 0x3c000, @@ -6320,11 +6319,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 14, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", .match = 0x140, .match_mask = 0x7c0, @@ -6338,11 +6337,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 35, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", .match = 0x3000, .match_mask = 0x3800, @@ -6356,11 +6355,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", .match = 0x2c000, .match_mask = 0x3c000, @@ -6374,11 +6373,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 18, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", .match = 0x200, .match_mask = 0x7c0, @@ -6392,11 +6391,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 36, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", .match = 0x40, .match_mask = 0x7c0, @@ -6410,11 +6409,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 36, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, @@ -6428,11 +6427,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", .match = 0x30000, .match_mask = 0x3c000, @@ -6446,11 +6445,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 21, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", .match = 0x240, .match_mask = 0x7c0, @@ -6464,11 +6463,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 36, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", .match = 0x30, .match_mask = 0x438, @@ -6482,11 +6481,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 38, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", .match = 0x18, .match_mask = 0x418, @@ -6500,11 +6499,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 22, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", .match = 0x80, .match_mask = 0x7c0, @@ -6518,11 +6517,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 22, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", .match = 0x1800, .match_mask = 0x3800, @@ -6536,11 +6535,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 22, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", .match = 0x10000, .match_mask = 0x3c000, @@ -6554,11 +6553,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 22, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", .match = 0x38, .match_mask = 0x438, @@ -6572,11 +6571,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 22, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", .match = 0x8000, .match_mask = 0x3c000, @@ -6590,11 +6589,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 26, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", .match = 0xc0, .match_mask = 0x7c0, @@ -6608,11 +6607,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 37, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3818, @@ -6626,11 +6625,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 38, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", .match = 0x2c0, .match_mask = 0x7c0, @@ -6644,11 +6643,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 26, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", .match = 0xc000, .match_mask = 0x3c000, @@ -6662,11 +6661,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 26, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", .match = 0x100, .match_mask = 0x7c0, @@ -6679,12 +6678,12 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .pminbit = 11, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 10, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, + .num_zone_bmp_words = 8, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", .match = 0x1000, .match_mask = 0x3800, @@ -6698,11 +6697,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 38, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", .match = 0x2, .match_mask = 0x406, @@ -6716,11 +6715,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 10, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", .match = 0x4, .match_mask = 0x406, @@ -6734,11 +6733,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", .match = 0x400, .match_mask = 0x400, @@ -6752,11 +6751,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", .match = 0x402, .match_mask = 0x402, @@ -6770,11 +6769,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", .match = 0x404, .match_mask = 0x404, @@ -6788,11 +6787,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", .match = 0x408, .match_mask = 0x408, @@ -6806,11 +6805,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", .match = 0x410, .match_mask = 0x410, @@ -6824,11 +6823,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", .match = 0x420, .match_mask = 0x420, @@ -6842,11 +6841,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", .match = 0x440, .match_mask = 0x440, @@ -6860,11 +6859,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", .match = 0x480, .match_mask = 0x480, @@ -6878,11 +6877,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", .match = 0x500, .match_mask = 0x500, @@ -6896,11 +6895,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", .match = 0x0, .match_mask = 0x3ffff, @@ -6916,7 +6915,7 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", .match = 0x2800, .match_mask = 0x3800, @@ -6930,11 +6929,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", .match = 0x34000, .match_mask = 0x3c000, @@ -6948,11 +6947,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 30, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", .match = 0x280, .match_mask = 0x7c0, @@ -6966,11 +6965,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 37, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", .match = 0x14000, .match_mask = 0x3c000, @@ -6984,11 +6983,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", .match = 0x20000, .match_mask = 0x3c000, @@ -7002,11 +7001,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 34, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", .match = 0x1c0, .match_mask = 0x7c0, @@ -7020,11 +7019,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 38, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", .match = 0x18000, .match_mask = 0x3c000, @@ -7038,11 +7037,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 34, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x8, .match_mask = 0x418, @@ -7056,11 +7055,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 38, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x28, .match_mask = 0x438, @@ -7074,11 +7073,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 38, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", .match = 0x10, .match_mask = 0x418, @@ -7092,11 +7091,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", .match = 0x1c000, .match_mask = 0x3c000, @@ -7110,11 +7109,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2000, .match_mask = 0x3800, @@ -7128,11 +7127,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", .match = 0x3800, .match_mask = 0x3800, @@ -7145,12 +7144,12 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .pminbit = 11, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 38, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", .match = 0x810, .match_mask = 0x3c18, @@ -7164,11 +7163,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", .match = 0x28000, .match_mask = 0x3c000, @@ -7182,11 +7181,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", .match = 0x180, .match_mask = 0x7c0, @@ -7200,11 +7199,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ .name = "INGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -7218,11 +7217,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 0, .arc_id_mask = 0x3, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -7236,11 +7235,11 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA .zone_minbit = 0, .arc_id_mask = 0x3, .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, }, { - /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ .name = "INGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -7257,23 +7256,23 @@ bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MA }, }; -static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db_info = { +static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_db_info = { .num_entries = 228, - .db = bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db + .db = bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_db }; -bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db_info_get(void) { - return &bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db_info; +bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_db_info_get(void) { + return &bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_db_info; } -static shr_enum_map_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +static shr_enum_map_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_map[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT }; -static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map_info = { +static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_map_info = { .num_entries = 228, - .map = bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map + .map = bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_map }; -bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map_info_get(void) { - return &bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map_info; +bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_map_info_get(void) { + return &bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_map_info; } diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_pkt_flexhdr.c similarity index 84% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_pkt_flexhdr.c index f969be32b49..8b12d1f1e4f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_pkt_flexhdr.c @@ -3,7 +3,7 @@ * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser * from the NPL output file(s) map.yml - * for device bcm56890_a0 and variant dna_6_5_30_8_0. + * for device bcm56890_a0 and variant dna_6_5_31_6_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -31,321 +31,321 @@ #include #include #include -#include -#include -#include +#include +#include +#include #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -static void bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +static void bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) { uint32_t *reason = data + 0; if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); } if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); } if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); } if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS); } if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); } if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); } if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); } if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); } if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); } if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); } if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); } if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); } if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); } if (reason[13] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); } if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); } if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP); } if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP); } if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); } if (reason[13] & (0x1 << 20)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); } if (reason[13] & (0x1 << 21)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP); } if (reason[13] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); } if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); } if (reason[13] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); } if (reason[13] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); } if (reason[13] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); } if (reason[13] & (0x1 << 27)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); } if (reason[13] & (0x1 << 28)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); } if (reason[13] & (0x1 << 29)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[13] & (0x1 << 30)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[13] & (0x1 << 31)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); } if (reason[12] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); } if (reason[12] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); } if (reason[12] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); } if (reason[12] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); } if (reason[12] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); } if (reason[12] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); } if (reason[12] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); } if (reason[12] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); } if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT); } if (reason[12] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); } if (reason[12] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); } if (reason[12] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SRV6); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SRV6); } if (reason[12] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); } if (reason[12] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); } if (reason[12] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); } if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); } } -static void bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +static void bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) { uint32_t *reason = data + 0; reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { reason[13] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { reason[13] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { reason[13] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) { reason[13] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { reason[13] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { reason[13] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { reason[13] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { reason[13] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { reason[13] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { reason[13] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { reason[13] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { reason[13] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { reason[13] |= (0x1 << 14); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { reason[13] |= (0x1 << 15); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { reason[13] |= (0x1 << 16); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { reason[13] |= (0x1 << 17); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { reason[13] |= (0x1 << 18); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { reason[13] |= (0x1 << 19); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { reason[13] |= (0x1 << 20); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { reason[13] |= (0x1 << 21); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { reason[13] |= (0x1 << 22); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { reason[13] |= (0x1 << 23); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { reason[13] |= (0x1 << 24); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { reason[13] |= (0x1 << 25); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { reason[13] |= (0x1 << 26); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { reason[13] |= (0x1 << 27); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { reason[13] |= (0x1 << 28); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[13] |= (0x1 << 29); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[13] |= (0x1 << 30); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { reason[13] |= (0x1 << 31); } reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { reason[12] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { reason[12] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { reason[12] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { reason[12] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { reason[12] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { reason[12] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { reason[12] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { reason[12] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) { reason[12] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { reason[12] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { reason[12] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SRV6)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SRV6)) { reason[12] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { reason[12] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { reason[12] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { reason[12] |= (0x1 << 14); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { reason[12] |= (0x1 << 15); } } -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_data[] = { +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_field_data[] = { { .name = "BSCAN_CONTROL_DATA_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -410,7 +410,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "BSCAN_CONTROL_FLAGS_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -475,7 +475,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "DLB_ECMP_DESTINATION_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -540,7 +540,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "DNAT_CTRL_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -604,7 +604,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "DROP_CODE_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -669,7 +669,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "DVP_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -734,7 +734,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "EFFECTIVE_TTL_AND_SNAT_CTRL_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -799,7 +799,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -850,7 +850,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -915,7 +915,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -980,7 +980,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1041,7 +1041,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "EP_NIH_HDR_RECIRC_CODE_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1102,7 +1102,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "EP_NIH_HDR_TIMESTAMP_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1162,7 +1162,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "EP_NIH_HDR_TIMESTAMP_31_16", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1222,7 +1222,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "EVENT_TRACE_VECTOR_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1287,7 +1287,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "EVENT_TRACE_VECTOR_31_16", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1352,7 +1352,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1417,7 +1417,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "FLOW_ID_LSB_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1482,7 +1482,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "FLOW_ID_MSB_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1547,7 +1547,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "I2E_CLASS_ID_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1612,7 +1612,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "IFP_IOAM_GBP_ACTION_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1677,7 +1677,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1742,7 +1742,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "ING_TIMESTAMP_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1807,7 +1807,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "ING_TIMESTAMP_31_16", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1872,7 +1872,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "INGRESS_DEVICE_PORT_8_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1937,7 +1937,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2002,7 +2002,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2067,7 +2067,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "INT_PRI_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2132,7 +2132,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "L2_IIF_12_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L2_IIF_12_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L2_IIF_12_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2169,7 +2169,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "L2_OIF_12_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L2_OIF_12_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L2_OIF_12_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2234,7 +2234,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "L3_DNAT_INDEX_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2298,7 +2298,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "L3_IIF_13_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2363,7 +2363,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "L3_OIF_1_13_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2428,7 +2428,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "L3_SNAT_INDEX_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2492,7 +2492,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "MAC_DA_23_20_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2554,7 +2554,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "MPLS_LABEL_DECAP_COUNT_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2619,7 +2619,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2684,7 +2684,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "NHOP_INDEX_1_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2749,7 +2749,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2814,7 +2814,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2879,7 +2879,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "SRV6_DIP_EDIT_CTRL_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2942,7 +2942,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3005,7 +3005,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "SRV6_NEW_GSID_SI_2_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3068,7 +3068,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "SRV6_SID_AND_PREFIX_LEN_ENC_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3131,7 +3131,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "SVP_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3196,7 +3196,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3261,7 +3261,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "SVTAG_CTRL_PKT_INFO_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3326,7 +3326,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3391,7 +3391,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3456,7 +3456,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3521,7 +3521,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3586,7 +3586,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3651,7 +3651,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3716,7 +3716,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3781,7 +3781,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "VFI_15_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_VFI_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3846,7 +3846,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, { .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", - .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -3909,20 +3909,25 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_ }, .profile_cnt = 58, }, -};static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_data, }; +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 2, + .profile_bmp[0] = 0xfffffffc, + .profile_bmp[1] = 0x3ffffff, -static shr_enum_map_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_names[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT }; -static bcmpkt_flex_reasons_info_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_names, - .reason_encode = bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_encode, - .reason_decode = bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_decode, +static shr_enum_map_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reason_names[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reason_names, + .reason_encode = bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reason_decode, }; @@ -4065,7 +4070,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_arp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_arp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_get, bcmpkt_arp_t_hardware_type_get, bcmpkt_arp_t_operation_get, @@ -4077,7 +4082,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_arp_t_fget[BCM56890_A0_DNA_6_ bcmpkt_arp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_arp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_arp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_set, bcmpkt_arp_t_hardware_type_set, bcmpkt_arp_t_operation_set, @@ -4089,13 +4094,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_arp_t_fset[BCM56890_A0_DNA_6_ bcmpkt_arp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_arp_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_arp_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_arp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_arp_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_arp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_arp_t_field_data, }; @@ -4192,7 +4197,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_authen_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_authen_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_get, bcmpkt_authen_t_next_header_get, bcmpkt_authen_t_payload_len_get, @@ -4201,7 +4206,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_authen_t_fget[BCM56890_A0_DNA bcmpkt_authen_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_authen_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_authen_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_set, bcmpkt_authen_t_next_header_set, bcmpkt_authen_t_payload_len_set, @@ -4210,13 +4215,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_authen_t_fset[BCM56890_A0_DNA bcmpkt_authen_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_authen_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_authen_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_authen_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_authen_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_authen_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_authen_t_field_data, }; @@ -4465,7 +4470,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_bfd_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_bfd_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_get, bcmpkt_bfd_t_bfd_length_get, bcmpkt_bfd_t_cpi_get, @@ -4484,7 +4489,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_bfd_t_fget[BCM56890_A0_DNA_6_ bcmpkt_bfd_t_version_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_bfd_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_bfd_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_set, bcmpkt_bfd_t_bfd_length_set, bcmpkt_bfd_t_cpi_set, @@ -4503,13 +4508,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_bfd_t_fset[BCM56890_A0_DNA_6_ bcmpkt_bfd_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_bfd_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_bfd_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_bfd_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_bfd_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_bfd_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_bfd_t_field_data, }; @@ -4543,23 +4548,23 @@ static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_cntag_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_cntag_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_get, bcmpkt_cntag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_cntag_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_cntag_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_set, bcmpkt_cntag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_cntag_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_cntag_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_cntag_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_cntag_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_cntag_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_cntag_t_field_data, }; @@ -4675,7 +4680,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_get, bcmpkt_cpu_composites_0_t_dma_cont1_get, bcmpkt_cpu_composites_0_t_dma_cont2_get, @@ -4685,7 +4690,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fget[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_set, bcmpkt_cpu_composites_0_t_dma_cont1_set, bcmpkt_cpu_composites_0_t_dma_cont2_set, @@ -4695,13 +4700,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fset[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_field_data, }; @@ -4881,7 +4886,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_get, bcmpkt_cpu_composites_1_t_dma_cont11_get, bcmpkt_cpu_composites_1_t_dma_cont12_get, @@ -4895,7 +4900,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fget[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { bcmpkt_cpu_composites_1_t_dma_cont10_set, bcmpkt_cpu_composites_1_t_dma_cont11_set, bcmpkt_cpu_composites_1_t_dma_cont12_set, @@ -4909,13 +4914,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fset[BCM56 bcmpkt_cpu_composites_1_t_dma_cont9_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_field_data, }; @@ -4965,25 +4970,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_dest_option_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_dest_option_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_get, bcmpkt_dest_option_t_next_header_get, bcmpkt_dest_option_t_option_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_dest_option_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_dest_option_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_set, bcmpkt_dest_option_t_next_header_set, bcmpkt_dest_option_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_dest_option_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_dest_option_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_dest_option_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_dest_option_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_dest_option_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_dest_option_t_field_data, }; @@ -5169,7 +5174,7 @@ static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_get, bcmpkt_ep_nih_header_t_header_type_get, bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, @@ -5184,7 +5189,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fget[BCM56890 bcmpkt_ep_nih_header_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_set, bcmpkt_ep_nih_header_t_header_type_set, bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, @@ -5199,13 +5204,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fset[BCM56890 bcmpkt_ep_nih_header_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_field_data, }; @@ -5345,7 +5350,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_get, bcmpkt_erspan3_fixed_hdr_t_cos_get, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, @@ -5357,7 +5362,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fget[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_set, bcmpkt_erspan3_fixed_hdr_t_cos_set, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, @@ -5369,13 +5374,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fset[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_field_data, }; @@ -5440,27 +5445,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_get, bcmpkt_erspan3_subhdr_5_t_port_id_get, bcmpkt_erspan3_subhdr_5_t_switch_id_get, bcmpkt_erspan3_subhdr_5_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_set, bcmpkt_erspan3_subhdr_5_t_port_id_set, bcmpkt_erspan3_subhdr_5_t_switch_id_set, bcmpkt_erspan3_subhdr_5_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_field_data, }; @@ -5541,7 +5546,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_esp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_esp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_get, bcmpkt_esp_t_pad_get, bcmpkt_esp_t_pad_len_get, @@ -5549,7 +5554,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_esp_t_fget[BCM56890_A0_DNA_6_ bcmpkt_esp_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_esp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_esp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_set, bcmpkt_esp_t_pad_set, bcmpkt_esp_t_pad_len_set, @@ -5557,13 +5562,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_esp_t_fset[BCM56890_A0_DNA_6_ bcmpkt_esp_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_esp_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_esp_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_esp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_esp_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_esp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_esp_t_field_data, }; @@ -5582,21 +5587,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ethertype_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ethertype_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ethertype_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ethertype_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ethertype_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ethertype_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ethertype_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_ethertype_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ethertype_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_ethertype_t_field_data, }; @@ -5661,27 +5666,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_frag_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_frag_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_get, bcmpkt_frag_t_id_get, bcmpkt_frag_t_next_header_get, bcmpkt_frag_t_reserved_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_frag_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_frag_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_set, bcmpkt_frag_t_id_set, bcmpkt_frag_t_next_header_set, bcmpkt_frag_t_reserved_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_frag_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_frag_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_frag_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_frag_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_frag_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_frag_t_field_data, }; @@ -5775,7 +5780,7 @@ static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { bcmpkt_gbp_ethernet_shim_t_ethertype_get, bcmpkt_gbp_ethernet_shim_t_flags_get, bcmpkt_gbp_ethernet_shim_t_reserved_get, @@ -5784,7 +5789,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fget[BCM5 bcmpkt_gbp_ethernet_shim_t_ver_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { bcmpkt_gbp_ethernet_shim_t_ethertype_set, bcmpkt_gbp_ethernet_shim_t_flags_set, bcmpkt_gbp_ethernet_shim_t_reserved_set, @@ -5793,13 +5798,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fset[BCM5 bcmpkt_gbp_ethernet_shim_t_ver_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_field_data, }; @@ -6028,7 +6033,7 @@ static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_get, bcmpkt_generic_loopback_t_destination_type_get, bcmpkt_generic_loopback_t_entropy_obj_get, @@ -6046,7 +6051,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fget[BCM56 bcmpkt_generic_loopback_t_start_byte_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_set, bcmpkt_generic_loopback_t_destination_type_set, bcmpkt_generic_loopback_t_entropy_obj_set, @@ -6064,13 +6069,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fset[BCM56 bcmpkt_generic_loopback_t_start_byte_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_field_data, }; @@ -6149,7 +6154,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gpe_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gpe_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_get, bcmpkt_gpe_t_next_protocol_get, bcmpkt_gpe_t_reserved0_get, @@ -6157,7 +6162,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gpe_t_fget[BCM56890_A0_DNA_6_ bcmpkt_gpe_t_vni_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gpe_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gpe_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_set, bcmpkt_gpe_t_next_protocol_set, bcmpkt_gpe_t_reserved0_set, @@ -6165,13 +6170,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gpe_t_fset[BCM56890_A0_DNA_6_ bcmpkt_gpe_t_vni_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gpe_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gpe_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gpe_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_gpe_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gpe_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_gpe_t_field_data, }; @@ -6205,23 +6210,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_get, bcmpkt_gre_chksum_t_offset_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_set, bcmpkt_gre_chksum_t_offset_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_field_data, }; @@ -6241,21 +6246,21 @@ static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_key_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gre_key_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_key_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gre_key_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_key_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gre_key_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_key_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_gre_key_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gre_key_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_gre_key_t_field_data, }; @@ -6275,21 +6280,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_field_data, }; @@ -6309,21 +6314,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_field_data, }; @@ -6387,27 +6392,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gre_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_get, bcmpkt_gre_t_protocol_get, bcmpkt_gre_t_reserved_get, bcmpkt_gre_t_version_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gre_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_set, bcmpkt_gre_t_protocol_set, bcmpkt_gre_t_reserved_set, bcmpkt_gre_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gre_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_gre_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gre_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_gre_t_field_data, }; @@ -6606,7 +6611,7 @@ static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { bcmpkt_hg3_base_t_cn_get, bcmpkt_hg3_base_t_cng_get, bcmpkt_hg3_base_t_entropy_get, @@ -6622,7 +6627,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fget[BCM56890_A0_D bcmpkt_hg3_base_t_version_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { bcmpkt_hg3_base_t_cn_set, bcmpkt_hg3_base_t_cng_set, bcmpkt_hg3_base_t_entropy_set, @@ -6638,13 +6643,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fset[BCM56890_A0_D bcmpkt_hg3_base_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_field_data, }; @@ -6738,7 +6743,7 @@ static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { bcmpkt_hg3_extension_0_t_class_id_lsb_get, bcmpkt_hg3_extension_0_t_class_id_msb_get, bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, @@ -6747,7 +6752,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fget[BCM568 bcmpkt_hg3_extension_0_t_svp_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { bcmpkt_hg3_extension_0_t_class_id_lsb_set, bcmpkt_hg3_extension_0_t_class_id_msb_set, bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, @@ -6756,13 +6761,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fset[BCM568 bcmpkt_hg3_extension_0_t_svp_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_field_data, }; @@ -6812,25 +6817,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_get, bcmpkt_hop_by_hop_t_next_header_get, bcmpkt_hop_by_hop_t_option_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_set, bcmpkt_hop_by_hop_t_next_header_set, bcmpkt_hop_by_hop_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_field_data, }; @@ -6879,25 +6884,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_icmp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_icmp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_get, bcmpkt_icmp_t_code_get, bcmpkt_icmp_t_icmp_type_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_icmp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_icmp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_set, bcmpkt_icmp_t_code_set, bcmpkt_icmp_t_icmp_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_icmp_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_icmp_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_icmp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_icmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_icmp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_icmp_t_field_data, }; @@ -6976,7 +6981,7 @@ static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { bcmpkt_ifa_header_t_flags_get, bcmpkt_ifa_header_t_gns_get, bcmpkt_ifa_header_t_max_length_get, @@ -6984,7 +6989,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fget[BCM56890_A0 bcmpkt_ifa_header_t_ver_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { bcmpkt_ifa_header_t_flags_set, bcmpkt_ifa_header_t_gns_set, bcmpkt_ifa_header_t_max_length_set, @@ -6992,13 +6997,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fset[BCM56890_A0 bcmpkt_ifa_header_t_ver_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_field_data, }; @@ -7092,7 +7097,7 @@ static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { bcmpkt_ifa_metadata_a_t_cn_get, bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get, bcmpkt_ifa_metadata_a_t_lns_device_id_get, @@ -7101,7 +7106,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fget[BCM5689 bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { bcmpkt_ifa_metadata_a_t_cn_set, bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set, bcmpkt_ifa_metadata_a_t_lns_device_id_set, @@ -7110,13 +7115,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fset[BCM5689 bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_field_data, }; @@ -7230,7 +7235,7 @@ static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { bcmpkt_ifa_metadata_b_t_egress_port_id_get, bcmpkt_ifa_metadata_b_t_ingress_port_id_get, bcmpkt_ifa_metadata_b_t_mmu_stat_0_get, @@ -7240,7 +7245,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fget[BCM5689 bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { bcmpkt_ifa_metadata_b_t_egress_port_id_set, bcmpkt_ifa_metadata_b_t_ingress_port_id_set, bcmpkt_ifa_metadata_b_t_mmu_stat_0_set, @@ -7250,13 +7255,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fset[BCM5689 bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_field_data, }; @@ -7305,25 +7310,25 @@ static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { bcmpkt_ifa_metadata_base_t_action_vector_get, bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get, bcmpkt_ifa_metadata_base_t_request_vector_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { bcmpkt_ifa_metadata_base_t_action_vector_set, bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set, bcmpkt_ifa_metadata_base_t_request_vector_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_field_data, }; @@ -7388,27 +7393,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_igmp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_igmp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_get, bcmpkt_igmp_t_group_address_get, bcmpkt_igmp_t_igmp_type_get, bcmpkt_igmp_t_max_resp_time_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_igmp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_igmp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_set, bcmpkt_igmp_t_group_address_set, bcmpkt_igmp_t_igmp_type_set, bcmpkt_igmp_t_max_resp_time_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_igmp_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_igmp_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_igmp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_igmp_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_igmp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_igmp_t_field_data, }; @@ -7518,7 +7523,7 @@ static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { bcmpkt_ioam_e2e_t_ioam_e2e_data_get, bcmpkt_ioam_e2e_t_ioam_e2e_type_get, bcmpkt_ioam_e2e_t_ioam_hdr_len_get, @@ -7528,7 +7533,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fget[BCM56890_A0_D bcmpkt_ioam_e2e_t_type_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { bcmpkt_ioam_e2e_t_ioam_e2e_data_set, bcmpkt_ioam_e2e_t_ioam_e2e_type_set, bcmpkt_ioam_e2e_t_ioam_hdr_len_set, @@ -7538,13 +7543,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fset[BCM56890_A0_D bcmpkt_ioam_e2e_t_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_field_data, }; @@ -7626,7 +7631,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ipfix_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_get, bcmpkt_ipfix_t_length_get, bcmpkt_ipfix_t_obs_domain_id_get, @@ -7634,7 +7639,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fget[BCM56890_A0_DNA_ bcmpkt_ipfix_t_version_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ipfix_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_set, bcmpkt_ipfix_t_length_set, bcmpkt_ipfix_t_obs_domain_id_set, @@ -7642,13 +7647,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fset[BCM56890_A0_DNA_ bcmpkt_ipfix_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ipfix_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ipfix_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ipfix_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_ipfix_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ipfix_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_ipfix_t_field_data, }; @@ -7820,7 +7825,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ipv4_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_get, bcmpkt_ipv4_t_flags_frag_offset_get, bcmpkt_ipv4_t_hdr_checksum_get, @@ -7834,7 +7839,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fget[BCM56890_A0_DNA_6 bcmpkt_ipv4_t_version_hdr_len_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ipv4_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_set, bcmpkt_ipv4_t_flags_frag_offset_set, bcmpkt_ipv4_t_hdr_checksum_set, @@ -7848,13 +7853,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fset[BCM56890_A0_DNA_6 bcmpkt_ipv4_t_version_hdr_len_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ipv4_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ipv4_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ipv4_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_ipv4_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ipv4_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_ipv4_t_field_data, }; @@ -7980,7 +7985,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ipv6_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_get, bcmpkt_ipv6_t_flow_label_get, bcmpkt_ipv6_t_hop_limit_get, @@ -7991,7 +7996,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fget[BCM56890_A0_DNA_6 bcmpkt_ipv6_t_version_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ipv6_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_set, bcmpkt_ipv6_t_flow_label_set, bcmpkt_ipv6_t_hop_limit_set, @@ -8002,13 +8007,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fset[BCM56890_A0_DNA_6 bcmpkt_ipv6_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ipv6_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ipv6_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ipv6_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_ipv6_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ipv6_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_ipv6_t_field_data, }; @@ -8044,23 +8049,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_l2_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_l2_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_get, bcmpkt_l2_t_macsa_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_l2_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_l2_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_set, bcmpkt_l2_t_macsa_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_l2_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_l2_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_l2_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_l2_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_l2_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_l2_t_field_data, }; @@ -8080,21 +8085,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_field_data, }; @@ -8114,21 +8119,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_field_data, }; @@ -8192,27 +8197,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_get, bcmpkt_mpls_ach_t_cw_type_get, bcmpkt_mpls_ach_t_reserved_get, bcmpkt_mpls_ach_t_version_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_set, bcmpkt_mpls_ach_t_cw_type_set, bcmpkt_mpls_ach_t_reserved_set, bcmpkt_mpls_ach_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_field_data, }; @@ -8232,21 +8237,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_field_data, }; @@ -8295,25 +8300,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_get, bcmpkt_mpls_cw_t_reserved_get, bcmpkt_mpls_cw_t_seq_number_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_set, bcmpkt_mpls_cw_t_reserved_set, bcmpkt_mpls_cw_t_seq_number_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_field_data, }; @@ -8377,27 +8382,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mpls_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_mpls_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_get, bcmpkt_mpls_t_exp_get, bcmpkt_mpls_t_label_get, bcmpkt_mpls_t_ttl_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mpls_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_mpls_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_set, bcmpkt_mpls_t_exp_set, bcmpkt_mpls_t_label_set, bcmpkt_mpls_t_ttl_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mpls_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_mpls_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mpls_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_mpls_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_mpls_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_mpls_t_field_data, }; @@ -8614,7 +8619,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_p_1588_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_get, bcmpkt_p_1588_t_correction_get, bcmpkt_p_1588_t_domain_nb_get, @@ -8631,7 +8636,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fget[BCM56890_A0_DNA bcmpkt_p_1588_t_version_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_p_1588_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_set, bcmpkt_p_1588_t_correction_set, bcmpkt_p_1588_t_domain_nb_set, @@ -8648,13 +8653,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fset[BCM56890_A0_DNA bcmpkt_p_1588_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_p_1588_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_p_1588_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_p_1588_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_p_1588_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_p_1588_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_p_1588_t_field_data, }; @@ -8704,25 +8709,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, bcmpkt_prog_ext_hdr_t_next_header_get, bcmpkt_prog_ext_hdr_t_option_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, bcmpkt_prog_ext_hdr_t_next_header_set, bcmpkt_prog_ext_hdr_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_field_data, }; @@ -8818,7 +8823,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_get, bcmpkt_psamp_0_t_length_get, bcmpkt_psamp_0_t_next_hop_index_get, @@ -8827,7 +8832,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fget[BCM56890_A0_DN bcmpkt_psamp_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_set, bcmpkt_psamp_0_t_length_set, bcmpkt_psamp_0_t_next_hop_index_set, @@ -8836,13 +8841,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fset[BCM56890_A0_DN bcmpkt_psamp_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_field_data, }; @@ -8951,7 +8956,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_get, bcmpkt_psamp_1_t_egress_port_get, bcmpkt_psamp_1_t_epoch_get, @@ -8961,7 +8966,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fget[BCM56890_A0_DN bcmpkt_psamp_1_t_variable_flag_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_set, bcmpkt_psamp_1_t_egress_port_set, bcmpkt_psamp_1_t_epoch_set, @@ -8971,13 +8976,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fset[BCM56890_A0_DN bcmpkt_psamp_1_t_variable_flag_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_field_data, }; @@ -9089,7 +9094,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, bcmpkt_psamp_mirror_on_drop_0_t_length_get, @@ -9099,7 +9104,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fget bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, bcmpkt_psamp_mirror_on_drop_0_t_length_set, @@ -9109,13 +9114,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fset bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_field_data, }; @@ -9224,7 +9229,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *d return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, @@ -9234,7 +9239,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fget bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, @@ -9244,13 +9249,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fset bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_field_data, }; @@ -9393,7 +9398,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_rarp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_rarp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_get, bcmpkt_rarp_t_hardware_type_get, bcmpkt_rarp_t_operation_get, @@ -9405,7 +9410,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_rarp_t_fget[BCM56890_A0_DNA_6 bcmpkt_rarp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_rarp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_rarp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_set, bcmpkt_rarp_t_hardware_type_set, bcmpkt_rarp_t_operation_set, @@ -9417,13 +9422,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_rarp_t_fset[BCM56890_A0_DNA_6 bcmpkt_rarp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rarp_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_rarp_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_rarp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_rarp_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_rarp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_rarp_t_field_data, }; @@ -9503,7 +9508,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_routing_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_routing_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_get, bcmpkt_routing_t_hdr_ext_len_get, bcmpkt_routing_t_next_header_get, @@ -9511,7 +9516,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_routing_t_fget[BCM56890_A0_DN bcmpkt_routing_t_segments_left_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_routing_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_routing_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_set, bcmpkt_routing_t_hdr_ext_len_set, bcmpkt_routing_t_next_header_set, @@ -9519,13 +9524,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_routing_t_fset[BCM56890_A0_DN bcmpkt_routing_t_segments_left_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_routing_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_routing_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_routing_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_routing_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_routing_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_routing_t_field_data, }; @@ -9559,23 +9564,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_rspan_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_rspan_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_get, bcmpkt_rspan_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_rspan_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_rspan_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_set, bcmpkt_rspan_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rspan_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_rspan_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_rspan_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_rspan_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_rspan_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_rspan_t_field_data, }; @@ -9684,7 +9689,7 @@ static int32_t bcmpkt_segment_routing_srh_t_tag_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { bcmpkt_segment_routing_srh_t_flags_get, bcmpkt_segment_routing_srh_t_hdr_ext_len_get, bcmpkt_segment_routing_srh_t_last_entry_get, @@ -9694,7 +9699,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fget[BC bcmpkt_segment_routing_srh_t_tag_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { bcmpkt_segment_routing_srh_t_flags_set, bcmpkt_segment_routing_srh_t_hdr_ext_len_set, bcmpkt_segment_routing_srh_t_last_entry_set, @@ -9704,13 +9709,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fset[BC bcmpkt_segment_routing_srh_t_tag_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_field_data, }; @@ -9820,7 +9825,7 @@ static int32_t bcmpkt_segment_routing_t_tag_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { bcmpkt_segment_routing_t_hdr_ext_len_get, bcmpkt_segment_routing_t_last_entry_flags_get, bcmpkt_segment_routing_t_next_header_get, @@ -9830,7 +9835,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fget[BCM568 bcmpkt_segment_routing_t_tag_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { bcmpkt_segment_routing_t_hdr_ext_len_set, bcmpkt_segment_routing_t_last_entry_flags_set, bcmpkt_segment_routing_t_next_header_set, @@ -9840,13 +9845,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fset[BCM568 bcmpkt_segment_routing_t_tag_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_field_data, }; @@ -9896,25 +9901,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_get, bcmpkt_sflow_shim_0_t_sys_source_get, bcmpkt_sflow_shim_0_t_version_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_set, bcmpkt_sflow_shim_0_t_sys_source_set, bcmpkt_sflow_shim_0_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_field_data, }; @@ -10038,7 +10043,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_get, bcmpkt_sflow_shim_1_t_flag_discarded_get, bcmpkt_sflow_shim_1_t_flag_flex_sample_get, @@ -10049,7 +10054,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fget[BCM56890_ bcmpkt_sflow_shim_1_t_sys_opcode_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_set, bcmpkt_sflow_shim_1_t_flag_discarded_set, bcmpkt_sflow_shim_1_t_flag_flex_sample_set, @@ -10060,13 +10065,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fset[BCM56890_ bcmpkt_sflow_shim_1_t_sys_opcode_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_field_data, }; @@ -10101,23 +10106,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_get, bcmpkt_sflow_shim_2_t_user_meta_data_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_set, bcmpkt_sflow_shim_2_t_user_meta_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_field_data, }; @@ -10152,23 +10157,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_get, bcmpkt_snap_llc_t_snap_llc_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_set, bcmpkt_snap_llc_t_snap_llc_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_field_data, }; @@ -10188,21 +10193,21 @@ static int32_t bcmpkt_std_segment_id_t_data_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { bcmpkt_std_segment_id_t_data_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { bcmpkt_std_segment_id_t_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_field_data, }; @@ -10236,23 +10241,23 @@ static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_svtag_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_svtag_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FID_COUNT] = { bcmpkt_svtag_t_data_lwr_get, bcmpkt_svtag_t_data_upr_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_svtag_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_svtag_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FID_COUNT] = { bcmpkt_svtag_t_data_lwr_set, bcmpkt_svtag_t_data_upr_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_svtag_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_svtag_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_svtag_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_svtag_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_svtag_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_svtag_t_field_data, }; @@ -10286,23 +10291,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_get, bcmpkt_tcp_first_4bytes_t_src_port_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_set, bcmpkt_tcp_first_4bytes_t_src_port_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_field_data, }; @@ -10398,7 +10403,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_get, bcmpkt_tcp_last_16bytes_t_checksum_get, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, @@ -10407,7 +10412,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fget[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_set, bcmpkt_tcp_last_16bytes_t_checksum_set, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, @@ -10416,13 +10421,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fset[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_field_data, }; @@ -10486,27 +10491,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_udp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_udp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_get, bcmpkt_udp_t_dst_port_get, bcmpkt_udp_t_src_port_get, bcmpkt_udp_t_udp_length_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_udp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_udp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_set, bcmpkt_udp_t_dst_port_set, bcmpkt_udp_t_src_port_set, bcmpkt_udp_t_udp_length_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_udp_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_udp_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_udp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_udp_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_udp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_udp_t_field_data, }; @@ -10542,23 +10547,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_field_data, }; @@ -10578,21 +10583,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_field_data, }; @@ -10657,27 +10662,27 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_get, bcmpkt_unknown_l5_t_l5_bytes_2_3_get, bcmpkt_unknown_l5_t_l5_bytes_4_7_get, bcmpkt_unknown_l5_t_l5_bytes_8_9_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_set, bcmpkt_unknown_l5_t_l5_bytes_2_3_set, bcmpkt_unknown_l5_t_l5_bytes_4_7_set, bcmpkt_unknown_l5_t_l5_bytes_8_9_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_field_data, }; @@ -10741,27 +10746,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_vlan_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_vlan_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_get, bcmpkt_vlan_t_pcp_get, bcmpkt_vlan_t_tpid_get, bcmpkt_vlan_t_vid_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_vlan_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_vlan_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_set, bcmpkt_vlan_t_pcp_set, bcmpkt_vlan_t_tpid_set, bcmpkt_vlan_t_vid_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_vlan_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_vlan_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_vlan_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_vlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_vlan_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_vlan_t_field_data, }; @@ -10811,25 +10816,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_vxlan_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_vxlan_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_get, bcmpkt_vxlan_t_reserved2_get, bcmpkt_vxlan_t_vn_id_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_vxlan_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_vxlan_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_set, bcmpkt_vxlan_t_reserved2_set, bcmpkt_vxlan_t_vn_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_vxlan_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_vxlan_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_vxlan_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_vxlan_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_vxlan_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_vxlan_t_field_data, }; @@ -10941,7 +10946,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_wesp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_wesp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_get, bcmpkt_wesp_t_header_len_get, bcmpkt_wesp_t_next_header_get, @@ -10951,7 +10956,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_wesp_t_fget[BCM56890_A0_DNA_6 bcmpkt_wesp_t_wesp_iv_get, }; -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_wesp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_wesp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_set, bcmpkt_wesp_t_header_len_set, bcmpkt_wesp_t_next_header_set, @@ -10961,513 +10966,513 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_wesp_t_fset[BCM56890_A0_DNA_6 bcmpkt_wesp_t_wesp_iv_set, }; -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_wesp_t_field_data[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_wesp_t_field_data[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_wesp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_30_8_0_wesp_t_field_data, +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_wesp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_31_6_0_wesp_t_field_data, }; -static bcmpkt_flex_pmd_info_t bcm56890_a0_dna_6_5_30_8_0_flexhdr_info_list[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_COUNT] = { +static bcmpkt_flex_pmd_info_t bcm56890_a0_dna_6_5_31_6_0_flexhdr_info_list[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_COUNT] = { { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_arp_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_arp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_arp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_arp_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_arp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_arp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_authen_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_authen_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_authen_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_authen_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_authen_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_authen_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_bfd_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_bfd_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_bfd_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_bfd_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_bfd_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_bfd_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_cntag_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_cntag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_cntag_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_cntag_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_cntag_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_cntag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_dest_option_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_dest_option_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_dest_option_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_dest_option_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_dest_option_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_dest_option_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_esp_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_esp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_esp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_esp_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_esp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_esp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_ethertype_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_ethertype_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ethertype_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ethertype_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ethertype_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ethertype_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_frag_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_frag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_frag_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_frag_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_frag_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_frag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_gpe_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_gpe_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gpe_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gpe_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gpe_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gpe_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_key_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_gre_key_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_key_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_key_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gre_key_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gre_key_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_gre_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gre_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gre_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_icmp_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_icmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_icmp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_icmp_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_icmp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_icmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_igmp_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_igmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_igmp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_igmp_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_igmp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_igmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_ipfix_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_ipfix_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ipfix_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ipfix_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_ipv4_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_ipv4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ipv4_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ipv4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_ipv6_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_ipv6_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ipv6_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ipv6_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_l2_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_l2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_l2_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_l2_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_l2_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_l2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_mpls_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_mpls_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mpls_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mpls_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_mpls_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_mpls_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_p_1588_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_p_1588_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_p_1588_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_p_1588_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_rarp_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_rarp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_rarp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_rarp_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_rarp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_rarp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_routing_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_routing_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_routing_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_routing_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_routing_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_routing_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_rspan_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_rspan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_rspan_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_rspan_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_rspan_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_rspan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_svtag_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_svtag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_svtag_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_svtag_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_svtag_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_svtag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_udp_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_udp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_udp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_udp_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_udp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_udp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_vlan_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_vlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_vlan_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_vlan_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_vlan_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_vlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_vxlan_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_vxlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_vxlan_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_vxlan_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_vxlan_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_vxlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_wesp_t_field_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_wesp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_30_8_0_wesp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_30_8_0_wesp_t_fset, + .flex_fget = bcm56890_a0_dna_6_5_31_6_0_wesp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_31_6_0_wesp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_info, - .reasons_info = &bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reasons_info, + .field_info = &bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_field_info, + .reasons_info = &bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reasons_info, .flex_common_fget = bcm56890_a0_rxpmd_flex_fget, .flex_common_fset = bcm56890_a0_rxpmd_flex_fset, }, }; -static shr_enum_map_t bcm56890_a0_dna_6_5_30_8_0_flexhdr_id_map[] = { - BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +static shr_enum_map_t bcm56890_a0_dna_6_5_31_6_0_flexhdr_id_map[] = { + BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_NAME_MAP_INIT }; -shr_enum_map_t * bcm56890_a0_dna_6_5_30_8_0_flexhdr_map_get(void) +shr_enum_map_t * bcm56890_a0_dna_6_5_31_6_0_flexhdr_map_get(void) { - return bcm56890_a0_dna_6_5_30_8_0_flexhdr_id_map; + return bcm56890_a0_dna_6_5_31_6_0_flexhdr_id_map; } -bcmpkt_flex_pmd_info_t * bcm56890_a0_dna_6_5_30_8_0_flex_pmd_info_get(uint32_t hid) +bcmpkt_flex_pmd_info_t * bcm56890_a0_dna_6_5_31_6_0_flex_pmd_info_get(uint32_t hid) { - if (hid >= BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_COUNT) { + if (hid >= BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_COUNT) { return NULL; } - return &bcm56890_a0_dna_6_5_30_8_0_flexhdr_info_list[hid]; + return &bcm56890_a0_dna_6_5_31_6_0_flexhdr_info_list[hid]; } -int bcm56890_a0_dna_6_5_30_8_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { +int bcm56890_a0_dna_6_5_31_6_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { 14, 21, 22, diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_match_id.c similarity index 66% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_match_id.c index 2f34751f8ff..e4cc5182134 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_match_id.c @@ -2,8 +2,8 @@ * * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm78800_a0_dna_6_5_30_3_1_sf_match_id_info.yml - * for device bcm78800_a0 and variant dna_6_5_30_3_1. + * from the NPL output file(s) bcm78800_a0_dna_6_5_31_5_0_sf_match_id_info.yml + * for device bcm78800_a0 and variant dna_6_5_31_5_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -29,39 +29,39 @@ #include -#include +#include -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] = { 0x366c, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = { 0x78f0, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = { 0x1fffe, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = { 0xff00, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = { 0x1e4c8, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = { 0x4, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] = { 0x10, 0x400000, @@ -104,7 +104,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x777f7, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] = { 0x0, 0x0, @@ -163,7 +163,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xeef0, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] = { 0x0, 0x0, @@ -224,7 +224,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x80080200, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] = { 0x0, 0x0, @@ -270,7 +270,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x1ddfdd, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] = { 0x0, 0x0, @@ -329,7 +329,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xeef0000, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] = { 0x0, 0x0, @@ -388,7 +388,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x10000000, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] = { 0x1e, 0x400000, @@ -421,7 +421,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x1bbbfb, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] = { 0x0, 0x0, @@ -470,7 +470,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x777, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] = { 0x0, 0x0, @@ -530,7 +530,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x1dd, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] = { 0x0, 0x0, @@ -582,7 +582,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xeef, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] = { 0x0, 0x0, @@ -642,7 +642,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x1dde00, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] = { 0x0, 0x400000, @@ -703,7 +703,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x2000008, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] = { 0x0, 0x0, @@ -755,7 +755,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x15e000, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] = { 0x0, 0x0, @@ -807,7 +807,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x110000, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] = { 0x0, 0x0, @@ -847,7 +847,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x10000, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] = { 0x18, 0x400000, @@ -887,7 +887,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x1000e, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] = { 0x0, 0x0, @@ -949,7 +949,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xe, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] = { 0x0, 0x0, @@ -1011,7 +1011,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x2, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] = { 0x0, 0x0, @@ -1066,7 +1066,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xeefeef, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] = { 0x0, 0x0, @@ -1127,7 +1127,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x3, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] = { 0x0, 0x0, @@ -1160,7 +1160,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x80000, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] = { 0x0, 0x0, @@ -1218,7 +1218,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x1ddfddf, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] = { 0x0, 0x0, @@ -1279,7 +1279,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x3bbc, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] = { 0x0, 0x0, @@ -1340,7 +1340,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x2c02c0b0, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] = { 0x0, 0x0, @@ -1401,7 +1401,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x280280a0, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] = { 0x0, 0x0, @@ -1463,7 +1463,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x6, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] = { 0x0, 0x0, @@ -1496,7 +1496,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x100000, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] = { 0x0, 0x0, @@ -1558,7 +1558,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x8, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] = { 0x0, 0x0, @@ -1620,7 +1620,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0x4, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] = { 0x0, 0x0, @@ -1682,7 +1682,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xe, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] = { 0x0, 0x0, @@ -1744,66 +1744,66 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr 0xe, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[2] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[2] = { 0xcc066330, 0x66330198, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[2] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[2] = { 0x10088440, 0x88440221, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[3] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[3] = { 0xff800000, 0xffffffff, 0x7, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[3] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[3] = { 0x0, 0xffffe000, 0x7, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[3] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[3] = { 0xe01f0f80, 0xf0f807c3, 0x1, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[3] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[3] = { 0xfffffffe, 0xffffffff, 0x7, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[3] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[3] = { 0x3ff000, 0xff000ffc, 0x3, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[3] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[3] = { 0x88744a20, 0x44a21d12, 0x7, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = { 0x4, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[15] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[15] = { 0x10, 0x0, @@ -1822,7 +1822,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xf7, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[37] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[37] = { 0x0, 0x0, @@ -1855,15 +1855,15 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x3dfbc000, - 0x0, + 0x1efde000, 0x0, 0x0, 0x0, - 0xf7ef000, + 0xf0000000, + 0xf7e, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[42] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[41] = { 0x0, 0x0, @@ -1896,20 +1896,19 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x100008, 0x200010, 0x80020, - 0x200008, - 0x400020, - 0x800040, - 0x200080, - 0x100020, - 0x80004, 0x100008, 0x200010, - 0x80020, - 0x44400008, - 0x4444, + 0x400020, + 0x100040, + 0x40010, + 0x80008, + 0x100010, + 0x200020, + 0x80008, + 0x44444440, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn[40] = { 0x0, 0x0, @@ -1942,19 +1941,18 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x200010, 0x400020, 0x100040, - 0x400010, - 0x800040, - 0x1000080, - 0x400100, - 0x200040, - 0x100008, 0x200010, 0x400020, - 0x100040, - 0x10, + 0x800040, + 0x200080, + 0x80020, + 0x100010, + 0x200020, + 0x400040, + 0x100010, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[19] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[19] = { 0x0, 0x0, @@ -1977,7 +1975,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3df, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[38] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[37] = { 0x0, 0x0, @@ -2010,16 +2008,15 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xf7e, 0x0, 0x0, - 0xc0000000, - 0x3dfb, + 0xe0000000, + 0x1efd, 0x0, 0x0, 0x0, - 0xf0000000, - 0xf7e, + 0xf7ef000, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[38] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[37] = { 0x0, 0x0, @@ -2053,15 +2050,14 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x4000, - 0x0, + 0x2000, 0x0, 0x0, 0x0, - 0x1000, + 0x10000000, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[42] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[42] = { 0x1e, 0x0, @@ -2094,20 +2090,20 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xfefdff7e, 0xfdfbfefd, 0xff7efdfb, - 0xfdfbff7e, - 0xfbf7fdfb, - 0xf7effbf7, - 0xfdfbf7ef, - 0x7efdfdfb, - 0xff7effbf, 0xfefdff7e, 0xfdfbfefd, - 0xff7efdfb, - 0xffffef7e, - 0x7ffff, + 0xfbf7fdfb, + 0xfefdfbf7, + 0xffbf7efd, + 0xff7eff7e, + 0xfefdfefd, + 0xfdfbfdfb, + 0xef7eff7e, + 0xffffffff, + 0x7, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[22] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[22] = { 0x0, 0x0, @@ -2133,7 +2129,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xf7eff7e, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[38] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[38] = { 0x0, 0x0, @@ -2167,15 +2163,15 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x7bf78000, - 0x0, + 0x3dfbc000, 0x0, 0x0, 0x0, - 0x1efde000, + 0xe0000000, + 0x1efd, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[40] = { 0x0, 0x0, @@ -2208,19 +2204,18 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xc00060, 0x18000c0, 0x600180, - 0x1800060, - 0x3000180, - 0x6000300, - 0x1800600, - 0xc00180, - 0x600030, 0xc00060, 0x18000c0, - 0x600180, - 0x60, + 0x3000180, + 0xc00300, + 0x3000c0, + 0x600060, + 0xc000c0, + 0x1800180, + 0x600060, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[23] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[23] = { 0x0, 0x0, @@ -2247,7 +2242,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x7ffffff, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[23] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[23] = { 0x0, 0x0, @@ -2274,7 +2269,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3fff, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[23] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[23] = { 0x0, 0x0, @@ -2301,7 +2296,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3fc07f, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[23] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[23] = { 0x0, 0x0, @@ -2328,7 +2323,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x6333366, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[23] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[23] = { 0x0, 0x0, @@ -2355,7 +2350,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x7bc3c78, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[27] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[27] = { 0x0, 0x0, @@ -2386,7 +2381,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xf7eff7e, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[39] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[38] = { 0x0, 0x0, @@ -2420,16 +2415,15 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x1efd, 0x0, 0x0, - 0x80000000, - 0x7bf7, + 0xc0000000, + 0x3dfb, 0x0, 0x0, 0x0, - 0xe0000000, - 0x1efd, + 0x1efde000, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[40] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[40] = { 0x0, 0x0, @@ -2462,18 +2456,18 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x40004000, 0x8000a000, 0x20000000, - 0x80008000, - 0x10000, - 0x28001, - 0x80000002, - 0x0, - 0x20002000, 0x40004000, - 0x8000a000, + 0x80008000, + 0x14000, + 0x40000001, 0x20000000, + 0x40002000, + 0xa0004000, + 0x8000, + 0x2000, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[28] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[28] = { 0x0, 0x0, @@ -2505,7 +2499,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x85, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[28] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[28] = { 0x0, 0x0, @@ -2537,7 +2531,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x81, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[11] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[11] = { 0x0, 0x0, @@ -2552,7 +2546,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x20, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[40] = { 0x0, 0x0, @@ -2585,19 +2579,18 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x800040, 0x1000080, 0x400100, - 0x1000040, - 0x2000100, - 0x4000200, - 0x1000400, - 0x800100, - 0x400020, 0x800040, 0x1000080, - 0x400100, - 0x40, + 0x2000100, + 0x800200, + 0x200080, + 0x400040, + 0x800080, + 0x1000100, + 0x400040, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[11] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[11] = { 0x18, 0x0, @@ -2612,7 +2605,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x20, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[40] = { 0x0, 0x0, @@ -2645,19 +2638,18 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xfefdff7e, 0xfdfbfefd, 0xff7efdfb, - 0xfdfbff7e, - 0xfbf7fdfb, - 0xf7effbf7, - 0xfdfbf7ef, - 0x7efdfdfb, - 0xff7effbf, 0xfefdff7e, 0xfdfbfefd, - 0xff7efdfb, - 0xf7e, + 0xfbf7fdfb, + 0xfefdfbf7, + 0xffbf7efd, + 0xff7eff7e, + 0xfefdfefd, + 0xfdfbfdfb, + 0xf7eff7e, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[42] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[41] = { 0x0, 0x0, @@ -2698,12 +2690,11 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x0, - 0xffffe000, - 0xffff, + 0xe0000000, + 0xffffffff, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[42] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[41] = { 0x0, 0x0, @@ -2744,12 +2735,11 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x0, - 0xffffc000, - 0xfff, + 0xc0000000, + 0xfffffff, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[42] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[41] = { 0x0, 0x0, @@ -2790,12 +2780,11 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x0, - 0xffff8000, - 0xff, + 0x80000000, + 0xffffff, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[42] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[41] = { 0x0, 0x0, @@ -2837,11 +2826,10 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xffff0000, - 0xf, + 0xfffff, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[41] = { 0x0, 0x0, @@ -2883,10 +2871,10 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xfffe0000, + 0xfffe, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[41] = { 0x0, 0x0, @@ -2928,10 +2916,10 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xffc0000, + 0xffc, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[41] = { 0x0, 0x0, @@ -2973,10 +2961,10 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xf80000, + 0xf8, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[42] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[41] = { 0x0, 0x0, @@ -3018,11 +3006,10 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x66600000, - 0x6666, + 0x66666660, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[42] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[41] = { 0x0, 0x0, @@ -3064,11 +3051,10 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x88800000, - 0x8888, + 0x88888880, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[42] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[42] = { 0x0, 0x0, @@ -3101,20 +3087,20 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x2000100, 0x4000200, 0x1000400, - 0x4000100, - 0x8000400, - 0x10000800, - 0x4001000, - 0x2000400, - 0x1000080, 0x2000100, 0x4000200, - 0x1000400, - 0x100, - 0x10000, + 0x8000400, + 0x2000800, + 0x800200, + 0x1000100, + 0x2000200, + 0x4000400, + 0x1000100, + 0x0, + 0x1, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[32] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[32] = { 0x0, 0x0, @@ -3150,7 +3136,7 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xf7e, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[39] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[39] = { 0x0, 0x0, @@ -3185,15 +3171,15 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xf7ef0000, - 0x0, + 0x7bf78000, 0x0, 0x0, 0x0, - 0x3dfbc000, + 0xc0000000, + 0x3dfb, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[42] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[42] = { 0x0, 0x0, @@ -3236,10 +3222,10 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x20000, + 0x2, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[36] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[36] = { 0x0, 0x0, @@ -3272,14 +3258,14 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0xfdfbe000, + 0xfefdf000, + 0xfdfbfefd, 0xfbf7fdfb, - 0xf7effbf7, - 0xfdfbf7ef, - 0x3dfb, + 0xfefdfbf7, + 0x1efd, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[40] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[39] = { 0x0, 0x0, @@ -3314,56 +3300,15 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x3dfb, 0x0, 0x0, - 0x0, - 0xf7ef, - 0x0, - 0x0, - 0x0, - 0xc0000000, - 0x3dfb, -}; - -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[36] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, + 0x80000000, + 0x7bf7, 0x0, 0x0, 0x0, - 0x1efdc000, + 0x3dfbc000, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[40] = { 0x0, 0x0, @@ -3396,19 +3341,18 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x80058002, 0xb0005, 0xc002c00b, - 0xb0002, - 0x16000b, - 0x2c0016, - 0xb002c, - 0x6005800b, - 0xc002c001, 0x80058002, 0xb0005, - 0xc002c00b, - 0x2, + 0x16000b, + 0x80058016, + 0xc0016005, + 0x8002c002, + 0x58005, + 0xc00b000b, + 0x2c002, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[40] = { 0x0, 0x0, @@ -3441,19 +3385,18 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x50002, 0xa0005, 0x8002800a, - 0xa0002, - 0x14000a, - 0x280014, - 0xa0028, - 0x4005000a, - 0x80028001, 0x50002, 0xa0005, - 0x8002800a, - 0x2, + 0x14000a, + 0x50014, + 0x80014005, + 0x28002, + 0x50005, + 0x800a000a, + 0x28002, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[40] = { 0x0, 0x0, @@ -3486,19 +3429,18 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xef8077c, 0x1df00ef8, 0x77c1df0, - 0x1df0077c, - 0x3be01df0, - 0x77c03be0, - 0x1df077c0, - 0xef81df0, - 0x77c03be, 0xef8077c, 0x1df00ef8, - 0x77c1df0, - 0x77c, + 0x3be01df0, + 0xef83be0, + 0x3be0ef8, + 0x77c077c, + 0xef80ef8, + 0x1df01df0, + 0x77c077c, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[42] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[42] = { 0x0, 0x0, @@ -3541,10 +3483,10 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x40000, + 0x4, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[40] = { 0x0, 0x0, @@ -3577,19 +3519,18 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x10000800, 0x20001000, 0x8002000, - 0x20000800, - 0x40002000, - 0x80004000, - 0x20008000, - 0x10002000, - 0x8000400, 0x10000800, 0x20001000, - 0x8002000, - 0x800, + 0x40002000, + 0x10004000, + 0x4001000, + 0x8000800, + 0x10001000, + 0x20002000, + 0x8000800, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[40] = { 0x0, 0x0, @@ -3622,19 +3563,18 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x4040202, 0x8080404, 0x2020808, - 0x8080202, - 0x10100808, - 0x20201010, - 0x8082020, - 0x4040808, - 0x2020101, 0x4040202, 0x8080404, - 0x2020808, - 0x202, + 0x10100808, + 0x4041010, + 0x1010404, + 0x2020202, + 0x4040404, + 0x8080808, + 0x2020202, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[40] = { 0x0, 0x0, @@ -3667,19 +3607,18 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x8000400, 0x10000800, 0x4001000, - 0x10000400, - 0x20001000, - 0x40002000, - 0x10004000, - 0x8001000, - 0x4000200, 0x8000400, 0x10000800, - 0x4001000, - 0x400, + 0x20001000, + 0x8002000, + 0x2000800, + 0x4000400, + 0x8000800, + 0x10001000, + 0x4000400, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[41] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[40] = { 0x0, 0x0, @@ -3716,16 +3655,15 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0x0, 0x0, 0x0, - 0x0, - 0xff7ef800, - 0xfefdff7e, - 0xfdfbfefd, - 0xff7efdfb, - 0xf7e, -}; - -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[41] = -{ + 0xf8000000, + 0xff7eff7e, + 0xfefdfefd, + 0xfdfbfdfb, + 0xf7eff7e, +}; + +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[40] = +{ 0x0, 0x0, 0x0, @@ -3760,884 +3698,869 @@ static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr 0xf7e, 0x0, 0x0, - 0xc0000000, - 0x3dfb, + 0xe0000000, + 0x1efd, 0x0, 0x0, 0x0, - 0xf0000000, - 0xf7e, + 0xf7ef000, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = { 0x4, }; -static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = { 0x8, }; static bcmpkt_rxpmd_match_id_db_t -bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_COUNT] = { +bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_COUNT] = { { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_CNTAG", .match = 0x80, .match_mask = 0xc0, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 7, .minbit = 6, .value = 0x2, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */ .name = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", .match = 0x40, .match_mask = 0xc0, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 7, .minbit = 6, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", .match = 0x2, .match_mask = 0x2, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 1, .minbit = 1, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", .match = 0x8, .match_mask = 0x8, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 3, .minbit = 3, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", .match = 0x20, .match_mask = 0x20, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ .name = "EGRESS_PKT_FWD_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 0, .minbit = 0, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ .name = "EGRESS_PKT_FWD_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 7, .minbit = 0, .value = 0x0, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", .match = 0x10, .match_mask = 0x10, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 4, .minbit = 4, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 2, .minbit = 2, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", .match = 0x4000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match_mask = 0x7c006, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", - .match = 0x24000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x10000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x9, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", .match = 0x140, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x5, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", .match = 0x3000, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x6, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_DCN", - .match = 0x818, + .match = 0x810, .match_mask = 0x3c18, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x2c000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0xc004, + .match_mask = 0x1c406, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xb, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", .match = 0x200, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x8, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", .match = 0x40, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 0, .minbit = 0, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", - .match = 0x30000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x18000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xc, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", .match = 0x240, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x9, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", - .match = 0x38, + .match = 0x30, .match_mask = 0x438, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", - .match = 0x10, - .match_mask = 0x418, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 4, - .minbit = 3, - .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .match = 0x40000, + .match_mask = 0x40000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 18, + .minbit = 18, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", .match = 0x80, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", .match = 0x1800, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x3, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", - .match = 0x10000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x44000, + .match_mask = 0x5c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x4, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", - .match = 0x30, - .match_mask = 0x438, - .match_maxbit = 53, - .match_minbit = 36, + .match = 0x40020, + .match_mask = 0x40020, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x4004, + .match_mask = 0x7c406, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", .match = 0xc0, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x3, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3818, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", - .match = 0x2c0, - .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 9, - .minbit = 6, - .value = 0xb, - .pmaxbit = 53, - .pminbit = 36, + .match = 0x20000, + .match_mask = 0x20000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 17, + .minbit = 17, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0xc000, + .match = 0x24000, .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x3, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", .match = 0x100, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x4, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", .match = 0x1000, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", .match = 0x2, .match_mask = 0x406, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 2, .minbit = 1, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", .match = 0x4, .match_mask = 0x406, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 2, .minbit = 1, .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", .match = 0x400, .match_mask = 0x400, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 10, .minbit = 10, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", .match = 0x402, .match_mask = 0x402, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 1, .minbit = 1, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", .match = 0x404, .match_mask = 0x404, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 2, .minbit = 2, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", .match = 0x408, .match_mask = 0x408, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 3, .minbit = 3, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", .match = 0x410, .match_mask = 0x410, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 4, .minbit = 4, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", .match = 0x420, .match_mask = 0x420, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", .match = 0x440, .match_mask = 0x440, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 6, .minbit = 6, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", .match = 0x480, .match_mask = 0x480, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 7, .minbit = 7, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", .match = 0x500, .match_mask = 0x500, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 8, .minbit = 8, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", .match = 0x0, - .match_mask = 0x3ffff, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match_mask = 0x7ffff, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 18, .minbit = 0, .value = 0x0, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", .match = 0x2800, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x5, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", - .match = 0x34000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x1c000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xd, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", .match = 0x280, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0xa, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", - .match = 0x14000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x8000, + .match_mask = 0x1c006, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x5, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", - .match = 0x20000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x8004, + .match_mask = 0x1c406, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x8, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", .match = 0x1c0, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x7, - .pmaxbit = 53, - .pminbit = 36, - - }, - { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", - .match = 0x18000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, - .minbit = 14, - .value = 0x6, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x8, .match_mask = 0x418, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 4, .minbit = 3, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x28, .match_mask = 0x438, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", - .match = 0x18, + .match = 0x10, .match_mask = 0x418, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 4, .minbit = 3, - .value = 0x3, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", - .match = 0x1c000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0xc000, + .match_mask = 0x1c006, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x7, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", .match = 0x2000, .match_mask = 0x3818, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x4, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", .match = 0x3800, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x7, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", - .match = 0x2018, + .match = 0x2010, .match_mask = 0x3c18, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x4, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", - .match = 0x28000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x14000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xa, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", .match = 0x180, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x6, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ .name = "EGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -4651,7 +4574,7 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -4665,7 +4588,7 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ .name = "EGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -4679,7 +4602,7 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", .match = 0x80, .match_mask = 0xc0, @@ -4693,7 +4616,7 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", .match = 0x40, .match_mask = 0xc0, @@ -4707,7 +4630,7 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", .match = 0x2, .match_mask = 0x2, @@ -4721,7 +4644,7 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", .match = 0x8, .match_mask = 0x8, @@ -4735,7 +4658,7 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", .match = 0x20, .match_mask = 0x20, @@ -4749,7 +4672,7 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -4763,7 +4686,7 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -4777,7 +4700,7 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", .match = 0x10, .match_mask = 0x10, @@ -4791,7 +4714,7 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -4805,1433 +4728,1419 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", .match = 0x4000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match_mask = 0x7c006, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", - .match = 0x24000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x10000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x9, - .pmaxbit = 27, + .value = 0x4, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", .match = 0x140, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x5, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", .match = 0x3000, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x6, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN", - .match = 0x818, + .match = 0x810, .match_mask = 0x3c18, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x2c000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0xc004, + .match_mask = 0x1c406, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xb, - .pmaxbit = 27, + .value = 0x3, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", .match = 0x200, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x8, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", .match = 0x40, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 0, .minbit = 0, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", - .match = 0x30000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x18000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xc, - .pmaxbit = 27, + .value = 0x6, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", .match = 0x240, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x9, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", - .match = 0x38, + .match = 0x30, .match_mask = 0x438, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", - .match = 0x10, - .match_mask = 0x418, - .match_maxbit = 27, + .match = 0x40000, + .match_mask = 0x40000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 4, - .minbit = 3, - .value = 0x2, - .pmaxbit = 27, + .maxbit = 18, + .minbit = 18, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", .match = 0x80, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", .match = 0x1800, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x3, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", - .match = 0x10000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x44000, + .match_mask = 0x5c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x4, - .pmaxbit = 27, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", - .match = 0x30, - .match_mask = 0x438, - .match_maxbit = 27, + .match = 0x40020, + .match_mask = 0x40020, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x4004, + .match_mask = 0x7c406, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x2, - .pmaxbit = 27, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", .match = 0xc0, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x3, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3818, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", - .match = 0x2c0, - .match_mask = 0x7c0, - .match_maxbit = 27, + .match = 0x20000, + .match_mask = 0x20000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 9, - .minbit = 6, - .value = 0xb, - .pmaxbit = 27, + .maxbit = 17, + .minbit = 17, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0xc000, + .match = 0x24000, .match_mask = 0x3c000, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x3, - .pmaxbit = 27, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", .match = 0x100, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x4, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", .match = 0x1000, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", .match = 0x2, .match_mask = 0x406, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 2, .minbit = 1, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", .match = 0x4, .match_mask = 0x406, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 2, .minbit = 1, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", .match = 0x400, .match_mask = 0x400, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 10, .minbit = 10, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", .match = 0x402, .match_mask = 0x402, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 1, .minbit = 1, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", .match = 0x404, .match_mask = 0x404, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 2, .minbit = 2, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", .match = 0x408, .match_mask = 0x408, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 3, .minbit = 3, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", .match = 0x410, .match_mask = 0x410, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 4, .minbit = 4, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", .match = 0x420, .match_mask = 0x420, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", .match = 0x440, .match_mask = 0x440, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 6, .minbit = 6, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", .match = 0x480, .match_mask = 0x480, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 7, .minbit = 7, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", .match = 0x500, .match_mask = 0x500, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 8, .minbit = 8, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", .match = 0x0, - .match_mask = 0x3ffff, - .match_maxbit = 27, + .match_mask = 0x7ffff, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 18, .minbit = 0, .value = 0x0, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", .match = 0x2800, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x5, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", - .match = 0x34000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x1c000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xd, - .pmaxbit = 27, + .value = 0x7, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", .match = 0x280, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0xa, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", - .match = 0x14000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x8000, + .match_mask = 0x1c006, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x5, - .pmaxbit = 27, + .value = 0x2, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", - .match = 0x20000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x8004, + .match_mask = 0x1c406, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x8, - .pmaxbit = 27, + .value = 0x2, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", .match = 0x1c0, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x7, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", - .match = 0x18000, - .match_mask = 0x3c000, - .match_maxbit = 27, - .match_minbit = 10, - .maxbit = 17, - .minbit = 14, - .value = 0x6, - .pmaxbit = 27, - .pminbit = 10, - - }, - { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x8, .match_mask = 0x418, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 4, .minbit = 3, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x28, .match_mask = 0x438, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", - .match = 0x18, + .match = 0x10, .match_mask = 0x418, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 4, .minbit = 3, - .value = 0x3, - .pmaxbit = 27, + .value = 0x2, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", - .match = 0x1c000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0xc000, + .match_mask = 0x1c006, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x7, - .pmaxbit = 27, + .value = 0x3, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", .match = 0x2000, .match_mask = 0x3818, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x4, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", .match = 0x3800, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x7, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", - .match = 0x2018, + .match = 0x2010, .match_mask = 0x3c18, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x4, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", - .match = 0x28000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x14000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xa, - .pmaxbit = 27, + .value = 0x5, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", .match = 0x180, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x6, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_CNTAG", .match = 0x80, .match_mask = 0xc0, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 7, .minbit = 6, .value = 0x2, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, .zone_minbit = 20, .arc_id_mask = 0x1f00000, .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", .match = 0x20, .match_mask = 0x20, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, .zone_minbit = 20, .arc_id_mask = 0x1f00000, .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ .name = "INGRESS_PKT_INNER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 0, .minbit = 0, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, .zone_minbit = 20, .arc_id_mask = 0x1f00000, .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ .name = "INGRESS_PKT_INNER_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 7, .minbit = 0, .value = 0x0, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, .zone_minbit = 20, .arc_id_mask = 0x1f00000, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", .match = 0x10, .match_mask = 0x10, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 4, .minbit = 4, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, .zone_minbit = 20, .arc_id_mask = 0x1f00000, .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, - .match_maxbit = 35, - .match_minbit = 28, + .match_maxbit = 36, + .match_minbit = 29, .maxbit = 2, .minbit = 2, .value = 0x1, - .pmaxbit = 35, - .pminbit = 28, + .pmaxbit = 36, + .pminbit = 29, .zone_minbit = 20, .arc_id_mask = 0x1f00000, .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", .match = 0x4000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match_mask = 0x7c006, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", - .match = 0x24000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x10000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x9, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 39, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", .match = 0x140, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x5, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 55, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", .match = 0x3000, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x6, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 57, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x2c000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0xc004, + .match_mask = 0x1c406, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xb, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 42, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", .match = 0x200, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x8, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 55, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", .match = 0x40, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 55, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 0, .minbit = 0, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 29, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", - .match = 0x30000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x18000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xc, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 45, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", .match = 0x240, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x9, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 56, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x4004, + .match_mask = 0x7c406, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 48, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", .match = 0xc0, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x3, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 56, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3818, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 57, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", - .match = 0x2c0, - .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 9, - .minbit = 6, - .value = 0xb, - .pmaxbit = 53, - .pminbit = 36, + .match = 0x20000, + .match_mask = 0x20000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 17, + .minbit = 17, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 48, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0xc000, + .match = 0x24000, .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x3, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 48, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", .match = 0x100, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x4, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 36, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", .match = 0x2, .match_mask = 0x406, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 2, .minbit = 1, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 36, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", .match = 0x4, .match_mask = 0x406, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 2, .minbit = 1, .value = 0x2, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", .match = 0x0, - .match_mask = 0x3ffff, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match_mask = 0x7ffff, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 18, .minbit = 0, .value = 0x0, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", .match = 0x2800, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x5, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", - .match = 0x34000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x1c000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xd, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 51, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", .match = 0x280, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0xa, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 57, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", - .match = 0x14000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x8000, + .match_mask = 0x1c006, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x5, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 29, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", - .match = 0x20000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x8004, + .match_mask = 0x1c406, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x8, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 54, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", .match = 0x1c0, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x7, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 57, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x8, .match_mask = 0x418, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 4, .minbit = 3, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 57, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x28, .match_mask = 0x438, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 57, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", - .match = 0x18, + .match = 0x10, .match_mask = 0x418, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 4, .minbit = 3, - .value = 0x3, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x1c000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0xc000, + .match_mask = 0x1c006, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0x7, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 29, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2000, .match_mask = 0x3818, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x4, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", .match = 0x3800, .match_mask = 0x3800, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 13, .minbit = 11, .value = 0x7, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", - .match = 0x28000, - .match_mask = 0x3c000, - .match_maxbit = 53, - .match_minbit = 36, - .maxbit = 17, + .match = 0x14000, + .match_mask = 0x1c000, + .match_maxbit = 55, + .match_minbit = 37, + .maxbit = 16, .minbit = 14, - .value = 0xa, - .pmaxbit = 53, - .pminbit = 36, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */ .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", .match = 0x180, .match_mask = 0x7c0, - .match_maxbit = 53, - .match_minbit = 36, + .match_maxbit = 55, + .match_minbit = 37, .maxbit = 9, .minbit = 6, .value = 0x6, - .pmaxbit = 53, - .pminbit = 36, + .pmaxbit = 55, + .pminbit = 37, .zone_minbit = 25, .arc_id_mask = 0xffe000000, .num_zone_bmp_words = 58, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_CNTAG", .match = 0x80, .match_mask = 0xc0, @@ -6245,11 +6154,11 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 2, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */ .name = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", .match = 0x40, .match_mask = 0xc0, @@ -6263,11 +6172,11 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 2, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", .match = 0x2, .match_mask = 0x2, @@ -6281,11 +6190,11 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 3, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", .match = 0x8, .match_mask = 0x8, @@ -6299,11 +6208,11 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 3, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", .match = 0x20, .match_mask = 0x20, @@ -6317,11 +6226,11 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 3, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ .name = "INGRESS_PKT_OUTER_L2_HDR_L2", .match = 0x1, .match_mask = 0x1, @@ -6335,11 +6244,11 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 3, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", .match = 0x0, .match_mask = 0xff, @@ -6355,7 +6264,7 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", .match = 0x10, .match_mask = 0x10, @@ -6369,11 +6278,11 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 3, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", .match = 0x4, .match_mask = 0x4, @@ -6387,945 +6296,927 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA .zone_minbit = 2, .arc_id_mask = 0x1fc, .num_zone_bmp_words = 3, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", .match = 0x4000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match_mask = 0x7c006, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", - .match = 0x24000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x10000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x9, - .pmaxbit = 27, + .value = 0x4, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 15, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", .match = 0x140, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x5, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 37, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", .match = 0x3000, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x6, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 42, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DCN", - .match = 0x818, + .match = 0x810, .match_mask = 0x3c18, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x2c000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0xc004, + .match_mask = 0x1c406, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xb, - .pmaxbit = 27, + .value = 0x3, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 19, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", .match = 0x200, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x8, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 38, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, + .num_zone_bmp_words = 37, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", .match = 0x40, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 38, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, + .num_zone_bmp_words = 37, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", .match = 0x1, .match_mask = 0x1, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 0, .minbit = 0, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 42, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", - .match = 0x30000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x18000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xc, - .pmaxbit = 27, + .value = 0x6, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 22, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", .match = 0x240, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x9, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 38, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", - .match = 0x38, + .match = 0x30, .match_mask = 0x438, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", - .match = 0x10, - .match_mask = 0x418, - .match_maxbit = 27, + .match = 0x40000, + .match_mask = 0x40000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 4, - .minbit = 3, - .value = 0x2, - .pmaxbit = 27, + .maxbit = 18, + .minbit = 18, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 23, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", .match = 0x80, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 23, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", .match = 0x1800, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x3, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 23, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", - .match = 0x10000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x44000, + .match_mask = 0x5c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x4, - .pmaxbit = 27, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 23, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", - .match = 0x30, - .match_mask = 0x438, - .match_maxbit = 27, + .match = 0x40020, + .match_mask = 0x40020, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 23, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x4004, + .match_mask = 0x7c406, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x2, - .pmaxbit = 27, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 27, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", .match = 0xc0, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x3, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, + .num_zone_bmp_words = 38, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", .match = 0x800, .match_mask = 0x3818, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 40, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", - .match = 0x2c0, - .match_mask = 0x7c0, - .match_maxbit = 27, + .match = 0x20000, + .match_mask = 0x20000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 9, - .minbit = 6, - .value = 0xb, - .pmaxbit = 27, + .maxbit = 17, + .minbit = 17, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 28, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0xc000, + .match = 0x24000, .match_mask = 0x3c000, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x3, - .pmaxbit = 27, + .value = 0x1, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 28, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", .match = 0x100, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x4, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 11, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", .match = 0x1000, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", .match = 0x2, .match_mask = 0x406, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 2, .minbit = 1, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 11, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", .match = 0x4, .match_mask = 0x406, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 2, .minbit = 1, .value = 0x2, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", .match = 0x400, .match_mask = 0x400, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 10, .minbit = 10, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 42, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", .match = 0x402, .match_mask = 0x402, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 1, .minbit = 1, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 42, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", .match = 0x404, .match_mask = 0x404, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 2, .minbit = 2, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 42, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", .match = 0x408, .match_mask = 0x408, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 3, .minbit = 3, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 42, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", .match = 0x410, .match_mask = 0x410, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 4, .minbit = 4, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", .match = 0x420, .match_mask = 0x420, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", .match = 0x440, .match_mask = 0x440, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 6, .minbit = 6, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", .match = 0x480, .match_mask = 0x480, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 7, .minbit = 7, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 42, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", .match = 0x500, .match_mask = 0x500, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 8, .minbit = 8, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 42, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw, + .num_zone_bmp_words = 41, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", .match = 0x0, - .match_mask = 0x3ffff, - .match_maxbit = 27, + .match_mask = 0x7ffff, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 18, .minbit = 0, .value = 0x0, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", .match = 0x2800, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x5, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 42, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", - .match = 0x34000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x1c000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xd, - .pmaxbit = 27, + .value = 0x7, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 32, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", .match = 0x280, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0xa, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 39, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", - .match = 0x14000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x8000, + .match_mask = 0x1c006, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x5, - .pmaxbit = 27, + .value = 0x2, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 42, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", - .match = 0x20000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x8004, + .match_mask = 0x1c406, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x8, - .pmaxbit = 27, + .value = 0x2, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 36, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", .match = 0x1c0, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x7, - .pmaxbit = 27, - .pminbit = 10, - .zone_minbit = 9, - .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, - - }, - { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", - .match = 0x18000, - .match_mask = 0x3c000, - .match_maxbit = 27, - .match_minbit = 10, - .maxbit = 17, - .minbit = 14, - .value = 0x6, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 36, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1, + .num_zone_bmp_words = 39, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", .match = 0x8, .match_mask = 0x418, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 4, .minbit = 3, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", .match = 0x28, .match_mask = 0x438, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 5, .minbit = 5, .value = 0x1, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", - .match = 0x18, + .match = 0x10, .match_mask = 0x418, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 4, .minbit = 3, - .value = 0x3, - .pmaxbit = 27, + .value = 0x2, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x1c000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0xc000, + .match_mask = 0x1c006, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0x7, - .pmaxbit = 27, + .value = 0x3, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, .num_zone_bmp_words = 42, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", .match = 0x2000, .match_mask = 0x3818, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x4, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", .match = 0x3800, .match_mask = 0x3800, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x7, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", - .match = 0x2018, + .match = 0x2010, .match_mask = 0x3c18, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 13, .minbit = 11, .value = 0x4, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", - .match = 0x28000, - .match_mask = 0x3c000, - .match_maxbit = 27, + .match = 0x14000, + .match_mask = 0x1c000, + .match_maxbit = 28, .match_minbit = 10, - .maxbit = 17, + .maxbit = 16, .minbit = 14, - .value = 0xa, - .pmaxbit = 27, + .value = 0x5, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", .match = 0x180, .match_mask = 0x7c0, - .match_maxbit = 27, + .match_maxbit = 28, .match_minbit = 10, .maxbit = 9, .minbit = 6, .value = 0x6, - .pmaxbit = 27, + .pmaxbit = 28, .pminbit = 10, .zone_minbit = 9, .arc_id_mask = 0xffe00, - .num_zone_bmp_words = 41, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, + .num_zone_bmp_words = 40, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ .name = "INGRESS_PKT_SYS_HDR_EP_NIH", .match = 0x2, .match_mask = 0x3, @@ -7339,11 +7230,11 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA .zone_minbit = 0, .arc_id_mask = 0x3, .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", .match = 0x1, .match_mask = 0x3, @@ -7357,11 +7248,11 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA .zone_minbit = 0, .arc_id_mask = 0x3, .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, }, { - /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ .name = "INGRESS_PKT_SYS_HDR_NONE", .match = 0x0, .match_mask = 0x3, @@ -7378,23 +7269,23 @@ bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MA }, }; -static bcmpkt_rxpmd_match_id_db_info_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db_info = { - .num_entries = 228, - .db = bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db +static bcmpkt_rxpmd_match_id_db_info_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_db_info = { + .num_entries = 225, + .db = bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_db }; -bcmpkt_rxpmd_match_id_db_info_t * bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db_info_get(void) { - return &bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db_info; +bcmpkt_rxpmd_match_id_db_info_t * bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_db_info_get(void) { + return &bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_db_info; } -static shr_enum_map_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map[] = { - BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +static shr_enum_map_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_map[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT }; -static bcmpkt_rxpmd_match_id_map_info_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map_info = { - .num_entries = 228, - .map = bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map +static bcmpkt_rxpmd_match_id_map_info_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_map_info = { + .num_entries = 225, + .map = bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_map }; -bcmpkt_rxpmd_match_id_map_info_t * bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map_info_get(void) { - return &bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map_info; +bcmpkt_rxpmd_match_id_map_info_t * bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_map_info_get(void) { + return &bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_map_info; } diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_pkt_flexhdr.c similarity index 70% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_pkt_flexhdr.c index 7ef51b03e9c..d82ee212b8b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_pkt_flexhdr.c @@ -3,7 +3,7 @@ * DO NOT EDIT THIS FILE! * This file is auto-generated by xfc_map_parser * from the NPL output file(s) map.yml - * for device bcm56690_a0 and variant dna_6_5_29_0_1. + * for device bcm78800_a0 and variant dna_6_5_31_5_0. * Edits to this file will be lost when it is regenerated. * * $Id: $ @@ -30,322 +30,369 @@ #include #include #include -#include -#include -#include -#include +#include +#include +#include +#include #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -static void bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +static void bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) { uint32_t *reason = data + 0; if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); } if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); } if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); } if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); } if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); } if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); } if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); } if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); } if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); } if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); } if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); } if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); } if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); } if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); } if (reason[13] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); } if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); } if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP); } if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP); } if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); } if (reason[13] & (0x1 << 20)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); } if (reason[13] & (0x1 << 21)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP); } if (reason[13] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); } if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); } if (reason[13] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); } if (reason[13] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); } if (reason[13] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); } if (reason[13] & (0x1 << 27)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); } if (reason[13] & (0x1 << 28)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); } if (reason[13] & (0x1 << 29)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[13] & (0x1 << 30)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); } if (reason[13] & (0x1 << 31)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); } if (reason[12] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); } if (reason[12] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); } if (reason[12] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); } if (reason[12] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); } if (reason[12] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); } if (reason[12] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); } if (reason[12] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); } if (reason[12] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); } if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU); } if (reason[12] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); } if (reason[12] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); } if (reason[12] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SRV6); } if (reason[12] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); } if (reason[12] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); - } - if (reason[12] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); } if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); } } -static void bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +static void bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) { uint32_t *reason = data + 0; reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { reason[13] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { reason[13] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { reason[13] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { reason[13] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { reason[13] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { reason[13] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { reason[13] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { reason[13] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { reason[13] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { reason[13] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { reason[13] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { reason[13] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { reason[13] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { reason[13] |= (0x1 << 14); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { reason[13] |= (0x1 << 15); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { reason[13] |= (0x1 << 16); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { reason[13] |= (0x1 << 17); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { reason[13] |= (0x1 << 18); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { reason[13] |= (0x1 << 19); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { reason[13] |= (0x1 << 20); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { reason[13] |= (0x1 << 21); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { reason[13] |= (0x1 << 22); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { reason[13] |= (0x1 << 23); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { reason[13] |= (0x1 << 24); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { reason[13] |= (0x1 << 25); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { reason[13] |= (0x1 << 26); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { reason[13] |= (0x1 << 27); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { reason[13] |= (0x1 << 28); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[13] |= (0x1 << 29); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { reason[13] |= (0x1 << 30); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { reason[13] |= (0x1 << 31); } reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { reason[12] |= (0x1 << 0); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { reason[12] |= (0x1 << 1); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { reason[12] |= (0x1 << 2); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { reason[12] |= (0x1 << 3); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { reason[12] |= (0x1 << 4); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { reason[12] |= (0x1 << 5); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { reason[12] |= (0x1 << 6); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { reason[12] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU)) { reason[12] |= (0x1 << 8); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { reason[12] |= (0x1 << 9); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { reason[12] |= (0x1 << 10); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SRV6)) { reason[12] |= (0x1 << 11); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { reason[12] |= (0x1 << 12); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { reason[12] |= (0x1 << 13); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { - reason[12] |= (0x1 << 14); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { reason[12] |= (0x1 << 15); } } -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_data[] = { +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_field_data[] = { + { + .name = "ALLOW_NAT_3_0", + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ALLOW_NAT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 412, 415 }, /* Profile 6. */ + { 412, 415 }, /* Profile 7. */ + { 412, 415 }, /* Profile 8. */ + { 412, 415 }, /* Profile 9. */ + { 408, 411 }, /* Profile 10. */ + { 408, 411 }, /* Profile 11. */ + { 408, 411 }, /* Profile 12. */ + { 412, 415 }, /* Profile 13. */ + { 412, 415 }, /* Profile 14. */ + { 412, 415 }, /* Profile 15. */ + { 412, 415 }, /* Profile 16. */ + { 412, 415 }, /* Profile 17. */ + { 412, 415 }, /* Profile 18. */ + { 412, 415 }, /* Profile 19. */ + { 412, 415 }, /* Profile 20. */ + { 408, 411 }, /* Profile 21. */ + { 408, 411 }, /* Profile 22. */ + { 408, 411 }, /* Profile 23. */ + { 412, 415 }, /* Profile 24. */ + { 412, 415 }, /* Profile 25. */ + { 412, 415 }, /* Profile 26. */ + { 412, 415 }, /* Profile 27. */ + { 412, 415 }, /* Profile 28. */ + { 412, 415 }, /* Profile 29. */ + { 412, 415 }, /* Profile 30. */ + { 412, 415 }, /* Profile 31. */ + { 408, 411 }, /* Profile 32. */ + { 408, 411 }, /* Profile 33. */ + { 408, 411 }, /* Profile 34. */ + { 412, 415 }, /* Profile 35. */ + { 412, 415 }, /* Profile 36. */ + { 412, 415 }, /* Profile 37. */ + { 412, 415 }, /* Profile 38. */ + { 412, 415 }, /* Profile 39. */ + { 412, 415 }, /* Profile 40. */ + { 412, 415 }, /* Profile 41. */ + { 412, 415 }, /* Profile 42. */ + { 408, 411 }, /* Profile 43. */ + { 408, 411 }, /* Profile 44. */ + { 408, 411 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, { .name = "DLB_ECMP_DESTINATION_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -360,17 +407,17 @@ static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_ { -1, -1 }, /* Profile 10. */ { -1, -1 }, /* Profile 11. */ { -1, -1 }, /* Profile 12. */ - { 288, 303 }, /* Profile 13. */ - { 320, 335 }, /* Profile 14. */ - { 320, 335 }, /* Profile 15. */ - { 320, 335 }, /* Profile 16. */ - { 288, 303 }, /* Profile 17. */ - { 320, 335 }, /* Profile 18. */ - { 320, 335 }, /* Profile 19. */ - { 320, 335 }, /* Profile 20. */ - { 288, 303 }, /* Profile 21. */ - { 320, 335 }, /* Profile 22. */ - { 320, 335 }, /* Profile 23. */ + { 256, 271 }, /* Profile 13. */ + { 256, 271 }, /* Profile 14. */ + { 256, 271 }, /* Profile 15. */ + { 256, 271 }, /* Profile 16. */ + { 256, 271 }, /* Profile 17. */ + { 256, 271 }, /* Profile 18. */ + { 256, 271 }, /* Profile 19. */ + { 256, 271 }, /* Profile 20. */ + { 256, 271 }, /* Profile 21. */ + { 256, 271 }, /* Profile 22. */ + { 256, 271 }, /* Profile 23. */ { -1, -1 }, /* Profile 24. */ { -1, -1 }, /* Profile 25. */ { -1, -1 }, /* Profile 26. */ @@ -382,65 +429,65 @@ static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_ { -1, -1 }, /* Profile 32. */ { -1, -1 }, /* Profile 33. */ { -1, -1 }, /* Profile 34. */ - { 288, 303 }, /* Profile 35. */ - { 320, 335 }, /* Profile 36. */ - { 320, 335 }, /* Profile 37. */ - { 320, 335 }, /* Profile 38. */ - { 288, 303 }, /* Profile 39. */ - { 320, 335 }, /* Profile 40. */ - { 320, 335 }, /* Profile 41. */ - { 320, 335 }, /* Profile 42. */ - { 288, 303 }, /* Profile 43. */ - { 320, 335 }, /* Profile 44. */ - { 320, 335 }, /* Profile 45. */ + { 272, 287 }, /* Profile 35. */ + { 272, 287 }, /* Profile 36. */ + { 272, 287 }, /* Profile 37. */ + { 272, 287 }, /* Profile 38. */ + { 272, 287 }, /* Profile 39. */ + { 272, 287 }, /* Profile 40. */ + { 272, 287 }, /* Profile 41. */ + { 272, 287 }, /* Profile 42. */ + { 272, 287 }, /* Profile 43. */ + { 272, 287 }, /* Profile 44. */ + { 272, 287 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "DNAT_CTRL_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ - { 368, 371 }, /* Profile 3. */ + { 372, 375 }, /* Profile 3. */ { -1, -1 }, /* Profile 4. */ { -1, -1 }, /* Profile 5. */ { -1, -1 }, /* Profile 6. */ - { 368, 371 }, /* Profile 7. */ + { 372, 375 }, /* Profile 7. */ { -1, -1 }, /* Profile 8. */ { -1, -1 }, /* Profile 9. */ { -1, -1 }, /* Profile 10. */ { 368, 371 }, /* Profile 11. */ { -1, -1 }, /* Profile 12. */ { -1, -1 }, /* Profile 13. */ - { 368, 371 }, /* Profile 14. */ + { 372, 375 }, /* Profile 14. */ { -1, -1 }, /* Profile 15. */ { -1, -1 }, /* Profile 16. */ { -1, -1 }, /* Profile 17. */ - { 368, 371 }, /* Profile 18. */ + { 372, 375 }, /* Profile 18. */ { -1, -1 }, /* Profile 19. */ { -1, -1 }, /* Profile 20. */ { -1, -1 }, /* Profile 21. */ { 368, 371 }, /* Profile 22. */ { -1, -1 }, /* Profile 23. */ { -1, -1 }, /* Profile 24. */ - { 368, 371 }, /* Profile 25. */ + { 372, 375 }, /* Profile 25. */ { -1, -1 }, /* Profile 26. */ { -1, -1 }, /* Profile 27. */ { -1, -1 }, /* Profile 28. */ - { 368, 371 }, /* Profile 29. */ + { 372, 375 }, /* Profile 29. */ { -1, -1 }, /* Profile 30. */ { -1, -1 }, /* Profile 31. */ { -1, -1 }, /* Profile 32. */ { 368, 371 }, /* Profile 33. */ { -1, -1 }, /* Profile 34. */ { -1, -1 }, /* Profile 35. */ - { 368, 371 }, /* Profile 36. */ + { 372, 375 }, /* Profile 36. */ { -1, -1 }, /* Profile 37. */ { -1, -1 }, /* Profile 38. */ { -1, -1 }, /* Profile 39. */ - { 368, 371 }, /* Profile 40. */ + { 372, 375 }, /* Profile 40. */ { -1, -1 }, /* Profile 41. */ { -1, -1 }, /* Profile 42. */ { -1, -1 }, /* Profile 43. */ @@ -450,7 +497,7 @@ static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_ }, { .name = "DROP_CODE_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -503,127 +550,127 @@ static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_ }, { .name = "DVP_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DVP_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 176, 191 }, /* Profile 2. */ - { 176, 191 }, /* Profile 3. */ - { 208, 223 }, /* Profile 4. */ - { 208, 223 }, /* Profile 5. */ - { 176, 191 }, /* Profile 6. */ - { 176, 191 }, /* Profile 7. */ - { 208, 223 }, /* Profile 8. */ - { 208, 223 }, /* Profile 9. */ - { 176, 191 }, /* Profile 10. */ - { 176, 191 }, /* Profile 11. */ - { 208, 223 }, /* Profile 12. */ - { 176, 191 }, /* Profile 13. */ - { 176, 191 }, /* Profile 14. */ - { 208, 223 }, /* Profile 15. */ - { 208, 223 }, /* Profile 16. */ - { 176, 191 }, /* Profile 17. */ - { 176, 191 }, /* Profile 18. */ - { 208, 223 }, /* Profile 19. */ - { 208, 223 }, /* Profile 20. */ - { 176, 191 }, /* Profile 21. */ - { 176, 191 }, /* Profile 22. */ - { 208, 223 }, /* Profile 23. */ - { 192, 207 }, /* Profile 24. */ - { 192, 207 }, /* Profile 25. */ - { 224, 239 }, /* Profile 26. */ - { 224, 239 }, /* Profile 27. */ - { 192, 207 }, /* Profile 28. */ - { 192, 207 }, /* Profile 29. */ - { 224, 239 }, /* Profile 30. */ - { 224, 239 }, /* Profile 31. */ - { 192, 207 }, /* Profile 32. */ - { 192, 207 }, /* Profile 33. */ - { 224, 239 }, /* Profile 34. */ - { 192, 207 }, /* Profile 35. */ - { 192, 207 }, /* Profile 36. */ - { 224, 239 }, /* Profile 37. */ - { 224, 239 }, /* Profile 38. */ - { 192, 207 }, /* Profile 39. */ - { 192, 207 }, /* Profile 40. */ - { 224, 239 }, /* Profile 41. */ - { 224, 239 }, /* Profile 42. */ - { 192, 207 }, /* Profile 43. */ - { 192, 207 }, /* Profile 44. */ - { 224, 239 }, /* Profile 45. */ + { 160, 175 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + { 160, 175 }, /* Profile 6. */ + { 160, 175 }, /* Profile 7. */ + { 160, 175 }, /* Profile 8. */ + { 160, 175 }, /* Profile 9. */ + { 160, 175 }, /* Profile 10. */ + { 160, 175 }, /* Profile 11. */ + { 160, 175 }, /* Profile 12. */ + { 160, 175 }, /* Profile 13. */ + { 160, 175 }, /* Profile 14. */ + { 160, 175 }, /* Profile 15. */ + { 160, 175 }, /* Profile 16. */ + { 160, 175 }, /* Profile 17. */ + { 160, 175 }, /* Profile 18. */ + { 160, 175 }, /* Profile 19. */ + { 160, 175 }, /* Profile 20. */ + { 160, 175 }, /* Profile 21. */ + { 160, 175 }, /* Profile 22. */ + { 160, 175 }, /* Profile 23. */ + { 176, 191 }, /* Profile 24. */ + { 176, 191 }, /* Profile 25. */ + { 176, 191 }, /* Profile 26. */ + { 176, 191 }, /* Profile 27. */ + { 176, 191 }, /* Profile 28. */ + { 176, 191 }, /* Profile 29. */ + { 176, 191 }, /* Profile 30. */ + { 176, 191 }, /* Profile 31. */ + { 176, 191 }, /* Profile 32. */ + { 176, 191 }, /* Profile 33. */ + { 176, 191 }, /* Profile 34. */ + { 176, 191 }, /* Profile 35. */ + { 176, 191 }, /* Profile 36. */ + { 176, 191 }, /* Profile 37. */ + { 176, 191 }, /* Profile 38. */ + { 176, 191 }, /* Profile 39. */ + { 176, 191 }, /* Profile 40. */ + { 176, 191 }, /* Profile 41. */ + { 176, 191 }, /* Profile 42. */ + { 176, 191 }, /* Profile 43. */ + { 176, 191 }, /* Profile 44. */ + { 176, 191 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "EFFECTIVE_TTL_AND_SNAT_CTRL_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 144, 159 }, /* Profile 2. */ - { 144, 159 }, /* Profile 3. */ - { 176, 191 }, /* Profile 4. */ - { 176, 191 }, /* Profile 5. */ - { 144, 159 }, /* Profile 6. */ - { 144, 159 }, /* Profile 7. */ - { 176, 191 }, /* Profile 8. */ - { 176, 191 }, /* Profile 9. */ - { 144, 159 }, /* Profile 10. */ - { 144, 159 }, /* Profile 11. */ - { 176, 191 }, /* Profile 12. */ - { 144, 159 }, /* Profile 13. */ - { 144, 159 }, /* Profile 14. */ - { 176, 191 }, /* Profile 15. */ - { 176, 191 }, /* Profile 16. */ - { 144, 159 }, /* Profile 17. */ - { 144, 159 }, /* Profile 18. */ - { 176, 191 }, /* Profile 19. */ - { 176, 191 }, /* Profile 20. */ - { 144, 159 }, /* Profile 21. */ - { 144, 159 }, /* Profile 22. */ - { 176, 191 }, /* Profile 23. */ - { 160, 175 }, /* Profile 24. */ - { 160, 175 }, /* Profile 25. */ - { 192, 207 }, /* Profile 26. */ - { 192, 207 }, /* Profile 27. */ - { 160, 175 }, /* Profile 28. */ - { 160, 175 }, /* Profile 29. */ - { 192, 207 }, /* Profile 30. */ - { 192, 207 }, /* Profile 31. */ - { 160, 175 }, /* Profile 32. */ - { 160, 175 }, /* Profile 33. */ - { 192, 207 }, /* Profile 34. */ - { 160, 175 }, /* Profile 35. */ - { 160, 175 }, /* Profile 36. */ - { 192, 207 }, /* Profile 37. */ - { 192, 207 }, /* Profile 38. */ - { 160, 175 }, /* Profile 39. */ - { 160, 175 }, /* Profile 40. */ - { 192, 207 }, /* Profile 41. */ - { 192, 207 }, /* Profile 42. */ - { 160, 175 }, /* Profile 43. */ - { 160, 175 }, /* Profile 44. */ - { 192, 207 }, /* Profile 45. */ + { 80, 95 }, /* Profile 2. */ + { 80, 95 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + { 80, 95 }, /* Profile 5. */ + { 80, 95 }, /* Profile 6. */ + { 80, 95 }, /* Profile 7. */ + { 80, 95 }, /* Profile 8. */ + { 80, 95 }, /* Profile 9. */ + { 80, 95 }, /* Profile 10. */ + { 80, 95 }, /* Profile 11. */ + { 80, 95 }, /* Profile 12. */ + { 80, 95 }, /* Profile 13. */ + { 80, 95 }, /* Profile 14. */ + { 80, 95 }, /* Profile 15. */ + { 80, 95 }, /* Profile 16. */ + { 80, 95 }, /* Profile 17. */ + { 80, 95 }, /* Profile 18. */ + { 80, 95 }, /* Profile 19. */ + { 80, 95 }, /* Profile 20. */ + { 80, 95 }, /* Profile 21. */ + { 80, 95 }, /* Profile 22. */ + { 80, 95 }, /* Profile 23. */ + { 80, 95 }, /* Profile 24. */ + { 80, 95 }, /* Profile 25. */ + { 80, 95 }, /* Profile 26. */ + { 80, 95 }, /* Profile 27. */ + { 80, 95 }, /* Profile 28. */ + { 80, 95 }, /* Profile 29. */ + { 80, 95 }, /* Profile 30. */ + { 80, 95 }, /* Profile 31. */ + { 80, 95 }, /* Profile 32. */ + { 80, 95 }, /* Profile 33. */ + { 80, 95 }, /* Profile 34. */ + { 80, 95 }, /* Profile 35. */ + { 80, 95 }, /* Profile 36. */ + { 80, 95 }, /* Profile 37. */ + { 80, 95 }, /* Profile 38. */ + { 80, 95 }, /* Profile 39. */ + { 80, 95 }, /* Profile 40. */ + { 80, 95 }, /* Profile 41. */ + { 80, 95 }, /* Profile 42. */ + { 80, 95 }, /* Profile 43. */ + { 80, 95 }, /* Profile 44. */ + { 80, 95 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 288, 303 }, /* Profile 2. */ - { 320, 335 }, /* Profile 3. */ - { 320, 335 }, /* Profile 4. */ - { 320, 335 }, /* Profile 5. */ - { 288, 303 }, /* Profile 6. */ - { 320, 335 }, /* Profile 7. */ - { 320, 335 }, /* Profile 8. */ - { 320, 335 }, /* Profile 9. */ - { 288, 303 }, /* Profile 10. */ - { 320, 335 }, /* Profile 11. */ - { 320, 335 }, /* Profile 12. */ + { 256, 271 }, /* Profile 2. */ + { 256, 271 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + { 256, 271 }, /* Profile 6. */ + { 256, 271 }, /* Profile 7. */ + { 256, 271 }, /* Profile 8. */ + { 256, 271 }, /* Profile 9. */ + { 256, 271 }, /* Profile 10. */ + { 256, 271 }, /* Profile 11. */ + { 256, 271 }, /* Profile 12. */ { -1, -1 }, /* Profile 13. */ { -1, -1 }, /* Profile 14. */ { -1, -1 }, /* Profile 15. */ @@ -635,129 +682,129 @@ static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_ { -1, -1 }, /* Profile 21. */ { -1, -1 }, /* Profile 22. */ { -1, -1 }, /* Profile 23. */ - { 288, 303 }, /* Profile 24. */ - { 320, 335 }, /* Profile 25. */ - { 320, 335 }, /* Profile 26. */ - { 320, 335 }, /* Profile 27. */ - { 288, 303 }, /* Profile 28. */ - { 320, 335 }, /* Profile 29. */ - { 320, 335 }, /* Profile 30. */ - { 320, 335 }, /* Profile 31. */ - { 288, 303 }, /* Profile 32. */ - { 320, 335 }, /* Profile 33. */ - { 320, 335 }, /* Profile 34. */ + { 272, 287 }, /* Profile 24. */ + { 272, 287 }, /* Profile 25. */ + { 272, 287 }, /* Profile 26. */ + { 272, 287 }, /* Profile 27. */ + { 272, 287 }, /* Profile 28. */ + { 272, 287 }, /* Profile 29. */ + { 272, 287 }, /* Profile 30. */ + { 272, 287 }, /* Profile 31. */ + { 272, 287 }, /* Profile 32. */ + { 272, 287 }, /* Profile 33. */ + { 272, 287 }, /* Profile 34. */ }, .profile_cnt = 35, }, { .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 372, 375 }, /* Profile 2. */ + { 380, 383 }, /* Profile 2. */ { 384, 387 }, /* Profile 3. */ { 380, 383 }, /* Profile 4. */ { 380, 383 }, /* Profile 5. */ - { 372, 375 }, /* Profile 6. */ + { 380, 383 }, /* Profile 6. */ { 384, 387 }, /* Profile 7. */ { 380, 383 }, /* Profile 8. */ { 380, 383 }, /* Profile 9. */ - { 372, 375 }, /* Profile 10. */ - { 384, 387 }, /* Profile 11. */ - { 380, 383 }, /* Profile 12. */ - { 372, 375 }, /* Profile 13. */ - { 384, 387 }, /* Profile 14. */ - { 380, 383 }, /* Profile 15. */ - { 380, 383 }, /* Profile 16. */ - { 372, 375 }, /* Profile 17. */ + { 376, 379 }, /* Profile 10. */ + { 380, 383 }, /* Profile 11. */ + { 376, 379 }, /* Profile 12. */ + { 380, 383 }, /* Profile 13. */ + { 384, 387 }, /* Profile 14. */ + { 380, 383 }, /* Profile 15. */ + { 380, 383 }, /* Profile 16. */ + { 380, 383 }, /* Profile 17. */ { 384, 387 }, /* Profile 18. */ { 380, 383 }, /* Profile 19. */ { 380, 383 }, /* Profile 20. */ - { 372, 375 }, /* Profile 21. */ - { 384, 387 }, /* Profile 22. */ - { 380, 383 }, /* Profile 23. */ - { 372, 375 }, /* Profile 24. */ + { 376, 379 }, /* Profile 21. */ + { 380, 383 }, /* Profile 22. */ + { 376, 379 }, /* Profile 23. */ + { 380, 383 }, /* Profile 24. */ { 384, 387 }, /* Profile 25. */ { 380, 383 }, /* Profile 26. */ { 380, 383 }, /* Profile 27. */ - { 372, 375 }, /* Profile 28. */ + { 380, 383 }, /* Profile 28. */ { 384, 387 }, /* Profile 29. */ { 380, 383 }, /* Profile 30. */ { 380, 383 }, /* Profile 31. */ - { 372, 375 }, /* Profile 32. */ - { 384, 387 }, /* Profile 33. */ - { 380, 383 }, /* Profile 34. */ - { 372, 375 }, /* Profile 35. */ + { 376, 379 }, /* Profile 32. */ + { 380, 383 }, /* Profile 33. */ + { 376, 379 }, /* Profile 34. */ + { 380, 383 }, /* Profile 35. */ { 384, 387 }, /* Profile 36. */ { 380, 383 }, /* Profile 37. */ { 380, 383 }, /* Profile 38. */ - { 372, 375 }, /* Profile 39. */ + { 380, 383 }, /* Profile 39. */ { 384, 387 }, /* Profile 40. */ { 380, 383 }, /* Profile 41. */ { 380, 383 }, /* Profile 42. */ - { 372, 375 }, /* Profile 43. */ - { 384, 387 }, /* Profile 44. */ - { 380, 383 }, /* Profile 45. */ + { 376, 379 }, /* Profile 43. */ + { 380, 383 }, /* Profile 44. */ + { 376, 379 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 80, 95 }, /* Profile 2. */ - { 80, 95 }, /* Profile 3. */ - { 80, 95 }, /* Profile 4. */ - { 80, 95 }, /* Profile 5. */ - { 80, 95 }, /* Profile 6. */ - { 80, 95 }, /* Profile 7. */ - { 80, 95 }, /* Profile 8. */ - { 80, 95 }, /* Profile 9. */ - { 80, 95 }, /* Profile 10. */ - { 80, 95 }, /* Profile 11. */ - { 80, 95 }, /* Profile 12. */ - { 80, 95 }, /* Profile 13. */ - { 80, 95 }, /* Profile 14. */ - { 80, 95 }, /* Profile 15. */ - { 80, 95 }, /* Profile 16. */ - { 80, 95 }, /* Profile 17. */ - { 80, 95 }, /* Profile 18. */ - { 80, 95 }, /* Profile 19. */ - { 80, 95 }, /* Profile 20. */ - { 80, 95 }, /* Profile 21. */ - { 80, 95 }, /* Profile 22. */ - { 80, 95 }, /* Profile 23. */ - { 80, 95 }, /* Profile 24. */ - { 80, 95 }, /* Profile 25. */ - { 80, 95 }, /* Profile 26. */ - { 80, 95 }, /* Profile 27. */ - { 80, 95 }, /* Profile 28. */ - { 80, 95 }, /* Profile 29. */ - { 80, 95 }, /* Profile 30. */ - { 80, 95 }, /* Profile 31. */ - { 80, 95 }, /* Profile 32. */ - { 80, 95 }, /* Profile 33. */ - { 80, 95 }, /* Profile 34. */ - { 80, 95 }, /* Profile 35. */ - { 80, 95 }, /* Profile 36. */ - { 80, 95 }, /* Profile 37. */ - { 80, 95 }, /* Profile 38. */ - { 80, 95 }, /* Profile 39. */ - { 80, 95 }, /* Profile 40. */ - { 80, 95 }, /* Profile 41. */ - { 80, 95 }, /* Profile 42. */ - { 80, 95 }, /* Profile 43. */ - { 80, 95 }, /* Profile 44. */ - { 80, 95 }, /* Profile 45. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ + { 96, 111 }, /* Profile 10. */ + { 96, 111 }, /* Profile 11. */ + { 96, 111 }, /* Profile 12. */ + { 96, 111 }, /* Profile 13. */ + { 96, 111 }, /* Profile 14. */ + { 96, 111 }, /* Profile 15. */ + { 96, 111 }, /* Profile 16. */ + { 96, 111 }, /* Profile 17. */ + { 96, 111 }, /* Profile 18. */ + { 96, 111 }, /* Profile 19. */ + { 96, 111 }, /* Profile 20. */ + { 96, 111 }, /* Profile 21. */ + { 96, 111 }, /* Profile 22. */ + { 96, 111 }, /* Profile 23. */ + { 96, 111 }, /* Profile 24. */ + { 96, 111 }, /* Profile 25. */ + { 96, 111 }, /* Profile 26. */ + { 96, 111 }, /* Profile 27. */ + { 96, 111 }, /* Profile 28. */ + { 96, 111 }, /* Profile 29. */ + { 96, 111 }, /* Profile 30. */ + { 96, 111 }, /* Profile 31. */ + { 96, 111 }, /* Profile 32. */ + { 96, 111 }, /* Profile 33. */ + { 96, 111 }, /* Profile 34. */ + { 96, 111 }, /* Profile 35. */ + { 96, 111 }, /* Profile 36. */ + { 96, 111 }, /* Profile 37. */ + { 96, 111 }, /* Profile 38. */ + { 96, 111 }, /* Profile 39. */ + { 96, 111 }, /* Profile 40. */ + { 96, 111 }, /* Profile 41. */ + { 96, 111 }, /* Profile 42. */ + { 96, 111 }, /* Profile 43. */ + { 96, 111 }, /* Profile 44. */ + { 96, 111 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -807,155 +854,155 @@ static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_ }, { .name = "EP_NIH_HDR_RECIRC_CODE_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 376, 379 }, /* Profile 2. */ - { 388, 391 }, /* Profile 3. */ - { 384, 387 }, /* Profile 4. */ - { 384, 387 }, /* Profile 5. */ - { 376, 379 }, /* Profile 6. */ - { 388, 391 }, /* Profile 7. */ - { 384, 387 }, /* Profile 8. */ - { 384, 387 }, /* Profile 9. */ + { 368, 371 }, /* Profile 2. */ + { 368, 371 }, /* Profile 3. */ + { 368, 371 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ + { 368, 371 }, /* Profile 6. */ + { 368, 371 }, /* Profile 7. */ + { 368, 371 }, /* Profile 8. */ + { 368, 371 }, /* Profile 9. */ { -1, -1 }, /* Profile 10. */ { -1, -1 }, /* Profile 11. */ { -1, -1 }, /* Profile 12. */ - { 376, 379 }, /* Profile 13. */ - { 388, 391 }, /* Profile 14. */ - { 384, 387 }, /* Profile 15. */ - { 384, 387 }, /* Profile 16. */ - { 376, 379 }, /* Profile 17. */ - { 388, 391 }, /* Profile 18. */ - { 384, 387 }, /* Profile 19. */ - { 384, 387 }, /* Profile 20. */ + { 368, 371 }, /* Profile 13. */ + { 368, 371 }, /* Profile 14. */ + { 368, 371 }, /* Profile 15. */ + { 368, 371 }, /* Profile 16. */ + { 368, 371 }, /* Profile 17. */ + { 368, 371 }, /* Profile 18. */ + { 368, 371 }, /* Profile 19. */ + { 368, 371 }, /* Profile 20. */ { -1, -1 }, /* Profile 21. */ { -1, -1 }, /* Profile 22. */ { -1, -1 }, /* Profile 23. */ - { 376, 379 }, /* Profile 24. */ - { 388, 391 }, /* Profile 25. */ - { 384, 387 }, /* Profile 26. */ - { 384, 387 }, /* Profile 27. */ - { 376, 379 }, /* Profile 28. */ - { 388, 391 }, /* Profile 29. */ - { 384, 387 }, /* Profile 30. */ - { 384, 387 }, /* Profile 31. */ + { 368, 371 }, /* Profile 24. */ + { 368, 371 }, /* Profile 25. */ + { 368, 371 }, /* Profile 26. */ + { 368, 371 }, /* Profile 27. */ + { 368, 371 }, /* Profile 28. */ + { 368, 371 }, /* Profile 29. */ + { 368, 371 }, /* Profile 30. */ + { 368, 371 }, /* Profile 31. */ { -1, -1 }, /* Profile 32. */ { -1, -1 }, /* Profile 33. */ { -1, -1 }, /* Profile 34. */ - { 376, 379 }, /* Profile 35. */ - { 388, 391 }, /* Profile 36. */ - { 384, 387 }, /* Profile 37. */ - { 384, 387 }, /* Profile 38. */ - { 376, 379 }, /* Profile 39. */ - { 388, 391 }, /* Profile 40. */ - { 384, 387 }, /* Profile 41. */ - { 384, 387 }, /* Profile 42. */ + { 368, 371 }, /* Profile 35. */ + { 368, 371 }, /* Profile 36. */ + { 368, 371 }, /* Profile 37. */ + { 368, 371 }, /* Profile 38. */ + { 368, 371 }, /* Profile 39. */ + { 368, 371 }, /* Profile 40. */ + { 368, 371 }, /* Profile 41. */ + { 368, 371 }, /* Profile 42. */ }, .profile_cnt = 43, }, { .name = "EP_NIH_HDR_TIMESTAMP_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ - { 144, 159 }, /* Profile 4. */ + { 208, 223 }, /* Profile 4. */ { -1, -1 }, /* Profile 5. */ { -1, -1 }, /* Profile 6. */ { -1, -1 }, /* Profile 7. */ - { 144, 159 }, /* Profile 8. */ + { 208, 223 }, /* Profile 8. */ { -1, -1 }, /* Profile 9. */ { -1, -1 }, /* Profile 10. */ { -1, -1 }, /* Profile 11. */ { -1, -1 }, /* Profile 12. */ { -1, -1 }, /* Profile 13. */ { -1, -1 }, /* Profile 14. */ - { 144, 159 }, /* Profile 15. */ + { 208, 223 }, /* Profile 15. */ { -1, -1 }, /* Profile 16. */ { -1, -1 }, /* Profile 17. */ { -1, -1 }, /* Profile 18. */ - { 144, 159 }, /* Profile 19. */ + { 208, 223 }, /* Profile 19. */ { -1, -1 }, /* Profile 20. */ { -1, -1 }, /* Profile 21. */ { -1, -1 }, /* Profile 22. */ { -1, -1 }, /* Profile 23. */ { -1, -1 }, /* Profile 24. */ { -1, -1 }, /* Profile 25. */ - { 160, 175 }, /* Profile 26. */ + { 224, 239 }, /* Profile 26. */ { -1, -1 }, /* Profile 27. */ { -1, -1 }, /* Profile 28. */ { -1, -1 }, /* Profile 29. */ - { 160, 175 }, /* Profile 30. */ + { 224, 239 }, /* Profile 30. */ { -1, -1 }, /* Profile 31. */ { -1, -1 }, /* Profile 32. */ { -1, -1 }, /* Profile 33. */ { -1, -1 }, /* Profile 34. */ { -1, -1 }, /* Profile 35. */ { -1, -1 }, /* Profile 36. */ - { 160, 175 }, /* Profile 37. */ + { 224, 239 }, /* Profile 37. */ { -1, -1 }, /* Profile 38. */ { -1, -1 }, /* Profile 39. */ { -1, -1 }, /* Profile 40. */ - { 160, 175 }, /* Profile 41. */ + { 224, 239 }, /* Profile 41. */ }, .profile_cnt = 42, }, { .name = "EP_NIH_HDR_TIMESTAMP_31_16", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ - { 160, 175 }, /* Profile 4. */ + { 224, 239 }, /* Profile 4. */ { -1, -1 }, /* Profile 5. */ { -1, -1 }, /* Profile 6. */ { -1, -1 }, /* Profile 7. */ - { 160, 175 }, /* Profile 8. */ + { 224, 239 }, /* Profile 8. */ { -1, -1 }, /* Profile 9. */ { -1, -1 }, /* Profile 10. */ { -1, -1 }, /* Profile 11. */ { -1, -1 }, /* Profile 12. */ { -1, -1 }, /* Profile 13. */ { -1, -1 }, /* Profile 14. */ - { 160, 175 }, /* Profile 15. */ + { 224, 239 }, /* Profile 15. */ { -1, -1 }, /* Profile 16. */ { -1, -1 }, /* Profile 17. */ { -1, -1 }, /* Profile 18. */ - { 160, 175 }, /* Profile 19. */ + { 224, 239 }, /* Profile 19. */ { -1, -1 }, /* Profile 20. */ { -1, -1 }, /* Profile 21. */ { -1, -1 }, /* Profile 22. */ { -1, -1 }, /* Profile 23. */ { -1, -1 }, /* Profile 24. */ { -1, -1 }, /* Profile 25. */ - { 176, 191 }, /* Profile 26. */ + { 240, 255 }, /* Profile 26. */ { -1, -1 }, /* Profile 27. */ { -1, -1 }, /* Profile 28. */ { -1, -1 }, /* Profile 29. */ - { 176, 191 }, /* Profile 30. */ + { 240, 255 }, /* Profile 30. */ { -1, -1 }, /* Profile 31. */ { -1, -1 }, /* Profile 32. */ { -1, -1 }, /* Profile 33. */ { -1, -1 }, /* Profile 34. */ { -1, -1 }, /* Profile 35. */ { -1, -1 }, /* Profile 36. */ - { 176, 191 }, /* Profile 37. */ + { 240, 255 }, /* Profile 37. */ { -1, -1 }, /* Profile 38. */ { -1, -1 }, /* Profile 39. */ { -1, -1 }, /* Profile 40. */ - { 176, 191 }, /* Profile 41. */ + { 240, 255 }, /* Profile 41. */ }, .profile_cnt = 42, }, { .name = "EVENT_TRACE_VECTOR_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1008,7 +1055,7 @@ static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_ }, { .name = "EVENT_TRACE_VECTOR_31_16", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1061,7 +1108,7 @@ static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_ }, { .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1114,515 +1161,515 @@ static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_ }, { .name = "I2E_CLASS_ID_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 192, 207 }, /* Profile 2. */ - { 192, 207 }, /* Profile 3. */ - { 224, 239 }, /* Profile 4. */ - { 224, 239 }, /* Profile 5. */ - { 192, 207 }, /* Profile 6. */ - { 192, 207 }, /* Profile 7. */ - { 224, 239 }, /* Profile 8. */ - { 224, 239 }, /* Profile 9. */ - { 192, 207 }, /* Profile 10. */ - { 192, 207 }, /* Profile 11. */ - { 224, 239 }, /* Profile 12. */ - { 192, 207 }, /* Profile 13. */ - { 192, 207 }, /* Profile 14. */ - { 224, 239 }, /* Profile 15. */ - { 224, 239 }, /* Profile 16. */ - { 192, 207 }, /* Profile 17. */ - { 192, 207 }, /* Profile 18. */ - { 224, 239 }, /* Profile 19. */ - { 224, 239 }, /* Profile 20. */ - { 192, 207 }, /* Profile 21. */ - { 192, 207 }, /* Profile 22. */ - { 224, 239 }, /* Profile 23. */ - { 208, 223 }, /* Profile 24. */ - { 208, 223 }, /* Profile 25. */ - { 240, 255 }, /* Profile 26. */ - { 240, 255 }, /* Profile 27. */ - { 208, 223 }, /* Profile 28. */ - { 208, 223 }, /* Profile 29. */ - { 240, 255 }, /* Profile 30. */ - { 240, 255 }, /* Profile 31. */ - { 208, 223 }, /* Profile 32. */ - { 208, 223 }, /* Profile 33. */ - { 240, 255 }, /* Profile 34. */ - { 208, 223 }, /* Profile 35. */ - { 208, 223 }, /* Profile 36. */ - { 240, 255 }, /* Profile 37. */ - { 240, 255 }, /* Profile 38. */ - { 208, 223 }, /* Profile 39. */ - { 208, 223 }, /* Profile 40. */ - { 240, 255 }, /* Profile 41. */ - { 240, 255 }, /* Profile 42. */ - { 208, 223 }, /* Profile 43. */ - { 208, 223 }, /* Profile 44. */ - { 240, 255 }, /* Profile 45. */ - }, + { 352, 367 }, /* Profile 2. */ + { 352, 367 }, /* Profile 3. */ + { 352, 367 }, /* Profile 4. */ + { 352, 367 }, /* Profile 5. */ + { 352, 367 }, /* Profile 6. */ + { 352, 367 }, /* Profile 7. */ + { 352, 367 }, /* Profile 8. */ + { 352, 367 }, /* Profile 9. */ + { 352, 367 }, /* Profile 10. */ + { 352, 367 }, /* Profile 11. */ + { 352, 367 }, /* Profile 12. */ + { 352, 367 }, /* Profile 13. */ + { 352, 367 }, /* Profile 14. */ + { 352, 367 }, /* Profile 15. */ + { 352, 367 }, /* Profile 16. */ + { 352, 367 }, /* Profile 17. */ + { 352, 367 }, /* Profile 18. */ + { 352, 367 }, /* Profile 19. */ + { 352, 367 }, /* Profile 20. */ + { 352, 367 }, /* Profile 21. */ + { 352, 367 }, /* Profile 22. */ + { 352, 367 }, /* Profile 23. */ + { 352, 367 }, /* Profile 24. */ + { 352, 367 }, /* Profile 25. */ + { 352, 367 }, /* Profile 26. */ + { 352, 367 }, /* Profile 27. */ + { 352, 367 }, /* Profile 28. */ + { 352, 367 }, /* Profile 29. */ + { 352, 367 }, /* Profile 30. */ + { 352, 367 }, /* Profile 31. */ + { 352, 367 }, /* Profile 32. */ + { 352, 367 }, /* Profile 33. */ + { 352, 367 }, /* Profile 34. */ + { 352, 367 }, /* Profile 35. */ + { 352, 367 }, /* Profile 36. */ + { 352, 367 }, /* Profile 37. */ + { 352, 367 }, /* Profile 38. */ + { 352, 367 }, /* Profile 39. */ + { 352, 367 }, /* Profile 40. */ + { 352, 367 }, /* Profile 41. */ + { 352, 367 }, /* Profile 42. */ + { 352, 367 }, /* Profile 43. */ + { 352, 367 }, /* Profile 44. */ + { 352, 367 }, /* Profile 45. */ + }, .profile_cnt = 46, }, { .name = "IFP_IOAM_GBP_ACTION_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 368, 371 }, /* Profile 2. */ - { 380, 383 }, /* Profile 3. */ - { 376, 379 }, /* Profile 4. */ - { 376, 379 }, /* Profile 5. */ - { 368, 371 }, /* Profile 6. */ - { 380, 383 }, /* Profile 7. */ - { 376, 379 }, /* Profile 8. */ - { 376, 379 }, /* Profile 9. */ - { 368, 371 }, /* Profile 10. */ - { 380, 383 }, /* Profile 11. */ - { 376, 379 }, /* Profile 12. */ - { 368, 371 }, /* Profile 13. */ - { 380, 383 }, /* Profile 14. */ - { 376, 379 }, /* Profile 15. */ - { 376, 379 }, /* Profile 16. */ - { 368, 371 }, /* Profile 17. */ - { 380, 383 }, /* Profile 18. */ - { 376, 379 }, /* Profile 19. */ - { 376, 379 }, /* Profile 20. */ - { 368, 371 }, /* Profile 21. */ - { 380, 383 }, /* Profile 22. */ - { 376, 379 }, /* Profile 23. */ - { 368, 371 }, /* Profile 24. */ - { 380, 383 }, /* Profile 25. */ - { 376, 379 }, /* Profile 26. */ - { 376, 379 }, /* Profile 27. */ - { 368, 371 }, /* Profile 28. */ - { 380, 383 }, /* Profile 29. */ - { 376, 379 }, /* Profile 30. */ - { 376, 379 }, /* Profile 31. */ - { 368, 371 }, /* Profile 32. */ - { 380, 383 }, /* Profile 33. */ - { 376, 379 }, /* Profile 34. */ - { 368, 371 }, /* Profile 35. */ - { 380, 383 }, /* Profile 36. */ - { 376, 379 }, /* Profile 37. */ - { 376, 379 }, /* Profile 38. */ - { 368, 371 }, /* Profile 39. */ - { 380, 383 }, /* Profile 40. */ - { 376, 379 }, /* Profile 41. */ - { 376, 379 }, /* Profile 42. */ - { 368, 371 }, /* Profile 43. */ - { 380, 383 }, /* Profile 44. */ - { 376, 379 }, /* Profile 45. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + { 400, 403 }, /* Profile 6. */ + { 400, 403 }, /* Profile 7. */ + { 396, 399 }, /* Profile 8. */ + { 396, 399 }, /* Profile 9. */ + { 396, 399 }, /* Profile 10. */ + { 396, 399 }, /* Profile 11. */ + { 392, 395 }, /* Profile 12. */ + { 400, 403 }, /* Profile 13. */ + { 400, 403 }, /* Profile 14. */ + { 396, 399 }, /* Profile 15. */ + { 396, 399 }, /* Profile 16. */ + { 400, 403 }, /* Profile 17. */ + { 400, 403 }, /* Profile 18. */ + { 396, 399 }, /* Profile 19. */ + { 396, 399 }, /* Profile 20. */ + { 396, 399 }, /* Profile 21. */ + { 396, 399 }, /* Profile 22. */ + { 392, 395 }, /* Profile 23. */ + { 400, 403 }, /* Profile 24. */ + { 400, 403 }, /* Profile 25. */ + { 396, 399 }, /* Profile 26. */ + { 396, 399 }, /* Profile 27. */ + { 400, 403 }, /* Profile 28. */ + { 400, 403 }, /* Profile 29. */ + { 396, 399 }, /* Profile 30. */ + { 396, 399 }, /* Profile 31. */ + { 396, 399 }, /* Profile 32. */ + { 396, 399 }, /* Profile 33. */ + { 392, 395 }, /* Profile 34. */ + { 400, 403 }, /* Profile 35. */ + { 400, 403 }, /* Profile 36. */ + { 396, 399 }, /* Profile 37. */ + { 396, 399 }, /* Profile 38. */ + { 400, 403 }, /* Profile 39. */ + { 400, 403 }, /* Profile 40. */ + { 396, 399 }, /* Profile 41. */ + { 396, 399 }, /* Profile 42. */ + { 396, 399 }, /* Profile 43. */ + { 396, 399 }, /* Profile 44. */ + { 392, 395 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 392, 395 }, /* Profile 2. */ - { 404, 407 }, /* Profile 3. */ - { 400, 403 }, /* Profile 4. */ - { 400, 403 }, /* Profile 5. */ - { 392, 395 }, /* Profile 6. */ - { 404, 407 }, /* Profile 7. */ - { 400, 403 }, /* Profile 8. */ - { 400, 403 }, /* Profile 9. */ - { 388, 391 }, /* Profile 10. */ - { 400, 403 }, /* Profile 11. */ - { 396, 399 }, /* Profile 12. */ - { 392, 395 }, /* Profile 13. */ - { 404, 407 }, /* Profile 14. */ - { 400, 403 }, /* Profile 15. */ - { 400, 403 }, /* Profile 16. */ - { 392, 395 }, /* Profile 17. */ - { 404, 407 }, /* Profile 18. */ - { 400, 403 }, /* Profile 19. */ - { 400, 403 }, /* Profile 20. */ - { 388, 391 }, /* Profile 21. */ - { 400, 403 }, /* Profile 22. */ - { 396, 399 }, /* Profile 23. */ - { 392, 395 }, /* Profile 24. */ - { 404, 407 }, /* Profile 25. */ - { 400, 403 }, /* Profile 26. */ - { 400, 403 }, /* Profile 27. */ - { 392, 395 }, /* Profile 28. */ - { 404, 407 }, /* Profile 29. */ - { 400, 403 }, /* Profile 30. */ - { 400, 403 }, /* Profile 31. */ - { 388, 391 }, /* Profile 32. */ - { 400, 403 }, /* Profile 33. */ - { 396, 399 }, /* Profile 34. */ - { 392, 395 }, /* Profile 35. */ - { 404, 407 }, /* Profile 36. */ - { 400, 403 }, /* Profile 37. */ - { 400, 403 }, /* Profile 38. */ - { 392, 395 }, /* Profile 39. */ - { 404, 407 }, /* Profile 40. */ - { 400, 403 }, /* Profile 41. */ - { 400, 403 }, /* Profile 42. */ - { 388, 391 }, /* Profile 43. */ - { 400, 403 }, /* Profile 44. */ - { 396, 399 }, /* Profile 45. */ + { 420, 423 }, /* Profile 2. */ + { 420, 423 }, /* Profile 3. */ + { 420, 423 }, /* Profile 4. */ + { 420, 423 }, /* Profile 5. */ + { 420, 423 }, /* Profile 6. */ + { 420, 423 }, /* Profile 7. */ + { 420, 423 }, /* Profile 8. */ + { 420, 423 }, /* Profile 9. */ + { 416, 419 }, /* Profile 10. */ + { 416, 419 }, /* Profile 11. */ + { 416, 419 }, /* Profile 12. */ + { 420, 423 }, /* Profile 13. */ + { 420, 423 }, /* Profile 14. */ + { 420, 423 }, /* Profile 15. */ + { 420, 423 }, /* Profile 16. */ + { 420, 423 }, /* Profile 17. */ + { 420, 423 }, /* Profile 18. */ + { 420, 423 }, /* Profile 19. */ + { 420, 423 }, /* Profile 20. */ + { 416, 419 }, /* Profile 21. */ + { 416, 419 }, /* Profile 22. */ + { 416, 419 }, /* Profile 23. */ + { 420, 423 }, /* Profile 24. */ + { 420, 423 }, /* Profile 25. */ + { 420, 423 }, /* Profile 26. */ + { 420, 423 }, /* Profile 27. */ + { 420, 423 }, /* Profile 28. */ + { 420, 423 }, /* Profile 29. */ + { 420, 423 }, /* Profile 30. */ + { 420, 423 }, /* Profile 31. */ + { 416, 419 }, /* Profile 32. */ + { 416, 419 }, /* Profile 33. */ + { 416, 419 }, /* Profile 34. */ + { 420, 423 }, /* Profile 35. */ + { 420, 423 }, /* Profile 36. */ + { 420, 423 }, /* Profile 37. */ + { 420, 423 }, /* Profile 38. */ + { 420, 423 }, /* Profile 39. */ + { 420, 423 }, /* Profile 40. */ + { 420, 423 }, /* Profile 41. */ + { 420, 423 }, /* Profile 42. */ + { 416, 419 }, /* Profile 43. */ + { 416, 419 }, /* Profile 44. */ + { 416, 419 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "ING_TIMESTAMP_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ { -1, -1 }, /* Profile 4. */ - { 144, 159 }, /* Profile 5. */ + { 208, 223 }, /* Profile 5. */ { -1, -1 }, /* Profile 6. */ { -1, -1 }, /* Profile 7. */ { -1, -1 }, /* Profile 8. */ - { 144, 159 }, /* Profile 9. */ + { 208, 223 }, /* Profile 9. */ { -1, -1 }, /* Profile 10. */ { -1, -1 }, /* Profile 11. */ - { 144, 159 }, /* Profile 12. */ + { 208, 223 }, /* Profile 12. */ { -1, -1 }, /* Profile 13. */ { -1, -1 }, /* Profile 14. */ { -1, -1 }, /* Profile 15. */ - { 144, 159 }, /* Profile 16. */ + { 208, 223 }, /* Profile 16. */ { -1, -1 }, /* Profile 17. */ { -1, -1 }, /* Profile 18. */ { -1, -1 }, /* Profile 19. */ - { 144, 159 }, /* Profile 20. */ + { 208, 223 }, /* Profile 20. */ { -1, -1 }, /* Profile 21. */ { -1, -1 }, /* Profile 22. */ - { 144, 159 }, /* Profile 23. */ + { 208, 223 }, /* Profile 23. */ { -1, -1 }, /* Profile 24. */ { -1, -1 }, /* Profile 25. */ { -1, -1 }, /* Profile 26. */ - { 160, 175 }, /* Profile 27. */ + { 224, 239 }, /* Profile 27. */ { -1, -1 }, /* Profile 28. */ { -1, -1 }, /* Profile 29. */ { -1, -1 }, /* Profile 30. */ - { 160, 175 }, /* Profile 31. */ + { 224, 239 }, /* Profile 31. */ { -1, -1 }, /* Profile 32. */ { -1, -1 }, /* Profile 33. */ - { 160, 175 }, /* Profile 34. */ + { 224, 239 }, /* Profile 34. */ { -1, -1 }, /* Profile 35. */ { -1, -1 }, /* Profile 36. */ { -1, -1 }, /* Profile 37. */ - { 160, 175 }, /* Profile 38. */ + { 224, 239 }, /* Profile 38. */ { -1, -1 }, /* Profile 39. */ { -1, -1 }, /* Profile 40. */ { -1, -1 }, /* Profile 41. */ - { 160, 175 }, /* Profile 42. */ + { 224, 239 }, /* Profile 42. */ { -1, -1 }, /* Profile 43. */ { -1, -1 }, /* Profile 44. */ - { 160, 175 }, /* Profile 45. */ + { 224, 239 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "ING_TIMESTAMP_31_16", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ { -1, -1 }, /* Profile 4. */ - { 160, 175 }, /* Profile 5. */ + { 224, 239 }, /* Profile 5. */ { -1, -1 }, /* Profile 6. */ { -1, -1 }, /* Profile 7. */ { -1, -1 }, /* Profile 8. */ - { 160, 175 }, /* Profile 9. */ + { 224, 239 }, /* Profile 9. */ { -1, -1 }, /* Profile 10. */ { -1, -1 }, /* Profile 11. */ - { 160, 175 }, /* Profile 12. */ + { 224, 239 }, /* Profile 12. */ { -1, -1 }, /* Profile 13. */ { -1, -1 }, /* Profile 14. */ { -1, -1 }, /* Profile 15. */ - { 160, 175 }, /* Profile 16. */ + { 224, 239 }, /* Profile 16. */ { -1, -1 }, /* Profile 17. */ { -1, -1 }, /* Profile 18. */ { -1, -1 }, /* Profile 19. */ - { 160, 175 }, /* Profile 20. */ + { 224, 239 }, /* Profile 20. */ { -1, -1 }, /* Profile 21. */ { -1, -1 }, /* Profile 22. */ - { 160, 175 }, /* Profile 23. */ + { 224, 239 }, /* Profile 23. */ { -1, -1 }, /* Profile 24. */ { -1, -1 }, /* Profile 25. */ { -1, -1 }, /* Profile 26. */ - { 176, 191 }, /* Profile 27. */ + { 240, 255 }, /* Profile 27. */ { -1, -1 }, /* Profile 28. */ { -1, -1 }, /* Profile 29. */ { -1, -1 }, /* Profile 30. */ - { 176, 191 }, /* Profile 31. */ + { 240, 255 }, /* Profile 31. */ { -1, -1 }, /* Profile 32. */ { -1, -1 }, /* Profile 33. */ - { 176, 191 }, /* Profile 34. */ + { 240, 255 }, /* Profile 34. */ { -1, -1 }, /* Profile 35. */ { -1, -1 }, /* Profile 36. */ { -1, -1 }, /* Profile 37. */ - { 176, 191 }, /* Profile 38. */ + { 240, 255 }, /* Profile 38. */ { -1, -1 }, /* Profile 39. */ { -1, -1 }, /* Profile 40. */ { -1, -1 }, /* Profile 41. */ - { 176, 191 }, /* Profile 42. */ + { 240, 255 }, /* Profile 42. */ { -1, -1 }, /* Profile 43. */ { -1, -1 }, /* Profile 44. */ - { 176, 191 }, /* Profile 45. */ + { 240, 255 }, /* Profile 45. */ }, .profile_cnt = 46, }, { - .name = "INGRESS_DEVICE_PORT_6_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_6_0, + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 272, 278 }, /* Profile 2. */ - { 304, 310 }, /* Profile 3. */ - { 304, 310 }, /* Profile 4. */ - { 304, 310 }, /* Profile 5. */ - { 272, 278 }, /* Profile 6. */ - { 304, 310 }, /* Profile 7. */ - { 304, 310 }, /* Profile 8. */ - { 304, 310 }, /* Profile 9. */ - { 272, 278 }, /* Profile 10. */ - { 304, 310 }, /* Profile 11. */ - { 304, 310 }, /* Profile 12. */ - { 272, 278 }, /* Profile 13. */ - { 304, 310 }, /* Profile 14. */ - { 304, 310 }, /* Profile 15. */ - { 304, 310 }, /* Profile 16. */ - { 272, 278 }, /* Profile 17. */ - { 304, 310 }, /* Profile 18. */ - { 304, 310 }, /* Profile 19. */ - { 304, 310 }, /* Profile 20. */ - { 272, 278 }, /* Profile 21. */ - { 304, 310 }, /* Profile 22. */ - { 304, 310 }, /* Profile 23. */ - { 272, 278 }, /* Profile 24. */ - { 304, 310 }, /* Profile 25. */ - { 304, 310 }, /* Profile 26. */ - { 304, 310 }, /* Profile 27. */ - { 272, 278 }, /* Profile 28. */ - { 304, 310 }, /* Profile 29. */ - { 304, 310 }, /* Profile 30. */ - { 304, 310 }, /* Profile 31. */ - { 272, 278 }, /* Profile 32. */ - { 304, 310 }, /* Profile 33. */ - { 304, 310 }, /* Profile 34. */ - { 272, 278 }, /* Profile 35. */ - { 304, 310 }, /* Profile 36. */ - { 304, 310 }, /* Profile 37. */ - { 304, 310 }, /* Profile 38. */ - { 272, 278 }, /* Profile 39. */ - { 304, 310 }, /* Profile 40. */ - { 304, 310 }, /* Profile 41. */ - { 304, 310 }, /* Profile 42. */ - { 272, 278 }, /* Profile 43. */ - { 304, 310 }, /* Profile 44. */ - { 304, 310 }, /* Profile 45. */ + { 272, 279 }, /* Profile 2. */ + { 272, 279 }, /* Profile 3. */ + { 272, 279 }, /* Profile 4. */ + { 272, 279 }, /* Profile 5. */ + { 272, 279 }, /* Profile 6. */ + { 272, 279 }, /* Profile 7. */ + { 272, 279 }, /* Profile 8. */ + { 272, 279 }, /* Profile 9. */ + { 272, 279 }, /* Profile 10. */ + { 272, 279 }, /* Profile 11. */ + { 272, 279 }, /* Profile 12. */ + { 272, 279 }, /* Profile 13. */ + { 272, 279 }, /* Profile 14. */ + { 272, 279 }, /* Profile 15. */ + { 272, 279 }, /* Profile 16. */ + { 272, 279 }, /* Profile 17. */ + { 272, 279 }, /* Profile 18. */ + { 272, 279 }, /* Profile 19. */ + { 272, 279 }, /* Profile 20. */ + { 272, 279 }, /* Profile 21. */ + { 272, 279 }, /* Profile 22. */ + { 272, 279 }, /* Profile 23. */ + { 288, 295 }, /* Profile 24. */ + { 288, 295 }, /* Profile 25. */ + { 288, 295 }, /* Profile 26. */ + { 288, 295 }, /* Profile 27. */ + { 288, 295 }, /* Profile 28. */ + { 288, 295 }, /* Profile 29. */ + { 288, 295 }, /* Profile 30. */ + { 288, 295 }, /* Profile 31. */ + { 288, 295 }, /* Profile 32. */ + { 288, 295 }, /* Profile 33. */ + { 288, 295 }, /* Profile 34. */ + { 288, 295 }, /* Profile 35. */ + { 288, 295 }, /* Profile 36. */ + { 288, 295 }, /* Profile 37. */ + { 288, 295 }, /* Profile 38. */ + { 288, 295 }, /* Profile 39. */ + { 288, 295 }, /* Profile 40. */ + { 288, 295 }, /* Profile 41. */ + { 288, 295 }, /* Profile 42. */ + { 288, 295 }, /* Profile 43. */ + { 288, 295 }, /* Profile 44. */ + { 288, 295 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 224, 239 }, /* Profile 2. */ - { 224, 239 }, /* Profile 3. */ - { 256, 271 }, /* Profile 4. */ - { 256, 271 }, /* Profile 5. */ - { 224, 239 }, /* Profile 6. */ - { 224, 239 }, /* Profile 7. */ - { 256, 271 }, /* Profile 8. */ - { 256, 271 }, /* Profile 9. */ - { 224, 239 }, /* Profile 10. */ - { 224, 239 }, /* Profile 11. */ - { 256, 271 }, /* Profile 12. */ - { 224, 239 }, /* Profile 13. */ - { 224, 239 }, /* Profile 14. */ - { 256, 271 }, /* Profile 15. */ - { 256, 271 }, /* Profile 16. */ - { 224, 239 }, /* Profile 17. */ - { 224, 239 }, /* Profile 18. */ - { 256, 271 }, /* Profile 19. */ - { 256, 271 }, /* Profile 20. */ - { 224, 239 }, /* Profile 21. */ - { 224, 239 }, /* Profile 22. */ - { 256, 271 }, /* Profile 23. */ - { 240, 255 }, /* Profile 24. */ - { 240, 255 }, /* Profile 25. */ - { 272, 287 }, /* Profile 26. */ - { 272, 287 }, /* Profile 27. */ - { 240, 255 }, /* Profile 28. */ - { 240, 255 }, /* Profile 29. */ - { 272, 287 }, /* Profile 30. */ - { 272, 287 }, /* Profile 31. */ - { 240, 255 }, /* Profile 32. */ - { 240, 255 }, /* Profile 33. */ - { 272, 287 }, /* Profile 34. */ - { 240, 255 }, /* Profile 35. */ - { 240, 255 }, /* Profile 36. */ - { 272, 287 }, /* Profile 37. */ - { 272, 287 }, /* Profile 38. */ - { 240, 255 }, /* Profile 39. */ - { 240, 255 }, /* Profile 40. */ - { 272, 287 }, /* Profile 41. */ - { 272, 287 }, /* Profile 42. */ - { 240, 255 }, /* Profile 43. */ - { 240, 255 }, /* Profile 44. */ - { 272, 287 }, /* Profile 45. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + { 288, 303 }, /* Profile 6. */ + { 288, 303 }, /* Profile 7. */ + { 288, 303 }, /* Profile 8. */ + { 288, 303 }, /* Profile 9. */ + { 288, 303 }, /* Profile 10. */ + { 288, 303 }, /* Profile 11. */ + { 288, 303 }, /* Profile 12. */ + { 288, 303 }, /* Profile 13. */ + { 288, 303 }, /* Profile 14. */ + { 288, 303 }, /* Profile 15. */ + { 288, 303 }, /* Profile 16. */ + { 288, 303 }, /* Profile 17. */ + { 288, 303 }, /* Profile 18. */ + { 288, 303 }, /* Profile 19. */ + { 288, 303 }, /* Profile 20. */ + { 288, 303 }, /* Profile 21. */ + { 288, 303 }, /* Profile 22. */ + { 288, 303 }, /* Profile 23. */ + { 304, 319 }, /* Profile 24. */ + { 304, 319 }, /* Profile 25. */ + { 304, 319 }, /* Profile 26. */ + { 304, 319 }, /* Profile 27. */ + { 304, 319 }, /* Profile 28. */ + { 304, 319 }, /* Profile 29. */ + { 304, 319 }, /* Profile 30. */ + { 304, 319 }, /* Profile 31. */ + { 304, 319 }, /* Profile 32. */ + { 304, 319 }, /* Profile 33. */ + { 304, 319 }, /* Profile 34. */ + { 304, 319 }, /* Profile 35. */ + { 304, 319 }, /* Profile 36. */ + { 304, 319 }, /* Profile 37. */ + { 304, 319 }, /* Profile 38. */ + { 304, 319 }, /* Profile 39. */ + { 304, 319 }, /* Profile 40. */ + { 304, 319 }, /* Profile 41. */ + { 304, 319 }, /* Profile 42. */ + { 304, 319 }, /* Profile 43. */ + { 304, 319 }, /* Profile 44. */ + { 304, 319 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { 404, 407 }, /* Profile 2. */ - { 416, 419 }, /* Profile 3. */ - { 412, 415 }, /* Profile 4. */ - { 412, 415 }, /* Profile 5. */ + { 404, 407 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ { 404, 407 }, /* Profile 6. */ - { 416, 419 }, /* Profile 7. */ - { 412, 415 }, /* Profile 8. */ - { 412, 415 }, /* Profile 9. */ + { 404, 407 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 400, 403 }, /* Profile 9. */ { 400, 403 }, /* Profile 10. */ - { 412, 415 }, /* Profile 11. */ - { 408, 411 }, /* Profile 12. */ + { 400, 403 }, /* Profile 11. */ + { 396, 399 }, /* Profile 12. */ { 404, 407 }, /* Profile 13. */ - { 416, 419 }, /* Profile 14. */ - { 412, 415 }, /* Profile 15. */ - { 412, 415 }, /* Profile 16. */ + { 404, 407 }, /* Profile 14. */ + { 400, 403 }, /* Profile 15. */ + { 400, 403 }, /* Profile 16. */ { 404, 407 }, /* Profile 17. */ - { 416, 419 }, /* Profile 18. */ - { 412, 415 }, /* Profile 19. */ - { 412, 415 }, /* Profile 20. */ + { 404, 407 }, /* Profile 18. */ + { 400, 403 }, /* Profile 19. */ + { 400, 403 }, /* Profile 20. */ { 400, 403 }, /* Profile 21. */ - { 412, 415 }, /* Profile 22. */ - { 408, 411 }, /* Profile 23. */ + { 400, 403 }, /* Profile 22. */ + { 396, 399 }, /* Profile 23. */ { 404, 407 }, /* Profile 24. */ - { 416, 419 }, /* Profile 25. */ - { 412, 415 }, /* Profile 26. */ - { 412, 415 }, /* Profile 27. */ + { 404, 407 }, /* Profile 25. */ + { 400, 403 }, /* Profile 26. */ + { 400, 403 }, /* Profile 27. */ { 404, 407 }, /* Profile 28. */ - { 416, 419 }, /* Profile 29. */ - { 412, 415 }, /* Profile 30. */ - { 412, 415 }, /* Profile 31. */ + { 404, 407 }, /* Profile 29. */ + { 400, 403 }, /* Profile 30. */ + { 400, 403 }, /* Profile 31. */ { 400, 403 }, /* Profile 32. */ - { 412, 415 }, /* Profile 33. */ - { 408, 411 }, /* Profile 34. */ + { 400, 403 }, /* Profile 33. */ + { 396, 399 }, /* Profile 34. */ { 404, 407 }, /* Profile 35. */ - { 416, 419 }, /* Profile 36. */ - { 412, 415 }, /* Profile 37. */ - { 412, 415 }, /* Profile 38. */ + { 404, 407 }, /* Profile 36. */ + { 400, 403 }, /* Profile 37. */ + { 400, 403 }, /* Profile 38. */ { 404, 407 }, /* Profile 39. */ - { 416, 419 }, /* Profile 40. */ - { 412, 415 }, /* Profile 41. */ - { 412, 415 }, /* Profile 42. */ + { 404, 407 }, /* Profile 40. */ + { 400, 403 }, /* Profile 41. */ + { 400, 403 }, /* Profile 42. */ { 400, 403 }, /* Profile 43. */ - { 412, 415 }, /* Profile 44. */ - { 408, 411 }, /* Profile 45. */ + { 400, 403 }, /* Profile 44. */ + { 396, 399 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "INT_PRI_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 352, 355 }, /* Profile 2. */ - { 372, 375 }, /* Profile 3. */ - { 368, 371 }, /* Profile 4. */ - { 368, 371 }, /* Profile 5. */ - { 352, 355 }, /* Profile 6. */ - { 372, 375 }, /* Profile 7. */ - { 368, 371 }, /* Profile 8. */ - { 368, 371 }, /* Profile 9. */ - { 352, 355 }, /* Profile 10. */ - { 372, 375 }, /* Profile 11. */ - { 368, 371 }, /* Profile 12. */ - { 352, 355 }, /* Profile 13. */ - { 372, 375 }, /* Profile 14. */ - { 368, 371 }, /* Profile 15. */ - { 368, 371 }, /* Profile 16. */ - { 352, 355 }, /* Profile 17. */ - { 372, 375 }, /* Profile 18. */ - { 368, 371 }, /* Profile 19. */ - { 368, 371 }, /* Profile 20. */ - { 352, 355 }, /* Profile 21. */ - { 372, 375 }, /* Profile 22. */ - { 368, 371 }, /* Profile 23. */ - { 352, 355 }, /* Profile 24. */ - { 372, 375 }, /* Profile 25. */ - { 368, 371 }, /* Profile 26. */ - { 368, 371 }, /* Profile 27. */ - { 352, 355 }, /* Profile 28. */ - { 372, 375 }, /* Profile 29. */ - { 368, 371 }, /* Profile 30. */ - { 368, 371 }, /* Profile 31. */ - { 352, 355 }, /* Profile 32. */ - { 372, 375 }, /* Profile 33. */ - { 368, 371 }, /* Profile 34. */ - { 352, 355 }, /* Profile 35. */ - { 372, 375 }, /* Profile 36. */ - { 368, 371 }, /* Profile 37. */ - { 368, 371 }, /* Profile 38. */ - { 352, 355 }, /* Profile 39. */ - { 372, 375 }, /* Profile 40. */ - { 368, 371 }, /* Profile 41. */ - { 368, 371 }, /* Profile 42. */ - { 352, 355 }, /* Profile 43. */ - { 372, 375 }, /* Profile 44. */ - { 368, 371 }, /* Profile 45. */ + { 416, 419 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + { 416, 419 }, /* Profile 5. */ + { 416, 419 }, /* Profile 6. */ + { 416, 419 }, /* Profile 7. */ + { 416, 419 }, /* Profile 8. */ + { 416, 419 }, /* Profile 9. */ + { 412, 415 }, /* Profile 10. */ + { 412, 415 }, /* Profile 11. */ + { 412, 415 }, /* Profile 12. */ + { 416, 419 }, /* Profile 13. */ + { 416, 419 }, /* Profile 14. */ + { 416, 419 }, /* Profile 15. */ + { 416, 419 }, /* Profile 16. */ + { 416, 419 }, /* Profile 17. */ + { 416, 419 }, /* Profile 18. */ + { 416, 419 }, /* Profile 19. */ + { 416, 419 }, /* Profile 20. */ + { 412, 415 }, /* Profile 21. */ + { 412, 415 }, /* Profile 22. */ + { 412, 415 }, /* Profile 23. */ + { 416, 419 }, /* Profile 24. */ + { 416, 419 }, /* Profile 25. */ + { 416, 419 }, /* Profile 26. */ + { 416, 419 }, /* Profile 27. */ + { 416, 419 }, /* Profile 28. */ + { 416, 419 }, /* Profile 29. */ + { 416, 419 }, /* Profile 30. */ + { 416, 419 }, /* Profile 31. */ + { 412, 415 }, /* Profile 32. */ + { 412, 415 }, /* Profile 33. */ + { 412, 415 }, /* Profile 34. */ + { 416, 419 }, /* Profile 35. */ + { 416, 419 }, /* Profile 36. */ + { 416, 419 }, /* Profile 37. */ + { 416, 419 }, /* Profile 38. */ + { 416, 419 }, /* Profile 39. */ + { 416, 419 }, /* Profile 40. */ + { 416, 419 }, /* Profile 41. */ + { 416, 419 }, /* Profile 42. */ + { 412, 415 }, /* Profile 43. */ + { 412, 415 }, /* Profile 44. */ + { 412, 415 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "L2_IIF_11_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L2_IIF_11_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 240, 251 }, /* Profile 2. */ - { 240, 251 }, /* Profile 3. */ - { 272, 283 }, /* Profile 4. */ - { 272, 283 }, /* Profile 5. */ - { 240, 251 }, /* Profile 6. */ - { 240, 251 }, /* Profile 7. */ - { 272, 283 }, /* Profile 8. */ - { 272, 283 }, /* Profile 9. */ - { 240, 251 }, /* Profile 10. */ - { 240, 251 }, /* Profile 11. */ - { 272, 283 }, /* Profile 12. */ - { 240, 251 }, /* Profile 13. */ - { 240, 251 }, /* Profile 14. */ - { 272, 283 }, /* Profile 15. */ - { 272, 283 }, /* Profile 16. */ - { 240, 251 }, /* Profile 17. */ - { 240, 251 }, /* Profile 18. */ - { 272, 283 }, /* Profile 19. */ - { 272, 283 }, /* Profile 20. */ - { 240, 251 }, /* Profile 21. */ - { 240, 251 }, /* Profile 22. */ - { 272, 283 }, /* Profile 23. */ + { 336, 347 }, /* Profile 2. */ + { 336, 347 }, /* Profile 3. */ + { 336, 347 }, /* Profile 4. */ + { 336, 347 }, /* Profile 5. */ + { 336, 347 }, /* Profile 6. */ + { 336, 347 }, /* Profile 7. */ + { 336, 347 }, /* Profile 8. */ + { 336, 347 }, /* Profile 9. */ + { 336, 347 }, /* Profile 10. */ + { 336, 347 }, /* Profile 11. */ + { 336, 347 }, /* Profile 12. */ + { 336, 347 }, /* Profile 13. */ + { 336, 347 }, /* Profile 14. */ + { 336, 347 }, /* Profile 15. */ + { 336, 347 }, /* Profile 16. */ + { 336, 347 }, /* Profile 17. */ + { 336, 347 }, /* Profile 18. */ + { 336, 347 }, /* Profile 19. */ + { 336, 347 }, /* Profile 20. */ + { 336, 347 }, /* Profile 21. */ + { 336, 347 }, /* Profile 22. */ + { 336, 347 }, /* Profile 23. */ }, .profile_cnt = 24, }, { .name = "L2_OIF_11_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L2_OIF_11_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -1675,376 +1722,427 @@ static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_ }, { .name = "L3_DNAT_INDEX_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 272, 287 }, /* Profile 3. */ + { 240, 255 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ { -1, -1 }, /* Profile 4. */ { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { 272, 287 }, /* Profile 7. */ + { 240, 255 }, /* Profile 6. */ + { 240, 255 }, /* Profile 7. */ { -1, -1 }, /* Profile 8. */ { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { 272, 287 }, /* Profile 11. */ + { 240, 255 }, /* Profile 10. */ + { 240, 255 }, /* Profile 11. */ { -1, -1 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { 272, 287 }, /* Profile 14. */ + { 240, 255 }, /* Profile 13. */ + { 240, 255 }, /* Profile 14. */ { -1, -1 }, /* Profile 15. */ { -1, -1 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ - { 272, 287 }, /* Profile 18. */ + { 240, 255 }, /* Profile 17. */ + { 240, 255 }, /* Profile 18. */ { -1, -1 }, /* Profile 19. */ { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { 272, 287 }, /* Profile 22. */ + { 240, 255 }, /* Profile 21. */ + { 240, 255 }, /* Profile 22. */ { -1, -1 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { 272, 287 }, /* Profile 25. */ + { 256, 271 }, /* Profile 24. */ + { 256, 271 }, /* Profile 25. */ { -1, -1 }, /* Profile 26. */ { -1, -1 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { 272, 287 }, /* Profile 29. */ + { 256, 271 }, /* Profile 28. */ + { 256, 271 }, /* Profile 29. */ { -1, -1 }, /* Profile 30. */ { -1, -1 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { 272, 287 }, /* Profile 33. */ + { 256, 271 }, /* Profile 32. */ + { 256, 271 }, /* Profile 33. */ { -1, -1 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { 272, 287 }, /* Profile 36. */ + { 256, 271 }, /* Profile 35. */ + { 256, 271 }, /* Profile 36. */ { -1, -1 }, /* Profile 37. */ { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { 272, 287 }, /* Profile 40. */ + { 256, 271 }, /* Profile 39. */ + { 256, 271 }, /* Profile 40. */ { -1, -1 }, /* Profile 41. */ { -1, -1 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { 272, 287 }, /* Profile 44. */ + { 256, 271 }, /* Profile 43. */ + { 256, 271 }, /* Profile 44. */ }, .profile_cnt = 45, }, { .name = "L3_IIF_13_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 208, 221 }, /* Profile 2. */ - { 208, 221 }, /* Profile 3. */ - { 240, 253 }, /* Profile 4. */ - { 240, 253 }, /* Profile 5. */ - { 208, 221 }, /* Profile 6. */ - { 208, 221 }, /* Profile 7. */ - { 240, 253 }, /* Profile 8. */ - { 240, 253 }, /* Profile 9. */ - { 208, 221 }, /* Profile 10. */ - { 208, 221 }, /* Profile 11. */ - { 240, 253 }, /* Profile 12. */ - { 208, 221 }, /* Profile 13. */ - { 208, 221 }, /* Profile 14. */ - { 240, 253 }, /* Profile 15. */ - { 240, 253 }, /* Profile 16. */ - { 208, 221 }, /* Profile 17. */ - { 208, 221 }, /* Profile 18. */ - { 240, 253 }, /* Profile 19. */ - { 240, 253 }, /* Profile 20. */ - { 208, 221 }, /* Profile 21. */ - { 208, 221 }, /* Profile 22. */ - { 240, 253 }, /* Profile 23. */ - { 224, 237 }, /* Profile 24. */ - { 224, 237 }, /* Profile 25. */ - { 256, 269 }, /* Profile 26. */ - { 256, 269 }, /* Profile 27. */ - { 224, 237 }, /* Profile 28. */ - { 224, 237 }, /* Profile 29. */ - { 256, 269 }, /* Profile 30. */ - { 256, 269 }, /* Profile 31. */ - { 224, 237 }, /* Profile 32. */ - { 224, 237 }, /* Profile 33. */ - { 256, 269 }, /* Profile 34. */ - { 224, 237 }, /* Profile 35. */ - { 224, 237 }, /* Profile 36. */ - { 256, 269 }, /* Profile 37. */ - { 256, 269 }, /* Profile 38. */ - { 224, 237 }, /* Profile 39. */ - { 224, 237 }, /* Profile 40. */ - { 256, 269 }, /* Profile 41. */ - { 256, 269 }, /* Profile 42. */ - { 224, 237 }, /* Profile 43. */ - { 224, 237 }, /* Profile 44. */ - { 256, 269 }, /* Profile 45. */ + { 320, 333 }, /* Profile 2. */ + { 320, 333 }, /* Profile 3. */ + { 320, 333 }, /* Profile 4. */ + { 320, 333 }, /* Profile 5. */ + { 320, 333 }, /* Profile 6. */ + { 320, 333 }, /* Profile 7. */ + { 320, 333 }, /* Profile 8. */ + { 320, 333 }, /* Profile 9. */ + { 320, 333 }, /* Profile 10. */ + { 320, 333 }, /* Profile 11. */ + { 320, 333 }, /* Profile 12. */ + { 320, 333 }, /* Profile 13. */ + { 320, 333 }, /* Profile 14. */ + { 320, 333 }, /* Profile 15. */ + { 320, 333 }, /* Profile 16. */ + { 320, 333 }, /* Profile 17. */ + { 320, 333 }, /* Profile 18. */ + { 320, 333 }, /* Profile 19. */ + { 320, 333 }, /* Profile 20. */ + { 320, 333 }, /* Profile 21. */ + { 320, 333 }, /* Profile 22. */ + { 320, 333 }, /* Profile 23. */ + { 336, 349 }, /* Profile 24. */ + { 336, 349 }, /* Profile 25. */ + { 336, 349 }, /* Profile 26. */ + { 336, 349 }, /* Profile 27. */ + { 336, 349 }, /* Profile 28. */ + { 336, 349 }, /* Profile 29. */ + { 336, 349 }, /* Profile 30. */ + { 336, 349 }, /* Profile 31. */ + { 336, 349 }, /* Profile 32. */ + { 336, 349 }, /* Profile 33. */ + { 336, 349 }, /* Profile 34. */ + { 336, 349 }, /* Profile 35. */ + { 336, 349 }, /* Profile 36. */ + { 336, 349 }, /* Profile 37. */ + { 336, 349 }, /* Profile 38. */ + { 336, 349 }, /* Profile 39. */ + { 336, 349 }, /* Profile 40. */ + { 336, 349 }, /* Profile 41. */ + { 336, 349 }, /* Profile 42. */ + { 336, 349 }, /* Profile 43. */ + { 336, 349 }, /* Profile 44. */ + { 336, 349 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "L3_OIF_1_13_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 160, 173 }, /* Profile 2. */ - { 160, 173 }, /* Profile 3. */ - { 192, 205 }, /* Profile 4. */ - { 192, 205 }, /* Profile 5. */ - { 160, 173 }, /* Profile 6. */ - { 160, 173 }, /* Profile 7. */ - { 192, 205 }, /* Profile 8. */ - { 192, 205 }, /* Profile 9. */ - { 160, 173 }, /* Profile 10. */ - { 160, 173 }, /* Profile 11. */ - { 192, 205 }, /* Profile 12. */ - { 160, 173 }, /* Profile 13. */ - { 160, 173 }, /* Profile 14. */ - { 192, 205 }, /* Profile 15. */ - { 192, 205 }, /* Profile 16. */ - { 160, 173 }, /* Profile 17. */ - { 160, 173 }, /* Profile 18. */ - { 192, 205 }, /* Profile 19. */ - { 192, 205 }, /* Profile 20. */ - { 160, 173 }, /* Profile 21. */ - { 160, 173 }, /* Profile 22. */ - { 192, 205 }, /* Profile 23. */ - { 176, 189 }, /* Profile 24. */ - { 176, 189 }, /* Profile 25. */ - { 208, 221 }, /* Profile 26. */ - { 208, 221 }, /* Profile 27. */ - { 176, 189 }, /* Profile 28. */ - { 176, 189 }, /* Profile 29. */ - { 208, 221 }, /* Profile 30. */ - { 208, 221 }, /* Profile 31. */ - { 176, 189 }, /* Profile 32. */ - { 176, 189 }, /* Profile 33. */ - { 208, 221 }, /* Profile 34. */ - { 176, 189 }, /* Profile 35. */ - { 176, 189 }, /* Profile 36. */ - { 208, 221 }, /* Profile 37. */ - { 208, 221 }, /* Profile 38. */ - { 176, 189 }, /* Profile 39. */ - { 176, 189 }, /* Profile 40. */ - { 208, 221 }, /* Profile 41. */ - { 208, 221 }, /* Profile 42. */ - { 176, 189 }, /* Profile 43. */ - { 176, 189 }, /* Profile 44. */ - { 208, 221 }, /* Profile 45. */ + { 144, 157 }, /* Profile 2. */ + { 144, 157 }, /* Profile 3. */ + { 144, 157 }, /* Profile 4. */ + { 144, 157 }, /* Profile 5. */ + { 144, 157 }, /* Profile 6. */ + { 144, 157 }, /* Profile 7. */ + { 144, 157 }, /* Profile 8. */ + { 144, 157 }, /* Profile 9. */ + { 144, 157 }, /* Profile 10. */ + { 144, 157 }, /* Profile 11. */ + { 144, 157 }, /* Profile 12. */ + { 144, 157 }, /* Profile 13. */ + { 144, 157 }, /* Profile 14. */ + { 144, 157 }, /* Profile 15. */ + { 144, 157 }, /* Profile 16. */ + { 144, 157 }, /* Profile 17. */ + { 144, 157 }, /* Profile 18. */ + { 144, 157 }, /* Profile 19. */ + { 144, 157 }, /* Profile 20. */ + { 144, 157 }, /* Profile 21. */ + { 144, 157 }, /* Profile 22. */ + { 144, 157 }, /* Profile 23. */ + { 160, 173 }, /* Profile 24. */ + { 160, 173 }, /* Profile 25. */ + { 160, 173 }, /* Profile 26. */ + { 160, 173 }, /* Profile 27. */ + { 160, 173 }, /* Profile 28. */ + { 160, 173 }, /* Profile 29. */ + { 160, 173 }, /* Profile 30. */ + { 160, 173 }, /* Profile 31. */ + { 160, 173 }, /* Profile 32. */ + { 160, 173 }, /* Profile 33. */ + { 160, 173 }, /* Profile 34. */ + { 160, 173 }, /* Profile 35. */ + { 160, 173 }, /* Profile 36. */ + { 160, 173 }, /* Profile 37. */ + { 160, 173 }, /* Profile 38. */ + { 160, 173 }, /* Profile 39. */ + { 160, 173 }, /* Profile 40. */ + { 160, 173 }, /* Profile 41. */ + { 160, 173 }, /* Profile 42. */ + { 160, 173 }, /* Profile 43. */ + { 160, 173 }, /* Profile 44. */ + { 160, 173 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "L3_SNAT_INDEX_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 256, 271 }, /* Profile 3. */ + { 208, 223 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ { -1, -1 }, /* Profile 4. */ { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { 256, 271 }, /* Profile 7. */ + { 208, 223 }, /* Profile 6. */ + { 208, 223 }, /* Profile 7. */ { -1, -1 }, /* Profile 8. */ { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { 256, 271 }, /* Profile 11. */ + { 208, 223 }, /* Profile 10. */ + { 208, 223 }, /* Profile 11. */ { -1, -1 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { 256, 271 }, /* Profile 14. */ + { 208, 223 }, /* Profile 13. */ + { 208, 223 }, /* Profile 14. */ { -1, -1 }, /* Profile 15. */ { -1, -1 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ - { 256, 271 }, /* Profile 18. */ + { 208, 223 }, /* Profile 17. */ + { 208, 223 }, /* Profile 18. */ { -1, -1 }, /* Profile 19. */ { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { 256, 271 }, /* Profile 22. */ + { 208, 223 }, /* Profile 21. */ + { 208, 223 }, /* Profile 22. */ { -1, -1 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { 256, 271 }, /* Profile 25. */ + { 224, 239 }, /* Profile 24. */ + { 224, 239 }, /* Profile 25. */ { -1, -1 }, /* Profile 26. */ { -1, -1 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { 256, 271 }, /* Profile 29. */ + { 224, 239 }, /* Profile 28. */ + { 224, 239 }, /* Profile 29. */ { -1, -1 }, /* Profile 30. */ { -1, -1 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { 256, 271 }, /* Profile 33. */ + { 224, 239 }, /* Profile 32. */ + { 224, 239 }, /* Profile 33. */ { -1, -1 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { 256, 271 }, /* Profile 36. */ + { 224, 239 }, /* Profile 35. */ + { 224, 239 }, /* Profile 36. */ { -1, -1 }, /* Profile 37. */ { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { 256, 271 }, /* Profile 40. */ + { 224, 239 }, /* Profile 39. */ + { 224, 239 }, /* Profile 40. */ { -1, -1 }, /* Profile 41. */ { -1, -1 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { 256, 271 }, /* Profile 44. */ + { 224, 239 }, /* Profile 43. */ + { 224, 239 }, /* Profile 44. */ }, .profile_cnt = 45, }, { - .name = "MPLS_LABEL_DECAP_COUNT_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .name = "MAC_DA_23_20_3_0", + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 408, 411 }, /* Profile 2. */ - { 420, 423 }, /* Profile 3. */ - { 416, 419 }, /* Profile 4. */ - { 416, 419 }, /* Profile 5. */ - { 408, 411 }, /* Profile 6. */ - { 420, 423 }, /* Profile 7. */ - { 416, 419 }, /* Profile 8. */ - { 416, 419 }, /* Profile 9. */ - { 404, 407 }, /* Profile 10. */ - { 416, 419 }, /* Profile 11. */ - { 412, 415 }, /* Profile 12. */ - { 408, 411 }, /* Profile 13. */ - { 420, 423 }, /* Profile 14. */ - { 416, 419 }, /* Profile 15. */ - { 416, 419 }, /* Profile 16. */ - { 408, 411 }, /* Profile 17. */ - { 420, 423 }, /* Profile 18. */ - { 416, 419 }, /* Profile 19. */ - { 416, 419 }, /* Profile 20. */ - { 404, 407 }, /* Profile 21. */ - { 416, 419 }, /* Profile 22. */ - { 412, 415 }, /* Profile 23. */ - { 408, 411 }, /* Profile 24. */ - { 420, 423 }, /* Profile 25. */ - { 416, 419 }, /* Profile 26. */ - { 416, 419 }, /* Profile 27. */ - { 408, 411 }, /* Profile 28. */ - { 420, 423 }, /* Profile 29. */ - { 416, 419 }, /* Profile 30. */ - { 416, 419 }, /* Profile 31. */ - { 404, 407 }, /* Profile 32. */ - { 416, 419 }, /* Profile 33. */ - { 412, 415 }, /* Profile 34. */ - { 408, 411 }, /* Profile 35. */ - { 420, 423 }, /* Profile 36. */ - { 416, 419 }, /* Profile 37. */ - { 416, 419 }, /* Profile 38. */ - { 408, 411 }, /* Profile 39. */ - { 420, 423 }, /* Profile 40. */ - { 416, 419 }, /* Profile 41. */ - { 416, 419 }, /* Profile 42. */ - { 404, 407 }, /* Profile 43. */ - { 416, 419 }, /* Profile 44. */ - { 412, 415 }, /* Profile 45. */ + { 384, 387 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 380, 383 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 384, 387 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 384, 387 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 380, 383 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 384, 387 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { 384, 387 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { 380, 383 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { 384, 387 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { 384, 387 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { 380, 383 }, /* Profile 43. */ + }, + .profile_cnt = 44, + }, + { + .name = "MPLS_LABEL_DECAP_COUNT_3_0", + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 396, 399 }, /* Profile 6. */ + { 396, 399 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ + { 392, 395 }, /* Profile 10. */ + { 392, 395 }, /* Profile 11. */ + { 388, 391 }, /* Profile 12. */ + { 396, 399 }, /* Profile 13. */ + { 396, 399 }, /* Profile 14. */ + { 392, 395 }, /* Profile 15. */ + { 392, 395 }, /* Profile 16. */ + { 396, 399 }, /* Profile 17. */ + { 396, 399 }, /* Profile 18. */ + { 392, 395 }, /* Profile 19. */ + { 392, 395 }, /* Profile 20. */ + { 392, 395 }, /* Profile 21. */ + { 392, 395 }, /* Profile 22. */ + { 388, 391 }, /* Profile 23. */ + { 396, 399 }, /* Profile 24. */ + { 396, 399 }, /* Profile 25. */ + { 392, 395 }, /* Profile 26. */ + { 392, 395 }, /* Profile 27. */ + { 396, 399 }, /* Profile 28. */ + { 396, 399 }, /* Profile 29. */ + { 392, 395 }, /* Profile 30. */ + { 392, 395 }, /* Profile 31. */ + { 392, 395 }, /* Profile 32. */ + { 392, 395 }, /* Profile 33. */ + { 388, 391 }, /* Profile 34. */ + { 396, 399 }, /* Profile 35. */ + { 396, 399 }, /* Profile 36. */ + { 392, 395 }, /* Profile 37. */ + { 392, 395 }, /* Profile 38. */ + { 396, 399 }, /* Profile 39. */ + { 396, 399 }, /* Profile 40. */ + { 392, 395 }, /* Profile 41. */ + { 392, 395 }, /* Profile 42. */ + { 392, 395 }, /* Profile 43. */ + { 392, 395 }, /* Profile 44. */ + { 388, 391 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 256, 271 }, /* Profile 2. */ - { 288, 303 }, /* Profile 3. */ - { 288, 303 }, /* Profile 4. */ - { 288, 303 }, /* Profile 5. */ - { 256, 271 }, /* Profile 6. */ - { 288, 303 }, /* Profile 7. */ - { 288, 303 }, /* Profile 8. */ - { 288, 303 }, /* Profile 9. */ - { 256, 271 }, /* Profile 10. */ - { 288, 303 }, /* Profile 11. */ - { 288, 303 }, /* Profile 12. */ - { 256, 271 }, /* Profile 13. */ - { 288, 303 }, /* Profile 14. */ - { 288, 303 }, /* Profile 15. */ - { 288, 303 }, /* Profile 16. */ - { 256, 271 }, /* Profile 17. */ - { 288, 303 }, /* Profile 18. */ - { 288, 303 }, /* Profile 19. */ - { 288, 303 }, /* Profile 20. */ - { 256, 271 }, /* Profile 21. */ - { 288, 303 }, /* Profile 22. */ - { 288, 303 }, /* Profile 23. */ - { 256, 271 }, /* Profile 24. */ - { 288, 303 }, /* Profile 25. */ - { 288, 303 }, /* Profile 26. */ - { 288, 303 }, /* Profile 27. */ - { 256, 271 }, /* Profile 28. */ - { 288, 303 }, /* Profile 29. */ - { 288, 303 }, /* Profile 30. */ - { 288, 303 }, /* Profile 31. */ - { 256, 271 }, /* Profile 32. */ - { 288, 303 }, /* Profile 33. */ - { 288, 303 }, /* Profile 34. */ - { 256, 271 }, /* Profile 35. */ - { 288, 303 }, /* Profile 36. */ - { 288, 303 }, /* Profile 37. */ - { 288, 303 }, /* Profile 38. */ - { 256, 271 }, /* Profile 39. */ - { 288, 303 }, /* Profile 40. */ - { 288, 303 }, /* Profile 41. */ - { 288, 303 }, /* Profile 42. */ - { 256, 271 }, /* Profile 43. */ - { 288, 303 }, /* Profile 44. */ - { 288, 303 }, /* Profile 45. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + { 192, 207 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + { 192, 207 }, /* Profile 8. */ + { 192, 207 }, /* Profile 9. */ + { 192, 207 }, /* Profile 10. */ + { 192, 207 }, /* Profile 11. */ + { 192, 207 }, /* Profile 12. */ + { 192, 207 }, /* Profile 13. */ + { 192, 207 }, /* Profile 14. */ + { 192, 207 }, /* Profile 15. */ + { 192, 207 }, /* Profile 16. */ + { 192, 207 }, /* Profile 17. */ + { 192, 207 }, /* Profile 18. */ + { 192, 207 }, /* Profile 19. */ + { 192, 207 }, /* Profile 20. */ + { 192, 207 }, /* Profile 21. */ + { 192, 207 }, /* Profile 22. */ + { 192, 207 }, /* Profile 23. */ + { 208, 223 }, /* Profile 24. */ + { 208, 223 }, /* Profile 25. */ + { 208, 223 }, /* Profile 26. */ + { 208, 223 }, /* Profile 27. */ + { 208, 223 }, /* Profile 28. */ + { 208, 223 }, /* Profile 29. */ + { 208, 223 }, /* Profile 30. */ + { 208, 223 }, /* Profile 31. */ + { 208, 223 }, /* Profile 32. */ + { 208, 223 }, /* Profile 33. */ + { 208, 223 }, /* Profile 34. */ + { 208, 223 }, /* Profile 35. */ + { 208, 223 }, /* Profile 36. */ + { 208, 223 }, /* Profile 37. */ + { 208, 223 }, /* Profile 38. */ + { 208, 223 }, /* Profile 39. */ + { 208, 223 }, /* Profile 40. */ + { 208, 223 }, /* Profile 41. */ + { 208, 223 }, /* Profile 42. */ + { 208, 223 }, /* Profile 43. */ + { 208, 223 }, /* Profile 44. */ + { 208, 223 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "NHOP_INDEX_1_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 304, 319 }, /* Profile 2. */ - { 336, 351 }, /* Profile 3. */ - { 336, 351 }, /* Profile 4. */ - { 336, 351 }, /* Profile 5. */ - { 304, 319 }, /* Profile 6. */ - { 336, 351 }, /* Profile 7. */ - { 336, 351 }, /* Profile 8. */ - { 336, 351 }, /* Profile 9. */ - { 304, 319 }, /* Profile 10. */ - { 336, 351 }, /* Profile 11. */ - { 336, 351 }, /* Profile 12. */ - { 304, 319 }, /* Profile 13. */ - { 336, 351 }, /* Profile 14. */ - { 336, 351 }, /* Profile 15. */ - { 336, 351 }, /* Profile 16. */ - { 304, 319 }, /* Profile 17. */ - { 336, 351 }, /* Profile 18. */ - { 336, 351 }, /* Profile 19. */ - { 336, 351 }, /* Profile 20. */ - { 304, 319 }, /* Profile 21. */ - { 336, 351 }, /* Profile 22. */ - { 336, 351 }, /* Profile 23. */ - { 304, 319 }, /* Profile 24. */ - { 336, 351 }, /* Profile 25. */ - { 336, 351 }, /* Profile 26. */ - { 336, 351 }, /* Profile 27. */ - { 304, 319 }, /* Profile 28. */ - { 336, 351 }, /* Profile 29. */ - { 336, 351 }, /* Profile 30. */ - { 336, 351 }, /* Profile 31. */ - { 304, 319 }, /* Profile 32. */ - { 336, 351 }, /* Profile 33. */ - { 336, 351 }, /* Profile 34. */ - { 304, 319 }, /* Profile 35. */ - { 336, 351 }, /* Profile 36. */ - { 336, 351 }, /* Profile 37. */ - { 336, 351 }, /* Profile 38. */ - { 304, 319 }, /* Profile 39. */ - { 336, 351 }, /* Profile 40. */ - { 336, 351 }, /* Profile 41. */ - { 336, 351 }, /* Profile 42. */ - { 304, 319 }, /* Profile 43. */ - { 336, 351 }, /* Profile 44. */ - { 336, 351 }, /* Profile 45. */ + { 224, 239 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + { 224, 239 }, /* Profile 6. */ + { 224, 239 }, /* Profile 7. */ + { 240, 255 }, /* Profile 8. */ + { 240, 255 }, /* Profile 9. */ + { 224, 239 }, /* Profile 10. */ + { 224, 239 }, /* Profile 11. */ + { 240, 255 }, /* Profile 12. */ + { 224, 239 }, /* Profile 13. */ + { 224, 239 }, /* Profile 14. */ + { 240, 255 }, /* Profile 15. */ + { 240, 255 }, /* Profile 16. */ + { 224, 239 }, /* Profile 17. */ + { 224, 239 }, /* Profile 18. */ + { 240, 255 }, /* Profile 19. */ + { 240, 255 }, /* Profile 20. */ + { 224, 239 }, /* Profile 21. */ + { 224, 239 }, /* Profile 22. */ + { 240, 255 }, /* Profile 23. */ + { 240, 255 }, /* Profile 24. */ + { 240, 255 }, /* Profile 25. */ + { 256, 271 }, /* Profile 26. */ + { 256, 271 }, /* Profile 27. */ + { 240, 255 }, /* Profile 28. */ + { 240, 255 }, /* Profile 29. */ + { 256, 271 }, /* Profile 30. */ + { 256, 271 }, /* Profile 31. */ + { 240, 255 }, /* Profile 32. */ + { 240, 255 }, /* Profile 33. */ + { 256, 271 }, /* Profile 34. */ + { 240, 255 }, /* Profile 35. */ + { 240, 255 }, /* Profile 36. */ + { 256, 271 }, /* Profile 37. */ + { 256, 271 }, /* Profile 38. */ + { 240, 255 }, /* Profile 39. */ + { 240, 255 }, /* Profile 40. */ + { 256, 271 }, /* Profile 41. */ + { 256, 271 }, /* Profile 42. */ + { 240, 255 }, /* Profile 43. */ + { 240, 255 }, /* Profile 44. */ + { 256, 271 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2097,423 +2195,166 @@ static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_ }, { .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 400, 403 }, /* Profile 2. */ - { 412, 415 }, /* Profile 3. */ - { 408, 411 }, /* Profile 4. */ - { 408, 411 }, /* Profile 5. */ - { 400, 403 }, /* Profile 6. */ - { 412, 415 }, /* Profile 7. */ - { 408, 411 }, /* Profile 8. */ - { 408, 411 }, /* Profile 9. */ - { 396, 399 }, /* Profile 10. */ - { 408, 411 }, /* Profile 11. */ - { 404, 407 }, /* Profile 12. */ - { 400, 403 }, /* Profile 13. */ - { 412, 415 }, /* Profile 14. */ - { 408, 411 }, /* Profile 15. */ - { 408, 411 }, /* Profile 16. */ - { 400, 403 }, /* Profile 17. */ - { 412, 415 }, /* Profile 18. */ - { 408, 411 }, /* Profile 19. */ - { 408, 411 }, /* Profile 20. */ - { 396, 399 }, /* Profile 21. */ - { 408, 411 }, /* Profile 22. */ - { 404, 407 }, /* Profile 23. */ - { 400, 403 }, /* Profile 24. */ - { 412, 415 }, /* Profile 25. */ - { 408, 411 }, /* Profile 26. */ - { 408, 411 }, /* Profile 27. */ - { 400, 403 }, /* Profile 28. */ - { 412, 415 }, /* Profile 29. */ - { 408, 411 }, /* Profile 30. */ - { 408, 411 }, /* Profile 31. */ - { 396, 399 }, /* Profile 32. */ - { 408, 411 }, /* Profile 33. */ - { 404, 407 }, /* Profile 34. */ - { 400, 403 }, /* Profile 35. */ - { 412, 415 }, /* Profile 36. */ - { 408, 411 }, /* Profile 37. */ - { 408, 411 }, /* Profile 38. */ - { 400, 403 }, /* Profile 39. */ - { 412, 415 }, /* Profile 40. */ - { 408, 411 }, /* Profile 41. */ - { 408, 411 }, /* Profile 42. */ - { 396, 399 }, /* Profile 43. */ - { 408, 411 }, /* Profile 44. */ - { 404, 407 }, /* Profile 45. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 388, 391 }, /* Profile 6. */ + { 388, 391 }, /* Profile 7. */ + { 384, 387 }, /* Profile 8. */ + { 384, 387 }, /* Profile 9. */ + { 384, 387 }, /* Profile 10. */ + { 384, 387 }, /* Profile 11. */ + { 380, 383 }, /* Profile 12. */ + { 388, 391 }, /* Profile 13. */ + { 388, 391 }, /* Profile 14. */ + { 384, 387 }, /* Profile 15. */ + { 384, 387 }, /* Profile 16. */ + { 388, 391 }, /* Profile 17. */ + { 388, 391 }, /* Profile 18. */ + { 384, 387 }, /* Profile 19. */ + { 384, 387 }, /* Profile 20. */ + { 384, 387 }, /* Profile 21. */ + { 384, 387 }, /* Profile 22. */ + { 380, 383 }, /* Profile 23. */ + { 388, 391 }, /* Profile 24. */ + { 388, 391 }, /* Profile 25. */ + { 384, 387 }, /* Profile 26. */ + { 384, 387 }, /* Profile 27. */ + { 388, 391 }, /* Profile 28. */ + { 388, 391 }, /* Profile 29. */ + { 384, 387 }, /* Profile 30. */ + { 384, 387 }, /* Profile 31. */ + { 384, 387 }, /* Profile 32. */ + { 384, 387 }, /* Profile 33. */ + { 380, 383 }, /* Profile 34. */ + { 388, 391 }, /* Profile 35. */ + { 388, 391 }, /* Profile 36. */ + { 384, 387 }, /* Profile 37. */ + { 384, 387 }, /* Profile 38. */ + { 388, 391 }, /* Profile 39. */ + { 388, 391 }, /* Profile 40. */ + { 384, 387 }, /* Profile 41. */ + { 384, 387 }, /* Profile 42. */ + { 384, 387 }, /* Profile 43. */ + { 384, 387 }, /* Profile 44. */ + { 380, 383 }, /* Profile 45. */ }, .profile_cnt = 46, }, - { - .name = "SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 356, 359 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { 356, 359 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { 356, 359 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { 356, 359 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { -1, -1 }, /* Profile 16. */ - { 356, 359 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { 356, 359 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { 356, 359 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { 356, 359 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { 356, 359 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { 356, 359 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { 356, 359 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { 356, 359 }, /* Profile 43. */ - }, - .profile_cnt = 44, - }, - { - .name = "SRV6_NEW_GSID_SI_2_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 412, 414 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { 412, 414 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { 408, 410 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { 412, 414 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { -1, -1 }, /* Profile 16. */ - { 412, 414 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { 408, 410 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { 412, 414 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { 412, 414 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { 408, 410 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { 412, 414 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { 412, 414 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { 408, 410 }, /* Profile 43. */ - }, - .profile_cnt = 44, - }, - { - .name = "SRV6_SID_AND_PREFIX_LEN_ENC_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 364, 367 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { 364, 367 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { 364, 367 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { 364, 367 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { -1, -1 }, /* Profile 16. */ - { 364, 367 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { 364, 367 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { 364, 367 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { 364, 367 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { 364, 367 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { 364, 367 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { 364, 367 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { 364, 367 }, /* Profile 43. */ - }, - .profile_cnt = 44, - }, - { - .name = "SRV6_TUNNEL_NEXT_SID_SELECT_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_TUNNEL_NEXT_SID_SELECT_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 416, 419 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { 416, 419 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { 412, 415 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { 416, 419 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { -1, -1 }, /* Profile 16. */ - { 416, 419 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { 412, 415 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { 416, 419 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { 416, 419 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { 412, 415 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { 416, 419 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { 416, 419 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { 412, 415 }, /* Profile 43. */ - }, - .profile_cnt = 44, - }, { .name = "SVP_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVP_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SVP_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 320, 335 }, /* Profile 2. */ - { 352, 367 }, /* Profile 3. */ - { 352, 367 }, /* Profile 4. */ - { 352, 367 }, /* Profile 5. */ - { 320, 335 }, /* Profile 6. */ - { 352, 367 }, /* Profile 7. */ - { 352, 367 }, /* Profile 8. */ - { 352, 367 }, /* Profile 9. */ - { 320, 335 }, /* Profile 10. */ - { 352, 367 }, /* Profile 11. */ - { 352, 367 }, /* Profile 12. */ - { 320, 335 }, /* Profile 13. */ - { 352, 367 }, /* Profile 14. */ - { 352, 367 }, /* Profile 15. */ - { 352, 367 }, /* Profile 16. */ - { 320, 335 }, /* Profile 17. */ - { 352, 367 }, /* Profile 18. */ - { 352, 367 }, /* Profile 19. */ - { 352, 367 }, /* Profile 20. */ - { 320, 335 }, /* Profile 21. */ - { 352, 367 }, /* Profile 22. */ - { 352, 367 }, /* Profile 23. */ + { 304, 319 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 304, 319 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + { 304, 319 }, /* Profile 6. */ + { 304, 319 }, /* Profile 7. */ + { 304, 319 }, /* Profile 8. */ + { 304, 319 }, /* Profile 9. */ + { 304, 319 }, /* Profile 10. */ + { 304, 319 }, /* Profile 11. */ + { 304, 319 }, /* Profile 12. */ + { 304, 319 }, /* Profile 13. */ + { 304, 319 }, /* Profile 14. */ + { 304, 319 }, /* Profile 15. */ + { 304, 319 }, /* Profile 16. */ + { 304, 319 }, /* Profile 17. */ + { 304, 319 }, /* Profile 18. */ + { 304, 319 }, /* Profile 19. */ + { 304, 319 }, /* Profile 20. */ + { 304, 319 }, /* Profile 21. */ + { 304, 319 }, /* Profile 22. */ + { 304, 319 }, /* Profile 23. */ { 320, 335 }, /* Profile 24. */ - { 352, 367 }, /* Profile 25. */ - { 352, 367 }, /* Profile 26. */ - { 352, 367 }, /* Profile 27. */ + { 320, 335 }, /* Profile 25. */ + { 320, 335 }, /* Profile 26. */ + { 320, 335 }, /* Profile 27. */ { 320, 335 }, /* Profile 28. */ - { 352, 367 }, /* Profile 29. */ - { 352, 367 }, /* Profile 30. */ - { 352, 367 }, /* Profile 31. */ + { 320, 335 }, /* Profile 29. */ + { 320, 335 }, /* Profile 30. */ + { 320, 335 }, /* Profile 31. */ { 320, 335 }, /* Profile 32. */ - { 352, 367 }, /* Profile 33. */ - { 352, 367 }, /* Profile 34. */ + { 320, 335 }, /* Profile 33. */ + { 320, 335 }, /* Profile 34. */ { 320, 335 }, /* Profile 35. */ - { 352, 367 }, /* Profile 36. */ - { 352, 367 }, /* Profile 37. */ - { 352, 367 }, /* Profile 38. */ + { 320, 335 }, /* Profile 36. */ + { 320, 335 }, /* Profile 37. */ + { 320, 335 }, /* Profile 38. */ { 320, 335 }, /* Profile 39. */ - { 352, 367 }, /* Profile 40. */ - { 352, 367 }, /* Profile 41. */ - { 352, 367 }, /* Profile 42. */ + { 320, 335 }, /* Profile 40. */ + { 320, 335 }, /* Profile 41. */ + { 320, 335 }, /* Profile 42. */ { 320, 335 }, /* Profile 43. */ - { 352, 367 }, /* Profile 44. */ - { 352, 367 }, /* Profile 45. */ + { 320, 335 }, /* Profile 44. */ + { 320, 335 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 380, 383 }, /* Profile 2. */ - { 392, 395 }, /* Profile 3. */ - { 388, 391 }, /* Profile 4. */ - { 388, 391 }, /* Profile 5. */ - { 380, 383 }, /* Profile 6. */ - { 392, 395 }, /* Profile 7. */ - { 388, 391 }, /* Profile 8. */ - { 388, 391 }, /* Profile 9. */ - { 376, 379 }, /* Profile 10. */ - { 388, 391 }, /* Profile 11. */ - { 384, 387 }, /* Profile 12. */ - { 380, 383 }, /* Profile 13. */ - { 392, 395 }, /* Profile 14. */ - { 388, 391 }, /* Profile 15. */ - { 388, 391 }, /* Profile 16. */ - { 380, 383 }, /* Profile 17. */ - { 392, 395 }, /* Profile 18. */ - { 388, 391 }, /* Profile 19. */ - { 388, 391 }, /* Profile 20. */ - { 376, 379 }, /* Profile 21. */ - { 388, 391 }, /* Profile 22. */ - { 384, 387 }, /* Profile 23. */ - { 380, 383 }, /* Profile 24. */ - { 392, 395 }, /* Profile 25. */ - { 388, 391 }, /* Profile 26. */ - { 388, 391 }, /* Profile 27. */ - { 380, 383 }, /* Profile 28. */ - { 392, 395 }, /* Profile 29. */ - { 388, 391 }, /* Profile 30. */ - { 388, 391 }, /* Profile 31. */ - { 376, 379 }, /* Profile 32. */ - { 388, 391 }, /* Profile 33. */ - { 384, 387 }, /* Profile 34. */ - { 380, 383 }, /* Profile 35. */ - { 392, 395 }, /* Profile 36. */ - { 388, 391 }, /* Profile 37. */ - { 388, 391 }, /* Profile 38. */ - { 380, 383 }, /* Profile 39. */ - { 392, 395 }, /* Profile 40. */ - { 388, 391 }, /* Profile 41. */ - { 388, 391 }, /* Profile 42. */ - { 376, 379 }, /* Profile 43. */ - { 388, 391 }, /* Profile 44. */ - { 384, 387 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 384, 387 }, /* Profile 2. */ - { 396, 399 }, /* Profile 3. */ - { 392, 395 }, /* Profile 4. */ - { 392, 395 }, /* Profile 5. */ - { 384, 387 }, /* Profile 6. */ - { 396, 399 }, /* Profile 7. */ - { 392, 395 }, /* Profile 8. */ - { 392, 395 }, /* Profile 9. */ - { 380, 383 }, /* Profile 10. */ - { 392, 395 }, /* Profile 11. */ - { 388, 391 }, /* Profile 12. */ - { 384, 387 }, /* Profile 13. */ - { 396, 399 }, /* Profile 14. */ - { 392, 395 }, /* Profile 15. */ - { 392, 395 }, /* Profile 16. */ - { 384, 387 }, /* Profile 17. */ - { 396, 399 }, /* Profile 18. */ - { 392, 395 }, /* Profile 19. */ - { 392, 395 }, /* Profile 20. */ - { 380, 383 }, /* Profile 21. */ - { 392, 395 }, /* Profile 22. */ - { 388, 391 }, /* Profile 23. */ - { 384, 387 }, /* Profile 24. */ - { 396, 399 }, /* Profile 25. */ - { 392, 395 }, /* Profile 26. */ - { 392, 395 }, /* Profile 27. */ - { 384, 387 }, /* Profile 28. */ - { 396, 399 }, /* Profile 29. */ - { 392, 395 }, /* Profile 30. */ - { 392, 395 }, /* Profile 31. */ - { 380, 383 }, /* Profile 32. */ - { 392, 395 }, /* Profile 33. */ - { 388, 391 }, /* Profile 34. */ - { 384, 387 }, /* Profile 35. */ - { 396, 399 }, /* Profile 36. */ - { 392, 395 }, /* Profile 37. */ - { 392, 395 }, /* Profile 38. */ - { 384, 387 }, /* Profile 39. */ - { 396, 399 }, /* Profile 40. */ - { 392, 395 }, /* Profile 41. */ - { 392, 395 }, /* Profile 42. */ - { 380, 383 }, /* Profile 43. */ - { 392, 395 }, /* Profile 44. */ - { 388, 391 }, /* Profile 45. */ + { 376, 379 }, /* Profile 2. */ + { 380, 383 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ + { 376, 379 }, /* Profile 6. */ + { 380, 383 }, /* Profile 7. */ + { 376, 379 }, /* Profile 8. */ + { 376, 379 }, /* Profile 9. */ + { 372, 375 }, /* Profile 10. */ + { 376, 379 }, /* Profile 11. */ + { 372, 375 }, /* Profile 12. */ + { 376, 379 }, /* Profile 13. */ + { 380, 383 }, /* Profile 14. */ + { 376, 379 }, /* Profile 15. */ + { 376, 379 }, /* Profile 16. */ + { 376, 379 }, /* Profile 17. */ + { 380, 383 }, /* Profile 18. */ + { 376, 379 }, /* Profile 19. */ + { 376, 379 }, /* Profile 20. */ + { 372, 375 }, /* Profile 21. */ + { 376, 379 }, /* Profile 22. */ + { 372, 375 }, /* Profile 23. */ + { 376, 379 }, /* Profile 24. */ + { 380, 383 }, /* Profile 25. */ + { 376, 379 }, /* Profile 26. */ + { 376, 379 }, /* Profile 27. */ + { 376, 379 }, /* Profile 28. */ + { 380, 383 }, /* Profile 29. */ + { 376, 379 }, /* Profile 30. */ + { 376, 379 }, /* Profile 31. */ + { 372, 375 }, /* Profile 32. */ + { 376, 379 }, /* Profile 33. */ + { 372, 375 }, /* Profile 34. */ + { 376, 379 }, /* Profile 35. */ + { 380, 383 }, /* Profile 36. */ + { 376, 379 }, /* Profile 37. */ + { 376, 379 }, /* Profile 38. */ + { 376, 379 }, /* Profile 39. */ + { 380, 383 }, /* Profile 40. */ + { 376, 379 }, /* Profile 41. */ + { 376, 379 }, /* Profile 42. */ + { 372, 375 }, /* Profile 43. */ + { 376, 379 }, /* Profile 44. */ + { 372, 375 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2540,245 +2381,245 @@ static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_ { 112, 127 }, /* Profile 22. */ { 112, 127 }, /* Profile 23. */ { 112, 127 }, /* Profile 24. */ - { 112, 127 }, /* Profile 25. */ - { 112, 127 }, /* Profile 26. */ - { 112, 127 }, /* Profile 27. */ - { 112, 127 }, /* Profile 28. */ - { 112, 127 }, /* Profile 29. */ - { 112, 127 }, /* Profile 30. */ - { 112, 127 }, /* Profile 31. */ - { 112, 127 }, /* Profile 32. */ - { 112, 127 }, /* Profile 33. */ - { 112, 127 }, /* Profile 34. */ - { 112, 127 }, /* Profile 35. */ - { 112, 127 }, /* Profile 36. */ - { 112, 127 }, /* Profile 37. */ - { 112, 127 }, /* Profile 38. */ - { 112, 127 }, /* Profile 39. */ - { 112, 127 }, /* Profile 40. */ - { 112, 127 }, /* Profile 41. */ - { 112, 127 }, /* Profile 42. */ - { 112, 127 }, /* Profile 43. */ - { 112, 127 }, /* Profile 44. */ - { 112, 127 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 396, 399 }, /* Profile 2. */ - { 408, 411 }, /* Profile 3. */ - { 404, 407 }, /* Profile 4. */ - { 404, 407 }, /* Profile 5. */ - { 396, 399 }, /* Profile 6. */ - { 408, 411 }, /* Profile 7. */ - { 404, 407 }, /* Profile 8. */ - { 404, 407 }, /* Profile 9. */ - { 392, 395 }, /* Profile 10. */ - { 404, 407 }, /* Profile 11. */ - { 400, 403 }, /* Profile 12. */ - { 396, 399 }, /* Profile 13. */ - { 408, 411 }, /* Profile 14. */ - { 404, 407 }, /* Profile 15. */ - { 404, 407 }, /* Profile 16. */ - { 396, 399 }, /* Profile 17. */ - { 408, 411 }, /* Profile 18. */ - { 404, 407 }, /* Profile 19. */ - { 404, 407 }, /* Profile 20. */ - { 392, 395 }, /* Profile 21. */ - { 404, 407 }, /* Profile 22. */ - { 400, 403 }, /* Profile 23. */ - { 396, 399 }, /* Profile 24. */ - { 408, 411 }, /* Profile 25. */ - { 404, 407 }, /* Profile 26. */ - { 404, 407 }, /* Profile 27. */ - { 396, 399 }, /* Profile 28. */ - { 408, 411 }, /* Profile 29. */ - { 404, 407 }, /* Profile 30. */ - { 404, 407 }, /* Profile 31. */ - { 392, 395 }, /* Profile 32. */ - { 404, 407 }, /* Profile 33. */ - { 400, 403 }, /* Profile 34. */ - { 396, 399 }, /* Profile 35. */ - { 408, 411 }, /* Profile 36. */ - { 404, 407 }, /* Profile 37. */ - { 404, 407 }, /* Profile 38. */ - { 396, 399 }, /* Profile 39. */ - { 408, 411 }, /* Profile 40. */ - { 404, 407 }, /* Profile 41. */ - { 404, 407 }, /* Profile 42. */ - { 392, 395 }, /* Profile 43. */ - { 404, 407 }, /* Profile 44. */ - { 400, 403 }, /* Profile 45. */ + { 112, 127 }, /* Profile 25. */ + { 112, 127 }, /* Profile 26. */ + { 112, 127 }, /* Profile 27. */ + { 112, 127 }, /* Profile 28. */ + { 112, 127 }, /* Profile 29. */ + { 112, 127 }, /* Profile 30. */ + { 112, 127 }, /* Profile 31. */ + { 112, 127 }, /* Profile 32. */ + { 112, 127 }, /* Profile 33. */ + { 112, 127 }, /* Profile 34. */ + { 112, 127 }, /* Profile 35. */ + { 112, 127 }, /* Profile 36. */ + { 112, 127 }, /* Profile 37. */ + { 112, 127 }, /* Profile 38. */ + { 112, 127 }, /* Profile 39. */ + { 112, 127 }, /* Profile 40. */ + { 112, 127 }, /* Profile 41. */ + { 112, 127 }, /* Profile 42. */ + { 112, 127 }, /* Profile 43. */ + { 112, 127 }, /* Profile 44. */ + { 112, 127 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 392, 395 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 388, 391 }, /* Profile 9. */ + { 388, 391 }, /* Profile 10. */ + { 388, 391 }, /* Profile 11. */ + { 384, 387 }, /* Profile 12. */ + { 392, 395 }, /* Profile 13. */ + { 392, 395 }, /* Profile 14. */ + { 388, 391 }, /* Profile 15. */ + { 388, 391 }, /* Profile 16. */ + { 392, 395 }, /* Profile 17. */ + { 392, 395 }, /* Profile 18. */ + { 388, 391 }, /* Profile 19. */ + { 388, 391 }, /* Profile 20. */ + { 388, 391 }, /* Profile 21. */ + { 388, 391 }, /* Profile 22. */ + { 384, 387 }, /* Profile 23. */ + { 392, 395 }, /* Profile 24. */ + { 392, 395 }, /* Profile 25. */ + { 388, 391 }, /* Profile 26. */ + { 388, 391 }, /* Profile 27. */ + { 392, 395 }, /* Profile 28. */ + { 392, 395 }, /* Profile 29. */ + { 388, 391 }, /* Profile 30. */ + { 388, 391 }, /* Profile 31. */ + { 388, 391 }, /* Profile 32. */ + { 388, 391 }, /* Profile 33. */ + { 384, 387 }, /* Profile 34. */ + { 392, 395 }, /* Profile 35. */ + { 392, 395 }, /* Profile 36. */ + { 388, 391 }, /* Profile 37. */ + { 388, 391 }, /* Profile 38. */ + { 392, 395 }, /* Profile 39. */ + { 392, 395 }, /* Profile 40. */ + { 388, 391 }, /* Profile 41. */ + { 388, 391 }, /* Profile 42. */ + { 388, 391 }, /* Profile 43. */ + { 388, 391 }, /* Profile 44. */ + { 384, 387 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 96, 111 }, /* Profile 2. */ - { 96, 111 }, /* Profile 3. */ - { 96, 111 }, /* Profile 4. */ - { 96, 111 }, /* Profile 5. */ - { 96, 111 }, /* Profile 6. */ - { 96, 111 }, /* Profile 7. */ - { 96, 111 }, /* Profile 8. */ - { 96, 111 }, /* Profile 9. */ - { 96, 111 }, /* Profile 10. */ - { 96, 111 }, /* Profile 11. */ - { 96, 111 }, /* Profile 12. */ - { 96, 111 }, /* Profile 13. */ - { 96, 111 }, /* Profile 14. */ - { 96, 111 }, /* Profile 15. */ - { 96, 111 }, /* Profile 16. */ - { 96, 111 }, /* Profile 17. */ - { 96, 111 }, /* Profile 18. */ - { 96, 111 }, /* Profile 19. */ - { 96, 111 }, /* Profile 20. */ - { 96, 111 }, /* Profile 21. */ - { 96, 111 }, /* Profile 22. */ - { 96, 111 }, /* Profile 23. */ - { 96, 111 }, /* Profile 24. */ - { 96, 111 }, /* Profile 25. */ - { 96, 111 }, /* Profile 26. */ - { 96, 111 }, /* Profile 27. */ - { 96, 111 }, /* Profile 28. */ - { 96, 111 }, /* Profile 29. */ - { 96, 111 }, /* Profile 30. */ - { 96, 111 }, /* Profile 31. */ - { 96, 111 }, /* Profile 32. */ - { 96, 111 }, /* Profile 33. */ - { 96, 111 }, /* Profile 34. */ - { 96, 111 }, /* Profile 35. */ - { 96, 111 }, /* Profile 36. */ - { 96, 111 }, /* Profile 37. */ - { 96, 111 }, /* Profile 38. */ - { 96, 111 }, /* Profile 39. */ - { 96, 111 }, /* Profile 40. */ - { 96, 111 }, /* Profile 41. */ - { 96, 111 }, /* Profile 42. */ - { 96, 111 }, /* Profile 43. */ - { 96, 111 }, /* Profile 44. */ - { 96, 111 }, /* Profile 45. */ + { 176, 191 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { 176, 191 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ + { 176, 191 }, /* Profile 8. */ + { 176, 191 }, /* Profile 9. */ + { 176, 191 }, /* Profile 10. */ + { 176, 191 }, /* Profile 11. */ + { 176, 191 }, /* Profile 12. */ + { 176, 191 }, /* Profile 13. */ + { 176, 191 }, /* Profile 14. */ + { 176, 191 }, /* Profile 15. */ + { 176, 191 }, /* Profile 16. */ + { 176, 191 }, /* Profile 17. */ + { 176, 191 }, /* Profile 18. */ + { 176, 191 }, /* Profile 19. */ + { 176, 191 }, /* Profile 20. */ + { 176, 191 }, /* Profile 21. */ + { 176, 191 }, /* Profile 22. */ + { 176, 191 }, /* Profile 23. */ + { 192, 207 }, /* Profile 24. */ + { 192, 207 }, /* Profile 25. */ + { 192, 207 }, /* Profile 26. */ + { 192, 207 }, /* Profile 27. */ + { 192, 207 }, /* Profile 28. */ + { 192, 207 }, /* Profile 29. */ + { 192, 207 }, /* Profile 30. */ + { 192, 207 }, /* Profile 31. */ + { 192, 207 }, /* Profile 32. */ + { 192, 207 }, /* Profile 33. */ + { 192, 207 }, /* Profile 34. */ + { 192, 207 }, /* Profile 35. */ + { 192, 207 }, /* Profile 36. */ + { 192, 207 }, /* Profile 37. */ + { 192, 207 }, /* Profile 38. */ + { 192, 207 }, /* Profile 39. */ + { 192, 207 }, /* Profile 40. */ + { 192, 207 }, /* Profile 41. */ + { 192, 207 }, /* Profile 42. */ + { 192, 207 }, /* Profile 43. */ + { 192, 207 }, /* Profile 44. */ + { 192, 207 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ { -1, -1 }, /* Profile 2. */ { -1, -1 }, /* Profile 3. */ - { 420, 423 }, /* Profile 4. */ - { 420, 423 }, /* Profile 5. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ { -1, -1 }, /* Profile 6. */ { -1, -1 }, /* Profile 7. */ - { 420, 423 }, /* Profile 8. */ - { 420, 423 }, /* Profile 9. */ + { 408, 411 }, /* Profile 8. */ + { 408, 411 }, /* Profile 9. */ { -1, -1 }, /* Profile 10. */ { -1, -1 }, /* Profile 11. */ - { 416, 419 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { 420, 423 }, /* Profile 15. */ - { 420, 423 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { 420, 423 }, /* Profile 19. */ - { 420, 423 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ - { 416, 419 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { 420, 423 }, /* Profile 26. */ - { 420, 423 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { 420, 423 }, /* Profile 30. */ - { 420, 423 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { 416, 419 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { 420, 423 }, /* Profile 37. */ - { 420, 423 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { 420, 423 }, /* Profile 41. */ - { 420, 423 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { -1, -1 }, /* Profile 44. */ - { 416, 419 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 388, 391 }, /* Profile 2. */ - { 400, 403 }, /* Profile 3. */ - { 396, 399 }, /* Profile 4. */ - { 396, 399 }, /* Profile 5. */ - { 388, 391 }, /* Profile 6. */ - { 400, 403 }, /* Profile 7. */ - { 396, 399 }, /* Profile 8. */ - { 396, 399 }, /* Profile 9. */ - { 384, 387 }, /* Profile 10. */ - { 396, 399 }, /* Profile 11. */ - { 392, 395 }, /* Profile 12. */ - { 388, 391 }, /* Profile 13. */ - { 400, 403 }, /* Profile 14. */ - { 396, 399 }, /* Profile 15. */ - { 396, 399 }, /* Profile 16. */ - { 388, 391 }, /* Profile 17. */ - { 400, 403 }, /* Profile 18. */ - { 396, 399 }, /* Profile 19. */ - { 396, 399 }, /* Profile 20. */ - { 384, 387 }, /* Profile 21. */ - { 396, 399 }, /* Profile 22. */ - { 392, 395 }, /* Profile 23. */ - { 388, 391 }, /* Profile 24. */ - { 400, 403 }, /* Profile 25. */ - { 396, 399 }, /* Profile 26. */ - { 396, 399 }, /* Profile 27. */ - { 388, 391 }, /* Profile 28. */ - { 400, 403 }, /* Profile 29. */ - { 396, 399 }, /* Profile 30. */ - { 396, 399 }, /* Profile 31. */ - { 384, 387 }, /* Profile 32. */ - { 396, 399 }, /* Profile 33. */ - { 392, 395 }, /* Profile 34. */ - { 388, 391 }, /* Profile 35. */ - { 400, 403 }, /* Profile 36. */ - { 396, 399 }, /* Profile 37. */ - { 396, 399 }, /* Profile 38. */ - { 388, 391 }, /* Profile 39. */ - { 400, 403 }, /* Profile 40. */ - { 396, 399 }, /* Profile 41. */ - { 396, 399 }, /* Profile 42. */ - { 384, 387 }, /* Profile 43. */ - { 396, 399 }, /* Profile 44. */ - { 392, 395 }, /* Profile 45. */ + { 404, 407 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 408, 411 }, /* Profile 15. */ + { 408, 411 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 408, 411 }, /* Profile 19. */ + { 408, 411 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { 404, 407 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { 408, 411 }, /* Profile 26. */ + { 408, 411 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { 408, 411 }, /* Profile 30. */ + { 408, 411 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { 404, 407 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { 408, 411 }, /* Profile 37. */ + { 408, 411 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { 408, 411 }, /* Profile 41. */ + { 408, 411 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { 404, 407 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + { 408, 411 }, /* Profile 6. */ + { 408, 411 }, /* Profile 7. */ + { 404, 407 }, /* Profile 8. */ + { 404, 407 }, /* Profile 9. */ + { 404, 407 }, /* Profile 10. */ + { 404, 407 }, /* Profile 11. */ + { 400, 403 }, /* Profile 12. */ + { 408, 411 }, /* Profile 13. */ + { 408, 411 }, /* Profile 14. */ + { 404, 407 }, /* Profile 15. */ + { 404, 407 }, /* Profile 16. */ + { 408, 411 }, /* Profile 17. */ + { 408, 411 }, /* Profile 18. */ + { 404, 407 }, /* Profile 19. */ + { 404, 407 }, /* Profile 20. */ + { 404, 407 }, /* Profile 21. */ + { 404, 407 }, /* Profile 22. */ + { 400, 403 }, /* Profile 23. */ + { 408, 411 }, /* Profile 24. */ + { 408, 411 }, /* Profile 25. */ + { 404, 407 }, /* Profile 26. */ + { 404, 407 }, /* Profile 27. */ + { 408, 411 }, /* Profile 28. */ + { 408, 411 }, /* Profile 29. */ + { 404, 407 }, /* Profile 30. */ + { 404, 407 }, /* Profile 31. */ + { 404, 407 }, /* Profile 32. */ + { 404, 407 }, /* Profile 33. */ + { 400, 403 }, /* Profile 34. */ + { 408, 411 }, /* Profile 35. */ + { 408, 411 }, /* Profile 36. */ + { 404, 407 }, /* Profile 37. */ + { 404, 407 }, /* Profile 38. */ + { 408, 411 }, /* Profile 39. */ + { 408, 411 }, /* Profile 40. */ + { 404, 407 }, /* Profile 41. */ + { 404, 407 }, /* Profile 42. */ + { 404, 407 }, /* Profile 43. */ + { 404, 407 }, /* Profile 44. */ + { 400, 403 }, /* Profile 45. */ }, .profile_cnt = 46, }, { .name = "VFI_15_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VFI_15_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_VFI_15_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ @@ -2831,71 +2672,76 @@ static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_ }, { .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", - .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, .profile = { { -1, -1 }, /* Profile 0. */ { -1, -1 }, /* Profile 1. */ - { 360, 363 }, /* Profile 2. */ + { 372, 375 }, /* Profile 2. */ { 376, 379 }, /* Profile 3. */ { 372, 375 }, /* Profile 4. */ { 372, 375 }, /* Profile 5. */ - { 360, 363 }, /* Profile 6. */ + { 372, 375 }, /* Profile 6. */ { 376, 379 }, /* Profile 7. */ { 372, 375 }, /* Profile 8. */ { 372, 375 }, /* Profile 9. */ - { 360, 363 }, /* Profile 10. */ - { 376, 379 }, /* Profile 11. */ - { 372, 375 }, /* Profile 12. */ - { 360, 363 }, /* Profile 13. */ + { 368, 371 }, /* Profile 10. */ + { 372, 375 }, /* Profile 11. */ + { 368, 371 }, /* Profile 12. */ + { 372, 375 }, /* Profile 13. */ { 376, 379 }, /* Profile 14. */ { 372, 375 }, /* Profile 15. */ { 372, 375 }, /* Profile 16. */ - { 360, 363 }, /* Profile 17. */ + { 372, 375 }, /* Profile 17. */ { 376, 379 }, /* Profile 18. */ { 372, 375 }, /* Profile 19. */ { 372, 375 }, /* Profile 20. */ - { 360, 363 }, /* Profile 21. */ - { 376, 379 }, /* Profile 22. */ - { 372, 375 }, /* Profile 23. */ - { 360, 363 }, /* Profile 24. */ + { 368, 371 }, /* Profile 21. */ + { 372, 375 }, /* Profile 22. */ + { 368, 371 }, /* Profile 23. */ + { 372, 375 }, /* Profile 24. */ { 376, 379 }, /* Profile 25. */ { 372, 375 }, /* Profile 26. */ { 372, 375 }, /* Profile 27. */ - { 360, 363 }, /* Profile 28. */ + { 372, 375 }, /* Profile 28. */ { 376, 379 }, /* Profile 29. */ { 372, 375 }, /* Profile 30. */ { 372, 375 }, /* Profile 31. */ - { 360, 363 }, /* Profile 32. */ - { 376, 379 }, /* Profile 33. */ - { 372, 375 }, /* Profile 34. */ - { 360, 363 }, /* Profile 35. */ + { 368, 371 }, /* Profile 32. */ + { 372, 375 }, /* Profile 33. */ + { 368, 371 }, /* Profile 34. */ + { 372, 375 }, /* Profile 35. */ { 376, 379 }, /* Profile 36. */ { 372, 375 }, /* Profile 37. */ { 372, 375 }, /* Profile 38. */ - { 360, 363 }, /* Profile 39. */ + { 372, 375 }, /* Profile 39. */ { 376, 379 }, /* Profile 40. */ { 372, 375 }, /* Profile 41. */ { 372, 375 }, /* Profile 42. */ - { 360, 363 }, /* Profile 43. */ - { 376, 379 }, /* Profile 44. */ - { 372, 375 }, /* Profile 45. */ + { 368, 371 }, /* Profile 43. */ + { 372, 375 }, /* Profile 44. */ + { 368, 371 }, /* Profile 45. */ }, .profile_cnt = 46, }, -};static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_data, +}; +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 2, + .profile_bmp[0] = 0xfffffffc, + .profile_bmp[1] = 0x3fff, + }; -static shr_enum_map_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_names[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +static shr_enum_map_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reason_names[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT }; -static bcmpkt_flex_reasons_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reasons_info = { - .num_reasons = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_names, - .reason_encode = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_encode, - .reason_decode = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_decode, +static bcmpkt_flex_reasons_info_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reason_names, + .reason_encode = bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reason_encode, + .reason_decode = bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reason_decode, }; @@ -3038,7 +2884,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_arp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_arp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_get, bcmpkt_arp_t_hardware_type_get, bcmpkt_arp_t_operation_get, @@ -3050,7 +2896,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_arp_t_fget[BCM56690_A0_DNA_6_ bcmpkt_arp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_arp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_arp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FID_COUNT] = { bcmpkt_arp_t_hardware_len_set, bcmpkt_arp_t_hardware_type_set, bcmpkt_arp_t_operation_set, @@ -3062,13 +2908,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_arp_t_fset[BCM56690_A0_DNA_6_ bcmpkt_arp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_arp_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_arp_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_arp_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_arp_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_arp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_arp_t_field_data, }; @@ -3165,7 +3011,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_authen_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_authen_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_get, bcmpkt_authen_t_next_header_get, bcmpkt_authen_t_payload_len_get, @@ -3174,7 +3020,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_authen_t_fget[BCM56690_A0_DNA bcmpkt_authen_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_authen_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_authen_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FID_COUNT] = { bcmpkt_authen_t_data_set, bcmpkt_authen_t_next_header_set, bcmpkt_authen_t_payload_len_set, @@ -3183,13 +3029,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_authen_t_fset[BCM56690_A0_DNA bcmpkt_authen_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_authen_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_authen_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_authen_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_authen_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_authen_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_authen_t_field_data, }; @@ -3438,7 +3284,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_bfd_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_bfd_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_get, bcmpkt_bfd_t_bfd_length_get, bcmpkt_bfd_t_cpi_get, @@ -3457,7 +3303,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_bfd_t_fget[BCM56690_A0_DNA_6_ bcmpkt_bfd_t_version_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_bfd_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_bfd_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FID_COUNT] = { bcmpkt_bfd_t_ap_set, bcmpkt_bfd_t_bfd_length_set, bcmpkt_bfd_t_cpi_set, @@ -3476,13 +3322,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_bfd_t_fset[BCM56690_A0_DNA_6_ bcmpkt_bfd_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_bfd_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_bfd_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_bfd_t_field_data, }; @@ -3516,23 +3362,23 @@ static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_cntag_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_cntag_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_get, bcmpkt_cntag_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_cntag_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_cntag_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FID_COUNT] = { bcmpkt_cntag_t_rpid_set, bcmpkt_cntag_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_cntag_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_cntag_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_cntag_t_field_data, }; @@ -3648,7 +3494,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_get, bcmpkt_cpu_composites_0_t_dma_cont1_get, bcmpkt_cpu_composites_0_t_dma_cont2_get, @@ -3658,7 +3504,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fget[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { bcmpkt_cpu_composites_0_t_dma_cont0_set, bcmpkt_cpu_composites_0_t_dma_cont1_set, bcmpkt_cpu_composites_0_t_dma_cont2_set, @@ -3668,13 +3514,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fset[BCM56 bcmpkt_cpu_composites_0_t_dma_cont6_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_field_data, }; @@ -3734,161 +3580,296 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int prof return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; - ret = SHR_E_PARAM; +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_field_data, +}; - return ret; -} -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_dcn_t_flags_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; + *val = WORD_FIELD_GET(data[0], 24, 8); return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_dcn_t_flags_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; - + WORD_FIELD_SET(data[0], 24, 8, val); return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_dcn_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; + *val = WORD_FIELD_GET(data[1], 0, 8); return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_dcn_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; - + WORD_FIELD_SET(data[1], 0, 8, val); return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_dcn_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; + *val = WORD_FIELD_GET(data[0], 16, 8); return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_dcn_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; - + WORD_FIELD_SET(data[0], 16, 8, val); return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_dcn_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; + *val = WORD_FIELD_GET(data[0], 0, 16); return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_dcn_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; - + WORD_FIELD_SET(data[0], 0, 16, val); return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_dcn_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; + *val = WORD_FIELD_GET(data[1], 24, 8); return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_dcn_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; - + WORD_FIELD_SET(data[1], 24, 8, val); return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_dcn_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; + *val = WORD_FIELD_GET(data[1], 16, 8); return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_dcn_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; - + WORD_FIELD_SET(data[1], 16, 8, val); return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_dcn_t_reserved4_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; + *val = WORD_FIELD_GET(data[1], 8, 8); return ret; } -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_dcn_t_reserved4_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; - + WORD_FIELD_SET(data[1], 8, 8, val); return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_get, - bcmpkt_cpu_composites_1_t_dma_cont11_get, - bcmpkt_cpu_composites_1_t_dma_cont12_get, - bcmpkt_cpu_composites_1_t_dma_cont13_get, - bcmpkt_cpu_composites_1_t_dma_cont14_get, - bcmpkt_cpu_composites_1_t_dma_cont15_get, - bcmpkt_cpu_composites_1_t_dma_cont16_get, - bcmpkt_cpu_composites_1_t_dma_cont17_get, - bcmpkt_cpu_composites_1_t_dma_cont7_get, - bcmpkt_cpu_composites_1_t_dma_cont8_get, - bcmpkt_cpu_composites_1_t_dma_cont9_get, +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_dcn_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FID_COUNT] = { + bcmpkt_dcn_t_flags_get, + bcmpkt_dcn_t_next_protocol_get, + bcmpkt_dcn_t_reserved0_get, + bcmpkt_dcn_t_reserved1_get, + bcmpkt_dcn_t_reserved2_get, + bcmpkt_dcn_t_reserved3_get, + bcmpkt_dcn_t_reserved4_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_set, - bcmpkt_cpu_composites_1_t_dma_cont11_set, - bcmpkt_cpu_composites_1_t_dma_cont12_set, - bcmpkt_cpu_composites_1_t_dma_cont13_set, - bcmpkt_cpu_composites_1_t_dma_cont14_set, - bcmpkt_cpu_composites_1_t_dma_cont15_set, - bcmpkt_cpu_composites_1_t_dma_cont16_set, - bcmpkt_cpu_composites_1_t_dma_cont17_set, - bcmpkt_cpu_composites_1_t_dma_cont7_set, - bcmpkt_cpu_composites_1_t_dma_cont8_set, - bcmpkt_cpu_composites_1_t_dma_cont9_set, +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_dcn_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FID_COUNT] = { + bcmpkt_dcn_t_flags_set, + bcmpkt_dcn_t_next_protocol_set, + bcmpkt_dcn_t_reserved0_set, + bcmpkt_dcn_t_reserved1_set, + bcmpkt_dcn_t_reserved2_set, + bcmpkt_dcn_t_reserved3_set, + bcmpkt_dcn_t_reserved4_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_dcn_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_dcn_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_dcn_t_field_data, }; @@ -3938,25 +3919,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_dest_option_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_get, bcmpkt_dest_option_t_next_header_get, bcmpkt_dest_option_t_option_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_dest_option_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { bcmpkt_dest_option_t_hdr_ext_len_set, bcmpkt_dest_option_t_next_header_set, bcmpkt_dest_option_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_dest_option_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_dest_option_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_dest_option_t_field_data, }; @@ -4142,7 +4123,7 @@ static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_get, bcmpkt_ep_nih_header_t_header_type_get, bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, @@ -4157,7 +4138,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fget[BCM56690 bcmpkt_ep_nih_header_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { bcmpkt_ep_nih_header_t_header_subtype_set, bcmpkt_ep_nih_header_t_header_type_set, bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, @@ -4172,13 +4153,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fset[BCM56690 bcmpkt_ep_nih_header_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_field_data, }; @@ -4318,7 +4299,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_get, bcmpkt_erspan3_fixed_hdr_t_cos_get, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, @@ -4330,7 +4311,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fget[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { bcmpkt_erspan3_fixed_hdr_t_bso_set, bcmpkt_erspan3_fixed_hdr_t_cos_set, bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, @@ -4342,13 +4323,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fset[BCM5 bcmpkt_erspan3_fixed_hdr_t_vlan_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_field_data, }; @@ -4413,27 +4394,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_get, bcmpkt_erspan3_subhdr_5_t_port_id_get, bcmpkt_erspan3_subhdr_5_t_switch_id_get, bcmpkt_erspan3_subhdr_5_t_timestamp_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { bcmpkt_erspan3_subhdr_5_t_platform_id_set, bcmpkt_erspan3_subhdr_5_t_port_id_set, bcmpkt_erspan3_subhdr_5_t_switch_id_set, bcmpkt_erspan3_subhdr_5_t_timestamp_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_field_data, }; @@ -4514,7 +4495,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_esp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_esp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_get, bcmpkt_esp_t_pad_get, bcmpkt_esp_t_pad_len_get, @@ -4522,7 +4503,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_esp_t_fget[BCM56690_A0_DNA_6_ bcmpkt_esp_t_spi_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_esp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_esp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FID_COUNT] = { bcmpkt_esp_t_next_header_set, bcmpkt_esp_t_pad_set, bcmpkt_esp_t_pad_len_set, @@ -4530,13 +4511,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_esp_t_fset[BCM56690_A0_DNA_6_ bcmpkt_esp_t_spi_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_esp_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_esp_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_esp_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_esp_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_esp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_esp_t_field_data, }; @@ -4555,21 +4536,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ethertype_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ethertype_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { bcmpkt_ethertype_t_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ethertype_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ethertype_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_ethertype_t_field_data, }; @@ -4634,27 +4615,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_frag_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_frag_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_get, bcmpkt_frag_t_id_get, bcmpkt_frag_t_next_header_get, bcmpkt_frag_t_reserved_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_frag_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_frag_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FID_COUNT] = { bcmpkt_frag_t_frag_info_set, bcmpkt_frag_t_id_set, bcmpkt_frag_t_next_header_set, bcmpkt_frag_t_reserved_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_frag_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_frag_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_frag_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_frag_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_frag_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_frag_t_field_data, }; @@ -4748,7 +4729,7 @@ static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { bcmpkt_gbp_ethernet_shim_t_ethertype_get, bcmpkt_gbp_ethernet_shim_t_flags_get, bcmpkt_gbp_ethernet_shim_t_reserved_get, @@ -4757,7 +4738,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fget[BCM5 bcmpkt_gbp_ethernet_shim_t_ver_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { bcmpkt_gbp_ethernet_shim_t_ethertype_set, bcmpkt_gbp_ethernet_shim_t_flags_set, bcmpkt_gbp_ethernet_shim_t_reserved_set, @@ -4766,13 +4747,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fset[BCM5 bcmpkt_gbp_ethernet_shim_t_ver_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_field_data, }; @@ -5001,7 +4982,7 @@ static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_get, bcmpkt_generic_loopback_t_destination_type_get, bcmpkt_generic_loopback_t_entropy_obj_get, @@ -5019,7 +5000,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fget[BCM56 bcmpkt_generic_loopback_t_start_byte_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { bcmpkt_generic_loopback_t_destination_obj_set, bcmpkt_generic_loopback_t_destination_type_set, bcmpkt_generic_loopback_t_entropy_obj_set, @@ -5037,13 +5018,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fset[BCM56 bcmpkt_generic_loopback_t_start_byte_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_field_data, }; @@ -5122,7 +5103,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gpe_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gpe_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_get, bcmpkt_gpe_t_next_protocol_get, bcmpkt_gpe_t_reserved0_get, @@ -5130,7 +5111,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gpe_t_fget[BCM56690_A0_DNA_6_ bcmpkt_gpe_t_vni_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gpe_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gpe_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FID_COUNT] = { bcmpkt_gpe_t_flags_set, bcmpkt_gpe_t_next_protocol_set, bcmpkt_gpe_t_reserved0_set, @@ -5138,13 +5119,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gpe_t_fset[BCM56690_A0_DNA_6_ bcmpkt_gpe_t_vni_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gpe_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gpe_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_gpe_t_field_data, }; @@ -5178,23 +5159,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_get, bcmpkt_gre_chksum_t_offset_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { bcmpkt_gre_chksum_t_checksum_set, bcmpkt_gre_chksum_t_offset_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_field_data, }; @@ -5214,21 +5195,21 @@ static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gre_key_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gre_key_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { bcmpkt_gre_key_t_key_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gre_key_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gre_key_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_gre_key_t_field_data, }; @@ -5248,21 +5229,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { bcmpkt_gre_rout_t_routing_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_field_data, }; @@ -5282,21 +5263,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { bcmpkt_gre_seq_t_sequence_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_field_data, }; @@ -5360,27 +5341,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gre_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_get, bcmpkt_gre_t_protocol_get, bcmpkt_gre_t_reserved_get, bcmpkt_gre_t_version_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gre_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FID_COUNT] = { bcmpkt_gre_t_c_r_k_s_set, bcmpkt_gre_t_protocol_set, bcmpkt_gre_t_reserved_set, bcmpkt_gre_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gre_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_gre_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gre_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_gre_t_field_data, }; @@ -5579,7 +5560,7 @@ static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { bcmpkt_hg3_base_t_cn_get, bcmpkt_hg3_base_t_cng_get, bcmpkt_hg3_base_t_entropy_get, @@ -5595,7 +5576,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fget[BCM56690_A0_D bcmpkt_hg3_base_t_version_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { bcmpkt_hg3_base_t_cn_set, bcmpkt_hg3_base_t_cng_set, bcmpkt_hg3_base_t_entropy_set, @@ -5611,13 +5592,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fset[BCM56690_A0_D bcmpkt_hg3_base_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_field_data, }; @@ -5711,7 +5692,7 @@ static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { bcmpkt_hg3_extension_0_t_class_id_lsb_get, bcmpkt_hg3_extension_0_t_class_id_msb_get, bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, @@ -5720,7 +5701,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fget[BCM566 bcmpkt_hg3_extension_0_t_svp_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { bcmpkt_hg3_extension_0_t_class_id_lsb_set, bcmpkt_hg3_extension_0_t_class_id_msb_set, bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, @@ -5729,13 +5710,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fset[BCM566 bcmpkt_hg3_extension_0_t_svp_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_field_data, }; @@ -5785,25 +5766,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_get, bcmpkt_hop_by_hop_t_next_header_get, bcmpkt_hop_by_hop_t_option_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { bcmpkt_hop_by_hop_t_hdr_ext_len_set, bcmpkt_hop_by_hop_t_next_header_set, bcmpkt_hop_by_hop_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_field_data, }; @@ -5852,503 +5833,388 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_icmp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_icmp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_get, bcmpkt_icmp_t_code_get, bcmpkt_icmp_t_icmp_type_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_icmp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_icmp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FID_COUNT] = { bcmpkt_icmp_t_checksum_set, bcmpkt_icmp_t_code_set, bcmpkt_icmp_t_icmp_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_icmp_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_icmp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_icmp_t_field_data, }; -static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 8, 24); + *val = WORD_FIELD_GET(data[0], 8, 8); return ret; } -static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 8, 24, val); + WORD_FIELD_SET(data[0], 8, 8, val); return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, - bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, - bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_data, -}; - - -static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 26, 2); + *val = WORD_FIELD_GET(data[0], 24, 4); return ret; } -static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 26, 2, val); + WORD_FIELD_SET(data[0], 24, 4, val); return ret; } -static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 28, 4); + *val = WORD_FIELD_GET(data[0], 0, 8); return ret; } -static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 28, 4, val); + WORD_FIELD_SET(data[0], 0, 8, val); return ret; } -static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 20, 6); + *val = WORD_FIELD_GET(data[0], 16, 8); return ret; } -static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 20, 6, val); + WORD_FIELD_SET(data[0], 16, 8, val); return ret; } -static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 0, 20); + *val = WORD_FIELD_GET(data[0], 28, 4); return ret; } -static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 0, 20, val); + WORD_FIELD_SET(data[0], 28, 4, val); return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_0_b_t_cn_get, - bcmpkt_ifa_flex_md_0_b_t_port_speed_get, - bcmpkt_ifa_flex_md_0_b_t_queue_id_get, - bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_0_b_t_cn_set, - bcmpkt_ifa_flex_md_0_b_t_port_speed_set, - bcmpkt_ifa_flex_md_0_b_t_queue_id_set, - bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_field_data, }; -static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 0, 16); + *val = WORD_FIELD_GET(data[1], 26, 2); return ret; } -static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 0, 16, val); + WORD_FIELD_SET(data[1], 26, 2, val); return ret; } -static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; + *val = WORD_FIELD_GET(data[0], 0, 8); return ret; } -static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; - + WORD_FIELD_SET(data[0], 0, 8, val); return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_1_t_egress_port_id_get, - bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, - bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_1_t_egress_port_id_set, - bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, - bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_data, -}; - - -static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; + *val = WORD_FIELD_GET(data[0], 8, 24); return ret; } -static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; - + WORD_FIELD_SET(data[0], 8, 24, val); return ret; } -static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; + *val = WORD_FIELD_GET(data[1], 28, 4); return ret; } -static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; - + WORD_FIELD_SET(data[1], 28, 4, val); return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, - bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, - bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_data, -}; - - -static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; + *val = WORD_FIELD_GET(data[1], 20, 6); return ret; } -static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; - + WORD_FIELD_SET(data[1], 20, 6, val); return ret; } -static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; + *val = WORD_FIELD_GET(data[1], 0, 20); return ret; } -static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - ret = SHR_E_PARAM; - + WORD_FIELD_SET(data[1], 0, 20, val); return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, - bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { + bcmpkt_ifa_metadata_a_t_cn_get, + bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_metadata_a_t_lns_device_id_get, + bcmpkt_ifa_metadata_a_t_port_speed_get, + bcmpkt_ifa_metadata_a_t_queue_id_get, + bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, - bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { + bcmpkt_ifa_metadata_a_t_cn_set, + bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_metadata_a_t_lns_device_id_set, + bcmpkt_ifa_metadata_a_t_port_speed_set, + bcmpkt_ifa_metadata_a_t_queue_id_set, + bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_field_data, }; -static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 8, 8); + *val = WORD_FIELD_GET(data[0], 16, 16); return ret; } -static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 8, 8, val); + WORD_FIELD_SET(data[0], 16, 16, val); return ret; } -static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 24, 4); + *val = WORD_FIELD_GET(data[0], 0, 16); return ret; } -static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 24, 4, val); + WORD_FIELD_SET(data[0], 0, 16, val); return ret; } -static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; + ret = SHR_E_PARAM; - WORD_FIELD_SET(data[0], 0, 8, val); return ret; } -static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; + ret = SHR_E_PARAM; - WORD_FIELD_SET(data[0], 16, 8, val); return ret; } -static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 28, 4); + ret = SHR_E_PARAM; return ret; } -static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 28, 4, val); + ret = SHR_E_PARAM; + return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_get, - bcmpkt_ifa_header_t_gns_get, - bcmpkt_ifa_header_t_max_length_get, - bcmpkt_ifa_header_t_next_hdr_get, - bcmpkt_ifa_header_t_ver_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_set, - bcmpkt_ifa_header_t_gns_set, - bcmpkt_ifa_header_t_max_length_set, - bcmpkt_ifa_header_t_next_hdr_set, - bcmpkt_ifa_header_t_ver_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_data, -}; - - -static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 16, 8); + ret = SHR_E_PARAM; return ret; } -static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 16, 8, val); + ret = SHR_E_PARAM; + return ret; } -static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 0, 16); + ret = SHR_E_PARAM; return ret; } -static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 0, 16, val); + ret = SHR_E_PARAM; + return ret; } -static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; - *val = WORD_FIELD_GET(data[0], 24, 8); + ret = SHR_E_PARAM; return ret; } -static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[0], 24, 8, val); + ret = SHR_E_PARAM; + return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { - bcmpkt_ifa_md_base_t_action_vector_get, - bcmpkt_ifa_md_base_t_hop_limit_current_length_get, - bcmpkt_ifa_md_base_t_request_vector_get, +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { + bcmpkt_ifa_metadata_b_t_egress_port_id_get, + bcmpkt_ifa_metadata_b_t_ingress_port_id_get, + bcmpkt_ifa_metadata_b_t_mmu_stat_0_get, + bcmpkt_ifa_metadata_b_t_mmu_stat_1_get, + bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get, + bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get, + bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { - bcmpkt_ifa_md_base_t_action_vector_set, - bcmpkt_ifa_md_base_t_hop_limit_current_length_set, - bcmpkt_ifa_md_base_t_request_vector_set, +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { + bcmpkt_ifa_metadata_b_t_egress_port_id_set, + bcmpkt_ifa_metadata_b_t_ingress_port_id_set, + bcmpkt_ifa_metadata_b_t_mmu_stat_0_set, + bcmpkt_ifa_metadata_b_t_mmu_stat_1_set, + bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set, + bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set, + bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_field_data, }; -static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; *val = WORD_FIELD_GET(data[0], 16, 8); @@ -6356,14 +6222,14 @@ static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profi return ret; } -static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; WORD_FIELD_SET(data[0], 16, 8, val); return ret; } -static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; *val = WORD_FIELD_GET(data[0], 0, 16); @@ -6371,30 +6237,14 @@ static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data return ret; } -static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; WORD_FIELD_SET(data[0], 0, 16, val); return ret; } -static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { +static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { int32_t ret = SHR_E_NONE; *val = WORD_FIELD_GET(data[0], 24, 8); @@ -6402,34 +6252,32 @@ static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int prof return ret; } -static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; WORD_FIELD_SET(data[0], 24, 8, val); return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = { - bcmpkt_ifa_metadata_t_action_vector_get, - bcmpkt_ifa_metadata_t_hop_limit_current_length_get, - bcmpkt_ifa_metadata_t_metadata_get, - bcmpkt_ifa_metadata_t_request_vector_get, +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { + bcmpkt_ifa_metadata_base_t_action_vector_get, + bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_base_t_request_vector_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = { - bcmpkt_ifa_metadata_t_action_vector_set, - bcmpkt_ifa_metadata_t_hop_limit_current_length_set, - bcmpkt_ifa_metadata_t_metadata_set, - bcmpkt_ifa_metadata_t_request_vector_set, +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { + bcmpkt_ifa_metadata_base_t_action_vector_set, + bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_base_t_request_vector_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_field_data, }; @@ -6494,27 +6342,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_igmp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_igmp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_get, bcmpkt_igmp_t_group_address_get, bcmpkt_igmp_t_igmp_type_get, bcmpkt_igmp_t_max_resp_time_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_igmp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_igmp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FID_COUNT] = { bcmpkt_igmp_t_checksum_set, bcmpkt_igmp_t_group_address_set, bcmpkt_igmp_t_igmp_type_set, bcmpkt_igmp_t_max_resp_time_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_igmp_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_igmp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_igmp_t_field_data, }; @@ -6624,7 +6472,7 @@ static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { bcmpkt_ioam_e2e_t_ioam_e2e_data_get, bcmpkt_ioam_e2e_t_ioam_e2e_type_get, bcmpkt_ioam_e2e_t_ioam_hdr_len_get, @@ -6634,7 +6482,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fget[BCM56690_A0_D bcmpkt_ioam_e2e_t_type_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { bcmpkt_ioam_e2e_t_ioam_e2e_data_set, bcmpkt_ioam_e2e_t_ioam_e2e_type_set, bcmpkt_ioam_e2e_t_ioam_hdr_len_set, @@ -6644,13 +6492,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fset[BCM56690_A0_D bcmpkt_ioam_e2e_t_type_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_field_data, }; @@ -6732,7 +6580,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ipfix_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_get, bcmpkt_ipfix_t_length_get, bcmpkt_ipfix_t_obs_domain_id_get, @@ -6740,7 +6588,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fget[BCM56690_A0_DNA_ bcmpkt_ipfix_t_version_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ipfix_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FID_COUNT] = { bcmpkt_ipfix_t_export_time_set, bcmpkt_ipfix_t_length_set, bcmpkt_ipfix_t_obs_domain_id_set, @@ -6748,13 +6596,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fset[BCM56690_A0_DNA_ bcmpkt_ipfix_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ipfix_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ipfix_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_ipfix_t_field_data, }; @@ -6926,7 +6774,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ipv4_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_get, bcmpkt_ipv4_t_flags_frag_offset_get, bcmpkt_ipv4_t_hdr_checksum_get, @@ -6940,7 +6788,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fget[BCM56690_A0_DNA_6 bcmpkt_ipv4_t_version_hdr_len_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ipv4_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FID_COUNT] = { bcmpkt_ipv4_t_da_set, bcmpkt_ipv4_t_flags_frag_offset_set, bcmpkt_ipv4_t_hdr_checksum_set, @@ -6954,13 +6802,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fset[BCM56690_A0_DNA_6 bcmpkt_ipv4_t_version_hdr_len_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ipv4_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ipv4_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_ipv4_t_field_data, }; @@ -7086,7 +6934,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ipv6_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_get, bcmpkt_ipv6_t_flow_label_get, bcmpkt_ipv6_t_hop_limit_get, @@ -7097,7 +6945,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fget[BCM56690_A0_DNA_6 bcmpkt_ipv6_t_version_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ipv6_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FID_COUNT] = { bcmpkt_ipv6_t_da_set, bcmpkt_ipv6_t_flow_label_set, bcmpkt_ipv6_t_hop_limit_set, @@ -7108,13 +6956,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fset[BCM56690_A0_DNA_6 bcmpkt_ipv6_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ipv6_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ipv6_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_ipv6_t_field_data, }; @@ -7150,23 +6998,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_l2_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_l2_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_get, bcmpkt_l2_t_macsa_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_l2_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_l2_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FID_COUNT] = { bcmpkt_l2_t_macda_set, bcmpkt_l2_t_macsa_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_l2_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_l2_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_l2_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_l2_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_l2_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_l2_t_field_data, }; @@ -7186,21 +7034,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { bcmpkt_mirror_erspan_sn_t_seq_num_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_field_data, }; @@ -7220,21 +7068,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { bcmpkt_mirror_transport_t_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_field_data, }; @@ -7298,27 +7146,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32 return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_get, bcmpkt_mpls_ach_t_cw_type_get, bcmpkt_mpls_ach_t_reserved_get, bcmpkt_mpls_ach_t_version_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { bcmpkt_mpls_ach_t_channel_type_set, bcmpkt_mpls_ach_t_cw_type_set, bcmpkt_mpls_ach_t_reserved_set, bcmpkt_mpls_ach_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_field_data, }; @@ -7338,21 +7186,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { bcmpkt_mpls_bv_t_value_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_field_data, }; @@ -7401,25 +7249,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_get, bcmpkt_mpls_cw_t_reserved_get, bcmpkt_mpls_cw_t_seq_number_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { bcmpkt_mpls_cw_t_cw_type_set, bcmpkt_mpls_cw_t_reserved_set, bcmpkt_mpls_cw_t_seq_number_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_field_data, }; @@ -7483,27 +7331,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_mpls_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_get, bcmpkt_mpls_t_exp_get, bcmpkt_mpls_t_label_get, bcmpkt_mpls_t_ttl_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_mpls_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FID_COUNT] = { bcmpkt_mpls_t_bos_set, bcmpkt_mpls_t_exp_set, bcmpkt_mpls_t_label_set, bcmpkt_mpls_t_ttl_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_mpls_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_mpls_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_mpls_t_field_data, }; @@ -7720,7 +7568,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_p_1588_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_get, bcmpkt_p_1588_t_correction_get, bcmpkt_p_1588_t_domain_nb_get, @@ -7737,7 +7585,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fget[BCM56690_A0_DNA bcmpkt_p_1588_t_version_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_p_1588_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FID_COUNT] = { bcmpkt_p_1588_t_cntrl_set, bcmpkt_p_1588_t_correction_set, bcmpkt_p_1588_t_domain_nb_set, @@ -7754,13 +7602,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fset[BCM56690_A0_DNA bcmpkt_p_1588_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_p_1588_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_p_1588_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_p_1588_t_field_data, }; @@ -7810,25 +7658,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, bcmpkt_prog_ext_hdr_t_next_header_get, bcmpkt_prog_ext_hdr_t_option_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, bcmpkt_prog_ext_hdr_t_next_header_set, bcmpkt_prog_ext_hdr_t_option_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_field_data, }; @@ -7924,7 +7772,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_get, bcmpkt_psamp_0_t_length_get, bcmpkt_psamp_0_t_next_hop_index_get, @@ -7933,7 +7781,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fget[BCM56690_A0_DN bcmpkt_psamp_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { bcmpkt_psamp_0_t_flowset_set, bcmpkt_psamp_0_t_length_set, bcmpkt_psamp_0_t_next_hop_index_set, @@ -7942,13 +7790,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fset[BCM56690_A0_DN bcmpkt_psamp_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_field_data, }; @@ -8057,7 +7905,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_get, bcmpkt_psamp_1_t_egress_port_get, bcmpkt_psamp_1_t_epoch_get, @@ -8067,7 +7915,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fget[BCM56690_A0_DN bcmpkt_psamp_1_t_variable_flag_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { bcmpkt_psamp_1_t_dlb_id_set, bcmpkt_psamp_1_t_egress_port_set, bcmpkt_psamp_1_t_epoch_set, @@ -8077,13 +7925,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fset[BCM56690_A0_DN bcmpkt_psamp_1_t_variable_flag_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_field_data, }; @@ -8195,7 +8043,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, bcmpkt_psamp_mirror_on_drop_0_t_length_get, @@ -8205,7 +8053,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fget bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, bcmpkt_psamp_mirror_on_drop_0_t_length_set, @@ -8215,13 +8063,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fset bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_field_data, }; @@ -8323,40 +8171,332 @@ static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *d return ret; } -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = { + bcmpkt_psamp_postcard_0_t_egress_mod_port_get, + bcmpkt_psamp_postcard_0_t_ingress_port_get, + bcmpkt_psamp_postcard_0_t_obs_time_ns_get, + bcmpkt_psamp_postcard_0_t_obs_time_s_get, + bcmpkt_psamp_postcard_0_t_psamp_length_get, + bcmpkt_psamp_postcard_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = { + bcmpkt_psamp_postcard_0_t_egress_mod_port_set, + bcmpkt_psamp_postcard_0_t_ingress_port_set, + bcmpkt_psamp_postcard_0_t_obs_time_ns_set, + bcmpkt_psamp_postcard_0_t_obs_time_s_set, + bcmpkt_psamp_postcard_0_t_psamp_length_set, + bcmpkt_psamp_postcard_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_residence_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_residence_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { int32_t ret = SHR_E_NONE; - WORD_FIELD_SET(data[1], 16, 8, val); + WORD_FIELD_SET(data[4], 16, 8, val); return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = { + bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get, + bcmpkt_psamp_postcard_1_t_drop_reason_code_get, + bcmpkt_psamp_postcard_1_t_mmu_stat_0_get, + bcmpkt_psamp_postcard_1_t_mmu_stat_1_get, + bcmpkt_psamp_postcard_1_t_queue_id_get, + bcmpkt_psamp_postcard_1_t_reserved_1_get, + bcmpkt_psamp_postcard_1_t_residence_time_get, + bcmpkt_psamp_postcard_1_t_sampled_length_get, + bcmpkt_psamp_postcard_1_t_var_len_indicator_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = { + bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set, + bcmpkt_psamp_postcard_1_t_drop_reason_code_set, + bcmpkt_psamp_postcard_1_t_mmu_stat_0_set, + bcmpkt_psamp_postcard_1_t_mmu_stat_1_set, + bcmpkt_psamp_postcard_1_t_queue_id_set, + bcmpkt_psamp_postcard_1_t_reserved_1_set, + bcmpkt_psamp_postcard_1_t_residence_time_set, + bcmpkt_psamp_postcard_1_t_sampled_length_set, + bcmpkt_psamp_postcard_1_t_var_len_indicator_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_field_data, }; @@ -8499,7 +8639,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_rarp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_rarp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_get, bcmpkt_rarp_t_hardware_type_get, bcmpkt_rarp_t_operation_get, @@ -8511,7 +8651,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_rarp_t_fget[BCM56690_A0_DNA_6 bcmpkt_rarp_t_target_ip_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_rarp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_rarp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FID_COUNT] = { bcmpkt_rarp_t_hardware_len_set, bcmpkt_rarp_t_hardware_type_set, bcmpkt_rarp_t_operation_set, @@ -8523,13 +8663,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_rarp_t_fset[BCM56690_A0_DNA_6 bcmpkt_rarp_t_target_ip_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_rarp_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_rarp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_rarp_t_field_data, }; @@ -8609,7 +8749,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_routing_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_routing_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_get, bcmpkt_routing_t_hdr_ext_len_get, bcmpkt_routing_t_next_header_get, @@ -8617,7 +8757,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_routing_t_fget[BCM56690_A0_DN bcmpkt_routing_t_segments_left_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_routing_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_routing_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FID_COUNT] = { bcmpkt_routing_t_data_set, bcmpkt_routing_t_hdr_ext_len_set, bcmpkt_routing_t_next_header_set, @@ -8625,13 +8765,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_routing_t_fset[BCM56690_A0_DN bcmpkt_routing_t_segments_left_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_routing_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_routing_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_routing_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_routing_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_routing_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_routing_t_field_data, }; @@ -8665,294 +8805,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_rspan_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_rspan_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_get, bcmpkt_rspan_t_tpid_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_rspan_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_rspan_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FID_COUNT] = { bcmpkt_rspan_t_tag_set, bcmpkt_rspan_t_tpid_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_data, -}; - - -static int32_t bcmpkt_segment_routing_srh_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_last_entry_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_last_entry_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_segment_routing_srh_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { - bcmpkt_segment_routing_srh_t_flags_get, - bcmpkt_segment_routing_srh_t_hdr_ext_len_get, - bcmpkt_segment_routing_srh_t_last_entry_get, - bcmpkt_segment_routing_srh_t_next_header_get, - bcmpkt_segment_routing_srh_t_routing_type_get, - bcmpkt_segment_routing_srh_t_segments_left_get, - bcmpkt_segment_routing_srh_t_tag_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { - bcmpkt_segment_routing_srh_t_flags_set, - bcmpkt_segment_routing_srh_t_hdr_ext_len_set, - bcmpkt_segment_routing_srh_t_last_entry_set, - bcmpkt_segment_routing_srh_t_next_header_set, - bcmpkt_segment_routing_srh_t_routing_type_set, - bcmpkt_segment_routing_srh_t_segments_left_set, - bcmpkt_segment_routing_srh_t_tag_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_data, -}; - - -static int32_t bcmpkt_segment_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_t_last_entry_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_last_entry_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_t_seg_list_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_seg_list_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_segment_routing_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_segment_routing_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { - bcmpkt_segment_routing_t_hdr_ext_len_get, - bcmpkt_segment_routing_t_last_entry_flags_get, - bcmpkt_segment_routing_t_next_header_get, - bcmpkt_segment_routing_t_routing_type_get, - bcmpkt_segment_routing_t_seg_list_get, - bcmpkt_segment_routing_t_segments_left_get, - bcmpkt_segment_routing_t_tag_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { - bcmpkt_segment_routing_t_hdr_ext_len_set, - bcmpkt_segment_routing_t_last_entry_flags_set, - bcmpkt_segment_routing_t_next_header_set, - bcmpkt_segment_routing_t_routing_type_set, - bcmpkt_segment_routing_t_seg_list_set, - bcmpkt_segment_routing_t_segments_left_set, - bcmpkt_segment_routing_t_tag_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_rspan_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_rspan_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_rspan_t_field_data, }; @@ -9002,25 +8871,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_get, bcmpkt_sflow_shim_0_t_sys_source_get, bcmpkt_sflow_shim_0_t_version_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { bcmpkt_sflow_shim_0_t_sys_destination_set, bcmpkt_sflow_shim_0_t_sys_source_set, bcmpkt_sflow_shim_0_t_version_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_field_data, }; @@ -9144,7 +9013,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_get, bcmpkt_sflow_shim_1_t_flag_discarded_get, bcmpkt_sflow_shim_1_t_flag_flex_sample_get, @@ -9155,7 +9024,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fget[BCM56690_ bcmpkt_sflow_shim_1_t_sys_opcode_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { bcmpkt_sflow_shim_1_t_flag_dest_sample_set, bcmpkt_sflow_shim_1_t_flag_discarded_set, bcmpkt_sflow_shim_1_t_flag_flex_sample_set, @@ -9166,13 +9035,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fset[BCM56690_ bcmpkt_sflow_shim_1_t_sys_opcode_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_field_data, }; @@ -9207,23 +9076,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_get, bcmpkt_sflow_shim_2_t_user_meta_data_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { bcmpkt_sflow_shim_2_t_sequence_num_set, bcmpkt_sflow_shim_2_t_user_meta_data_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_field_data, }; @@ -9258,57 +9127,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3 return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_get, bcmpkt_snap_llc_t_snap_llc_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { bcmpkt_snap_llc_t_length_set, bcmpkt_snap_llc_t_snap_llc_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_data, -}; - - -static int32_t bcmpkt_std_segment_id_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_std_segment_id_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { - bcmpkt_std_segment_id_t_data_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { - bcmpkt_std_segment_id_t_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_field_data, }; @@ -9342,23 +9177,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_get, bcmpkt_tcp_first_4bytes_t_src_port_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { bcmpkt_tcp_first_4bytes_t_dst_port_set, bcmpkt_tcp_first_4bytes_t_src_port_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_field_data, }; @@ -9454,7 +9289,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_get, bcmpkt_tcp_last_16bytes_t_checksum_get, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, @@ -9463,7 +9298,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fget[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { bcmpkt_tcp_last_16bytes_t_ack_num_set, bcmpkt_tcp_last_16bytes_t_checksum_set, bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, @@ -9472,13 +9307,13 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fset[BCM56 bcmpkt_tcp_last_16bytes_t_win_size_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_field_data, }; @@ -9542,27 +9377,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_udp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_udp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_get, bcmpkt_udp_t_dst_port_get, bcmpkt_udp_t_src_port_get, bcmpkt_udp_t_udp_length_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_udp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_udp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FID_COUNT] = { bcmpkt_udp_t_checksum_set, bcmpkt_udp_t_dst_port_set, bcmpkt_udp_t_src_port_set, bcmpkt_udp_t_udp_length_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_udp_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_udp_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_udp_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_udp_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_udp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_udp_t_field_data, }; @@ -9598,23 +9433,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_field_data, }; @@ -9634,21 +9469,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_field_data, }; @@ -9713,27 +9548,27 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_get, bcmpkt_unknown_l5_t_l5_bytes_2_3_get, bcmpkt_unknown_l5_t_l5_bytes_4_7_get, bcmpkt_unknown_l5_t_l5_bytes_8_9_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { bcmpkt_unknown_l5_t_l5_bytes_0_1_set, bcmpkt_unknown_l5_t_l5_bytes_2_3_set, bcmpkt_unknown_l5_t_l5_bytes_4_7_set, bcmpkt_unknown_l5_t_l5_bytes_8_9_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_field_data, }; @@ -9797,27 +9632,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_vlan_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_vlan_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_get, bcmpkt_vlan_t_pcp_get, bcmpkt_vlan_t_tpid_get, bcmpkt_vlan_t_vid_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_vlan_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_vlan_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FID_COUNT] = { bcmpkt_vlan_t_cfi_set, bcmpkt_vlan_t_pcp_set, bcmpkt_vlan_t_tpid_set, bcmpkt_vlan_t_vid_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_vlan_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_vlan_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_vlan_t_field_data, }; @@ -9867,25 +9702,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_vxlan_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_get, bcmpkt_vxlan_t_reserved2_get, bcmpkt_vxlan_t_vn_id_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_vxlan_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FID_COUNT] = { bcmpkt_vxlan_t_flags_reserved_1_set, bcmpkt_vxlan_t_reserved2_set, bcmpkt_vxlan_t_vn_id_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_vxlan_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_vxlan_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_vxlan_t_field_data, }; @@ -9997,7 +9832,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v return ret; } -bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_wesp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_wesp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_get, bcmpkt_wesp_t_header_len_get, bcmpkt_wesp_t_next_header_get, @@ -10007,7 +9842,7 @@ bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_wesp_t_fget[BCM56690_A0_DNA_6 bcmpkt_wesp_t_wesp_iv_get, }; -bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_wesp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT] = { +bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_wesp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FID_COUNT] = { bcmpkt_wesp_t_flags_set, bcmpkt_wesp_t_header_len_set, bcmpkt_wesp_t_next_header_set, @@ -10017,536 +9852,508 @@ bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_wesp_t_fset[BCM56690_A0_DNA_6 bcmpkt_wesp_t_wesp_iv_set, }; -static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_data[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_wesp_t_field_data[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT }; -static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_info = { - .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT, - .info = bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_data, +static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_wesp_t_field_info = { + .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm78800_a0_dna_6_5_31_5_0_wesp_t_field_data, }; -static bcmpkt_flex_pmd_info_t bcm56690_a0_dna_6_5_29_0_1_flexhdr_info_list[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT] = { - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_arp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_arp_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_arp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_authen_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_authen_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_authen_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_bfd_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_bfd_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_cntag_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_cntag_t_fset, - }, +static bcmpkt_flex_pmd_info_t bcm78800_a0_dna_6_5_31_5_0_flexhdr_info_list[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_COUNT] = { { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_arp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_arp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_arp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_authen_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_authen_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_authen_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_bfd_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_bfd_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_bfd_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_cntag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_cntag_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_cntag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_esp_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_dcn_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_esp_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_esp_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_dcn_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_dcn_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_dest_option_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_dest_option_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_dest_option_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_frag_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_frag_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_frag_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_esp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gpe_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gpe_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_esp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_esp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_ethertype_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ethertype_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ethertype_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_frag_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_frag_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_frag_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_gpe_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gpe_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gpe_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_gre_key_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gre_key_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gre_key_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_icmp_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_icmp_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_gre_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gre_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gre_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_icmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_icmp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_icmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_igmp_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_igmp_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_igmp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_igmp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_igmp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_ipfix_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ipfix_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ipfix_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_ipv4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ipv4_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ipv4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_l2_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_ipv6_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_l2_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_l2_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ipv6_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ipv6_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_l2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_l2_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_l2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_mpls_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_mpls_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_mpls_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_p_1588_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_p_1588_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_p_1588_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_rarp_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_rarp_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_routing_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_routing_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_routing_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_rspan_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_rspan_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_rarp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_rarp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_rarp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_routing_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_routing_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_routing_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_rspan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_rspan_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_rspan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_udp_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_udp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_udp_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_udp_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_udp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_udp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_vlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_vlan_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_vlan_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_vlan_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_vlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_vxlan_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_vxlan_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_vxlan_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_info, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_wesp_t_field_info, .reasons_info = NULL, - .flex_fget = bcm56690_a0_dna_6_5_29_0_1_wesp_t_fget, - .flex_fset = bcm56690_a0_dna_6_5_29_0_1_wesp_t_fset, + .flex_fget = bcm78800_a0_dna_6_5_31_5_0_wesp_t_fget, + .flex_fset = bcm78800_a0_dna_6_5_31_5_0_wesp_t_fset, }, { .is_supported = TRUE, - .field_info = &bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_info, - .reasons_info = &bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reasons_info, - .flex_common_fget = bcm56690_a0_rxpmd_flex_fget, - .flex_common_fset = bcm56690_a0_rxpmd_flex_fset, + .field_info = &bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_field_info, + .reasons_info = &bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm78800_a0_rxpmd_flex_fget, + .flex_common_fset = bcm78800_a0_rxpmd_flex_fset, }, }; -static shr_enum_map_t bcm56690_a0_dna_6_5_29_0_1_flexhdr_id_map[] = { - BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_NAME_MAP_INIT +static shr_enum_map_t bcm78800_a0_dna_6_5_31_5_0_flexhdr_id_map[] = { + BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_NAME_MAP_INIT }; -shr_enum_map_t * bcm56690_a0_dna_6_5_29_0_1_flexhdr_map_get(void) +shr_enum_map_t * bcm78800_a0_dna_6_5_31_5_0_flexhdr_map_get(void) { - return bcm56690_a0_dna_6_5_29_0_1_flexhdr_id_map; + return bcm78800_a0_dna_6_5_31_5_0_flexhdr_id_map; } -bcmpkt_flex_pmd_info_t * bcm56690_a0_dna_6_5_29_0_1_flex_pmd_info_get(uint32_t hid) +bcmpkt_flex_pmd_info_t * bcm78800_a0_dna_6_5_31_5_0_flex_pmd_info_get(uint32_t hid) { - if (hid >= BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT) { + if (hid >= BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_COUNT) { return NULL; } - return &bcm56690_a0_dna_6_5_29_0_1_flexhdr_info_list[hid]; + return &bcm78800_a0_dna_6_5_31_5_0_flexhdr_info_list[hid]; } -int bcm56690_a0_dna_6_5_29_0_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { - 14, - 21, +int bcm78800_a0_dna_6_5_31_5_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 15, 22, - 70, + 23, + 66, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild index 684e6708162..9f1edb67c0a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild @@ -22,8 +22,7 @@ KNETCB_CPPFLAGS += -DKPMD obj-m := linux_bcmgenl.o -ccflags-y := $(KNETCB_CPPFLAGS) $(LKM_CFLAGS) \ - $(SDK_PMD_KFLAGS) \ +ccflags-y := $(SDK_PMD_KFLAGS) $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ -I$(SDK)/shr/include \ -I$(SDK)/bcmdrd/include \ -I$(SDK)/bcmltd/include \ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c index 4d097e7d052..9a845d0b2c9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c @@ -225,7 +225,9 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) return (NULL); } cbd = NGKNET_SKB_CB(skb); - match_filt = cbd->filt; + if (cbd) { + match_filt = cbd->filt; + } if (!cbd || !match_filt) { GENL_DBG_WARN("%s: cbd(0x%p) or match_filt(0x%p) is NULL\n", @@ -235,18 +237,16 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) } /* check if this packet is from the same filter */ - if (!match_filt || - (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB) || - (strncmp(match_filt->desc, BCMGENL_PACKET_NAME, NGKNET_FILTER_DESC_MAX) != 0)) { + if (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB) || + (strncmp(match_filt->desc, BCMGENL_PACKET_NAME, NGKNET_FILTER_DESC_MAX) != 0) { return (skb); } dev_no = cbd->dinfo->dev_no; pkt = cbd->pmd + cbd->pmd_len; - pkt_len = cbd->pkt_len; GENL_DBG_VERB ("pkt size %d, match_filt->dest_id %d\n", - pkt_len, match_filt->dest_id); + cbd->pkt_len, match_filt->dest_id); GENL_DBG_VERB ("filter user data: 0x%08x\n", *(uint32_t *)match_filt->user_data); GENL_DBG_VERB @@ -254,6 +254,7 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) g_bcmgenl_packet_stats.pkts_f_packet_cb++; /* Adjust original pkt_len to remove 4B FCS */ + pkt_len = cbd->pkt_len; if (pkt_len < FCS_SZ) { g_bcmgenl_packet_stats.pkts_d_invalid_size++; goto FILTER_CB_PKT_HANDLED; @@ -375,7 +376,6 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) if (rv == 1) { g_bcmgenl_packet_stats.pkts_f_handled++; /* Not sending to network protocol stack */ - dev_kfree_skb_any(skb); skb = NULL; } else { g_bcmgenl_packet_stats.pkts_f_pass_through++; @@ -669,13 +669,13 @@ bcmgenl_packet_proc_debug_write( char debug_str[40]; char *ptr; - if (count > sizeof(debug_str)) { + if (count >= sizeof(debug_str)) { count = sizeof(debug_str) - 1; - debug_str[count] = '\0'; } if (copy_from_user(debug_str, buf, count)) { return -EFAULT; } + debug_str[count] = '\0'; if ((ptr = strstr(debug_str, "debug=")) != NULL) { ptr += 6; @@ -715,7 +715,7 @@ genl_cb_proc_init(void) /* create procfs for generic */ snprintf(packet_procfs_path, PROCFS_MAX_PATH, "%s/%s", - BCMGENL_PROCFS_PATH, BCMGENL_PACKET_NAME); + BCMGENL_MODULE_NAME, BCMGENL_PACKET_NAME); bcmgenl_packet_proc_root = proc_mkdir(packet_procfs_path, NULL); /* create procfs for generic stats */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c index 90060e69d82..bf5ff9a4f4a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c @@ -277,7 +277,9 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) return (NULL); } cbd = NGKNET_SKB_CB(skb); - match_filt = cbd->filt; + if (cbd) { + match_filt = cbd->filt; + } if (!cbd || !match_filt) { GENL_DBG_WARN("%s: cbd(0x%p) or match_filt(0x%p) is NULL\n", @@ -287,9 +289,8 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) } /* check if this packet is sampled packet (from sample filter) */ - if (!match_filt || - (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB) || - (strncmp(match_filt->desc, BCMGENL_PSAMPLE_NAME, NGKNET_FILTER_DESC_MAX) != 0)) { + if (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB || + strncmp(match_filt->desc, BCMGENL_PSAMPLE_NAME, NGKNET_FILTER_DESC_MAX) != 0) { return (skb); } dev_no = cbd->dinfo->dev_no; @@ -428,6 +429,7 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) memcpy(skb_psample->data, pkt, meta.trunc_size); } skb_put(skb_psample, meta.trunc_size); + /* save original size for PSAMPLE_ATTR_ORIGSIZE in skb->len */ skb_psample->len = pkt_len; psample_pkt->skb = skb_psample; if (debug & GENL_DBG_LVL_PDMP) { @@ -453,7 +455,6 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) if (bcmgenl_pkt.meta.sample_type != SAMPLE_TYPE_NONE) { g_bcmgenl_psample_stats.pkts_f_handled++; /* Not sending to network protocol stack */ - dev_kfree_skb_any(skb); skb = NULL; } else { g_bcmgenl_psample_stats.pkts_f_pass_through++; @@ -880,13 +881,13 @@ bcmgenl_psample_proc_debug_write( char debug_str[40]; char *ptr; - if (count > sizeof(debug_str)) { + if (count >= sizeof(debug_str)) { count = sizeof(debug_str) - 1; - debug_str[count] = '\0'; } if (copy_from_user(debug_str, buf, count)) { return -EFAULT; } + debug_str[count] = '\0'; if ((ptr = strstr(debug_str, "debug=")) != NULL) { ptr += 6; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild index a566a883789..368cef2e776 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild @@ -2,7 +2,7 @@ # # Linux kernel BDE module. # -# The NGBDE_CFLAGS variable is intended for configuring non-default +# The BDE_CPPFLAGS variable is intended for configuring non-default # builds of the NGBDE kernel module, for example, using a different # default DMA pool size or turning off MSI interrupts. # @@ -24,7 +24,7 @@ obj-m := linux_ngbde.o -ccflags-y := $(LKM_CFLAGS) $(NGBDE_CFLAGS) \ +ccflags-y := $(BDE_CPPFLAGS) $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ $(LKM_BUILD_INFO) \ -I$(SDK)/linux/include \ -I$(SDK)/linux/bde \ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c index 92a5911b5b0..ca08428ff27 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c @@ -58,6 +58,13 @@ MODULE_PARM_DESC(dma_pools, "Number of DMA memory pools to pre-allocate per device (default 1)."); /*! \endcond */ +/*! \cond */ +static int dma_32bit = 0; +module_param(dma_32bit, int, S_IRUSR); +MODULE_PARM_DESC(dma_32bit, +"Request DMA memory with 32-bit physical address (default 0)."); +/*! \endcond */ + /*! * \brief Allocate DMA memory via kernel API. * @@ -72,8 +79,8 @@ ngbde_dmamem_kapi_alloc(ngbde_dmactrl_t *dmactrl, ngbde_dmamem_t *dmamem) void *vaddr; dma_addr_t baddr; - vaddr = dma_alloc_coherent(dmactrl->dev, dmactrl->size, &baddr, - dmactrl->flags); + vaddr = dma_alloc_attrs(dmactrl->dev, dmactrl->size, &baddr, + dmactrl->flags, DMA_FORCE_CONTIGUOUS); if (vaddr) { /* Store allocation information in dmamem structure */ dmamem->vaddr = vaddr; @@ -84,7 +91,7 @@ ngbde_dmamem_kapi_alloc(ngbde_dmactrl_t *dmactrl, ngbde_dmamem_t *dmamem) dmamem->baddr = baddr; /* Write small signature for debug purposes */ - strcpy((char *)vaddr, "DMA_KAPI"); + strlcpy((char *)vaddr, "DMA_KAPI", dmactrl->size); if (dma_debug) { printk("DMA: Allocated %d KB of KAPI memory at 0x%08lx\n", @@ -131,7 +138,7 @@ ngbde_dmamem_pgmem_alloc(ngbde_dmactrl_t *dmactrl, ngbde_dmamem_t *dmamem) } /* Write small signature for debug purposes */ - strcpy((char *)vaddr, "DMA_PGMEM"); + strlcpy((char *)vaddr, "DMA_PGMEM", dmactrl->size); if (dma_debug) { printk("DMA: Allocated %d KB of PGMEM memory at 0x%08lx\n", @@ -226,8 +233,9 @@ ngbde_dmamem_free(ngbde_dmamem_t *dmamem) printk("DMA: Freeing %d KB of KAPI memory\n", (int)(dmamem->size / ONE_KB)); } - dma_free_coherent(dmamem->dev, dmamem->size, - dmamem->vaddr, dmamem->baddr); + dma_free_attrs(dmamem->dev, dmamem->size, + dmamem->vaddr, dmamem->baddr, + DMA_FORCE_CONTIGUOUS); memset(dmamem, 0, sizeof(*dmamem)); break; case NGBDE_DMA_T_PGMEM: @@ -329,7 +337,14 @@ ngbde_dma_init(void) dmapool->dmactrl.dev = swdev[idx].dma_dev; dmapool->dmactrl.size = dma_size * ONE_MB; dmapool->dmactrl.pref_type = dma_type; - dmapool->dmactrl.flags = GFP_KERNEL | GFP_DMA32; + dmapool->dmactrl.flags = GFP_KERNEL; + if (dma_32bit) { + dmapool->dmactrl.flags |= GFP_DMA32; + } + if (dma_type == NGBDE_DMA_T_AUTO && dma_debug == 0) { + /* Prevent warning if CMA is unavailable */ + dmapool->dmactrl.flags |= __GFP_NOWARN; + } } /* Allocate DMA pools */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/edk/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/edk/Kbuild new file mode 100755 index 00000000000..d70336f2ac6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/edk/Kbuild @@ -0,0 +1,17 @@ +# -*- Kbuild -*- +# +# Linux KNET Callback module. +# +# $Copyright:.$ +# + +obj-m := linux_ngedk.o + +ccflags-y := $(LKM_CFLAGS) \ + -I$(SDK)/shr/include \ + -I$(SDK)/bcmdrd/include \ + -I$(SDK)/linux/include \ + -I$(SDK)/linux/knet/include \ + -I$(SDK)/linux/knet + +linux_ngedk-y := ngedk_main.o diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/edk/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/edk/Makefile new file mode 100755 index 00000000000..2eb52d53a46 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/edk/Makefile @@ -0,0 +1,19 @@ +# +# $Copyright: Broadcom Ltd.$ +# +# Linux KNET Callback module. +# + +include Kbuild + +ifeq ($(KERNELRELEASE),) + +MOD_NAME = linux_ngedk + +include $(SDK)/make/lkm.mk + +endif + +.PHONY: distclean + +distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/edk/ngedk_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/edk/ngedk_main.c new file mode 100755 index 00000000000..7155da0e74d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/edk/ngedk_main.c @@ -0,0 +1,497 @@ +/*! \file ngedk_main.c + * + * EDK support module entry. + * + */ +/* + * $Copyright:.$ + */ + +#include +#include +#include +#include + +/*! \cond */ +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("EDK Support Module"); +MODULE_LICENSE("GPL"); +/*! \endcond */ + +/*! Maximum number of switch devices supported. */ +#ifndef NGEDK_NUM_SWDEV_MAX +#define NGEDK_NUM_SWDEV_MAX NGBDE_NUM_SWDEV_MAX +#endif + +/*! Kernel DMA API (dma_alloc_coherent). */ +#define NGEDK_DMA_T_KAPI 1 + +/*! Page allocator and map to physical address manually. */ +#define NGEDK_DMA_T_PGMEM 2 + +/* Structure to hold info about interrupts handled by EDK */ +typedef struct edk_intr_s { + + /*! Unit Level Enable */ + uint32_t enable; + + /*! Active cores */ + uint32_t active_bmp; + + /*! Timer interrupts status offset */ + uint32_t timer_intrc_stat_reg; + + /*! Timer interrupts disable offset */ + uint32_t timer_intrc_disable_reg; + + /*! Timer interrupts mask */ + uint32_t timer_intrc_mask_val; + + /*! Bitmap of cores that asserted SW Programmable Interrupt */ + volatile unsigned long swi_intr_cores; + + /*! EDK interrupt flags */ + uint32_t flags; + +} edk_intr_t; + +/*! Switch device descriptor. */ +typedef struct edk_dev_s { + + /*! Kernel device number (similar to user mode unit number). */ + int kdev; + + /* TODO: Keep DMArelated vars in a separate sub-structure ? */ + + /*! Logical address of DMA pool. */ + void *dma_vaddr; + + /*! Physical address of DMA pool. */ + dma_addr_t dma_paddr; + + /*! Bus address of DMA pool. */ + dma_addr_t dma_baddr; + + /*! Size of DMA memory (in bytes). */ + size_t dma_size; + + /*! DMA pool type. KNET or PGMEM */ + int dma_type; + + /*! Linux DMA device associated with DMA pool. */ + struct device *dma_dev; + + /* EDK Interrupt detail */ + struct edk_intr_s edk_intr; + + /*! Wait queue for edk interrupt thread. */ + wait_queue_head_t edk_thread_wq; + + /*! Flag to wake up edk interrupt thread. */ + atomic_t run_edk_thread; + + /*! Number of interrupts processed. */ + unsigned long intr_cnt; + +} edk_dev_t; + +static edk_dev_t edkdevs[NGBDE_NUM_SWDEV_MAX]; + +static int +ngedk_dmamem_alloc(edk_dev_t *edkdev, size_t size) +{ + void *vaddr; + dma_addr_t baddr; + + if (edkdev->dma_vaddr) { + /* Already allocated */ + return 0; + } + +#ifdef CONFIG_CMA + vaddr = dma_alloc_coherent(edkdev->dma_dev, size, &baddr, + GFP_KERNEL | GFP_DMA32); + if (vaddr) { + /* Store allocation information in the edk device */ + edkdev->dma_vaddr = vaddr; + edkdev->dma_paddr = virt_to_phys(vaddr); + edkdev->dma_baddr = baddr; + edkdev->dma_size = size; + edkdev->dma_type = NGEDK_DMA_T_KAPI; + return 0; + } +#endif + vaddr = ngbde_kapi_dma_alloc(size); + if (vaddr) { + /* Store allocation information in the edk device */ + edkdev->dma_vaddr = vaddr; + edkdev->dma_paddr = virt_to_phys(vaddr); + edkdev->dma_size = size; + edkdev->dma_type = NGEDK_DMA_T_PGMEM; + baddr = dma_map_single(edkdev->dma_dev, edkdev->dma_vaddr, + edkdev->dma_size, DMA_BIDIRECTIONAL); + if (dma_mapping_error(edkdev->dma_dev, baddr)) { + edkdev->dma_baddr = 0; + printk("EDK: Failed to map PGMEM memory\n"); + } else { + edkdev->dma_baddr = baddr; + } + return 0; + } + + edkdev->dma_vaddr = NULL; + return -1; +} + +static void +ngedk_dmamem_free(edk_dev_t *edkdev) +{ + if (edkdev->dma_type == NGEDK_DMA_T_KAPI) { + dma_free_coherent(edkdev->dma_dev, edkdev->dma_size, + edkdev->dma_vaddr, edkdev->dma_baddr); + } else if (edkdev->dma_type == NGEDK_DMA_T_PGMEM) { + + if (edkdev->dma_baddr) { + dma_unmap_single(edkdev->dma_dev, edkdev->dma_baddr, + edkdev->dma_size, DMA_BIDIRECTIONAL); + } + ngbde_kapi_dma_free(edkdev->dma_vaddr); + } + edkdev->dma_type = 0; + edkdev->dma_vaddr = 0; +} + +void * +ngedk_dmamem_map_p2v(dma_addr_t paddr) +{ + struct edk_dev_s *ed; + ed = &edkdevs[0]; + if ((paddr >= ed->dma_baddr) && + (paddr < (ed->dma_baddr + ed->dma_size))) { + return (ed->dma_vaddr + (paddr - ed->dma_baddr)); + } else { + return NULL; + } +} +EXPORT_SYMBOL(ngedk_dmamem_map_p2v); + +int +ngedk_intr_wait(int kdev, uint32_t *uc_bmp) +{ + int32_t core; + struct edk_dev_s *ed = &edkdevs[kdev]; + + wait_event_interruptible(ed->edk_thread_wq, + atomic_read(&ed->run_edk_thread) != 0); + atomic_set(&ed->run_edk_thread, 0); + + *uc_bmp = 0; + if (ed->edk_intr.swi_intr_cores) { + /* We got a SW Interrupt */ + for (core = 0; core < MCS_NUM_UC; core++) { + if (test_and_clear_bit(core, &(ed->edk_intr.swi_intr_cores))) { + /* FIXME: Check against active_bmp? Or leave it upto EDK-Host? */ + *uc_bmp |= (1 << core); + } + } + } + return 0; +} + +static int +ngedk_swdev_init(int kdev) +{ + struct device *edk_dev; + struct edk_dev_s *ed = &edkdevs[kdev]; + + edk_dev = ngbde_kapi_dma_dev_get(kdev); + if (edk_dev) { + printk(KERN_INFO "Found EDK dev %d\n", kdev); + ed->kdev = kdev; + ed->dma_dev = edk_dev; + ed->edk_intr.swi_intr_cores = 0; + init_waitqueue_head(&ed->edk_thread_wq); + atomic_set(&ed->run_edk_thread, 0); + } + + return 0; +} + +static int +ngedk_swdev_cleanup(int kdev) +{ + struct edk_dev_s *ed = &edkdevs[kdev]; + + if (ed->dma_dev) { + printk(KERN_INFO "Clean up EDK dev %d\n", kdev); + /* Wake up edk thread */ + atomic_set(&ed->run_edk_thread, 1); + wake_up_interruptible(&ed->edk_thread_wq); + } + if (ed->dma_vaddr) { + ngedk_dmamem_free(ed); + } + memset(ed, 0, sizeof(*ed)); + + return 0; +} + +static int +ngedk_attach(void) +{ + int kdev; + + for (kdev = 0; kdev < NGEDK_NUM_SWDEV_MAX; kdev++) { + ngedk_swdev_init(kdev); + } + + return 0; +} + +static int +ngedk_detach(void) +{ + int kdev; + + for (kdev = 0; kdev < NGEDK_NUM_SWDEV_MAX; kdev++) { + ngedk_swdev_cleanup(kdev); + } + + return 0; +} + +static int +proc_show(struct seq_file *m, void *v) +{ + seq_printf(m, "Broadcom EDK Support (%s)\n", NGEDK_MODULE_NAME); + + return 0; +} + +static int +proc_open(struct inode *inode, struct file *file) +{ + return single_open(file, proc_show, NULL); +} + +static int +proc_release(struct inode *inode, struct file *file) +{ + return single_release(inode, file); +} + +static struct proc_ops proc_fops = { + PROC_OWNER(THIS_MODULE) + .proc_open = proc_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_release = proc_release, +}; + +static int +ngedk_procfs_init(void) +{ + struct proc_dir_entry *entry; + + PROC_CREATE(entry, NGEDK_MODULE_NAME, 0666, NULL, &proc_fops); + + if (entry == NULL) { + printk(KERN_ERR "ngedk: proc_create failed\n"); + return -1; + } + + return 0; +} + +static int +ngedk_procfs_cleanup(void) +{ + remove_proc_entry(NGEDK_MODULE_NAME, NULL); + + return 0; +} + +/*! + * Generic module functions + */ + +static int +ngedk_open(struct inode *inode, struct file *filp) +{ + return 0; +} + +static int +ngedk_release(struct inode *inode, struct file *filp) +{ + return 0; +} + +static long +ngedk_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + struct ngedk_ioc_cmd_s ioc; + struct edk_dev_s *ed; + + if (copy_from_user(&ioc, (void *)arg, sizeof(ioc))) { + return -EFAULT; + } + + ioc.rc = NGEDK_IOC_SUCCESS; + + switch (cmd) { + case NGEDK_IOC_MOD_INFO: + ioc.op.mod_info.version = NGEDK_IOC_VERSION; + break; + case NGEDK_IOC_ATTACH_INST: + ed = &edkdevs[ioc.devid]; + if (ngedk_dmamem_alloc(ed, ioc.op.attach_inst.size_mb) < 0) { + printk(KERN_WARNING "Unable to allocate DMA pool for EDK\n"); + ioc.rc = NGEDK_IOC_FAIL; + break; + } + printk(KERN_INFO "ngedk: Attach unit %d hram %d\n", + ioc.devid, ioc.op.attach_inst.size_mb); + break; + case NGEDK_IOC_GET_DMA_INFO: + ed = &edkdevs[ioc.devid]; + ioc.op.dma_info.vaddr = (uintptr_t)ed->dma_vaddr; + ioc.op.dma_info.paddr = ed->dma_paddr; + ioc.op.dma_info.baddr = ed->dma_baddr; + ioc.op.dma_info.size = ed->dma_size; + break; + case NGEDK_IOC_INTR_WAIT: + if (ngedk_intr_wait(ioc.devid, &ioc.op.edk_intr.sw_intr_cores) < 0) { + ioc.rc = NGEDK_IOC_FAIL; + } + break; + case NGEDK_IOC_INTR_ENABLE: + ed = &edkdevs[ioc.devid]; + ed->edk_intr.enable = 1; + break; + case NGEDK_IOC_INTR_DISABLE: + ed = &edkdevs[ioc.devid]; + ed->edk_intr.enable = 0; + break; + case NGEDK_IOC_INTR_SET: + ed = &edkdevs[ioc.devid]; + + /* Active uCs */ + ed->edk_intr.active_bmp = ioc.op.edk_intr.active_bmp; + /* To check if a timer interrupt is asserted */ + ed->edk_intr.timer_intrc_stat_reg = ioc.op.edk_intr.timer_intrc_stat_reg; + ed->edk_intr.timer_intrc_disable_reg = ioc.op.edk_intr.timer_intrc_disable_reg; + ed->edk_intr.timer_intrc_mask_val = ioc.op.edk_intr.timer_intrc_mask_val; + ed->edk_intr.flags = ioc.op.edk_intr.flags; + break; + case NGEDK_IOC_TIMER_INTR: + ed = &edkdevs[ioc.devid]; + /* Two cores may use one interrupt. Leave it to the EDK Host to Identify */ + atomic_set(&ed->run_edk_thread, 1); + wake_up_interruptible(&ed->edk_thread_wq); + break; + case NGEDK_IOC_SW_INTR: + ed = &edkdevs[ioc.devid]; + set_bit(ioc.op.sw_intr.uc, &(ed->edk_intr.swi_intr_cores)); + atomic_set(&ed->run_edk_thread, 1); + wake_up_interruptible(&ed->edk_thread_wq); + break; + default: + printk(KERN_ERR "ngedk: invalid ioctl (%08x)\n", cmd); + ioc.rc = NGEDK_IOC_FAIL; + break; + } + + if (copy_to_user((void *)arg, &ioc, sizeof(ioc))) { + return -EFAULT; + } + + return 0; +} + +static int +ngedk_mmap(struct file *filp, struct vm_area_struct *vma) +{ + unsigned long paddr = vma->vm_pgoff << PAGE_SHIFT; + unsigned long size = vma->vm_end - vma->vm_start; + struct edk_dev_s *edkdev; + int kdev; + int range_valid = 0; + int map_noncached = 0; + + /* Check for valid range */ + for (kdev = 0; kdev < NGEDK_NUM_SWDEV_MAX; kdev++) { + edkdev = &edkdevs[kdev]; + if (paddr >= edkdev->dma_paddr && + (paddr + size) <= (edkdev->dma_paddr + edkdev->dma_size)) { + if (edkdev->dma_type == NGEDK_DMA_T_KAPI) { + map_noncached = 1; + } + range_valid = 1; + break; + } + } + + if (!range_valid) { + printk("NGEDK: Invalid mmap range 0x%08lx/0x%lx\n", paddr, size); + return -EINVAL; + } + + if (map_noncached) { + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + } + + if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, + size, vma->vm_page_prot)) { + printk("EDK: Failed to mmap phys range 0x%lx-0x%lx to 0x%lx-0x%lx\n", + paddr, paddr + size, vma->vm_start, vma->vm_end); + return -EAGAIN; + } + + return 0; +} + +static struct file_operations ngedk_fops = { + .open = ngedk_open, + .release = ngedk_release, + .unlocked_ioctl = ngedk_ioctl, + .compat_ioctl = ngedk_ioctl, + .mmap = ngedk_mmap, +}; + +static void __exit +ngedk_exit_module(void) +{ + ngedk_detach(); + ngedk_procfs_cleanup(); + unregister_chrdev(NGEDK_MODULE_MAJOR, NGEDK_MODULE_NAME); + printk(KERN_INFO "Broadcom NGEDK unloaded successfully\n"); +} + +static int __init +ngedk_init_module(void) +{ + int rv; + + rv = register_chrdev(NGEDK_MODULE_MAJOR, NGEDK_MODULE_NAME, &ngedk_fops); + if (rv < 0) { + printk(KERN_WARNING "%s: can't get major %d\n", + NGEDK_MODULE_NAME, NGEDK_MODULE_MAJOR); + return rv; + } + + rv = ngedk_procfs_init(); + if (rv < 0) { + printk(KERN_WARNING "%s: Unable to initialize proc files\n", + NGEDK_MODULE_NAME); + return rv; + } + + ngedk_attach(); + + printk(KERN_INFO "Broadcom NGEDK loaded successfully\n"); + return 0; +} + +module_exit(ngedk_exit_module); +module_init(ngedk_init_module); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild index c0b31433648..52556ce879b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild +++ b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild @@ -8,6 +8,6 @@ obj-m := genl-packet.o -ccflags-y := $(LKM_CFLAGS) \ +ccflags-y := $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ -I$(SDK)/linux/include/lkm \ -I$(SDK)/linux/include/kernel diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h index bf838dd5856..97162960007 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h @@ -25,18 +25,13 @@ #include #include -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0) #error Kernel too old #endif -#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,1,0) #include -#endif #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) #include #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39) -#include -#endif #include #include @@ -138,6 +133,12 @@ static inline void page_ref_dec(struct page *page) } #endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0) +#define DMA_FORCE_CONTIGUOUS NULL +#else +#define DMA_FORCE_CONTIGUOUS DMA_ATTR_FORCE_CONTIGUOUS +#endif + #ifndef PCI_IRQ_LEGACY /* Emulate new IRQ API if not available */ #define PCI_IRQ_LEGACY (1 << 0) diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild index 89610dd2b44..a0d6cc0e929 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild @@ -24,7 +24,7 @@ ifneq ($(OUTPUT_DIR),) INCLUDES := -I$(OUTPUT_DIR)/knet/generated/include -I$(OUTPUT_DIR)/knet/generated endif -ccflags-y := $(KNET_CPPFLAGS) $(LKM_CFLAGS) \ +ccflags-y := $(KNET_CPPFLAGS) $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ -I$(SDK)/shr/include \ -I$(SDK)/bcmdrd/include \ -I$(SDK)/linux/include \ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c index 2766758d2c6..65965abfbf2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c @@ -29,6 +29,7 @@ static struct ngknet_callback_ctrl callback_ctrl; void ngknet_callback_init(struct ngknet_dev *devs) { + INIT_LIST_HEAD(&callback_ctrl.dev_init_cb_list); INIT_LIST_HEAD(&callback_ctrl.netif_create_cb_list); INIT_LIST_HEAD(&callback_ctrl.netif_destroy_cb_list); INIT_LIST_HEAD(&callback_ctrl.filter_cb_list); @@ -38,10 +39,16 @@ ngknet_callback_init(struct ngknet_dev *devs) void ngknet_callback_cleanup(void) { + dev_cb_t *dev_cb; netif_cb_t *netif_cb; filter_cb_t *filter_cb; - /* Destroy any create/destroy netif which is not unregistered */ + while (!list_empty(&callback_ctrl.dev_init_cb_list)) { + dev_cb = list_entry(callback_ctrl.dev_init_cb_list.next, + dev_cb_t, list); + list_del(&dev_cb->list); + kfree(dev_cb); + } while (!list_empty(&callback_ctrl.netif_create_cb_list)) { netif_cb = list_entry(callback_ctrl.netif_create_cb_list.next, netif_cb_t, list); @@ -77,10 +84,26 @@ ngknet_callback_control_get(struct ngknet_callback_ctrl **cbc) int ngknet_dev_init_cb_register(ngknet_dev_init_cb_f dev_init_cb) { - if (callback_ctrl.dev_init_cb != NULL) { + struct list_head *list; + dev_cb_t *dev_cb; + + if (dev_init_cb == NULL) { return -1; } - callback_ctrl.dev_init_cb = dev_init_cb; + + list_for_each(list, &callback_ctrl.dev_init_cb_list) { + dev_cb = list_entry(list, dev_cb_t, list); + if (dev_cb->cb == dev_init_cb) { + return -1; + } + } + + dev_cb = kmalloc(sizeof(*dev_cb), GFP_KERNEL); + if (dev_cb == NULL) { + return -1; + } + dev_cb->cb = dev_init_cb; + list_add_tail(&dev_cb->list, &callback_ctrl.dev_init_cb_list); return 0; } @@ -88,12 +111,23 @@ ngknet_dev_init_cb_register(ngknet_dev_init_cb_f dev_init_cb) int ngknet_dev_init_cb_unregister(ngknet_dev_init_cb_f dev_init_cb) { - if (dev_init_cb == NULL || callback_ctrl.dev_init_cb != dev_init_cb) { + struct list_head *list, *list_next; + dev_cb_t *dev_cb; + + if (dev_init_cb == NULL) { return -1; } - callback_ctrl.dev_init_cb = NULL; - return 0; + list_for_each_safe(list, list_next, &callback_ctrl.dev_init_cb_list) { + dev_cb = list_entry(list, dev_cb_t, list); + if (dev_cb->cb == dev_init_cb) { + list_del(list); + kfree(dev_cb); + return 0; + } + } + + return -1; } int @@ -281,7 +315,7 @@ ngknet_filter_cb_register_by_name(ngknet_filter_cb_f filter_cb, const char *desc return -1; } fcb->cb = filter_cb; - strcpy(fcb->desc, desc); + strlcpy(fcb->desc, desc, sizeof(fcb->desc)); list_add_tail(&fcb->list, &callback_ctrl.filter_cb_list); /* Check if any existing filter matches the registered name */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h index 04b06500c79..53eed443671 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h @@ -25,6 +25,14 @@ #include +typedef struct dev_cb_s { + /*! List head */ + struct list_head list; + + /*! Device callback */ + ngknet_dev_init_cb_f cb; +} dev_cb_t; + typedef struct netif_cb_s { /*! List head */ struct list_head list; @@ -47,8 +55,8 @@ typedef struct filter_cb_s { * \brief NGKNET callback control. */ struct ngknet_callback_ctrl { - /*! Handle TX/RX callback initialization. */ - ngknet_dev_init_cb_f dev_init_cb; + /*! Device initialization callback list */ + struct list_head dev_init_cb_list; /*! Handle Rx packet */ ngknet_rx_cb_f rx_cb; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h index bbda4df0a77..100e0e3894d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h @@ -34,6 +34,14 @@ #define MODULE_PARAM(n, t, p) module_param(n, t, p) +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,19,0)) +#define kal_netif_napi_add(_dev, _napi, _poll, _weight) \ + netif_napi_add(_dev, _napi, _poll, _weight) +#else +#define kal_netif_napi_add(_dev, _napi, _poll, _weight) \ + netif_napi_add_weight(_dev, _napi, _poll, _weight) +#endif + /* * The eth_hw_addr_set was added in Linux 5.15, but later backported * to various longterm releases, so we need a more advanced check with diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c index d17e88d1c04..bdc93f90dbd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c @@ -362,17 +362,19 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb) { struct ngknet_private *priv = netdev_priv(ndev); struct ngknet_dev *dev = priv->bkn_dev; + struct pdma_dev *pdev = &dev->pdma_dev; struct sk_buff *skb = *oskb; struct ngknet_rcpu_hdr *rch = (struct ngknet_rcpu_hdr *)skb->data; struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; uint8_t meta_len = pkh->meta_len; + uint8_t fcs_len = pdev->flags & PDMA_NO_FCS ? 0 : ETH_FCS_LEN; #if SAI_FIXUP && KNET_SVTAG_HOTFIX int offset; #endif /* Remove FCS from packet length */ - skb_trim(skb, skb->len - ETH_FCS_LEN); - pkh->data_len -= ETH_FCS_LEN; + skb_trim(skb, skb->len - fcs_len); + pkh->data_len -= fcs_len; if (priv->netif.flags & NGKNET_NETIF_F_RCPU_ENCAP) { /* Set up RCPU header */ @@ -403,7 +405,7 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb) ngknet_ptp_rx_hwts_set(ndev, skb); } - /* Check to ensure ngknet_callback_desc struct fits in sk_buff->cb */ + /* Check to ensure ngknet_callback_desc struct fits in sk_buff->cb */ BUILD_BUG_ON(sizeof(struct ngknet_callback_desc) > sizeof(skb->cb)); #if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ /* Strip SVTAG from the packets injected by the MACSEC block */ @@ -568,9 +570,14 @@ ngknet_frame_recv(struct pdma_dev *pdev, int queue, void *buf) /* Populate header, checksum status, VLAN, and protocol */ priv = netdev_priv(ndev); - if (!netif_carrier_ok(ndev) || - SHR_FAILURE(ngknet_netif_recv(ndev, skb))) { - priv->stats.rx_dropped++; + if (netif_carrier_ok(ndev)) { + if (SHR_FAILURE(ngknet_netif_recv(ndev, skb))) { + dev_kfree_skb_any(skb); + if (!netif_queue_stopped(ndev)) { + priv->stats.rx_dropped++; + } + } + } else { dev_kfree_skb_any(skb); } @@ -584,9 +591,14 @@ ngknet_frame_recv(struct pdma_dev *pdev, int queue, void *buf) /* Handle mirrored packet */ if (mndev && mskb) { priv = netdev_priv(mndev); - if (!netif_carrier_ok(mndev) || - SHR_FAILURE(ngknet_netif_recv(mndev, mskb))) { - priv->stats.rx_dropped++; + if (netif_carrier_ok(mndev)) { + if (SHR_FAILURE(ngknet_netif_recv(mndev, mskb))) { + dev_kfree_skb_any(mskb); + if (!netif_queue_stopped(mndev)) { + priv->stats.rx_dropped++; + } + } + } else { dev_kfree_skb_any(mskb); } spin_lock_irqsave(&dev->lock, flags); @@ -704,19 +716,21 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) { struct ngknet_private *priv = netdev_priv(ndev); struct ngknet_dev *dev = priv->bkn_dev; + struct pdma_dev *pdev = &dev->pdma_dev; struct sk_buff *skb = *oskb; struct ngknet_rcpu_hdr *rch = (struct ngknet_rcpu_hdr *)skb->data; struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; struct sk_buff *nskb = NULL; char *data = NULL; uint32_t copy_len, meta_len, data_len, pkt_len, tag_len, pad_len; + uint16_t fcs_len = pdev->flags & PDMA_NO_FCS ? 0 : ETH_FCS_LEN; uint16_t tpid; /* Set up packet header */ if (priv->netif.flags & NGKNET_NETIF_F_RCPU_ENCAP) { /* RCPU encapsulation packet */ data_len = pkh->attrs & PDMA_TX_HDR_COOKED ? - pkh->data_len - ETH_FCS_LEN : ntohs(rch->data_len); + pkh->data_len - fcs_len : ntohs(rch->data_len); pkt_len = PKT_HDR_SIZE + rch->meta_len + data_len; if (skb->len != pkt_len || skb->len < (PKT_HDR_SIZE + ETH_HLEN)) { DBG_WARN(("Tx drop: Invalid packet length\n")); @@ -730,7 +744,7 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) /* Resumed packet */ return SHR_E_NONE; } - pkh->data_len = data_len + ETH_FCS_LEN; + pkh->data_len = data_len + fcs_len; pkh->meta_len = rch->meta_len; pkh->attrs = 0; if (rch->flags & RCPU_FLAG_MODHDR) { @@ -750,7 +764,7 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) } } else { /* Non-RCPU encapsulation packet */ - data_len = pkh->data_len - ETH_FCS_LEN; + data_len = pkh->data_len - fcs_len; pkt_len = PKT_HDR_SIZE + pkh->meta_len + data_len; if (skb->len == pkt_len && pkh->attrs & PDMA_TX_HDR_COOKED && pkh->pkt_sig == dev->rcpu_ctrl.pkt_sig) { @@ -767,9 +781,9 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) } if (skb_header_cloned(skb) || skb_headroom(skb) < (PKT_HDR_SIZE + meta_len + VLAN_HLEN) || - skb_tailroom(skb) < ETH_FCS_LEN) { + skb_tailroom(skb) < fcs_len) { nskb = skb_copy_expand(skb, PKT_HDR_SIZE + meta_len + VLAN_HLEN, - ETH_FCS_LEN, GFP_ATOMIC); + fcs_len, GFP_ATOMIC); if (!nskb) { return SHR_E_MEMORY; } @@ -780,7 +794,7 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) skb_push(skb, PKT_HDR_SIZE + meta_len); memset(skb->data, 0, PKT_HDR_SIZE + meta_len); pkh = (struct pkt_hdr *)skb->data; - pkh->data_len = skb->len - PKT_HDR_SIZE - meta_len + ETH_FCS_LEN; + pkh->data_len = skb->len - PKT_HDR_SIZE - meta_len + fcs_len; pkh->meta_len = meta_len; pkh->attrs = 0; if (priv->netif.type == NGKNET_NETIF_T_PORT) { @@ -883,15 +897,15 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) return SHR_E_UNAVAIL; } pkh = (struct pkt_hdr *)skb->data; - pkh->data_len = skb->len - PKT_HDR_SIZE - pkh->meta_len + ETH_FCS_LEN; + pkh->data_len = skb->len - PKT_HDR_SIZE - pkh->meta_len + fcs_len; } /* Pad packet if needed */ - pad_len = ETH_ZLEN + ETH_FCS_LEN + tag_len; + pad_len = ETH_ZLEN + tag_len + fcs_len; if (pkh->data_len < pad_len && !(pkh->attrs & PDMA_TX_NO_PAD)) { pkh->data_len = pad_len; if (skb_padto(skb, - PKT_HDR_SIZE + pkh->meta_len + pkh->data_len - ETH_FCS_LEN)) { + PKT_HDR_SIZE + pkh->meta_len + pkh->data_len - fcs_len)) { if (!nskb) { *oskb = NULL; } @@ -1348,6 +1362,7 @@ ngknet_enet_open(struct net_device *ndev) /* Prevent tx timeout */ kal_netif_trans_update(ndev); + netif_carrier_on(ndev); netif_tx_wake_all_queues(ndev); return 0; @@ -1367,6 +1382,7 @@ ngknet_enet_stop(struct net_device *ndev) int gi, qi; netif_tx_stop_all_queues(ndev); + netif_carrier_off(ndev); if (priv->netif.id <= 0) { /* Stop rate limit */ @@ -2022,8 +2038,8 @@ ngknet_dev_probe(int dn, ngknet_netif_t *netif) hdl = &pdev->ctrl.grp[gi].intr_hdl[qi]; priv_hdl[hdl->unit][hdl->chan].hdl = hdl; hdl->priv = &priv_hdl[hdl->unit][hdl->chan]; - netif_napi_add(ndev, (struct napi_struct *)hdl->priv, - ngknet_poll); + kal_netif_napi_add(ndev, (struct napi_struct *)hdl->priv, + ngknet_poll, pdev->ctrl.budget); if (pdev->flags & PDMA_GROUP_INTR) { break; } @@ -2459,6 +2475,8 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ngknet_chan_cfg_t *chan_cfg = &iod.chan_cfg; ngknet_netif_t *netif = &iod.netif; ngknet_filter_t *filter = &iod.filter; + struct list_head *list = NULL; + dev_cb_t *dev_cb = NULL; char *data = NULL; int dt, gi, qi; @@ -2573,10 +2591,10 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) if (SHR_FAILURE((int)ioc.rc)) { break; } - if (dev->cbc->dev_init_cb) { - dev->cbc->dev_init_cb(&dev->dev_info); + list_for_each(list, &dev->cbc->dev_init_cb_list) { + dev_cb = list_entry(list, dev_cb_t, list); + dev_cb->cb(&dev->dev_info); } - if (kal_copy_to_user((void *)(unsigned long)ioc.op.data.buf, dev_cfg, ioc.op.data.len, sizeof(*dev_cfg))) { return -EFAULT; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild index d8ed4c27468..739743f7b0f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild @@ -37,6 +37,5 @@ ccflags-y := $(KNETCB_CPPFLAGS) $(LKM_CFLAGS) \ -I$(SDK)/linux/knet/generated \ $(INCLUDES) - linux_ngknetcb-y := $(SDK_PMD_KOBJS) \ ngknetcb_main.o diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c index f7501cf2962..eab43fe6ab0 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c @@ -1,15 +1,44 @@ /*! \file ngknetcb_main.c * * NGKNET Callback module entry. + * */ /* - * $Copyright: (c) 2024 Broadcom. - * Broadcom Proprietary and Confidential. All rights reserved.$ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. */ #include +#include +#include #include #include "bcmcnet/bcmcnet_core.h" + +#ifdef KPMD +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#endif /* KPMD */ + /*! \cond */ MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("NGKNET Callback Module"); @@ -35,6 +64,138 @@ MODULE_PARM_DESC(debug, #define FILTER_TAG_KEEP 1 #define FILTER_TAG_ORIGINAL 2 +#define NGKNET_CB_DBG_LVL_VERB 0x0001 +#define NGKNET_CB_DBG_LVL_PDMP 0x0002 +#define NGKNET_CB_DBG_LVL_WARN 0x0004 + +#ifndef KPMD +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + BCMDRD_DEV_T_##_bd, +/*! Enumeration for all base device types. */ +typedef enum { + BCMDRD_DEV_T_NONE = 0, +/*! \cond */ +#include +/*! \endcond */ + BCMDRD_DEV_T_COUNT +} bcmdrd_dev_type_t; + +/*! Create enumeration values from list of supported variants. */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ + BCMLRD_VARIANT_T_##_bd##_##_ve, + +/*! Enumeration for all device variants. */ +typedef enum bcmlrd_variant_e { + BCMLRD_VARIANT_T_NONE = 0, +/*! \cond */ +#include +/*! \endcond */ + BCMLRD_VARIANT_T_COUNT +} bcmlrd_variant_t; +#endif /* !KPMD */ + +typedef struct ngknetcb_dev_s { + bool initialized; + bcmdrd_dev_type_t dev_type; + bcmlrd_variant_t var_type; +} ngknetcb_dev_t; + +static ngknetcb_dev_t cb_dev[NUM_PDMA_DEV_MAX]; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + {#_bd, BCMDRD_DEV_T_##_bd}, +static const struct { + char *name; + bcmdrd_dev_type_t dev; +} device_types[] = { + {"device_none", BCMDRD_DEV_T_NONE}, +#include + {"device_count", BCMDRD_DEV_T_COUNT} +}; + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ + {#_bd, #_ve, BCMLRD_VARIANT_T_##_bd##_##_ve}, +static const struct { + char *dev_name; + char *var_name; + bcmlrd_variant_t var; +} variant_types[] = { + {"device_none", "variant_none", BCMLRD_VARIANT_T_NONE}, +#include + {"device_count", "variant_count", BCMLRD_VARIANT_T_COUNT} +}; + +#ifdef KPMD +/* + Change this structure to reflect the match_ids of interest. + This is an example of how it can be used. +*/ +typedef struct cb_match_id_s { + int egress_pkt_fwd_l2_hdr_etag; + int egress_pkt_fwd_l2_hdr_l2; + int ingress_pkt_inner_l2_hdr_l2; + int ingress_pkt_fwd_l2_hdr_etag; + int ingress_pkt_outer_l2_hdr_itag; + int ingress_pkt_outer_l2_hdr_otag; +} cb_match_id_t; + +static cb_match_id_t match_id; + +struct name_value_pair_s { + char *name; + int value; +}; + +static struct name_value_pair_s rxpmd_info[] = { + BCMPKT_RXPMD_FIELD_NAME_MAP_INIT +}; + +static const shr_enum_map_t reason_names[] = +{ + BCMPKT_REASON_NAME_MAP_INIT +}; + +static void +print_all_rxpmd_fields( + bcmdrd_dev_type_t dev_type, + const uint8_t *rxpmd) +{ + int rv, fid; + bcmpkt_rxpmd_fid_support_t support; + uint32_t val; + + printk("\n[RX metadata information]:\n"); + bcmpkt_rxpmd_fid_support_get(dev_type, &support); + + BCMPKT_RXPMD_FID_SUPPORT_ITER(support, fid) { + rv = bcmpkt_rxpmd_field_get + (dev_type, (uint32_t *)rxpmd, fid, &val); + if (rv == 0) { + printk(" %-26s = %10d [0x%X]\n", rxpmd_info[fid].name, val, val); + } + } +} + + +static void +print_all_rx_reason(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd) +{ + int reason, rv; + bcmpkt_rx_reasons_t reasons; + + if (rxpmd) { + BCMPKT_RX_REASON_CLEAR_ALL(reasons); + rv = bcmpkt_rxpmd_reasons_get(dev_type, rxpmd, &reasons); + if (rv == 0) { + BCMPKT_RX_REASON_ITER(reasons, reason) { + printk(" %s\n", reason_names[reason].name); + } + } + } +} +#endif /* KPMD */ + + /* Maintain tag strip statistics */ struct strip_stats_s { unsigned long stripped; /* Number of packets that have been stripped */ @@ -63,176 +224,131 @@ strip_vlan_tag(struct sk_buff *skb) } } -static uint32_t -dev_id_get(char* dev_type) -{ - uint32_t dev_id = 0xb880; - - if (0 == strcmp(dev_type, "bcm56880_a0")) - { - dev_id = 0xb880; - } - else if (0 == strcmp(dev_type, "bcm56780_a0")) - { - dev_id = 0xb780; - } - else if ((0 == strcmp(dev_type, "bcm56990_a0")) || - (0 == strcmp(dev_type, "bcm56990_b0"))) - { - dev_id = 0xb990; - } - else if ((0 == strcmp(dev_type, "bcm56996_a0")) || - (0 == strcmp(dev_type, "bcm56996_b0"))) - { - dev_id = 0xb996; - } - else if ((0== strcmp(dev_type, "bcm56995_a0")) || - (0== strcmp(dev_type, "bcm56999_a0"))) - { - dev_id = 0xb999; - } - else if ((0== strcmp(dev_type, "bcm56993_b0")) || - (0== strcmp(dev_type, "bcm56998_a0"))) - { - dev_id = 0xb993; - } - else if (0== strcmp(dev_type, "bcm78900_b0")) - { - dev_id = 0xf900; - } - else if (0== strcmp(dev_type, "bcm78905_a0")) - { - dev_id = 0xf905; - } - else if (0== strcmp(dev_type, "bcm78800_a0")) - { - dev_id = 0xf800; - } - return dev_id; -} - /* * The function get_tag_status() returns the tag status. - * 0 = Untagged - * 1 = Single inner-tag - * 2 = Single outer-tag - * 3 = Double tagged. + * 0 = Untagged + * 1 = Single inner-tag + * 2 = Single outer-tag + * 3 = Double tagged. * -1 = Unsupported type */ static int -get_tag_status(char* dev_type, char* dev_var, void *meta) +get_tag_status(uint32_t dev_type, uint32_t variant, void *rxpmd) { - uint32_t *valptr; - uint32_t fd_index; - uint32_t outer_l2_hdr; + int rv; + const char *tag_type[4] = { + "Untagged", + "Inner Tagged", + "Outer Tagged", + "Double Tagged" + }; int tag_status = -1; - uint32_t match_id_minbit = 1; - uint32_t outer_tag_match = 0x10; - uint32_t dev_id = 0xb880; - - dev_id = dev_id_get(dev_type); -#ifdef KNET_CB_DEBUG - if (debug & 0x1) { - printk("dev_type %s dev_var %s\n", dev_type, dev_var); - } -#endif - - if ((0xb880 == dev_id ) || (0xb780 == dev_id) || (0xf800 == dev_id)) - { - /* Field BCM_PKTIO_RXPMD_MATCH_ID_LO has tag status in RX PMD */ - fd_index = 2; - valptr = (uint32_t *)meta; - match_id_minbit = (dev_id == 0xb780) ? 2 : 1; - outer_l2_hdr = (valptr[fd_index] >> match_id_minbit & 0xFF); - outer_tag_match = (((dev_id == 0xb780) && - (((strncmp(dev_var, "DNA_", 4)) == 0)|| - ((strncmp(dev_var, "HNA_", 4)) == 0))) ? 0x8 : 0x10); - if (outer_l2_hdr & 0x1) { -#ifdef KNET_CB_DEBUG - if (debug & 0x1) { - printk(" L2 Header Present\n"); - } -#endif - tag_status = 0; - if (outer_l2_hdr & 0x4) { -#ifdef KNET_CB_DEBUG - if (debug & 0x1) { - printk(" SNAP/LLC\n"); - } -#endif - tag_status = 0; - } - if (outer_l2_hdr & outer_tag_match) { + bcmpkt_rxpmd_fid_support_t support; + uint32_t val = 0; + + bcmpkt_rxpmd_fid_support_get(dev_type, &support); + + if (BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_ING_TAG_TYPE)) { + rv = bcmpkt_rxpmd_field_get(dev_type, (uint32_t *)rxpmd, + BCMPKT_RXPMD_ING_TAG_TYPE, &val); + /* Tomahawk4 family */ + + /* + * Indicates the incoming tag status (INCOMING_TAG_STATUS): + * For single tag device: + * 0: untagged, 1: tagged + * For double tag device: + * 0: untagged, 1: single inner-tag, 2: single outer-tag, 3: double tagged + */ + if (SHR_SUCCESS(rv)) { + if (1 == val) { #ifdef KNET_CB_DEBUG - if (debug & 0x1) { - printk(" Outer Tagged\n"); + if (debug & 0x1){ + printk(" Incoming frame tagged\n"); } #endif - tag_status = 2; - if (outer_l2_hdr & 0x20) { + tag_status = 2; + } else if (0 == val) { #ifdef KNET_CB_DEBUG - if (debug & 0x1) { - printk(" Double Tagged\n"); - } -#endif - tag_status = 3; + if (debug & 0x1){ + printk(" Incoming frame untagged\n"); } - } - else if (outer_l2_hdr & 0x20) { -#ifdef KNET_CB_DEBUG - if (debug & 0x1) { - printk(" Inner Tagged\n"); - } #endif - tag_status = 1; + tag_status = 0; } } - } - else if ((dev_id == 0xb990)|| (dev_id == 0xb996) || - (dev_id == 0xb999)|| (dev_id == 0xb993) || - (dev_id == 0xf900)|| (dev_id == 0xf905)) - { - fd_index = 9; - valptr = (uint32_t *)meta; - /* On TH4, outer_l2_header means INCOMING_TAG_STATUS. - * TH4 only supports single tagging, so if TAG_STATUS - * says there's a tag, then we don't want to strip. - * Otherwise, we do. - */ - if ((dev_id == 0xf900) || (dev_id == 0xf905)) - { - outer_l2_hdr = (valptr[fd_index]) & 1; + } else if (BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_MATCH_ID_LO) && + BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_MATCH_ID_HI)) { + /* Trident4 family. */ + uint32_t match_id_data[2]; + bool itag = false, otag = false; + + bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_MATCH_ID_LO, + &match_id_data[0]); + bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_MATCH_ID_HI, + &match_id_data[1]); + rv = bcmpkt_rxpmd_match_id_present(variant, match_id_data, 2, + match_id.ingress_pkt_outer_l2_hdr_itag); + if (SHR_SUCCESS(rv)) { + itag = true; } - else - { - outer_l2_hdr = (valptr[fd_index] >> 13) & 3; + rv = bcmpkt_rxpmd_match_id_present(variant, match_id_data, 2, + match_id.ingress_pkt_outer_l2_hdr_otag); + if (SHR_SUCCESS(rv)) { + otag = true; } - if (outer_l2_hdr) - { + if (itag && otag) { + tag_status = 3; + } else if (itag) { + tag_status = 1; + } else if (otag) { tag_status = 2; -#ifdef KNET_CB_DEBUG - if (debug & 0x1) - { - printk(" Incoming frame tagged\n"); - } -#endif + } else { + tag_status = 0; + } + } else if (BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_ARC_ID_LO) && + BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_ARC_ID_HI)){ + /* Trident5 Family*/ + uint32_t match_id_data[2]; + bool itag = false, otag = false; + + bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_ARC_ID_LO, + &match_id_data[0]); + bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_ARC_ID_HI, + &match_id_data[1]); + rv = bcmpkt_rxpmd_match_id_from_arc_id_present(variant, match_id_data, 2, + match_id.ingress_pkt_outer_l2_hdr_itag); + if (SHR_SUCCESS(rv)) { + itag = true; + } + rv = bcmpkt_rxpmd_match_id_from_arc_id_present(variant, match_id_data, 2, + match_id.ingress_pkt_outer_l2_hdr_otag); + if (SHR_SUCCESS(rv)) { + otag = true; } - else - { + if (itag && otag) { + tag_status = 3; + } else if (itag) { + tag_status = 1; + } else if (otag) { + tag_status = 2; + } else { tag_status = 0; + } + } #ifdef KNET_CB_DEBUG - if (debug & 0x1) - { + if (debug & NGKNET_CB_DBG_LVL_VERB) { + if (tag_status != -1) { + if (tag_status == 0) { printk(" Incoming frame untagged\n"); + } else { + printk(" Incoming frame tagged: %s\n", tag_type[tag_status]); } -#endif + } else { + printk(" Unsupported tag type\n"); } } -#ifdef KNET_CB_DEBUG - if (debug & 0x1) { - printk("%s; Device Type: %s; tag status: %d\n", __func__, dev_type, tag_status); - } -#endif +#endif /* KNET_CB_DEBUG */ return tag_status; } @@ -284,24 +400,29 @@ strip_tag_rx_cb(struct sk_buff *skb) { const struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); int rcpu_mode = 0; - int tag_status; - + int tag_status, unit; + uint32_t dev_type = 0; + bcmlrd_variant_t var_type; + uint32_t *rxpmd = NULL; + + unit = cbd->dinfo->dev_no; + rxpmd = (uint32_t *)cbd->pmd; rcpu_mode = (cbd->netif->flags & NGKNET_NETIF_F_RCPU_ENCAP)? 1 : 0; #ifdef KNET_CB_DEBUG if (debug & 0x1) { printk(KERN_INFO - "\n%4u --------------------------------------------------------------------------------\n", - rx_count); + "\n%4u --------------------------------------------------------------------------------\n", + rx_count); printk(KERN_INFO - "RX KNET callback: dev_no=%1d; dev_id=:%6s; type_str=%4s; RCPU: %3s \n", - cbd->dinfo->dev_no, cbd->dinfo->var_str, cbd->dinfo->type_str, rcpu_mode ? "yes" : "no"); + "RX KNET callback: dev_no=%1d; dev_id=:%6s; type_str=%4s; RCPU: %3s \n", + cbd->dinfo->dev_no, cbd->dinfo->var_str, cbd->dinfo->type_str, rcpu_mode ? "yes" : "no"); printk(KERN_INFO " pkt_len=%4d; pmd_len=%2d; SKB len: %4d\n", - cbd->pkt_len, cbd->pmd_len, skb->len); - if (cbd->filt) { + cbd->pkt_len, cbd->pmd_len, skb->len); + if (cbd->filt) { printk(KERN_INFO "Filter user data: 0x%08x\n", - *(uint32_t *) cbd->filt->user_data); - } + *(uint32_t *) cbd->filt->user_data); + } printk(KERN_INFO "Before SKB (%d bytes):\n", skb->len); dump_buffer(skb->data, skb->len); printk("rx_cb for dev %d: id %s, %s\n", cbd->dinfo->dev_no, cbd->dinfo->var_str, cbd->dinfo->type_str); @@ -322,23 +443,39 @@ strip_tag_rx_cb(struct sk_buff *skb) #endif if ((!rcpu_mode) && (cbd->filt)) { - if (FILTER_TAG_ORIGINAL == cbd->filt->user_data[0]) { - tag_status = get_tag_status(cbd->dinfo->type_str, - cbd->dinfo->var_str, - (void *)cbd->pmd); - if (tag_status < 0) { - strip_stats.skipped++; - goto _strip_tag_rx_cb_exit; + if (cb_dev[unit].initialized) { + dev_type = cb_dev[unit].dev_type; + var_type = cb_dev[unit].var_type; + if (FILTER_TAG_ORIGINAL == cbd->filt->user_data[0]) { + tag_status = get_tag_status(dev_type, var_type, + (void *)rxpmd); + if (tag_status < 0) { + strip_stats.skipped++; + goto _strip_tag_rx_cb_exit; + } + strip_stats.checked++; + if (tag_status < 2) { + strip_stats.stripped++; + strip_vlan_tag(skb); + } } - strip_stats.checked++; - if (tag_status < 2) { + if (FILTER_TAG_STRIP == cbd->filt->user_data[0]) { strip_stats.stripped++; strip_vlan_tag(skb); } - } - if (FILTER_TAG_STRIP == cbd->filt->user_data[0]) { - strip_stats.stripped++; - strip_vlan_tag(skb); +#ifdef KNET_CB_DEBUG + if (debug & 0x1) { + printk("ngknetcb_main for dev %d:", cbd->dinfo->dev_no); + printk("type_str:%s dev_id: 0x%x variant: %s\n", + cbd->dinfo->type_str, cbd->dinfo->dev_id, variant_types[var_type].var_name); + printk("dev_type: %d\n", dev_type); + printk("variant: %d\n", var_type); + + print_all_rxpmd_fields(dev_type, (void *)rxpmd); + printk("\n[RX reasons]:\n"); + print_all_rx_reason(dev_type, (void *)rxpmd); + } +#endif } } _strip_tag_rx_cb_exit: @@ -361,7 +498,7 @@ strip_tag_tx_cb(struct sk_buff *skb) struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); if (debug & 0x1) { - printk("tx_cb for dev %d: %s\n", cbd->dinfo->dev_no, cbd->dinfo->type_str); + printk("tx_cb for dev %d: %s\n", cbd->dinfo->dev_no, cbd->dinfo->type_str); } show_pmd(cbd->pmd, cbd->pmd_len); show_mac(cbd->pmd + cbd->pmd_len); @@ -454,6 +591,103 @@ static struct proc_ops ngknetcb_proc_ops = { .proc_mmap = ngknetcb_mmap, }; +#ifdef KPMD +/* + Initialize the desired match_ids for use later in the code. +*/ +static void +init_match_ids(int unit) +{ + uint32_t val; + + match_id.egress_pkt_fwd_l2_hdr_etag = -1; + match_id.egress_pkt_fwd_l2_hdr_l2 = -1; + match_id.ingress_pkt_inner_l2_hdr_l2 = -1; + match_id.ingress_pkt_fwd_l2_hdr_etag = -1; + match_id.ingress_pkt_outer_l2_hdr_itag = -1; + match_id.ingress_pkt_outer_l2_hdr_otag = -1; + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "EGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) { + match_id.egress_pkt_fwd_l2_hdr_etag = val; + printk("EGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "EGRESS_PKT_FWD_L2_HDR_L2", &val) == 0) { + match_id.egress_pkt_fwd_l2_hdr_l2 = val; + printk("EGRESS_PKT_FWD_L2_HDR_L2: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_INNER_L2_HDR_L2", &val) == 0) { + match_id.ingress_pkt_inner_l2_hdr_l2 = val; + printk("INGRESS_PKT_INNER_L2_HDR_L2: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) { + match_id.ingress_pkt_fwd_l2_hdr_etag = val; + printk("INGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_OUTER_L2_HDR_ITAG", &val) == 0) { + match_id.ingress_pkt_outer_l2_hdr_itag = val; + printk("INGRESS_PKT_OUTER_L2_HDR_ITAG: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_OUTER_L2_HDR_OTAG", &val) == 0) { + match_id.ingress_pkt_outer_l2_hdr_otag = val; + printk("INGRESS_PKT_OUTER_L2_HDR_OTAG: %d\n", val); + } +} +#endif +/*! + * \brief Device Initialization Callback. + * + * The device initialization callback allows an external module to + * perform device-specific initialization in preparation for Tx and Rx + * packet processing. + * + * \param [in] dinfo Device information. + * + */ +static void +init_cb(ngknet_dev_info_t *dinfo) +{ + int unit; + bcmdrd_dev_type_t dt; + bcmlrd_variant_t var; + unit = dinfo->dev_no; + + if ((unsigned int)unit >= NUM_PDMA_DEV_MAX) { + return; + } + /* Update dev_type and variant type*/ + for (dt = 0; dt < BCMDRD_DEV_T_COUNT; dt++) { + if (!strcasecmp(dinfo->type_str, device_types[dt].name)) { + cb_dev[unit].dev_type = dt; + break; + } + } + + for (var = 0; var < BCMLRD_VARIANT_T_COUNT; var++) { + if ((!strcasecmp(dinfo->type_str, variant_types[var].dev_name)) && + (!strcasecmp(dinfo->var_str, variant_types[var].var_name))) { + cb_dev[unit].var_type = var; + break; + } + } +#ifdef KNET_CB_DEBUG + if (debug & 1) { + printk("init_cb unit %d, dev %s dev_id: 0x%x variant %s\n", + dinfo->dev_no, dinfo->type_str, dinfo->dev_id, dinfo->var_str); + printk("dev_type: %d\n", cb_dev[unit].dev_type); + printk("variant: %d\n", cb_dev[unit].var_type); + } +#endif /* KNET_CB_DEBUG */ + cb_dev[unit].initialized = true; +#ifdef KPMD + init_match_ids(unit); +#endif /* KPMD */ +} + static int __init ngknetcb_init_module(void) { @@ -472,7 +706,7 @@ ngknetcb_init_module(void) printk(KERN_ERR "%s: proc_mkdir failed\n", NGKNETCB_MODULE_NAME); } - + ngknet_dev_init_cb_register(init_cb); ngknet_rx_cb_register(ngknet_rx_cb); ngknet_tx_cb_register(ngknet_tx_cb); @@ -482,6 +716,7 @@ ngknetcb_init_module(void) static void __exit ngknetcb_exit_module(void) { + ngknet_dev_init_cb_unregister(init_cb); ngknet_rx_cb_unregister(ngknet_rx_cb); ngknet_tx_cb_unregister(ngknet_tx_cb); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Kbuild new file mode 100644 index 00000000000..2a260731f07 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Kbuild @@ -0,0 +1,17 @@ +# -*- Kbuild -*- +# +# Linux PTP Clock module. +# +# $Copyright:.$ +# + +obj-m := linux_ngptpclock.o + +ccflags-y := $(LKM_CFLAGS) \ + -I$(SDK)/shr/include \ + -I$(SDK)/bcmdrd/include \ + -I$(SDK)/linux/include \ + -I$(SDK)/linux/knet/include \ + -I$(SDK)/linux/knet + +linux_ngptpclock-y := ngptpclock_main.o diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Makefile new file mode 100644 index 00000000000..9757bbff804 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Makefile @@ -0,0 +1,19 @@ +# +# $Copyright: Broadcom Ltd.$ +# +# Linux PTP clock module. +# + +include Kbuild + +ifeq ($(KERNELRELEASE),) + +MOD_NAME = linux_ngptpclock + +include $(SDK)/make/lkm.mk + +endif + +.PHONY: distclean + +distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/ngptpclock_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/ngptpclock_main.c new file mode 100644 index 00000000000..2ed0e48fcf0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/ngptpclock_main.c @@ -0,0 +1,3042 @@ +/*! \file ngptpclock_main.c + * + * NGPTPCLOCK module. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("PTP Clock Driver for Broadcom XGS Switch"); +MODULE_LICENSE("GPL"); + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,0) +#define NGPTPCLOCK_SUPPORT +#endif + +#ifdef NGPTPCLOCK_SUPPORT +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +/* Configuration Parameters */ +static int debug; +module_param(debug, int, 0); +MODULE_PARM_DESC(debug, + "Debug level (default 0)"); + +static int network_transport; +module_param(network_transport, int, 0); +MODULE_PARM_DESC(network_transport, + "Transport Type (default - Detect from packet)"); + +static char *base_dev_name = "ptp0"; +module_param(base_dev_name, charp, 0); +MODULE_PARM_DESC(base_dev_name, + "Base device name like ptp0, ptp1, etc.(default ptp0)"); + +static int fw_core; +module_param(fw_core, int, 0); +MODULE_PARM_DESC(fw_core, + "Firmware core (default 0)"); + +static int pci_cos; + +/* Debug levels */ +#define DBG_LVL_VERB 0x1 +#define DBG_LVL_WARN 0x2 +#define DBG_LVL_TXTS 0x4 +#define DBG_LVL_CMDS 0x8 +#define DBG_LVL_TX 0x10 +#define DBG_LVL_RX 0x20 +#define DBG_LVL_TX_DUMP 0x40 +#define DBG_LVL_RX_DUMP 0x80 + +#define DBG_VERB(_s) do { if (debug & DBG_LVL_VERB) printk _s; } while (0) +#define DBG_WARN(_s) do { if (debug & DBG_LVL_WARN) printk _s; } while (0) +#define DBG_TXTS(_s) do { if (debug & DBG_LVL_TXTS) printk _s; } while (0) +#define DBG_CMDS(_s) do { if (debug & DBG_LVL_CMDS) printk _s; } while (0) +#define DBG_TX(_s) do { if (debug & DBG_LVL_TX) printk _s; } while (0) +#define DBG_RX(_s) do { if (debug & DBG_LVL_RX) printk _s; } while (0) +#define DBG_TX_DUMP(_s) do { if (debug & DBG_LVL_TX_DUMP) printk _s; } while (0) +#define DBG_RX_DUMP(_s) do { if (debug & DBG_LVL_RX_DUMP) printk _s; } while (0) +#define DBG_ERR(_s) do { if (1) printk _s; } while (0) + +#define DMA_DEV device +#define DMA_ALLOC_COHERENT(d,s,h) dma_alloc_coherent(d,s,h,GFP_ATOMIC|GFP_DMA32) +#define DMA_FREE_COHERENT(d,s,a,h) dma_free_coherent(d,s,a,h) + +/* Type length in bytes */ +#define NGPTPCLOCK_PACKLEN_U8 1 +#define NGPTPCLOCK_PACKLEN_U16 2 +#define NGPTPCLOCK_PACKLEN_U24 3 +#define NGPTPCLOCK_PACKLEN_U32 4 + +#define NGPTPCLOCK_UNPACK_U8(_buf, _var) \ + _var = *_buf++ + +#define NGPTPCLOCK_UNPACK_U16(_buf, _var) \ + do { \ + (_var) = (((_buf)[0] << 8) | \ + (_buf)[1]); \ + (_buf) += NGPTPCLOCK_PACKLEN_U16; \ + } while (0) + +#define NGPTPCLOCK_UNPACK_U24(_buf, _var) \ + do { \ + (_var) = (((_buf)[0] << 16) | \ + ((_buf)[1] << 8) | \ + (_buf)[2]); \ + (_buf) += NGPTPCLOCK_PACKLEN_U24; \ + } while (0) + +#define NGPTPCLOCK_UNPACK_U32(_buf, _var) \ + do { \ + (_var) = (((_buf)[0] << 24) | \ + ((_buf)[1] << 16) | \ + ((_buf)[2] << 8) | \ + (_buf)[3]); \ + (_buf) += NGPTPCLOCK_PACKLEN_U32; \ + } while (0) + + +/* FIXME : SDKLT-38745 + * Check for cmic type dynamically + */ +#define CMICX_DEV_TYPE 1 + +/* CMIC MCS-0 SCHAN Messaging registers */ +/* Core0:CMC1 Core1:CMC2 */ +#define CMIC_CMC_BASE \ + (CMICX_DEV_TYPE ? (fw_core ? 0x10400 : 0x10300) : \ + (fw_core ? 0x33000 : 0x32000)) + +#define CMIC_CMC_SCHAN_MESSAGE_10r(BASE) (BASE + 0x00000034) +#define CMIC_CMC_SCHAN_MESSAGE_11r(BASE) (BASE + 0x00000038) +#define CMIC_CMC_SCHAN_MESSAGE_12r(BASE) (BASE + 0x0000003c) +#define CMIC_CMC_SCHAN_MESSAGE_13r(BASE) (BASE + 0x00000040) +#define CMIC_CMC_SCHAN_MESSAGE_14r(BASE) (BASE + 0x00000044) +#define CMIC_CMC_SCHAN_MESSAGE_15r(BASE) (BASE + 0x00000048) +#define CMIC_CMC_SCHAN_MESSAGE_16r(BASE) (BASE + 0x0000004c) +#define CMIC_CMC_SCHAN_MESSAGE_17r(BASE) (BASE + 0x00000050) +#define CMIC_CMC_SCHAN_MESSAGE_18r(BASE) (BASE + 0x00000054) +#define CMIC_CMC_SCHAN_MESSAGE_19r(BASE) (BASE + 0x00000058) +#define CMIC_CMC_SCHAN_MESSAGE_20r(BASE) (BASE + 0x0000005c) +#define CMIC_CMC_SCHAN_MESSAGE_21r(BASE) (BASE + 0x00000060) + +static u32 hostcmd_regs[5] = { 0 }; + +#define NGPTPCLOCK_NUM_PORTS 128 /* NUM_PORTS where 2-step is supported. */ +#define NGPTPCLOCK_MAX_NUM_PORTS 256 /* Max ever NUM_PORTS in the system. */ +#define NGPTPCLOCK_MAX_MTP_IDX 8 /* Max number of mtps in the system. */ + +/* Service request commands to Firmware. */ +enum { + NGPTPCLOCK_DONE = 0x0, + NGPTPCLOCK_INIT = 0x1, + NGPTPCLOCK_CLEANUP = 0x2, + NGPTPCLOCK_GETTIME = 0x3, + NGPTPCLOCK_SETTIME = 0x4, + NGPTPCLOCK_FREQCOR = 0x5, + NGPTPCLOCK_PBM_UPDATE = 0x6, + NGPTPCLOCK_ADJTIME = 0x7, + NGPTPCLOCK_GET_TSTIME = 0x8, + NGPTPCLOCK_MTP_TS_UPDATE_ENABLE = 0x9, + NGPTPCLOCK_MTP_TS_UPDATE_DISABLE = 0xa, + NGPTPCLOCK_ACK_TSTIME = 0xb, + NGPTPCLOCK_SYSINFO = 0xc, + NGPTPCLOCK_BROADSYNC = 0xd, + NGPTPCLOCK_GPIO = 0xe, + NGPTPCLOCK_EVLOG = 0xf, + NGPTPCLOCK_EXTTSLOG = 0x10, + NGPTPCLOCK_GET_EXTTS_BUFF = 0x11, + NGPTPCLOCK_GPIO_PHASEOFFSET = 0x12, +}; + +enum { + NGPTPCLOCK_SYSINFO_UC_PORT_NUM = 0x1, + NGPTPCLOCK_SYSINFO_UC_PORT_SYSPORT = 0x2, + NGPTPCLOCK_SYSINFO_HOST_CPU_PORT = 0x3, + NGPTPCLOCK_SYSINFO_HOST_CPU_SYSPORT = 0x4, + NGPTPCLOCK_SYSINFO_UDH_LEN = 0x5, +}; + +enum { + NGPTPCLOCK_BROADSYNC_BS0_CONFIG = 0x1, + NGPTPCLOCK_BROADSYNC_BS1_CONFIG = 0x2, + NGPTPCLOCK_BROADSYNC_BS0_STATUS_GET = 0x3, + NGPTPCLOCK_BROADSYNC_BS1_STATUS_GET = 0x4, +}; + +enum { + NGPTPCLOCK_GPIO_0 = 0x1, + NGPTPCLOCK_GPIO_1 = 0x2, + NGPTPCLOCK_GPIO_2 = 0x3, + NGPTPCLOCK_GPIO_3 = 0x4, + NGPTPCLOCK_GPIO_4 = 0x5, + NGPTPCLOCK_GPIO_5 = 0x6, +}; + +/* 1588 message types. */ +enum +{ + IEEE1588_MSGTYPE_SYNC = 0x0, + IEEE1588_MSGTYPE_DELREQ = 0x1, + IEEE1588_MSGTYPE_PDELREQ = 0x2, + IEEE1588_MSGTYPE_PDELRESP = 0x3, + /* reserved 0x4 */ + /* reserved 0x5 */ + /* reserved 0x6 */ + /* reserved 0x7 */ + IEEE1588_MSGTYPE_FLWUP = 0x8, + IEEE1588_MSGTYPE_DELRESP = 0x9, + IEEE1588_MSGTYPE_PDELRES_FLWUP = 0xA, + IEEE1588_MSGTYPE_ANNOUNCE = 0xB, + IEEE1588_MSGTYPE_SGNLNG = 0xC, + IEEE1588_MSGTYPE_MNGMNT = 0xD + /* reserved 0xE */ + /* reserved 0xF */ +}; + +/* Usage macros */ +#define ONE_BILLION (1000000000) + +#define SKB_U16_GET(_skb, _pkt_offset) \ + ((_skb->data[_pkt_offset] << 8) | _skb->data[_pkt_offset + 1]) + +#define NGPTPCLOCK_PTP_EVENT_MSG(_ptp_msg_type) \ + ((_ptp_msg_type == IEEE1588_MSGTYPE_DELREQ) || \ + (_ptp_msg_type == IEEE1588_MSGTYPE_SYNC)) + +/* + * IEEE1588 packet hardware specific information. + * 4 words of information used from this data set. + * 0 - 3: 2-step untagged. + * 4 - 7: 2-step tagged. + * 8 - 11: 1-step untagged. + * 12 - 15: 1-step tagged. + * 16 - 19: 1-step untagged with ITS-set. + * 20 - 23: 1-step tagged with ITS-set. + * + * Refer to device specific reg file for SOBMH header information. + * Below fields are considered: + * SOBMH => { + * IEEE1588_ONE_STEP_ENABLE - OneStep + * IEEE1588_REGEN_UDP_CHECKSUM - Regen UDP Checksum + * IEEE1588_INGRESS_TIMESTAMP_SIGN - ITS + * TX_TS - TwoStep + * IEEE1588_TIMESTAMP_HDR_OFFSET - 1588 header offset + * } + * + */ +static uint32_t ieee1588_l2pkt_md[24] = {0}; +static uint32_t ieee1588_ipv4pkt_md[24] = {0}; +static uint32_t ieee1588_ipv6pkt_md[24] = {0}; + +/* Driver Proc Entry root */ +static struct proc_dir_entry *ngptpclock_proc_root = NULL; + +/* Shared data structures with R5 */ +typedef struct ngptpclock_tx_ts_data_s { + u32 ts_valid; /* Timestamp valid indication */ + u32 port_id; /* Port number */ + u32 ts_seq_id; /* Sequency Id */ + u32 ts_cnt; + u64 timestamp; /* Timestamp */ +} ngptpclock_tx_ts_data_t; + +typedef struct ngptpclock_info_s { + u32 ksyncinit; + u32 dev_id; + s64 freqcorr; + u64 portmap[NGPTPCLOCK_MAX_NUM_PORTS/64]; /* Two-step enabled ports */ + u64 ptptime; + u64 reftime; + u64 ptptime_alt; + u64 reftime_alt; + s64 phase_offset; + ngptpclock_tx_ts_data_t port_ts_data[NGPTPCLOCK_MAX_NUM_PORTS]; +} ngptpclock_info_t; + + +enum { + TS_EVENT_CPU = 0, + TS_EVENT_BSHB_0 = 1, + TS_EVENT_BSHB_1 = 2, + TS_EVENT_GPIO_1 = 3, + TS_EVENT_GPIO_2 = 4, + TS_EVENT_GPIO_3 = 5, + TS_EVENT_GPIO_4 = 6, + TS_EVENT_GPIO_5 = 7, + TS_EVENT_GPIO_6 = 8, +}; + +#define NUM_TS_EVENTS 14 + +/* FW timestamps. + * This declaration has to match with HFT_t_TmStmp + * defined in the firmware. Otherwise, DMA will fail. + */ +typedef struct fw_tstamp_s { + u64 sec; + u32 nsec; +} __attribute__ ((packed)) fw_tstamp_t; + +typedef struct ngptpclock_fw_debug_event_tstamps_s { + fw_tstamp_t prv_tstamp; + fw_tstamp_t cur_tstamp; +} __attribute__ ((packed)) ngptpclock_fw_debug_event_tstamps_t; + +typedef struct ngptpclock_evlog_s { + ngptpclock_fw_debug_event_tstamps_t event_timestamps[NUM_TS_EVENTS]; +} __attribute__ ((packed)) ngptpclock_evlog_t; + + +/* Timestamps for EXTTS from Firmware */ +/* gpio0 = event0 ..... gpio5 = event5 */ +#define NUM_EXT_TS 6 +/* Directly mapped to PTP_MAX_TIMESTAMPS from ptp_private.h */ +#define NUM_EVENT_TS 128 +typedef struct ngptpclock_fw_extts_event_s { + u32 ts_event_id; + fw_tstamp_t tstamp; +} __attribute__ ((packed)) ngptpclock_fw_extts_event_t; + +typedef struct ngptpclock_extts_log_s { + u32 head; /* Read pointer - Updated by HOST */ + u32 tail; /* Write pointer - Updated by FW */ + ngptpclock_fw_extts_event_t event_ts[NUM_EVENT_TS]; + u32 overflow; +} __attribute__ ((packed)) ngptpclock_fw_extts_log_t; + +struct ngptpclock_extts_event { + int enable[NUM_EXT_TS]; + int head; +}; + +typedef struct ngptpclock_port_stats_s { + u32 pkt_rxctr; /* All ingress packets */ + u32 pkt_txctr; /* All egress packets */ + u32 pkt_txonestep; /* 1-step Tx packets counter */ + u32 tsts_match; /* 2-Step tstamp req matches */ + u32 tsts_timeout; /* 2-Step tstamp req timeouts */ + u32 tsts_discard; /* 2-Step tstamp req discards */ + u32 osts_event_pkts; /* 1-step event packet counter */ + u32 osts_tstamp_reqs; /* 1-step events with tstamp request */ + u32 fifo_rxctr; /* 2-Step tstamp req matches */ + u64 tsts_best_fetch_time; /* 1-step events with tstamp request */ + u64 tsts_worst_fetch_time; /* 1-step events with tstamp request */ + u32 tsts_avg_fetch_time; /* 1-step events with tstamp request */ +} ngptpclock_port_stats_t; + +typedef struct ngptpclock_init_info_s { + u32 pci_knetsync_cos; + u32 uc_port_num; + u32 uc_port_sysport; + u32 host_cpu_port; + u32 host_cpu_sysport; + u32 udh_len; +} ngptpclock_init_info_t; + +typedef struct ngptpclock_bs_info_s { + u32 enable; + u32 mode; + u32 bc; + u32 hb; +} ngptpclock_bs_info_t; + +typedef struct ngptpclock_gpio_info_s { + u32 enable; + u32 mode; + u32 period; + int64_t phase_offset; +} ngptpclock_gpio_info_t; + +typedef struct ngptpclock_evlog_info_s { + u32 enable; +} ngptpclock_evlog_info_t; + +/* Clock Private Data */ +struct ngptpclock_ptp_priv { + struct device dev; + int dcb_type; + struct ptp_clock *ptp_clock; + struct ptp_clock_info ptp_caps; + struct mutex ptp_lock; + int ptp_pair_lock; + volatile void *base_addr; /* Address for PCI register access. */ + volatile ngptpclock_info_t *shared_addr; /* address for shared memory access. */ + volatile ngptpclock_evlog_t *evlog; /* dma-able address for fw updates. */ + dma_addr_t dma_mem; + int dma_mem_size; + struct DMA_DEV *dma_dev; /* Required for DMA memory control. */ + int num_pports; + int timekeep_status; + u32 mirror_encap_bmp; + struct delayed_work time_keep; + ngptpclock_port_stats_t *port_stats; + ngptpclock_init_info_t ngptpclock_init_info; + ngptpclock_bs_info_t ngptpclock_bs_info[2]; + ngptpclock_gpio_info_t ngptpclock_gpio_info[6]; + ngptpclock_evlog_info_t ngptpclock_evlog_info[NUM_TS_EVENTS]; + volatile ngptpclock_fw_extts_log_t *extts_log; + struct ngptpclock_extts_event extts_event; + struct delayed_work extts_logging; + struct kobject *kobj; +}; + +static struct ngptpclock_ptp_priv *ptp_priv; +static volatile int module_initialized; +#if defined(TWO_STEP_SUPPORT) +static int num_retries = 10; /* Retry count */ +#endif + +static void ngptpclock_ptp_time_keep_init(void); +static void ngptpclock_ptp_time_keep_cleanup(void); +static int ngptpclock_ptp_gettime(struct ptp_clock_info *ptp, + struct timespec64 *ts); + +static void ngptpclock_ptp_extts_logging_init(void); +static void ngptpclock_ptp_extts_logging_cleanup(void); + +#if defined(CMIC_SOFT_BYTE_SWAP) + +#define CMIC_SWAP32(_x) ((((_x) & 0xff000000) >> 24) \ + | (((_x) & 0x00ff0000) >> 8) \ + | (((_x) & 0x0000ff00) << 8) \ + | (((_x) & 0x000000ff) << 24)) + +#define DEV_READ32(_d, _a, _p) \ + do { \ + uint32_t _data; \ + _data = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \ + *(_p) = CMIC_SWAP32(_data); \ + } while (0) + +#define DEV_WRITE32(_d, _a, _v) \ + do { \ + uint32_t _data = CMIC_SWAP32(_v); \ + ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_data); \ + } while (0) + +#else + +#define DEV_READ32(_d, _a, _p) \ + do { \ + *(_p) = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \ + } while (0) + +#define DEV_WRITE32(_d, _a, _v) \ + do { \ + ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_v); \ + } while (0) +#endif /* defined(CMIC_SOFT_BYTE_SWAP) */ + +static void +ptp_usleep(int usec) +{ + usleep_range(usec, usec+1); +} + +static void +ptp_sleep(int jiffies) +{ + wait_queue_head_t wq; + init_waitqueue_head(&wq); + + wait_event_timeout(wq, 0, jiffies); +} + +/** + * ngptpclock_hostcmd_data_op + * + * @setget: If valid then set and get the data. + * @d1: data pointer one. + * @d2: data pointer two. + * + * Description: This function is used send and receive the + * data from the FW. + */ +static void +ngptpclock_hostcmd_data_op(int setget, u64 *d1, u64 *d2) +{ + u32 w0, w1; + u64 data; + + if (!d1) { + return; + } + + if (setget) { + if (d1) { + data = *d1; + w0 = (data & 0xFFFFFFFF); + w1 = (data >> 32); + DEV_WRITE32(ptp_priv, hostcmd_regs[1], w0); + DEV_WRITE32(ptp_priv, hostcmd_regs[2], w1); + } + + if (d2) { + data = *d2; + + w0 = (data & 0xFFFFFFFF); + w1 = (data >> 32); + DEV_WRITE32(ptp_priv, hostcmd_regs[3], w0); + DEV_WRITE32(ptp_priv, hostcmd_regs[4], w1); + } + } else { + if (d1) { + DEV_READ32(ptp_priv, hostcmd_regs[1], &w0); + DEV_READ32(ptp_priv, hostcmd_regs[2], &w1); + data = (((u64)w1 << 32) | (w0)); + *d1 = data; + } + + if (d2) { + DEV_READ32(ptp_priv, hostcmd_regs[3], &w0); + DEV_READ32(ptp_priv, hostcmd_regs[4], &w1); + data = (((u64)w1 << 32) | (w0)); + *d2 = data; + } + } +} + +static int +ngptpclock_cmd_go(u32 cmd, void *data0, void *data1) +{ + int ret = -1; + int retry_cnt = 1000; + u32 cmd_status; + char cmd_str[48]; + int port = 0; + uint32_t seq_id = 0; + ktime_t start, now; + u32 subcmd = 0; + + if (ptp_priv == NULL || ptp_priv->shared_addr == NULL) { + return ret; + } + + mutex_lock(&ptp_priv->ptp_lock); + + if (cmd == NGPTPCLOCK_GET_TSTIME || cmd == NGPTPCLOCK_ACK_TSTIME) { + port = *((uint64_t *)data0) & 0xFFF; + seq_id = *((uint64_t*)data0) >> 16; + } + start = ktime_get(); + + ptp_priv->shared_addr->ksyncinit = cmd; + + /* init data */ + DEV_WRITE32(ptp_priv, hostcmd_regs[1], 0x0); + DEV_WRITE32(ptp_priv, hostcmd_regs[2], 0x0); + DEV_WRITE32(ptp_priv, hostcmd_regs[3], 0x0); + DEV_WRITE32(ptp_priv, hostcmd_regs[4], 0x0); + + switch (cmd) { + case NGPTPCLOCK_INIT: + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_INIT"); + ptp_priv->shared_addr->phase_offset = 0; + ngptpclock_hostcmd_data_op(1, + (u64 *)&(ptp_priv->shared_addr->phase_offset), + 0); + break; + case NGPTPCLOCK_FREQCOR: + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_FREQCORR"); + ptp_priv->shared_addr->freqcorr = *((s32 *)data0); + ngptpclock_hostcmd_data_op(1, + (u64 *)&(ptp_priv->shared_addr->freqcorr), + 0); + break; + case NGPTPCLOCK_ADJTIME: + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_ADJTIME"); + ptp_priv->shared_addr->phase_offset = *((s64 *)data0); + ngptpclock_hostcmd_data_op(1, + (u64 *)&(ptp_priv->shared_addr->phase_offset), + 0); + break; + case NGPTPCLOCK_GETTIME: + retry_cnt = (retry_cnt * 2); + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_GETTIME"); + break; + case NGPTPCLOCK_GET_TSTIME: + retry_cnt = (retry_cnt * 2); + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_GET_TSTIME"); + ngptpclock_hostcmd_data_op(1, data0, data1); + break; + case NGPTPCLOCK_ACK_TSTIME: + retry_cnt = (retry_cnt * 2); + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_ACK_TSTIME"); + ngptpclock_hostcmd_data_op(1, data0, data1); + break; + case NGPTPCLOCK_SETTIME: + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_SETTIME"); + ptp_priv->shared_addr->ptptime = *((s64 *)data0); + ptp_priv->shared_addr->phase_offset = 0; + ngptpclock_hostcmd_data_op(1, + (u64 *)&(ptp_priv->shared_addr->ptptime), + (u64 *)&(ptp_priv->shared_addr->phase_offset)); + break; + case NGPTPCLOCK_MTP_TS_UPDATE_ENABLE: + retry_cnt = (retry_cnt * 6); + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_MTP_TS_UPDATE_ENABLE"); + ngptpclock_hostcmd_data_op(1, (u64 *)data0, 0); + break; + case NGPTPCLOCK_MTP_TS_UPDATE_DISABLE: + retry_cnt = (retry_cnt * 6); + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_MTP_TS_UPDATE_DISABLE"); + ngptpclock_hostcmd_data_op(1, (u64 *)data0, 0); + break; + case NGPTPCLOCK_CLEANUP: + retry_cnt = (retry_cnt * 4); + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_CLEANUP"); + break; + case NGPTPCLOCK_SYSINFO: + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_SYSINFO"); + ngptpclock_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case NGPTPCLOCK_BROADSYNC: + subcmd = *((u32 *)data0); + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_BROADSYNC"); + ngptpclock_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case NGPTPCLOCK_GPIO: + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_GPIO"); + ngptpclock_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case NGPTPCLOCK_EVLOG: + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_EVLOG"); + ngptpclock_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case NGPTPCLOCK_EXTTSLOG: + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_EXTTSLOG"); + ngptpclock_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case NGPTPCLOCK_GET_EXTTS_BUFF: + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_GET_EXTTS_BUFF"); + ngptpclock_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case NGPTPCLOCK_GPIO_PHASEOFFSET: + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_GPIO_PHASEOFFSET"); + ngptpclock_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + default: + snprintf(cmd_str, sizeof(cmd_str), "NGPTPCLOCK_XXX"); + break; + } + + DEV_WRITE32(ptp_priv, hostcmd_regs[0], ptp_priv->shared_addr->ksyncinit); + + do { + DEV_READ32(ptp_priv, hostcmd_regs[0], &cmd_status); + ptp_priv->shared_addr->ksyncinit = cmd_status; + + if (cmd_status == NGPTPCLOCK_DONE) { + ret = 0; + switch (cmd) { + case NGPTPCLOCK_GET_TSTIME: + case NGPTPCLOCK_GETTIME: + ngptpclock_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1); + break; + /* Get the host ram address from fw.*/ + case NGPTPCLOCK_GET_EXTTS_BUFF: + ngptpclock_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1); + break; + case NGPTPCLOCK_BROADSYNC: + if ((subcmd == NGPTPCLOCK_BROADSYNC_BS0_STATUS_GET) || + (subcmd == NGPTPCLOCK_BROADSYNC_BS1_STATUS_GET)) { + ngptpclock_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1); + } + break; + default: + break; + } + break; + } + ptp_usleep(100); + retry_cnt--; + } while (retry_cnt); + + now = ktime_get(); + mutex_unlock(&ptp_priv->ptp_lock); + + if (retry_cnt == 0) { + DBG_ERR(("Timeout on response from R5 to cmd %s time taken %lld us\n", + cmd_str, ktime_us_delta(now, start))); + if (cmd == NGPTPCLOCK_GET_TSTIME) { + DBG_TXTS(("Timeout Port %d SeqId %d\n", port, seq_id)); + } + } + + if (debug & DBG_LVL_CMDS) { + if (ktime_us_delta(now, start) > 5000) + DBG_CMDS(("R5 Command %s exceeded time expected (%lld us)\n", + cmd_str, ktime_us_delta(now, start))); + } + + DBG_CMDS(("ngptpclock_cmd_go: cmd:%s rv:%d\n", cmd_str, ret)); + + return ret; +} + + +/** + * ngptpclock_ptp_adjfreq + * + * @ptp: pointer to ptp_clock_info structure + * @ppb: frequency correction value + * + * Description: this function will set the frequency correction + */ +static int ngptpclock_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +{ + int ret = -1; + + ret = ngptpclock_cmd_go(NGPTPCLOCK_FREQCOR, &ppb, NULL); + DBG_VERB(("ptp_adjfreq: applying freq correction: %x; rv:%d\n", ppb, ret)); + + return ret; +} + +/** + * ngptpclock_ptp_adjtime + * + * @ptp: pointer to ptp_clock_info structure + * @delta: desired change in nanoseconds + * + * Description: this function will shift/adjust the hardware clock time. + */ +static int ngptpclock_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +{ + int ret = -1; + + ret = ngptpclock_cmd_go(NGPTPCLOCK_ADJTIME, (void *)&delta, NULL); + DBG_VERB(("ptp_adjtime: adjtime: 0x%llx; rv:%d\n", delta, ret)); + + return ret; +} + +/** + * ngptpclock_ptp_gettime + * + * @ptp: pointer to ptp_clock_info structure + * @ts: pointer to hold time/result + * + * Description: this function will read the current time from the + * hardware clock and store it in @ts. + */ +static int ngptpclock_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts) +{ + int ret = -1; + s64 reftime = 0; + s64 refctr = 0; + static u64 prv_reftime = 0, prv_refctr = 0; + u64 diff_reftime = 0, diff_refctr = 0; + + ret = ngptpclock_cmd_go(NGPTPCLOCK_GETTIME, (void *)&reftime, (void *)&refctr); + if (ret == 0) { + DBG_VERB(("ptp_gettime: gettime: 0x%llx refctr:0x%llx\n", reftime, refctr)); + + ptp_priv->shared_addr->ptptime_alt = ptp_priv->shared_addr->ptptime; + ptp_priv->shared_addr->reftime_alt = ptp_priv->shared_addr->reftime; + + ptp_priv->ptp_pair_lock = 1; + ptp_priv->shared_addr->ptptime = reftime; + ptp_priv->shared_addr->reftime = refctr; + ptp_priv->ptp_pair_lock = 0; + + diff_reftime = reftime - prv_reftime; + diff_refctr = refctr - prv_refctr; + + if (diff_reftime != diff_refctr) { + DBG_WARN(("PTP-GETTIME ptptime: 0x%llx reftime: 0x%llx " + "prv_ptptime: 0x%llx prv_reftime: 0x%llx \n", + ptp_priv->shared_addr->ptptime, + ptp_priv->shared_addr->reftime, + diff_reftime, diff_refctr)); + } + prv_reftime = reftime; + prv_refctr = refctr; + + *ts = ns_to_timespec64(reftime); + } + return ret; +} + + +/** + * ngptpclock_ptp_settime + * + * @ptp: pointer to ptp_clock_info structure + * @ts: time value to set + * + * Description: this function will set the current time on the + * hardware clock. + */ +static int ngptpclock_ptp_settime(struct ptp_clock_info *ptp, + const struct timespec64 *ts) +{ + s64 reftime, phaseadj; + int ret = -1; + + phaseadj = 0; + reftime = timespec64_to_ns(ts); + + ret = ngptpclock_cmd_go(NGPTPCLOCK_SETTIME, (void *)&reftime, (void *)&phaseadj); + DBG_VERB(("ptp_settime: settime: 0x%llx; rv:%d\n", reftime, ret)); + + return ret; +} + +static int ngptpclock_exttslog_cmd(int event, int enable) +{ + int ret; + u64 subcmd = 0, subcmd_data = 0; + + if (NULL == ptp_priv->extts_log) { + ret = ngptpclock_cmd_go(NGPTPCLOCK_GET_EXTTS_BUFF, + &subcmd, &subcmd_data); + DBG_VERB(("ngptpclock_exttslog_cmd: Get EXTTS buff: \ + subcmd_data:0x%llx\n", subcmd_data)); + + ptp_priv->extts_log = + (ngptpclock_fw_extts_log_t *)ngedk_dmamem_map_p2v(subcmd_data); + if (NULL == ptp_priv->extts_log) { + DBG_ERR(("Failed to get virtual addr for the physical address\n")); + } + } + + /* upper 32b -> event + * lower 32b -> enable/disable */ + subcmd = (u64)event << 32 | enable; + + ret = ngptpclock_cmd_go(NGPTPCLOCK_EXTTSLOG, &subcmd, &subcmd_data); + DBG_VERB(("exttslog_cmd: subcmd: 0x%llx subcmd_data: 0x%llx rv:%d\n", + subcmd, subcmd_data, ret)); + + return ret; +} + +static int ngptpclock_ptp_enable(struct ptp_clock_info *ptp, + struct ptp_clock_request *rq, int on) +{ + int mapped_event = -1; + int enable = on ? 1 : 0; + + switch (rq->type) { + case PTP_CLK_REQ_EXTTS: + if (rq->extts.index < NUM_EXT_TS) { + switch (rq->extts.index) { + /* Map EXTTS event_id to FW event_id */ + case 0: + mapped_event = TS_EVENT_GPIO_1; + break; + case 1: + mapped_event = TS_EVENT_GPIO_2; + break; + case 2: + mapped_event = TS_EVENT_GPIO_3; + break; + case 3: + mapped_event = TS_EVENT_GPIO_4; + break; + case 4: + mapped_event = TS_EVENT_GPIO_5; + break; + case 5: + mapped_event = TS_EVENT_GPIO_6; + break; + default: + return -EINVAL; + } + + /* Reject request for unsupported flags */ + if (rq->extts.flags & ~(PTP_ENABLE_FEATURE | PTP_RISING_EDGE)) { + return -EOPNOTSUPP; + } + + ptp_priv->extts_event.enable[rq->extts.index] = enable; + + ngptpclock_exttslog_cmd(mapped_event, enable); + + DBG_VERB(("Event state change req_index:%u state:%d\n", + rq->extts.index, enable)); + } else { + return -EINVAL; + } + break; + default: + return -EOPNOTSUPP; + } + + return 0; +} + +#if defined(MIRROR_ENCAP_SUPPORT) +static int ngptpclock_ptp_mirror_encap_update(struct ptp_clock_info *ptp, + int mtp_idx, int start) +{ + int ret = -1; + u64 mirror_encap_idx; + u32 cmd_status; + + if (mtp_idx > NGPTPCLOCK_MAX_MTP_IDX) { + return ret; + } + + mirror_encap_idx = mtp_idx; + if (start) { + cmd_status = NGPTPCLOCK_MTP_TS_UPDATE_ENABLE; + ptp_priv->mirror_encap_bmp |= (1 << mtp_idx); + } else { + if (!(ptp_priv->mirror_encap_bmp & mtp_idx)) { + return ret; + } + cmd_status = NGPTPCLOCK_MTP_TS_UPDATE_DISABLE; + ptp_priv->mirror_encap_bmp &= ~mtp_idx; + } + + ret = ngptpclock_cmd_go(cmd_status, &mirror_encap_idx, NULL); + DBG_VERB(("mirror_encap_update: %d, mpt_index: %d, ret:%d\n", + start, mtp_idx, ret)); + + return ret; + +} +#endif + +/* structure describing a PTP hardware clock */ +static struct ptp_clock_info ngptpclock_ptp_caps = { + .owner = THIS_MODULE, + .name = "ptp_clock", + .max_adj = 200000, + .n_alarm = 0, + .n_ext_ts = NUM_EXT_TS, + .n_per_out = 0, /* will be overwritten in ngptpclock_ptp_register */ + .n_pins = 0, + .pps = 0, + .adjfreq = ngptpclock_ptp_adjfreq, + .adjtime = ngptpclock_ptp_adjtime, + .gettime64 = ngptpclock_ptp_gettime, + .settime64 = ngptpclock_ptp_settime, + .enable = ngptpclock_ptp_enable, +}; + +/** + * ngptpclock_ptp_hw_tx_tstamp_config + * + * @dinfo: device information + * @netif: netif information + * @hwts_tx_type: TX Timestamp type + * + * Description: This is a callback function to enable/disable the TX timestamping port + * based. + */ +int ngptpclock_ptp_hw_tx_tstamp_config(ngknet_dev_info_t *dinfo, + ngknet_netif_t *netif, + int *hwts_tx_type) +{ +#if defined(TWO_STEP_SUPPORT) + uint64_t portmap = 0; + int map = 0; +#endif + int ret = SHR_E_CONFIG; + + if (!module_initialized) { + ret = SHR_E_DISABLED; + goto exit; + } + + DBG_VERB(("hw_tx_tstamp_config: Tx type %d\n", *hwts_tx_type)); + if (*hwts_tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { + DBG_VERB(("hw_tx_tstamp_config: Enabling 1-step\n")); + ngptpclock_ptp_time_keep_init(); + ret = SHR_E_NONE; + goto exit; + } else if (*hwts_tx_type == HWTSTAMP_TX_OFF) { + DBG_VERB(("hw_tx_tstamp_config: Diabling 1-step\n")); + ret = SHR_E_NONE; + goto exit; + } else if (*hwts_tx_type == HWTSTAMP_TX_ON) { +#if !defined(TWO_STEP_SUPPORT) + DBG_VERB(("hw_tx_tstamp_config: 2Step not supported\n")); + ret = SHR_E_UNAVAIL; + goto exit; +#endif +#if defined(TWO_STEP_SUPPORT) + DBG_VERB(("hw_tstamp_enable: Enabling 2-step(type:%d) TS on port:%d\n", + tx_type, port)); + if (port <= 0) { + ret = SHR_E_PARAM; + goto exit; + } + + /* Update the shared structure member */ + if (ptp_priv->shared_addr) { + if ((port > 0) && (port < NGPTPCLOCK_MAX_NUM_PORTS)) { + port -= 1; + map = (port / 64); + port = (port % 64); + + portmap = ptp_priv->shared_addr->portmap[map]; + portmap |= (uint64_t)0x1 << port; + ptp_priv->shared_addr->portmap[map] = portmap; + + /* Command to R5 for the update */ + ptp_priv->shared_addr->ksyncinit=NGPTPCLOCK_PBM_UPDATE; + + } + } +#endif + } +exit: + return ret; +} + +/** + * ngptpclock_ptp_hw_rx_tstamp_config + * + * @dinfo: device information + * @netif: netif information + * @hwts_tx_type: TX Timestamp type + * + * Description: This is a callback function to enable/disable the RX timestamping port + * based. + */ +int ngptpclock_ptp_hw_rx_tstamp_config(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif, + int *hwts_rx_filter) +{ +#if defined(TWO_STEP_SUPPORT) + uint64_t portmap = 0; + int map = 0; +#endif + + if (!module_initialized) { + return SHR_E_DISABLED; + } + + DBG_VERB(("hw_rx_tstamp_config: Rx filter %d\n", *hwts_rx_filter)); + if (*hwts_rx_filter == HWTSTAMP_FILTER_NONE) { + /* disable */ + } else { + /* enable */ + } + +#if defined(TWO_STEP_SUPPORT) + DBG_VERB(("hw_tstamp_disable: Disable 2Step TS(type:%d) port = %d\n", tx_type, port)); + if (port <= 0) { + DBG_ERR(("hw_tstamp_disable: Error disabling timestamp on port:%d\n", port)); + ret = -1; + goto exit; + } + + /* Update the shared structure member - Disable 2step on port */ + if (ptp_priv->shared_addr) { + if ((port > 0) && (port < NGPTPCLOCK_MAX_NUM_PORTS)) { + port -= 1; + map = (port / 64); + port = (port % 64); + + portmap = ptp_priv->shared_addr->portmap[map]; + portmap &= ~((uint64_t)0x1 << port); + ptp_priv->shared_addr->portmap[map]= portmap; + + /* Command to R5 for the update */ + ptp_priv->shared_addr->ksyncinit = NGPTPCLOCK_PBM_UPDATE; + } + } +#endif + + return SHR_E_NONE; +} + +int ngptpclock_ptp_transport_get(uint8_t *pkt) +{ + int transport = 0; + uint16_t ethertype; + uint16_t tpid; + int tpid_offset, ethype_offset; + + /* Need to check VLAN tag if packet is tagged */ + tpid_offset = 12; + tpid = pkt[tpid_offset] << 8 | pkt[tpid_offset + 1]; + if (tpid == 0x8100) { + ethype_offset = tpid_offset + 4; + } else { + ethype_offset = tpid_offset; + } + + ethertype = pkt[ethype_offset] << 8 | pkt[ethype_offset+1]; + + switch (ethertype) { + case 0x88f7: /* ETHERTYPE_PTPV2 */ + transport = 2; + break; + + case 0x0800: /* ETHERTYPE_IPV4 */ + transport = 4; + break; + + case 0x86DD: /* ETHERTYPE_IPV6 */ + transport = 6; + break; + + default: + transport = 0; + } + + return transport; +} + +#if defined(TWO_STEP_SUPPORT) +static int +ngptpclock_txpkt_tsts_tsamp_get(int port, uint32_t pkt_seq_id, uint32_t *ts_valid, + uint32_t *seq_id, uint64_t *timestamp) +{ + int ret = 0; + uint64_t tmp; + u32 fifo_rxctr = 0; + + tmp = (port & 0xFFFF) | (pkt_seq_id << 16); + + ret = ngptpclock_cmd_go(NGPTPCLOCK_GET_TSTIME, &tmp, timestamp); + if (ret >= 0) { + fifo_rxctr = (tmp >> 32) & 0xFFFF; + *seq_id = ((tmp >> 16) & 0xFFFF); + *ts_valid = (tmp & 0x1); + if (*ts_valid) { + tmp = (port & 0xFFFF) | (pkt_seq_id << 16); + ngptpclock_cmd_go(NGPTPCLOCK_ACK_TSTIME, &tmp, 0); + if (fifo_rxctr != 0) { + if (fifo_rxctr != ptp_priv->port_stats[port].fifo_rxctr + 1) { + DBG_ERR(("FW Reset or Lost Timestamp RxSeq:(Prev %d : Current %d)\n", + ptp_priv->port_stats[port].fifo_rxctr, fifo_rxctr)); + } + ptp_priv->port_stats[port].fifo_rxctr = fifo_rxctr; + } + } + } + + + return ret; +} +#endif + + +/** + * ngptpclock_ptp_hw_tstamp_tx_time_get + * + * @skb: Linux socket buffer + * @ts: timestamp to be retrieved + * + * Description: This is a callback function to retrieve the timestamp on + * a given port + * NOTE: + * Two-step related - fetching the timestamp from portmacro, not needed for one-step + */ +int ngptpclock_ptp_hw_tstamp_tx_time_get(struct sk_buff *skb, uint64_t *ts) +{ +#if defined(TWO_STEP_SUPPORT) + /* Get Timestamp from R5 or CLMAC */ + uint32_t ts_valid = 0; + uint32_t seq_id = 0; + uint32_t pktseq_id = 0; + uint64_t timestamp = 0; + uint16_t tpid = 0; + ktime_t start; + u64 delta; + int retry_cnt = num_retries; + int seq_id_offset, tpid_offset; + int transport = network_transport; +#endif + + struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); + struct ngknet_ptp_data *ptpd = (struct ngknet_ptp_data *)cbd->netif->user_data; + int hwts_tx_type = ptpd->hwts_tx_type; + /* The first byte from the userdata is the phy_port number */ + int port = ptpd->phy_port; + +#if defined(TWO_STEP_SUPPORT) + int dev_no = cbd->dinfo->dev_no; +#endif + + if (!ptp_priv || !module_initialized) { + return SHR_E_DISABLED; + } + +#if defined(TWO_STEP_SUPPORT) + start = ktime_get(); +#endif + + if (!ts || port < 1 || port > 255 || ptp_priv->shared_addr == NULL) { + return SHR_E_DISABLED; + } + + /* Reset */ + *ts = 0; + + if (hwts_tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { + *ts = *(uint64_t *)skb->cb; + + port -= 1; + ptp_priv->port_stats[port].pkt_txctr += 1; + } else { +#if defined(TWO_STEP_SUPPORT) + tpid_offset = 12; + + /* Parse for nw transport */ + if (transport == 0) { + transport = ngptpclock_ptp_transport_get(pkt); + } + + switch (transport) + { + case 2: + seq_id_offset = 0x2c; + break; + case 4: + seq_id_offset = 0x48; + break; + case 6: + seq_id_offset = 0x5c; + break; + default: + seq_id_offset = 0x2c; + break; + } + + /* Need to check VLAN tag if packet is tagged */ + tpid = pkt[tpid_offset] << 8 | pkt[tpid_offset + 1]; + if (tpid == 0x8100) { + seq_id_offset += 4; + } + + pktseq_id = pkt[seq_id_offset] << 8 | pkt[seq_id_offset + 1]; + + port -= 1; + + DBG_TXTS(("hw_tstamp_tx_time_get: port %d pktseq_id %u\n", port, pktseq_id)); + + /* Fetch the TX timestamp from shadow memory */ + do { + ngptpclock_txpkt_tsts_tsamp_get(port, pktseq_id, &ts_valid, &seq_id, ×tamp); + if (ts_valid) { + + /* Clear the shadow memory to get next entry */ + ptp_priv->shared_addr->port_ts_data[port].timestamp = 0; + ptp_priv->shared_addr->port_ts_data[port].port_id = 0; + ptp_priv->shared_addr->port_ts_data[port].ts_seq_id = 0; + ptp_priv->shared_addr->port_ts_data[port].ts_valid = 0; + + if (seq_id == pktseq_id) { + *ts = timestamp; + ptp_priv->port_stats[port].tsts_match += 1; + + delta = ktime_us_delta(ktime_get(), start); + DBG_TXTS(("Port: %d Skb_SeqID %d FW_SeqId %d and TS:%llx FetchTime %lld\n", + port, pktseq_id, seq_id, timestamp, delta)); + + if ((delta < ptp_priv->port_stats[port].tsts_best_fetch_time) || + (ptp_priv->port_stats[port].tsts_best_fetch_time == 0)) { + ptp_priv->port_stats[port].tsts_best_fetch_time = delta; + } + if ((delta > ptp_priv->port_stats[port].tsts_worst_fetch_time) || + (ptp_priv->port_stats[port].tsts_worst_fetch_time == 0)) { + ptp_priv->port_stats[port].tsts_worst_fetch_time = delta; + } + /* Calculate Moving Average*/ + ptp_priv->port_stats[port].tsts_avg_fetch_time = ((u32)delta + + ((ptp_priv->port_stats[port].tsts_match - 1) * + ptp_priv->port_stats[port].tsts_avg_fetch_time)) / + ptp_priv->port_stats[port].tsts_match; + break; + } else { + DBG_TXTS(("Discard timestamp on port %d Skb_SeqID %d FW_SeqId %d " + "RetryCnt %d TimeLapsed (%lld us)\n", + port, pktseq_id, seq_id, (num_retries - retry_cnt), + ktime_us_delta(ktime_get(),start))); + + ptp_priv->port_stats[port].tsts_discard += 1; + continue; + } + } + ptp_sleep(1); + retry_cnt--; + } while (retry_cnt); + + + ptp_priv->port_stats[port].pkt_txctr += 1; + + if (retry_cnt == 0) { + ptp_priv->port_stats[port].tsts_timeout += 1; + DBG_ERR(("FW Response timeout: Tx TS on phy port:%d Skb_SeqID: %d " + "TimeLapsed (%lld us)\n", port, pktseq_id, + ktime_us_delta(ktime_get(), start))); + } +#endif + } + + return SHR_E_NONE; +} + +enum { + CUSTOM_ENCAP_VERSION_INVALID = 0, + CUSTOM_ENCAP_VERSION_ONE = 1, + + CUSTOM_ENCAP_VERSION_CURRENT = CUSTOM_ENCAP_VERSION_ONE, + CUSTOM_ENCAP_VERSION_RSVD = 255 +}; + +enum { + CUSTOM_ENCAP_OPCODE_INVALID = 0, + CUSTOM_ENCAP_OPCODE_PTP_RX = 1, + CUSTOM_ENCAP_OPCODE_RSVD = 255 +}; + +enum { + CUSTOM_ENCAP_PTP_RX_TLV_INVALID = 0, + CUSTOM_ENCAP_PTP_RX_TLV_PTP_RX_TIME = 1, + CUSTOM_ENCAP_PTP_RX_TLV_RSVD = 255 +}; + +static void +dbg_dump_pkt(uint8_t *data, int size) +{ + int idx; + char str[128]; + + for (idx = 0; idx < size; idx++) { + if ((idx & 0xf) == 0) { + sprintf(str, "%04x: ", idx); + } + sprintf(&str[strlen(str)], "%02x ", data[idx]); + if ((idx & 0xf) == 0xf) { + sprintf(&str[strlen(str)], "\n"); + printk(str); + } + } + if ((idx & 0xf) != 0) { + sprintf(&str[strlen(str)], "\n"); + printk(str); + } +} + +static inline int +ngptpclock_pkt_custom_encap_ptprx_get(uint8_t *pkt, uint64_t *ing_ptptime) +{ + uint8_t *custom_hdr; + uint8_t id[4]; + uint8_t ver, opc; + uint8_t nh_type, nh_rsvd; + uint16_t len, tot_len; + uint16_t nh_len; + uint32_t seq_id = 0; + uint32_t ptp_rx_time[2]; + uint64_t u64_ptp_rx_time = 0; + + custom_hdr = pkt; + + NGPTPCLOCK_UNPACK_U8(custom_hdr, id[0]); + NGPTPCLOCK_UNPACK_U8(custom_hdr, id[1]); + NGPTPCLOCK_UNPACK_U8(custom_hdr, id[2]); + NGPTPCLOCK_UNPACK_U8(custom_hdr, id[3]); + if (!((id[0] == 'B') && (id[1] == 'C') && (id[2] == 'M') && (id[3] == 'C'))) { + /* invalid signature */ + return -1; + } + + NGPTPCLOCK_UNPACK_U8(custom_hdr, ver); + switch (ver) { + case CUSTOM_ENCAP_VERSION_CURRENT: + break; + default: + DBG_ERR(("custom_encap_ptprx_get: Invalid ver\n")); + return -1; + } + + NGPTPCLOCK_UNPACK_U8(custom_hdr, opc); + switch (opc) { + case CUSTOM_ENCAP_OPCODE_PTP_RX: + break; + default: + DBG_ERR(("custom_encap_ptprx_get: Invalid opcode\n")); + return -1; + } + + NGPTPCLOCK_UNPACK_U16(custom_hdr, len); + NGPTPCLOCK_UNPACK_U32(custom_hdr, seq_id); + tot_len = len; + + /* remaining length of custom encap */ + len = len - (custom_hdr - pkt); + + /* process tlv */ + while (len > 0) { + NGPTPCLOCK_UNPACK_U8(custom_hdr, nh_type); + NGPTPCLOCK_UNPACK_U8(custom_hdr, nh_rsvd); + NGPTPCLOCK_UNPACK_U16(custom_hdr, nh_len); + len = len - (nh_len); + if (nh_rsvd != 0x0) { + continue; /* invalid tlv */ + } + + switch (nh_type) { + case CUSTOM_ENCAP_PTP_RX_TLV_PTP_RX_TIME: + NGPTPCLOCK_UNPACK_U32(custom_hdr, ptp_rx_time[0]); + NGPTPCLOCK_UNPACK_U32(custom_hdr, ptp_rx_time[1]); + u64_ptp_rx_time = ((uint64_t)ptp_rx_time[1] << 32) | (uint64_t)ptp_rx_time[0]; + *ing_ptptime = u64_ptp_rx_time; + break; + default: + custom_hdr += nh_len; + break; + } + } + + DBG_RX_DUMP(("custom_encap_ptprx_get: Custom Encap header:\n")); + if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(pkt, tot_len); + + DBG_RX(("custom_encap_ptprx_get: ver=%d opcode=%d tot_len=%d seq_id=0x%x\n", + ver, opc, tot_len, seq_id)); + + return (tot_len); +} + +/** + * ngptpclock_ptp_hw_rx_pre_process + * + * @skb: Linux socket buffer + * @cust_hdr_len: Custom header length + * + * Description: Parse the packet to check if customer is present and return the header length. + */ +int ngptpclock_ptp_hw_rx_pre_process(struct sk_buff *skb, uint32_t *cust_hdr_len) +{ + uint64_t ts; + int custom_encap_len = 0; + struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); + int pkt_hdr_len = 32 + cbd->pmd_len; + uint8_t *data = skb->data + pkt_hdr_len; + + custom_encap_len = ngptpclock_pkt_custom_encap_ptprx_get(data, &ts); + + DBG_RX(("hw_rx_pre_process: cust_encap_len=0x%x\n", custom_encap_len)); + + if ((cust_hdr_len) && (custom_encap_len >= 0)) { + *cust_hdr_len = custom_encap_len; + } else if (cust_hdr_len) { + *cust_hdr_len = 0; + } + return SHR_E_NONE; +} + +/** + * ngptpclock_ptp_hw_tstamp_rx_time_upscale + * + * @skb: Linxu socket buffer + * @ts: timestamp to be retrieved + * + * Description: This is a callback function to retrieve 64b equivalent of + * rx timestamp + */ +int ngptpclock_ptp_hw_tstamp_rx_time_upscale(struct sk_buff *skb, uint64_t *ts) +{ + int ret = SHR_E_NONE; + int custom_encap_len = 0; + uint16_t tpid = 0; + uint16_t msgtype_offset = 0; + int transport = network_transport; + int ptp_hdr_offset = 0, ptp_message_len = 0; + + struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); + /* The first byte from the userdata is the phy_port number */ + int port = (int)cbd->netif->user_data[0]; + + if (!module_initialized || !ptp_priv || (ptp_priv->shared_addr == NULL)) { + return SHR_E_DISABLED; + } + + DBG_RX_DUMP(("rxtime_upscale: Incoming packet: \n")); + if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(skb->data, skb->len); + + /* FIXME : SDKLT-38745 + * Verify cos_q in meta data. + * Example: if (pci_cos != (meta[4] & 0x3F)) {} + */ + + /* parse custom encap header in pkt for ptp rxtime */ + custom_encap_len = ngptpclock_pkt_custom_encap_ptprx_get((skb->data), ts); + + /* Remove the custom encap header from pkt */ + if (custom_encap_len > 0) { + + skb_pull(skb, custom_encap_len); + + DBG_RX_DUMP(("rxtime_upscale: After removing custom encap: \n")); + if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(skb->data, skb->len); + + msgtype_offset = ptp_hdr_offset = 0; + tpid = SKB_U16_GET(skb, (12)); + if (tpid == 0x8100) { + msgtype_offset += 4; + ptp_hdr_offset += 4; + } + + /* Parse for nw transport */ + transport = ngptpclock_ptp_transport_get(skb->data); + + switch (transport) + { + case 2: /* IEEE 802.3 */ + ptp_hdr_offset += 14; + break; + case 4: /* UDP IPv4 */ + ptp_hdr_offset += 42; + break; + case 6: /* UDP IPv6 */ + ptp_hdr_offset += 62; + break; + default: + ptp_hdr_offset += 42; + break; + } + + ptp_message_len = SKB_U16_GET(skb, (ptp_hdr_offset + 2)); + + DBG_RX(("rxtime_upscale: custom_encap_len %d tpid 0x%x transport %d skb->len %d " + "ptp message type %d, ptp_message_len %d\n", + custom_encap_len, tpid, transport, skb->len, + skb->data[msgtype_offset] & 0x0F, ptp_message_len)); + } + + if ((port > 0) && (port < NGPTPCLOCK_MAX_NUM_PORTS)) { + port -= 1; + ptp_priv->port_stats[port].pkt_rxctr += 1; + } + + return ret; +} + +void ngptpclock_hton64(u8 *buf, const uint64_t *data) +{ +#ifdef __LITTLE_ENDIAN + /* LITTLE ENDIAN */ + buf[0] = (*(((uint8_t*)(data)) + 7u)); + buf[1] = (*(((uint8_t*)(data)) + 6u)); + buf[2] = (*(((uint8_t*)(data)) + 5u)); + buf[3] = (*(((uint8_t*)(data)) + 4u)); + buf[4] = (*(((uint8_t*)(data)) + 3u)); + buf[5] = (*(((uint8_t*)(data)) + 2u)); + buf[6] = (*(((uint8_t*)(data)) + 1u)); + buf[7] = (*(((uint8_t*)(data)) + 0u)); +#else + memcpy(buf, data, 8); +#endif +} + +int ngptpclock_ptp_hw_tstamp_tx_meta_set(struct sk_buff *skb) +{ + uint16_t tpid = 0; + int md_offset = 0; + int pkt_offset = 0; + int ptp_hdr_offset = 0; + int transport = network_transport; + s64 ptptime = 0; + s64 ptpcounter = 0; + int64_t corrField; + int32_t negCurTS32; + int64_t negCurTS64; + + struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); + struct ngknet_ptp_data *ptpd = (struct ngknet_ptp_data *)cbd->netif->user_data; + int hwts_tx_type = ptpd->hwts_tx_type; + int hdrlen = cbd->pmd_len; + u32 md[4]; + /* The first byte from the userdata is the phy_port number */ + int port = ptpd->phy_port; + + if (!module_initialized || !ptp_priv || (ptp_priv->shared_addr == NULL)) { + return SHR_E_DISABLED; + } + + if (ptp_priv->ptp_pair_lock == 1) { + /* use alternate pair when main dataset is being updated */ + ptptime = ptp_priv->shared_addr->ptptime_alt; + ptpcounter = ptp_priv->shared_addr->reftime_alt; + } else { + ptptime = ptp_priv->shared_addr->ptptime; + ptpcounter = ptp_priv->shared_addr->reftime; + } + + negCurTS32 = - (int32_t) ptpcounter; + negCurTS64 = - (int64_t)(ptpcounter); + + /* FIXME : SDKLT-38745 + * Get packet header length. Current default length 32byte. + */ + if (CMICX_DEV_TYPE) { + pkt_offset = ptp_hdr_offset = hdrlen + 32; + } + + /* Need to check VLAN tag if packet is tagged */ + tpid = SKB_U16_GET(skb, (pkt_offset + 12)); + if (tpid == 0x8100) { + md_offset = 4; + ptp_hdr_offset += 4; + } + + /* One Step Meta Data */ + if (hwts_tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { + md_offset += 8; + corrField = (((int64_t)negCurTS64) << 16); + } + + /* Parse for nw transport */ + if (transport == 0) { + transport = ngptpclock_ptp_transport_get(skb->data + pkt_offset); + } + + memcpy(md, cbd->pmd, sizeof(md)); + switch (transport) + { + case 2: /* IEEE 802.3 */ + ptp_hdr_offset += 14; + if (cbd->pmd) { + md[0] |= (ieee1588_l2pkt_md[md_offset]); + md[1] |= (ieee1588_l2pkt_md[md_offset + 1]); + md[2] |= (ieee1588_l2pkt_md[md_offset + 2]); + md[3] |= (ieee1588_l2pkt_md[md_offset + 3]); + } + break; + case 4: /* UDP IPv4 */ + ptp_hdr_offset += 42; + if (cbd->pmd) { + md[0] |= (ieee1588_ipv4pkt_md[md_offset]); + md[1] |= (ieee1588_ipv4pkt_md[md_offset + 1]); + md[2] |= (ieee1588_ipv4pkt_md[md_offset + 2]); + md[3] |= (ieee1588_ipv4pkt_md[md_offset + 3]); + } + break; + case 6: /* UDP IPv6 */ + ptp_hdr_offset += 62; + if (cbd->pmd) { + md[0] |= (ieee1588_ipv6pkt_md[md_offset]); + md[1] |= (ieee1588_ipv6pkt_md[md_offset + 1]); + md[2] |= (ieee1588_ipv6pkt_md[md_offset + 2]); + md[3] |= (ieee1588_ipv6pkt_md[md_offset + 3]); + } + break; + default: + ptp_hdr_offset += 42; + if (cbd->pmd) { + md[0] |= (ieee1588_ipv4pkt_md[md_offset]); + md[1] |= (ieee1588_ipv4pkt_md[md_offset + 1]); + md[2] |= (ieee1588_ipv4pkt_md[md_offset + 2]); + md[3] |= (ieee1588_ipv4pkt_md[md_offset + 3]); + } + break; + } + memcpy(cbd->pmd, md, sizeof(md)); + + DBG_TX(("hw_tstamp_tx_meta_get: ptptime: 0x%llx ptpcounter: 0x%llx\n", ptptime, ptpcounter)); + DBG_TX(("hw_tstamp_tx_meta_get: ptpmessage offset:%u type: 0x%x hwts_tx_type: %d\n", + ptp_hdr_offset, skb->data[ptp_hdr_offset] & 0x0f, hwts_tx_type)); + + if ((hwts_tx_type == HWTSTAMP_TX_ONESTEP_SYNC) && + (NGPTPCLOCK_PTP_EVENT_MSG((skb->data[ptp_hdr_offset] & 0x0F)))) { + /* One Step Timestamp Field updation */ + int corr_offset = ptp_hdr_offset + 8; + int origin_ts_offset = ptp_hdr_offset + 34; + u32 tmp; + struct timespec64 ts = {0}; + int udp_csum_regen; + u32 udp_csum20; + u16 udp_csum; + + udp_csum = SKB_U16_GET(skb, (ptp_hdr_offset - 2)); + + switch (transport) { + case 2: + udp_csum_regen = 0; + break; + case 6: + udp_csum_regen = 1; + break; + default: + udp_csum_regen = (udp_csum != 0x0); + break; + } + + /* Fill the correction field */ + ngptpclock_hton64(&(skb->data[corr_offset]), (const u64 *)&corrField); + + /* Fill the Origin Timestamp Field */ + ts = ns_to_timespec64(ptptime); + + tmp = (ts.tv_sec >> 32); + skb->data[origin_ts_offset + 0] = ((tmp >> 8) & 0xFF); + skb->data[origin_ts_offset + 1] = ((tmp ) & 0xFF); + + tmp = (ts.tv_sec & 0xFFFFFFFFLL); + skb->data[origin_ts_offset + 2] = ((tmp >> 24) & 0xFF); + skb->data[origin_ts_offset + 3] = ((tmp >> 16) & 0xFF); + skb->data[origin_ts_offset + 4] = ((tmp >> 8) & 0xFF); + skb->data[origin_ts_offset + 5] = ((tmp ) & 0xFF); + + tmp = (ts.tv_nsec & 0xFFFFFFFFLL); + skb->data[origin_ts_offset + 6] = ((tmp >> 24) & 0xFF); + skb->data[origin_ts_offset + 7] = ((tmp >> 16) & 0xFF); + skb->data[origin_ts_offset + 8] = ((tmp >> 8) & 0xFF); + skb->data[origin_ts_offset + 9] = ((tmp ) & 0xFF); + + if (udp_csum_regen) { + udp_csum20 = (~udp_csum) & 0xFFFF; + + udp_csum20 += SKB_U16_GET(skb, (corr_offset + 0)); + udp_csum20 += SKB_U16_GET(skb, (corr_offset + 2)); + udp_csum20 += SKB_U16_GET(skb, (corr_offset + 4)); + udp_csum20 += SKB_U16_GET(skb, (corr_offset + 6)); + + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 0)); + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 2)); + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 4)); + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 6)); + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 8)); + + /* Fold 20bit checksum into 16bit udp checksum */ + udp_csum20 = ((udp_csum20 & 0xFFFF) + (udp_csum20 >> 16)); + udp_csum = ((udp_csum20 & 0xFFFF) + (udp_csum20 >> 16)); + + /* invert again to get final checksum. */ + udp_csum = ~udp_csum; + if (udp_csum == 0) { + udp_csum = 0xFFFF; + } + + skb->data[ptp_hdr_offset - 2] = ((udp_csum >> 8) & 0xFF); + skb->data[ptp_hdr_offset - 1] = ((udp_csum ) & 0xFF); + } + + if ((skb->data[ptp_hdr_offset] & 0x0F) == IEEE1588_MSGTYPE_DELREQ) { + *(uint64_t *)skb->cb = ptptime; + } else { + *(uint64_t *)skb->cb = 0; + } + + DBG_TX(("hw_tstamp_tx_meta_get: ptp msg type %d packet tstamp : 0x%llx corrField: 0x%llx\n", + (skb->data[ptp_hdr_offset] & 0x0F), ptptime, corrField)); + + if ((port > 0) && (port < NGPTPCLOCK_MAX_NUM_PORTS)) { + port -= 1; + ptp_priv->port_stats[port].pkt_txonestep += 1; + } + } + + DBG_TX_DUMP(("hw_tstamp_tx_meta_get: PTP Packet\n")); + if (debug & DBG_LVL_TX_DUMP) dbg_dump_pkt(skb->data, skb->len); + + return 0; +} + +int ngptpclock_ptp_hw_tstamp_ptp_clock_index_get(ngknet_dev_info_t *dinfo, + ngknet_netif_t *netif, int *index) +{ + if (!module_initialized || !ptp_priv) { + return SHR_E_DISABLED; + } + + if (ptp_priv && ptp_priv->ptp_clock) + *index = ptp_clock_index(ptp_priv->ptp_clock); + + return SHR_E_NONE; +} + +/** +* bcm_ptp_time_keep - call timecounter_read every second to avoid timer overrun +* because a 32bit counter, will timeout in 4s +*/ +static void +ngptpclock_ptp_time_keep(struct work_struct *work) +{ + struct delayed_work *dwork = to_delayed_work(work); + struct ngptpclock_ptp_priv *priv = + container_of(dwork, struct ngptpclock_ptp_priv, time_keep); + struct timespec64 ts; + + /* Call bcm_ptp_gettime function to keep the ref_time_64 and ref_counter_48 in sync */ + ngptpclock_ptp_gettime(&(priv->ptp_caps), &ts); + schedule_delayed_work(&priv->time_keep, HZ); +} + +static void +ngptpclock_ptp_time_keep_init(void) +{ + if (!ptp_priv->timekeep_status) { + INIT_DELAYED_WORK(&(ptp_priv->time_keep), ngptpclock_ptp_time_keep); + schedule_delayed_work(&ptp_priv->time_keep, HZ); + + ptp_priv->timekeep_status = 1; + } + + return; +} + +static void +ngptpclock_ptp_time_keep_cleanup(void) +{ + if (ptp_priv->timekeep_status) { + /* Cancel delayed work */ + cancel_delayed_work_sync(&(ptp_priv->time_keep)); + + ptp_priv->timekeep_status = 0; + } + + return; +} + +/* PTP_EXTTS logging */ +static void +ngptpclock_ptp_extts_logging(struct work_struct *work) +{ + struct delayed_work *dwork = to_delayed_work(work); + struct ngptpclock_ptp_priv *priv = container_of(dwork, struct ngptpclock_ptp_priv, extts_logging); + struct ptp_clock_event event; + int event_id = -1; + int head = -1, tail = -1; + + if (!module_initialized || ptp_priv->extts_log == NULL) + goto exit; + + if (ptp_priv->extts_log->overflow) { + DBG_VERB(("Queue overflow state:%u\n", ptp_priv->extts_log->overflow)); + } + + tail = (int)ptp_priv->extts_log->tail; + head = ptp_priv->extts_event.head; + + head = (head + 1) % NUM_EVENT_TS; + while (tail != head) { + switch (ptp_priv->extts_log->event_ts[head].ts_event_id) { + /* Map FW event_id to EXTTS event_id */ + case TS_EVENT_GPIO_1: + event_id = 0; + break; + case TS_EVENT_GPIO_2: + event_id = 1; + break; + case TS_EVENT_GPIO_3: + event_id = 2; + break; + case TS_EVENT_GPIO_4: + event_id = 3; + break; + case TS_EVENT_GPIO_5: + event_id = 4; + break; + case TS_EVENT_GPIO_6: + event_id = 5; + break; + } + + if (event_id < 0 || ptp_priv->extts_event.enable[event_id] != 1) { + memset((void *)&(ptp_priv->extts_log->event_ts[head]), 0, + sizeof(ptp_priv->extts_log->event_ts[head])); + + ptp_priv->extts_event.head = head; + ptp_priv->extts_log->head = head; + + head = (head + 1) % NUM_EVENT_TS; + continue; + } + + event.type = PTP_CLOCK_EXTTS; + event.index = event_id; + event.timestamp = ((s64)ptp_priv->extts_log->event_ts[head].tstamp.sec * 1000000000) + + ptp_priv->extts_log->event_ts[head].tstamp.nsec; + ptp_clock_event(ptp_priv->ptp_clock, &event); + + ptp_priv->extts_event.head = head; + ptp_priv->extts_log->head = head; + + head = (head + 1) % NUM_EVENT_TS; + } +exit: + schedule_delayed_work(&priv->extts_logging, __msecs_to_jiffies(100)); +} + +static void +ngptpclock_ptp_extts_logging_init(void) +{ + INIT_DELAYED_WORK(&(ptp_priv->extts_logging), ngptpclock_ptp_extts_logging); + schedule_delayed_work(&ptp_priv->extts_logging, __msecs_to_jiffies(100)); +} + +static void +ngptpclock_ptp_extts_logging_cleanup(void) +{ + cancel_delayed_work_sync(&(ptp_priv->extts_logging)); +} + +static int +ngptpclock_ptp_init(struct ptp_clock_info *ptp) +{ + int ret = -1; + + ret = ngptpclock_cmd_go(NGPTPCLOCK_INIT, NULL, NULL); + DBG_VERB(("ptp_init: NGPTPCLOCK_INIT; rv:%d\n", ret)); + if (ret < 0) goto err_exit; + ptp_sleep(1); + +err_exit: + return ret; +} + +static int +ngptpclock_ptp_cleanup(struct ptp_clock_info *ptp) +{ + int ret = -1; + + ngptpclock_ptp_time_keep_cleanup(); + + ret = ngptpclock_cmd_go(NGPTPCLOCK_CLEANUP, NULL, NULL); + DBG_VERB(("ptp_cleanup: rv:%d\n", ret)); + + return ret; +} + +static int +ngptpclock_broadsync_cmd(int bs_id) +{ + int ret = -1; + u64 subcmd, subcmd_data; + + subcmd = (bs_id == 0) ? NGPTPCLOCK_BROADSYNC_BS0_CONFIG : NGPTPCLOCK_BROADSYNC_BS1_CONFIG; + + subcmd_data = ((ptp_priv->ngptpclock_bs_info[bs_id]).enable & 0x1); + subcmd_data |= (((ptp_priv->ngptpclock_bs_info[bs_id]).mode & 0x1) << 8); + subcmd_data |= ((ptp_priv->ngptpclock_bs_info[bs_id]).hb << 16); + subcmd_data |= (((u64)(ptp_priv->ngptpclock_bs_info[bs_id]).bc) << 32); + + ret = ngptpclock_cmd_go(NGPTPCLOCK_BROADSYNC, &subcmd, &subcmd_data); + DBG_VERB(("ngptpclock_broadsync_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", + subcmd, subcmd_data, ret)); + + return ret; +} + +static int +ngptpclock_broadsync_status_cmd(int bs_id, u64 *status) +{ + int ret = -1; + u64 subcmd; + + subcmd = (bs_id == 0) ? NGPTPCLOCK_BROADSYNC_BS0_STATUS_GET : NGPTPCLOCK_BROADSYNC_BS1_STATUS_GET; + + ret = ngptpclock_cmd_go(NGPTPCLOCK_BROADSYNC, &subcmd, status); + DBG_VERB(("ngptpclock_broadsync_status_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", + subcmd, *status, ret)); + + return ret; +} + +static int +ngptpclock_gpio_cmd(int gpio_num) +{ + int ret = -1; + u64 subcmd, subcmd_data; + + switch (gpio_num) { + case 0: + subcmd = NGPTPCLOCK_GPIO_0; + break; + case 1: + subcmd = NGPTPCLOCK_GPIO_1; + break; + case 2: + subcmd = NGPTPCLOCK_GPIO_2; + break; + case 3: + subcmd = NGPTPCLOCK_GPIO_3; + break; + case 4: + subcmd = NGPTPCLOCK_GPIO_4; + break; + case 5: + subcmd = NGPTPCLOCK_GPIO_5; + break; + default: + return ret; + } + + subcmd_data = ((ptp_priv->ngptpclock_gpio_info[gpio_num]).enable & 0x1); + subcmd_data |= (((ptp_priv->ngptpclock_gpio_info[gpio_num]).mode & 0x1) << 8); + subcmd_data |= ((u64)((ptp_priv->ngptpclock_gpio_info[gpio_num]).period) << 16); + + ret = ngptpclock_cmd_go(NGPTPCLOCK_GPIO, &subcmd, &subcmd_data); + DBG_VERB(("ngptpclock_gpio_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", + subcmd, subcmd_data, ret)); + + return ret; +} + +static int +ngptpclock_gpio_phaseoffset_cmd(int gpio_num) +{ + int ret = -1; + u64 subcmd, subcmd_data; + + switch (gpio_num) { + case 0: + subcmd = NGPTPCLOCK_GPIO_0; + break; + case 1: + subcmd = NGPTPCLOCK_GPIO_1; + break; + case 2: + subcmd = NGPTPCLOCK_GPIO_2; + break; + case 3: + subcmd = NGPTPCLOCK_GPIO_3; + break; + case 4: + subcmd = NGPTPCLOCK_GPIO_4; + break; + case 5: + subcmd = NGPTPCLOCK_GPIO_5; + break; + default: + return ret; + } + + subcmd_data = (ptp_priv->ngptpclock_gpio_info[gpio_num]).phase_offset; + ret = ngptpclock_cmd_go(NGPTPCLOCK_GPIO_PHASEOFFSET, &subcmd, &subcmd_data); + DBG_VERB(("ngptpclock_cmd_go: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + + return ret; +} + +static int +ngptpclock_evlog_cmd(int event, int enable) +{ + int ret; + int addr_offset; + u64 subcmd = 0, subcmd_data = 0; + ngptpclock_evlog_t tmp; + + subcmd = event; + addr_offset = ((u8 *)&(tmp.event_timestamps[event]) - (u8 *)&(tmp.event_timestamps[0])); + + if (enable) { + subcmd_data = (ptp_priv->dma_mem + addr_offset); + } else { + subcmd_data = 0; + } + + ret = ngptpclock_cmd_go(NGPTPCLOCK_EVLOG, &subcmd, &subcmd_data); + DBG_VERB(("ngptpclock_evlog_cmd: subcmd: 0x%llx subcmd_data: 0x%llx rv:%d\n", + subcmd, subcmd_data, ret)); + + return ret; +} + + +/* + * Device Debug Statistics Proc Entry + */ +/** +* This function is called at the beginning of a sequence. +* ie, when: +* - the /proc/linux_ngptpclock/stats file is read (first time) +* - after the function stop (end of sequence) +* +*/ +static void *ngptpclock_proc_seq_start(struct seq_file *s, loff_t *pos) +{ + /* beginning a new sequence ? */ + if ( (int)*pos == 0 && ptp_priv->shared_addr != NULL) + { + seq_printf(s, "TwoStep Port Bitmap : %08llx%08llx\n", + (uint64_t)(ptp_priv->shared_addr->portmap[1]), + (uint64_t)(ptp_priv->shared_addr->portmap[0])); + seq_printf(s,"%4s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s\n", + "Port", "RxCounter", "TxCounter", "TxOneStep", "TSTimeout", + "TSRead", "TSMatch", "TSDiscard", + "TimeHi" , "TimeLo", "TimeAvg", "FIFORx"); + } + + if ((int)*pos < (ptp_priv->num_pports)) + return (void *)(unsigned long)(*pos + 1); + /* End of the sequence, return NULL */ + return NULL; + } + +/** +* This function is called after the beginning of a sequence. +* It's called untill the return is NULL (this ends the sequence). +* +*/ +static void *ngptpclock_proc_seq_next(struct seq_file *s, void *v, loff_t *pos) +{ + (*pos)++; + return ngptpclock_proc_seq_start(s, pos); +} +/** +* This function is called at the end of a sequence +* +*/ +static void +ngptpclock_proc_seq_stop(struct seq_file *s, void *v) +{ + /* nothing to do, we use a static value in ngptpclock_proc_seq_start() */ +} + +/** +* This function is called for each "step" of a sequence +* +*/ +static int +ngptpclock_proc_seq_show(struct seq_file *s, void *v) +{ + unsigned long port = (unsigned long)v; + + if ((port > 0) && (port < NGPTPCLOCK_MAX_NUM_PORTS)) { + port = port - 1; + if (ptp_priv->port_stats[port].pkt_rxctr || ptp_priv->port_stats[port].pkt_txctr || + ptp_priv->port_stats[port].pkt_txonestep|| + ptp_priv->port_stats[port].tsts_discard || + ptp_priv->port_stats[port].tsts_timeout || + ptp_priv->shared_addr->port_ts_data[port].ts_cnt || + ptp_priv->port_stats[port].tsts_match) { + seq_printf(s, "%4lu | %9d| %9d| %9d| %9d| %9d| %9d| %9d| %9lld| %9lld | %9d|%9d | %s\n", + (port + 1), + ptp_priv->port_stats[port].pkt_rxctr, + ptp_priv->port_stats[port].pkt_txctr, + ptp_priv->port_stats[port].pkt_txonestep, + ptp_priv->port_stats[port].tsts_timeout, + ptp_priv->shared_addr->port_ts_data[port].ts_cnt, + ptp_priv->port_stats[port].tsts_match, + ptp_priv->port_stats[port].tsts_discard, + ptp_priv->port_stats[port].tsts_worst_fetch_time, + ptp_priv->port_stats[port].tsts_best_fetch_time, + ptp_priv->port_stats[port].tsts_avg_fetch_time, + ptp_priv->port_stats[port].fifo_rxctr, + ((ptp_priv->port_stats[port].pkt_txctr != ptp_priv->port_stats[port].tsts_match) ? + "***":"")); + } + } + return 0; +} + +/** +* seq_operations for bsync_proc_*** entries +* +*/ +static struct seq_operations ngptpclock_proc_seq_ops = { + .start = ngptpclock_proc_seq_start, + .next = ngptpclock_proc_seq_next, + .stop = ngptpclock_proc_seq_stop, + .show = ngptpclock_proc_seq_show +}; + +static int +ngptpclock_proc_txts_open(struct inode * inode, struct file * file) +{ + return seq_open(file, &ngptpclock_proc_seq_ops); +} + +static ssize_t +ngptpclock_proc_txts_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + char debug_str[40]; + char *ptr; + int port; + + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + if ((ptr = strstr(debug_str, "clear")) != NULL) { + for (port = 0; port < ptp_priv->num_pports; port++) { + ptp_priv->port_stats[port].pkt_rxctr = 0; + ptp_priv->port_stats[port].pkt_txctr = 0; + ptp_priv->port_stats[port].pkt_txonestep = 0; + ptp_priv->port_stats[port].tsts_timeout = 0; + ptp_priv->port_stats[port].tsts_match = 0; + ptp_priv->port_stats[port].tsts_discard = 0; + if (ptp_priv->shared_addr) + ptp_priv->shared_addr->port_ts_data[port].ts_cnt = 0; + } + } else { + DBG_ERR(("Warning: unknown input\n")); + } + + return count; +} + +struct proc_ops ngptpclock_proc_txts_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = ngptpclock_proc_txts_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = ngptpclock_proc_txts_write, + .proc_release = seq_release, +}; + +/* + * Driver Debug Proc Entry + */ +static int +ngptpclock_proc_debug_show(struct seq_file *m, void *v) +{ + seq_printf(m, "Configuration:\n"); + seq_printf(m, " debug: 0x%x\n", debug); + return 0; +} + +static ssize_t +ngptpclock_proc_debug_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + char debug_str[40]; + char *ptr; + + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + if ((ptr = strstr(debug_str, "debug=")) != NULL) { + ptr += 6; + debug = simple_strtol(ptr, NULL, 0); + } else { + DBG_ERR(("Warning: unknown configuration\n")); + } + + return count; +} + +static int +ngptpclock_proc_debug_open(struct inode * inode, struct file * file) +{ + return single_open(file, ngptpclock_proc_debug_show, NULL); +} + +struct proc_ops ngptpclock_proc_debug_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = ngptpclock_proc_debug_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = ngptpclock_proc_debug_write, + .proc_release = single_release, +}; + +static int +ngptpclock_proc_init(void) +{ + struct proc_dir_entry *entry; + + PROC_CREATE(entry, "stats", 0666, ngptpclock_proc_root, + &ngptpclock_proc_txts_file_ops); + if (entry == NULL) { + return -1; + } + PROC_CREATE(entry, "debug", 0666, ngptpclock_proc_root, + &ngptpclock_proc_debug_file_ops); + if (entry == NULL) { + return -1; + } + return 0; +} + +static int +ngptpclock_proc_cleanup(void) +{ + remove_proc_entry("stats", ngptpclock_proc_root); + remove_proc_entry("debug", ngptpclock_proc_root); + return 0; +} + + +#define ATTRCMP(x) (0 == strcmp(attr->attr.name, #x)) + +static int rd_iter=0, wr_iter=0; +static ssize_t +bs_attr_store(struct kobject *kobj, struct kobj_attribute *attr, + const char *buf, size_t bytes) +{ + ssize_t ret; + u32 enable, mode; + u32 bc, hb; + + if (ATTRCMP(bs0)) { + ret = sscanf(buf, "enable:%d mode:%d bc:%u hb:%u", + &enable, &mode, &bc, &hb); + DBG_VERB(("rd:%d bs0: enable:%d mode:%d bc:%d hb:%d\n", + rd_iter++, enable, mode, bc, hb)); + ptp_priv->ngptpclock_bs_info[0].enable = enable; + ptp_priv->ngptpclock_bs_info[0].mode = mode; + ptp_priv->ngptpclock_bs_info[0].bc = bc; + ptp_priv->ngptpclock_bs_info[0].hb = hb; + + (void)ngptpclock_broadsync_cmd(0); + } else if (ATTRCMP(bs1)) { + ret = sscanf(buf, "enable:%d mode:%d bc:%u hb:%u", + &enable, &mode, &bc, &hb); + DBG_VERB(("rd:%d bs1: enable:%d mode:%d bc:%d hb:%d\n", + rd_iter++, enable, mode, bc, hb)); + ptp_priv->ngptpclock_bs_info[1].enable = enable; + ptp_priv->ngptpclock_bs_info[1].mode = mode; + ptp_priv->ngptpclock_bs_info[1].bc = bc; + ptp_priv->ngptpclock_bs_info[1].hb = hb; + + (void)ngptpclock_broadsync_cmd(1); + } else { + ret = -ENOENT; + } + + return (ret == -ENOENT) ? ret : bytes; +} + +static ssize_t +bs_attr_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) +{ + ssize_t bytes; + u64 status = 0; + u32 variance = 0; + + if (ATTRCMP(bs0)) { + + if (ptp_priv->ngptpclock_bs_info[0].enable) { + (void)ngptpclock_broadsync_status_cmd(0, &status); + } + + variance = (status >> 32); + status = (status & 0xFFFFFFFF); + bytes = sprintf(buf, "enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", + ptp_priv->ngptpclock_bs_info[0].enable, + ptp_priv->ngptpclock_bs_info[0].mode, + ptp_priv->ngptpclock_bs_info[0].bc, + ptp_priv->ngptpclock_bs_info[0].hb, + (u32)status, + variance); + DBG_VERB(("wr:%d bs0: enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", + wr_iter++, + ptp_priv->ngptpclock_bs_info[0].enable, + ptp_priv->ngptpclock_bs_info[0].mode, + ptp_priv->ngptpclock_bs_info[0].bc, + ptp_priv->ngptpclock_bs_info[0].hb, + (u32)status, + variance)); + } else if (ATTRCMP(bs1)) { + + if (ptp_priv->ngptpclock_bs_info[1].enable) { + (void)ngptpclock_broadsync_status_cmd(1, &status); + } + + variance = (status >> 32); + status = (status & 0xFFFFFFFF); + bytes = sprintf(buf, "enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", + ptp_priv->ngptpclock_bs_info[1].enable, + ptp_priv->ngptpclock_bs_info[1].mode, + ptp_priv->ngptpclock_bs_info[1].bc, + ptp_priv->ngptpclock_bs_info[1].hb, + (u32)status, + variance); + DBG_VERB(("wr:%d bs1: enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", + wr_iter++, + ptp_priv->ngptpclock_bs_info[1].enable, + ptp_priv->ngptpclock_bs_info[1].mode, + ptp_priv->ngptpclock_bs_info[1].bc, + ptp_priv->ngptpclock_bs_info[1].hb, + (u32)status, + variance)); + } else { + bytes = -ENOENT; + } + + return bytes; +} + +#define BS_ATTR(x) \ + static struct kobj_attribute x##_attribute = \ + __ATTR(x, 0664, bs_attr_show, bs_attr_store); + +BS_ATTR(bs0) +BS_ATTR(bs1) + +#define BS_ATTR_LIST(x) & x ## _attribute.attr +static struct attribute *bs_attrs[] = { + BS_ATTR_LIST(bs0), + BS_ATTR_LIST(bs1), + NULL, /* terminator */ +}; + +static struct attribute_group bs_attr_group = { + .name = "broadsync", + .attrs = bs_attrs, +}; + + +static int gpio_rd_iter=0, gpio_wr_iter=0; +static ssize_t +gpio_attr_store(struct kobject *kobj, struct kobj_attribute *attr, + const char *buf, size_t bytes) +{ + ssize_t ret; + int gpio; + u32 enable, mode; + u32 period; + int64_t phase_offset; + + if (ATTRCMP(gpio0)) { + gpio = 0; + } else if (ATTRCMP(gpio1)) { + gpio = 1; + } else if (ATTRCMP(gpio2)) { + gpio = 2; + } else if (ATTRCMP(gpio3)) { + gpio = 3; + } else if (ATTRCMP(gpio4)) { + gpio = 4; + } else if (ATTRCMP(gpio5)) { + gpio = 5; + } else { + return -ENOENT; + } + + + ret = sscanf(buf, "enable:%d mode:%d period:%u phaseoffset:%lld", + &enable, &mode, &period, &phase_offset); + DBG_VERB(("rd:%d gpio%d: enable:%d mode:%d period:%d phaseoffset:%lld\n", + gpio_rd_iter++, gpio, enable, mode, period, phase_offset)); + ptp_priv->ngptpclock_gpio_info[gpio].enable = enable; + ptp_priv->ngptpclock_gpio_info[gpio].mode = mode; + ptp_priv->ngptpclock_gpio_info[gpio].period = period; + + if (phase_offset != ptp_priv->ngptpclock_gpio_info[gpio].phase_offset) { + ptp_priv->ngptpclock_gpio_info[gpio].phase_offset = phase_offset; + (void)ngptpclock_gpio_phaseoffset_cmd(gpio); + } + + (void)ngptpclock_gpio_cmd(gpio); + + return (ret == -ENOENT) ? ret : bytes; +} + +static ssize_t +gpio_attr_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) +{ + ssize_t bytes; + int gpio; + + if (ATTRCMP(gpio0)) { + gpio = 0; + } else if (ATTRCMP(gpio1)) { + gpio = 1; + } else if (ATTRCMP(gpio2)) { + gpio = 2; + } else if (ATTRCMP(gpio3)) { + gpio = 3; + } else if (ATTRCMP(gpio4)) { + gpio = 4; + } else if (ATTRCMP(gpio5)) { + gpio = 5; + } else { + return -ENOENT; + } + + bytes = sprintf(buf, "enable:%d mode:%d period:%u phaseoffset:%lld\n", + ptp_priv->ngptpclock_gpio_info[gpio].enable, + ptp_priv->ngptpclock_gpio_info[gpio].mode, + ptp_priv->ngptpclock_gpio_info[gpio].period, + ptp_priv->ngptpclock_gpio_info[gpio].phase_offset); + DBG_VERB(("wr:%d gpio%d: enable:%d mode:%d period:%u phaseoffset:%lld\n", + gpio_wr_iter++, gpio, + ptp_priv->ngptpclock_gpio_info[gpio].enable, + ptp_priv->ngptpclock_gpio_info[gpio].mode, + ptp_priv->ngptpclock_gpio_info[gpio].period, + ptp_priv->ngptpclock_gpio_info[gpio].phase_offset)); + + return bytes; +} + +#define GPIO_ATTR(x) \ + static struct kobj_attribute x##_attribute = \ + __ATTR(x, 0664, gpio_attr_show, gpio_attr_store); + +GPIO_ATTR(gpio0) +GPIO_ATTR(gpio1) +GPIO_ATTR(gpio2) +GPIO_ATTR(gpio3) +GPIO_ATTR(gpio4) +GPIO_ATTR(gpio5) + +#define GPIO_ATTR_LIST(x) & x ## _attribute.attr +static struct attribute *gpio_attrs[] = { + GPIO_ATTR_LIST(gpio0), + GPIO_ATTR_LIST(gpio1), + GPIO_ATTR_LIST(gpio2), + GPIO_ATTR_LIST(gpio3), + GPIO_ATTR_LIST(gpio4), + GPIO_ATTR_LIST(gpio5), + NULL, /* terminator */ +}; + +static struct attribute_group gpio_attr_group = { + .name = "gpio", + .attrs = gpio_attrs, +}; + + + +static ssize_t +evlog_attr_store(struct kobject *kobj, struct kobj_attribute *attr, + const char *buf, size_t bytes) +{ + ssize_t ret; + int event, enable; + + if (ATTRCMP(cpu)) { + event = 0; + } else if (ATTRCMP(bs0)) { + event = 1; + } else if (ATTRCMP(bs1)) { + event = 2; + } else if (ATTRCMP(gpio0)) { + event = 3; + } else if (ATTRCMP(gpio1)) { + event = 4; + } else if (ATTRCMP(gpio2)) { + event = 5; + } else if (ATTRCMP(gpio3)) { + event = 6; + } else if (ATTRCMP(gpio4)) { + event = 7; + } else if (ATTRCMP(gpio5)) { + event = 8; + } else { + return -ENOENT; + } + + + ret = sscanf(buf, "enable:%d", &enable); + DBG_VERB(("event:%d: enable:%d\n", event, enable)); + + (void)ngptpclock_evlog_cmd(event, enable); + ptp_priv->ngptpclock_evlog_info[event].enable = enable; + + return (ret == -ENOENT) ? ret : bytes; +} + +static ssize_t +evlog_attr_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) +{ + ssize_t bytes; + int event; + + if (ATTRCMP(cpu)) { + event = 0; + } else if (ATTRCMP(bs0)) { + event = 1; + } else if (ATTRCMP(bs1)) { + event = 2; + } else if (ATTRCMP(gpio0)) { + event = 3; + } else if (ATTRCMP(gpio1)) { + event = 4; + } else if (ATTRCMP(gpio2)) { + event = 5; + } else if (ATTRCMP(gpio3)) { + event = 6; + } else if (ATTRCMP(gpio4)) { + event = 7; + } else if (ATTRCMP(gpio5)) { + event = 8; + } else { + return -ENOENT; + } + + + bytes = sprintf(buf, "enable:%d Previous Time:%llu.%09u Latest Time:%llu.%09u\n", + ptp_priv->ngptpclock_evlog_info[event].enable, + ptp_priv->evlog->event_timestamps[event].prv_tstamp.sec, + ptp_priv->evlog->event_timestamps[event].prv_tstamp.nsec, + ptp_priv->evlog->event_timestamps[event].cur_tstamp.sec, + ptp_priv->evlog->event_timestamps[event].cur_tstamp.nsec); + DBG_VERB(("event%d: enable:%d Previous Time:%llu.%09u Latest Time:%llu.%09u\n", + event, + ptp_priv->ngptpclock_evlog_info[event].enable, + ptp_priv->evlog->event_timestamps[event].prv_tstamp.sec, + ptp_priv->evlog->event_timestamps[event].prv_tstamp.nsec, + ptp_priv->evlog->event_timestamps[event].cur_tstamp.sec, + ptp_priv->evlog->event_timestamps[event].cur_tstamp.nsec)); + + memset((void *)&(ptp_priv->evlog->event_timestamps[event]), 0, + sizeof(ptp_priv->evlog->event_timestamps[event])); + + return bytes; +} + +#define EVLOG_ATTR(x) \ + static struct kobj_attribute evlog_ ## x ##_attribute = \ + __ATTR(x, 0664, evlog_attr_show, evlog_attr_store); + +EVLOG_ATTR(bs0) +EVLOG_ATTR(bs1) +EVLOG_ATTR(gpio0) +EVLOG_ATTR(gpio1) +EVLOG_ATTR(gpio2) +EVLOG_ATTR(gpio3) +EVLOG_ATTR(gpio4) +EVLOG_ATTR(gpio5) + +#define EVLOG_ATTR_LIST(x) & evlog_ ## x ## _attribute.attr +static struct attribute *evlog_attrs[] = { + EVLOG_ATTR_LIST(bs0), + EVLOG_ATTR_LIST(bs1), + EVLOG_ATTR_LIST(gpio0), + EVLOG_ATTR_LIST(gpio1), + EVLOG_ATTR_LIST(gpio2), + EVLOG_ATTR_LIST(gpio3), + EVLOG_ATTR_LIST(gpio4), + EVLOG_ATTR_LIST(gpio5), + NULL, /* terminator */ +}; + +static struct attribute_group evlog_attr_group = { + .name = "evlog", + .attrs = evlog_attrs, +}; + +static int +ngptpclock_sysfs_init(void) +{ + int ret = 0; + struct kobject *parent; + struct kobject *root = &((((struct module *)(THIS_MODULE))->mkobj).kobj); + + parent = root; + ptp_priv->kobj = kobject_create_and_add("io", parent); + + ret = sysfs_create_group(ptp_priv->kobj, &bs_attr_group); + + ret = sysfs_create_group(ptp_priv->kobj, &gpio_attr_group); + + ret = sysfs_create_group(ptp_priv->kobj, &evlog_attr_group); + + return ret; +} + +static int +ngptpclock_sysfs_cleanup(void) +{ + int ret = 0; + struct kobject *parent; + + parent = ptp_priv->kobj; + + sysfs_remove_group(parent, &bs_attr_group); + sysfs_remove_group(parent, &gpio_attr_group); + sysfs_remove_group(parent, &evlog_attr_group); + + kobject_put(ptp_priv->kobj); + + + return ret; +} + + +static void +ngptpclock_ptp_fw_data_alloc(int dev_no) +{ + dma_addr_t dma_mem = 0; + + /* Initialize the Base address for CMIC and shared Memory access */ + ptp_priv->base_addr = ngbde_kapi_pio_membase(dev_no); + ptp_priv->dma_dev = ngbde_kapi_dma_dev_get(dev_no); + + ptp_priv->dma_mem_size = sizeof(ngptpclock_evlog_t); /*sizeof(ngptpclock_evlog_t);*/ + + if (ptp_priv->evlog == NULL) { + DBG_ERR(("Allocate memory for event log\n")); + ptp_priv->evlog = DMA_ALLOC_COHERENT(ptp_priv->dma_dev, + ptp_priv->dma_mem_size, + &dma_mem); + } + + if (ptp_priv->evlog != NULL) { + /* Reset memory */ + memset((void *)ptp_priv->evlog, 0, ptp_priv->dma_mem_size); + + ptp_priv->dma_mem = dma_mem; + DBG_ERR(("Shared memory allocation (%d bytes) for event log successful at 0x%016lx.\n", + ptp_priv->dma_mem_size, (long unsigned int)ptp_priv->dma_mem)); + } + + ptp_priv->extts_log = NULL; + ptp_priv->extts_event.head = -1; + return; +} + +static void +ngptpclock_ptp_fw_data_free(void) +{ + if (ptp_priv->evlog != NULL) { + DBG_ERR(("Free shared memory : extts log of %d bytes\n", + ptp_priv->dma_mem_size)); + DMA_FREE_COHERENT(ptp_priv->dma_dev, ptp_priv->dma_mem_size, + (void *)ptp_priv->evlog, ptp_priv->dma_mem); + ptp_priv->evlog = NULL; + } + + return; +} + +static void +ngptpclock_ptp_dma_init(int dcb_type, int dev_no) +{ + int endianess; + int num_pports = 256; + int mem_size = 16384; /*sizeof(ngptpclock_info_t);*/ + + + ptp_priv->num_pports = num_pports; + ptp_priv->dcb_type = dcb_type; + + ngptpclock_ptp_fw_data_alloc(dev_no); + if (ptp_priv->shared_addr == NULL) { + ptp_priv->shared_addr = kzalloc(16384, GFP_KERNEL); + ptp_priv->port_stats = kzalloc((sizeof(ngptpclock_port_stats_t) * num_pports), GFP_KERNEL); + } + + if (ptp_priv->shared_addr != NULL) { + /* Reset memory. */ + memset((void *)ptp_priv->shared_addr, 0, mem_size); + +#ifdef __LITTLE_ENDIAN + endianess = 0; +#else + endianess = 1; +#endif + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_14r(CMIC_CMC_BASE), + ((pci_cos << 16) | endianess)); + + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 1); + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 1); + + } + + + DBG_VERB(("%s %p:%p, dcb_type: %d\n", __FUNCTION__, ptp_priv->base_addr, + (void *)ptp_priv->shared_addr, dcb_type)); + + ptp_priv->mirror_encap_bmp = 0x0; + + hostcmd_regs[0] = CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE); + hostcmd_regs[1] = CMIC_CMC_SCHAN_MESSAGE_20r(CMIC_CMC_BASE); + hostcmd_regs[2] = CMIC_CMC_SCHAN_MESSAGE_19r(CMIC_CMC_BASE); + hostcmd_regs[3] = CMIC_CMC_SCHAN_MESSAGE_18r(CMIC_CMC_BASE); + hostcmd_regs[4] = CMIC_CMC_SCHAN_MESSAGE_17r(CMIC_CMC_BASE); + + return; +} + + +/** + * ngptpclock_ioctl_cmd_handler + * @dev_info: Device information + * @cmd: sub command + * @data: sub command data + * @len: Sub command length + * Description: This function will handle ioctl commands from user mode. + */ +static int +ngptpclock_ioctl_cmd_handler(ngknet_dev_info_t *dev_info, int cmd, char *data, int len) +{ + u32 fw_status; + int32_t *cfg_data = (int32_t *)data; + + if (!module_initialized && cmd != NGPTPCLOCK_HW_INIT) { + return SHR_E_CONFIG; + } + + switch (cmd) { + case NGPTPCLOCK_HW_INIT: + pci_cos = cfg_data[0]; + fw_core = cfg_data[1]; + DBG_VERB(("Configuring pci_cosq:%d dev_no:%d fw_core:%d\n", + pci_cos, dev_info->dev_no, fw_core)); + if ((CMICX_DEV_TYPE && (fw_core >= 0 && fw_core <= 3)) || + (fw_core == 0 || fw_core == 1)) { + memcpy(ieee1588_l2pkt_md, &cfg_data[12], sizeof(ieee1588_l2pkt_md)); + memcpy(ieee1588_ipv4pkt_md, &cfg_data[36], sizeof(ieee1588_ipv4pkt_md)); + memcpy(ieee1588_ipv6pkt_md, &cfg_data[60], sizeof(ieee1588_ipv6pkt_md)); + + /* FIXME : SDKLT-38745 + * Device dcb_type, currently set to 1. + */ + ngptpclock_ptp_dma_init(1, dev_info->dev_no); + + fw_status = 0; + DEV_READ32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE), &fw_status); + + /* Return success if the app is already initialized. */ + if (module_initialized) { + return SHR_E_NONE; + } + + /* Return error if the app is not ready yet. */ + if (fw_status != 0xBADC0DE1) { + return SHR_E_RESOURCE; + } + + (ptp_priv->ngptpclock_init_info).uc_port_num = cfg_data[2]; + (ptp_priv->ngptpclock_init_info).uc_port_sysport = cfg_data[3]; + (ptp_priv->ngptpclock_init_info).host_cpu_port = cfg_data[4]; + (ptp_priv->ngptpclock_init_info).host_cpu_sysport = cfg_data[5]; + (ptp_priv->ngptpclock_init_info).udh_len = cfg_data[6]; + + DBG_VERB(("fw_core:%d uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d\n", + fw_core, + (ptp_priv->ngptpclock_init_info).uc_port_num, + (ptp_priv->ngptpclock_init_info).uc_port_sysport, + (ptp_priv->ngptpclock_init_info).host_cpu_port, + (ptp_priv->ngptpclock_init_info).host_cpu_sysport)); + + if (ngptpclock_ptp_init(&(ptp_priv->ptp_caps)) >= 0) { + module_initialized = 1; + } + } + break; + case NGPTPCLOCK_HW_CLEANUP: + module_initialized = 0; + + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 0); + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 0); + + ngptpclock_ptp_cleanup(&(ptp_priv->ptp_caps)); + break; +#if defined(HW_TS_DISABLE) + case NGPTPCLOCK_M_HW_TS_DISABLE: + ngptpclock_ptp_hw_tx_tstamp_config(NULL, NULL, 0); + break; +#endif +#if defined(MIRROR_ENCAP_SUPPORT) + case NGPTPCLOCK_M_MTP_TS_UPDATE_ENABLE: + ngptpclock_ptp_mirror_encap_update(0, kmsg->clock_info.data[0], TRUE); + break; + case NGPTPCLOCK_M_MTP_TS_UPDATE_DISABLE: + ngptpclock_ptp_mirror_encap_update(0, kmsg->clock_info.data[0], FALSE); + break; +#endif + default: + return SHR_E_NOT_FOUND; + } + + return SHR_E_NONE; +} + +/** + * ngptpclock_ptp_register + * @priv: driver private structure + * Description: this function will register the ptp clock driver + * to kernel. It also does some house keeping work. + */ +static int +ngptpclock_ptp_register(void) +{ + int err = -ENODEV; + + if (CMICX_DEV_TYPE) { + if (fw_core < 0 || fw_core > 3) { + goto exit; + } + } else if (fw_core < 0 || fw_core > 1) { + /* Support on core-0 or core-1 */ + goto exit; + } + + /* default transport is raw, ieee 802.3 */ + switch (network_transport) { + case 2: /* IEEE 802.3 */ + case 4: /* UDP IPv4 */ + case 6: /* UDP IPv6 */ + break; + default: + network_transport = 0; + } + + ptp_priv = kzalloc(sizeof(*ptp_priv), GFP_KERNEL); + if (!ptp_priv) { + err = -ENOMEM; + goto exit; + } + + /* Reset memory */ + memset(ptp_priv, 0, sizeof(*ptp_priv)); + + err = -ENODEV; + + ptp_priv->ptp_caps = ngptpclock_ptp_caps; + + mutex_init(&(ptp_priv->ptp_lock)); + + /* Register ptp clock driver with ngptpclock_ptp_caps */ + ptp_priv->ptp_clock = ptp_clock_register(&ptp_priv->ptp_caps, NULL); + + if (IS_ERR(ptp_priv->ptp_clock)) { + ptp_priv->ptp_clock = NULL; + } else if (ptp_priv->ptp_clock) { + err = 0; + + /* Register NGKNET HW Timestamp Callback Functions */ + ngknet_ptp_dev_ctrl_cb_register(ngptpclock_ioctl_cmd_handler); + ngknet_ptp_tx_config_set_cb_register(ngptpclock_ptp_hw_tx_tstamp_config); + ngknet_ptp_phc_index_get_cb_register(ngptpclock_ptp_hw_tstamp_ptp_clock_index_get); + ngknet_ptp_rx_config_set_cb_register(ngptpclock_ptp_hw_rx_tstamp_config); + ngknet_ptp_tx_meta_set_cb_register(ngptpclock_ptp_hw_tstamp_tx_meta_set); + ngknet_ptp_tx_hwts_get_cb_register(ngptpclock_ptp_hw_tstamp_tx_time_get); + ngknet_ptp_rx_hwts_get_cb_register(ngptpclock_ptp_hw_tstamp_rx_time_upscale); + ngknet_ptp_rx_pre_process_cb_register(ngptpclock_ptp_hw_rx_pre_process); + } + + /* Initialize proc files */ + ngptpclock_proc_root = proc_mkdir(NGPTPCLOCK_MODULE_NAME, NULL);; + ngptpclock_proc_init(); + ngptpclock_sysfs_init(); + ptp_priv->shared_addr = NULL; + ptp_priv->port_stats = NULL; + + ngptpclock_ptp_extts_logging_init(); +exit: + return err; +} + +static int +ngptpclock_ptp_remove(void) +{ + if (!ptp_priv) + return 0; + + module_initialized = 0; + + ngptpclock_ptp_extts_logging_cleanup(); + + ngptpclock_ptp_time_keep_cleanup(); + + ngptpclock_proc_cleanup(); + ngptpclock_sysfs_cleanup(); + remove_proc_entry(NGPTPCLOCK_MODULE_NAME, NULL); + + /* UnRegister NGKNET HW Timestamp Callback Functions */ + ngknet_ptp_dev_ctrl_cb_unregister(ngptpclock_ioctl_cmd_handler); + ngknet_ptp_tx_config_set_cb_unregister(ngptpclock_ptp_hw_tx_tstamp_config); + ngknet_ptp_phc_index_get_cb_unregister(ngptpclock_ptp_hw_tstamp_ptp_clock_index_get); + ngknet_ptp_rx_config_set_cb_unregister(ngptpclock_ptp_hw_rx_tstamp_config); + ngknet_ptp_tx_meta_set_cb_unregister(ngptpclock_ptp_hw_tstamp_tx_meta_set); + ngknet_ptp_tx_hwts_get_cb_register(ngptpclock_ptp_hw_tstamp_tx_time_get); + ngknet_ptp_rx_hwts_get_cb_unregister(ngptpclock_ptp_hw_tstamp_rx_time_upscale); + ngknet_ptp_rx_pre_process_cb_unregister(ngptpclock_ptp_hw_rx_pre_process); + + /* Cleanup the PTP */ + ngptpclock_ptp_cleanup(&(ptp_priv->ptp_caps)); + + ngptpclock_ptp_fw_data_free(); + + if (ptp_priv->port_stats != NULL) { + kfree((void *)ptp_priv->port_stats); + ptp_priv->port_stats = NULL; + } + if (ptp_priv->shared_addr != NULL) { + kfree((void *)ptp_priv->shared_addr); + ptp_priv->shared_addr = NULL; + DBG_ERR(("Free R5 memory\n")); + } + + /* Unregister the bcm ptp clock driver */ + ptp_clock_unregister(ptp_priv->ptp_clock); + + /* Free Memory */ + kfree(ptp_priv); + + return 0; +} +#endif /* NGPTPCLOCK_SUPPORT */ + +/* + * Function: ngptpclock_init_module + * + * Purpose: + * Module initialization. + * Attached SOC all devices and optionally initializes these. + * Parameters: + * None + * Returns: + * 0 on success, otherwise -1 + */ +static int __init +ngptpclock_init_module(void) +{ +#ifdef NGPTPCLOCK_SUPPORT + ngptpclock_ptp_register(); + return 0; +#else + printk(KERN_WARNING "%s: PTP not supported by this kernel.\n", + NGPTPCLOCK_MODULE_NAME); + return -ENOSYS; +#endif /* NGPTPCLOCK_SUPPORT */ +} + +/* + * Function: ngptpclock_exit_module + * + * Purpose: + * Module cleanup function + * Parameters: + * None + * Returns: + * Always 0 + */ +static void __exit +ngptpclock_exit_module(void) +{ +#ifdef NGPTPCLOCK_SUPPORT + ngptpclock_ptp_remove(); +#endif /* NGPTPCLOCK_SUPPORT */ +} + +module_init(ngptpclock_init_module); +module_exit(ngptpclock_exit_module); diff --git a/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk b/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk index cc89a930e03..b7bb1da60cd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk +++ b/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk @@ -14,9 +14,28 @@ # A copy of the GNU General Public License version 2 (GPLv2) can # be found in the LICENSES folder. # -# Helper makefile for building stand-alone PMD kernel module +# Helper makefile for building Linux kernel module that depends on the +# SDK Packet Meta Data (PMD) library. +# +# The makefile provides a make target named 'kpmd', which the main +# kernel module makefile should depend on. +# +# The 'kpmd' make target will create symbolic links from the relevant +# SDK source files into the module source directory, which must be +# specified via either one of $(KMODDIR) or $(GENDIR). +# +# The 'kpmd' make target also exports two make variables, of which +# $(SDK_PMD_KFLAGS) should be added to the kernel module build flags, +# and $(SDK_PMD_KOBJS) should be added to the list of kernel module +# object files. +# +# For example usage, please refer to $SDK/linux/bcmgenl/Makefile. # +ifndef SDK +$(error The $$SDK environment variable is not set) +endif + # SDK make utilities include $(SDK)/make/makeutils.mk @@ -126,17 +145,6 @@ VARIANT_DIRS := $(foreach K, $(filter $(VAR_CHIPS),$(PMD_CHIPS)),\ $(wildcard $(BCMPKTDIR)/xfcr/$(K)/* -type d)) endif # SDK_CHIPS -ifdef SDK_CHIPS -KNETCB_CPPFLAGS := -DKPMD $(SDK_CPPFLAGS) -endif - -ifdef SDK_VARIANTS -override KNETCB_CPPFLAGS := -DKPMD $(SDK_CPPFLAGS) -endif - -KNETCB_CPPFLAGS += -DKPMD -export KNETCB_CPPFLAGS - PMD_FLEX_CHIPS := $(filter $(PMD_CHIPS),$(sort $(foreach D, $(VARIANT_DIRS), \ $(lastword $(filter-out $(lastword $(subst /, ,$D)),$(subst /, ,$D)))))) @@ -162,7 +170,7 @@ endif CHIP_OBJS ?= $(patsubst %.c, %.o, $(CHIP_SRCS)) -SDK_PMD_KFLAGS := -DSAL_LINUX \ +SDK_PMD_KFLAGS := -DSAL_LINUX -DKPMD $(SDK_CPPFLAGS) \ -I$(SDK)/sal/include \ -I$(SDK)/bcmltd/include \ -I$(SDK)/bcmlrd/include \ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h index e9d769869f9..856c8edbb1e 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h @@ -165,6 +165,11 @@ typedef struct linux_bde_bus_s { * BDE_DEV_INST_ID_INVALID : The invalid instance identifier. */ #define BDE_DEV_INST_ID_INVALID ((uint32)-1) +#define BDE_DEV_INST_ID_CURRENT ((uint32)-2) +#define BDE_DEV_INST_ID_GET_FREE ((uint32)-3) + +extern int get_instance_dma_size(unsigned int instance_num, unsigned int *size); +extern int dma_get_usage(void); extern int linux_bde_create(linux_bde_bus_t* bus, ibde_t** bde); extern int linux_bde_destroy(ibde_t* bde); @@ -198,6 +203,7 @@ extern uint32 lkbde_get_dev_phys_hi(int d); #ifdef BDE_EDK_SUPPORT extern int lkbde_edk_get_dma_info(int dev_id, phys_addr_t* cpu_pbase, phys_addr_t* dma_pbase, ssize_t* size); +extern void * lkbde_edk_dmamem_map_p2v(phys_addr_t paddr); #endif /* diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c index 1a7786b1f89..757eb1a5a52 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c @@ -571,6 +571,7 @@ _bde_add_device(void) int add_switch_device = 0; if (_ndevices >= LINUX_BDE_MAX_DEVICES) { gprintk("Error: added too many devices\n"); + return; } if (_devices[_ndevices].dev_type & BDE_SWITCH_DEV_TYPE) { _switch_ndevices++; @@ -696,6 +697,11 @@ extern struct resource * iproc_platform_get_resource(struct platform_device *dev, unsigned int type, unsigned int num); +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,18,0)) +extern int +iproc_platform_get_irq(struct platform_device *dev, unsigned int num); +#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(5,18,0)) */ + #define IPROC_CHIPCOMMONA_BASE 0x18000000 #define IPROC_CMICD_BASE 0x48000000 #define IPROC_CMICD_SIZE 0x40000 @@ -709,7 +715,13 @@ iproc_cmicd_probe(struct platform_device *pldev) { bde_ctrl_t *ctrl; uint32 size, dev_rev_id; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,18,0)) + struct resource *memres; + int irq; +#else struct resource *memres, *irqres; +#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(5,18,0)) */ + #ifdef CONFIG_OF if (debug >= 1) { gprintk("iproc_cmicd_probe %s\n", pldev->dev.of_node ? "with device node":""); @@ -799,10 +811,17 @@ iproc_cmicd_probe(struct platform_device *pldev) int i; memset(iproc_cmicx_irqs, 0, IHOST_CMICX_MAX_INTRS*sizeof(uint32_t)); for (i = 0; i < IHOST_CMICX_MAX_INTRS; i++) { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,18,0)) + irq = iproc_platform_get_irq(pldev, i); + if (irq >= 0) { + iproc_cmicx_irqs[i] = irq; + } +#else irqres = iproc_platform_get_resource(pldev, IORESOURCE_IRQ, i); if (irqres) { iproc_cmicx_irqs[i] = irqres->start; } +#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(5,18,0)) */ if (debug >= 1) { gprintk("iproc_cmicx_irqs[%d] = %d\n", i, iproc_cmicx_irqs[i]); } @@ -811,8 +830,13 @@ iproc_cmicd_probe(struct platform_device *pldev) } else #endif { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,18,0)) + irq = iproc_platform_get_irq(pldev, 0); + ctrl->iLine = irq; +#else irqres = iproc_platform_get_resource(pldev, IORESOURCE_IRQ, 0); ctrl->iLine = irqres->start; +#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(5,18,0)) */ } ctrl->isr = NULL; @@ -1418,12 +1442,6 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, BCM56975_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56168_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56169_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56560_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56561_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56562_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56565_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56566_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56567_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56670_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56671_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56672_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, @@ -1432,17 +1450,8 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, BCM53651_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM53652_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM53653_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56568_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53654_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56670_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56760_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56761_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56762_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56764_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56765_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56766_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56768_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56069_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56068_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56160_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56162_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56163_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, @@ -1737,6 +1746,28 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, +#ifdef BCM_Q3A_SUPPORT + { BROADCOM_VENDOR_ID, Q3A_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3A_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3A_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3A_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3A_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3A_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3A_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3A_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3A_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3A_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3U_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3U_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3U_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3U_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3U_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3N_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3N_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3N_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3N_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3N_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, +#endif #endif #endif /* BCM_DNX_SUPPORT */ #ifdef BCM_DFE_SUPPORT @@ -2864,7 +2895,7 @@ _pci_probe(struct pci_dev *dev, const struct pci_device_id *ent) shbde_iproc_config_init(icfg, ctrl->bde_dev.device, ctrl->bde_dev.rev); if (debug >= 2) { - gprintk("iproc version = %x dma_hi_bits = %x\n", icfg->iproc_ver, icfg->dma_hi_bits); + gprintk("iproc version = 0x%x dma_hi_bits = 0x%x\n", icfg->iproc_ver, icfg->dma_hi_bits); } icfg->use_msi = ctrl->use_msi; @@ -4086,6 +4117,14 @@ _interrupt_disconnect(int d) if (unlikely(debug > 1)) gprintk("%s: isr_active = %d\n", __func__, isr_active); +#ifdef CONFIG_PCI_MSI + if (isr_active) { + if (ctrl->intr_pending && (ctrl->use_msi >= PCI_USE_INT_MSI)) { + del_timer_sync(&ctrl->isr_tick); + } + } +#endif + if (isr2_dev) { if (debug >= 1) { gprintk("disconnect secondary isr\n"); @@ -4096,6 +4135,12 @@ _interrupt_disconnect(int d) if (ctrl->isr) { /* Primary handler still active */ SYNC_IRQ(ctrl->iLine); + + /* restart timer to handling pending interrupts */ + if (ctrl->intr_pending && (ctrl->use_msi >= PCI_USE_INT_MSI)) { + ctrl->isr_tick.expires = jiffies + msecs_to_jiffies(isrtickms); + add_timer(&ctrl->isr_tick); + } return 0; } } else { @@ -4107,6 +4152,12 @@ _interrupt_disconnect(int d) if (ctrl->isr2) { /* Secondary handler still active */ SYNC_IRQ(ctrl->iLine); + + /* restart timer to handling pending interrupts */ + if (ctrl->intr_pending && (ctrl->use_msi >= PCI_USE_INT_MSI)) { + ctrl->isr_tick.expires = jiffies + msecs_to_jiffies(isrtickms); + add_timer(&ctrl->isr_tick); + } return 0; } } @@ -4149,9 +4200,6 @@ _interrupt_disconnect(int d) #ifdef CONFIG_PCI_MSI if (ctrl->use_msi >= PCI_USE_INT_MSI) { _msi_disconnect(ctrl); - if (ctrl->intr_pending) { - del_timer_sync(&ctrl->isr_tick); - } } #endif } @@ -4455,6 +4503,10 @@ lkbde_cpu_pci_register(int d) case JERICHO3_DEVICE_ID: case J3AI_DEVICE_ID: case Q3D_DEVICE_ID: +#ifdef BCM_Q3A_SUPPORT + case Q3A_DEVICE_ID: + case Q3U_DEVICE_ID: +#endif #endif #endif #ifdef BCM_DNXF_SUPPORT diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c index 9d1772adbdb..d47ed73390e 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c @@ -748,6 +748,17 @@ lkbde_edk_get_dma_info(int dev_id, phys_addr_t* cpu_pbase, phys_addr_t* dma_pbas return 0; } +void * +lkbde_edk_dmamem_map_p2v(dma_addr_t paddr) +{ + if ((paddr >= _edk_dma_pool[0].dma_pbase) && + (paddr < (_edk_dma_pool[0].dma_pbase + _edk_dma_pool[0].size))) { + return (_edk_dma_pool[0].dma_vbase + (paddr - _edk_dma_pool[0].dma_pbase)); + } else { + return NULL; + } +} + /* * The below function validates the memory to the EDK allocated DMA pool, * required to user space via the BDE device file. @@ -759,12 +770,14 @@ _edk_vm_is_valid(struct file *filp, struct vm_area_struct *vma) unsigned long size = vma->vm_end - vma->vm_start; int i, ndevices; - ndevices = BDE_NUM_DEVICES(BDE_SWITCH_DEVICES); + ndevices = LINUX_BDE_MAX_DEVICES; for (i = 0; i < ndevices; i++) { - if (phys_addr < (unsigned long )_edk_dma_pool[i].cpu_pbase || - (phys_addr + size) > ((unsigned long )_edk_dma_pool[i].cpu_pbase + + if (_edk_dma_pool[i].dma_vbase) { + if (phys_addr < (unsigned long )_edk_dma_pool[i].cpu_pbase || + (phys_addr + size) > ((unsigned long )_edk_dma_pool[i].cpu_pbase + _edk_dma_pool[i].size)) { - continue; + continue; + } } return 1; } @@ -812,7 +825,7 @@ _mpool_free(void) if (_dma_vbase) { if (dma_debug >= 1) gprintk("freeing v=0x%lx p=0x%lx size=0x%lx\n", (unsigned long)_dma_vbase,(unsigned long) _dma_pbase, (unsigned long)_dma_mem_size); if (_dma_alloc_coherent_device != NULL) { - dma_free_coherent(_dma_alloc_coherent_device, _dma_mem_size, _dma_vbase, _dma_pbase); + dma_free_attrs(_dma_alloc_coherent_device, _dma_mem_size, _dma_vbase, _dma_pbase, DMA_FORCE_CONTIGUOUS); _dma_alloc_coherent_device = NULL; } } @@ -983,7 +996,7 @@ void _dma_per_device_init(int dev_index) #if _SIMPLE_MEMORY_ALLOCATION_ if (_dma_pool_alloc_state == DMA_POOL_INITIALIZED && dmaalloc == ALLOC_TYPE_API) { /* allocate the DMA buffer pool and map it to the device, uses CMA */ - _dma_vbase = dma_alloc_coherent(dev, _dma_mem_size, &dma_addr, GFP_KERNEL); + _dma_vbase = dma_alloc_attrs(dev, _dma_mem_size, &dma_addr, GFP_KERNEL, DMA_FORCE_CONTIGUOUS); if (!_dma_vbase) { _dma_pool_alloc_state = DMA_POOL_FAILED; gprintk("Failed to allocate coherent memory pool of size 0x%x\n", _dma_mem_size); @@ -1094,7 +1107,7 @@ void _dma_init(void) dmasize +=5; } - } + } #endif /* INCLUDE_SRAM_DMA */ if (*dmasize != '\0') { if ((dmasize[strlen(dmasize)-1] & ~0x20) == 'M') { @@ -1103,10 +1116,6 @@ void _dma_init(void) } else { gprintk("DMA memory size must be specified as e.g. dmasize=8M\n"); } - if (_dma_mem_size & (_dma_mem_size-1)) { - gprintk("dmasize must be a power of 2 (1M, 2M, 4M, 8M etc.)\n"); - _dma_mem_size = 0; - } } } @@ -1290,7 +1299,6 @@ _sinval(int d, void *ptr, int length) #if defined(dma_cache_wback_inv) dma_cache_wback_inv((unsigned long)ptr, length); #else - dma_sync_single_for_cpu(NULL, (unsigned long)ptr, length, DMA_BIDIRECTIONAL); #endif return 0; @@ -1302,7 +1310,6 @@ _sflush(int d, void *ptr, int length) #if defined(dma_cache_wback_inv) dma_cache_wback_inv((unsigned long)ptr, length); #else - dma_sync_single_for_cpu(NULL, (unsigned long)ptr, length, DMA_BIDIRECTIONAL); #endif @@ -1329,11 +1336,9 @@ _dma_pprint(struct seq_file *m) pprintf(m, "\tdmasize=%s\n", dmasize); pprintf(m, "\thimem=%s\n", himem); pprintf(m, "\thimemaddr=%s\n", himemaddr); - pprintf(m, "DMA Memory (%s): %d bytes, %d used, %d free%s\n", + pprintf(m, "DMA Memory (%s): %d bytes allocated%s\n", (_use_himem) ? "high" : dmaalloc ? "kernel-api" : "kernel-chunk", (_dma_vbase) ? _dma_mem_size : 0, - (_dma_vbase) ? mpool_usage(_dma_pool) : 0, - (_dma_vbase) ? _dma_mem_size - mpool_usage(_dma_pool) : 0, USE_LINUX_BDE_MMAP ? ", local mmap" : ""); } @@ -1343,6 +1348,7 @@ _dma_pprint(struct seq_file *m) #ifdef BDE_EDK_SUPPORT LKM_EXPORT_SYM(lkbde_edk_get_dma_info); +LKM_EXPORT_SYM(lkbde_edk_dmamem_map_p2v); #endif LKM_EXPORT_SYM(kmalloc_giant); LKM_EXPORT_SYM(kfree_giant); diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile index 444d72c4ebd..1ea23533c3d 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile @@ -109,7 +109,7 @@ $(KMODULE): $(MODULE) mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers - MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko + MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko include $(SDK)/make/Make.depend # } diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c index 4d0929c86af..3b12b4a914d 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c @@ -1135,6 +1135,7 @@ _intr_regs_init(bde_ctrl_t *ctrl, int flag) case BCM53651_DEVICE_ID: case BCM53652_DEVICE_ID: case BCM53653_DEVICE_ID: + case BCM53654_DEVICE_ID: ihost_sw_prog_intr_num = P19_SW_PROG_INTR_IRQ; break; default: @@ -1292,6 +1293,7 @@ _devices_init(int d) case BCM53651_DEVICE_ID: case BCM53652_DEVICE_ID: case BCM53653_DEVICE_ID: + case BCM53654_DEVICE_ID: ctrl->isr = (isr_f)_cmicx_interrupt; if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { if (!ihost_intr_enable_base) { @@ -1359,6 +1361,10 @@ _devices_init(int d) case J3AI_DEVICE_ID: case Q3D_DEVICE_ID: +#ifdef BCM_Q3A_SUPPORT + case Q3A_DEVICE_ID: + case Q3U_DEVICE_ID: +#endif #endif #ifdef BCM_DNXF3_SUPPORT case RAMON2_DEVICE_ID: @@ -1582,6 +1588,15 @@ _dma_resource_get(unsigned inst_id, phys_addr_t *cpu_pbase, phys_addr_t *dma_pba return -1; } res = &_bde_inst_resource[inst_id]; + + if (res->is_active == 0) { + *cpu_pbase = 0; + *dma_pbase = 0; + *size = 0; + spin_unlock(&bde_resource_lock); + return -2; + } + dma_size = res->dma_size; dma_offset = res->dma_offset; spin_unlock(&bde_resource_lock); @@ -1770,8 +1785,9 @@ _ioctl(unsigned int cmd, unsigned long arg) lubde_ioctl_t io; phys_addr_t cpu_pbase, dma_pbase; ssize_t size; + ssize_t total_size; const ibde_dev_t *bde_dev; - int inst_id, idx; + int inst_id, idx, inst_i; bde_inst_resource_t *res; uint32_t *mapaddr; @@ -1838,9 +1854,22 @@ _ioctl(unsigned int cmd, unsigned long arg) break; case LUBDE_GET_DMA_INFO: inst_id = io.dev; - if (_bde_multi_inst) { - if (_dma_resource_get(inst_id, &cpu_pbase, &dma_pbase, &size)) { - io.rc = LUBDE_FAIL; + if (_bde_multi_inst && (inst_id != BDE_DEV_INST_ID_INVALID)) { + if (inst_id == BDE_DEV_INST_ID_GET_FREE) { + /* Get the total DMA size */ + lkbde_get_dma_info(&cpu_pbase, &dma_pbase, &total_size); + /* Decrease the total size for each allocated SDK instance */ + for (inst_i = 0; inst_i < LINUX_BDE_MAX_DEVICES; inst_i++) + { + if (_bde_inst_resource[inst_i].is_active && (_dma_resource_get(inst_i, &cpu_pbase, &dma_pbase, &size) == 0)) { + total_size -= size; + } + } + size = total_size; + } else { + if (_dma_resource_get(inst_id, &cpu_pbase, &dma_pbase, &size)) { + io.rc = LUBDE_FAIL; + } } } else { lkbde_get_dma_info(&cpu_pbase, &dma_pbase, &size); diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c index 29334c997a9..f7c4863d3a1 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c @@ -157,9 +157,7 @@ shbde_iproc_config_init(shbde_iproc_config_t *icfg, icfg->iproc_ver = 7; icfg->dma_hi_bits = 0x2; break; - case 0xb560: /* Apache */ case 0xb670: /* MO */ - case 0xb760: /* Maverick */ icfg->iproc_ver = 0xB; break; case 0xb160: /* Hurricane3 */ @@ -175,11 +173,6 @@ shbde_iproc_config_init(shbde_iproc_config_t *icfg, /* Check for exceptions */ switch (icfg->dev_id) { - case 0xb069: - case 0xb068: - icfg->iproc_ver = 0xB; /*Ranger2+ Apache Family */ - icfg->dma_hi_bits = 0; - break; case 0xb168: /* Ranger3+ */ case 0xb169: icfg->iproc_ver = 0; diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c index 6cd8aa0ec4c..3e8c61cc590 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c @@ -48,11 +48,19 @@ #include "bcm-genl-dev.h" /* Module header Op-Codes */ -#define SOC_HIGIG_OP_CPU 0x00 /* CPU Frame */ -#define SOC_HIGIG_OP_UC 0x01 /* Unicast Frame */ -#define SOC_HIGIG_OP_BC 0x02 /* Broadcast or DLF frame */ -#define SOC_HIGIG_OP_MC 0x03 /* Multicast Frame */ -#define SOC_HIGIG_OP_IPMC 0x04 /* IP Multicast Frame */ +#define SOC_HIGIG_OP_CPU 0x00 /* CPU Frame */ +#define SOC_HIGIG_OP_UC 0x01 /* Unicast Frame */ +#define SOC_HIGIG_OP_BC 0x02 /* Broadcast or DLF frame */ +#define SOC_HIGIG_OP_MC 0x03 /* Multicast Frame */ +#define SOC_HIGIG_OP_IPMC 0x04 /* IP Multicast Frame */ + +/* + * Bits [17:16] are used as encoded values for SFLOW in Rx reason for + * DCB type 38. + */ +#define DCB38_RX_REASON_MASK_SAMPLE 0x30000 +#define DCB38_RX_REASON_VAL_SAMPLE_DEST 0x20000 +#define DCB38_RX_REASON_VAL_SAMPLE_SOURCE 0x30000 static dcb_handle_t g_dcb_hdl[LINUX_BDE_MAX_DEVICES]; @@ -134,12 +142,27 @@ bcmgenl_dev_pktmeta_rx_reason_get(int dev_no, void *pkt_meta, uint64_t *reason) return 0; } +/*! + * \brief Get Rx reason for sample-source for the specified device. + * + * The mask argument is used to indicate the valid bit-range of the Rx reason + * value. + * + * \param [in] dev_no Device number. + * \param [out] val Value of Rx reason for sample-source. + * \param [out] mask Mask of Rx reason for sample-source if not NULL. + * + * \retval 0 No errors. + * \retval -1 Failed to get the target Rx reason. + */ int -bcmgenl_dev_rx_reason_sample_source_get(int dev_no, uint64_t *val) +bcmgenl_dev_rx_reason_sample_source_get(int dev_no, + uint64_t *val, uint64_t *mask) { dcb_handle_t *dcbh = dcb_handle_get(dev_no); soc_rx_reason_t *map; int idx = 0; + uint64_t m = 0; if (dcbh == NULL || val == NULL) { return -1; @@ -147,23 +170,79 @@ bcmgenl_dev_rx_reason_sample_source_get(int dev_no, uint64_t *val) *val = 0; if (DCB_TYPE(dcbh) == 38) { - /* Rx reason for SampleSouce is an encoded value (3) in bits [17:16] */ - *val = 0x30000; + *val = DCB38_RX_REASON_VAL_SAMPLE_SOURCE; + m = DCB38_RX_REASON_MASK_SAMPLE; } else { map = DCB_OP(dcbh)->rx_reason_maps[0]; do { if (map[idx] == socRxReasonSampleSource) { *val = (uint64_t)1 << idx; + m = *val; break; } } while (map[++idx] != socRxReasonInvalid); } if (*val == 0) { - gprintk("%s: No rx reasone sample source for dcb type %d\n", + gprintk("%s: No rx reasone sample-source for dcb type %d\n", __func__, DCB_TYPE(dcbh)); return -1; } + if (mask) { + *mask = m; + } + return 0; +} + +/*! + * \brief Get Rx reason for sample-dest for the specified device. + * + * The mask argument is used to indicate the valid bit-range of the Rx reason + * value. + * + * \param [in] dev_no Device number. + * \param [out] val Value of Rx reason for sample-dest. + * \param [out] mask Mask of Rx reason for sample-dest if not NULL. + * + * \retval 0 No errors. + * \retval -1 Failed to get the target Rx reason. + */ +int +bcmgenl_dev_rx_reason_sample_dest_get(int dev_no, + uint64_t *val, uint64_t *mask) +{ + dcb_handle_t *dcbh = dcb_handle_get(dev_no); + soc_rx_reason_t *map; + int idx = 0; + uint64_t m = 0; + + if (dcbh == NULL || val == NULL) { + return -1; + } + *val = 0; + + if (DCB_TYPE(dcbh) == 38) { + *val = DCB38_RX_REASON_VAL_SAMPLE_DEST; + m = DCB38_RX_REASON_MASK_SAMPLE; + } else { + map = DCB_OP(dcbh)->rx_reason_maps[0]; + do { + if (map[idx] == socRxReasonSampleDest) { + *val = (uint64_t)1 << idx; + m = *val; + break; + } + } while (map[++idx] != socRxReasonInvalid); + } + + if (*val == 0) { + gprintk("%s: No rx reasone sample-dest for dcb type %d\n", + __func__, DCB_TYPE(dcbh)); + return -1; + } + if (mask) { + *mask = m; + } return 0; } diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h index 80494346ca3..bc82d9a9af7 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h @@ -42,7 +42,10 @@ extern int bcmgenl_dev_pktmeta_rx_reason_get(int dev_no, void *pkt_meta, uint64_t *reason); extern int -bcmgenl_dev_rx_reason_sample_source_get(int dev_no, uint64_t *val); +bcmgenl_dev_rx_reason_sample_source_get(int dev_no, uint64_t *val, uint64_t *mask); + +extern int +bcmgenl_dev_rx_reason_sample_dest_get(int dev_no, uint64_t *val, uint64_t *mask); extern int bcmgenl_dev_dcb_info_get(int dev_no, int *dcb_type, int *dcb_size); diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c index 2e8744440f4..d2f61f343ea 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c @@ -122,6 +122,7 @@ typedef struct genl_stats_s { unsigned long pkts_f_genl_cb; unsigned long pkts_f_genl_mod; unsigned long pkts_f_handled; + unsigned long pkts_f_pass_through; unsigned long pkts_f_tag_stripped; unsigned long pkts_f_dst_mc; unsigned long pkts_f_src_cpu; @@ -420,18 +421,16 @@ genl_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, schedule_work(&g_genl_work.wq); spin_unlock_irqrestore(&g_genl_work.lock, flags); - /* expected rv values: - * -ve for error - * 0 for passthrough - * 1 for packet handled - * */ - /* Set rv to packet handled */ rv = 1; GENL_FILTER_CB_PKT_HANDLED: - g_genl_stats.pkts_f_handled++; - return rv; + if (rv == 1) { + g_genl_stats.pkts_f_handled++; + return 1; + } + g_genl_stats.pkts_f_pass_through++; + return 0; } /* @@ -506,6 +505,7 @@ genl_proc_stats_show(struct seq_file *m, void *v) seq_printf(m, " pkts filter generic cb %10lu\n", g_genl_stats.pkts_f_genl_cb); seq_printf(m, " pkts sent to generic module %10lu\n", g_genl_stats.pkts_f_genl_mod); seq_printf(m, " pkts handled by generic cb %10lu\n", g_genl_stats.pkts_f_handled); + seq_printf(m, " pkts pass through %10lu\n", g_genl_stats.pkts_f_pass_through); seq_printf(m, " pkts with vlan tag stripped %10lu\n", g_genl_stats.pkts_f_tag_stripped); seq_printf(m, " pkts with mc destination %10lu\n", g_genl_stats.pkts_f_dst_mc); seq_printf(m, " pkts with cpu source %10lu\n", g_genl_stats.pkts_f_src_cpu); diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c index 25da4decc78..975a3f3796f 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c @@ -87,6 +87,23 @@ LKM_MOD_PARAM(psample_qlen, "i", int, 0); MODULE_PARM_DESC(psample_qlen, "psample queue length (default 1024 buffers)"); +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) +static inline void +bcmgenl_sample_packet(struct psample_group *group, struct sk_buff *skb, + u32 trunc_size, int in_ifindex, int out_ifindex, + u32 sample_rate) +{ + struct psample_metadata md = {}; + + md.trunc_size = trunc_size; + md.in_ifindex = in_ifindex; + md.out_ifindex = out_ifindex; + psample_sample_packet(group, skb, sample_rate, &md); +} +#else +#define bcmgenl_sample_packet psample_sample_packet +#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) */ + /* driver proc entry root */ static struct proc_dir_entry *psample_proc_root = NULL; static char psample_procfs_path[80]; @@ -96,6 +113,9 @@ typedef struct psample_info_s { struct net *netns; struct list_head group_list; uint64_t rx_reason_sample_source[LINUX_BDE_MAX_DEVICES]; + uint64_t rx_reason_sample_source_mask[LINUX_BDE_MAX_DEVICES]; + uint64_t rx_reason_sample_dest[LINUX_BDE_MAX_DEVICES]; + uint64_t rx_reason_sample_dest_mask[LINUX_BDE_MAX_DEVICES]; } psample_info_t; static psample_info_t g_psample_info; @@ -126,11 +146,17 @@ typedef struct psample_stats_s { } psample_stats_t; static psample_stats_t g_psample_stats; +/*! Sampling type */ +#define SAMPLE_TYPE_NONE 0 +#define SAMPLE_TYPE_INGRESS 1 +#define SAMPLE_TYPE_EGRESS 2 + typedef struct psample_meta_s { int trunc_size; int src_ifindex; int dst_ifindex; int sample_rate; + int sample_type; } psample_meta_t; typedef struct psample_pkt_s { @@ -203,29 +229,31 @@ psample_meta_dstport_get(int dev_no, void *pkt_meta, bool *is_mcast) } static int -psample_meta_sample_reason(int dev_no, void *pkt_meta) +psample_meta_sample_type_get(int dev_no, void *pkt_meta) { uint64_t rx_reason; - uint64_t *exp_reason = &g_psample_info.rx_reason_sample_source[dev_no]; + static bool rx_reason_set[LINUX_BDE_MAX_DEVICES]; + uint64_t *smpls = &g_psample_info.rx_reason_sample_source[dev_no]; + uint64_t *smpls_mask = &g_psample_info.rx_reason_sample_source_mask[dev_no]; + uint64_t *smpld = &g_psample_info.rx_reason_sample_dest[dev_no]; + uint64_t *smpld_mask = &g_psample_info.rx_reason_sample_dest_mask[dev_no]; if (bcmgenl_dev_pktmeta_rx_reason_get(dev_no, pkt_meta, &rx_reason) < 0) { - return 0; + return SAMPLE_TYPE_NONE; } - if (*exp_reason == 0) { - if (bcmgenl_dev_rx_reason_sample_source_get(dev_no, exp_reason) < 0) { - return 0; - } + + if (!rx_reason_set[dev_no]) { + bcmgenl_dev_rx_reason_sample_source_get(dev_no, smpls, smpls_mask); + bcmgenl_dev_rx_reason_sample_dest_get(dev_no, smpld, smpld_mask); + rx_reason_set[dev_no] = true; } - /* Check if only sample reason code is set. - * If only sample reason code, then consume pkt. - * If other reason codes exist, then pkt should be - * passed through to Linux network stack. - */ - if ((rx_reason & *exp_reason) == *exp_reason) { - return 1; + if (*smpls && (rx_reason & *smpls_mask) == *smpls) { + return SAMPLE_TYPE_INGRESS; + } else if (*smpld && (rx_reason & *smpld_mask) == *smpld) { + return SAMPLE_TYPE_EGRESS; } - return 0; + return SAMPLE_TYPE_NONE; } static int @@ -293,6 +321,7 @@ psample_meta_get(int dev_no, kcom_filter_t *kf, void *pkt_meta, sflow_meta->dst_ifindex = dst_ifindex; sflow_meta->trunc_size = sample_size; sflow_meta->sample_rate = sample_rate; + sflow_meta->sample_type = psample_meta_sample_type_get(dev_no, pkt_meta); return 0; } @@ -311,36 +340,23 @@ psample_task(struct work_struct *work) list_del(list_ptr); g_psample_stats.pkts_c_qlen_cur--; spin_unlock_irqrestore(&psample_work->lock, flags); - + /* send to psample */ if (pkt) { -#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \ - (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR)) - struct psample_metadata md = {0}; - md.trunc_size = pkt->meta.trunc_size; - md.in_ifindex = pkt->meta.src_ifindex; - md.out_ifindex = pkt->meta.dst_ifindex; -#endif PSAMPLE_CB_DBG_PRINT("%s: group 0x%x, trunc_size %d, src_ifdx 0x%x, dst_ifdx 0x%x, sample_rate %d\n", - __func__, pkt->group->group_num, - pkt->meta.trunc_size, pkt->meta.src_ifindex, + __func__, pkt->group->group_num, + pkt->meta.trunc_size, pkt->meta.src_ifindex, pkt->meta.dst_ifindex, pkt->meta.sample_rate); -#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \ - (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR)) - psample_sample_packet(pkt->group, + + bcmgenl_sample_packet(pkt->group, pkt->skb, - pkt->meta.sample_rate, - &md); -#else - psample_sample_packet(pkt->group, - pkt->skb, pkt->meta.trunc_size, pkt->meta.src_ifindex, pkt->meta.dst_ifindex, pkt->meta.sample_rate); -#endif + g_psample_stats.pkts_f_psample_mod++; - + dev_kfree_skb_any(pkt->skb); kfree(pkt); } @@ -354,9 +370,11 @@ psample_filter_cb(uint8_t *pkt, int size, int dev_no, void *pkt_meta, int chan, kcom_filter_t *kf) { struct psample_group *group = NULL; - psample_meta_t meta; + psample_meta_t meta; int rv = 0; + memset(&meta, 0, sizeof(meta)); + PSAMPLE_CB_DBG_PRINT("%s: pkt size %d, kf->dest_id %d, kf->cb_user_data %d\n", __func__, size, kf->dest_id, kf->cb_user_data); g_psample_stats.pkts_f_psample_cb++; @@ -382,7 +400,7 @@ psample_filter_cb(uint8_t *pkt, int size, int dev_no, void *pkt_meta, g_psample_stats.pkts_d_invalid_size++; goto PSAMPLE_FILTER_CB_PKT_HANDLED; } else { - size -= FCS_SZ; + size -= FCS_SZ; } /* Account for padding in libnl used by psample */ @@ -422,12 +440,13 @@ psample_filter_cb(uint8_t *pkt, int size, int dev_no, void *pkt_meta, /* setup skb to point to pkt */ memcpy(skb->data, pkt, meta.trunc_size); skb_put(skb, meta.trunc_size); + /* save original size for PSAMPLE_ATTR_ORIGSIZE in skb->len */ skb->len = size; psample_pkt->skb = skb; spin_lock_irqsave(&g_psample_work.lock, flags); - list_add_tail(&psample_pkt->list, &g_psample_work.pkt_list); - + list_add_tail(&psample_pkt->list, &g_psample_work.pkt_list); + g_psample_stats.pkts_c_qlen_cur++; if (g_psample_stats.pkts_c_qlen_cur > g_psample_stats.pkts_c_qlen_hi) { g_psample_stats.pkts_c_qlen_hi = g_psample_stats.pkts_c_qlen_cur; @@ -437,17 +456,17 @@ psample_filter_cb(uint8_t *pkt, int size, int dev_no, void *pkt_meta, spin_unlock_irqrestore(&g_psample_work.lock, flags); } else { g_psample_stats.pkts_d_sampling_disabled++; - } + } PSAMPLE_FILTER_CB_PKT_HANDLED: /* if sample reason only, consume pkt. else pass through */ - rv = psample_meta_sample_reason(dev_no, pkt_meta); - if (rv) { + if (meta.sample_type == SAMPLE_TYPE_INGRESS || + meta.sample_type == SAMPLE_TYPE_EGRESS) { g_psample_stats.pkts_f_handled++; - } else { - g_psample_stats.pkts_f_pass_through++; + return 1; } - return rv; + g_psample_stats.pkts_f_pass_through++; + return 0; } /* @@ -457,7 +476,7 @@ static int proc_rate_show(void *cb_data, bcmgenl_netif_t *netif) { struct seq_file *m = (struct seq_file *)cb_data; - + seq_printf(m, " %-14s %d\n", netif->dev->name, netif->sample_rate); return 0; @@ -550,7 +569,7 @@ static int proc_size_show(void *cb_data, bcmgenl_netif_t *netif) { struct seq_file *m = (struct seq_file *)cb_data; - + seq_printf(m, " %-14s %d\n", netif->dev->name, netif->sample_size); return 0; } @@ -622,7 +641,7 @@ psample_proc_size_write(struct file *file, const char *buf, gprintk("Warning: Failed setting psample size on " "unknown network interface: '%s'\n", sample_str); } - + return count; } diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c old mode 100755 new mode 100644 index 98d5592d5f7..e375b7d361a --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c @@ -390,6 +390,16 @@ static inline void *netdev_priv(struct net_device *dev) } #endif /* KERNEL_VERSION(2,4,27) */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,5,0) +#define netdev_get_by_name(net, dev, tracker, gfp) \ + dev_get_by_name(net, dev) +#endif /* KERNEL_VERSION(6,5,0) */ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,0,0) +#define netdev_put(dev, tracker) \ + dev_put(dev) +#endif /* KERNEL_VERSION(6,0,0) */ + #if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,23) /* Special check for MontaVista 2.4.20 MIPS */ #if !(defined(MAX_USER_RT_PRIO) && defined(CONFIG_MIPS)) @@ -665,6 +675,7 @@ typedef struct bkn_switch_info_s { uint32_t udh_length_type[4]; /* Size of UDH header per type */ uint32_t udh_size; /* Size of UDH header on legacy devices */ uint32_t oamp_punt; /* OAMP port if nonzero */ + uint32_t enet_channels; /* Ethernet channels, No header observed.*/ uint8_t no_skip_udh_check; /* Indicates UDH won't be skipped */ uint8_t oam_dm_tod_exist; /* Indicates presence of OAM TOD MSB */ uint8_t system_headers_mode; /* Indicates system header mode */ @@ -969,6 +980,20 @@ typedef struct bkn_dune_system_header_info_s { uint32_t trap_qualifier; uint32_t trap_id; } internal; + /** Flags for RX header parser */ + /** Indicates whether 1st system header is following */ +#define BKN_RX_HEADER_F_HAS_ONE_SYSTEM_HEADER (0x1 << 0) + /** Indicates whether 2nd system header is following */ +#define BKN_RX_HEADER_F_HAS_TWO_SYSTEM_HEADER (0x1 << 1) + /** Indicates whether TSH is following */ +#define BKN_RX_HEADER_F_HAS_TSH (0x1 << 2) + /** Indicates whether OTSH is following */ +#define BKN_RX_HEADER_F_HAS_OTSH (0x1 << 3) + /** Indicates whether internal header is following */ +#define BKN_RX_HEADER_F_HAS_INTERNAL_HEADER (0x1 << 4) + /** Indicates whether TOD second header is following */ +#define BKN_RX_HEADER_F_HAS_OAM_DM_TOD_SECOND (0x1 << 5) + uint32_t flags; } bkn_dune_system_header_info_t; #define PREV_IDX(_cur, _max) (((_cur) == 0) ? (_max) - 1 : (_cur) - 1) @@ -1040,6 +1065,7 @@ typedef struct bkn_priv_s { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)) struct ethtool_link_settings link_settings; #endif + int ref_count; } bkn_priv_t; typedef struct bkn_filter_s { @@ -1223,6 +1249,9 @@ bkn_sleep(int clicks) /* Unet channel */ #define UNET_CH(_d, _ch) ((_d)->unet_channels & (1 << (_ch))) +/* Ethernet channel */ +#define ENET_CH(_d, _ch) ((_d)->enet_channels & (1 << (_ch))) + /* * DMA_STAT: control bits * @@ -1297,7 +1326,7 @@ bkn_sleep(int clicks) /* CMICX minimum packet header size for protect underflow. */ #define CMICX_DCB_SIZE_MIN 16 /* CMICR minimum packet header size for protect underflow. */ -#define CMICR_DCB_SIZE_MIN 16 +#define CMICR_DCB_SIZE_MIN 16 /* Minimum packet header size for protect underflow. */ #define DCB_SIZE_MIN 20 /* Maximum packet raw data size for filter validation. */ @@ -3363,9 +3392,7 @@ bkn_dpp_packet_parse_ftmh( bkn_switch_info_t *sinfo, uint8_t *buf, uint32_t buf_len, - bkn_dune_system_header_info_t *packet_info, - uint8_t *is_tsh_en, - uint8_t *is_inter_hdr_en) + bkn_dune_system_header_info_t *packet_info) { uint32_t pkt_offset = packet_info->system_header_size; uint32_t dsp_ext_exist = 0; @@ -3399,11 +3426,11 @@ bkn_dpp_packet_parse_ftmh( if (fld_val & 0x1) { - *is_inter_hdr_en = TRUE; + packet_info->flags |= BKN_RX_HEADER_F_HAS_INTERNAL_HEADER; } if (fld_val & 0x2) { - *is_tsh_en = TRUE; + packet_info->flags |= BKN_RX_HEADER_F_HAS_OTSH; } pkt_offset += BKN_DPP_FTMH_SIZE_BYTE; @@ -3441,7 +3468,6 @@ bkn_dpp_packet_parse_otsh( uint8_t *buf, uint32_t buf_len, bkn_dune_system_header_info_t *packet_info, - uint8_t *is_oam_dm_tod_en, uint8_t *is_skip_udh) { uint32_t pkt_offset = packet_info->system_header_size; @@ -3463,7 +3489,7 @@ bkn_dpp_packet_parse_otsh( &oam_sub_type); if ((oam_sub_type == BKN_DPP_OTSH_OAM_SUB_TYPE_DM_1588) || (oam_sub_type == BKN_DPP_OTSH_OAM_SUB_TYPE_DM_NTP)) { if (sinfo->oam_dm_tod_exist) { - *is_oam_dm_tod_en = TRUE; + packet_info->flags |= BKN_RX_HEADER_F_HAS_OAM_DM_TOD_SECOND; } /* Down MEP DM trapped packets will not have UDH present (even if configured), except for QAX when custom_feature_oam_dm_tod_msb_add_enable=0 */ if (!sinfo->no_skip_udh_check) { @@ -3601,19 +3627,17 @@ bkn_dpp_packet_header_parse( uint32_t buff_len, bkn_dune_system_header_info_t *packet_info) { - uint8_t is_inter_hdr_en = FALSE; - uint8_t is_tsh_en = FALSE; uint8_t is_oamp_punted = FALSE; uint8_t is_trapped = FALSE; - uint8_t is_oam_dm_tod_en = FALSE; uint8_t is_skip_udh = FALSE; if ((sinfo == NULL) || (buff == NULL) || (packet_info == NULL)) { return -1; } + packet_info->flags = BKN_RX_HEADER_F_HAS_ONE_SYSTEM_HEADER; /* FTMH */ - bkn_dpp_packet_parse_ftmh(sinfo, buff, buff_len, packet_info, &is_tsh_en, &is_inter_hdr_en); + bkn_dpp_packet_parse_ftmh(sinfo, buff, buff_len, packet_info); /* Check if packet was punted to CPU by OAMP */ if (device_is_dpp(sinfo)) @@ -3637,17 +3661,17 @@ bkn_dpp_packet_header_parse( /* OTSH */ - if (is_tsh_en == TRUE) + if (packet_info->flags & BKN_RX_HEADER_F_HAS_OTSH) { - bkn_dpp_packet_parse_otsh(sinfo, buff, buff_len, packet_info, &is_oam_dm_tod_en, &is_skip_udh); + bkn_dpp_packet_parse_otsh(sinfo, buff, buff_len, packet_info, &is_skip_udh); } /* Internal header is forced to be present if packet was punted to CPU by OAMP */ if (is_oamp_punted) { - is_inter_hdr_en = TRUE; + packet_info->flags |= BKN_RX_HEADER_F_HAS_INTERNAL_HEADER; } /* Internal */ - if (is_inter_hdr_en) + if (packet_info->flags & BKN_RX_HEADER_F_HAS_INTERNAL_HEADER) { bkn_dpp_packet_parse_internal(sinfo, buff, buff_len, packet_info, is_oamp_punted, &is_trapped); } @@ -3660,35 +3684,34 @@ bkn_dpp_packet_header_parse( packet_info->system_header_size += sinfo->udh_size; } /* OAM DM TOD header */ - if(is_oam_dm_tod_en) { + if (packet_info->flags & BKN_RX_HEADER_F_HAS_OAM_DM_TOD_SECOND) { packet_info->system_header_size += BKN_DPP_OAM_DM_TOD_SIZE_BYTE; } /* Additional layer of system headers */ if (is_oamp_punted && is_trapped) { - is_inter_hdr_en = FALSE; - is_tsh_en = FALSE; is_oamp_punted = FALSE; is_trapped = FALSE; - is_oam_dm_tod_en = FALSE; is_skip_udh = FALSE; + packet_info->flags = BKN_RX_HEADER_F_HAS_TWO_SYSTEM_HEADER; + /* FTMH */ - bkn_dpp_packet_parse_ftmh(sinfo, buff, buff_len, packet_info, &is_tsh_en, &is_inter_hdr_en); + bkn_dpp_packet_parse_ftmh(sinfo, buff, buff_len, packet_info); /* OTSH */ - if (is_tsh_en == TRUE) + if (packet_info->flags & BKN_RX_HEADER_F_HAS_OTSH) { - bkn_dpp_packet_parse_otsh(sinfo, buff, buff_len, packet_info, &is_oam_dm_tod_en, &is_skip_udh); + bkn_dpp_packet_parse_otsh(sinfo, buff, buff_len, packet_info, &is_skip_udh); } /* Internal */ - if (is_inter_hdr_en) + if (packet_info->flags & BKN_RX_HEADER_F_HAS_INTERNAL_HEADER) { bkn_dpp_packet_parse_internal(sinfo, buff, buff_len, packet_info, is_oamp_punted, &is_trapped); } /* OAMP Punted packets do not have UDH in the inner header for both JR1 and JR2 in JR1 mode */ /* OAM DM TOD header */ - if(is_oam_dm_tod_en) { + if (packet_info->flags & BKN_RX_HEADER_F_HAS_OAM_DM_TOD_SECOND) { packet_info->system_header_size += BKN_DPP_OAM_DM_TOD_SIZE_BYTE; } } @@ -3704,10 +3727,7 @@ bkn_dnx_packet_parse_ftmh( bkn_switch_info_t *sinfo, uint8_t *buf, uint32_t buf_len, - bkn_dune_system_header_info_t *packet_info, - uint8_t *is_tsh_en, - uint8_t *is_inter_hdr_en, - uint8_t *is_oam_dm_tod_second_en) + bkn_dune_system_header_info_t *packet_info) { uint32_t fld_val; uint32_t pkt_offset = packet_info->system_header_size; @@ -3740,14 +3760,14 @@ bkn_dnx_packet_parse_ftmh( BKN_DNX_FTMH_PPH_TYPE_IS_TSH_EN_MSB, BKN_DNX_FTMH_PPH_TYPE_IS_TSH_EN_NOF_BITS, &fld_val); - *is_tsh_en = fld_val; + packet_info->flags |= fld_val ? BKN_RX_HEADER_F_HAS_TSH : 0; /* FTMH: PPH-Type PPH base */ bkn_bitstream_get_field( &buf[pkt_offset], BKN_DNX_FTMH_PPH_TYPE_IS_PPH_EN_MSB, BKN_DNX_FTMH_PPH_TYPE_IS_PPH_EN_NOF_BITS, &fld_val); - *is_inter_hdr_en = fld_val; + packet_info->flags |= fld_val ? BKN_RX_HEADER_F_HAS_INTERNAL_HEADER : 0; /* FTMH: TM-Destination-Extension-Present */ bkn_bitstream_get_field( &buf[pkt_offset], @@ -3779,9 +3799,9 @@ bkn_dnx_packet_parse_ftmh( pkt_offset += BKN_DNX_FTMH_BASE_SIZE; - DBG_DUNE(("FTMH(10-%u): source-system-port 0x%x action_type %u is_tsh_en %u is_inter_hdr_en %u\n", + DBG_DUNE(("FTMH(10-%u): source-system-port 0x%x action_type %u\n", pkt_offset, packet_info->ftmh.source_sys_port_aggregate, - packet_info->ftmh.action_type, *is_tsh_en, *is_inter_hdr_en)); + packet_info->ftmh.action_type)); /* FTMH LB-Key Extension */ if (sinfo->ftmh_lb_key_ext_size > 0) @@ -3824,7 +3844,7 @@ bkn_dnx_packet_parse_ftmh( &fld_val); if ((fld_val == BKN_DNX_FTMH_ASE_OAM_SUB_TYPE_DM_1588) || (fld_val == BKN_DNX_FTMH_ASE_OAM_SUB_TYPE_DM_NTP)) { - *is_oam_dm_tod_second_en = TRUE; + packet_info->flags |= BKN_RX_HEADER_F_HAS_OAM_DM_TOD_SECOND; } } pkt_offset += BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE; @@ -3836,6 +3856,7 @@ bkn_dnx_packet_parse_ftmh( pkt_offset += BKN_DNX_FTMH_FLOW_ID_EXT_SIZE; DBG_DUNE(("FTMH Flow-ID Extension(3-%u) is present\n", pkt_offset)); } + DBG_DUNE(("FTMH flags = 0x%08x\n", packet_info->flags)); packet_info->system_header_size = pkt_offset; @@ -3968,6 +3989,14 @@ bkn_dnx_packet_parse_internal( udh_en = FALSE; } + /* OAM DMM/DMR TOD second header: PPH+TOD+UDH */ + if (sinfo->cmic_type == 'x') { + if (packet_info->flags & BKN_RX_HEADER_F_HAS_OAM_DM_TOD_SECOND) { + pkt_offset += BKN_DNX_TOD_SECOND_SIZE; + DBG_DUNE(("TOD second Header(4-%u) is present\n", pkt_offset)); + } + } + /* UDH Header */ if (udh_en) { @@ -3976,37 +4005,38 @@ bkn_dnx_packet_parse_internal( uint8_t data_type_2; uint8_t data_type_3; - /* UDH: UDH-Data-Type[0] */ - bkn_bitstream_get_field( - &buf[pkt_offset], - BKN_DNX_UDH_DATA_TYPE_0_MSB, - BKN_DNX_UDH_DATA_TYPE_0_NOF_BITS, - &fld_val); - data_type_0 = fld_val; - /* UDH: UDH-Data-Type[1] */ - bkn_bitstream_get_field( - &buf[pkt_offset], - BKN_DNX_UDH_DATA_TYPE_1_MSB, - BKN_DNX_UDH_DATA_TYPE_1_NOF_BITS, - &fld_val); - data_type_1 = fld_val; - /* UDH: UDH-Data-Type[2] */ - bkn_bitstream_get_field( - &buf[pkt_offset], - BKN_DNX_UDH_DATA_TYPE_2_MSB, - BKN_DNX_UDH_DATA_TYPE_2_NOF_BITS, - &fld_val); - data_type_2 = fld_val; - /* UDH: UDH-Data-Type[3] */ - bkn_bitstream_get_field( - &buf[pkt_offset], - BKN_DNX_UDH_DATA_TYPE_3_MSB, - BKN_DNX_UDH_DATA_TYPE_3_NOF_BITS, - &fld_val); - data_type_3 = fld_val; - pkt_offset += BKN_DNX_UDH_BASE_SIZE; if (sinfo->cmic_type == 'r') { + /* UDH: UDH-Data-Type[0] */ + bkn_bitstream_get_field( + &buf[pkt_offset], + BKN_DNX_UDH_DATA_TYPE_0_MSB, + BKN_DNX_UDH_DATA_TYPE_0_NOF_BITS, + &fld_val); + data_type_0 = fld_val; + /* UDH: UDH-Data-Type[1] */ + bkn_bitstream_get_field( + &buf[pkt_offset], + BKN_DNX_UDH_DATA_TYPE_1_MSB, + BKN_DNX_UDH_DATA_TYPE_1_NOF_BITS, + &fld_val); + data_type_1 = fld_val; + /* UDH: UDH-Data-Type[2] */ + bkn_bitstream_get_field( + &buf[pkt_offset], + BKN_DNX_UDH_DATA_TYPE_2_MSB, + BKN_DNX_UDH_DATA_TYPE_2_NOF_BITS, + &fld_val); + data_type_2 = fld_val; + /* UDH: UDH-Data-Type[3] */ + bkn_bitstream_get_field( + &buf[pkt_offset], + BKN_DNX_UDH_DATA_TYPE_3_MSB, + BKN_DNX_UDH_DATA_TYPE_3_NOF_BITS, + &fld_val); + data_type_3 = fld_val; + pkt_offset += BKN_DNX_UDH_BASE_SIZE; + if (data_type_0) { pkt_offset += sinfo->udh_length_type[0]; @@ -4026,6 +4056,36 @@ bkn_dnx_packet_parse_internal( } else { + /* UDH: UDH-Data-Type[0] */ + bkn_bitstream_get_field( + &buf[pkt_offset], + BKN_DNX_UDH_DATA_TYPE_0_MSB, + BKN_DNX_UDH_DATA_TYPE_0_NOF_BITS, + &fld_val); + data_type_0 = fld_val; + /* UDH: UDH-Data-Type[1] */ + bkn_bitstream_get_field( + &buf[pkt_offset], + BKN_DNX_UDH_DATA_TYPE_1_MSB, + BKN_DNX_UDH_DATA_TYPE_1_NOF_BITS, + &fld_val); + data_type_1 = fld_val; + /* UDH: UDH-Data-Type[2] */ + bkn_bitstream_get_field( + &buf[pkt_offset], + BKN_DNX_UDH_DATA_TYPE_2_MSB, + BKN_DNX_UDH_DATA_TYPE_2_NOF_BITS, + &fld_val); + data_type_2 = fld_val; + /* UDH: UDH-Data-Type[3] */ + bkn_bitstream_get_field( + &buf[pkt_offset], + BKN_DNX_UDH_DATA_TYPE_3_MSB, + BKN_DNX_UDH_DATA_TYPE_3_NOF_BITS, + &fld_val); + data_type_3 = fld_val; + pkt_offset += BKN_DNX_UDH_BASE_SIZE; + pkt_offset += sinfo->udh_length_type[data_type_0]; pkt_offset += sinfo->udh_length_type[data_type_1]; pkt_offset += sinfo->udh_length_type[data_type_2]; @@ -4034,6 +4094,14 @@ bkn_dnx_packet_parse_internal( DBG_DUNE(("UDH base(1-%u) is present\n", pkt_offset)); } + /* OAM DMM/DMR TOD second header: PPH+UDH+TOD */ + if (sinfo->cmic_type == 'r') { + if (packet_info->flags & BKN_RX_HEADER_F_HAS_OAM_DM_TOD_SECOND) { + pkt_offset += BKN_DNX_TOD_SECOND_SIZE; + DBG_DUNE(("TOD second Header(4-%u) is present\n", pkt_offset)); + } + } + packet_info->system_header_size = pkt_offset; return 0; @@ -4046,9 +4114,6 @@ bkn_dnx_packet_header_parse( uint32_t buff_len, bkn_dune_system_header_info_t *packet_info) { - uint8_t is_oam_dm_tod_second_en = FALSE; - uint8_t is_inter_hdr_en = FALSE; - uint8_t is_tsh_en = FALSE; uint8_t is_oamp_punted = FALSE; uint8_t is_trapped = FALSE; uint8_t idx = 0; @@ -4057,12 +4122,12 @@ bkn_dnx_packet_header_parse( return -1; } + packet_info->flags = BKN_RX_HEADER_F_HAS_ONE_SYSTEM_HEADER; /* FTMH */ - bkn_dnx_packet_parse_ftmh(sinfo, buff, buff_len, packet_info, - &is_tsh_en, &is_inter_hdr_en, &is_oam_dm_tod_second_en); + bkn_dnx_packet_parse_ftmh(sinfo, buff, buff_len, packet_info); /* Time-Stamp */ - if (is_tsh_en == TRUE) + if (packet_info->flags & BKN_RX_HEADER_F_HAS_TSH) { packet_info->system_header_size += BKN_DNX_TSH_SIZE; DBG_DUNE(("Time-Stamp Header(4-%u) is present\n", packet_info->system_header_size)); @@ -4079,27 +4144,18 @@ bkn_dnx_packet_header_parse( } /* Internal */ - if (is_inter_hdr_en) + if (packet_info->flags & BKN_RX_HEADER_F_HAS_INTERNAL_HEADER) { bkn_dnx_packet_parse_internal(sinfo, buff, buff_len, packet_info, is_oamp_punted, &is_trapped); } - /* OAM DMM/DMR TOD second header */ - if (is_oam_dm_tod_second_en == TRUE) - { - packet_info->system_header_size += BKN_DNX_TOD_SECOND_SIZE; - DBG_DUNE(("TOD second Header(4-%u) is present\n", packet_info->system_header_size)); - } - if (is_oamp_punted) { uint32_t oibih_oam_pdu_offset = 0; - is_oam_dm_tod_second_en = FALSE; - is_inter_hdr_en = FALSE; - is_tsh_en = FALSE; is_oamp_punted = FALSE; is_trapped = FALSE; + packet_info->flags = BKN_RX_HEADER_F_HAS_TWO_SYSTEM_HEADER; if (sinfo->cmic_type == 'r') { /* OIBIH: OAM_PDU_Offset */ @@ -4112,23 +4168,18 @@ bkn_dnx_packet_header_parse( DBG_DUNE(("OIBIH Header(14-%u) is present\n", packet_info->system_header_size)); } /* FTMH */ - bkn_dnx_packet_parse_ftmh(sinfo, buff, buff_len, packet_info, - &is_tsh_en, &is_inter_hdr_en, &is_oam_dm_tod_second_en); + bkn_dnx_packet_parse_ftmh(sinfo, buff, buff_len, packet_info); /* Time-Stamp */ - if (is_tsh_en == TRUE) + if (packet_info->flags & BKN_RX_HEADER_F_HAS_TSH) { packet_info->system_header_size += BKN_DNX_TSH_SIZE; DBG_DUNE(("Time-Stamp Header(4-%u) is present\n", packet_info->system_header_size)); } /* Internal */ - if (is_inter_hdr_en) + if (packet_info->flags & BKN_RX_HEADER_F_HAS_INTERNAL_HEADER) { bkn_dnx_packet_parse_internal(sinfo, buff, buff_len, packet_info, is_oamp_punted, &is_trapped); } - if (is_oam_dm_tod_second_en == TRUE) - { - /* DO NOT have 4Bytes TOD second header. */ - } if (oibih_oam_pdu_offset) { /* @@ -4193,7 +4244,7 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) uint64_t pkt_dma; int drop_api; int ethertype; - int pktlen, pkt_hdr_size; + int pktlen, pkt_hdr_size = 0; int idx; int dcbs_done = 0; bkn_dune_system_header_info_t packet_info; @@ -4248,9 +4299,13 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) sand_scratch_data[err_woff] = dcb[sinfo->dcb_wsize-1]; meta = (uint32_t *)pkt; memset(&packet_info, 0, sizeof(bkn_dune_system_header_info_t)); - /* Decode system headers and fill sratch data */ - bkn_packet_header_parse(sinfo, pkt, (uint32_t)pktlen, &packet_info); - pkt_hdr_size = packet_info.system_header_size; + if (ENET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + pkt_hdr_size = 0; + } else { + /* Decode system headers and fill sratch data */ + bkn_packet_header_parse(sinfo, pkt, (uint32_t)pktlen, &packet_info); + pkt_hdr_size = packet_info.system_header_size; + } } else { if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta = (uint32_t *)pkt; @@ -4606,7 +4661,7 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) bkn_filter_t *filter = NULL; uint32_t err_woff; uint32_t *dcb, *meta, *match_data; - int pktlen, pkt_hdr_size; + int pktlen, pkt_hdr_size = 0; uint8_t skip_hdrlen = 0; uint8_t eth_offset = 0; int idx; @@ -4667,10 +4722,13 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) meta = (uint32_t *)skb->data; pkt = skb->data; memset(&packet_info, 0, sizeof(bkn_dune_system_header_info_t)); - /* Decode system headers and fill sratch data */ - bkn_packet_header_parse(sinfo, pkt, (uint32_t)pktlen, &packet_info); - pkt_hdr_size = packet_info.system_header_size; - + if (ENET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + pkt_hdr_size = 0; + } else { + /* Decode system headers and fill scratch data */ + bkn_packet_header_parse(sinfo, pkt, (uint32_t)pktlen, &packet_info); + pkt_hdr_size = packet_info.system_header_size; + } if (knet_hw_tstamp_rx_pre_process_cb) { if ((knet_hw_tstamp_rx_pre_process_cb(sinfo->dev_no, pkt, packet_info.ftmh.source_sys_port_aggregate, NULL)) >= 0) { @@ -4680,16 +4738,17 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) meta = (uint32_t *)(skb->data + skip_hdrlen); pkt = (skb->data + skip_hdrlen); memset(&packet_info, 0, sizeof(bkn_dune_system_header_info_t)); - - /* Decode system headers and fill sratch data */ - bkn_packet_header_parse(sinfo, pkt, (uint32_t)(pktlen - skip_hdrlen), &packet_info); - pkt_hdr_size = packet_info.system_header_size; - + if (ENET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + pkt_hdr_size = 0; + } else { + /* Decode system headers and fill scratch data */ + bkn_packet_header_parse(sinfo, pkt, (uint32_t)(pktlen - skip_hdrlen), &packet_info); + pkt_hdr_size = packet_info.system_header_size; + } knet_hw_tstamp_rx_pre_process_cb(sinfo->dev_no, pkt + pkt_hdr_size, packet_info.ftmh.source_sys_port_aggregate, (int *)ð_offset); - } + } } - } else { if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta = (uint32_t *)skb->data; @@ -5091,7 +5150,17 @@ bkn_rx_debug_dump(bkn_switch_info_t *sinfo, int chan) } irq_stat = dma_stat = dma_ctrl = 0; - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + dev_read32(sinfo, + CMICR_INTR_STATr, + &irq_stat); + dev_read32(sinfo, + CMICR_DMA_STATr, + &dma_stat); + dev_read32(sinfo, + CMICR_DMA_CTRLr + 0x80 * (XGS_DMA_RX_CHAN + chan), + &dma_ctrl); + } else if (DEV_IS_CMICX(sinfo)) { dev_read32(sinfo, CMICX_IRQ_STATr, &irq_stat); @@ -6207,9 +6276,18 @@ static void bkn_poll_controller(struct net_device *dev) { bkn_priv_t *priv = netdev_priv(dev); + struct list_head *list; + bkn_switch_info_t *sinfo; disable_irq(dev->irq); - bkn_isr(priv->sinfo); + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + if (sinfo->ndevs && sinfo->ndev_max > 0 && sinfo->ndev_max > priv->id) { + if (sinfo->ndevs[priv->id] && sinfo->ndevs[priv->id] == dev) { + bkn_isr(sinfo); + } + } + } enable_irq(dev->irq); } #endif @@ -6289,6 +6367,7 @@ bkn_open(struct net_device *dev) } if (!sinfo->basedev_suspended) { + netif_carrier_on(dev); netif_start_queue(dev); } @@ -6482,6 +6561,7 @@ bkn_stop(struct net_device *dev) unsigned long flags; netif_stop_queue(dev); + netif_carrier_off(dev); /* Check if base device */ if (priv->id <= 0) { @@ -7700,6 +7780,33 @@ bkn_init_ndev(u8 *mac, char *name) return dev; } +/* + * Lookup Ethernet device by name. + */ +static struct net_device * +bkn_lookup_ndev(u8 *mac, char *name) +{ + struct net_device *dev = NULL; + + if (mac == NULL || name == NULL || *name == '\0') { + DBG_WARN(("Invalid input parameters.\n")); + return NULL; + } + /* get Ethernet device */ + dev = netdev_get_by_name(current->nsproxy->net_ns, name, NULL, GFP_ATOMIC); + if (dev == NULL) { + DBG_WARN(("Error to get Ethernet device by name.\n")); + return NULL; + } + if (dev->dev_addr[0] != mac[0] || dev->dev_addr[1] != mac[1] || dev->dev_addr[2] != mac[2] || + dev->dev_addr[3] != mac[3] || dev->dev_addr[4] != mac[4] || dev->dev_addr[5] != mac[5]) { + DBG_WARN(("The Mac address doesn't match the Ethernet device that found by name.\n")); + netdev_put(dev, NULL); + return NULL; + } + return dev; +} + /* * Device Link Control Proc Read Entry */ @@ -8266,7 +8373,7 @@ bkn_proc_debug_show(struct seq_file *m, void *v) seq_printf(m, " ft_tpid: %d\n", ft_tpid); seq_printf(m, " ft_pri: %d\n", ft_pri); seq_printf(m, " ft_cfi: %d\n", ft_cfi); - seq_printf(m, " ft_tpid: %d\n", ft_vid); + seq_printf(m, " ft_vid: %d\n", ft_vid); seq_printf(m, "Active IOCTLs:\n"); seq_printf(m, " Command: %d\n", ioctl_cmd); seq_printf(m, " Event: %d\n", ioctl_evt); @@ -8284,6 +8391,7 @@ bkn_proc_debug_show(struct seq_file *m, void *v) seq_printf(m, " rx_chans: %d\n", sinfo->rx_chans); seq_printf(m, " cdma_chans: 0x%x\n", sinfo->cdma_channels); seq_printf(m, " unet_chans: 0x%x\n", sinfo->unet_channels); + seq_printf(m, " enet_chans: 0x%x\n", sinfo->enet_channels); seq_printf(m, " irq_mask: 0x%x\n", sinfo->irq_mask); seq_printf(m, " dma_events: 0x%x\n", sinfo->dma_events); seq_printf(m, " dcb_dma: 0x%p\n", (void *)(sal_paddr_t)sinfo->dcb_dma); @@ -8739,6 +8847,84 @@ struct proc_ops bkn_proc_ptp_stats_file_ops = { .proc_release = single_release, }; +/* + * Device Associated virtual Ethernet interfaces Proc Entry + */ +static int +bkn_proc_ndev_show(struct seq_file *m, void *v) +{ + int unit = 0; + struct list_head *list, *plist; + bkn_switch_info_t *sinfo; + struct net_device *dev; + bkn_priv_t *priv, *lpriv; + int id, idx; + unsigned long flags; + + list_for_each(list, &_sinfo_list) { + sinfo = (bkn_switch_info_t *)list; + spin_lock_irqsave(&sinfo->lock, flags); + seq_printf(m, "Device virtual Ethernet interfaces (dev_no %d):\n", unit); + if (sinfo->ndevs && sinfo->ndev_max > 0) { + for (id = 0; id < sinfo->ndev_max; id++) { + if (sinfo->ndevs[id] == NULL) { + continue; + } + dev = sinfo->ndevs[id]; + priv = netdev_priv(dev); + seq_printf(m, " Dev Id: %d max. %d [sinfo @%p]\n", id, sinfo->ndev_max, sinfo); + seq_printf(m, " My Station: %s (dev @%p)\n", dev->name, dev); + seq_printf(m, " MAC: %02x:%02x:%02x:%02x:%02x:%02x\n", + dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], + dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]); + if (sinfo->dev_no == priv->sinfo->dev_no) { + seq_printf(m, " Private: (priv @%p)\n", priv); + seq_printf(m, " id = %d\n", priv->id); + seq_printf(m, " dev = @%p\n", priv->dev); + seq_printf(m, " sinfo = @%p\n", priv->sinfo); + seq_printf(m, " type = %d\n", priv->type); + seq_printf(m, " vlan = %d\n", priv->vlan); + seq_printf(m, " port = %d\n", priv->port); + seq_printf(m, " phys_port = %d\n", priv->phys_port); + seq_printf(m, " qnum = %d\n", priv->qnum); + seq_printf(m, " flags = 0x%x %s\n", priv->flags, + priv->flags & KCOM_NETIF_F_USE_SHARED_NDEV ? "(shared)" : ""); + seq_printf(m, " ref_count = %d\n", priv->ref_count); + seq_printf(m, " System Header (%dB): 0x", priv->system_headers_size); + for (idx = 0; idx < priv->system_headers_size; idx++) { + seq_printf(m, "%02x", priv->system_headers[idx]); + } + seq_printf(m, "\n"); + } + } + if (!list_empty(&sinfo->ndev_list)) { + seq_printf(m, " sinfo->ndev_list: [priv->id @priv]\n"); + list_for_each(plist, &sinfo->ndev_list) { + lpriv = (bkn_priv_t *)plist; + seq_printf(m, " %3d @%p\n", lpriv->id, lpriv); + } + } + } + unit++; + spin_unlock_irqrestore(&sinfo->lock, flags); + } + + return 0; +} + +static int bkn_proc_ndev_open(struct inode * inode, struct file * file) +{ + return single_open(file, bkn_proc_ndev_show, NULL); +} + +struct proc_ops bkn_proc_ndev_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bkn_proc_ndev_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_release = single_release, +}; + static int bkn_proc_init(void) @@ -8773,6 +8959,10 @@ bkn_proc_init(void) if (entry == NULL) { return -1; } + PROC_CREATE(entry, "ndev", 0666, bkn_proc_root, &bkn_proc_ndev_file_ops); + if (entry == NULL) { + return -1; + } return 0; } @@ -8787,6 +8977,7 @@ bkn_proc_cleanup(void) remove_proc_entry("stats", bkn_proc_root); remove_proc_entry("dstats", bkn_proc_root); remove_proc_entry("ptp_stats", bkn_proc_root); + remove_proc_entry("ndev", bkn_proc_root); return 0; } @@ -9127,6 +9318,11 @@ bkn_knet_hw_reset(kcom_msg_hw_reset_t *kmsg, int len) return sizeof(kcom_msg_hdr_t); } + if (sinfo->cmic_type == 0) { + DBG_KCOM(("HW reset: Do nothing when CMIC architecture is undecided\n")); + return sizeof(kcom_msg_hdr_t); + } + cfg_api_lock(sinfo, &flags); if (kmsg->channels == 0) { @@ -9291,6 +9487,7 @@ bkn_knet_hw_info(kcom_msg_hw_info_t *kmsg, int len) } sinfo->udh_size = kmsg->udh_size; sinfo->oamp_punt = kmsg->oamp_punted; + sinfo->enet_channels = kmsg->enet_channels; sinfo->no_skip_udh_check = kmsg->no_skip_udh_check; sinfo->oam_dm_tod_exist = kmsg->oam_dm_tod_exist; sinfo->system_headers_mode = kmsg->system_headers_mode; @@ -9430,45 +9627,57 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) bkn_dev_mac[5]++; ma = bkn_dev_mac; } - if ((dev = bkn_init_ndev(ma, kmsg->netif.name)) == NULL) { - kmsg->hdr.status = KCOM_E_RESOURCE; - return sizeof(kcom_msg_hdr_t); - } - priv = netdev_priv(dev); - priv->dev = dev; - priv->sinfo = sinfo; - priv->type = kmsg->netif.type; - priv->vlan = kmsg->netif.vlan; - /* System headers are prepared at BCM API for Dune headers */ - if (device_is_sand(sinfo)) { - int idx = 0; - priv->system_headers_size = kmsg->netif.system_headers_size; - for (idx = 0; idx < KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX; idx++) - { - priv->system_headers[idx] = kmsg->netif.system_headers[idx]; + if ((dev = bkn_lookup_ndev(ma, kmsg->netif.name)) == NULL) { + if ((dev = bkn_init_ndev(ma, kmsg->netif.name)) == NULL) { + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); } - } - if (priv->type == KCOM_NETIF_T_PORT) { - priv->port = kmsg->netif.port; - priv->phys_port = kmsg->netif.phys_port; - priv->qnum = kmsg->netif.qnum; - memset(&(priv->link_settings), 0, sizeof(struct ethtool_link_settings)); - } else { - if (device_is_sand(sinfo) && (priv->type == KCOM_NETIF_T_VLAN)) { - /* PTCH.SSPA */ + priv = netdev_priv(dev); + priv->dev = dev; + priv->sinfo = sinfo; + priv->type = kmsg->netif.type; + priv->vlan = kmsg->netif.vlan; + /* System headers are prepared at BCM API for Dune headers */ + if (device_is_sand(sinfo)) { + int idx = 0; + priv->system_headers_size = kmsg->netif.system_headers_size; + for (idx = 0; idx < KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX; idx++) + { + priv->system_headers[idx] = kmsg->netif.system_headers[idx]; + } + } + if (priv->type == KCOM_NETIF_T_PORT) { priv->port = kmsg->netif.port; + priv->phys_port = kmsg->netif.phys_port; priv->qnum = kmsg->netif.qnum; + memset(&(priv->link_settings), 0, sizeof(struct ethtool_link_settings)); } else { - priv->port = -1; + if (device_is_sand(sinfo) && (priv->type == KCOM_NETIF_T_VLAN)) { + /* PTCH.SSPA */ + priv->port = kmsg->netif.port; + priv->qnum = kmsg->netif.qnum; + } else { + priv->port = -1; + } } - } - priv->flags = kmsg->netif.flags; - priv->cb_user_data = kmsg->netif.cb_user_data; + priv->flags = kmsg->netif.flags; + priv->cb_user_data = kmsg->netif.cb_user_data; - /* Force RCPU encapsulation if rcpu_mode */ - if (rcpu_mode) { - priv->flags |= KCOM_NETIF_F_RCPU_ENCAP; - DBG_RCPU(("RCPU auto-enabled\n")); + /* Force RCPU encapsulation if rcpu_mode */ + if (rcpu_mode) { + priv->flags |= KCOM_NETIF_F_RCPU_ENCAP; + DBG_RCPU(("RCPU auto-enabled\n")); + } + priv->ref_count=1; + } else { + if ((kmsg->netif.flags & KCOM_NETIF_F_USE_SHARED_NDEV) == 0) { + netdev_put(dev, NULL); + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } + priv = netdev_priv(dev); + priv->flags |= KCOM_NETIF_F_USE_SHARED_NDEV; + priv->ref_count++; } id = kmsg->netif.id; @@ -9533,40 +9742,49 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) } if (rv != KCOM_E_NONE) { spin_unlock_irqrestore(&sinfo->lock, flags); - unregister_netdev(dev); - free_netdev(dev); + priv->ref_count--; + if (priv->ref_count <= 0) { + unregister_netdev(dev); + free_netdev(dev); + } else { + netdev_put(dev, NULL); + } kmsg->hdr.status = rv; return sizeof(kcom_msg_hdr_t); } - - priv->id = id; - DBG_NDEV(("Add netif ID %d to table\n", id)); sinfo->ndevs[id] = dev; - found = 0; - list_for_each(list, &sinfo->ndev_list) { - lpriv = (bkn_priv_t *)list; - if (id < lpriv->id) { - found = 1; - break; + if (priv->ref_count == 1) { + priv->id = id; + DBG_NDEV(("Add netif ID %d to table\n", id)); + + found = 0; + list_for_each(list, &sinfo->ndev_list) { + lpriv = (bkn_priv_t *)list; + if (id < lpriv->id) { + found = 1; + break; + } } - } - if (found) { - /* Replace previously removed interface */ - list_add_tail(&priv->list, &lpriv->list); + if (found) { + /* Replace previously removed interface */ + list_add_tail(&priv->list, &lpriv->list); + } else { + /* No holes - add to end of list */ + list_add_tail(&priv->list, &sinfo->ndev_list); + } } else { - /* No holes - add to end of list */ - list_add_tail(&priv->list, &sinfo->ndev_list); + DBG_NDEV(("Use Shared Netif ID %d\n", id)); } + if (priv->ref_count == 1) { + DBG_VERB(("Assigned ID %d to Ethernet device %s\n", + priv->id, dev->name)); - DBG_VERB(("Assigned ID %d to Ethernet device %s\n", - priv->id, dev->name)); - - kmsg->netif.id = priv->id; - memcpy(kmsg->netif.macaddr, dev->dev_addr, 6); - memcpy(kmsg->netif.name, dev->name, KCOM_NETIF_NAME_MAX - 1); - + kmsg->netif.id = priv->id; + memcpy(kmsg->netif.macaddr, dev->dev_addr, 6); + memcpy(kmsg->netif.name, dev->name, KCOM_NETIF_NAME_MAX - 1); + } list_for_each(list, &netif_create_cb_list) { netif_create_cb = list_entry(list, bkn_netif_cb_t, list); if (netif_create_cb->cb(dev, sinfo->dev_no, &kmsg->netif) != 0) { @@ -9576,14 +9794,6 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) } spin_unlock_irqrestore(&sinfo->lock, flags); - if (device_is_sand(sinfo)) { - int idx = 0; - for (idx = 0; idx < priv->system_headers_size; idx++) { - DBG_DUNE(("System Header[%d]: 0x%02x\n", idx, - priv->system_headers[idx])); - } - } - return sizeof(*kmsg); } @@ -9595,7 +9805,6 @@ bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len) bkn_priv_t *priv; struct list_head *list; unsigned long flags; - int found; bkn_netif_cb_t *netif_destroy_cb; kcom_netif_t kcom_netif; @@ -9608,23 +9817,21 @@ bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len) } cfg_api_lock(sinfo, &flags); - - found = 0; - list_for_each(list, &sinfo->ndev_list) { - priv = (bkn_priv_t *)list; - if (kmsg->hdr.id == priv->id) { - found = 1; - break; - } - } - - if (!found) { + priv = bkn_netif_lookup(sinfo, kmsg->hdr.id); + /* + * If not found. + */ + if (priv == NULL) { cfg_api_unlock(sinfo, &flags); kmsg->hdr.status = KCOM_E_NOT_FOUND; return sizeof(kcom_msg_hdr_t); } - list_del(&priv->list); + priv->ref_count--; + + if (priv->ref_count <= 0) { + list_del(&priv->list); + } if (priv->id < sinfo->ndev_max) { sinfo->ndevs[priv->id] = NULL; @@ -9646,11 +9853,15 @@ bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len) } } - DBG_VERB(("Removing virtual Ethernet device %s (%d).\n", - dev->name, priv->id)); + if (priv->ref_count <= 0) { + DBG_VERB(("Removing virtual Ethernet device %s (%d).\n", + dev->name, priv->id)); - unregister_netdev(dev); - free_netdev(dev); + unregister_netdev(dev); + free_netdev(dev); + } else { + netdev_put(dev, NULL); + } return sizeof(kcom_msg_hdr_t); } @@ -9662,7 +9873,7 @@ bkn_knet_netif_list(kcom_msg_netif_list_t *kmsg, int len) bkn_priv_t *priv; struct list_head *list; unsigned long flags; - int idx; + int id, idx; kmsg->hdr.type = KCOM_MSG_TYPE_RSP; @@ -9675,16 +9886,27 @@ bkn_knet_netif_list(kcom_msg_netif_list_t *kmsg, int len) spin_lock_irqsave(&sinfo->lock, flags); idx = 0; - list_for_each(list, &sinfo->ndev_list) { - if (idx >= KCOM_NETIF_MAX) { - DBG_WARN(("Too many network interfaces to list (max %d).\n", - KCOM_NETIF_MAX)); - break; + if (sinfo->ndevs && sinfo->ndev_max > 0) { + for (id = 0; id < sinfo->ndev_max; id++) { + if (sinfo->ndevs[id] == NULL) { + continue; + } + kmsg->id[idx] = id; + idx++; + } + } else { + list_for_each(list, &sinfo->ndev_list) { + if (idx >= KCOM_NETIF_MAX) { + DBG_WARN(("Too many network interfaces to list (max %d).\n", + KCOM_NETIF_MAX)); + break; + } + priv = (bkn_priv_t *)list; + kmsg->id[idx] = priv->id; + idx++; } - priv = (bkn_priv_t *)list; - kmsg->id[idx] = priv->id; - idx++; } + kmsg->ifcnt = idx; spin_unlock_irqrestore(&sinfo->lock, flags); @@ -10328,6 +10550,9 @@ _cleanup(void) priv = list_entry(sinfo->ndev_list.next, bkn_priv_t, list); list_del(&priv->list); dev = priv->dev; + while(--priv->ref_count > 0) { + netdev_put(dev, NULL); + } DBG_VERB(("Removing virtual Ethernet device %s.\n", dev->name)); unregister_netdev(dev); free_netdev(dev); @@ -10467,6 +10692,7 @@ bkn_knet_dev_init(int d) priv->vlan = 1; priv->port = -1; priv->id = -1; + priv->ref_count = 1; } if (use_napi) { @@ -10817,7 +11043,7 @@ bkn_filter_cb_register_by_name(knet_filter_cb_f filter_cb, char *filter_name) return -1; } fcb->cb = filter_cb; - strcpy(fcb->desc, filter_name); + strlcpy(fcb->desc, filter_name, sizeof(fcb->desc)); list_add_tail(&fcb->list, &filter_cb_list); /* Check if any existing filter matches the registered name */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/Makefile new file mode 100644 index 00000000000..f8df885dd20 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/Makefile @@ -0,0 +1,99 @@ +# +# Copyright 2017 Broadcom +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# -*- Makefile -*- +# $Id: Makefile,v 1.3 2012/07/17 07:39:51 mlarsen Exp $ +# $Copyright: (c) 2005 Broadcom Corp. +# All Rights Reserved.$ +# +LOCALDIR = systems/linux/kernel/modules/bcm-ptp-clock + +include ${SDK}/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-bcm-ptp-clock +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +ifeq (1,$(NO_PRECOMPILED_MODULE)) +# { +BDE_SYMVERS := ${BLDDIR}/../../../../bde/linux/kernel/Module.symvers +KNET_SYMVERS := ${BLDDIR}/../bcm-knet/Module.symvers +KBUILD_EXTRA_SYMBOLS := $(BDE_SYMVERS) $(KNET_SYMVERS) +export KBUILD_EXTRA_SYMBOLS +# +# These are the objects which need to be compiled, in the kernel, to +# created the module object file. +# +SRCS_COMPOSING = bcm-ptp-clock.c ../shared/gmodule.c +OBJECTS_COMPOSING = "bcm-ptp-clock.o gmodule.o" + +build: $(KMODULE) +# +# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/linux/kernel/modules/bcm-ptp-clock/kernel_module' +# is not created and all action is done in systems/linux/kernel/modules/bcm-ptp-clock +# +$(KMODULE): $(SRCS_COMPOSING) + mkdir -p $(BLDDIR) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + rm -f $(BLDDIR)/*.c + rm -f $(BLDDIR)/*.o + rm -f $(BLDDIR)/*.ko + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile + cp ./*.c $(BLDDIR)/ + cp ../shared/*.c $(BLDDIR)/ + # + # Wait until bcm-knet compilation is over so that we can copy its resultant + # Module.symvers + # + if [ ! -f ${KNET_SYMVERS} ]; then sleep 5; fi + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/Module.symvers + MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) +# } +else +# { +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../../../bde/linux/kernel/kernel_module/Module.symvers +KBUILD_EXTRA_SYMBOLS += ${BLDDIR}/../bcm-knet/kernel_module/Module.symvers +export KBUILD_EXTRA_SYMBOLS + +build: $(MODULE) $(KMODULE) + +# BCM PTP Clock Device + +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ + +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. +include ${SDK}/make/Make.depend +# } +endif + +clean:: + $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o + $(RM) $(BOBJS) $(MODULE) + +ifneq ($(kernel_version),2_4) +.PHONY: build +endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c index 2b31663df76..5944607cb1e 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c @@ -36,7 +36,11 @@ MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("PTP Clock Driver for Broadcom XGS/DNX Switch"); MODULE_LICENSE("GPL"); -#if LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0) +#if ((LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(6,0,0))) +#define PTPCLOCK_SUPPORTED +#endif + +#ifdef PTPCLOCK_SUPPORTED #include #include #include @@ -45,7 +49,7 @@ MODULE_LICENSE("GPL"); #include #include #include - +#include #include #include @@ -190,6 +194,7 @@ u32 hostcmd_regs[5] = { 0 }; /* Service request commands to Firmware. */ enum { +#ifdef BDE_EDK_SUPPORT BKSYNC_DONE = (0x0), BKSYNC_INIT = (0x1), BKSYNC_DEINIT = (0x2), @@ -207,10 +212,30 @@ enum { BKSYNC_GPIO = (0xe), BKSYNC_EVLOG = (0xf), BKSYNC_EXTTSLOG = (0x10), - BKSYNC_GPIO_PHASEOFFSET = (0x11), + BKSYNC_GET_EXTTS_BUFF = (0x11), + BKSYNC_GPIO_PHASEOFFSET = (0x12), +#else + BKSYNC_DONE = (0x1), + BKSYNC_INIT = (0x2), + BKSYNC_DEINIT = (0x3), + BKSYNC_GETTIME = (0x4), + BKSYNC_SETTIME = (0x5), + BKSYNC_FREQCOR = (0x6), + BKSYNC_PBM_UPDATE = (0x7), + BKSYNC_ADJTIME = (0x8), + BKSYNC_GET_TSTIME = (0x9), + BKSYNC_MTP_TS_UPDATE_ENABLE = (0xa), + BKSYNC_MTP_TS_UPDATE_DISABLE = (0xb), + BKSYNC_ACK_TSTIME = (0xc), + BKSYNC_SYSINFO = (0xd), + BKSYNC_BROADSYNC = (0xe), + BKSYNC_GPIO = (0xf), + BKSYNC_EVLOG = (0x10), + BKSYNC_EXTTSLOG = (0x11), + BKSYNC_GPIO_PHASEOFFSET = (0x12), +#endif }; - enum { KSYNC_SYSINFO_UC_PORT_NUM = (0x1), KSYNC_SYSINFO_UC_PORT_SYSPORT = (0x2), @@ -437,17 +462,25 @@ typedef struct bksync_evlog_s { #define NUM_EXT_TS 6 /* gpio0 = event0 ..... gpio5 = event5 */ #define NUM_EVENT_TS 128 /* Directly mapped to PTP_MAX_TIMESTAMPS from ptp_private.h */ typedef struct bksync_fw_extts_event_s { - u32 ts_event_id; + u32 ts_event_id; fw_tstamp_t tstamp; } __ATTRIBUTE_PACKED__ bksync_fw_extts_event_t; typedef struct bksync_extts_log_s { - u32 head; /* Read pointer - Updated by HOST */ - u32 tail; /* Write pointer - Updated by FW */ + u32 head; /* Read pointer - Updated by HOST */ + u32 tail; /* Write pointer - Updated by FW */ bksync_fw_extts_event_t event_ts[NUM_EVENT_TS]; - u32 overflow; + u32 overflow; } __ATTRIBUTE_PACKED__ bksync_fw_extts_log_t; +typedef struct bksync_fw_comm_s { + u32 cmd; + u32 dw1[2]; + u32 dw2[2]; + u32 head; /* Read pointer - Updated by HOST */ + u32 tail; /* Write pointer - Updated by FW */ +} __ATTRIBUTE_PACKED__ bksync_fw_comm_t; + struct bksync_extts_event { int enable[NUM_EXT_TS]; int head; @@ -475,6 +508,7 @@ typedef struct bksync_init_info_s { u32 host_cpu_port; u32 host_cpu_sysport; u32 udh_len; + u8 application_v2; } bksync_init_info_t; typedef struct bksync_bs_info_s { @@ -785,19 +819,23 @@ struct bksync_ptp_priv { bksync_gpio_info_t bksync_gpio_info[6]; bksync_evlog_info_t bksync_evlog_info[NUM_TS_EVENTS]; bksync_dnx_jr2_devices_system_info_t bksync_jr2devs_sys_info; - volatile bksync_fw_extts_log_t *extts_log; /* dma-able address for fw updates */ - int extts_dma_mem_size; - dma_addr_t extts_dma_mem_addr; + volatile bksync_fw_extts_log_t *extts_log; /* dma-able/virtual address for fw updates */ struct bksync_extts_event extts_event; struct delayed_work extts_logging; - struct kobject *kobj; + struct kobject *kobj; +#ifdef BDE_EDK_SUPPORT + volatile bksync_fw_comm_t *fw_comm; +#else + int extts_dma_mem_size; + dma_addr_t extts_dma_mem_addr; +#endif }; static struct bksync_ptp_priv *ptp_priv; volatile bksync_info_t *linuxPTPMemory = (bksync_info_t*)(0); static volatile int module_initialized; -static int num_retries = 10; /* Retry count */ +static int num_retries = 5; /* Retry count */ static void bksync_ptp_time_keep_init(void); static void bksync_ptp_time_keep_deinit(void); @@ -860,7 +898,46 @@ ptp_sleep(int jiffies) } +#ifdef BDE_EDK_SUPPORT +static void bksync_hostcmd_data_op(int setget, u64 *d1, u64 *d2) +{ + u32 w0, w1; + u64 data; + + if (!d1) { + return; + } + + if (setget) { + if (d1) { + data = *d1; + ptp_priv->fw_comm->dw1[0] = (data & 0xFFFFFFFF); + ptp_priv->fw_comm->dw1[1] = (data >> 32); + } + if (d2) { + data = *d2; + ptp_priv->fw_comm->dw2[0] = (data & 0xFFFFFFFF); + ptp_priv->fw_comm->dw2[1] = (data >> 32); + } + + } else { + if (d1) { + w0 = ptp_priv->fw_comm->dw1[0]; + w1 = ptp_priv->fw_comm->dw1[1]; + data = (((u64)w1 << 32) | (w0)); + *d1 = data; + } + + if (d2) { + w0 = ptp_priv->fw_comm->dw2[0]; + w1 = ptp_priv->fw_comm->dw2[1]; + data = (((u64)w1 << 32) | (w0)); + *d2 = data; + } + } +} +#else static void bksync_hostcmd_data_op(int setget, u64 *d1, u64 *d2) { u32 w0, w1; @@ -903,7 +980,7 @@ static void bksync_hostcmd_data_op(int setget, u64 *d1, u64 *d2) } } } - +#endif static int bksync_cmd_go(u32 cmd, void *data0, void *data1) { @@ -931,10 +1008,17 @@ static int bksync_cmd_go(u32 cmd, void *data0, void *data1) ptp_priv->shared_addr->ksyncinit = cmd; /* init data */ +#ifdef BDE_EDK_SUPPORT + ptp_priv->fw_comm->dw1[0] = 0; + ptp_priv->fw_comm->dw1[1] = 0; + ptp_priv->fw_comm->dw2[0] = 0; + ptp_priv->fw_comm->dw2[1] = 0; +#else DEV_WRITE32(ptp_priv, hostcmd_regs[1], 0x0); DEV_WRITE32(ptp_priv, hostcmd_regs[2], 0x0); DEV_WRITE32(ptp_priv, hostcmd_regs[3], 0x0); DEV_WRITE32(ptp_priv, hostcmd_regs[4], 0x0); +#endif switch (cmd) { case BKSYNC_INIT: @@ -958,7 +1042,6 @@ static int bksync_cmd_go(u32 cmd, void *data0, void *data1) snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GETTIME"); break; case BKSYNC_GET_TSTIME: - retry_cnt = (retry_cnt * 2); snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GET_TSTIME"); bksync_hostcmd_data_op(1, data0, data1); break; @@ -1008,6 +1091,12 @@ static int bksync_cmd_go(u32 cmd, void *data0, void *data1) snprintf(cmd_str, sizeof(cmd_str), "KSYNC_EXTTSLOG"); bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); break; +#ifdef BDE_EDK_SUPPORT + case BKSYNC_GET_EXTTS_BUFF: + snprintf(cmd_str, sizeof(cmd_str), "BKSYNC_GET_EXTTS_BUFF"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; +#endif case BKSYNC_GPIO_PHASEOFFSET: snprintf(cmd_str, sizeof(cmd_str), "BKSYNC_GPIO_PHASEOFFSET"); bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); @@ -1017,16 +1106,47 @@ static int bksync_cmd_go(u32 cmd, void *data0, void *data1) break; } +#ifdef BDE_EDK_SUPPORT + ptp_priv->fw_comm->cmd = cmd; +#else DEV_WRITE32(ptp_priv, hostcmd_regs[0], ptp_priv->shared_addr->ksyncinit); +#endif do { +#ifdef BDE_EDK_SUPPORT + cmd_status = ptp_priv->fw_comm->cmd; +#else DEV_READ32(ptp_priv, hostcmd_regs[0], &cmd_status); ptp_priv->shared_addr->ksyncinit = cmd_status; +#endif if (cmd_status == BKSYNC_DONE) { ret = 0; switch (cmd) { case BKSYNC_GET_TSTIME: +#ifndef BDE_EDK_SUPPORT + { + u64 d0 = 0ULL; + u64 d1 = 0ULL; + int retry2_cnt = 3; + *(u64 *)data0 = 0ULL; + *(u64 *)data1 = 0ULL; + do { + bksync_hostcmd_data_op(0, &d0, &d1); + *(u64 *)data0 |= d0; + *(u64 *)data1 |= d1; + if (((*(u64 *)data0) & 0xFFFFFFFF) && ((*(u64 *)data0)>>32) && + ((*(u64 *)data1) & 0xFFFFFFFF) && ((*(u64 *)data1)>>32)) { + break; + } + retry2_cnt--; + ptp_usleep(1); + } while (retry2_cnt); + if (retry2_cnt == 0) + ret = -1; + } + break; +#endif case BKSYNC_GETTIME: bksync_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1); break; @@ -1036,6 +1156,12 @@ static int bksync_cmd_go(u32 cmd, void *data0, void *data1) bksync_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1); } break; +#ifdef BDE_EDK_SUPPORT + /* Get the host ram address from fw.*/ + case BKSYNC_GET_EXTTS_BUFF: + bksync_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1); + break; +#endif default: break; } @@ -1065,7 +1191,6 @@ static int bksync_cmd_go(u32 cmd, void *data0, void *data1) return ret; } - /** * bksync_ptp_adjfreq * @@ -1176,10 +1301,26 @@ static int bksync_exttslog_cmd(int event, int enable) int ret; u64 subcmd = 0, subcmd_data = 0; +#ifdef BDE_EDK_SUPPORT + if (NULL == ptp_priv->extts_log) { + ret = bksync_cmd_go(BKSYNC_GET_EXTTS_BUFF, + &subcmd, &subcmd_data); + DBG_VERB(("bksync_exttslog_cmd: Get EXTTS buff: \ + subcmd_data:0x%llx\n", subcmd_data)); + + ptp_priv->extts_log = + (bksync_fw_extts_log_t *)lkbde_edk_dmamem_map_p2v(subcmd_data); + if (NULL == ptp_priv->extts_log) { + DBG_ERR(("EXTTS failed to get virtual addr for the physical address\n")); + } + } +#else + subcmd_data = ptp_priv->extts_dma_mem_addr; +#endif + /* upper 32b -> event * lower 32b -> enable/disable */ subcmd = (u64)event << 32 | enable; - subcmd_data = ptp_priv->extts_dma_mem_addr; ret = bksync_cmd_go(BKSYNC_EXTTSLOG, &subcmd, &subcmd_data); DBG_VERB(("bksync_evlog_cmd: subcmd: 0x%llx subcmd_data: 0x%llx rv:%d\n", subcmd, subcmd_data, ret)); @@ -1439,35 +1580,43 @@ static int bksync_txpkt_tsts_tsamp_get(int port, uint32_t pkt_seq_id, uint32_t *ts_valid, uint32_t *seq_id, uint64_t *timestamp) { int ret = 0; - uint64_t data; + uint64_t data=0ULL; u32 fifo_rxctr = 0; *ts_valid = 0; - *timestamp = 0; + *timestamp = 0ULL; *seq_id = 0; data = (port & 0xFFFF) | ((pkt_seq_id & 0xFFFF) << 16); ret = bksync_cmd_go(BKSYNC_GET_TSTIME, &data, timestamp); if (ret >= 0) { - fifo_rxctr = (data >> 32) & 0xFFFFFFFF; + *ts_valid = data & 0x1ULL; *seq_id = (data >> 16) & 0xFFFF; - *ts_valid = data & 0x1; + fifo_rxctr = (data >> 32) & 0xFFFFFFFF; if (*ts_valid) { - data = (port & 0xFFFF) | (pkt_seq_id << 16); - bksync_cmd_go(BKSYNC_ACK_TSTIME, &data, 0); - if (fifo_rxctr != 0) { - if (fifo_rxctr != (ptp_priv->port_stats[port].fifo_rxctr + 1)) { - DBG_ERR(("FW reset or lost timestamp FIFO_RxCtr:" - "(Prev %u : Current %u) on port:%d\n", - ptp_priv->port_stats[port].fifo_rxctr, - fifo_rxctr, port)); + data = (port & 0xFFFF) | ((pkt_seq_id & 0xFFFF) << 16); + ret = bksync_cmd_go(BKSYNC_ACK_TSTIME, &data, 0ULL); + if (ret >= 0) { + if (fifo_rxctr != 0) { + if (fifo_rxctr != (ptp_priv->port_stats[port].fifo_rxctr + 1)) { + DBG_ERR(("FW reset or lost timestamp FIFO_RxCtr:" + "(Prev %u : Current %u) port:%d pkt_sn:%u hw_sn:%u \n", + ptp_priv->port_stats[port].fifo_rxctr, + fifo_rxctr, port, pkt_seq_id, *seq_id)); + } + ptp_priv->port_stats[port].fifo_rxctr = fifo_rxctr; } - ptp_priv->port_stats[port].fifo_rxctr = fifo_rxctr; + } else { + DBG_ERR(("BKSYNC_ACK_TSTIME failed on port:%d sn:%d\n", port, pkt_seq_id)); } + } else { + DBG_ERR(("BKSYNC_GET_TSTIME invalid on port:%d pkt_sn:%d fw_sn:%d fifo:%d prev_fifo:%d\n", + port, pkt_seq_id, *seq_id, fifo_rxctr, + ptp_priv->port_stats[port].fifo_rxctr)); } } else { - DBG_ERR(("BKSYNC_GET_TSTIME failed on port:%d\n", port)); + DBG_ERR(("BKSYNC_GET_TSTIME failed on port:%d sn:%d\n", port, pkt_seq_id)); } return ret; } @@ -1573,8 +1722,9 @@ int bksync_ptp_hw_tstamp_tx_time_get(int dev_no, int port, uint8_t *pkt, uint64_ ptp_priv->port_stats[port].tsts_match += 1; delta = ktime_us_delta(ktime_get(), start); - DBG_TXTS(("Port: %d Skb_SeqID %d FW_SeqId %d and TS:%llx FetchTime %lld\n", - port, pktseq_id, seq_id, timestamp, delta)); + DBG_TXTS(("Port: %d Skb_SeqID %d FW_SeqId %d and TS:%llx FetchTime %lld retries:%d\n", + port, pktseq_id, seq_id, timestamp, delta, + (num_retries-retry_cnt))); if (delta < ptp_priv->port_stats[port].tsts_best_fetch_time || ptp_priv->port_stats[port].tsts_best_fetch_time == 0) { ptp_priv->port_stats[port].tsts_best_fetch_time = delta; @@ -1593,7 +1743,7 @@ int bksync_ptp_hw_tstamp_tx_time_get(int dev_no, int port, uint8_t *pkt, uint64_ continue; } } - ptp_sleep(1); + ptp_usleep(1000); retry_cnt--; } while(retry_cnt); @@ -2138,7 +2288,14 @@ bksync_dnx_ase1588_tsh_hdr_update_ipv6(struct sk_buff *skb, int hwts, int encap_ { /* Module Hdr [16] + PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] + Internal Hdr [12] + UDH base [1] */ - ptp_hdr_offset = 0x1d; + /* For JR3 for CF update 1588v2_Offset should also have system_header length of + * PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] + Internal Hdr [12] + UDH base [1] = 30. */ + if ((ptp_priv->bksync_init_info).application_v2) { + ptp_hdr_offset = 30; + } else { + ptp_hdr_offset = 29; + } + switch(encap_type) { case 2: /* IEEE 802.3 */ @@ -2148,14 +2305,13 @@ bksync_dnx_ase1588_tsh_hdr_update_ipv6(struct sk_buff *skb, int hwts, int encap_ ptp_hdr_offset += 46; break; case 6: /* UDP IPv6 */ - ptp_hdr_offset += 0x42; + ptp_hdr_offset += 66; break; default: ptp_hdr_offset += 46; break; } - /* ITMH */ /* App Specific Ext Present ASE 1588*/ skb->data [18] |= (0x1 << 3); @@ -2204,6 +2360,12 @@ bksync_dnx_ase1588_tsh_hdr_update(struct sk_buff *skb, int hwts, int encap_type, { /* Module Hdr [16] + PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] */ + /* For JR3 for CF update 1588v2_Offset should also have system_header length of + * PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] = 17. */ + if ((ptp_priv->bksync_init_info).application_v2) { + ptp_hdr_offset = ptp_hdr_offset + 17; + } + /* ITMH */ /* App Specific Ext Present */ skb->data [18] |= (1 << 3); @@ -2588,7 +2750,9 @@ static void bksync_ptp_extts_logging(struct work_struct *work) if (!module_initialized || ptp_priv->extts_log == NULL) goto exit; - DBG_VERB(("Queue overflow state:%u\n", ptp_priv->extts_log->overflow)); + if (ptp_priv->extts_log->overflow) { + DBG_VERB(("EXTTS queue overflow\n")); + } tail = (int)ptp_priv->extts_log->tail; head = ptp_priv->extts_event.head; @@ -3474,6 +3638,9 @@ static void bksync_ptp_fw_data_alloc(void) ptp_priv->dma_mem_size, (long unsigned int)ptp_priv->dma_mem)); } +#ifdef BDE_EDK_SUPPORT + /* Do nothing */ +#else /* Allocate dma for timestmap logging for extts */ dma_mem = 0; ptp_priv->extts_dma_mem_size = sizeof(bksync_fw_extts_log_t); @@ -3497,6 +3664,7 @@ static void bksync_ptp_fw_data_alloc(void) DBG_ERR(("Shared memory allocation (%d bytes) for extts log successful at 0x%016lx.\n", ptp_priv->extts_dma_mem_size, (long unsigned int)ptp_priv->extts_dma_mem_addr)); } +#endif return; } @@ -3508,12 +3676,16 @@ static void bksync_ptp_fw_data_free(void) ptp_priv->evlog = NULL; } +#ifdef BDE_EDK_SUPPORT + /* Do nothing */ +#else if (ptp_priv->extts_log != NULL) { DBG_ERR(("Free shared memory : extts log of %d bytes\n", ptp_priv->extts_dma_mem_size)); DMA_FREE_COHERENT(ptp_priv->dma_dev, ptp_priv->extts_dma_mem_size, (void *)ptp_priv->extts_log, ptp_priv->extts_dma_mem_addr); ptp_priv->extts_log = NULL; } +#endif return; } @@ -3543,11 +3715,16 @@ static void bksync_ptp_dma_init(int dcb_type) #else endianess = 1; #endif + +#ifdef BDE_EDK_SUPPORT + /* Do nothing */ + (void)endianess; +#else DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_14r(CMIC_CMC_BASE), ((pci_cos << 16) | endianess)); DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 1); DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 1); - +#endif } bksync_ptp_fw_data_alloc(); @@ -3556,11 +3733,15 @@ static void bksync_ptp_dma_init(int dcb_type) ptp_priv->mirror_encap_bmp = 0x0; +#ifdef BDE_EDK_SUPPORT + /* Do Nothing */ +#else hostcmd_regs[0] = CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE); hostcmd_regs[1] = CMIC_CMC_SCHAN_MESSAGE_20r(CMIC_CMC_BASE); hostcmd_regs[2] = CMIC_CMC_SCHAN_MESSAGE_19r(CMIC_CMC_BASE); hostcmd_regs[3] = CMIC_CMC_SCHAN_MESSAGE_18r(CMIC_CMC_BASE); hostcmd_regs[4] = CMIC_CMC_SCHAN_MESSAGE_17r(CMIC_CMC_BASE); +#endif return; } @@ -3578,7 +3759,9 @@ bksync_ioctl_cmd_handler(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type) u32 fw_status; bksync_dnx_jr2_devices_system_info_t *tmp_jr2devs_sys_info = NULL; int tmp = 0; - +#ifdef BDE_EDK_SUPPORT + uint64_t paddr; +#endif kmsg->hdr.type = KCOM_MSG_TYPE_RSP; if (!module_initialized && kmsg->clock_info.cmd != KSYNC_M_HW_INIT) { @@ -3598,9 +3781,25 @@ bksync_ioctl_cmd_handler(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type) } fw_core = kmsg->clock_info.data[1]; +#ifdef BDE_EDK_SUPPORT + paddr = kmsg->clock_info.data[7] << 32; + paddr |= kmsg->clock_info.data[8]; + ptp_priv->fw_comm = (bksync_fw_comm_t *)lkbde_edk_dmamem_map_p2v(paddr); + if (ptp_priv->fw_comm == NULL) { + DBG_ERR(("Hostram address conversion to get virtual address failed\n")); + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } +#endif + bksync_ptp_dma_init(dcb_type); - DEV_READ32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE), &fw_status); +#ifdef BDE_EDK_SUPPORT + /* Data from FW, hence don't memset fw_comm after address converstion */ + fw_status = ptp_priv->fw_comm->cmd; +#else + DEV_READ32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE), &fw_status); +#endif /* Return error if the app is not ready yet. */ if (fw_status != 0xBADC0DE1) { kmsg->hdr.status = KCOM_E_RESOURCE; @@ -3612,16 +3811,18 @@ bksync_ioctl_cmd_handler(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type) (ptp_priv->bksync_init_info).host_cpu_port = kmsg->clock_info.data[4]; (ptp_priv->bksync_init_info).host_cpu_sysport = kmsg->clock_info.data[5]; (ptp_priv->bksync_init_info).udh_len = kmsg->clock_info.data[6]; + (ptp_priv->bksync_init_info).application_v2 = kmsg->clock_info.data[9]; - DBG_VERB(("fw_core:%d uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d\n", + DBG_VERB(("fw_core:%d uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d application_v2:%d\n", kmsg->clock_info.data[1], kmsg->clock_info.data[2], kmsg->clock_info.data[3], - kmsg->clock_info.data[4], kmsg->clock_info.data[5])); + kmsg->clock_info.data[4], kmsg->clock_info.data[5], kmsg->clock_info.data[9])); - DBG_VERB(("uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d\n", + DBG_VERB(("uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d application_v2:%d\n", (ptp_priv->bksync_init_info).uc_port_num, (ptp_priv->bksync_init_info).uc_port_sysport, (ptp_priv->bksync_init_info).host_cpu_port, - (ptp_priv->bksync_init_info).host_cpu_sysport)); + (ptp_priv->bksync_init_info).host_cpu_sysport, + (ptp_priv->bksync_init_info).application_v2)); if (bksync_ptp_init(&(ptp_priv->ptp_caps)) >= 0) { module_initialized = 1; @@ -3630,8 +3831,12 @@ bksync_ioctl_cmd_handler(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type) } break; case KSYNC_M_HW_DEINIT: +#ifdef BDE_EDK_SUPPORT + /* Do nothing */ +#else DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 0); DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 0); +#endif bksync_ptp_deinit(&(ptp_priv->ptp_caps)); module_initialized = 0; break; @@ -3680,7 +3885,7 @@ bksync_ioctl_cmd_handler(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type) tmp, tmp_jr2devs_sys_info->pph_lif_ext_size[tmp])); } - DBG_VERB(("\nsystem_headers_mode %u udh_enable %u\n", + DBG_VERB(("system_headers_mode %u udh_enable %u\n", tmp_jr2devs_sys_info->system_headers_mode, tmp_jr2devs_sys_info->udh_enable)); for (tmp = 0; tmp < BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX; tmp++) { @@ -3688,7 +3893,7 @@ bksync_ioctl_cmd_handler(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type) tmp, tmp_jr2devs_sys_info->udh_data_lenght_per_type[tmp])); } - DBG_VERB(("\ncosq_port_cpu_channel :%u cosq_port_pp_port:%u\n", + DBG_VERB(("cosq_port_cpu_channel :%u cosq_port_pp_port:%u\n", tmp_jr2devs_sys_info->cosq_port_cpu_channel, tmp_jr2devs_sys_info->cosq_port_cpu_channel)); #endif break; @@ -3852,7 +4057,7 @@ static int bksync_ptp_remove(void) static int _pprint(struct seq_file *m) { -#if LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0) +#ifdef PTPCLOCK_SUPPORTED /* put some goodies here */ pprintf(m, "Broadcom BCM PTP Hardware Clock Module\n"); #else @@ -3875,7 +4080,7 @@ _pprint(struct seq_file *m) static int _init(void) { -#if LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0) +#ifdef PTPCLOCK_SUPPORTED bksync_ptp_register(); return 0; #else @@ -3896,7 +4101,7 @@ _init(void) static int _cleanup(void) { -#if LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0) +#ifdef PTPCLOCK_SUPPORTED bksync_ptp_remove(); return 0; #else diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h index c8671c59e93..dcf81c6f9bc 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h @@ -45,6 +45,10 @@ #endif #include +#ifdef BCM_ACCESS_SUPPORT +#include +#endif + /* Enable per unit linkscan lock for all ESW devices. */ #if defined(BCM_ESW_SUPPORT) #define BCM_LINKSCAN_LOCK_PER_UNIT @@ -513,49 +517,6 @@ #define BCM_TIMESYNC_SUPPORT #endif -#if defined(BCM_56560_A0) || defined(BCM_56560_B0) -#define BCM_56860 -#define BCM_56850 -#define BCM_56840 -#define BCM_56634 -#define BCM_56624 -#define BCM_56304 -#define BCM_56800 -#define BCM_56560 -#define BCM_APACHE_SUPPORT -#define BCM_FIREBOLT_SUPPORT -#define BCM_BRADLEY_SUPPORT -#define BCM_HUMV_SUPPORT -#define BCM_SCORPION_SUPPORT -#define BCM_TRIUMPH_SUPPORT -#define BCM_TRIUMPH2_SUPPORT -#define BCM_TRX_SUPPORT -#define BCM_TRIDENT_SUPPORT -#define BCM_TRIUMPH3_SUPPORT -#define BCM_TRIDENT2_SUPPORT -#define BCM_TRIDENT2PLUS_SUPPORT -#define BCM_TIME_V3_SUPPORT -#define BCM_MPLS_SUPPORT -#define BCM_XGS3_FABRIC_SUPPORT -#define BCM_EXTND_SBUS_SUPPORT -#define BCM_SBUSDMA_SUPPORT -#define BCM_FIFODMA_SUPPORT -#define BCM_TIMESYNC_SUPPORT -#define BCM_HGPROXY_COE_SUPPORT -#define SOC_ROBUST_HASH -#define BCM_IPROC_SUPPORT -#define BCM_CMICDV2_SUPPORT -#define BCM_CMICDV3_SUPPORT -#define BCM_CMICM_SUPPORT -#define BCM_UC_MHOST_SUPPORT -#define BCM_OLP_SUPPORT -#define PORTMOD_PM4X10_SUPPORT -#define PORTMOD_PM12X10_SUPPORT -#define PORTMOD_PM12X10_XGS_SUPPORT -#define PORTMOD_PM4X25_SUPPORT -#define PORTMOD_PMNULL_SUPPORT -#define BCM_EP_REDIRECT_VERSION_2 -#endif #if defined(BCM_56670_A0) || defined(BCM_56670_B0) || defined(BCM_56670_C0) #define BCM_56860 @@ -565,10 +526,8 @@ #define BCM_56624 #define BCM_56304 #define BCM_56800 -#define BCM_56560 #define BCM_56670 #define BCM_MONTEREY_SUPPORT -#define BCM_APACHE_SUPPORT #define BCM_FIREBOLT_SUPPORT #define BCM_BRADLEY_SUPPORT #define BCM_HUMV_SUPPORT @@ -611,11 +570,9 @@ #define BCM_56624 #define BCM_56304 #define BCM_56800 -#define BCM_56560 #define BCM_56670 #define BCM_53650 #define BCM_MONTEREY_SUPPORT -#define BCM_APACHE_SUPPORT #define BCM_FIREBOLT_SUPPORT #define BCM_BRADLEY_SUPPORT #define BCM_HUMV_SUPPORT @@ -1278,6 +1235,20 @@ #endif #ifdef BCM_DNX3_SUPPORT +#ifdef BCM_Q3A_SUPPORT +#if defined(BCM_88490_A0) +#define BCM_88490 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM8X100_GEN2_SUPPORT +#define PORTMOD_PM8X50_T5_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_CMICX_GEN2_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#endif +#endif #endif @@ -1654,7 +1625,7 @@ #endif /* Common XGS5 Port Module Support */ -#if defined(BCM_56450) || defined(BCM_56560) || defined(BCM_56860) || \ +#if defined(BCM_56450) || defined(BCM_56670) || defined(BCM_53650) || defined(BCM_56860) || \ defined(BCM_56870) || defined(BCM_56970) || defined(BCM_56370) || \ defined(BCM_56770) || defined(BCM_56980) || defined(BCM_56275) || \ defined(BCM_56470) @@ -1665,7 +1636,7 @@ * RIOT */ #if defined(INCLUDE_L3) -#if defined(BCM_56860_A0) || defined (BCM_56560) || defined(BCM_56870_A0) || \ +#if defined(BCM_56860_A0) || defined(BCM_56670) || defined(BCM_53650) || defined(BCM_56870_A0) || \ defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56275) || \ defined(BCM_56470) || defined(BCM_53650) #define BCM_RIOT_SUPPORT @@ -1675,7 +1646,7 @@ * SwapToItself */ #if defined(INCLUDE_L3) -#if defined (BCM_56560) || defined (BCM_56970_A0) || defined(BCM_56870_A0) || \ +#if defined(BCM_56670) || defined(BCM_53650) || defined (BCM_56970_A0) || defined(BCM_56870_A0) || \ defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56470) #define BCM_SWAP_TO_SELF_SUPPORT #endif @@ -1684,7 +1655,7 @@ * Multi-level ECMP */ #if defined(INCLUDE_L3) -#if defined(BCM_56860_A0) || defined (BCM_56560) || defined(BCM_56870) || \ +#if defined(BCM_56860_A0) || defined(BCM_56670) || defined(BCM_53650) || defined(BCM_56870) || \ defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56980) || \ defined(BCM_56275) || defined(BCM_56470) || defined(BCM_53650) #define BCM_MULTI_LEVEL_ECMP_SUPPORT @@ -1695,7 +1666,7 @@ * Multi-Level Failover Support. */ #if defined(INCLUDE_L3) -#if defined(BCM_56560) +#if defined(BCM_56670) || defined(BCM_53650) #define BCM_MULTI_LEVEL_FAILOVER_SUPPORT #endif #endif @@ -1889,7 +1860,7 @@ /* * If any supported chip has CLMAC ports */ -#if defined(BCM_56960) || defined(BCM_56860) || defined(BCM_56560) || \ +#if defined(BCM_56960) || defined(BCM_56860) || defined(BCM_56670) || defined(BCM_53650) || \ defined(BCM_56870) || \ defined(BCM_56965) || defined(BCM_56970) || defined(BCM_53570) || \ defined(BCM_56980) || defined(BCM_56070) @@ -2135,6 +2106,9 @@ typedef enum soc_chip_types_e { #ifdef BCM_DNX3_SUPPORT SOC_CHIP_BCM88860_A0, SOC_CHIP_BCM88870_A0, +#ifdef BCM_Q3A_SUPPORT + SOC_CHIP_BCM88490_A0, +#endif #endif SOC_CHIP_BCM88480_A0, SOC_CHIP_BCM88480_B0, @@ -2154,8 +2128,6 @@ typedef enum soc_chip_types_e { SOC_CHIP_BCM56260_B0, /* Saber2 */ SOC_CHIP_BCM56270_A0, /* Metrolite */ SOC_CHIP_BCM56860_A0, /* Trident2 Plus */ - SOC_CHIP_BCM56560_A0, /* Apache */ - SOC_CHIP_BCM56560_B0, /* Apache */ SOC_CHIP_BCM56670_A0, /* Monterey */ SOC_CHIP_BCM56670_B0, /* Monterey */ SOC_CHIP_BCM56670_C0, /* Monterey */ @@ -2200,8 +2172,14 @@ typedef enum soc_chip_types_e { * ****************************************************************/ #ifdef BCM_DNX3_SUPPORT +#ifdef BCM_Q3A_SUPPORT +#define SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL /* SOC_CHIP_BCM88860_A0 */ SOC_CHIP_BCM8886X,\ + /* SOC_CHIP_BCM88870_A0 */ SOC_CHIP_BCM8887X,\ + /* SOC_CHIP_BCM88490_A0 */ SOC_CHIP_BCM8849X, +#else #define SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL /* SOC_CHIP_BCM88860_A0 */ SOC_CHIP_BCM8886X,\ /* SOC_CHIP_BCM88870_A0 */ SOC_CHIP_BCM8887X, +#endif #else #define SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL #endif @@ -2303,8 +2281,6 @@ typedef enum soc_chip_types_e { /* SOC_CHIP_BCM56260_B0 */ SOC_CHIP_BCM56260, \ /* SOC_CHIP_BCM56270_A0 */ SOC_CHIP_BCM56270, \ /* SOC_CHIP_BCM56860_A0, */ SOC_CHIP_BCM56860, \ - /* SOC_CHIP_BCM56560_A0, */ SOC_CHIP_BCM56560, \ - /* SOC_CHIP_BCM56560_B0, */ SOC_CHIP_BCM56560, \ /* SOC_CHIP_BCM56670_A0, */ SOC_CHIP_BCM56670, \ /* SOC_CHIP_BCM56670_B0, */ SOC_CHIP_BCM56670, \ /* SOC_CHIP_BCM56670_C0, */ SOC_CHIP_BCM56670, \ @@ -2344,8 +2320,14 @@ typedef enum soc_chip_types_e { #endif #ifdef BCM_DNX3_SUPPORT +#ifdef BCM_Q3A_SUPPORT +#define SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL "BCM88860_A0", \ + "BCM88870_A0", \ + "BCM88490_A0", +#else #define SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL "BCM88860_A0", \ "BCM88870_A0", +#endif #else #define SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL #endif @@ -2447,8 +2429,6 @@ typedef enum soc_chip_types_e { "BCM56260_B0", \ "BCM56270_A0", \ "BCM56860_A0", \ - "BCM56560_A0", \ - "BCM56560_B0", \ "BCM56670_A0", \ "BCM56670_B0", \ "BCM56670_C0", \ @@ -2541,6 +2521,9 @@ typedef enum soc_chip_groups_e { #ifdef BCM_DNX3_SUPPORT SOC_CHIP_BCM8886X, SOC_CHIP_BCM8887X, +#ifdef BCM_Q3A_SUPPORT + SOC_CHIP_BCM8849X, +#endif #endif SOC_CHIP_BCM8848X, SOC_CHIP_BCM88375, @@ -2553,7 +2536,6 @@ typedef enum soc_chip_groups_e { SOC_CHIP_BCM56260, SOC_CHIP_BCM56270, SOC_CHIP_BCM56860, - SOC_CHIP_BCM56560, SOC_CHIP_BCM56670, SOC_CHIP_BCM53650, SOC_CHIP_BCM88770, @@ -2586,8 +2568,14 @@ typedef enum soc_chip_groups_e { } soc_chip_groups_t; #ifdef BCM_DNX3_SUPPORT +#ifdef BCM_Q3A_SUPPORT +#define SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL "BCM8886X", \ + "BCM8887X", \ + "BCM8849X", +#else #define SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL "BCM8886X", \ "BCM8887X", +#endif #else #define SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL #endif @@ -2659,7 +2647,6 @@ typedef enum soc_chip_groups_e { "BCM56260", \ "BCM56270", \ "BCM56860", \ - "BCM56560", \ "BCM56670", \ "BCM53650", \ "BCM88770", \ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h index f88e35e94b5..4497c2ed0a0 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h @@ -1356,6 +1356,11 @@ #define BCM53653_B0_REV_ID 0x11 #define BCM53653_C0_REV_ID 0x21 +#define BCM53654_DEVICE_ID 0x8654 +#define BCM53654_A0_REV_ID 1 +#define BCM53654_B0_REV_ID 0x11 +#define BCM53654_C0_REV_ID 0x21 + #define BCM56565_DEVICE_ID 0xb565 #define BCM56565_A0_REV_ID 1 #define BCM56565_B0_REV_ID 0x11 @@ -1913,6 +1918,11 @@ #define Q3_DEVICE_ID_END 0x886f #define J3AI_DEVICE_ID 0x8890 #define Q3D_DEVICE_ID 0x8870 +#ifdef BCM_Q3A_SUPPORT +#define Q3A_DEVICE_ID 0x8490 +#define Q3U_DEVICE_ID 0x8400 +#define Q3N_DEVICE_ID 0x8405 +#endif #endif #define Q2A_DEVICE_ID 0x8480 #define Q2A_A0_REV_ID DNXC_A0_REV_ID diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h index 9f377ec9911..debc1d96154 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h @@ -29,7 +29,7 @@ * * File: soc/shared/dcbformats/type35.h * Purpose: Define dma control block (DCB) format for a type35 DCB - * used by the 56560 (APACHE) + * used by the 56670 (MONTEREY) * * This file is shared between the SDK and the embedded applications. */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h index 7bb0c5b3b7f..5113c799a58 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h @@ -40,13 +40,10 @@ #include #include -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0) #error Kernel too old #endif -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32) -/* The version kconfig.h became available in. */ #include -#endif #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) #if defined(INCLUDE_KNET) && LINUX_VERSION_CODE >= KERNEL_VERSION(4,0,0) #ifdef CONFIG_NF_CONNTRACK_MODULE @@ -55,9 +52,6 @@ #endif #include #endif -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39) -#include -#endif #include /* Helper defines for multi-version kernel support */ @@ -143,6 +137,12 @@ #define CONFIG_BMW #endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0) +#define DMA_FORCE_CONTIGUOUS NULL +#else +#define DMA_FORCE_CONTIGUOUS DMA_ATTR_FORCE_CONTIGUOUS +#endif + #if LINUX_VERSION_CODE >= KERNEL_VERSION(5,5,0) #define PROC_OWNER(_m) #else diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c index 42a6e92f5c0..a64618e7844 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c @@ -1,5 +1,10 @@ /* - * Copyright 2017-2024 Broadcom + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as @@ -12,11 +17,14 @@ * * You should have received a copy of the GNU General Public License * version 2 (GPLv2) along with this source code. - */ -/* - * $Id: $ - * $Copyright: (c) 2017 Broadcom Corp. - * All Rights Reserved.$ + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ /* @@ -359,6 +367,7 @@ knet_netif_destroy_cb(struct net_device *dev, int unit, kcom_netif_t *netif) return retv; } #endif + /* * Get statistics. * % cat /proc/linux-knet-cb diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c index 16cfefb9ad5..0ddb1251e5f 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c @@ -52,7 +52,7 @@ gvprintk(const char* fmt, va_list args) { static char _buf[256]; - strcpy(_buf, ""); + _buf[0] = 0; sprintf(_buf, "%s (%d): ", _gmodule->name, current->pid); vsprintf(_buf+strlen(_buf), fmt, args); printk("%s",_buf); diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile index 006acfad989..8156eb0e3a8 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile @@ -100,7 +100,6 @@ USER_BDE := $(DEST_DIR)/$(USER_BDE_LOCAL) KNET_CB_LOCAL := linux-knet-cb.$(KOBJ) KNET_CB := $(DEST_DIR)/$(KNET_CB_LOCAL) - export BUILD_BCM_GENL=1 export BUILD_GENL_PACKET=0 GENL_PACKET_LOCAL := genl-packet.$(KOBJ) @@ -115,6 +114,9 @@ BCM_GENL := $(DEST_DIR)/$(BCM_GENL_LOCAL) BCM_KNET_LOCAL := linux-bcm-knet.$(KOBJ) BCM_KNET := $(DEST_DIR)/$(BCM_KNET_LOCAL) +BCM_PTP_LOCAL := linux-bcm-ptp-clock.$(KOBJ) +BCM_PTP := $(DEST_DIR)/$(BCM_PTP_LOCAL) + ifeq (,$(findstring DELIVER,$(MAKECMDGOALS))) .DEFAULT_GOAL := all all_targets := kernel_modules $(KERNEL_BDE) $(USER_BDE) @@ -132,6 +134,10 @@ ifndef BUILD_KNET BUILD_KNET = 1 endif +ifndef BUILD_PTP +BUILD_PTP = 1 +endif + ifeq ($(BUILD_KNET),1) # Kernel network support all_targets += $(BCM_KNET) @@ -146,6 +152,11 @@ ifdef BUILD_KNET_CB all_targets += $(KNET_CB) knet_subdirs += knet-cb +ifdef BUILD_PTP +all_targets += $(BCM_PTP) +knet_subdirs += bcm-ptp-clock +endif + ifeq ($(NO_LOCAL_TARGETS),) LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(KNET_CB_LOCAL)) all_targets +=$(LOCAL_TARGETS) @@ -212,6 +223,10 @@ ifneq (,$(filter knet-cb,$(knet_subdirs))) $(MAKE) -C $(SDK)/systems/linux/kernel/modules/knet-cb $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) endif +ifneq (,$(filter bcm-ptp-clock,$(knet_subdirs))) + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-ptp-clock $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) +endif ifneq (,$(filter bcm-genl,$(knet_subdirs))) ifneq (,$(filter genl-packet,$(knet_subdirs))) $(MAKE) -C $(SDK)/systems/linux/kernel/modules/genl-packet $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ @@ -235,6 +250,9 @@ $(BCM_KNET): $(KERN_BLDROOT)/$(BCM_KNET_LOCAL) $(KNET_CB): $(KERN_BLDROOT)/$(KNET_CB_LOCAL) $(OBJCOPY) --strip-debug $< $@ +$(BCM_PTP): $(KERN_BLDROOT)/$(BCM_PTP_LOCAL) + $(OBJCOPY) --strip-debug $< $@ + $(GENL_PACKET): $(KERN_BLDROOT)/$(GENL_PACKET_LOCAL) $(OBJCOPY) --strip-debug $< $@ @@ -262,6 +280,7 @@ clean:: $(RM) $(KERN_BLDROOT)/$(KNET_CB_LOCAL) $(RM) $(KERN_BLDROOT)/$(GENL_PACKET_LOCAL) $(RM) $(KERN_BLDROOT)/$(BCM_GENL_LOCAL) + $(RM) $(KERN_BLDROOT)/$(BCM_PTP_LOCAL) $(RM) $(LOCAL_TARGETS) distclean:: clean diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile index 01dd4e4e6f8..6b0d0e07c33 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile @@ -60,14 +60,12 @@ endif export SDK -override kernel_version=5_10 +override kernel_version=6_6 platform=gts -LINUX_MAKE_USER=1 export LINKER_RELAX = 1 export ADD_TO_CFLAGS export BR_NO_CCACHE - include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile index 5eeee4fe03d..67ba097a653 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile @@ -68,7 +68,6 @@ export IPROC_BUILD export BUILD_PLATFORM export ARM_LINUX_VERSION -LINUX_MAKE_USER=1 export ADD_TO_CFLAGS include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile index 26c0ffbe0ea..a27707ef07e 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile @@ -61,7 +61,6 @@ export IPROC_BUILD export BUILD_PLATFORM export ARM_LINUX_VERSION -LINUX_MAKE_USER=1 export ADD_TO_CFLAGS export BR_NO_CCACHE diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile index 39353225bda..caf769f958f 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile @@ -53,7 +53,7 @@ endif export SDK -override kernel_version=5_10 +override kernel_version=6_6 platform=iproc IPROC_BUILD=1 @@ -61,7 +61,6 @@ export IPROC_BUILD export BUILD_PLATFORM export ARM_LINUX_VERSION -LINUX_MAKE_USER=1 export ADD_TO_CFLAGS export BR_NO_CCACHE diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile index c33e0825afd..e08d57cee87 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile @@ -53,7 +53,7 @@ endif export SDK -override kernel_version=5_10 +override kernel_version=6_6 platform=iproc_64 IPROC_BUILD=1 @@ -61,7 +61,6 @@ export IPROC_BUILD export BUILD_PLATFORM export ARM_LINUX_VERSION -LINUX_MAKE_USER=1 export ADD_TO_CFLAGS export BR_NO_CCACHE diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile index d354882a81d..617db79980a 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile @@ -62,7 +62,6 @@ export SDK override kernel_version=3_14 platform=slk -LINUX_MAKE_USER=1 export LINKER_RELAX = 1 include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile index ce4f94c424a..9daefdf2166 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile @@ -70,7 +70,6 @@ export SDK override kernel_version=5_10 platform=x86-5_10 -LINUX_MAKE_USER=1 export LINKER_RELAX = 1 # SHARED_LIBRARY_SUPPORT will enable the shared library creation - add a PIC to the compilation flags. diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile index 1165fedce9a..25888af33bb 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile @@ -74,7 +74,6 @@ override kernel_version=4_18 endif platform=x86-64-fc28 -LINUX_MAKE_USER=1 export LINKER_RELAX = 1 # SHARED_LIBRARY_SUPPORT will enable the shared library creation - add a PIC to the compilation flags. diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile index 8fdbb9042ca..e08224dc209 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile @@ -50,5 +50,4 @@ export SDK override kernel_version=2_6 platform=x86-smp_generic_64-$(kernel_version) -LINUX_MAKE_USER=1 include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile index bd572a15b4d..e0a1ac66ce9 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile @@ -60,14 +60,12 @@ endif export SDK -override kernel_version=5_10 +override kernel_version=6_6 platform=xlr -LINUX_MAKE_USER=1 export LINKER_RELAX = 1 export ADD_TO_CFLAGS export BR_NO_CCACHE - include ${SDK}/make/Make.linux diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista index ed942d617dd..526fcf699c8 160000 --- a/platform/broadcom/sonic-platform-modules-arista +++ b/platform/broadcom/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit ed942d617ddde8e63b5190ad3a7d8171c1dbde9a +Subproject commit 526fcf699c8a439a4192154c644ed0f5b6d0070b diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9432f.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9432f.install index b42c7f362a5..524dbdb6455 100644 --- a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9432f.install +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9432f.install @@ -2,7 +2,6 @@ z9432f/scripts/z9432f_platform.sh usr/local/bin z9432f/scripts/check_qsfp.sh usr/local/bin z9432f/scripts/platform_sensors.py usr/local/bin z9432f/scripts/sensors usr/bin -z9432f/scripts/pcisysfs.py usr/bin z9432f/scripts/qsfp_irq_enable.py usr/bin z9432f/cfg/z9432f-modules.conf etc/modules-load.d z9432f/systemd/platform-modules-z9432f.service etc/systemd/system @@ -10,3 +9,4 @@ z9432f/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64 common/platform_reboot usr/share/sonic/device/x86_64-dellemc_z9432f_c3758-r0 common/fw-updater usr/local/bin common/onie_mode_set usr/local/bin +common/pcisysfs.py usr/bin diff --git a/platform/broadcom/sonic-platform-modules-dell/z9432f/scripts/pcisysfs.py b/platform/broadcom/sonic-platform-modules-dell/z9432f/scripts/pcisysfs.py deleted file mode 100755 index 047618e057c..00000000000 --- a/platform/broadcom/sonic-platform-modules-dell/z9432f/scripts/pcisysfs.py +++ /dev/null @@ -1,102 +0,0 @@ -#!/usr/bin/python -# Copyright (c) 2015 Dell Inc. -# -# Licensed under the Apache License, Version 2.0 (the "License"); you may -# not use this file except in compliance with the License. You may obtain -# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 -# -# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR -# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT -# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS -# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. -# -# See the Apache Version 2.0 License for specific language governing -# permissions and limitations under the License. - -import struct -import sys -import getopt -from os import * -from mmap import * - -def usage(): - ''' This is the Usage Method ''' - - print '\t\t pcisysfs.py --get --offset --res ' - print '\t\t pcisysfs.py --set --val --offset --res ' - sys.exit(1) - -def pci_mem_read(mm,offset): - mm.seek(offset) - read_data_stream=mm.read(4) - print "" - reg_val=struct.unpack('I',read_data_stream) - print "reg_val read:%x"%reg_val - return reg_val - -def pci_mem_write(mm,offset,data): - mm.seek(offset) - print "data to write:%x"%data - mm.write(struct.pack('I',data)) - -def pci_set_value(resource,val,offset): - fd=open(resource,O_RDWR) - mm=mmap(fd,0) - pci_mem_write(mm,offset,val) - -def pci_get_value(resource,offset): - fd=open(resource,O_RDWR) - mm=mmap(fd,0) - pci_mem_read(mm,offset) - -def main(argv): - - ''' The main function will read the user input from the - command line argument and process the request ''' - - opts = '' - val = '' - choice = '' - resource = '' - offset = '' - - try: - opts, args = getopt.getopt(argv, "hgsv:" , \ - ["val=","res=","offset=","help", "get", "set"]) - - except getopt.GetoptError: - usage() - - for opt,arg in opts: - - if opt in ('-h','--help'): - choice = 'help' - - elif opt in ('-g', '--get'): - choice = 'get' - - elif opt in ('-s', '--set'): - choice = 'set' - - elif opt == '--res': - resource = arg - - elif opt == '--val': - val = int(arg,16) - - elif opt == '--offset': - offset = int(arg,16) - - if choice == 'set' and val != '' and offset !='' and resource !='': - pci_set_value(resource,val,offset) - - elif choice == 'get' and offset != '' and resource !='': - pci_get_value(resource,offset) - - else: - usage() - -#Calling the main method -if __name__ == "__main__": - main(sys.argv[1:]) - diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control index c6f9acb4a27..3df20d5b4be 100644 --- a/platform/broadcom/sonic-platform-modules-micas/debian/control +++ b/platform/broadcom/sonic-platform-modules-micas/debian/control @@ -16,8 +16,22 @@ Package: platform-modules-micas-m2-w6520-24dc8qc Architecture: amd64 Description: kernel modules for platform devices such as fan, led, sfp -Package: platform-modules-micas-m2-w6510-32c +Package: platform-modules-micas-m2-w6940-128qc +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-micas-m2-w6930-64qc +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-micas-m2-w6940-64oc Architecture: amd64 Description: kernel modules for platform devices such as fan, led, sfp +Package: platform-modules-micas-m2-w6920-32qc2x +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp +Package: platform-modules-micas-m2-w6510-32c +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.install new file mode 100644 index 00000000000..a719c1aecba --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.install @@ -0,0 +1 @@ +m2-w6920-32qc2x/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6920-32qc2x-r0 diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.postinst new file mode 100644 index 00000000000..a8132f4f65a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.postinst @@ -0,0 +1,10 @@ +#!/bin/sh +# postinst + +kernel_version=$(uname -r) + +if [ -e /boot/System.map-${kernel_version} ]; then + depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true +fi + +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install new file mode 100644 index 00000000000..f6e2060d2d1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install @@ -0,0 +1 @@ +m2-w6930-64qc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6930-64qc-r0 diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst new file mode 100644 index 00000000000..a8132f4f65a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst @@ -0,0 +1,10 @@ +#!/bin/sh +# postinst + +kernel_version=$(uname -r) + +if [ -e /boot/System.map-${kernel_version} ]; then + depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true +fi + +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.install new file mode 100644 index 00000000000..3247b8cdd08 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.install @@ -0,0 +1 @@ +m2-w6940-128qc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6940-128qc-r0 diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.postinst new file mode 100644 index 00000000000..a8132f4f65a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.postinst @@ -0,0 +1,10 @@ +#!/bin/sh +# postinst + +kernel_version=$(uname -r) + +if [ -e /boot/System.map-${kernel_version} ]; then + depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true +fi + +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.install new file mode 100644 index 00000000000..49a8fe1026f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.install @@ -0,0 +1 @@ +m2-w6940-64oc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6940-64oc-r0 diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.postinst new file mode 100644 index 00000000000..a8132f4f65a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.postinst @@ -0,0 +1,10 @@ +#!/bin/sh +# postinst + +kernel_version=$(uname -r) + +if [ -e /boot/System.map-${kernel_version} ]; then + depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true +fi + +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk index 5bd19a8ee8f..66e05fe8104 100644 --- a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk +++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk @@ -3,6 +3,10 @@ currentdir = $(shell pwd) MODULE_DIRS := m2-w6510-48v8c MODULE_DIRS += m2-w6510-48gt4v MODULE_DIRS += m2-w6520-24dc8qc +MODULE_DIRS += m2-w6940-128qc +MODULE_DIRS += m2-w6930-64qc +MODULE_DIRS += m2-w6940-64oc +MODULE_DIRS += m2-w6920-32qc2x MODULE_DIRS += m2-w6510-32c export MODULE_DIRS diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/Makefile new file mode 100755 index 00000000000..a0c262841c5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/Makefile @@ -0,0 +1,28 @@ +PWD = $(shell pwd) +DIR_KERNEL_SRC = $(PWD)/modules/driver +EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -Wall +SUB_BUILD_DIR = $(PWD)/build +INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages +INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg +INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system + +all: + $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules + @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi + cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR) + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi + @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi + @if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi + @if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi + @if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi + @if [ -d $(PWD)/service/ ]; then cp -r $(PWD)/service/* ${INSTALL_SERVICE_DIR} ;fi +clean: + rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd + rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order + rm -rf ${DIR_KERNEL_SRC}/.tmp_versions + rm -rf $(SUB_BUILD_DIR) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py new file mode 100644 index 00000000000..6eee7b5df12 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py @@ -0,0 +1,1443 @@ + +#!/usr/bin/python +# -*- coding: UTF-8 -*- +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 0, + "dev_monitor": 1, + "reboot_cause": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "generate_airflow": 1, + "set_eth_mac": 1, + "drv_update": 1, +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "onie" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "onie": { + "key": "ONIE", + "next": "cpu" + }, + "onie_date": { + "parent": "onie", + "key": "Build Date", + "file": "/host/machine.conf", + "pattern": r"^onie_build_date", + "separator": "=", + "arrt_index": 1, + }, + "onie_version": { + "parent": "onie", + "key": "Version", + "file": "/host/machine.conf", + "pattern": r"^onie_version", + "separator": "=", + "arrt_index": 2, + }, + + "cpu": { + "key": "CPU", + "next": "cpld" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + "cpld": { + "key": "CPLD", + "next": "psu" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-1300C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU_CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "reg": { + "loc": "/dev/port", + "offset": 0x700, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-2100C-5BG324C", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "CTRL_CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "reg": { + "loc": "/dev/port", + "offset": 0x900, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF_2100C_5BG256C", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MAC_CPLDA", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "i2c": { + "bus": "26", + "loc": "0x1d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF_1300C_5BG256C", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "MAC_CPLDB", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "i2c": { + "bus": "26", + "loc": "0x2d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF_1300C_5BG256C", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "FAN_CPLD", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "i2c": { + "bus": "28", + "loc": "0x3d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu1": { + "parent": "psu", + "key": "PSU1", + "arrt_index": 1, + }, + "psu1_hw_version": { + "key": "Hardware Version", + "parent": "psu1", + "extra": { + "funcname": "getPsu", + "id": "psu1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu1_fw_version": { + "key": "Firmware Version", + "parent": "psu1", + "config": "NA", + "arrt_index": 2, + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + "next": "fpga" + }, + + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "fan5": { + "key": "FAN5", + "parent": "fan", + "arrt_index": 5, + }, + "fan5_hw_version": { + "key": "Hardware Version", + "parent": "fan5", + "extra": { + "funcname": "checkFan", + "id": "fan5", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan5_fw_version": { + "key": "Firmware Version", + "parent": "fan5", + "config": "NA", + "arrt_index": 2, + }, + + "fan6": { + "key": "FAN6", + "parent": "fan", + "arrt_index": 6, + }, + "fan6_hw_version": { + "key": "Hardware Version", + "parent": "fan6", + "extra": { + "funcname": "checkFan", + "id": "fan6", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan6_fw_version": { + "key": "Firmware Version", + "parent": "fan6", + "config": "NA", + "arrt_index": 2, + }, + + "fpga": { + "key": "FPGA", + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "MAC_FPGA", + "arrt_index": 3, + }, + "fpga1_hw_version": { + "parent": "fpga1", + "config": "NA", + "key": "Hardware Version", + "arrt_index": 4, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 5, + }, + "fpga1_date": { + "parent": "fpga1", + "pci": { + "bus": 4, + "slot": 0, + "fn": 0, + "bar": 0, + "offset": 4 + }, + "key": "Build Date", + "arrt_index": 6, + }, + + "others": { + "key": "OTHERS", + }, + "5387": { + "parent": "others", + "key": "CPU-BMC-SWITCH", + "arrt_index" : 1, + }, + "5387_model": { + "parent": "5387", + "config": "BCM53134O", + "key": "Device Model", + "arrt_index" : 1, + }, + "5387_vendor": { + "parent": "5387", + "config": "Broadcom", + "key": "Vendor", + "arrt_index" : 2, + }, + "5387_hw_version": { + "parent": "5387", + "key": "Hardware Version", + "func": { + "funcname": "get_bcm5387_version", + "params" : { + "before": [ + {"gettype": "cmd", "cmd": "echo 99 > /sys/class/gpio/export"}, + {"gettype": "cmd", "cmd": "echo out > /sys/class/gpio/gpio99/direction"}, + {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio99/value"}, + # select update 5387 + {"gettype": "io", "io_addr": 0x991, "value": 0x6}, + {"gettype": "io", "io_addr": 0x990, "value": 0x1}, + {"gettype": "io", "io_addr": 0x9a6, "value": 0x2}, + {"gettype": "io", "io_addr": 0x9d4, "value": 0x0}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=wb_gpio_c3000"}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46 spi_bus_num=0"}, + ], + "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'", + "after": [ + {"gettype": "cmd", "cmd": "echo 1 > /sys/class/gpio/gpio99/value"}, + {"gettype": "cmd", "cmd": "echo 99 > /sys/class/gpio/unexport"}, + ], + "finally": [ + {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"}, + {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio_device"}, + {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio"}, + {"gettype": "io", "io_addr": 0x9d4, "value": 0xff}, + {"gettype": "io", "io_addr": 0x9a6, "value": 0xff}, + {"gettype": "io", "io_addr": 0x990, "value": 0xfc}, + {"gettype": "io", "io_addr": 0x991, "value": 0xf8}, + ], + }, + }, + "arrt_index" : 3, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "sffs": { + "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0}, + "nochangedmsgflag": 0, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 1, + "alias": { + "sff1": "Ethernet1", + "sff2": "Ethernet2", + "sff3": "Ethernet3", + "sff4": "Ethernet4", + "sff5": "Ethernet5", + "sff6": "Ethernet6", + "sff7": "Ethernet7", + "sff8": "Ethernet8", + "sff9": "Ethernet9", + "sff10": "Ethernet10", + "sff11": "Ethernet11", + "sff12": "Ethernet12", + "sff13": "Ethernet13", + "sff14": "Ethernet14", + "sff15": "Ethernet15", + "sff16": "Ethernet16", + "sff17": "Ethernet17", + "sff18": "Ethernet18", + "sff19": "Ethernet19", + "sff20": "Ethernet20", + "sff21": "Ethernet21", + "sff22": "Ethernet22", + "sff23": "Ethernet23", + "sff24": "Ethernet24", + "sff25": "Ethernet25", + "sff26": "Ethernet26", + "sff27": "Ethernet27", + "sff28": "Ethernet28", + "sff29": "Ethernet29", + "sff30": "Ethernet30", + "sff31": "Ethernet31", + "sff32": "Ethernet32", + } + }, + "fans": { + "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1}, + {"path": "/sys/wb_plat/fan/%s/motor1/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4", + "fan5": "FAN5", + "fan6": "FAN6" + } + }, + "psus": { + "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/wb_plat/psu/%s/output", "okval": 1}, + {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2" + } + } +} + +##################### MAC Voltage adjust#################################### + +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default": 0x73, # default value, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"bus":26, "loc":0x2d, "offset":0x3f, "gettype":"i2c"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/30-0040/avs0_vout_command","gettype": "sysfs","formula": None}, + "mac_avs_param": { + 0x72:0x0e66 , + 0x73:0x0e4c , + 0x74:0x0e33 , + 0x75:0x0e19 , + 0x76:0x0e00 , + 0x77:0x0de6 , + 0x78:0x0dcc , + 0x79:0x0db3 , + 0x7a:0x0d99 , + 0x7b:0x0d80 , + 0x7c:0x0d66 , + 0x7d:0x0d4c , + 0x7e:0x0d33 , + 0x7f:0x0d19 , + 0x80:0x0d00 , + 0x81:0x0ce6 , + 0x82:0x0ccc , + 0x83:0x0cb3 , + 0x84:0x0c99 , + 0x85:0x0c80 , + 0x86:0x0c66 , + 0x87:0x0c4c , + 0x88:0x0c33 , + 0x89:0x0c19 , + 0x8A:0x0c00 + } + } +] + + +DRIVERLISTS = [ + {"name": "wb_gpio_c3000", "delay": 30}, + {"name": "wb_gpio_c3000_device", "delay": 0}, + {"name": "i2c_ismt", "delay": 0}, + {"name": "i2c_i801", "delay": 0}, + {"name": "i2c_dev", "delay": 0}, + {"name": "i2c_algo_bit", "delay": 0}, + {"name": "i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=31 gpio_scl=32 gpio_chip_name=wb_gpio_c3000", "delay": 0}, + {"name": "mdio_bitbang", "delay": 0}, + {"name": "mdio_gpio", "delay": 0}, + {"name": "wb_mdio_gpio_device gpio_mdc=33 gpio_mdio=34 gpio_chip_name=wb_gpio_c3000", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40c1", "delay":0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_lpc_drv", "delay": 0}, + {"name": "wb_lpc_drv_device", "delay": 0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_fpga_i2c_bus_drv", "delay": 0}, + {"name": "wb_fpga_i2c_bus_device", "delay": 0}, + {"name": "wb_fpga_pca954x_drv", "delay": 0}, + {"name": "wb_fpga_pca954x_device", "delay": 0}, + {"name": "wb_i2c_dev_device", "delay": 0}, + {"name": "lm75", "delay":0}, + {"name": "tmp401", "delay":0}, + {"name": "optoe", "delay":0}, + {"name": "at24", "delay":0}, + {"name": "wb_mac_bsc", "delay": 0}, + {"name": "pmbus_core", "delay": 0}, + {"name": "ucd9000", "delay": 0}, + {"name": "wb_xdpe132g5c_pmbus", "delay":0}, + {"name": "xdpe12284", "delay": 0}, + {"name": "wb_csu550", "delay":0}, + {"name": "tps53679", "delay": 0}, + {"name": "wb_wdt", "delay": 0}, + {"name": "wb_wdt_device", "delay": 0}, + {"name": "plat_dfd", "delay":0}, + {"name": "plat_switch", "delay":0}, + {"name": "plat_fan", "delay":0}, + {"name": "plat_psu", "delay":0}, + {"name": "plat_sff", "delay":0}, + {"name": "plat_sensor", "delay":0}, + {"name": "hw_test", "delay": 0}, +] + + +DEVICE = [ + {"name":"24c02", "bus": 2, "loc": 0x56}, + {"name": "wb_mac_bsc_th3", "bus": 62, "loc": 0x44}, + {"name": "tps53688", "bus": 42, "loc": 0x68}, + {"name": "tps53688", "bus": 42, "loc": 0x6e}, + # fan + {"name":"24c64", "bus": 47, "loc": 0x50},#fan6 + {"name":"24c64", "bus": 48, "loc": 0x50},#fan5 + {"name":"24c64", "bus": 49, "loc": 0x50},#fan4 + {"name":"24c64", "bus": 50, "loc": 0x50},#fan3 + {"name":"24c64", "bus": 51, "loc": 0x50},#fan2 + {"name":"24c64", "bus": 52, "loc": 0x50},#fan1 + # psu + {"name":"24c02", "bus": 58, "loc": 0x50}, + {"name":"wb_fsp1200","bus":58, "loc":0x58}, + {"name":"24c02", "bus": 59, "loc": 0x50}, + {"name":"wb_fsp1200","bus":59, "loc":0x58}, + + {"name":"24c02", "bus": 54, "loc": 0x56}, #fan eeprom + {"name":"24c02", "bus": 55, "loc": 0x57}, #mac eeprom + #temp + {"name":"tmp411", "bus": 56, "loc":0x4c}, + {"name":"tmp411", "bus": 57, "loc":0x4c}, + {"name":"lm75", "bus":53, "loc":0x48}, + {"name":"lm75", "bus":53, "loc":0x49}, + {"name":"lm75", "bus":56, "loc":0x4b}, + {"name":"lm75", "bus":57, "loc":0x4f}, + {"name":"lm75", "bus":57, "loc":0x4e}, + # dcdc + {"name":"ucd90160", "bus": 41, "loc": 0x5b}, + {"name":"ucd90160", "bus": 60, "loc": 0x5b}, + {"name":"wb_xdpe132g5c_pmbus", "bus": 30, "loc": 0x40}, + {"name":"xdpe12284", "bus": 31, "loc": 0x66}, + {"name":"xdpe12284", "bus": 32, "loc": 0x70}, + {"name":"xdpe12284", "bus": 32, "loc": 0x6e}, + {"name":"xdpe12284", "bus": 42, "loc": 0x5e}, + {"name":"xdpe12284", "bus": 42, "loc": 0x68}, + {"name":"xdpe12284", "bus": 42, "loc": 0x6e}, +] + +OPTOE = [ + {"name": "optoe3", "startbus": 63, "endbus": 94}, + {"name": "optoe2", "startbus": 95, "endbus": 96}, +] + +REBOOT_CTRL_PARAM = { + "cpu": {"io_addr": 0x920, "rst_val": 0xfe, "rst_delay": 0, "gettype": "io"}, + "mac": {"io_addr": 0x921, "rst_val": 0xfe, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"}, + "phy": {"io_addr": 0x923, "rst_val": 0xef, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"}, +} + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "cold_reboot", + "monitor_point": {"gettype": "io", "io_addr": 0x988, "okval": 0}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Power Loss, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Power Loss, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024} + ] + }, + { + "name": "wdt_reboot", + "monitor_point": {"gettype": "io", "io_addr": 0x989, "okval": 1}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Watchdog, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Watchdog, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024} + ], + "finish_operation": [ + {"gettype": "io", "io_addr": 0x987, "value": 0xfc}, + ] + }, + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu1", + "present": {"gettype": "i2c", "bus": 26, "loc": 0x1d, "offset": 0x34, "presentbit": 4, "okval": 0}, + "device": [ + {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 59, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu1frue2", "name": "24c02", "bus": 59, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "psu2", + "present": {"gettype": "i2c", "bus": 26, "loc": 0x1d, "offset": 0x34, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 58, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "24c02", "bus": 58, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + { + "name": "fan1", + "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 5, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "24c64", "bus": 52, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 4, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "24c64", "bus": 51, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan3", + "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "24c64", "bus": 50, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan4", + "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "24c64", "bus": 49, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan5", + "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan5frue2", "name": "24c64", "bus": 48, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan6", + "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan6frue2", "name": "24c64", "bus": 47, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "24c02", "bus": 2, "loc": 0x56, "attr": "eeprom"}, + ], + }, + { + "name": "lm75", + "device": [ + {"id": "lm75_1", "name": "lm75", "bus": 53, "loc": 0x48, "attr": "hwmon"}, + {"id": "lm75_2", "name": "lm75", "bus": 53, "loc": 0x49, "attr": "hwmon"}, + {"id": "lm75_3", "name": "lm75", "bus": 56, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_4", "name": "lm75", "bus": 57, "loc": 0x4f, "attr": "hwmon"}, + {"id": "lm75_5", "name": "lm75", "bus": 57, "loc": 0x4e, "attr": "hwmon"}, + ], + }, + { + "name": "tmp411", + "device": [ + {"id": "tmp411_1", "name": "tmp411", "bus": 56, "loc": 0x4c, "attr": "hwmon"}, + {"id": "tmp411_2", "name": "tmp411", "bus": 57, "loc": 0x4c, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe12284", + "device": [ + {"id": "xdpe12284_1", "name": "xdpe12284", "bus": 31, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "xdpe12284", "bus": 32, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_3", "name": "xdpe12284", "bus": 32, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_4", "name": "xdpe12284", "bus": 42, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_5", "name": "xdpe12284", "bus": 42, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_6", "name": "xdpe12284", "bus": 42, "loc": 0x6e, "attr": "hwmon"}, + ], + }, + ], +} + +INIT_PARAM_PRE = [] +INIT_COMMAND_PRE = [ + "i2cset -y -f 26 0x1d 0x51 0x03", + "i2cset -y -f 26 0x1d 0x54 0x03", +] + +INIT_PARAM = [] + +INIT_COMMAND = [] + + +WARM_UPGRADE_PARAM = { + "slot0": { + "VME": { + "chain1": [ + {"name": "BASE_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/base_cpld_transf_header.vme", + "init_cmd": [ + {"cmd": "echo 63 > /sys/class/gpio/export", "gettype": "cmd"}, + {"cmd": "echo out > /sys/class/gpio/gpio63/direction", "gettype": "cmd"}, + {"cmd": "echo 0 > /sys/class/gpio/gpio63/value", "gettype": "cmd"}, + {"io_addr": 0x9cc, "value": 0x0, "gettype": "io"}, + ], + "rw_recover_reg": [ + {"io_addr": 0x932, "value": None, "gettype": "io"}, + {"io_addr": 0x933, "value": None, "gettype": "io"}, + {"io_addr": 0x937, "value": None, "gettype": "io"}, + {"io_addr": 0x938, "value": None, "gettype": "io"}, + {"io_addr": 0x939, "value": None, "gettype": "io"}, + {"io_addr": 0x93a, "value": None, "gettype": "io"}, + {"io_addr": 0x941, "value": None, "gettype": "io"}, + {"io_addr": 0x942, "value": None, "gettype": "io"}, + {"io_addr": 0x947, "value": None, "gettype": "io"}, + {"io_addr": 0x948, "value": None, "gettype": "io"}, + {"io_addr": 0x949, "value": None, "gettype": "io"}, + {"io_addr": 0x94d, "value": None, "gettype": "io"}, + {"io_addr": 0x94e, "value": None, "gettype": "io"}, + {"io_addr": 0x94f, "value": None, "gettype": "io"}, + {"io_addr": 0x950, "value": None, "gettype": "io"}, + {"io_addr": 0x951, "value": None, "gettype": "io"}, + {"io_addr": 0x952, "value": None, "gettype": "io"}, + {"io_addr": 0x953, "value": None, "gettype": "io"}, + {"io_addr": 0x990, "value": None, "gettype": "io"}, + {"io_addr": 0x991, "value": None, "gettype": "io"}, + {"io_addr": 0x9a3, "value": None, "gettype": "io"}, + {"io_addr": 0x9a4, "value": None, "gettype": "io"}, + {"io_addr": 0x9a5, "value": None, "gettype": "io"}, + {"io_addr": 0x9a6, "value": None, "gettype": "io"}, + {"io_addr": 0x9a7, "value": None, "gettype": "io"}, + {"io_addr": 0x9ad, "value": None, "gettype": "io"}, + {"io_addr": 0x9d2, "value": None, "gettype": "io"}, + {"io_addr": 0x9d3, "value": None, "gettype": "io"}, + {"io_addr": 0x9d4, "value": None, "gettype": "io"}, + {"io_addr": 0x9d5, "value": None, "gettype": "io"}, + {"io_addr": 0x9d6, "value": None, "gettype": "io"}, + {"io_addr": 0x9d7, "value": None, "gettype": "io"}, + {"io_addr": 0x9d8, "value": None, "gettype": "io"}, + ], + "after_upgrade_delay": 30, + "after_upgrade_delay_timeout": 60, + "refresh_finish_flag_check": {"io_addr": 0x9cb, "value": 0x5a, "gettype": "io"}, + "access_check_reg": {"io_addr": 0x955, "value": 0xaa, "gettype": "io"}, + "finish_cmd": [ + {"io_addr": 0x9cc, "value": 0xff, "gettype": "io"}, + {"cmd": "echo 1 > /sys/class/gpio/gpio63/value", "gettype": "cmd"}, + {"cmd": "echo 63 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1}, + ], + }, + ], + + "chain2": [ + {"name": "MAC_CPLDA", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/mac_cplda_transf_header.vme", + "init_cmd": [ + {"io_addr": 0x9a7, "value": 0x1, "gettype": "io"}, + {"io_addr": 0x9cc, "value": 0x0, "gettype": "io"}, + ], + "rw_recover_reg": [ + {"bus": 26, "loc": 0x1d, "offset": 0x11, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x14, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x15, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x1c, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x1d, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x1f, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x20, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x21, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x22, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x35, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x36, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x37, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x38, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x39, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x3a, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x4c, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x4d, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x4e, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x4f, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x50, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x51, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x53, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x54, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x55, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x1d, "offset": 0x5f, "value": None, "gettype": "i2c"}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "refresh_finish_flag_check": {"bus": 26, "loc": 0x1d, "offset": 0xcb, "value": 0x5a, "gettype": "i2c"}, + "access_check_reg": {"bus": 26, "loc": 0x1d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"}, + "finish_cmd": [ + {"io_addr": 0x9cc, "value": 0xff, "gettype": "io"}, + {"io_addr": 0x9a7, "value": 0x0, "gettype": "io"}, + ], + }, + + {"name": "MAC_CPLDB", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/mac_cpldb_transf_header.vme", + "init_cmd": [ + {"io_addr": 0x9a7, "value": 0x2, "gettype": "io"}, + {"io_addr": 0x9cc, "value": 0x0, "gettype": "io"}, + ], + "rw_recover_reg": [ + {"bus": 26, "loc": 0x2d, "offset": 0x11, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x14, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x15, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x22, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x23, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x30, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x31, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x32, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x3a, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x42, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x43, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x44, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x4a, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x4d, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x50, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x54, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x55, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x60, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x61, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x62, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x63, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x64, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0x65, "value": None, "gettype": "i2c"}, + {"bus": 26, "loc": 0x2d, "offset": 0xf3, "value": None, "gettype": "i2c"}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "refresh_finish_flag_check": {"bus": 26, "loc": 0x2d, "offset": 0xcb, "value": 0x5a, "gettype": "i2c"}, + "access_check_reg": {"bus": 26, "loc": 0x2d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"}, + "finish_cmd": [ + {"io_addr": 0x9cc, "value": 0xff, "gettype": "io"}, + {"io_addr": 0x9a7, "value": 0x0, "gettype": "io"}, + ], + }, + ], + + "chain3": [ + {"name": "FAN_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/fan_cpld_transf_header.vme", + "init_cmd": [], + "rw_recover_reg": [ + {"bus": 28, "loc": 0x3d, "offset": 0x11, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x12, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x13, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x14, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x15, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x16, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x17, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x18, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x19, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x20, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x21, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x30, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x31, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x33, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x35, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x3a, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x3c, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x3d, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x3e, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x3f, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x40, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x41, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x60, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x61, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x62, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x63, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x64, "value": None, "gettype": "i2c"}, + {"bus": 28, "loc": 0x3d, "offset": 0x65, "value": None, "gettype": "i2c"}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"bus": 28, "loc": 0x3d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"}, + "finish_cmd": [], + }, + ], + + + "chain4": [ + {"name": "CPU_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/cpu_cpld_transf_header.vme", + "init_cmd": [ + {"cmd": "echo 114 > /sys/class/gpio/export", "gettype": "cmd"}, + {"cmd": "echo high > /sys/class/gpio/gpio114/direction", "gettype": "cmd"}, + {"io_addr": 0x7a5, "value": 0x0, "gettype": "io"}, + ], + "rw_recover_reg": [ + {"io_addr": 0x705, "value": None, "gettype": "io"}, + {"io_addr": 0x713, "value": None, "gettype": "io"}, + {"io_addr": 0x715, "value": None, "gettype": "io"}, + {"io_addr": 0x721, "value": None, "gettype": "io"}, + {"io_addr": 0x722, "value": None, "gettype": "io"}, + {"io_addr": 0x772, "value": None, "gettype": "io"}, + {"io_addr": 0x774, "value": None, "gettype": "io"}, + {"io_addr": 0x776, "value": None, "gettype": "io"}, + {"io_addr": 0x778, "value": None, "gettype": "io"}, + {"io_addr": 0x77a, "value": None, "gettype": "io"}, + {"io_addr": 0x77c, "value": None, "gettype": "io"}, + {"io_addr": 0x780, "value": None, "gettype": "io"}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"io_addr": 0x705, "value": 0x5a, "gettype": "io"}, + "finish_cmd": [ + {"io_addr": 0x7a5, "value": 0x1, "gettype": "io"}, + {"cmd": "echo 0 > /sys/class/gpio/gpio114/value", "gettype": "cmd"}, + {"cmd": "echo 114 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1}, + ], + }, + ], + + }, + + "MTD": { + "chain1": [ + {"name": "MAC_FPGA", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"cmd": "setpci -s 00:0e.0 0xA0.W=0x0050", "gettype": "cmd"}, # link_disable + {"io_addr": 0x9b0, "value": 0x3, "gettype": "io"}, + ], + "after_upgrade_delay": 10, + "after_upgrade_delay_timeout": 180, + "access_check_reg": { + "path": "/dev/fpga0", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len":4, "gettype":"devfile", + "polling_cmd":[ + {"cmd": "setpci -s 00:0e.0 0xA0.W=0x0060", "gettype": "cmd"}, # retrain_link + {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd"}, + {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 0.1}, + ], + "polling_delay": 0.1 + }, + "finish_cmd": [ + {"cmd": "setpci -s 00:0e.0 0xA0.W=0x0060", "gettype": "cmd"}, # retrain_link + {"io_addr": 0x9b0, "value": 0x2, "gettype": "io"}, + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + ], + }, + ], + }, + }, + "stop_services_cmd": [ + "/usr/local/bin/platform_process.py stop", + ], + "start_services_cmd": [ + "/usr/local/bin/platform_process.py start", + ], +} + +UPGRADE_SUMMARY = { + "devtype": 0x40c1, + + "slot0": { + "subtype": 0, + "VME": { + "chain1": { + "name": "BASE_CPLD", + "is_support_warm_upg": 1, + }, + "chain2": { + "name": "MAC_CPLD", + "is_support_warm_upg": 1, + }, + "chain3": { + "name": "FAN_CPLD", + "is_support_warm_upg": 1, + }, + "chain4": { + "name": "CPU_CPLD", + "is_support_warm_upg": 1, + }, + }, + + "MTD": { + "chain1": { + "name": "MAC_FPGA", + "is_support_warm_upg": 1, + "init_cmd": [ + {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=wb_gpio_c3000", "gettype": "cmd"}, + {"cmd": "echo 99 > /sys/class/gpio/export", "gettype": "cmd"}, + {"cmd": "echo out > /sys/class/gpio/gpio99/direction", "gettype": "cmd", "delay": 0.1}, + {"cmd": "echo 0 > /sys/class/gpio/gpio99/value", "gettype": "cmd", "delay": 0.1}, + {"io_addr": 0x991, "value": 0xfa, "gettype": "io"}, + {"io_addr": 0x990, "value": 0xfd, "gettype": "io"}, + {"io_addr": 0x9a6, "value": 0xfe, "gettype": "io"}, + {"io_addr": 0x9d8, "value": 0xfd, "gettype": "io"}, + {"cmd": "modprobe wb_spi_nor_device spi_bus_num=0", "gettype": "cmd", "delay": 0.1}, + ], + "finish_cmd": [ + {"cmd": "rmmod wb_spi_nor_device", "gettype": "cmd"}, + {"io_addr": 0x9d8, "value": 0xff, "gettype": "io"}, + {"io_addr": 0x9a6, "value": 0xff, "gettype": "io"}, + {"io_addr": 0x990, "value": 0xfc, "gettype": "io"}, + {"io_addr": 0x991, "value": 0xf8, "gettype": "io"}, + {"cmd": "echo 1 > /sys/class/gpio/gpio99/value", "gettype": "cmd"}, + {"cmd": "echo 99 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1}, + {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1}, + ], + }, + + "chain3": { + "name": "BIOS", + "is_support_warm_upg": 0, + "filesizecheck": 10240, # bios check file size, Unit: K + "init_cmd": [ + {"io_addr": 0x722, "value": 0x02, "gettype": "io"}, + {"cmd": "modprobe mtd", "gettype": "cmd"}, + {"cmd": "modprobe spi_nor", "gettype": "cmd"}, + {"cmd": "modprobe ofpart", "gettype": "cmd"}, + {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"}, + {"cmd": "modprobe intel_spi_pci", "gettype": "cmd"}, + ], + "finish_cmd": [ + {"cmd": "rmmod intel_spi_pci", "gettype": "cmd"}, + {"cmd": "rmmod intel_spi", "gettype": "cmd"}, + {"cmd": "rmmod ofpart", "gettype": "cmd"}, + {"cmd": "rmmod spi_nor", "gettype": "cmd"}, + {"cmd": "rmmod mtd", "gettype": "cmd"}, + ], + }, + }, + + "SYSFS": { + "chain2": { + "name": "BCM53134O", + "is_support_warm_upg": 0, + "init_cmd": [ + {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=wb_gpio_c3000", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_93xx46 spi_bus_num=0", "gettype": "cmd", "delay": 0.1}, + ], + "finish_cmd": [ + + {"cmd": "rmmod wb_spi_93xx46", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1}, + ], + }, + }, + + "TEST": { + "cpld": [ + {"chain": 1, "file": "/etc/.upgrade_test/base_cpld_test_header.vme", "display_name": "BASE_CPLD"}, + {"chain": 2, "file": "/etc/.upgrade_test/mac_cpld_test_header.vme", "display_name": "MAC_CPLD"}, + {"chain": 3, "file": "/etc/.upgrade_test/fan_cpld_test_header.vme", "display_name": "FAN_CPLD"}, + {"chain": 4, "file": "/etc/.upgrade_test/cpu_cpld_test_header.vme", "display_name": "CPU_CPLD"}, + ], + "fpga": [ + {"chain": 1,"file": "/etc/.upgrade_test/fpga_test_header.bin","display_name": "FPGA",}, + ], + }, + }, +} + + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/52-0050/eeprom"}, + {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom"}, + {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom"}, + {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom"}, + {"name": "fan5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom"}, + {"name": "fan6", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/47-0050/eeprom"}, + ], + "psu": [ + {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/59-0050/eeprom"}, + {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/58-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/2-0056/eeprom"}, + ], +} + +AIR_FLOW_CONF = { + "psu_fan_airflow": { + "intake": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'], + "exhaust": ['CRPS1300D3R', 'DPS-1300AB-11 C'] + }, + + "fanairflow": { + "intake": ['M1HFAN IV-F'], + "exhaust": ['M1HFAN IV-R'] + }, + + "fans": [ + { + "name": "FAN1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/52-0050/eeprom", + "area": "productInfoArea", "field": "productName", "decode": "fanairflow" + }, + { + "name": "FAN2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom", + "area": "productInfoArea", "field": "productName", "decode": "fanairflow" + }, + { + "name": "FAN3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom", + "area": "productInfoArea", "field": "productName", "decode": "fanairflow" + }, + { + "name": "FAN4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom", + "area": "productInfoArea", "field": "productName", "decode": "fanairflow" + }, + { + "name": "FAN5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom", + "area": "productInfoArea", "field": "productName", "decode": "fanairflow" + }, + { + "name": "FAN6", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/47-0050/eeprom", + "area": "productInfoArea", "field": "productName", "decode": "fanairflow" + }, + ], + + "psus": [ + { + "name": "PSU1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/59-0050/eeprom", + "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow" + }, + { + "name": "PSU2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/58-0050/eeprom", + "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow" + } + ] +} + +SET_MAC_CONF = [ + { + "eth_name": "eth0", + "e2_name": "syseeprom", + "e2_type": "onie_tlv", + "e2_path": "/sys/bus/i2c/devices/2-0056/eeprom", + "mac_location": {"field": "Base MAC Address"}, + "ifcfg": { + "ifcfg_file_path": "/etc/network/interfaces.d/ifcfg-eth0-mac", "file_mode": "add", + } + } +] + +DRVIER_UPDATE_CONF = { + "reboot_flag": 1, + "drv_list": [ + { + "source": "extra/sdhci_pci.ko", + "target": "kernel/drivers/mmc/host/sdhci-pci.ko", + "judge_flag": "/sys/module/sdhci_pci/parameters/wb_sdhci_pci" + }, + ] +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_port_config.py new file mode 100644 index 00000000000..3395be3e48e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_port_config.py @@ -0,0 +1,42 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- + +PLATFORM_INTF_OPTOE = { + "port_num": 34, + "port_bus_map": { + 1: 65, + 2: 66, + 3: 63, + 4: 64, + 5: 67, + 6: 68, + 7: 69, + 8: 70, + 9: 71, + 10: 72, + 11: 73, + 12: 74, + 13: 75, + 14: 76, + 15: 77, + 16: 78, + 17: 79, + 18: 80, + 19: 81, + 20: 82, + 21: 83, + 22: 84, + 23: 85, + 24: 86, + 25: 87, + 26: 88, + 27: 89, + 28: 90, + 29: 93, + 30: 94, + 31: 91, + 32: 92, + 33: 96, + 34: 95 + } +} \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_device.py new file mode 100644 index 00000000000..edbc3624c5d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_device.py @@ -0,0 +1,1333 @@ +# coding:utf-8 + +psu_fan_airflow = { + "intake": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'], + "exhaust": ['CRPS1300D3R', 'DPS-1300AB-11 C'] +} + +fanairflow = { + "intake": ['M1HFAN IV-F'], + "exhaust": ['M1HFAN IV-R'] +} + +psu_display_name = { + "PA1300I-F": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'], + "PA1300I-R": ['CRPS1300D3R', 'DPS-1300AB-11 C'] +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + + +class threshold: + PSU_TEMP_MIN = -20 * 1000 + PSU_TEMP_MAX = 60 * 1000 + + PSU_FAN_SPEED_MIN = 3000 + PSU_FAN_SPEED_MAX = 30000 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 5 * 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 1300 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 5 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 1400* 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 1 * 1000 + PSU_OUTPUT_CURRENT_MAX = 107 * 1000 + + PSU_INPUT_CURRENT_MIN = 0.05 * 1000 + PSU_INPUT_CURRENT_MAX = 12 * 1000 + + FRONT_FAN_SPEED_MAX = 32500 + REAR_FAN_SPEED_MAX = 30500 + FAN_SPEED_MIN = 7248 + + +class Description: + CPLD = "Used for managing IO modules, SFP+ modules and system LEDs" + BIOS = "Performs initialization of hardware components during booting" + FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power" + + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/2-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/59-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 59, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 59, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/58-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 58, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "InputsStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 58, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": + { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": + { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": + { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": + { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": + { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + ], + "temps": [ + { + "name": "BOARD_TEMP", + "temp_id": "TEMP1", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/57-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/57-004e/hwmon/hwmon*/temp1_input", "way": "sysfs"} + ], + "Min": -10000, + "Low": 0, + "High": 85000, + "Max": 90000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "CPU_TEMP", + "temp_id": "TEMP2", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": 2000, + "Low": 10000, + "High": 85000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP3", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/56-004b/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "Min": -10000, + "Low": 0, + "High": 50000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP4", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/53-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/53-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"} + ], + "Min": -10000, + "Low": 0, + "High": 85000, + "Max": 90000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/56-004c/hwmon/hwmon*/temp2_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/57-004c/hwmon/hwmon*/temp2_input", "way": "sysfs"} + ], + "Min": 2000, + "Low": 10000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU1_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/59-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -20000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/58-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -20000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SFF_TEMP", + "Temperature": { + "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"}, + "Min": -15000, + "Low": 0, + "High": 80000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "BOARD_SYS_LED", + "led_type": "SYS_LED", + "led": {"bus": 26, "addr": 0x2d, "offset": 0x40, "way": "i2c"}, + "led_attrs": { + "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f + }, + }, + { + "name": "BOARD_FAN_LED", + "led_type": "FAN_LED", + "led": {"bus": 26, "addr": 0x2d, "offset": 0x42, "way": "i2c"}, + "led_attrs": { + "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f + }, + }, + { + "name": "BOARD_PSU_LED", + "led_type": "PSU_LED", + "led": {"bus": 26, "addr": 0x2d, "offset": 0x43, "way": "i2c"}, + "led_attrs": { + "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f + }, + }, + ], + "fans": [ + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/52-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 28, "addr": 0x3d, "offset": 0x41, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x65, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x65, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 28, "addr": 0x3d, "offset": 0x40, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x64, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x64, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 28, "addr": 0x3d, "offset": 0x3f, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x63, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x63, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 28, "addr": 0x3d, "offset": 0x3e, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x62, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x62, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN5", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 28, "addr": 0x3d, "offset": 0x3d, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x61, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan5/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x61, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan5/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN6", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/47-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 28, "addr": 0x3d, "offset": 0x3c, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x60, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan6/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x60, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan6/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU_CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 0, + }, + { + "name": "CTRL_CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "MAC_CPLDA", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for SFP+ modules", + "slot": 0, + "warm": 0, + }, + { + "name": "MAC_CPLDB", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for SFP+ modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FAN_CPLD", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "MAC_FPGA", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 1, + }, + { + "name": "BIOS", + "cpld_id": "CPLD7", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "dcdc": [ + { + "name": "MAC_VCC12V_CON", + "dcdc_id": "DCDC1", + "Min": 11400, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD1.0V_FPGA", + "dcdc_id": "DCDC2", + "Min": 950, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1050, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD1.8V_FPGA", + "dcdc_id": "DCDC3", + "Min": 1710, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1890, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD1.2V_FPGA", + "dcdc_id": "DCDC4", + "Min": 1130, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1280, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD3.3V", + "dcdc_id": "DCDC5", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in5_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_DVDD3.3V_1.8V", + "dcdc_id": "DCDC6", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in6_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_AVDD1.8V", + "dcdc_id": "DCDC7", + "Min": 1710, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in7_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1890, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_DVDD1.2V", + "dcdc_id": "DCDC8", + "Min": 1130, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in8_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1280, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_AVDD1.2V", + "dcdc_id": "DCDC9", + "Min": 1130, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in9_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1280, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD3.3V_SFP+", + "dcdc_id": "DCDC10", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in10_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD3.3V_CLK", + "dcdc_id": "DCDC11", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in11_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD5V_VR", + "dcdc_id": "DCDC12", + "Min": 4500, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in13_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 5500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_CORE", + "dcdc_id": "DCDC13", + "Min": 700, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in14_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_ANALOG", + "dcdc_id": "DCDC14", + "Min": 760, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in15_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 920, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_ANALOG1", + "dcdc_id": "DCDC15", + "Min": 760, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in16_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 920, + "format": "float(float(%s)/1000)", + }, + + { + "name": "BASE_VDD3.3V", + "dcdc_id": "DCDC16", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "BASE_VDD12V", + "dcdc_id": "DCDC17", + "Min": 11400, + "value": { + "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "BASE_VDD3.3_STBY", + "dcdc_id": "DCDC18", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "BASE_SSD1_VDD3.3V", + "dcdc_id": "DCDC19", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in5_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "BASE_PHY_VDD1V0", + "dcdc_id": "DCDC20", + "Min": 950, + "value": { + "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in6_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "BASE_OVDD_PHY_M", + "dcdc_id": "DCDC21", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in7_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "CPU_VCCP", + "dcdc_id": "DCDC22", + "Min": 468, + "value": { + "loc": "/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1364, + "format": "float(float(%s)/1000)", + }, + + { + "name": "CPU_VNN", + "dcdc_id": "DCDC23", + "Min": 585, + "value": { + "loc": "/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1364, + "format": "float(float(%s)/1000)", + }, + + { + "name": "CPU_P1V05", + "dcdc_id": "DCDC24", + "Min": 945, + "value": { + "loc": "/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1155, + "format": "float(float(%s)/1000)", + }, + + { + "name": "CPU_VCCRAM", + "dcdc_id": "DCDC25", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "CPU_P1V2_VDDQ", + "dcdc_id": "DCDC26", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/42-005e/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD3.3_MON", + "dcdc_id": "DCDC27", + "Min": 3040, + "value": { + "loc": "/sys/wb_plat/sensor/in3/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3560, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_QSFPDD_VDD3.3V_A", + "dcdc_id": "DCDC28", + "Min": 3040, + "value": { + "loc": "/sys/wb_plat/sensor/in1/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3560, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_QSFPDD_VDD3.3V_B", + "dcdc_id": "DCDC29", + "Min": 3040, + "value": { + "loc": "/sys/wb_plat/sensor/in2/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3560, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD3.7V_CLK", + "dcdc_id": "DCDC30", + "Min": 3500, + "value": { + "loc": "/sys/wb_plat/sensor/in4/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 4000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD5V_USB", + "dcdc_id": "DCDC31", + "Min": 4500, + "value": { + "loc": "/sys/wb_plat/sensor/in5/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 5500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN6_VDD12V", + "dcdc_id": "DCDC32", + "Min": 11400, + "value": { + "loc": "/sys/wb_plat/sensor/in11/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN5_VDD12V", + "dcdc_id": "DCDC33", + "Min": 11400, + "value": { + "loc": "/sys/wb_plat/sensor/in10/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN4_VDD12V", + "dcdc_id": "DCDC34", + "Min": 11400, + "value": { + "loc": "/sys/wb_plat/sensor/in9/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN3_VDD12V", + "dcdc_id": "DCDC35", + "Min": 11400, + "value": { + "loc": "/sys/wb_plat/sensor/in8/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN2_VDD12V", + "dcdc_id": "DCDC36", + "Min": 11400, + "value": { + "loc": "/sys/wb_plat/sensor/in7/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN1_VDD12V", + "dcdc_id": "DCDC37", + "Min": 11400, + "value": { + "loc": "/sys/wb_plat/sensor/in6/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN_VDD3.3V", + "dcdc_id": "DCDC38", + "Min": 3040, + "value": { + "loc": "/sys/wb_plat/sensor/in12/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3560, + "format": "float(float(%s)/1000)", + }, + ], + "cpu": [ + { + "name": "cpu", + "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x88, "len": 1, "way": "devfile_ascii"}, + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "cards": [ + { + "name": "psu1", + "sn": "123" + }, + { + "name": "psu2", + "sn": "456" + }, + ], + "sfps": { + "ver": '1.0', + "port_index_start": 0, + "port_num": 34, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_cpld": { + "dev_id": { + 2: { + "offset": { + 0x32: "17-24", + 0x33: "25-28,31,32,29,30", + 0x46: "34,33", + }, + }, + 3: { + "offset": { + 0x4E: "3,4,1,2,5-8", + 0x4F: "9-16", + }, + }, + }, + }, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": [65,66,63,64] + list(range(67, 91)) + [93,94,91,92,96,95], + "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class", + "optoe_driver_key": [65,66,63,64] + list(range(67, 91)) + [93,94,91,92,96,95], + "reset_cpld": { + "dev_id": { + 2: { + "offset": { + 0x21: "17-24", + 0x22: "25-28,31,32,29,30", + }, + }, + 3: { + "offset": { + 0x22: "3,4,1,2,5-8", + 0x23: "9-16", + }, + }, + }, + }, + "reset_val_is_reset": 0, + "txdis_cpld": { + "dev_id": { + 2: { + "offset": { + 0x50: "34,33", + }, + }, + }, + }, + "txdisable_val_is_on": 1, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_device.py new file mode 100644 index 00000000000..ceea936bd5c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_device.py @@ -0,0 +1,1333 @@ +# coding:utf-8 + +psu_fan_airflow = { + "intake": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'], + "exhaust": ['CRPS1300D3R', 'DPS-1300AB-11 C'] +} + +fanairflow = { + "intake": ['M1HFAN IV-F'], + "exhaust": ['M1HFAN IV-R'] +} + +psu_display_name = { + "PA1300I-F": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'], + "PA1300I-R": ['CRPS1300D3R', 'DPS-1300AB-11 C'] +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + + +class threshold: + PSU_TEMP_MIN = -20 * 1000 + PSU_TEMP_MAX = 60 * 1000 + + PSU_FAN_SPEED_MIN = 3000 + PSU_FAN_SPEED_MAX = 30000 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 5 * 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 1300 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 5 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 1400* 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 1 * 1000 + PSU_OUTPUT_CURRENT_MAX = 107 * 1000 + + PSU_INPUT_CURRENT_MIN = 0.05 * 1000 + PSU_INPUT_CURRENT_MAX = 12 * 1000 + + FRONT_FAN_SPEED_MAX = 32500 + REAR_FAN_SPEED_MAX = 30500 + FAN_SPEED_MIN = 7248 + + +class Description: + CPLD = "Used for managing IO modules, SFP+ modules and system LEDs" + BIOS = "Performs initialization of hardware components during booting" + FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power" + + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/2-0056/eeprom", "way": "sysfs"}, + "airflow": "exhaust" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/59-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 59, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 59, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/58-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 58, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "InputsStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 58, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": + { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": + { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": + { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": + { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": + { + "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + ], + "temps": [ + { + "name": "BOARD_TEMP", + "temp_id": "TEMP1", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/57-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/57-004e/hwmon/hwmon*/temp1_input", "way": "sysfs"} + ], + "Min": -10000, + "Low": 0, + "High": 85000, + "Max": 90000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "CPU_TEMP", + "temp_id": "TEMP2", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": 2000, + "Low": 10000, + "High": 85000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP3", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/53-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/53-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"} + ], + "Min": -10000, + "Low": 0, + "High": 50000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP4", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/56-004b/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "Min": -10000, + "Low": 0, + "High": 85000, + "Max": 90000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/56-004c/hwmon/hwmon*/temp2_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/57-004c/hwmon/hwmon*/temp2_input", "way": "sysfs"} + ], + "Min": 2000, + "Low": 10000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU1_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/59-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -20000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/58-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -20000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SFF_TEMP", + "Temperature": { + "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"}, + "Min": -15000, + "Low": 0, + "High": 80000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "BOARD_SYS_LED", + "led_type": "SYS_LED", + "led": {"bus": 26, "addr": 0x2d, "offset": 0x40, "way": "i2c"}, + "led_attrs": { + "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f + }, + }, + { + "name": "BOARD_FAN_LED", + "led_type": "FAN_LED", + "led": {"bus": 26, "addr": 0x2d, "offset": 0x42, "way": "i2c"}, + "led_attrs": { + "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f + }, + }, + { + "name": "BOARD_PSU_LED", + "led_type": "PSU_LED", + "led": {"bus": 26, "addr": 0x2d, "offset": 0x43, "way": "i2c"}, + "led_attrs": { + "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f + }, + }, + ], + "fans": [ + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/52-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 28, "addr": 0x3d, "offset": 0x41, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x65, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x65, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 28, "addr": 0x3d, "offset": 0x40, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x64, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x64, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 28, "addr": 0x3d, "offset": 0x3f, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x63, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x63, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 28, "addr": 0x3d, "offset": 0x3e, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x62, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x62, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN5", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 28, "addr": 0x3d, "offset": 0x3d, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x61, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan5/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x61, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan5/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN6", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/47-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 28, "addr": 0x3d, "offset": 0x3c, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x60, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan6/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x60, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan6/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU_CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 0, + }, + { + "name": "CTRL_CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "MAC_CPLDA", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for SFP+ modules", + "slot": 0, + "warm": 0, + }, + { + "name": "MAC_CPLDB", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for SFP+ modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FAN_CPLD", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "MAC_FPGA", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 1, + }, + { + "name": "BIOS", + "cpld_id": "CPLD7", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "dcdc": [ + { + "name": "MAC_VCC12V_CON", + "dcdc_id": "DCDC1", + "Min": 11400, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD1.0V_FPGA", + "dcdc_id": "DCDC2", + "Min": 950, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1050, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD1.8V_FPGA", + "dcdc_id": "DCDC3", + "Min": 1710, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1890, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD1.2V_FPGA", + "dcdc_id": "DCDC4", + "Min": 1130, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1280, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD3.3V", + "dcdc_id": "DCDC5", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in5_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_DVDD3.3V_1.8V", + "dcdc_id": "DCDC6", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in6_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_AVDD1.8V", + "dcdc_id": "DCDC7", + "Min": 1710, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in7_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1890, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_DVDD1.2V", + "dcdc_id": "DCDC8", + "Min": 1130, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in8_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1280, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_AVDD1.2V", + "dcdc_id": "DCDC9", + "Min": 1130, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in9_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1280, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD3.3V_SFP+", + "dcdc_id": "DCDC10", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in10_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD3.3V_CLK", + "dcdc_id": "DCDC11", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in11_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD5V_VR", + "dcdc_id": "DCDC12", + "Min": 4500, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in13_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 5500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_CORE", + "dcdc_id": "DCDC13", + "Min": 700, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in14_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_ANALOG", + "dcdc_id": "DCDC14", + "Min": 760, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in15_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 920, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_ANALOG1", + "dcdc_id": "DCDC15", + "Min": 760, + "value": { + "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in16_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 920, + "format": "float(float(%s)/1000)", + }, + + { + "name": "BASE_VDD3.3V", + "dcdc_id": "DCDC16", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "BASE_VDD12V", + "dcdc_id": "DCDC17", + "Min": 11400, + "value": { + "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "BASE_VDD3.3_STBY", + "dcdc_id": "DCDC18", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "BASE_SSD1_VDD3.3V", + "dcdc_id": "DCDC19", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in5_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "BASE_PHY_VDD1V0", + "dcdc_id": "DCDC20", + "Min": 950, + "value": { + "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in6_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "BASE_OVDD_PHY_M", + "dcdc_id": "DCDC21", + "Min": 3135, + "value": { + "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in7_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3465, + "format": "float(float(%s)/1000)", + }, + + { + "name": "CPU_VCCP", + "dcdc_id": "DCDC22", + "Min": 468, + "value": { + "loc": "/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1364, + "format": "float(float(%s)/1000)", + }, + + { + "name": "CPU_VNN", + "dcdc_id": "DCDC23", + "Min": 585, + "value": { + "loc": "/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1364, + "format": "float(float(%s)/1000)", + }, + + { + "name": "CPU_P1V05", + "dcdc_id": "DCDC24", + "Min": 945, + "value": { + "loc": "/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1155, + "format": "float(float(%s)/1000)", + }, + + { + "name": "CPU_VCCRAM", + "dcdc_id": "DCDC25", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "CPU_P1V2_VDDQ", + "dcdc_id": "DCDC26", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/42-005e/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD3.3_MON", + "dcdc_id": "DCDC27", + "Min": 3040, + "value": { + "loc": "/sys/wb_plat/sensor/in3/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3560, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_QSFPDD_VDD3.3V_A", + "dcdc_id": "DCDC28", + "Min": 3040, + "value": { + "loc": "/sys/wb_plat/sensor/in1/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3560, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_QSFPDD_VDD3.3V_B", + "dcdc_id": "DCDC29", + "Min": 3040, + "value": { + "loc": "/sys/wb_plat/sensor/in2/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3560, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD3.7V_CLK", + "dcdc_id": "DCDC30", + "Min": 3500, + "value": { + "loc": "/sys/wb_plat/sensor/in4/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 4000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD5V_USB", + "dcdc_id": "DCDC31", + "Min": 4500, + "value": { + "loc": "/sys/wb_plat/sensor/in5/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 5500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN6_VDD12V", + "dcdc_id": "DCDC32", + "Min": 11400, + "value": { + "loc": "/sys/wb_plat/sensor/in11/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN5_VDD12V", + "dcdc_id": "DCDC33", + "Min": 11400, + "value": { + "loc": "/sys/wb_plat/sensor/in10/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN4_VDD12V", + "dcdc_id": "DCDC34", + "Min": 11400, + "value": { + "loc": "/sys/wb_plat/sensor/in9/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN3_VDD12V", + "dcdc_id": "DCDC35", + "Min": 11400, + "value": { + "loc": "/sys/wb_plat/sensor/in8/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN2_VDD12V", + "dcdc_id": "DCDC36", + "Min": 11400, + "value": { + "loc": "/sys/wb_plat/sensor/in7/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN1_VDD12V", + "dcdc_id": "DCDC37", + "Min": 11400, + "value": { + "loc": "/sys/wb_plat/sensor/in6/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 12600, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN_VDD3.3V", + "dcdc_id": "DCDC38", + "Min": 3040, + "value": { + "loc": "/sys/wb_plat/sensor/in12/in_input", + "way": "sysfs", + }, + "read_times": 5, + "Unit": "V", + "Max": 3560, + "format": "float(float(%s)/1000)", + }, + ], + "cpu": [ + { + "name": "cpu", + "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x88, "len": 1, "way": "devfile_ascii"}, + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "cards": [ + { + "name": "psu1", + "sn": "123" + }, + { + "name": "psu2", + "sn": "456" + }, + ], + "sfps": { + "ver": '1.0', + "port_index_start": 0, + "port_num": 34, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_cpld": { + "dev_id": { + 2: { + "offset": { + 0x32: "17-24", + 0x33: "25-28,31,32,29,30", + 0x46: "34,33", + }, + }, + 3: { + "offset": { + 0x4E: "3,4,1,2,5-8", + 0x4F: "9-16", + }, + }, + }, + }, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": [65,66,63,64] + list(range(67, 91)) + [93,94,91,92,96,95], + "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class", + "optoe_driver_key": [65,66,63,64] + list(range(67, 91)) + [93,94,91,92,96,95], + "reset_cpld": { + "dev_id": { + 2: { + "offset": { + 0x21: "17-24", + 0x22: "25-28,31,32,29,30", + }, + }, + 3: { + "offset": { + 0x22: "3,4,1,2,5-8", + 0x23: "9-16", + }, + }, + }, + }, + "reset_val_is_reset": 0, + "txdis_cpld": { + "dev_id": { + 2: { + "offset": { + 0x50: "34,33", + }, + }, + }, + }, + "txdisable_val_is_on": 1, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_monitor.py new file mode 100644 index 00000000000..5bd96813eb2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_monitor.py @@ -0,0 +1,213 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x8d, + "pwm_max": 0xff, + "K": 11, + "tin_min": 28, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x8d, + "pwm_max": 0xff, + "a": 0.1255, + "b": -1.2036, + "c": 76, + "tin_min": 25, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x8d, + "pwm_max": 0xff, + "Kp": 1.5, + "Ki": 0.2, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x8d, + "pwm_max": 0xff, + "Kp": 1.5, + "Ki": 0.3, + "Kd": 0.3, + "target": 78, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x8d, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "BOARD_TEMP": { + "name": "BOARD_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x8d, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 83, + "value": [None, None, None], + }, + "SFF_TEMP": { + "name": "SFF_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x8d, + "pwm_max": 0xff, + "Kp": 0.3, + "Ki": 0.2, + "Kd": 0, + "target": 65, + "value": [None, None, None], + }, + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 110}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 45, "critical": 50, "fix": -2}, + "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 90, "critical": 95}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 87, "critical": 93}, + "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999}, + }, + + "fancontrol_para": { + "interval": 5, + "fan_status_interval": 0.5, + "max_pwm": 0xff, + "min_pwm": 0x8d, + "abnormal_pwm": 0xff, + "warning_pwm": 0xff, + "temp_invalid_pid_pwm": 0x8d, + "temp_error_pid_pwm": 0x8d, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + + "deal_all_fan_error_method_flag": 1, + "all_fan_error_switch_temp_critical_temp": 95, + "all_fan_error_recover_log": "Power off base and mac board.", + "all_fan_error_recover_cmd": "dfd_debug io_wr 0x947 0xfa", + "all_fan_error_check_crit_reboot_num": 3, + "all_fan_error_check_crit_sleep_time": 2, + + "psu_absent_fullspeed_num": 0xFF, #Full-speed switchover - Number of Psus absent - Disables the full-speed switchover of Psus absent + "fan_absent_fullspeed_num": 2, # Full speed rotation of the system -fan Indicates the number of absent bits + "rotor_error_fullspeed_num": 3, # System full speed - Number of motor failures + "psu_fan_control": 1, # Enable the psu fan control function + "deal_fan_error": 1, # Handling Fan anomalies + "deal_fan_error_conf": { + "countdown": 2, # max time:(2-1)*Speed regulation period + "FAN1": [ + {"name": "FAN1", "pwm": 0xff}, + {"name": "FAN2", "pwm": 0x99}, + {"name": "FAN3", "pwm": 0x99}, + {"name": "FAN4", "pwm": 0x99}, + {"name": "FAN5", "pwm": 0x99}, + {"name": "FAN6", "pwm": 0x99}, + ], + "FAN2": [ + {"name": "FAN1", "pwm": 0x99}, + {"name": "FAN2", "pwm": 0xff}, + {"name": "FAN3", "pwm": 0x99}, + {"name": "FAN4", "pwm": 0x99}, + {"name": "FAN5", "pwm": 0x99}, + {"name": "FAN6", "pwm": 0x99}, + ], + "FAN3": [ + {"name": "FAN1", "pwm": 0x99}, + {"name": "FAN2", "pwm": 0x99}, + {"name": "FAN3", "pwm": 0xff}, + {"name": "FAN4", "pwm": 0x99}, + {"name": "FAN5", "pwm": 0x99}, + {"name": "FAN6", "pwm": 0x99}, + ], + "FAN4": [ + {"name": "FAN1", "pwm": 0x99}, + {"name": "FAN2", "pwm": 0x99}, + {"name": "FAN3", "pwm": 0x99}, + {"name": "FAN4", "pwm": 0xff}, + {"name": "FAN5", "pwm": 0x99}, + {"name": "FAN6", "pwm": 0x99}, + ], + "FAN5": [ + {"name": "FAN1", "pwm": 0x99}, + {"name": "FAN2", "pwm": 0x99}, + {"name": "FAN3", "pwm": 0x99}, + {"name": "FAN4", "pwm": 0x99}, + {"name": "FAN5", "pwm": 0xff}, + {"name": "FAN6", "pwm": 0x99}, + ], + "FAN6": [ + {"name": "FAN1", "pwm": 0x99}, + {"name": "FAN2", "pwm": 0x99}, + {"name": "FAN3", "pwm": 0x99}, + {"name": "FAN4", "pwm": 0x99}, + {"name": "FAN5", "pwm": 0x99}, + {"name": "FAN6", "pwm": 0xff}, + ], + }, + }, + + "ledcontrol_para": { + "interval": 5, + "checkpsu": 0, # 0: sys led don't follow psu led + "checkfan": 0, # 0: sys led don't follow fan led + "psu_amber_num": 1, + "fan_amber_num": 1, + "board_sys_led": [ + {"led_name": "BOARD_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "BOARD_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "BOARD_FAN_LED"}, + ], + "psu_air_flow_monitor": 1, + "fan_air_flow_monitor": 1, + "psu_air_flow_amber_num": 1, + "fan_air_flow_amber_num": 1, + }, + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_monitor.py new file mode 100644 index 00000000000..d6b5c2b5aa0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_monitor.py @@ -0,0 +1,213 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x8d, + "pwm_max": 0xff, + "K": 11, + "tin_min": 28, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x8d, + "pwm_max": 0xff, + "a": 0.1255, + "b": -1.2036, + "c": 76, + "tin_min": 25, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x8d, + "pwm_max": 0xff, + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x8d, + "pwm_max": 0xff, + "Kp": 1.5, + "Ki": 0.5, + "Kd": 0.3, + "target": 78, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x8d, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "BOARD_TEMP": { + "name": "BOARD_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x8d, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 83, + "value": [None, None, None], + }, + "SFF_TEMP": { + "name": "SFF_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x8d, + "pwm_max": 0xff, + "Kp": 0.3, + "Ki": 0.4, + "Kd": 0, + "target": 65, + "value": [None, None, None], + }, + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 110}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 45, "critical": 50, "fix": -4}, + "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 90, "critical": 95}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 87, "critical": 93}, + "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999}, + }, + + "fancontrol_para": { + "interval": 5, + "fan_status_interval": 0.5, + "max_pwm": 0xff, + "min_pwm": 0x8d, + "abnormal_pwm": 0xff, + "warning_pwm": 0xff, + "temp_invalid_pid_pwm": 0x8d, + "temp_error_pid_pwm": 0x8d, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + + "deal_all_fan_error_method_flag": 1, + "all_fan_error_switch_temp_critical_temp": 95, + "all_fan_error_recover_log": "Power off base and mac board.", + "all_fan_error_recover_cmd": "dfd_debug io_wr 0x947 0xfa", + "all_fan_error_check_crit_reboot_num": 3, + "all_fan_error_check_crit_sleep_time": 2, + + "psu_absent_fullspeed_num": 0xFF, #Full-speed switchover - Number of Psus absent - Disables the full-speed switchover of Psus absent + "fan_absent_fullspeed_num": 2, # Full speed rotation of the system -fan Indicates the number of absent bits + "rotor_error_fullspeed_num": 3, # System full speed - Number of motor failures + "psu_fan_control": 1, # Enable the psu fan control function + "deal_fan_error": 1, # Handling Fan anomalies + "deal_fan_error_conf": { + "countdown": 2, # max time:(2-1)*Speed regulation period + "FAN1": [ + {"name": "FAN1", "pwm": 0xff}, + {"name": "FAN2", "pwm": 0x99}, + {"name": "FAN3", "pwm": 0x99}, + {"name": "FAN4", "pwm": 0x99}, + {"name": "FAN5", "pwm": 0x99}, + {"name": "FAN6", "pwm": 0x99}, + ], + "FAN2": [ + {"name": "FAN1", "pwm": 0x99}, + {"name": "FAN2", "pwm": 0xff}, + {"name": "FAN3", "pwm": 0x99}, + {"name": "FAN4", "pwm": 0x99}, + {"name": "FAN5", "pwm": 0x99}, + {"name": "FAN6", "pwm": 0x99}, + ], + "FAN3": [ + {"name": "FAN1", "pwm": 0x99}, + {"name": "FAN2", "pwm": 0x99}, + {"name": "FAN3", "pwm": 0xff}, + {"name": "FAN4", "pwm": 0x99}, + {"name": "FAN5", "pwm": 0x99}, + {"name": "FAN6", "pwm": 0x99}, + ], + "FAN4": [ + {"name": "FAN1", "pwm": 0x99}, + {"name": "FAN2", "pwm": 0x99}, + {"name": "FAN3", "pwm": 0x99}, + {"name": "FAN4", "pwm": 0xff}, + {"name": "FAN5", "pwm": 0x99}, + {"name": "FAN6", "pwm": 0x99}, + ], + "FAN5": [ + {"name": "FAN1", "pwm": 0x99}, + {"name": "FAN2", "pwm": 0x99}, + {"name": "FAN3", "pwm": 0x99}, + {"name": "FAN4", "pwm": 0x99}, + {"name": "FAN5", "pwm": 0xff}, + {"name": "FAN6", "pwm": 0x99}, + ], + "FAN6": [ + {"name": "FAN1", "pwm": 0x99}, + {"name": "FAN2", "pwm": 0x99}, + {"name": "FAN3", "pwm": 0x99}, + {"name": "FAN4", "pwm": 0x99}, + {"name": "FAN5", "pwm": 0x99}, + {"name": "FAN6", "pwm": 0xff}, + ], + }, + }, + + "ledcontrol_para": { + "interval": 5, + "checkpsu": 0, # 0: sys led don't follow psu led + "checkfan": 0, # 0: sys led don't follow fan led + "psu_amber_num": 1, + "fan_amber_num": 1, + "board_sys_led": [ + {"led_name": "BOARD_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "BOARD_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "BOARD_FAN_LED"}, + ], + "psu_air_flow_monitor": 1, + "fan_air_flow_monitor": 1, + "psu_air_flow_amber_num": 1, + "fan_air_flow_amber_num": 1, + }, + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/Makefile new file mode 100644 index 00000000000..0a1798579e1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/Makefile @@ -0,0 +1,13 @@ +MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST))) +MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules) + +EXTRA_CFLAGS+= -I$(MODULES_DIR) + + +obj-m += wb_pcie_dev_device.o +obj-m += wb_lpc_drv_device.o +obj-m += wb_io_dev_device.o +obj-m += wb_fpga_i2c_bus_device.o +obj-m += wb_fpga_pca954x_device.o +obj-m += wb_i2c_dev_device.o +obj-m += wb_wdt_device.o diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_i2c_bus_device.c new file mode 100644 index 00000000000..4b8f3f53788 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_i2c_bus_device.c @@ -0,0 +1,993 @@ +/* + * An wb_fpga_i2c_bus_device driver for fpga i2c device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_fpga_i2c_debug = 0; +static int g_wb_fpga_i2c_error = 0; + +module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR); + +#define WB_FPGA_I2C_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_fpga_i2c_debug) { \ + printk(KERN_INFO "[WB_FPGA_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_FPGA_I2C_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_fpga_i2c_error) { \ + printk(KERN_ERR "[WB_FPGA_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static fpga_i2c_bus_device_t fpga_i2c_bus_device_data0 = { + .adap_nr = 3, + .i2c_timeout = 3000, + .i2c_scale = 0x500, + .i2c_filter = 0x504, + .i2c_stretch = 0x508, + .i2c_ext_9548_exits_flag = 0x50c, + .i2c_ext_9548_addr = 0x510, + .i2c_ext_9548_chan = 0x514, + .i2c_in_9548_chan = 0x518, + .i2c_slave = 0x51c, + .i2c_reg = 0x520, + .i2c_reg_len = 0x530, + .i2c_data_len = 0x534, + .i2c_ctrl = 0x538, + .i2c_status = 0x53c, + .i2c_data_buf = 0x580, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x80, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + + +static fpga_i2c_bus_device_t fpga_i2c_bus_device_data1 = { + .adap_nr = 4, + .i2c_timeout = 3000, + .i2c_scale = 0x600, + .i2c_filter = 0x604, + .i2c_stretch = 0x608, + .i2c_ext_9548_exits_flag = 0x60c, + .i2c_ext_9548_addr = 0x610, + .i2c_ext_9548_chan = 0x614, + .i2c_in_9548_chan = 0x618, + .i2c_slave = 0x61c, + .i2c_reg = 0x620, + .i2c_reg_len = 0x630, + .i2c_data_len = 0x634, + .i2c_ctrl = 0x638, + .i2c_status = 0x63c, + .i2c_data_buf = 0x680, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x84, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_i2c_bus_device_data2 = { + .adap_nr = 5, + .i2c_timeout = 3000, + .i2c_scale = 0x700, + .i2c_filter = 0x704, + .i2c_stretch = 0x708, + .i2c_ext_9548_exits_flag = 0x70c, + .i2c_ext_9548_addr = 0x710, + .i2c_ext_9548_chan = 0x714, + .i2c_in_9548_chan = 0x718, + .i2c_slave = 0x71c, + .i2c_reg = 0x720, + .i2c_reg_len = 0x730, + .i2c_data_len = 0x734, + .i2c_ctrl = 0x738, + .i2c_status = 0x73c, + .i2c_data_buf = 0x780, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x88, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_i2c_bus_device_data3 = { + .adap_nr = 6, + .i2c_timeout = 3000, + .i2c_scale = 0x16800, + .i2c_filter = 0x16804, + .i2c_stretch = 0x16808, + .i2c_ext_9548_exits_flag = 0x1680c, + .i2c_ext_9548_addr = 0x16810, + .i2c_ext_9548_chan = 0x16814, + .i2c_in_9548_chan = 0x16818, + .i2c_slave = 0x1681c, + .i2c_reg = 0x16820, + .i2c_reg_len = 0x16830, + .i2c_data_len = 0x16834, + .i2c_ctrl = 0x16838, + .i2c_status = 0x1683c, + .i2c_data_buf = 0x16900, + .i2c_data_buf_len = 256, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x8c, + .i2c_reset_on = 0x0000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_i2c_bus_device_data4 = { + .adap_nr = 7, + .i2c_timeout = 3000, + .i2c_scale = 0x900, + .i2c_filter = 0x904, + .i2c_stretch = 0x908, + .i2c_ext_9548_exits_flag = 0x90c, + .i2c_ext_9548_addr = 0x910, + .i2c_ext_9548_chan = 0x914, + .i2c_in_9548_chan = 0x918, + .i2c_slave = 0x91c, + .i2c_reg = 0x920, + .i2c_reg_len = 0x930, + .i2c_data_len = 0x934, + .i2c_ctrl = 0x938, + .i2c_status = 0x93c, + .i2c_data_buf = 0x980, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0xac, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_i2c_bus_device_data5 = { + .adap_nr = 8, + .i2c_timeout = 3000, + .i2c_scale = 0xf00, + .i2c_filter = 0xf04, + .i2c_stretch = 0xf08, + .i2c_ext_9548_exits_flag = 0xf0c, + .i2c_ext_9548_addr = 0xf10, + .i2c_ext_9548_chan = 0xf14, + .i2c_in_9548_chan = 0xf18, + .i2c_slave = 0xf1c, + .i2c_reg = 0xf20, + .i2c_reg_len = 0xf30, + .i2c_data_len = 0xf34, + .i2c_ctrl = 0xf38, + .i2c_status = 0xf3c, + .i2c_data_buf = 0xf80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0xac, + .i2c_reset_on = 0x00000002, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data0 = { + .adap_nr = 9, + .i2c_timeout = 3000, + .i2c_scale = 0x2c00, + .i2c_filter = 0x2c04, + .i2c_stretch = 0x2c08, + .i2c_ext_9548_exits_flag = 0x2c0c, + .i2c_ext_9548_addr = 0x2c10, + .i2c_ext_9548_chan = 0x2c14, + .i2c_in_9548_chan = 0x2c18, + .i2c_slave = 0x2c1c, + .i2c_reg = 0x2c20, + .i2c_reg_len = 0x2c30, + .i2c_data_len = 0x2c34, + .i2c_ctrl = 0x2c38, + .i2c_status = 0x2c3c, + .i2c_data_buf = 0x2c80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data1 = { + .adap_nr = 10, + .i2c_timeout = 3000, + .i2c_scale = 0x2d00, + .i2c_filter = 0x2d04, + .i2c_stretch = 0x2d08, + .i2c_ext_9548_exits_flag = 0x2d0c, + .i2c_ext_9548_addr = 0x2d10, + .i2c_ext_9548_chan = 0x2d14, + .i2c_in_9548_chan = 0x2d18, + .i2c_slave = 0x2d1c, + .i2c_reg = 0x2d20, + .i2c_reg_len = 0x2d30, + .i2c_data_len = 0x2d34, + .i2c_ctrl = 0x2d38, + .i2c_status = 0x2d3c, + .i2c_data_buf = 0x2d80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000002, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data2 = { + .adap_nr = 11, + .i2c_timeout = 3000, + .i2c_scale = 0x2e00, + .i2c_filter = 0x2e04, + .i2c_stretch = 0x2e08, + .i2c_ext_9548_exits_flag = 0x2e0c, + .i2c_ext_9548_addr = 0x2e10, + .i2c_ext_9548_chan = 0x2e14, + .i2c_in_9548_chan = 0x2e18, + .i2c_slave = 0x2e1c, + .i2c_reg = 0x2e20, + .i2c_reg_len = 0x2e30, + .i2c_data_len = 0x2e34, + .i2c_ctrl = 0x2e38, + .i2c_status = 0x2e3c, + .i2c_data_buf = 0x2e80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000004, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data3 = { + .adap_nr = 12, + .i2c_timeout = 3000, + .i2c_scale = 0x2f00, + .i2c_filter = 0x2f04, + .i2c_stretch = 0x2f08, + .i2c_ext_9548_exits_flag = 0x2f0c, + .i2c_ext_9548_addr = 0x2f10, + .i2c_ext_9548_chan = 0x2f14, + .i2c_in_9548_chan = 0x2f18, + .i2c_slave = 0x2f1c, + .i2c_reg = 0x2f20, + .i2c_reg_len = 0x2f30, + .i2c_data_len = 0x2f34, + .i2c_ctrl = 0x2f38, + .i2c_status = 0x2f3c, + .i2c_data_buf = 0x2f80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000008, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data4 = { + .adap_nr = 13, + .i2c_timeout = 3000, + .i2c_scale = 0x3000, + .i2c_filter = 0x3004, + .i2c_stretch = 0x3008, + .i2c_ext_9548_exits_flag = 0x300c, + .i2c_ext_9548_addr = 0x3010, + .i2c_ext_9548_chan = 0x3014, + .i2c_in_9548_chan = 0x3018, + .i2c_slave = 0x301c, + .i2c_reg = 0x3020, + .i2c_reg_len = 0x3030, + .i2c_data_len = 0x3034, + .i2c_ctrl = 0x3038, + .i2c_status = 0x303c, + .i2c_data_buf = 0x3080, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000010, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data5 = { + .adap_nr = 14, + .i2c_timeout = 3000, + .i2c_scale = 0x3100, + .i2c_filter = 0x3104, + .i2c_stretch = 0x3108, + .i2c_ext_9548_exits_flag = 0x310c, + .i2c_ext_9548_addr = 0x3110, + .i2c_ext_9548_chan = 0x3114, + .i2c_in_9548_chan = 0x3118, + .i2c_slave = 0x311c, + .i2c_reg = 0x3120, + .i2c_reg_len = 0x3130, + .i2c_data_len = 0x3134, + .i2c_ctrl = 0x3138, + .i2c_status = 0x313c, + .i2c_data_buf = 0x3180, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000020, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data6 = { + .adap_nr = 15, + .i2c_timeout = 3000, + .i2c_scale = 0x3200, + .i2c_filter = 0x3204, + .i2c_stretch = 0x3208, + .i2c_ext_9548_exits_flag = 0x320c, + .i2c_ext_9548_addr = 0x3210, + .i2c_ext_9548_chan = 0x3214, + .i2c_in_9548_chan = 0x3218, + .i2c_slave = 0x321c, + .i2c_reg = 0x3220, + .i2c_reg_len = 0x3230, + .i2c_data_len = 0x3234, + .i2c_ctrl = 0x3238, + .i2c_status = 0x323c, + .i2c_data_buf = 0x3280, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000040, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data7 = { + .adap_nr = 16, + .i2c_timeout = 3000, + .i2c_scale = 0x3300, + .i2c_filter = 0x3304, + .i2c_stretch = 0x3308, + .i2c_ext_9548_exits_flag = 0x330c, + .i2c_ext_9548_addr = 0x3310, + .i2c_ext_9548_chan = 0x3314, + .i2c_in_9548_chan = 0x3318, + .i2c_slave = 0x331c, + .i2c_reg = 0x3320, + .i2c_reg_len = 0x3330, + .i2c_data_len = 0x3334, + .i2c_ctrl = 0x3338, + .i2c_status = 0x333c, + .i2c_data_buf = 0x3380, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000080, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data8 = { + .adap_nr = 17, + .i2c_timeout = 3000, + .i2c_scale = 0x3400, + .i2c_filter = 0x3404, + .i2c_stretch = 0x3408, + .i2c_ext_9548_exits_flag = 0x340c, + .i2c_ext_9548_addr = 0x3410, + .i2c_ext_9548_chan = 0x3414, + .i2c_in_9548_chan = 0x3418, + .i2c_slave = 0x341c, + .i2c_reg = 0x3420, + .i2c_reg_len = 0x3430, + .i2c_data_len = 0x3434, + .i2c_ctrl = 0x3438, + .i2c_status = 0x343c, + .i2c_data_buf = 0x3480, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000100, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data9 = { + .adap_nr = 18, + .i2c_timeout = 3000, + .i2c_scale = 0x3500, + .i2c_filter = 0x3504, + .i2c_stretch = 0x3508, + .i2c_ext_9548_exits_flag = 0x350c, + .i2c_ext_9548_addr = 0x3510, + .i2c_ext_9548_chan = 0x3514, + .i2c_in_9548_chan = 0x3518, + .i2c_slave = 0x351c, + .i2c_reg = 0x3520, + .i2c_reg_len = 0x3530, + .i2c_data_len = 0x3534, + .i2c_ctrl = 0x3538, + .i2c_status = 0x353c, + .i2c_data_buf = 0x3580, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000200, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data10 = { + .adap_nr = 19, + .i2c_timeout = 3000, + .i2c_scale = 0x3600, + .i2c_filter = 0x3604, + .i2c_stretch = 0x3608, + .i2c_ext_9548_exits_flag = 0x360c, + .i2c_ext_9548_addr = 0x3610, + .i2c_ext_9548_chan = 0x3614, + .i2c_in_9548_chan = 0x3618, + .i2c_slave = 0x361c, + .i2c_reg = 0x3620, + .i2c_reg_len = 0x3630, + .i2c_data_len = 0x3634, + .i2c_ctrl = 0x3638, + .i2c_status = 0x363c, + .i2c_data_buf = 0x3680, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000400, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data11 = { + .adap_nr = 20, + .i2c_timeout = 3000, + .i2c_scale = 0x3700, + .i2c_filter = 0x3704, + .i2c_stretch = 0x3708, + .i2c_ext_9548_exits_flag = 0x370c, + .i2c_ext_9548_addr = 0x3710, + .i2c_ext_9548_chan = 0x3714, + .i2c_in_9548_chan = 0x3718, + .i2c_slave = 0x371c, + .i2c_reg = 0x3720, + .i2c_reg_len = 0x3730, + .i2c_data_len = 0x3734, + .i2c_ctrl = 0x3738, + .i2c_status = 0x373c, + .i2c_data_buf = 0x3780, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000800, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data12 = { + .adap_nr = 21, + .i2c_timeout = 3000, + .i2c_scale = 0x3800, + .i2c_filter = 0x3804, + .i2c_stretch = 0x3808, + .i2c_ext_9548_exits_flag = 0x380c, + .i2c_ext_9548_addr = 0x3810, + .i2c_ext_9548_chan = 0x3814, + .i2c_in_9548_chan = 0x3818, + .i2c_slave = 0x381c, + .i2c_reg = 0x3820, + .i2c_reg_len = 0x3830, + .i2c_data_len = 0x3834, + .i2c_ctrl = 0x3838, + .i2c_status = 0x383c, + .i2c_data_buf = 0x3880, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00001000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data13 = { + .adap_nr = 22, + .i2c_timeout = 3000, + .i2c_scale = 0x3900, + .i2c_filter = 0x3904, + .i2c_stretch = 0x3908, + .i2c_ext_9548_exits_flag = 0x390c, + .i2c_ext_9548_addr = 0x3910, + .i2c_ext_9548_chan = 0x3914, + .i2c_in_9548_chan = 0x3918, + .i2c_slave = 0x391c, + .i2c_reg = 0x3920, + .i2c_reg_len = 0x3930, + .i2c_data_len = 0x3934, + .i2c_ctrl = 0x3938, + .i2c_status = 0x393c, + .i2c_data_buf = 0x3980, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00002000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data14 = { + .adap_nr = 23, + .i2c_timeout = 3000, + .i2c_scale = 0x3a00, + .i2c_filter = 0x3a04, + .i2c_stretch = 0x3a08, + .i2c_ext_9548_exits_flag = 0x3a0c, + .i2c_ext_9548_addr = 0x3a10, + .i2c_ext_9548_chan = 0x3a14, + .i2c_in_9548_chan = 0x3a18, + .i2c_slave = 0x3a1c, + .i2c_reg = 0x3a20, + .i2c_reg_len = 0x3a30, + .i2c_data_len = 0x3a34, + .i2c_ctrl = 0x3a38, + .i2c_status = 0x3a3c, + .i2c_data_buf = 0x3a80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00004000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data15 = { + .adap_nr = 24, + .i2c_timeout = 3000, + .i2c_scale = 0x3b00, + .i2c_filter = 0x3b04, + .i2c_stretch = 0x3b08, + .i2c_ext_9548_exits_flag = 0x3b0c, + .i2c_ext_9548_addr = 0x3b10, + .i2c_ext_9548_chan = 0x3b14, + .i2c_in_9548_chan = 0x3b18, + .i2c_slave = 0x3b1c, + .i2c_reg = 0x3b20, + .i2c_reg_len = 0x3b30, + .i2c_data_len = 0x3b34, + .i2c_ctrl = 0x3b38, + .i2c_status = 0x3b3c, + .i2c_data_buf = 0x3b80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00008000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_mac_dom_device_data16 = { + .adap_nr = 25, + .i2c_timeout = 3000, + .i2c_scale = 0x3c00, + .i2c_filter = 0x3c04, + .i2c_stretch = 0x3c08, + .i2c_ext_9548_exits_flag = 0x3c0c, + .i2c_ext_9548_addr = 0x3c10, + .i2c_ext_9548_chan = 0x3c14, + .i2c_in_9548_chan = 0x3c18, + .i2c_slave = 0x3c1c, + .i2c_reg = 0x3c20, + .i2c_reg_len = 0x3c30, + .i2c_data_len = 0x3c34, + .i2c_ctrl = 0x3c38, + .i2c_status = 0x3c3c, + .i2c_data_buf = 0x3c80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00010000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + + +static void wb_fpga_i2c_bus_device_release(struct device *dev) +{ + return; +} + +static struct platform_device fpga_i2c_bus_device[] = { + { + .name = "wb-fpga-i2c", + .id = 1, + .dev = { + .platform_data = &fpga_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 2, + .dev = { + .platform_data = &fpga_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 3, + .dev = { + .platform_data = &fpga_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 4, + .dev = { + .platform_data = &fpga_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 5, + .dev = { + .platform_data = &fpga_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 6, + .dev = { + .platform_data = &fpga_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 7, + .dev = { + .platform_data = &fpga_mac_dom_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 8, + .dev = { + .platform_data = &fpga_mac_dom_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 9, + .dev = { + .platform_data = &fpga_mac_dom_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 10, + .dev = { + .platform_data = &fpga_mac_dom_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 11, + .dev = { + .platform_data = &fpga_mac_dom_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 12, + .dev = { + .platform_data = &fpga_mac_dom_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 13, + .dev = { + .platform_data = &fpga_mac_dom_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 14, + .dev = { + .platform_data = &fpga_mac_dom_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 15, + .dev = { + .platform_data = &fpga_mac_dom_device_data8, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 16, + .dev = { + .platform_data = &fpga_mac_dom_device_data9, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 17, + .dev = { + .platform_data = &fpga_mac_dom_device_data10, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 18, + .dev = { + .platform_data = &fpga_mac_dom_device_data11, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 19, + .dev = { + .platform_data = &fpga_mac_dom_device_data12, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 20, + .dev = { + .platform_data = &fpga_mac_dom_device_data13, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 21, + .dev = { + .platform_data = &fpga_mac_dom_device_data14, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 22, + .dev = { + .platform_data = &fpga_mac_dom_device_data15, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 23, + .dev = { + .platform_data = &fpga_mac_dom_device_data16, + .release = wb_fpga_i2c_bus_device_release, + }, + }, +}; + +static int __init wb_fpga_i2c_bus_device_init(void) +{ + int i; + int ret = 0; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + ret = platform_device_register(&fpga_i2c_bus_device[i]); + if (ret < 0) { + fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-fpga-i2c.%d register failed!\n", i + 1); + } else { + fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_fpga_i2c_bus_device_exit(void) +{ + int i; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&fpga_i2c_bus_device[i]); + } + } +} + +module_init(wb_fpga_i2c_bus_device_init); +module_exit(wb_fpga_i2c_bus_device_exit); +MODULE_DESCRIPTION("FPGA I2C Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c new file mode 100644 index 00000000000..4e442d85440 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c @@ -0,0 +1,413 @@ +/* + * An wb_fpga_pca954x_device driver for fpga pca954x device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_fpga_pca954x_device_debug = 0; +static int g_wb_fpga_pca954x_device_error = 0; + +module_param(g_wb_fpga_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_fpga_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_fpga_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_FPGA_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_FPGA_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_fpga_pca954x_device_error) { \ + printk(KERN_ERR "[WB_FPGA_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + + +static fpga_pca954x_device_t fpga_pca954x_device_data1 = { + .i2c_bus = 3, + .i2c_addr = 0x70, + .pca9548_base_nr = 26, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data2 = { + .i2c_bus = 4, + .i2c_addr = 0x70, + .pca9548_base_nr = 27, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data3 = { + .i2c_bus = 27, + .i2c_addr = 0x77, + .pca9548_base_nr = 39, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data4 = { + .i2c_bus =5, + .i2c_addr = 0x70, + .pca9548_base_nr = 28, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data5 = { + .i2c_bus = 28, + .i2c_addr = 0x71, + .pca9548_base_nr = 47, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data6 = { + .i2c_bus = 6, + .i2c_addr = 0x70, + .pca9548_base_nr = 29, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data7 = { + .i2c_bus = 29, + .i2c_addr = 0x77, + .pca9548_base_nr = 55, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data8 = { + .i2c_bus = 7, + .i2c_addr = 0x71, + .pca9548_base_nr = 30, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data9 = { + .i2c_bus = 8, + .i2c_addr = 0x70, + .pca9548_base_nr =38, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data10 = { + .i2c_bus = 9, + .i2c_addr = 0x70, + .pca9548_base_nr = 63, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data11 = { + .i2c_bus = 10, + .i2c_addr = 0x70, + .pca9548_base_nr = 65, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data12 = { + .i2c_bus = 11, + .i2c_addr = 0x70, + .pca9548_base_nr = 67, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data13 = { + .i2c_bus = 12, + .i2c_addr = 0x70, + .pca9548_base_nr = 69, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data14 = { + .i2c_bus = 13, + .i2c_addr = 0x70, + .pca9548_base_nr = 71, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data15 = { + .i2c_bus = 14, + .i2c_addr = 0x70, + .pca9548_base_nr = 73, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data16 = { + .i2c_bus = 15, + .i2c_addr = 0x70, + .pca9548_base_nr = 75, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data17 = { + .i2c_bus = 16, + .i2c_addr = 0x70, + .pca9548_base_nr = 77, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data18 = { + .i2c_bus = 17, + .i2c_addr = 0x70, + .pca9548_base_nr = 79, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data19 = { + .i2c_bus = 18, + .i2c_addr = 0x70, + .pca9548_base_nr = 81, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data20 = { + .i2c_bus = 19, + .i2c_addr = 0x70, + .pca9548_base_nr = 83, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data21 = { + .i2c_bus = 20, + .i2c_addr = 0x70, + .pca9548_base_nr = 85, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data22 = { + .i2c_bus = 21, + .i2c_addr = 0x70, + .pca9548_base_nr = 87, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data23 = { + .i2c_bus = 22, + .i2c_addr = 0x70, + .pca9548_base_nr = 89, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data24 = { + .i2c_bus = 23, + .i2c_addr = 0x70, + .pca9548_base_nr = 91, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data25 = { + .i2c_bus = 24, + .i2c_addr = 0x70, + .pca9548_base_nr = 93, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data26 = { + .i2c_bus = 25, + .i2c_addr = 0x70, + .pca9548_base_nr = 95, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +struct i2c_board_info fpga_pca954x_device_info[] = { + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data1, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data2, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data3, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data4, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data5, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data6, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data7, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data8, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data9, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data10, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data11, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data12, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data13, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data14, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data15, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data16, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data17, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data18, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data19, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data20, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data21, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data22, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data23, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data24, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data25, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data26, + }, +}; + +static int __init wb_fpga_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus); + if (adap == NULL) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]); + if (!client) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n", + fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus); + } else { + fpga_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_fpga_pca954x_device_exit(void) +{ + int i; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + if (fpga_pca954x_device_data->client) { + i2c_unregister_device(fpga_pca954x_device_data->client); + fpga_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_fpga_pca954x_device_init); +module_exit(wb_fpga_pca954x_device_exit); +MODULE_DESCRIPTION("FPGA PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c new file mode 100644 index 00000000000..9a3aef32977 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c @@ -0,0 +1,146 @@ +/* + * An wb_i2c_dev_device driver for i2c dev device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_dev_device_debug = 0; +static int g_wb_i2c_dev_device_error = 0; + +module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_dev_device_debug) { \ + printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_dev_device_error) { \ + printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_dev_device_t i2c_dev_device_data0 = { + .i2c_bus = 26, + .i2c_addr = 0x1d, + .i2c_name = "cpld2", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data1 = { + .i2c_bus = 26, + .i2c_addr = 0x2d, + .i2c_name = "cpld3", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data2 = { + .i2c_bus = 28, + .i2c_addr = 0x3d, + .i2c_name = "cpld4", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + + +struct i2c_board_info i2c_dev_device_info[] = { + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data0, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data1, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data2, + }, +}; + +static int __init wb_i2c_dev_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus); + if (adap == NULL) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); + if (!client) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", + i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); + } else { + i2c_dev_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_dev_device_exit(void) +{ + int i; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + if (i2c_dev_device_data->client) { + i2c_unregister_device(i2c_dev_device_data->client); + i2c_dev_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_dev_device_init); +module_exit(wb_i2c_dev_device_exit); +MODULE_DESCRIPTION("I2C DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_io_dev_device.c new file mode 100644 index 00000000000..76b86a2d47e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_io_dev_device.c @@ -0,0 +1,123 @@ +/* + * An wb_io_dev_device driver for io device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_io_dev_device_debug = 0; +static int g_wb_io_dev_device_error = 0; + +module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_io_dev_device_debug) { \ + printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_io_dev_device_error) { \ + printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static io_dev_device_t io_dev_device_data0 = { + .io_dev_name = "cpld0", + .io_base = 0x700, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static io_dev_device_t io_dev_device_data1 = { + .io_dev_name = "cpld1", + .io_base = 0x900, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static void wb_io_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device io_dev_device[] = { + { + .name = "wb-io-dev", + .id = 1, + .dev = { + .platform_data = &io_dev_device_data0, + .release = wb_io_dev_device_release, + }, + }, + { + .name = "wb-io-dev", + .id = 2, + .dev = { + .platform_data = &io_dev_device_data1, + .release = wb_io_dev_device_release, + }, + }, +}; + +static int __init wb_io_dev_device_init(void) +{ + int i; + int ret = 0; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + ret = platform_device_register(&io_dev_device[i]); + if (ret < 0) { + io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1); + } else { + io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_io_dev_device_exit(void) +{ + int i; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&io_dev_device[i]); + } + } +} + +module_init(wb_io_dev_device_init); +module_exit(wb_io_dev_device_exit); +MODULE_DESCRIPTION("IO DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_lpc_drv_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_lpc_drv_device.c new file mode 100644 index 00000000000..27dbd87d71b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_lpc_drv_device.c @@ -0,0 +1,150 @@ +/* + * An wb_lpc_drv_device driver for lpc device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_lpc_drv_device_debug = 0; +static int g_wb_lpc_drv_device_error = 0; + +module_param(g_wb_lpc_drv_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_lpc_drv_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_LPC_DRV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_lpc_drv_device_debug) { \ + printk(KERN_INFO "[WB_LPC_DRV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_LPC_DRV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_lpc_drv_device_error) { \ + printk(KERN_ERR "[WB_LPC_DRV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static lpc_drv_device_t lpc_drv_device_data_0 = { + .lpc_io_name = "wb_lpc", + .pci_domain = 0x0000, + .pci_bus = 0x00, + .pci_slot = 0x1f, + .pci_fn = 0, + .lpc_io_base = 0x700, + .lpc_io_size = 0x100, + .lpc_gen_dec = 0x84, +}; + +static lpc_drv_device_t lpc_drv_device_data_1 = { + .lpc_io_name = "wb_lpc", + .pci_domain = 0x0000, + .pci_bus = 0x00, + .pci_slot = 0x1f, + .pci_fn = 0, + .lpc_io_base = 0x900, + .lpc_io_size = 0x100, + .lpc_gen_dec = 0x88, +}; + +static lpc_drv_device_t lpc_drv_device_data_2 = { + .lpc_io_name = "wb_lpc", + .pci_domain = 0x0000, + .pci_bus = 0x00, + .pci_slot = 0x1f, + .pci_fn = 0, + .lpc_io_base = 0xb00, + .lpc_io_size = 0x100, + .lpc_gen_dec = 0x90, +}; + +static void wb_lpc_drv_device_release(struct device *dev) +{ + return; +} + +static struct platform_device lpc_drv_device[] = { + { + .name = "wb-lpc", + .id = 1, + .dev = { + .platform_data = &lpc_drv_device_data_0, + .release = wb_lpc_drv_device_release, + }, + }, + { + .name = "wb-lpc", + .id = 2, + .dev = { + .platform_data = &lpc_drv_device_data_1, + .release = wb_lpc_drv_device_release, + }, + }, + { + .name = "wb-lpc", + .id = 3, + .dev = { + .platform_data = &lpc_drv_device_data_2, + .release = wb_lpc_drv_device_release, + }, + }, +}; + +static int __init wb_lpc_drv_device_init(void) +{ + int i; + int ret = 0; + lpc_drv_device_t *lpc_drv_device_data; + + WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(lpc_drv_device); i++) { + lpc_drv_device_data = lpc_drv_device[i].dev.platform_data; + ret = platform_device_register(&lpc_drv_device[i]); + if (ret < 0) { + lpc_drv_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-lpc.%d register failed!\n", i + 1); + } else { + lpc_drv_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_lpc_drv_device_exit(void) +{ + int i; + lpc_drv_device_t *lpc_drv_device_data; + + WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(lpc_drv_device) - 1; i >= 0; i--) { + lpc_drv_device_data = lpc_drv_device[i].dev.platform_data; + if (lpc_drv_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&lpc_drv_device[i]); + } + } +} + +module_init(wb_lpc_drv_device_init); +module_exit(wb_lpc_drv_device_exit); +MODULE_DESCRIPTION("LPC DRV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_pcie_dev_device.c new file mode 100644 index 00000000000..4523c9f33c1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_pcie_dev_device.c @@ -0,0 +1,113 @@ +/* + * An wb_pcie_dev_device driver for pcie device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_pcie_dev_device_debug = 0; +static int g_wb_pcie_dev_device_error = 0; + +module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_pcie_dev_device_debug) { \ + printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_pcie_dev_device_error) { \ + printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static pci_dev_device_t pcie_dev_device_data0 = { + .pci_dev_name = "fpga0", + .pci_domain = 0x0000, + .pci_bus = 0x04, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, + .upg_ctrl_base = 0xa00, + .upg_flash_base = 0x2f0000, +}; + +static void wb_pcie_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device pcie_dev_device[] = { + { + .name = "wb-pci-dev", + .id = 1, + .dev = { + .platform_data = &pcie_dev_device_data0, + .release = wb_pcie_dev_device_release, + }, + }, +}; + +static int __init wb_pcie_dev_device_init(void) +{ + int i; + int ret = 0; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + ret = platform_device_register(&pcie_dev_device[i]); + if (ret < 0) { + pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1); + } else { + pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_pcie_dev_device_exit(void) +{ + int i; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&pcie_dev_device[i]); + } + } +} + +module_init(wb_pcie_dev_device_init); +module_exit(wb_pcie_dev_device_exit); +MODULE_DESCRIPTION("PCIE DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_wdt_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_wdt_device.c new file mode 100644 index 00000000000..e29610c906e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_wdt_device.c @@ -0,0 +1,155 @@ +/* + * An wb_wdt_device driver for watchdog device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_wdt_device_debug = 0; +static int g_wb_wdt_device_error = 0; + +module_param(g_wb_wdt_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_wdt_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_WDT_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_wdt_device_debug) { \ + printk(KERN_INFO "[WB_WDT_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_WDT_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_wdt_device_error) { \ + printk(KERN_ERR "[WB_WDT_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static wb_wdt_device_t wb_wdt_device_data_0 = { + .feed_wdt_type = 2, + .hw_margin = 180000, + .feed_time = 30000, + .config_dev_name = "/dev/cpld3", + .config_mode = 2, + .priv_func_mode = 4, + .enable_reg = 0xf2, + .enable_val = 0x1, + .disable_val = 0x0, + .enable_mask = 0x1, + .timeout_cfg_reg = 0xf3, + .hw_algo = "toggle", + .wdt_config_mode.logic_wdt = { + .feed_dev_name = "/dev/cpld3", + .feed_reg = 0xf2, + .active_val = 0x1, + .logic_func_mode = 0x1, + }, + .timer_accuracy = 6000, /* 6s */ + .sysfs_index = SYSFS_NO_CFG, +}; + +static wb_wdt_device_t wb_wdt_device_data_1 = { + .feed_wdt_type = 1, + .hw_margin = 90000, + .feed_time = 9000, + .config_dev_name = "/dev/cpld1", + .config_mode = 2, + .priv_func_mode = 3, + .enable_reg = 0x4f, + .enable_val = 0x1, + .disable_val = 0x0, + .enable_mask = 0x1, + .timeout_cfg_reg = 0x50, + .hw_algo = "level", + .wdt_config_mode.logic_wdt = { + .feed_dev_name = "/dev/cpld1", + .feed_reg = 0xac, + .active_val = 0x0, + .logic_func_mode = 0x3, + }, + .timer_accuracy = 1600, /* 1.6s */ + .sysfs_index = SYSFS_NO_CFG, +}; + +static void wb_wdt_device_release(struct device *dev) +{ + return; +} + +static struct platform_device wb_wdt_device[] = { + { + .name = "wb_wdt", + .id = 0, + .dev = { + .platform_data = &wb_wdt_device_data_0, + .release = wb_wdt_device_release, + }, + }, + { + .name = "wb_wdt", + .id = 1, + .dev = { + .platform_data = &wb_wdt_device_data_1, + .release = wb_wdt_device_release, + }, + }, +}; + +static int __init wb_wdt_device_init(void) +{ + int i; + int ret = 0; + wb_wdt_device_t *wb_wdt_device_data; + + WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(wb_wdt_device); i++) { + wb_wdt_device_data = wb_wdt_device[i].dev.platform_data; + ret = platform_device_register(&wb_wdt_device[i]); + if (ret < 0) { + wb_wdt_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "rg-wdt.%d register failed!\n", i + 1); + } else { + wb_wdt_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_wdt_device_exit(void) +{ + int i; + wb_wdt_device_t *wb_wdt_device_data; + + WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(wb_wdt_device) - 1; i >= 0; i--) { + wb_wdt_device_data = wb_wdt_device[i].dev.platform_data; + if (wb_wdt_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&wb_wdt_device[i]); + } + } +} + +module_init(wb_wdt_device_init); +module_exit(wb_wdt_device_exit); +MODULE_DESCRIPTION("WB WDT Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_CPLD.cfg new file mode 100644 index 00000000000..67412066e39 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_CPLD.cfg @@ -0,0 +1,35 @@ +# configuration item: I2C address of CPLD +# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id] +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +# bus: I2C bus number of CPLD +# addr: I2C address of CPLD +cpld_i2c_dev.bus_0_2=26 +cpld_i2c_dev.addr_0_2=0x1d +cpld_i2c_dev.bus_0_3=26 +cpld_i2c_dev.addr_0_3=0x2d +cpld_i2c_dev.bus_0_4=28 +cpld_i2c_dev.addr_0_4=0x3d + +# configuration item: LPC address of CPLD +# format: cpld_lpc_addr_[cpld_slot]_[cpld_id] +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +cpld_lpc_dev_0_0=0x700 +cpld_lpc_dev_0_1=0x900 + +# configuration item: CPLD access method, lpc or i2c +# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +mode_cpld_0_0=lpc +mode_cpld_0_1=lpc +mode_cpld_0_2=i2c +mode_cpld_0_3=i2c +mode_cpld_0_4=i2c + +# configuration item: the number of CPLD +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: CPLD main_dev is 4 +# minor_dev: CPLD minor_dev not exist +dev_num_4_0=12 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_FAN.cfg new file mode 100644 index 00000000000..7ac4aa4195a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_FAN.cfg @@ -0,0 +1,435 @@ +# configuration item: the number of fans +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: fan main_dev is 1 +# minor_dev: fan minor_dev not exist(0) +dev_num_1_0=6 + +# configuration item: the number of rotors +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: rotor main_dev is 1 +# minor_dev: rotor minor_dev is 5 +dev_num_1_5=2 + +# configuration item: fan presence status +# format: dev_present_status_[main_dev_id][fan_index] +# main_dev_id: fan main_dev_id is 1 +# fan_index: start from 1 +dev_present_status.mode_1_1=config +dev_present_status.src_1_1=cpld +dev_present_status.frmt_1_1=bit +dev_present_status.pola_1_1=negative +dev_present_status.addr_1_1=0x00040037 +dev_present_status.len_1_1=1 +dev_present_status.bit_offset_1_1=5 + +dev_present_status.mode_1_2=config +dev_present_status.src_1_2=cpld +dev_present_status.frmt_1_2=bit +dev_present_status.pola_1_2=negative +dev_present_status.addr_1_2=0x00040037 +dev_present_status.len_1_2=1 +dev_present_status.bit_offset_1_2=4 + +dev_present_status.mode_1_3=config +dev_present_status.src_1_3=cpld +dev_present_status.frmt_1_3=bit +dev_present_status.pola_1_3=negative +dev_present_status.addr_1_3=0x00040037 +dev_present_status.len_1_3=1 +dev_present_status.bit_offset_1_3=3 + +dev_present_status.mode_1_4=config +dev_present_status.src_1_4=cpld +dev_present_status.frmt_1_4=bit +dev_present_status.pola_1_4=negative +dev_present_status.addr_1_4=0x00040037 +dev_present_status.len_1_4=1 +dev_present_status.bit_offset_1_4=2 + +dev_present_status.mode_1_5=config +dev_present_status.src_1_5=cpld +dev_present_status.frmt_1_5=bit +dev_present_status.pola_1_5=negative +dev_present_status.addr_1_5=0x00040037 +dev_present_status.len_1_5=1 +dev_present_status.bit_offset_1_5=1 + +dev_present_status.mode_1_6=config +dev_present_status.src_1_6=cpld +dev_present_status.frmt_1_6=bit +dev_present_status.pola_1_6=negative +dev_present_status.addr_1_6=0x00040037 +dev_present_status.len_1_6=1 +dev_present_status.bit_offset_1_6=0 + +# configuration item: fan pwm +# format: fan_ratio_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_ratio.mode_1_0=config +fan_ratio.int_cons_1_0= +fan_ratio.src_1_0=cpld +fan_ratio.frmt_1_0=byte +fan_ratio.pola_1_0= +fan_ratio.fpath_1_0= +fan_ratio.addr_1_0=0x00040065 +fan_ratio.len_1_0=1 +fan_ratio.bit_offset_1_0= + +fan_ratio.mode_1_1=config +fan_ratio.int_cons_1_1= +fan_ratio.src_1_1=cpld +fan_ratio.frmt_1_1=byte +fan_ratio.pola_1_1= +fan_ratio.fpath_1_1= +fan_ratio.addr_1_1=0x00040065 +fan_ratio.len_1_1=1 +fan_ratio.bit_offset_1_1= + +fan_ratio.mode_2_0=config +fan_ratio.int_cons_2_0= +fan_ratio.src_2_0=cpld +fan_ratio.frmt_2_0=byte +fan_ratio.pola_2_0= +fan_ratio.fpath_2_0= +fan_ratio.addr_2_0=0x00040064 +fan_ratio.len_2_0=1 +fan_ratio.bit_offset_2_0= + +fan_ratio.mode_2_1=config +fan_ratio.int_cons_2_1= +fan_ratio.src_2_1=cpld +fan_ratio.frmt_2_1=byte +fan_ratio.pola_2_1= +fan_ratio.fpath_2_1= +fan_ratio.addr_2_1=0x00040064 +fan_ratio.len_2_1=1 +fan_ratio.bit_offset_2_1= + +fan_ratio.mode_3_0=config +fan_ratio.int_cons_3_0= +fan_ratio.src_3_0=cpld +fan_ratio.frmt_3_0=byte +fan_ratio.pola_3_0= +fan_ratio.fpath_3_0= +fan_ratio.addr_3_0=0x00040063 +fan_ratio.len_3_0=1 +fan_ratio.bit_offset_3_0= + +fan_ratio.mode_3_1=config +fan_ratio.int_cons_3_1= +fan_ratio.src_3_1=cpld +fan_ratio.frmt_3_1=byte +fan_ratio.pola_3_1= +fan_ratio.fpath_3_1= +fan_ratio.addr_3_1=0x00040063 +fan_ratio.len_3_1=1 +fan_ratio.bit_offset_3_1= + +fan_ratio.mode_4_0=config +fan_ratio.int_cons_4_0= +fan_ratio.src_4_0=cpld +fan_ratio.frmt_4_0=byte +fan_ratio.pola_4_0= +fan_ratio.fpath_4_0= +fan_ratio.addr_4_0=0x00040062 +fan_ratio.len_4_0=1 +fan_ratio.bit_offset_4_0= + +fan_ratio.mode_4_1=config +fan_ratio.int_cons_4_1= +fan_ratio.src_4_1=cpld +fan_ratio.frmt_4_1=byte +fan_ratio.pola_4_1= +fan_ratio.fpath_4_1= +fan_ratio.addr_4_1=0x00040062 +fan_ratio.len_4_1=1 +fan_ratio.bit_offset_4_1= + +fan_ratio.mode_5_0=config +fan_ratio.int_cons_5_0= +fan_ratio.src_5_0=cpld +fan_ratio.frmt_5_0=byte +fan_ratio.pola_5_0= +fan_ratio.fpath_5_0= +fan_ratio.addr_5_0=0x00040061 +fan_ratio.len_5_0=1 +fan_ratio.bit_offset_5_0= + +fan_ratio.mode_5_1=config +fan_ratio.int_cons_5_1= +fan_ratio.src_5_1=cpld +fan_ratio.frmt_5_1=byte +fan_ratio.pola_5_1= +fan_ratio.fpath_5_1= +fan_ratio.addr_5_1=0x00040061 +fan_ratio.len_5_1=1 +fan_ratio.bit_offset_5_1= + +fan_ratio.mode_6_0=config +fan_ratio.int_cons_6_0= +fan_ratio.src_6_0=cpld +fan_ratio.frmt_6_0=byte +fan_ratio.pola_6_0= +fan_ratio.fpath_6_0= +fan_ratio.addr_6_0=0x00040060 +fan_ratio.len_6_0=1 +fan_ratio.bit_offset_6_0= + +fan_ratio.mode_6_1=config +fan_ratio.int_cons_6_1= +fan_ratio.src_6_1=cpld +fan_ratio.frmt_6_1=byte +fan_ratio.pola_6_1= +fan_ratio.fpath_6_1= +fan_ratio.addr_6_1=0x00040060 +fan_ratio.len_6_1=1 +fan_ratio.bit_offset_6_1= + +# configuration item: fan rotor status +# format: fan_roll_status_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_roll_status.mode_1_0=config +fan_roll_status.int_cons_1_0= +fan_roll_status.src_1_0=cpld +fan_roll_status.frmt_1_0=bit +fan_roll_status.pola_1_0=positive +fan_roll_status.fpath_1_0= +fan_roll_status.addr_1_0=0x00040038 +fan_roll_status.len_1_0=1 +fan_roll_status.bit_offset_1_0=5 + +fan_roll_status.mode_1_1=config +fan_roll_status.int_cons_1_1= +fan_roll_status.src_1_1=cpld +fan_roll_status.frmt_1_1=bit +fan_roll_status.pola_1_1=positive +fan_roll_status.fpath_1_1= +fan_roll_status.addr_1_1=0x00040039 +fan_roll_status.len_1_1=1 +fan_roll_status.bit_offset_1_1=5 + +fan_roll_status.mode_2_0=config +fan_roll_status.int_cons_2_0= +fan_roll_status.src_2_0=cpld +fan_roll_status.frmt_2_0=bit +fan_roll_status.pola_2_0=positive +fan_roll_status.fpath_2_0= +fan_roll_status.addr_2_0=0x00040038 +fan_roll_status.len_2_0=1 +fan_roll_status.bit_offset_2_0=4 + +fan_roll_status.mode_2_1=config +fan_roll_status.int_cons_2_1= +fan_roll_status.src_2_1=cpld +fan_roll_status.frmt_2_1=bit +fan_roll_status.pola_2_1=positive +fan_roll_status.fpath_2_1= +fan_roll_status.addr_2_1=0x00040039 +fan_roll_status.len_2_1=1 +fan_roll_status.bit_offset_2_1=4 + +fan_roll_status.mode_3_0=config +fan_roll_status.int_cons_3_0= +fan_roll_status.src_3_0=cpld +fan_roll_status.frmt_3_0=bit +fan_roll_status.pola_3_0=positive +fan_roll_status.fpath_3_0= +fan_roll_status.addr_3_0=0x00040038 +fan_roll_status.len_3_0=1 +fan_roll_status.bit_offset_3_0=3 + +fan_roll_status.mode_3_1=config +fan_roll_status.int_cons_3_1= +fan_roll_status.src_3_1=cpld +fan_roll_status.frmt_3_1=bit +fan_roll_status.pola_3_1=positive +fan_roll_status.fpath_3_1= +fan_roll_status.addr_3_1=0x00040039 +fan_roll_status.len_3_1=1 +fan_roll_status.bit_offset_3_1=3 + +fan_roll_status.mode_4_0=config +fan_roll_status.int_cons_4_0= +fan_roll_status.src_4_0=cpld +fan_roll_status.frmt_4_0=bit +fan_roll_status.pola_4_0=positive +fan_roll_status.fpath_4_0= +fan_roll_status.addr_4_0=0x00040038 +fan_roll_status.len_4_0=1 +fan_roll_status.bit_offset_4_0=2 + +fan_roll_status.mode_4_1=config +fan_roll_status.int_cons_4_1= +fan_roll_status.src_4_1=cpld +fan_roll_status.frmt_4_1=bit +fan_roll_status.pola_4_1=positive +fan_roll_status.fpath_4_1= +fan_roll_status.addr_4_1=0x00040039 +fan_roll_status.len_4_1=1 +fan_roll_status.bit_offset_4_1=2 + +fan_roll_status.mode_5_0=config +fan_roll_status.int_cons_5_0= +fan_roll_status.src_5_0=cpld +fan_roll_status.frmt_5_0=bit +fan_roll_status.pola_5_0=positive +fan_roll_status.fpath_5_0= +fan_roll_status.addr_5_0=0x00040038 +fan_roll_status.len_5_0=1 +fan_roll_status.bit_offset_5_0=1 + +fan_roll_status.mode_5_1=config +fan_roll_status.int_cons_5_1= +fan_roll_status.src_5_1=cpld +fan_roll_status.frmt_5_1=bit +fan_roll_status.pola_5_1=positive +fan_roll_status.fpath_5_1= +fan_roll_status.addr_5_1=0x00040039 +fan_roll_status.len_5_1=1 +fan_roll_status.bit_offset_5_1=1 + +fan_roll_status.mode_6_0=config +fan_roll_status.int_cons_6_0= +fan_roll_status.src_6_0=cpld +fan_roll_status.frmt_6_0=bit +fan_roll_status.pola_6_0=positive +fan_roll_status.fpath_6_0= +fan_roll_status.addr_6_0=0x00040038 +fan_roll_status.len_6_0=1 +fan_roll_status.bit_offset_6_0=0 + +fan_roll_status.mode_6_1=config +fan_roll_status.int_cons_6_1= +fan_roll_status.src_6_1=cpld +fan_roll_status.frmt_6_1=bit +fan_roll_status.pola_6_1=positive +fan_roll_status.fpath_6_1= +fan_roll_status.addr_6_1=0x00040039 +fan_roll_status.len_6_1=1 +fan_roll_status.bit_offset_6_1=0 + +# configuration item: fan speed +# format: fan_speed_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_speed.mode_1_0=config +fan_speed.int_cons_1_0= +fan_speed.src_1_0=cpld +fan_speed.frmt_1_0=num_bytes +fan_speed.pola_1_0=negative +fan_speed.fpath_1_0= +fan_speed.addr_1_0=0x00040070 +fan_speed.len_1_0=2 +fan_speed.bit_offset_1_0= + +fan_speed.mode_1_1=config +fan_speed.int_cons_1_1= +fan_speed.src_1_1=cpld +fan_speed.frmt_1_1=num_bytes +fan_speed.pola_1_1=negative +fan_speed.fpath_1_1= +fan_speed.addr_1_1=0x0004007c +fan_speed.len_1_1=2 +fan_speed.bit_offset_1_1= + +fan_speed.mode_2_0=config +fan_speed.int_cons_2_0= +fan_speed.src_2_0=cpld +fan_speed.frmt_2_0=num_bytes +fan_speed.pola_2_0=negative +fan_speed.fpath_2_0= +fan_speed.addr_2_0=0x0004006e +fan_speed.len_2_0=2 +fan_speed.bit_offset_2_0= + +fan_speed.mode_2_1=config +fan_speed.int_cons_2_1= +fan_speed.src_2_1=cpld +fan_speed.frmt_2_1=num_bytes +fan_speed.pola_2_1=negative +fan_speed.fpath_2_1= +fan_speed.addr_2_1=0x0004007a +fan_speed.len_2_1=2 +fan_speed.bit_offset_2_1= + +fan_speed.mode_3_0=config +fan_speed.int_cons_3_0= +fan_speed.src_3_0=cpld +fan_speed.frmt_3_0=num_bytes +fan_speed.pola_3_0=negative +fan_speed.fpath_3_0= +fan_speed.addr_3_0=0x0004006c +fan_speed.len_3_0=2 +fan_speed.bit_offset_3_0= + +fan_speed.mode_3_1=config +fan_speed.int_cons_3_1= +fan_speed.src_3_1=cpld +fan_speed.frmt_3_1=num_bytes +fan_speed.pola_3_1=negative +fan_speed.fpath_3_1= +fan_speed.addr_3_1=0x00040078 +fan_speed.len_3_1=2 +fan_speed.bit_offset_3_1= + +fan_speed.mode_4_0=config +fan_speed.int_cons_4_0= +fan_speed.src_4_0=cpld +fan_speed.frmt_4_0=num_bytes +fan_speed.pola_4_0=negative +fan_speed.fpath_4_0= +fan_speed.addr_4_0=0x0004006a +fan_speed.len_4_0=2 +fan_speed.bit_offset_4_0= + +fan_speed.mode_4_1=config +fan_speed.int_cons_4_1= +fan_speed.src_4_1=cpld +fan_speed.frmt_4_1=num_bytes +fan_speed.pola_4_1=negative +fan_speed.fpath_4_1= +fan_speed.addr_4_1=0x00040076 +fan_speed.len_4_1=2 +fan_speed.bit_offset_4_1= + +fan_speed.mode_5_0=config +fan_speed.int_cons_5_0= +fan_speed.src_5_0=cpld +fan_speed.frmt_5_0=num_bytes +fan_speed.pola_5_0=negative +fan_speed.fpath_5_0= +fan_speed.addr_5_0=0x00040068 +fan_speed.len_5_0=2 +fan_speed.bit_offset_5_0= + +fan_speed.mode_5_1=config +fan_speed.int_cons_5_1= +fan_speed.src_5_1=cpld +fan_speed.frmt_5_1=num_bytes +fan_speed.pola_5_1=negative +fan_speed.fpath_5_1= +fan_speed.addr_5_1=0x00040074 +fan_speed.len_5_1=2 +fan_speed.bit_offset_5_1= + +fan_speed.mode_6_0=config +fan_speed.int_cons_6_0= +fan_speed.src_6_0=cpld +fan_speed.frmt_6_0=num_bytes +fan_speed.pola_6_0=negative +fan_speed.fpath_6_0= +fan_speed.addr_6_0=0x00040066 +fan_speed.len_6_0=2 +fan_speed.bit_offset_6_0= + +fan_speed.mode_6_1=config +fan_speed.int_cons_6_1= +fan_speed.src_6_1=cpld +fan_speed.frmt_6_1=num_bytes +fan_speed.pola_6_1=negative +fan_speed.fpath_6_1= +fan_speed.addr_6_1=0x00040072 +fan_speed.len_6_1=2 +fan_speed.bit_offset_6_1= diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_PSU.cfg new file mode 100644 index 00000000000..1ba326d51d7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_PSU.cfg @@ -0,0 +1,63 @@ +# configuration item: the number of psus +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: psu main_dev is 2 +# minor_dev: psu minor_dev not exist(0) +dev_num_2_0=2 + +# configuration item: psu status +# format: psu_status_[psu_index]_[status_id] +# psu_index: start from 1 +# status_id: 0: presence 1: output 2: alert +# psu1 presence status +psu_status.mode_1_0=config +psu_status.src_1_0=cpld +psu_status.frmt_1_0=bit +psu_status.pola_1_0=negative +psu_status.addr_1_0=0x00020034 +psu_status.len_1_0=1 +psu_status.bit_offset_1_0=4 + +# psu1 output status +psu_status.mode_1_1=config +psu_status.src_1_1=cpld +psu_status.frmt_1_1=bit +psu_status.pola_1_1=positive +psu_status.addr_1_1=0x00020034 +psu_status.len_1_1=1 +psu_status.bit_offset_1_1=5 + +# psu1 alert status +psu_status.mode_1_2=config +psu_status.src_1_2=cpld +psu_status.frmt_1_2=bit +psu_status.pola_1_2=negative +psu_status.addr_1_2=0x00020034 +psu_status.len_1_2=1 +psu_status.bit_offset_1_2=6 + +# psu2 presence status +psu_status.mode_2_0=config +psu_status.src_2_0=cpld +psu_status.frmt_2_0=bit +psu_status.pola_2_0=negative +psu_status.addr_2_0=0x00020034 +psu_status.len_2_0=1 +psu_status.bit_offset_2_0=0 + +# psu2 output status +psu_status.mode_2_1=config +psu_status.src_2_1=cpld +psu_status.frmt_2_1=bit +psu_status.pola_2_1=positive +psu_status.addr_2_1=0x00020034 +psu_status.len_2_1=1 +psu_status.bit_offset_2_1=1 + +# psu2 alert status +psu_status.mode_2_2=config +psu_status.src_2_2=cpld +psu_status.frmt_2_2=bit +psu_status.pola_2_2=negative +psu_status.addr_2_2=0x00020034 +psu_status.len_2_2=1 +psu_status.bit_offset_2_2=2 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SENSOR.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SENSOR.cfg new file mode 100644 index 00000000000..07d9fdf6948 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SENSOR.cfg @@ -0,0 +1,295 @@ + +# Number of temperature sensors on the mainboard +dev_num_0_1=0 + +# Number of voltage sensors on the mainboard +dev_num_0_2=12 + + +# in1 MAC_QSFPDD_VDD3.3V_A +hwmon_in.mode_0x0001_0x00=config +hwmon_in.int_cons_0x0001_0x00=0 +hwmon_in.src_0x0001_0x00=cpld +hwmon_in.frmt_0x0001_0x00=num_bytes +hwmon_in.pola_0x0001_0x00=negative +hwmon_in.addr_0x0001_0x00=0x00020060 +hwmon_in.len_0x0001_0x00=2 +hwmon_in.int_extra1_0x0001_0x00=0x00020060 +hwmon_in.int_extra2_0x0001_0x00=2000 +hwmon_in.int_extra3_0x0001_0x00=1 + +hwmon_in.mode_0x0001_0x01=str_constant +hwmon_in.str_cons_0x0001_0x01=MAC_QSFPDD_VDD3.3V_A + +hwmon_in.mode_0x0001_0x02=str_constant +hwmon_in.str_cons_0x0001_0x02=cpld + +hwmon_in.mode_0x0001_0x03=str_constant +hwmon_in.str_cons_0x0001_0x03=3560 + +hwmon_in.mode_0x0001_0x05=str_constant +hwmon_in.str_cons_0x0001_0x05=3040 + +# in2 MAC_QSFPDD_VDD3.3V_B +hwmon_in.mode_0x0002_0x00=config +hwmon_in.int_cons_0x0002_0x00=0 +hwmon_in.src_0x0002_0x00=cpld +hwmon_in.frmt_0x0002_0x00=num_bytes +hwmon_in.pola_0x0002_0x00=negative +hwmon_in.addr_0x0002_0x00=0x00020062 +hwmon_in.len_0x0002_0x00=2 +hwmon_in.int_extra1_0x0002_0x00=0x00020062 +hwmon_in.int_extra2_0x0002_0x00=2000 +hwmon_in.int_extra3_0x0002_0x00=1 + +hwmon_in.mode_0x0002_0x01=str_constant +hwmon_in.str_cons_0x0002_0x01=MAC_QSFPDD_VDD3.3V_B + +hwmon_in.mode_0x0002_0x02=str_constant +hwmon_in.str_cons_0x0002_0x02=cpld + +hwmon_in.mode_0x0002_0x03=str_constant +hwmon_in.str_cons_0x0002_0x03=3560 + +hwmon_in.mode_0x0002_0x05=str_constant +hwmon_in.str_cons_0x0002_0x05=3040 + +# in3 MAC_VDD3.3_MON +hwmon_in.mode_0x0003_0x00=config +hwmon_in.int_cons_0x0003_0x00=0 +hwmon_in.src_0x0003_0x00=cpld +hwmon_in.frmt_0x0003_0x00=num_bytes +hwmon_in.pola_0x0003_0x00=negative +hwmon_in.addr_0x0003_0x00=0x00020066 +hwmon_in.len_0x0003_0x00=2 +hwmon_in.int_extra1_0x0003_0x00=0x00020066 +hwmon_in.int_extra2_0x0003_0x00=2000 +hwmon_in.int_extra3_0x0003_0x00=1 + +hwmon_in.mode_0x0003_0x01=str_constant +hwmon_in.str_cons_0x0003_0x01=MAC_VDD3.3_MON + +hwmon_in.mode_0x0003_0x02=str_constant +hwmon_in.str_cons_0x0003_0x02=cpld + +hwmon_in.mode_0x0003_0x03=str_constant +hwmon_in.str_cons_0x0003_0x03=3465 + +hwmon_in.mode_0x0003_0x05=str_constant +hwmon_in.str_cons_0x0003_0x05=3040 + +# in4 MAC_VDD3.7V_CLK +hwmon_in.mode_0x0004_0x00=config +hwmon_in.int_cons_0x0004_0x00=0 +hwmon_in.src_0x0004_0x00=cpld +hwmon_in.frmt_0x0004_0x00=num_bytes +hwmon_in.pola_0x0004_0x00=negative +hwmon_in.addr_0x0004_0x00=0x00020068 +hwmon_in.len_0x0004_0x00=2 +hwmon_in.int_extra1_0x0004_0x00=0x00020068 +hwmon_in.int_extra2_0x0004_0x00=2000 +hwmon_in.int_extra3_0x0004_0x00=1 + +hwmon_in.mode_0x0004_0x01=str_constant +hwmon_in.str_cons_0x0004_0x01=MAC_VDD3.7V_CLK + +hwmon_in.mode_0x0004_0x02=str_constant +hwmon_in.str_cons_0x0004_0x02=cpld + +hwmon_in.mode_0x0004_0x03=str_constant +hwmon_in.str_cons_0x0004_0x03=4000 + +hwmon_in.mode_0x0004_0x05=str_constant +hwmon_in.str_cons_0x0004_0x05=3500 + +# in5 MAC_VDD5V_USB +hwmon_in.mode_0x0005_0x00=config +hwmon_in.int_cons_0x0005_0x00=0 +hwmon_in.src_0x0005_0x00=cpld +hwmon_in.frmt_0x0005_0x00=num_bytes +hwmon_in.pola_0x0005_0x00=negative +hwmon_in.addr_0x0005_0x00=0x0002006a +hwmon_in.len_0x0005_0x00=2 +hwmon_in.int_extra1_0x0005_0x00=0x0002006a +hwmon_in.int_extra2_0x0005_0x00=3000 +hwmon_in.int_extra3_0x0005_0x00=1 + +hwmon_in.mode_0x0005_0x01=str_constant +hwmon_in.str_cons_0x0005_0x01=MAC_VDD5V_USB + +hwmon_in.mode_0x0005_0x02=str_constant +hwmon_in.str_cons_0x0005_0x02=cpld + +hwmon_in.mode_0x0005_0x03=str_constant +hwmon_in.str_cons_0x0005_0x03=5500 + +hwmon_in.mode_0x0005_0x05=str_constant +hwmon_in.str_cons_0x0005_0x05=4500 + +# in6 FAN1_VDD12V +hwmon_in.mode_0x0006_0x00=config +hwmon_in.int_cons_0x0006_0x00=0 +hwmon_in.src_0x0006_0x00=cpld +hwmon_in.frmt_0x0006_0x00=num_bytes +hwmon_in.pola_0x0006_0x00=negative +hwmon_in.addr_0x0006_0x00=0x00040082 +hwmon_in.len_0x0006_0x00=2 +hwmon_in.int_extra1_0x0006_0x00=0x00040082 +hwmon_in.int_extra2_0x0006_0x00=6000 +hwmon_in.int_extra3_0x0006_0x00=1 + +hwmon_in.mode_0x0006_0x01=str_constant +hwmon_in.str_cons_0x0006_0x01=FAN1_VDD12V + +hwmon_in.mode_0x0006_0x02=str_constant +hwmon_in.str_cons_0x0006_0x02=cpld + +hwmon_in.mode_0x0006_0x03=str_constant +hwmon_in.str_cons_0x0006_0x03=12600 + +hwmon_in.mode_0x0006_0x05=str_constant +hwmon_in.str_cons_0x0006_0x05=11400 + +# in7 FAN2_VDD12V +hwmon_in.mode_0x0007_0x00=config +hwmon_in.int_cons_0x0007_0x00=0 +hwmon_in.src_0x0007_0x00=cpld +hwmon_in.frmt_0x0007_0x00=num_bytes +hwmon_in.pola_0x0007_0x00=negative +hwmon_in.addr_0x0007_0x00=0x00040080 +hwmon_in.len_0x0007_0x00=2 +hwmon_in.int_extra1_0x0007_0x00=0x00040080 +hwmon_in.int_extra2_0x0007_0x00=6000 +hwmon_in.int_extra3_0x0007_0x00=1 + +hwmon_in.mode_0x0007_0x01=str_constant +hwmon_in.str_cons_0x0007_0x01=FAN2_VDD12V + +hwmon_in.mode_0x0007_0x02=str_constant +hwmon_in.str_cons_0x0007_0x02=cpld + +hwmon_in.mode_0x0007_0x03=str_constant +hwmon_in.str_cons_0x0007_0x03=12600 + +hwmon_in.mode_0x0007_0x05=str_constant +hwmon_in.str_cons_0x0007_0x05=11400 + +# in8 FAN3_VDD12V +hwmon_in.mode_0x0008_0x00=config +hwmon_in.int_cons_0x0008_0x00=0 +hwmon_in.src_0x0008_0x00=cpld +hwmon_in.frmt_0x0008_0x00=num_bytes +hwmon_in.pola_0x0008_0x00=negative +hwmon_in.addr_0x0008_0x00=0x00040088 +hwmon_in.len_0x0008_0x00=2 +hwmon_in.int_extra1_0x0008_0x00=0x00040088 +hwmon_in.int_extra2_0x0008_0x00=6000 +hwmon_in.int_extra3_0x0008_0x00=1 + +hwmon_in.mode_0x0008_0x01=str_constant +hwmon_in.str_cons_0x0008_0x01=FAN3_VDD12V + +hwmon_in.mode_0x0008_0x02=str_constant +hwmon_in.str_cons_0x0008_0x02=cpld + +hwmon_in.mode_0x0008_0x03=str_constant +hwmon_in.str_cons_0x0008_0x03=12600 + +hwmon_in.mode_0x0008_0x05=str_constant +hwmon_in.str_cons_0x0008_0x05=11400 + +# in9 FAN4_VDD12V +hwmon_in.mode_0x0009_0x00=config +hwmon_in.int_cons_0x0009_0x00=0 +hwmon_in.src_0x0009_0x00=cpld +hwmon_in.frmt_0x0009_0x00=num_bytes +hwmon_in.pola_0x0009_0x00=negative +hwmon_in.addr_0x0009_0x00=0x0004008a +hwmon_in.len_0x0009_0x00=2 +hwmon_in.int_extra1_0x0009_0x00=0x0004008a +hwmon_in.int_extra2_0x0009_0x00=6000 +hwmon_in.int_extra3_0x0009_0x00=1 + +hwmon_in.mode_0x0009_0x01=str_constant +hwmon_in.str_cons_0x0009_0x01=FAN4_VDD12V + +hwmon_in.mode_0x0009_0x02=str_constant +hwmon_in.str_cons_0x0009_0x02=cpld + +hwmon_in.mode_0x0009_0x03=str_constant +hwmon_in.str_cons_0x0009_0x03=12600 + +hwmon_in.mode_0x0009_0x05=str_constant +hwmon_in.str_cons_0x0009_0x05=11400 + +# in10 FAN5_VDD12V +hwmon_in.mode_0x000a_0x00=config +hwmon_in.int_cons_0x000a_0x00=0 +hwmon_in.src_0x000a_0x00=cpld +hwmon_in.frmt_0x000a_0x00=num_bytes +hwmon_in.pola_0x000a_0x00=negative +hwmon_in.addr_0x000a_0x00=0x00040086 +hwmon_in.len_0x000a_0x00=2 +hwmon_in.int_extra1_0x000a_0x00=0x00040086 +hwmon_in.int_extra2_0x000a_0x00=6000 +hwmon_in.int_extra3_0x000a_0x00=1 + +hwmon_in.mode_0x000a_0x01=str_constant +hwmon_in.str_cons_0x000a_0x01=FAN5_VDD12V + +hwmon_in.mode_0x000a_0x02=str_constant +hwmon_in.str_cons_0x000a_0x02=cpld + +hwmon_in.mode_0x000a_0x03=str_constant +hwmon_in.str_cons_0x000a_0x03=12600 + +hwmon_in.mode_0x000a_0x05=str_constant +hwmon_in.str_cons_0x000a_0x05=11400 + +# in11 FAN6_VDD12V +hwmon_in.mode_0x000b_0x00=config +hwmon_in.int_cons_0x000b_0x00=0 +hwmon_in.src_0x000b_0x00=cpld +hwmon_in.frmt_0x000b_0x00=num_bytes +hwmon_in.pola_0x000b_0x00=negative +hwmon_in.addr_0x000b_0x00=0x0004008c +hwmon_in.len_0x000b_0x00=2 +hwmon_in.int_extra1_0x000b_0x00=0x0004008c +hwmon_in.int_extra2_0x000b_0x00=6000 +hwmon_in.int_extra3_0x000b_0x00=1 + +hwmon_in.mode_0x000b_0x01=str_constant +hwmon_in.str_cons_0x000b_0x01=FAN6_VDD12V + +hwmon_in.mode_0x000b_0x02=str_constant +hwmon_in.str_cons_0x000b_0x02=cpld + +hwmon_in.mode_0x000b_0x03=str_constant +hwmon_in.str_cons_0x000b_0x03=12600 + +hwmon_in.mode_0x000b_0x05=str_constant +hwmon_in.str_cons_0x000b_0x05=11400 + +# in12 FAN_VDD3.3V +hwmon_in.mode_0x000c_0x00=config +hwmon_in.int_cons_0x000c_0x00=0 +hwmon_in.src_0x000c_0x00=cpld +hwmon_in.frmt_0x000c_0x00=num_bytes +hwmon_in.pola_0x000c_0x00=negative +hwmon_in.addr_0x000c_0x00=0x00040084 +hwmon_in.len_0x000c_0x00=2 +hwmon_in.int_extra1_0x000c_0x00=0x00040084 +hwmon_in.int_extra2_0x000c_0x00=2000 +hwmon_in.int_extra3_0x000c_0x00=1 + +hwmon_in.mode_0x000c_0x01=str_constant +hwmon_in.str_cons_0x000c_0x01=FAN_VDD3.3V + +hwmon_in.mode_0x000c_0x02=str_constant +hwmon_in.str_cons_0x000c_0x02=cpld + +hwmon_in.mode_0x000c_0x03=str_constant +hwmon_in.str_cons_0x000c_0x03=3560 + +hwmon_in.mode_0x000c_0x05=str_constant +hwmon_in.str_cons_0x000c_0x05=3040 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SFF.cfg new file mode 100644 index 00000000000..4876a92c007 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SFF.cfg @@ -0,0 +1,323 @@ +# configuration item: the number of sffs +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: sff main_dev is 3 +# minor_dev: sff minor_dev not exist(0) +dev_num_3_0=34 + +# configuration item: The directory name of sff sysfs +# format: sff_dir_name_[sff_index] +# sff_index: start from 1 +sff_dir_name_1 =sff1 +sff_dir_name_2 =sff2 +sff_dir_name_3 =sff3 +sff_dir_name_4 =sff4 +sff_dir_name_5 =sff5 +sff_dir_name_6 =sff6 +sff_dir_name_7 =sff7 +sff_dir_name_8 =sff8 +sff_dir_name_9 =sff9 +sff_dir_name_10 =sff10 +sff_dir_name_11 =sff11 +sff_dir_name_12 =sff12 +sff_dir_name_13 =sff13 +sff_dir_name_14 =sff14 +sff_dir_name_15 =sff15 +sff_dir_name_16 =sff16 +sff_dir_name_17 =sff17 +sff_dir_name_18 =sff18 +sff_dir_name_19 =sff19 +sff_dir_name_20 =sff20 +sff_dir_name_21 =sff21 +sff_dir_name_22 =sff22 +sff_dir_name_23 =sff23 +sff_dir_name_24 =sff24 +sff_dir_name_25 =sff25 +sff_dir_name_26 =sff26 +sff_dir_name_27 =sff27 +sff_dir_name_28 =sff28 +sff_dir_name_29 =sff29 +sff_dir_name_30 =sff30 +sff_dir_name_31 =sff31 +sff_dir_name_32 =sff32 +sff_dir_name_33 =sff33 +sff_dir_name_34 =sff34 + +# configuration item: sff cpld register status +# format: sff_cpld_reg_[sff_index]_[cpld_reg] +# sff_index: start from 1 +# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los +# 6: reset, 7: lpmode, 8: module_present, 9: interrupt + +# sff cpld presence status +sff_cpld_reg.mode_1_8=config +sff_cpld_reg.src_1_8=cpld +sff_cpld_reg.frmt_1_8=bit +sff_cpld_reg.pola_1_8=negative +sff_cpld_reg.addr_1_8=0x0003004e +sff_cpld_reg.len_1_8=1 +sff_cpld_reg.bit_offset_1_8=2 + +sff_cpld_reg.mode_2_8=config +sff_cpld_reg.src_2_8=cpld +sff_cpld_reg.frmt_2_8=bit +sff_cpld_reg.pola_2_8=negative +sff_cpld_reg.addr_2_8=0x0003004e +sff_cpld_reg.len_2_8=1 +sff_cpld_reg.bit_offset_2_8=3 + +sff_cpld_reg.mode_3_8=config +sff_cpld_reg.src_3_8=cpld +sff_cpld_reg.frmt_3_8=bit +sff_cpld_reg.pola_3_8=negative +sff_cpld_reg.addr_3_8=0x0003004e +sff_cpld_reg.len_3_8=1 +sff_cpld_reg.bit_offset_3_8=0 + +sff_cpld_reg.mode_4_8=config +sff_cpld_reg.src_4_8=cpld +sff_cpld_reg.frmt_4_8=bit +sff_cpld_reg.pola_4_8=negative +sff_cpld_reg.addr_4_8=0x0003004e +sff_cpld_reg.len_4_8=1 +sff_cpld_reg.bit_offset_4_8=1 + +sff_cpld_reg.mode_5_8=config +sff_cpld_reg.src_5_8=cpld +sff_cpld_reg.frmt_5_8=bit +sff_cpld_reg.pola_5_8=negative +sff_cpld_reg.addr_5_8=0x0003004e +sff_cpld_reg.len_5_8=1 +sff_cpld_reg.bit_offset_5_8=4 + +sff_cpld_reg.mode_6_8=config +sff_cpld_reg.src_6_8=cpld +sff_cpld_reg.frmt_6_8=bit +sff_cpld_reg.pola_6_8=negative +sff_cpld_reg.addr_6_8=0x0003004e +sff_cpld_reg.len_6_8=1 +sff_cpld_reg.bit_offset_6_8=5 + +sff_cpld_reg.mode_7_8=config +sff_cpld_reg.src_7_8=cpld +sff_cpld_reg.frmt_7_8=bit +sff_cpld_reg.pola_7_8=negative +sff_cpld_reg.addr_7_8=0x0003004e +sff_cpld_reg.len_7_8=1 +sff_cpld_reg.bit_offset_7_8=6 + +sff_cpld_reg.mode_8_8=config +sff_cpld_reg.src_8_8=cpld +sff_cpld_reg.frmt_8_8=bit +sff_cpld_reg.pola_8_8=negative +sff_cpld_reg.addr_8_8=0x0003004e +sff_cpld_reg.len_8_8=1 +sff_cpld_reg.bit_offset_8_8=7 + +sff_cpld_reg.mode_9_8=config +sff_cpld_reg.src_9_8=cpld +sff_cpld_reg.frmt_9_8=bit +sff_cpld_reg.pola_9_8=negative +sff_cpld_reg.addr_9_8=0x0003004f +sff_cpld_reg.len_9_8=1 +sff_cpld_reg.bit_offset_9_8=0 + +sff_cpld_reg.mode_10_8=config +sff_cpld_reg.src_10_8=cpld +sff_cpld_reg.frmt_10_8=bit +sff_cpld_reg.pola_10_8=negative +sff_cpld_reg.addr_10_8=0x0003004f +sff_cpld_reg.len_10_8=1 +sff_cpld_reg.bit_offset_10_8=1 + +sff_cpld_reg.mode_11_8=config +sff_cpld_reg.src_11_8=cpld +sff_cpld_reg.frmt_11_8=bit +sff_cpld_reg.pola_11_8=negative +sff_cpld_reg.addr_11_8=0x0003004f +sff_cpld_reg.len_11_8=1 +sff_cpld_reg.bit_offset_11_8=2 + +sff_cpld_reg.mode_12_8=config +sff_cpld_reg.src_12_8=cpld +sff_cpld_reg.frmt_12_8=bit +sff_cpld_reg.pola_12_8=negative +sff_cpld_reg.addr_12_8=0x0003004f +sff_cpld_reg.len_12_8=1 +sff_cpld_reg.bit_offset_12_8=3 + +sff_cpld_reg.mode_13_8=config +sff_cpld_reg.src_13_8=cpld +sff_cpld_reg.frmt_13_8=bit +sff_cpld_reg.pola_13_8=negative +sff_cpld_reg.addr_13_8=0x0003004f +sff_cpld_reg.len_13_8=1 +sff_cpld_reg.bit_offset_13_8=4 + +sff_cpld_reg.mode_14_8=config +sff_cpld_reg.src_14_8=cpld +sff_cpld_reg.frmt_14_8=bit +sff_cpld_reg.pola_14_8=negative +sff_cpld_reg.addr_14_8=0x0003004f +sff_cpld_reg.len_14_8=1 +sff_cpld_reg.bit_offset_14_8=5 + +sff_cpld_reg.mode_15_8=config +sff_cpld_reg.src_15_8=cpld +sff_cpld_reg.frmt_15_8=bit +sff_cpld_reg.pola_15_8=negative +sff_cpld_reg.addr_15_8=0x0003004f +sff_cpld_reg.len_15_8=1 +sff_cpld_reg.bit_offset_15_8=6 + +sff_cpld_reg.mode_16_8=config +sff_cpld_reg.src_16_8=cpld +sff_cpld_reg.frmt_16_8=bit +sff_cpld_reg.pola_16_8=negative +sff_cpld_reg.addr_16_8=0x0003004f +sff_cpld_reg.len_16_8=1 +sff_cpld_reg.bit_offset_16_8=7 + +sff_cpld_reg.mode_17_8=config +sff_cpld_reg.src_17_8=cpld +sff_cpld_reg.frmt_17_8=bit +sff_cpld_reg.pola_17_8=negative +sff_cpld_reg.addr_17_8=0x00020032 +sff_cpld_reg.len_17_8=1 +sff_cpld_reg.bit_offset_17_8=0 + +sff_cpld_reg.mode_18_8=config +sff_cpld_reg.src_18_8=cpld +sff_cpld_reg.frmt_18_8=bit +sff_cpld_reg.pola_18_8=negative +sff_cpld_reg.addr_18_8=0x00020032 +sff_cpld_reg.len_18_8=1 +sff_cpld_reg.bit_offset_18_8=1 + +sff_cpld_reg.mode_19_8=config +sff_cpld_reg.src_19_8=cpld +sff_cpld_reg.frmt_19_8=bit +sff_cpld_reg.pola_19_8=negative +sff_cpld_reg.addr_19_8=0x00020032 +sff_cpld_reg.len_19_8=1 +sff_cpld_reg.bit_offset_19_8=2 + +sff_cpld_reg.mode_20_8=config +sff_cpld_reg.src_20_8=cpld +sff_cpld_reg.frmt_20_8=bit +sff_cpld_reg.pola_20_8=negative +sff_cpld_reg.addr_20_8=0x00020032 +sff_cpld_reg.len_20_8=1 +sff_cpld_reg.bit_offset_20_8=3 + +sff_cpld_reg.mode_21_8=config +sff_cpld_reg.src_21_8=cpld +sff_cpld_reg.frmt_21_8=bit +sff_cpld_reg.pola_21_8=negative +sff_cpld_reg.addr_21_8=0x00020032 +sff_cpld_reg.len_21_8=1 +sff_cpld_reg.bit_offset_21_8=4 + +sff_cpld_reg.mode_22_8=config +sff_cpld_reg.src_22_8=cpld +sff_cpld_reg.frmt_22_8=bit +sff_cpld_reg.pola_22_8=negative +sff_cpld_reg.addr_22_8=0x00020032 +sff_cpld_reg.len_22_8=1 +sff_cpld_reg.bit_offset_22_8=5 + +sff_cpld_reg.mode_23_8=config +sff_cpld_reg.src_23_8=cpld +sff_cpld_reg.frmt_23_8=bit +sff_cpld_reg.pola_23_8=negative +sff_cpld_reg.addr_23_8=0x00020032 +sff_cpld_reg.len_23_8=1 +sff_cpld_reg.bit_offset_23_8=6 + +sff_cpld_reg.mode_24_8=config +sff_cpld_reg.src_24_8=cpld +sff_cpld_reg.frmt_24_8=bit +sff_cpld_reg.pola_24_8=negative +sff_cpld_reg.addr_24_8=0x00020032 +sff_cpld_reg.len_24_8=1 +sff_cpld_reg.bit_offset_24_8=7 + +sff_cpld_reg.mode_25_8=config +sff_cpld_reg.src_25_8=cpld +sff_cpld_reg.frmt_25_8=bit +sff_cpld_reg.pola_25_8=negative +sff_cpld_reg.addr_25_8=0x00020033 +sff_cpld_reg.len_25_8=1 +sff_cpld_reg.bit_offset_25_8=0 + +sff_cpld_reg.mode_26_8=config +sff_cpld_reg.src_26_8=cpld +sff_cpld_reg.frmt_26_8=bit +sff_cpld_reg.pola_26_8=negative +sff_cpld_reg.addr_26_8=0x00020033 +sff_cpld_reg.len_26_8=1 +sff_cpld_reg.bit_offset_26_8=1 + +sff_cpld_reg.mode_27_8=config +sff_cpld_reg.src_27_8=cpld +sff_cpld_reg.frmt_27_8=bit +sff_cpld_reg.pola_27_8=negative +sff_cpld_reg.addr_27_8=0x00020033 +sff_cpld_reg.len_27_8=1 +sff_cpld_reg.bit_offset_27_8=2 + +sff_cpld_reg.mode_28_8=config +sff_cpld_reg.src_28_8=cpld +sff_cpld_reg.frmt_28_8=bit +sff_cpld_reg.pola_28_8=negative +sff_cpld_reg.addr_28_8=0x00020033 +sff_cpld_reg.len_28_8=1 +sff_cpld_reg.bit_offset_28_8=3 + +sff_cpld_reg.mode_29_8=config +sff_cpld_reg.src_29_8=cpld +sff_cpld_reg.frmt_29_8=bit +sff_cpld_reg.pola_29_8=negative +sff_cpld_reg.addr_29_8=0x00020033 +sff_cpld_reg.len_29_8=1 +sff_cpld_reg.bit_offset_29_8=6 + +sff_cpld_reg.mode_30_8=config +sff_cpld_reg.src_30_8=cpld +sff_cpld_reg.frmt_30_8=bit +sff_cpld_reg.pola_30_8=negative +sff_cpld_reg.addr_30_8=0x00020033 +sff_cpld_reg.len_30_8=1 +sff_cpld_reg.bit_offset_30_8=7 + +sff_cpld_reg.mode_31_8=config +sff_cpld_reg.src_31_8=cpld +sff_cpld_reg.frmt_31_8=bit +sff_cpld_reg.pola_31_8=negative +sff_cpld_reg.addr_31_8=0x00020033 +sff_cpld_reg.len_31_8=1 +sff_cpld_reg.bit_offset_31_8=4 + +sff_cpld_reg.mode_32_8=config +sff_cpld_reg.src_32_8=cpld +sff_cpld_reg.frmt_32_8=bit +sff_cpld_reg.pola_32_8=negative +sff_cpld_reg.addr_32_8=0x00020033 +sff_cpld_reg.len_32_8=1 +sff_cpld_reg.bit_offset_32_8=5 + +sff_cpld_reg.mode_33_8=config +sff_cpld_reg.src_33_8=cpld +sff_cpld_reg.frmt_33_8=bit +sff_cpld_reg.pola_33_8=negative +sff_cpld_reg.addr_33_8=0x00020046 +sff_cpld_reg.len_33_8=1 +sff_cpld_reg.bit_offset_33_8=1 + +sff_cpld_reg.mode_34_8=config +sff_cpld_reg.src_34_8=cpld +sff_cpld_reg.frmt_34_8=bit +sff_cpld_reg.pola_34_8=negative +sff_cpld_reg.addr_34_8=0x00020046 +sff_cpld_reg.len_34_8=1 +sff_cpld_reg.bit_offset_34_8=0 + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/cfg_file_name new file mode 100644 index 00000000000..c3ea65365c7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/cfg_file_name @@ -0,0 +1,5 @@ +WB_PLAT_CPLD +WB_PLAT_FAN +WB_PLAT_PSU +WB_PLAT_SFF +WB_PLAT_SENSOR diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/service/set-eth-mac.service b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/service/set-eth-mac.service new file mode 100644 index 00000000000..4b74632c21c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/service/set-eth-mac.service @@ -0,0 +1,14 @@ +[Unit] +Description=Set eth mac address +Before=interfaces-config.service +Requires=platform_driver.service +After=platform_driver.service +#DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/set_eth_mac.py +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/setup.py new file mode 100755 index 00000000000..6c3916921ab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/setup.py @@ -0,0 +1,39 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation', + license='Apache 2.0', + author='SONiC Team', + author_email='support', + url='', + maintainer='support', + maintainer_email='', + packages=[ + 'sonic_platform', + 'plat_hal', + 'wbutil', + 'eepromutil', + 'hal-config', + 'config', + ], + py_modules=[ + 'hal_pltfm', + 'platform_util', + 'platform_intf', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/Makefile new file mode 100644 index 00000000000..ffcf6320f6c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/Makefile @@ -0,0 +1,26 @@ +PWD = $(shell pwd) +DIR_KERNEL_SRC = $(PWD)/modules/driver +EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -Wall +SUB_BUILD_DIR = $(PWD)/build +INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages +INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg + +all: + $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules + @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi + cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR) + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi + @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi + @if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi + @if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi + @if [ ! -d ${INSTALL_UPGRADE_TEST_DIR} ]; then mkdir -p ${INSTALL_UPGRADE_TEST_DIR} ;fi +clean: + rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd + rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order + rm -rf ${DIR_KERNEL_SRC}/.tmp_versions + rm -rf $(SUB_BUILD_DIR) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_config.py new file mode 100755 index 00000000000..100f8603d98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_config.py @@ -0,0 +1,2036 @@ +#!/usr/bin/python3 +# -*- coding: UTF-8 -*- +from platform_common import * + +STARTMODULE = { + "fancontrol": 0, + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 0, + "tty_console": 1, + "dev_monitor": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "reboot_cause": 1, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + {"name": "psu1", + "present": {"gettype": "io", "io_addr": 0x964, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 83, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu1frue2", "name": "24c02", "bus": 83, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "psu2", + "present": {"gettype": "io", "io_addr": 0x964, "presentbit": 4, "okval": 0}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 84, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "24c02", "bus": 84, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "psu3", + "present": {"gettype": "io", "io_addr": 0x965, "presentbit": 4, "okval": 0}, + "device": [ + {"id": "psu3pmbus", "name": "wb_fsp1200", "bus": 86, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu3frue2", "name": "24c02", "bus": 86, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "psu4", + "present": {"gettype": "io", "io_addr": 0x965, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "psu4pmbus", "name": "wb_fsp1200", "bus": 85, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu4frue2", "name": "24c02", "bus": 85, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + {"name": "fan1", + "present": {"gettype": "i2c", "bus": 92, "loc": 0x0d, "offset": 0x30, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "24c64", "bus": 95, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "fan2", + "present": {"gettype": "i2c", "bus": 101, "loc": 0x0d, "offset": 0x30, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan5frue2", "name": "24c64", "bus": 104, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "fan3", + "present": {"gettype": "i2c", "bus": 92, "loc": 0x0d, "offset": 0x30, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "24c64", "bus": 96, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "fan4", + "present": {"gettype": "i2c", "bus": 101, "loc": 0x0d, "offset": 0x30, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan6frue2", "name": "24c64", "bus": 105, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "fan5", + "present": {"gettype": "i2c", "bus": 92, "loc": 0x0d, "offset": 0x30, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "24c64", "bus": 97, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "fan6", + "present": {"gettype": "i2c", "bus": 101, "loc": 0x0d, "offset": 0x30, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan7frue2", "name": "24c64", "bus": 106, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "fan7", + "present": {"gettype": "i2c", "bus": 92, "loc": 0x0d, "offset": 0x30, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "24c64", "bus": 98, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "fan8", + "present": {"gettype": "i2c", "bus": 101, "loc": 0x0d, "offset": 0x30, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan8frue2", "name": "24c64", "bus": 107, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"}, + ], + }, + { + "name": "lm75", + "device": [ + {"id": "lm75_1", "name": "lm75", "bus": 79, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_2", "name": "lm75", "bus": 93, "loc": 0x48, "attr": "hwmon"}, + {"id": "lm75_3", "name": "lm75", "bus": 94, "loc": 0x49, "attr": "hwmon"}, + {"id": "lm75_4", "name": "lm75", "bus": 102, "loc": 0x48, "attr": "hwmon"}, + {"id": "lm75_5", "name": "lm75", "bus": 117, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_6", "name": "lm75", "bus": 118, "loc": 0x4f, "attr": "hwmon"}, + {"id": "lm75_7", "name": "lm75", "bus": 198, "loc": 0x4b, "attr": "hwmon"}, + ], + }, + { + "name": "mac_bsc", + "device": [ + {"id": "mac_bsc_1", "name": "wb_mac_bsc_th4", "bus": 122, "loc": 0x44, "attr": "hwmon"}, + ], + }, + { + "name":"tmp411", + "device":[ + {"id":"tmp411_1", "name":"tmp411","bus":119, "loc":0x4c, "attr":"hwmon"}, + {"id":"tmp411_2", "name":"tmp411","bus":120, "loc":0x4c, "attr":"hwmon"}, + ], + }, + { + "name": "ina3221", + "device": [ + {"id": "ina3221_1", "name": "ina3221", "bus": 78, "loc": 0x43, "attr": "hwmon"}, + ], + }, + { + "name": "tps53622", + "device": [ + {"id": "tps53622_1", "name": "tps53688", "bus": 78, "loc": 0x67, "attr": "hwmon"}, + {"id": "tps53622_2", "name": "tps53688", "bus": 78, "loc": 0x6c, "attr": "hwmon"}, + {"id": "tps53622_3", "name": "tps53688", "bus": 131, "loc": 0x67, "attr": "hwmon"}, + ], + }, + { + "name": "ucd90160", + "device": [ + {"id": "ucd90160_1", "name": "ucd90160", "bus": 77, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_2", "name": "ucd90160", "bus": 128, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_3", "name": "ucd90160", "bus": 129, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_4", "name": "ucd90160", "bus": 130, "loc": 0x5b, "attr": "hwmon"}, + ], + }, + ], +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "onie" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "onie": { + "key": "ONIE", + "next": "cpu" + }, + "onie_date": { + "parent": "onie", + "key": "Build Date", + "file": "/host/machine.conf", + "pattern": r"^onie_build_date", + "separator": "=", + "arrt_index": 1, + }, + "onie_version": { + "parent": "onie", + "key": "Version", + "file": "/host/machine.conf", + "pattern": r"^onie_version", + "separator": "=", + "arrt_index": 2, + }, + + "cpu": { + "key": "CPU", + "next": "ssd" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + "ssd": { + "key": "SSD", + "next": "cpld" + }, + "ssd_model": { + "parent": "ssd", + "key": "Device Model", + "cmd": "smartctl -i /dev/sda |grep \"Device Model\"", + "pattern": r".*Device Model", + "separator": ":", + "arrt_index": 1, + }, + "ssd_fw": { + "parent": "ssd", + "key": "Firmware Version", + "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"", + "pattern": r".*Firmware Version", + "separator": ":", + "arrt_index": 2, + }, + "ssd_user_cap": { + "parent": "ssd", + "key": "User Capacity", + "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"", + "pattern": r".*User Capacity", + "separator": ":", + "arrt_index": 3, + }, + + "cpld": { + "key": "CPLD", + "next": "psu" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU_CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "reg": { + "loc": "/dev/port", + "offset": 0x700, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "CONNECT_CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "reg": { + "loc": "/dev/port", + "offset": 0x900, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MAC_CPLDA", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "i2c": { + "bus": "109", + "loc": "0x1d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "MAC_CPLDB", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "i2c": { + "bus": "110", + "loc": "0x2d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "PORT_CPLDA", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "i2c": { + "bus": "111", + "loc": "0x3d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld6": { + "key": "CPLD6", + "parent": "cpld", + "arrt_index": 6, + }, + "cpld6_model": { + "key": "Device Model", + "parent": "cpld6", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld6_vender": { + "key": "Vendor", + "parent": "cpld6", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld6_desc": { + "key": "Description", + "parent": "cpld6", + "config": "PORT_CPLDB", + "arrt_index": 3, + }, + "cpld6_version": { + "key": "Firmware Version", + "parent": "cpld6", + "i2c": { + "bus": "112", + "loc": "0x4d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld7": { + "key": "CPLD7", + "parent": "cpld", + "arrt_index": 7, + }, + "cpld7_model": { + "key": "Device Model", + "parent": "cpld7", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld7_vender": { + "key": "Vendor", + "parent": "cpld7", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld7_desc": { + "key": "Description", + "parent": "cpld7", + "config": "FAN_CPLDA", + "arrt_index": 3, + }, + "cpld7_version": { + "key": "Firmware Version", + "parent": "cpld7", + "i2c": { + "bus": "92", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld8": { + "key": "CPLD8", + "parent": "cpld", + "arrt_index": 8, + }, + "cpld8_model": { + "key": "Device Model", + "parent": "cpld8", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld8_vender": { + "key": "Vendor", + "parent": "cpld8", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld8_desc": { + "key": "Description", + "parent": "cpld8", + "config": "FAN_CPLDB", + "arrt_index": 3, + }, + "cpld8_version": { + "key": "Firmware Version", + "parent": "cpld8", + "i2c": { + "bus": "101", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu1": { + "parent": "psu", + "key": "PSU1", + "arrt_index": 1, + }, + "psu1_hw_version": { + "key": "Hardware Version", + "parent": "psu1", + "extra": { + "funcname": "getPsu", + "id": "psu1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu1_fw_version": { + "key": "Firmware Version", + "parent": "psu1", + "config": "NA", + "arrt_index": 2, + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + "psu3": { + "parent": "psu", + "key": "PSU3", + "arrt_index": 3, + }, + "psu3_hw_version": { + "key": "Hardware Version", + "parent": "psu3", + "extra": { + "funcname": "getPsu", + "id": "psu3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu3_fw_version": { + "key": "Firmware Version", + "parent": "psu3", + "config": "NA", + "arrt_index": 2, + }, + + "psu4": { + "parent": "psu", + "key": "PSU4", + "arrt_index": 4, + }, + "psu4_hw_version": { + "key": "Hardware Version", + "parent": "psu4", + "extra": { + "funcname": "getPsu", + "id": "psu4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu4_fw_version": { + "key": "Firmware Version", + "parent": "psu4", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + "next": "i210" + }, + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "fan5": { + "key": "FAN5", + "parent": "fan", + "arrt_index": 5, + }, + "fan5_hw_version": { + "key": "Hardware Version", + "parent": "fan5", + "extra": { + "funcname": "checkFan", + "id": "fan5", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan5_fw_version": { + "key": "Firmware Version", + "parent": "fan5", + "config": "NA", + "arrt_index": 2, + }, + + "fan6": { + "key": "FAN6", + "parent": "fan", + "arrt_index": 6, + }, + "fan6_hw_version": { + "key": "Hardware Version", + "parent": "fan6", + "extra": { + "funcname": "checkFan", + "id": "fan6", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan6_fw_version": { + "key": "Firmware Version", + "parent": "fan6", + "config": "NA", + "arrt_index": 2, + }, + + "fan7": { + "key": "FAN7", + "parent": "fan", + "arrt_index": 7, + }, + "fan7_hw_version": { + "key": "Hardware Version", + "parent": "fan7", + "extra": { + "funcname": "checkFan", + "id": "fan7", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan7_fw_version": { + "key": "Firmware Version", + "parent": "fan7", + "config": "NA", + "arrt_index": 2, + }, + + "fan8": { + "key": "FAN8", + "parent": "fan", + "arrt_index": 8, + }, + "fan8_hw_version": { + "key": "Hardware Version", + "parent": "fan8", + "extra": { + "funcname": "checkFan", + "id": "fan8", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan8_fw_version": { + "key": "Firmware Version", + "parent": "fan8", + "config": "NA", + "arrt_index": 2, + }, + + "i210": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "i210", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "i210", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "i210", + "cmd": "ethtool -i eth0", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + + "fpga": { + "key": "FPGA", + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "config": "XC7A100T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "MAC_FPGA", + "arrt_index": 3, + }, + "fpga1_hw_version": { + "parent": "fpga1", + "config": "NA", + "key": "Hardware Version", + "arrt_index": 4, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "pci": { + "bus": 8, + "slot": 0, + "fn": 0, + "bar": 0, + "offset": 0 + }, + "key": "Firmware Version", + "arrt_index": 5, + }, + "fpga1_date": { + "parent": "fpga1", + "pci": { + "bus": 8, + "slot": 0, + "fn": 0, + "bar": 0, + "offset": 4 + }, + "key": "Build Date", + "arrt_index": 6, + }, + "fpga2": { + "key": "FPGA2", + "parent": "fpga", + "arrt_index": 2, + }, + "fpga2_model": { + "parent": "fpga2", + "config": "XC7A100T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga2_vender": { + "parent": "fpga2", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga2_desc": { + "key": "Description", + "parent": "fpga2", + "config": "PORT_FPGA", + "arrt_index": 3, + }, + "fpga2_hw_version": { + "parent": "fpga2", + "config": "NA", + "key": "Hardware Version", + "arrt_index": 4, + }, + "fpga2_fw_version": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 5, + }, + "fpga2_date": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 6, + }, + "others": { + "key": "OTHERS", + }, + "5387": { + "parent": "others", + "key": "CPU-BMC-SWITCH", + "arrt_index": 1, + }, + "5387_model": { + "parent": "5387", + "config": "BCM5387", + "key": "Device Model", + "arrt_index": 1, + }, + "5387_vendor": { + "parent": "5387", + "config": "Broadcom", + "key": "Vendor", + "arrt_index": 2, + }, + "5387_hw_version": { + "parent": "5387", + "key": "Hardware Version", + "func": { + "funcname": "get_bcm5387_version", + "params": { + "before": [ + # OE pull high + {"gettype": "cmd", "cmd": "echo 50 > /sys/class/gpio/export"}, + {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio50/direction"}, + # SEL1 set high + {"gettype": "cmd", "cmd": "echo 48 > /sys/class/gpio/export"}, + {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio48/direction"}, + # select update 5387 + {"gettype": "io", "io_addr": 0x918, "value": 0x06}, + # enable 5387 + {"gettype": "io", "io_addr": 0x943, "value": 0x00}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=65 miso=32 mosi=67 bus=0"}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46 spi_bus_num=0 spi_cs_gpio=6"}, + ], + "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'", + "after": [ + {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio48/value"}, + {"gettype": "cmd", "cmd": "echo 48 > /sys/class/gpio/unexport"}, + {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio50/value"}, + {"gettype": "cmd", "cmd": "echo 50 > /sys/class/gpio/unexport"}, + ], + "finally": [ + {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"}, + {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio_device"}, + {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio"}, + {"gettype": "io", "io_addr": 0x943, "value": 0x01}, + {"gettype": "io", "io_addr": 0x918, "value": 0x00}, + ], + }, + }, + "arrt_index": 3, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "sffs": { + "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0}, + "nochangedmsgflag": 0, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 1, + "alias": { + "sff1": "Ethernet1", + "sff2": "Ethernet2", + "sff3": "Ethernet3", + "sff4": "Ethernet4", + "sff5": "Ethernet5", + "sff6": "Ethernet6", + "sff7": "Ethernet7", + "sff8": "Ethernet8", + "sff9": "Ethernet9", + "sff10": "Ethernet10", + "sff11": "Ethernet11", + "sff12": "Ethernet12", + "sff13": "Ethernet13", + "sff14": "Ethernet14", + "sff15": "Ethernet15", + "sff16": "Ethernet16", + "sff17": "Ethernet17", + "sff18": "Ethernet18", + "sff19": "Ethernet19", + "sff20": "Ethernet20", + "sff21": "Ethernet21", + "sff22": "Ethernet22", + "sff23": "Ethernet23", + "sff24": "Ethernet24", + "sff25": "Ethernet25", + "sff26": "Ethernet26", + "sff27": "Ethernet27", + "sff28": "Ethernet28", + "sff29": "Ethernet29", + "sff30": "Ethernet30", + "sff31": "Ethernet31", + "sff32": "Ethernet32", + "sff33": "Ethernet33", + "sff34": "Ethernet34", + "sff35": "Ethernet35", + "sff36": "Ethernet36", + "sff37": "Ethernet37", + "sff38": "Ethernet38", + "sff39": "Ethernet39", + "sff40": "Ethernet40", + "sff41": "Ethernet41", + "sff42": "Ethernet42", + "sff43": "Ethernet43", + "sff44": "Ethernet44", + "sff45": "Ethernet45", + "sff46": "Ethernet46", + "sff47": "Ethernet47", + "sff48": "Ethernet48", + "sff49": "Ethernet49", + "sff50": "Ethernet50", + "sff51": "Ethernet51", + "sff52": "Ethernet52", + "sff53": "Ethernet53", + "sff54": "Ethernet54", + "sff55": "Ethernet55", + "sff56": "Ethernet56", + "sff57": "Ethernet57", + "sff58": "Ethernet58", + "sff59": "Ethernet59", + "sff60": "Ethernet60", + "sff61": "Ethernet61", + "sff62": "Ethernet62", + "sff63": "Ethernet63", + "sff64": "Ethernet64", + } + }, + "fans": { + "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4", + "fan5": "FAN5", + "fan6": "FAN6", + "fan7": "FAN7", + "fan8": "FAN8", + } + }, + "psus": { + "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/wb_plat/psu/%s/output", "okval": 1}, + {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2", + "psu3": "PSU3", + "psu4": "PSU4" + } + } +} + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "cold_reboot", + "monitor_point": {"gettype": "io", "io_addr": 0x910, "okval": 0}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Power Loss, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Power Loss, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ] + }, + { + "name": "wdt_reboot", + "monitor_point": {"gettype": "io", "io_addr": 0x91a, "okval": 1}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Watchdog, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Watchdog, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024} + ], + "finish_operation": [ + {"gettype": "io", "io_addr": 0x919, "value": 0xfc}, + ] + }, + { + "name": "bmc_reboot", + "monitor_point": {"gettype": "io", "io_addr": 0x91b, "okval": 1}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "BMC reboot, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + "finish_operation": [ + {"gettype": "io", "io_addr": 0x919, "value": 0xfa}, + ] + }, + { + "name": "bmc_powerdown", + "monitor_point": {"gettype": "io", "io_addr": 0x91c, "okval": 1}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "BMC powerdown, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + "finish_operation": [ + {"gettype": "io", "io_addr": 0x919, "value": 0xf6}, + ] + }, + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default": 0x82, # default value, if rov value not in range + "sdkreg": "TOP_AVS_SEL_REG", # SDK register name + "sdktype": 0, # 0: No shift operation required, 1: shift operation required + "macregloc": 24, # Shift right 24 bits + "mask": 0xff, # Use with macregloc + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"bus": 109, "loc": 0x1d, "offset": 0x24, "gettype": "i2c"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/126-0010/avs_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x7e: 0.90090, + 0x82: 0.87820, + 0x86: 0.85640, + 0x8A: 0.83370, + 0x8E: 0.80960, + } + } +] + +BLACKLIST_DRIVERS = [ + {"name": "i2c_i801", "delay": 0}, +] + +DRIVERLISTS = [ + {"name": "i2c_i801", "delay": 1}, + {"name": "wb_gpio_d1500", "delay": 0}, + {"name": "i2c_dev", "delay": 0}, + {"name": "i2c_algo_bit", "delay": 0}, + {"name": "i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0}, + {"name": "wb_gpio_device", "delay": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=17 gpio_scl=1 gpio_udelay=2", "delay": 0}, + {"name": "platform_common dfd_my_type=0x20000055", "delay": 0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_spi_ocores", "delay": 0}, + {"name": "wb_spi_ocores_device", "delay": 0}, + {"name": "wb_spi_dev", "delay": 0}, + {"name": "wb_spi_dev_device", "delay": 0}, + {"name": "wb_spi_dev_platform_device", "delay": 0}, + {"name": "wb_lpc_drv", "delay": 0}, + {"name": "wb_lpc_drv_device", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_fpga_i2c_bus_drv", "delay": 0}, + {"name": "wb_fpga_i2c_bus_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device", "delay": 0}, + {"name": "wb_fpga_pca954x_drv", "delay": 0}, + {"name": "wb_fpga_pca954x_device", "delay": 0}, + {"name": "wb_i2c_dev_device", "delay": 0}, + {"name": "wb_wdt", "delay": 0}, + {"name": "lm75", "delay": 0}, + {"name": "tmp401", "delay": 0}, + {"name": "optoe", "delay": 0}, + {"name": "at24", "delay": 0}, + {"name": "wb_mac_bsc", "delay": 0}, + {"name": "pmbus_core", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, + {"name": "ina3221", "delay": 0}, + {"name": "tps53679", "delay": 0}, + {"name": "ucd9000", "delay": 0}, + {"name": "wb_xdpe132g5c", "delay": 0}, + {"name": "plat_dfd", "delay": 0}, + {"name": "plat_switch", "delay": 0}, + {"name": "plat_fan", "delay": 0}, + {"name": "plat_psu", "delay": 0}, + {"name": "plat_sff", "delay": 0}, + {"name": "wb_spi_master", "delay": 0}, +] + +DEVICE = [ + {"name": "24c02", "bus": 1, "loc": 0x56}, + {"name": "wb_mac_bsc_th4", "bus": 122, "loc": 0x44}, + # fan + {"name": "24c64", "bus": 95, "loc": 0x50}, + {"name": "24c64", "bus": 96, "loc": 0x50}, + {"name": "24c64", "bus": 97, "loc": 0x50}, + {"name": "24c64", "bus": 98, "loc": 0x50}, + {"name": "24c64", "bus": 104, "loc": 0x50}, + {"name": "24c64", "bus": 105, "loc": 0x50}, + {"name": "24c64", "bus": 106, "loc": 0x50}, + {"name": "24c64", "bus": 107, "loc": 0x50}, + # psu + {"name": "24c02", "bus": 83, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 83, "loc": 0x58}, + {"name": "24c02", "bus": 84, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 84, "loc": 0x58}, + {"name": "24c02", "bus": 86, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 86, "loc": 0x58}, + {"name": "24c02", "bus": 85, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 85, "loc": 0x58}, + # temp + {"name": "lm75", "bus": 79, "loc": 0x4b}, + {"name": "lm75", "bus": 93, "loc": 0x48}, + {"name": "lm75", "bus": 94, "loc": 0x49}, + {"name": "lm75", "bus": 102, "loc": 0x48}, + {"name": "lm75", "bus": 103, "loc": 0x49}, + {"name": "lm75", "bus": 117, "loc": 0x4b}, + {"name": "lm75", "bus": 118, "loc": 0x4f}, + {"name": "tmp411", "bus": 119, "loc": 0x4c}, + {"name": "tmp411", "bus": 120, "loc": 0x4c}, + {"name": "lm75", "bus": 198, "loc": 0x4b}, + #dcdc + {"name": "ucd90160", "bus": 77, "loc": 0x5b}, + {"name": "tps53688", "bus": 78, "loc": 0x67}, + {"name": "tps53688", "bus": 78, "loc": 0x6c}, + {"name": "ina3221", "bus": 78, "loc": 0x43}, + {"name": "ucd90160", "bus": 128, "loc": 0x5b}, + {"name": "ucd90160", "bus": 129, "loc": 0x5b}, + {"name": "ucd90160", "bus": 130, "loc": 0x5b}, + {"name": "tps53688", "bus": 131, "loc": 0x67}, + #avs + {"name": "wb_xdpe132g5c", "bus": 126, "loc": 0x10}, +] + +OPTOE = [ + {"name": "optoe3", "startbus": 133, "endbus": 196}, +] + +REBOOT_CTRL_PARAM = { + "cpu": {"io_addr": 0x920, "rst_val": 0xfe, "rst_delay": 0, "gettype": "io"}, + "mac": {"bus": 109, "loc": 0x1d, "offset": 0x11, "rst_val": 0xfd, "rst_delay": 0, "gettype": "i2c"}, + "phy": {"io_addr": 0x921, "rst_val": 0xef, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"}, + "power": {"io_addr": 0x923, "rst_val": 0x01, "rst_delay": 0, "gettype": "io"}, +} + +# INIT_PARAM_PRE = [ +# {"loc": "126-0010/avs_vout_max", "value": "900900"}, +# {"loc": "126-0010/avs_vout_min", "value": "809600"}, +# ] + +INIT_PARAM = [] + +INIT_COMMAND_PRE = [ + # sfp power enable + "dfd_debug io_wr 0x939 0x01", + "i2cset -f -y 109 0x1d 0x73 0xff", + "i2cset -f -y 110 0x2d 0x79 0xff", + "i2cset -f -y 110 0x2d 0x7a 0xff", + "i2cset -f -y 110 0x2d 0x7b 0xff", + "i2cset -f -y 111 0x3d 0x76 0xff", + "i2cset -f -y 111 0x3d 0x77 0xff", + "i2cset -f -y 112 0x4d 0x79 0xff", + "i2cset -f -y 112 0x4d 0x7a 0xff", + "i2cset -f -y 112 0x4d 0x7b 0xff", + # enable tty_console monitor + "dfd_debug io_wr 0x966 0x01", +] + +INIT_COMMAND = [ + # enable led + "i2cset -f -y 109 0x1d 0xc4 0x1", + "i2cset -f -y 110 0x2d 0xcc 0x1", + "i2cset -f -y 111 0x3d 0xc8 0x1", + "i2cset -f -y 112 0x4d 0xc9 0x1", + + # port led off + #MAC CPLD_U14 register: + #port 50, 49, 54, 53, 58, 57, 62, 61 + "i2cset -f -y 109 0x1d 0xc0 0xff", + "i2cset -f -y 109 0x1d 0xc1 0xff", + "i2cset -f -y 109 0x1d 0xc2 0xff", + "i2cset -f -y 109 0x1d 0xc3 0xff", + + #MAC CPLD_U14 register: + #port 2, 1, 6, 5, 10, 9, 14, 13, 18, 17, 22, 21, 26, 25, 30, 29, 34, 33, 37, 38, 42, 41, 46, 45 + "i2cset -f -y 110 0x2d 0xc0 0xff", + "i2cset -f -y 110 0x2d 0xc1 0xff", + "i2cset -f -y 110 0x2d 0xc2 0xff", + "i2cset -f -y 110 0x2d 0xc3 0xff", + "i2cset -f -y 110 0x2d 0xc4 0xff", + "i2cset -f -y 110 0x2d 0xc5 0xff", + "i2cset -f -y 110 0x2d 0xc6 0xff", + "i2cset -f -y 110 0x2d 0xc7 0xff", + "i2cset -f -y 110 0x2d 0xc8 0xff", + "i2cset -f -y 110 0x2d 0xc9 0xff", + "i2cset -f -y 110 0x2d 0xca 0xff", + "i2cset -f -y 110 0x2d 0xcb 0xff", + + #PORT CPLD_U5 register: + #port:4, 3, 8, 7, 12, 11, 16, 15, 23, 20, 27, 24, 31, 28, 32 + "i2cset -f -y 111 0x3d 0xc0 0xff", + "i2cset -f -y 111 0x3d 0xc1 0xff", + "i2cset -f -y 111 0x3d 0xc2 0xff", + "i2cset -f -y 111 0x3d 0xc3 0xff", + "i2cset -f -y 111 0x3d 0xc4 0xff", + "i2cset -f -y 111 0x3d 0xc5 0xff", + "i2cset -f -y 111 0x3d 0xc6 0xff", + "i2cset -f -y 111 0x3d 0xc7 0xff", + + #PORT CPLD_U9 register + #port: 35, 19, 39, 36, 43, 40, 47, 44, 51, 48, 55, 52, 59, 56, 63, 60, 64 + "i2cset -f -y 112 0x4d 0xc0 0xff", + "i2cset -f -y 112 0x4d 0xc1 0xff", + "i2cset -f -y 112 0x4d 0xc2 0xff", + "i2cset -f -y 112 0x4d 0xc3 0xff", + "i2cset -f -y 112 0x4d 0xc4 0xff", + "i2cset -f -y 112 0x4d 0xc5 0xff", + "i2cset -f -y 112 0x4d 0xc6 0xff", + "i2cset -f -y 112 0x4d 0xc7 0xff", + "i2cset -f -y 112 0x4d 0xc8 0xff", + "sleep 0.5", + + #MAC CPLD_U14 register: + #port 50, 49, 54, 53, 58, 57, 62, 61 + "i2cset -f -y 109 0x1d 0xc0 0x0", + "i2cset -f -y 109 0x1d 0xc1 0x0", + "i2cset -f -y 109 0x1d 0xc2 0x0", + "i2cset -f -y 109 0x1d 0xc3 0x0", + + #MAC CPLD_U14 register: + #port 2, 1, 6, 5, 10, 9, 14, 13, 18, 17, 22, 21, 26, 25, 30, 29, 34, 33, 37, 38, 42, 41, 46, 45 + "i2cset -f -y 110 0x2d 0xc0 0x0", + "i2cset -f -y 110 0x2d 0xc1 0x0", + "i2cset -f -y 110 0x2d 0xc2 0x0", + "i2cset -f -y 110 0x2d 0xc3 0x0", + "i2cset -f -y 110 0x2d 0xc4 0x0", + "i2cset -f -y 110 0x2d 0xc5 0x0", + "i2cset -f -y 110 0x2d 0xc6 0x0", + "i2cset -f -y 110 0x2d 0xc7 0x0", + "i2cset -f -y 110 0x2d 0xc8 0x0", + "i2cset -f -y 110 0x2d 0xc9 0x0", + "i2cset -f -y 110 0x2d 0xca 0x0", + "i2cset -f -y 110 0x2d 0xcb 0x0", + + #PORT CPLD_U5 register + #port:4, 3, 8, 7, 12, 11, 16, 15, 23, 20, 27, 24, 31, 28, 32 + "i2cset -f -y 111 0x3d 0xc0 0x0", + "i2cset -f -y 111 0x3d 0xc1 0x0", + "i2cset -f -y 111 0x3d 0xc2 0x0", + "i2cset -f -y 111 0x3d 0xc3 0x0", + "i2cset -f -y 111 0x3d 0xc4 0x0", + "i2cset -f -y 111 0x3d 0xc5 0x0", + "i2cset -f -y 111 0x3d 0xc6 0x0", + "i2cset -f -y 111 0x3d 0xc7 0x0", + + #PORT CPLD_U9 register + #port: 35, 19, 39, 36, 43, 40, 47, 44, 51, 48, 55, 52, 59, 56, 63, 60, 64 + "i2cset -f -y 112 0x4d 0xc0 0x0", + "i2cset -f -y 112 0x4d 0xc1 0x0", + "i2cset -f -y 112 0x4d 0xc2 0x0", + "i2cset -f -y 112 0x4d 0xc3 0x0", + "i2cset -f -y 112 0x4d 0xc4 0x0", + "i2cset -f -y 112 0x4d 0xc5 0x0", + "i2cset -f -y 112 0x4d 0xc6 0x0", + "i2cset -f -y 112 0x4d 0xc7 0x0", + "i2cset -f -y 112 0x4d 0xc8 0x0", + ] + +WARM_UPGRADE_PARAM = { + "slot0": { + "VME": { + "chain1": [ + {"name": "BASE_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/base_cpld_u55_transf_header.vme", + "init_cmd": [ + {"bus": 109, "loc": 0x1d, "offset": 0x1c, "value": 0xff, "gettype": "i2c"}, + {"io_addr": 0x916, "value": 0, "gettype": "io"}, + ], + "rw_recover_reg": [ + {"io_addr": 0x918, "value": None, "gettype": "io"}, + {"io_addr": 0x929, "value": None, "gettype": "io"}, + {"io_addr": 0x940, "value": None, "gettype": "io"}, + {"io_addr": 0x941, "value": None, "gettype": "io"}, + {"io_addr": 0x942, "value": None, "gettype": "io"}, + {"io_addr": 0x943, "value": None, "gettype": "io"}, + {"io_addr": 0x944, "value": None, "gettype": "io"}, + {"io_addr": 0x945, "value": None, "gettype": "io"}, + {"io_addr": 0x946, "value": None, "gettype": "io"}, + {"io_addr": 0x948, "value": None, "gettype": "io"}, + {"io_addr": 0x949, "value": None, "gettype": "io"}, + {"io_addr": 0x94a, "value": None, "gettype": "io"}, + {"io_addr": 0x953, "value": None, "gettype": "io"}, + {"io_addr": 0x954, "value": None, "gettype": "io"}, + {"io_addr": 0x955, "value": None, "gettype": "io"}, + {"io_addr": 0x958, "value": None, "gettype": "io"}, + {"io_addr": 0x959, "value": None, "gettype": "io"}, + {"io_addr": 0x960, "value": None, "gettype": "io"}, + {"io_addr": 0x961, "value": None, "gettype": "io"}, + {"io_addr": 0x962, "value": None, "gettype": "io"}, + {"io_addr": 0x963, "value": None, "gettype": "io"}, + ], + "after_upgrade_delay": 30, + "after_upgrade_delay_timeout": 60, + "refresh_finish_flag_check": {"io_addr": 0x91d, "value": 0x5a, "gettype": "io"}, + "access_check_reg": {"io_addr": 0x955, "value": 0xaa, "gettype": "io"}, + "finish_cmd": [ + {"bus": 109, "loc": 0x1d, "offset": 0x1c, "value": 0, "gettype": "i2c"}, + ], + }, + ], + + "chain2": [ + {"name": "FAN_CPLD_1", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/ufan_cpld_u13_transf_header.vme", + "rw_recover_reg": [], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"bus": 92, "loc": 0x0d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"}, + }, + ], + + "chain3": [ + {"name": "FAN_CPLD_2", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/dfan_cpld_u13_transf_header.vme", + "rw_recover_reg": [], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"bus": 101, "loc": 0x0d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"}, + }, + ], + + "chain4": [ + {"name": "MAC_CPLD_1", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/mac_cpld_u14_transf_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"bus": 110, "loc": 0x2d, "offset": 0x13, "value": 0xff, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x18, "value": 0x00, "gettype": "i2c"}, + ], + "rw_recover_reg": [ + {"bus": 109, "loc": 0x1d, "offset": 0x11, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x12, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x13, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x16, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x18, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x1a, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x1b, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x1c, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x21, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x23, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x51, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x52, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x54, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x56, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x57, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x58, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x59, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x5a, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x70, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x72, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0x73, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0xaa, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0xc0, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0xc1, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0xc2, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0xc3, "value": None, "gettype": "i2c"}, + {"bus": 109, "loc": 0x1d, "offset": 0xc4, "value": None, "gettype": "i2c"}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "refresh_finish_flag_check": {"bus": 109, "loc": 0x1d, "offset": 0x18, "value": 0x01, "gettype": "i2c"}, + "access_check_reg": {"bus": 109, "loc": 0x1d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"}, + "finish_cmd": [ + {"bus": 110, "loc": 0x2d, "offset": 0x13, "value": 0, "gettype": "i2c"}, + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + ], + }, + + {"name": "MAC_CPLD_2", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/mac_cpld_u30_transf_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"bus": 109, "loc": 0x1d, "offset": 0x1b, "value": 0xff, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x11, "value": 0x00, "gettype": "i2c"}, + ], + "rw_recover_reg": [ + {"bus": 110, "loc": 0x2d, "offset": 0x11, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x13, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x52, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x53, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x54, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x56, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x57, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x58, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x59, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x5a, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x5b, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x5c, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x5d, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x5e, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x70, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x71, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x72, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x76, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x77, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x78, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x79, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x7a, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0x7b, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xaa, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xc0, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xc1, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xc2, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xc3, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xc4, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xc5, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xc6, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xc7, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xc8, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xc9, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xca, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xcb, "value": None, "gettype": "i2c"}, + {"bus": 110, "loc": 0x2d, "offset": 0xcc, "value": None, "gettype": "i2c"}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "refresh_finish_flag_check": {"bus": 110, "loc": 0x2d, "offset": 0x11, "value": 0x01, "gettype": "i2c"}, + "access_check_reg": {"bus": 110, "loc": 0x2d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"}, + "finish_cmd": [ + {"bus": 109, "loc": 0x1d, "offset": 0x1b, "value": 0, "gettype": "i2c"}, + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + ], + }, + ], + + "chain5": [ + {"name": "PORT_CPLD_1", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/port_cpld_u5_transf_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"bus": 112, "loc": 0x4d, "offset": 0x13, "value": 0xff, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x18, "value": 0x00, "gettype": "i2c"}, + ], + "rw_recover_reg": [ + {"bus": 111, "loc": 0x3d, "offset": 0x11, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x13, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x14, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x15, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x16, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x18, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x1a, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x1b, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x21, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x51, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x53, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x54, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x56, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x57, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x58, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x59, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x5a, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x5b, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x5c, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x70, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x71, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x74, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x75, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x76, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0x77, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0xaa, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0xc0, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0xc1, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0xc2, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0xc3, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0xc4, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0xc5, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0xc6, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0xc7, "value": None, "gettype": "i2c"}, + {"bus": 111, "loc": 0x3d, "offset": 0xc8, "value": None, "gettype": "i2c"}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "refresh_finish_flag_check": {"bus": 111, "loc": 0x3d, "offset": 0x18, "value": 0x01, "gettype": "i2c"}, + "access_check_reg": {"bus": 111, "loc": 0x3d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"}, + "finish_cmd": [ + {"bus": 112, "loc": 0x4d, "offset": 0x13, "value": 0, "gettype": "i2c"}, + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + ], + }, + + {"name": "PORT_CPLD_2", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/port_cpld_u9_transf_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"bus": 111, "loc": 0x3d, "offset": 0x1b, "value": 0xff, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x11, "value": 0x00, "gettype": "i2c"}, + ], + "rw_recover_reg": [ + {"bus": 112, "loc": 0x4d, "offset": 0x11, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x13, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x50, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x52, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x53, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x54, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x55, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x56, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x57, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x58, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x59, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x5a, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x5b, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x5c, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x5d, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x5e, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x70, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x71, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x72, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x76, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x77, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x78, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x79, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x7a, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0x7b, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0xaa, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0xc0, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0xc1, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0xc2, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0xc3, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0xc4, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0xc5, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0xc6, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0xc7, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0xc8, "value": None, "gettype": "i2c"}, + {"bus": 112, "loc": 0x4d, "offset": 0xc9, "value": None, "gettype": "i2c"}, + + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "refresh_finish_flag_check": {"bus": 112, "loc": 0x4d, "offset": 0x11, "value": 0x01, "gettype": "i2c"}, + "access_check_reg": {"bus": 112, "loc": 0x4d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"}, + "finish_cmd": [ + {"bus": 111, "loc": 0x3d, "offset": 0x1b, "value": 0, "gettype": "i2c"}, + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + ], + }, + ], + + "chain6": [ + {"name": "CPU_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/refresh_cpu_cpld_header.vme", + "init_cmd": [ + {"cmd": "echo 7 > /sys/class/gpio/export", "gettype": "cmd"}, + {"cmd": "echo high > /sys/class/gpio/gpio7/direction", "gettype": "cmd"}, + {"io_addr": 0x7cc, "value": 0, "gettype": "io"}, + ], + "rw_recover_reg": [ + {"io_addr": 0x705, "value": None, "gettype": "io"}, + {"io_addr": 0x713, "value": None, "gettype": "io"}, + {"io_addr": 0x715, "value": None, "gettype": "io"}, + {"io_addr": 0x721, "value": None, "gettype": "io"}, + {"io_addr": 0x722, "value": None, "gettype": "io"}, + {"io_addr": 0x772, "value": None, "gettype": "io"}, + {"io_addr": 0x774, "value": None, "gettype": "io"}, + {"io_addr": 0x776, "value": None, "gettype": "io"}, + {"io_addr": 0x778, "value": None, "gettype": "io"}, + {"io_addr": 0x77a, "value": None, "gettype": "io"}, + {"io_addr": 0x77c, "value": None, "gettype": "io"}, + {"io_addr": 0x780, "value": None, "gettype": "io"}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"io_addr": 0x705, "value": 0x5a, "gettype": "io"}, + "finish_cmd": [ + {"io_addr": 0x7cc, "value": 0xff, "gettype": "io"}, + {"cmd": "echo 0 > /sys/class/gpio/gpio7/value", "gettype": "cmd"}, + {"cmd": "echo 7 > /sys/class/gpio/unexport", "gettype": "cmd"}, + ], + }, + ], + }, + + "MTD": { + "chain1": [ + {"name": "MAC_FPGA", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"cmd": "setpci -s 00:03.2 0xA0.W=0x0050", "gettype": "cmd"}, # link_disable + {"io_addr": 0x948, "value": 0x0, "gettype": "io"}, + {"bus": 58, "loc": 0x1c, "offset": 0x23, "value": 0x00, "gettype": "i2c"}, + {"bus": 58, "loc": 0x1c, "offset": 0x23, "value": 0x01, "gettype": "i2c", "delay": 0.1}, + ], + "after_upgrade_delay": 10, + "after_upgrade_delay_timeout": 180, + "refresh_finish_flag_check": {"bus": 58, "loc": 0x1c, "offset": 0x23, "value": 0x07, "gettype": "i2c"}, + "access_check_reg": { + "path": "/dev/fpga0", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len":4, "gettype":"devfile", + "polling_cmd":[ + {"cmd": "setpci -s 00:03.2 0xA0.W=0x0060", "gettype": "cmd"}, # retrain_link + {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd"}, + {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 0.1}, + ], + "polling_delay": 0.1 + }, + "finish_cmd": [ + {"cmd": "setpci -s 00:03.2 0xA0.W=0x0060", "gettype": "cmd"}, # retrain_link + {"io_addr": 0x948, "value": 0x1, "gettype": "io"}, + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + ], + }, + ], + "chain2": [ + {"name": "PORT_FPGA", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"io_addr": 0x948, "value": 0x0, "gettype": "io"}, + {"bus": 66, "loc": 0x3c, "offset": 0x21, "value": 0x00, "gettype": "i2c"}, + {"bus": 66, "loc": 0x3c, "offset": 0x21, "value": 0x01, "gettype": "i2c", "delay": 0.1}, + ], + "after_upgrade_delay": 10, + "after_upgrade_delay_timeout": 180, + "refresh_finish_flag_check": {"bus": 66, "loc": 0x3c, "offset": 0x21, "value": 0x07, "gettype": "i2c"}, + "access_check_reg": { + "path": "/dev/fpga1", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len":4, "gettype":"devfile", + "polling_cmd":[ + {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd"}, + {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 0.1}, + ], + "polling_delay": 0.1 + }, + "finish_cmd": [ + {"io_addr": 0x948, "value": 0x1, "gettype": "io"}, + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + ], + }, + ], + }, + }, + "stop_services_cmd": [ + "/usr/local/bin/platform_process.py stop", + ], + "start_services_cmd": [ + "/usr/local/bin/platform_process.py start", + ], +} + +UPGRADE_SUMMARY = { + "devtype": 0x20000055, + + "slot0": { + "subtype": 0, + "VME": { + "chain1": { + "name": "BASE_CPLD", + "is_support_warm_upg": 1, + }, + "chain2": { + "name": "FANA_CPLD", + "is_support_warm_upg": 1, + }, + "chain3": { + "name": "FANB_CPLD", + "is_support_warm_upg": 1, + }, + "chain4": { + "name": "MAC_CPLD", + "is_support_warm_upg": 1, + }, + "chain5": { + "name": "PORT_CPLD", + "is_support_warm_upg": 1, + }, + "chain6": { + "name": "CPU_CPLD", + "is_support_warm_upg": 1, + }, + }, + + "MTD": { + "chain1": { + "name": "MAC_FPGA", + "is_support_warm_upg": 1, + "init_cmd": [ + {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_gpio_device sck=65 miso=32 mosi=67 bus=0", "gettype": "cmd"}, + {"cmd": "echo 50 > /sys/class/gpio/export", "gettype": "cmd"}, + {"cmd": "echo high > /sys/class/gpio/gpio50/direction", "gettype": "cmd", "delay": 0.1}, + {"cmd": "echo 48 > /sys/class/gpio/export", "gettype": "cmd"}, + {"cmd": "echo high > /sys/class/gpio/gpio48/direction", "gettype": "cmd", "delay": 0.1}, + {"io_addr": 0x918, "value": 0x2, "gettype": "io"}, + {"io_addr": 0x946, "value": 0xfe, "gettype": "io"}, + {"cmd": "modprobe wb_spi_nor_device spi_bus_num=0", "gettype": "cmd", "delay": 0.1}, + ], + "finish_cmd": [ + {"cmd": "rmmod wb_spi_nor_device", "gettype": "cmd"}, + {"io_addr": 0x946, "value": 0xff, "gettype": "io"}, + {"io_addr": 0x918, "value": 0x0, "gettype": "io"}, + {"cmd": "echo 0 > /sys/class/gpio/gpio48/value", "gettype": "cmd"}, + {"cmd": "echo 48 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1}, + {"cmd": "echo 0 > /sys/class/gpio/gpio50/value", "gettype": "cmd"}, + {"cmd": "echo 50 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1}, + {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1}, + ], + }, + "chain2": { + "name": "PORT_FPGA", + "is_support_warm_upg": 1, + "init_cmd": [ + {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_gpio_device sck=65 miso=32 mosi=67 bus=0", "gettype": "cmd"}, + {"cmd": "echo 50 > /sys/class/gpio/export", "gettype": "cmd"}, + {"cmd": "echo high > /sys/class/gpio/gpio50/direction", "gettype": "cmd", "delay": 0.1}, + {"cmd": "echo 48 > /sys/class/gpio/export", "gettype": "cmd"}, + {"cmd": "echo high > /sys/class/gpio/gpio48/direction", "gettype": "cmd", "delay": 0.1}, + {"io_addr": 0x918, "value": 0x3, "gettype": "io"}, + {"io_addr": 0x946, "value": 0xfb, "gettype": "io"}, + {"cmd": "modprobe wb_spi_nor_device spi_bus_num=0", "gettype": "cmd", "delay": 0.1}, + ], + "finish_cmd": [ + {"cmd": "rmmod wb_spi_nor_device", "gettype": "cmd"}, + {"io_addr": 0x946, "value": 0xff, "gettype": "io"}, + {"io_addr": 0x918, "value": 0x0, "gettype": "io"}, + {"cmd": "echo 0 > /sys/class/gpio/gpio48/value", "gettype": "cmd"}, + {"cmd": "echo 48 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1}, + {"cmd": "echo 0 > /sys/class/gpio/gpio50/value", "gettype": "cmd"}, + {"cmd": "echo 50 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1}, + {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1}, + ], + }, + "chain4": { + "name": "BIOS", + "is_support_warm_upg": 0, + "filesizecheck": 10240, # bios check file size, Unit: K + "init_cmd": [ + {"io_addr": 0x722, "value": 0x02, "gettype": "io"}, + {"cmd": "modprobe mtd", "gettype": "cmd"}, + {"cmd": "modprobe spi_nor", "gettype": "cmd"}, + {"cmd": "modprobe ofpart", "gettype": "cmd"}, + {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"}, + {"cmd": "modprobe intel_spi_platform writeable=1", "gettype": "cmd"}, + ], + "finish_cmd": [ + {"cmd": "rmmod intel_spi_platform", "gettype": "cmd"}, + {"cmd": "rmmod intel_spi", "gettype": "cmd"}, + {"cmd": "rmmod ofpart", "gettype": "cmd"}, + {"cmd": "rmmod spi_nor", "gettype": "cmd"}, + {"cmd": "rmmod mtd", "gettype": "cmd"}, + ], + }, + }, + + "SYSFS": { + "chain3": { + "name": "BCM5387", + "is_support_warm_upg": 0, + "init_cmd": [ + {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_gpio_device sck=65 miso=32 mosi=67 bus=0", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_93xx46 spi_bus_num=0 spi_cs_gpio=6", "gettype": "cmd", "delay": 0.1}, + ], + "finish_cmd": [ + {"cmd": "rmmod wb_spi_93xx46", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1}, + ], + }, + }, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/fpga_test_0_1_header.bin", "display_name": "MAC_FPGA"}, + {"chain": 2, "file": "/etc/.upgrade_test/fpga_test_0_2_header.bin", "display_name": "PORT_FPGA"}, + ], + "cpld": [ + {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_0_1_header.vme", "display_name": "BASE_CPLD"}, + {"chain": 2, "file": "/etc/.upgrade_test/cpld_test_0_2_header.vme", "display_name": "FANA_CPLD"}, + {"chain": 3, "file": "/etc/.upgrade_test/cpld_test_0_3_header.vme", "display_name": "FANB_CPLD"}, + {"chain": 4, "file": "/etc/.upgrade_test/cpld_test_0_4_header.vme", "display_name": "MAC_CPLD"}, + {"chain": 5, "file": "/etc/.upgrade_test/cpld_test_0_5_header.vme", "display_name": "PORT_CPLD"}, + {"chain": 6, "file": "/etc/.upgrade_test/cpld_test_0_6_header.vme", "display_name": "CPU_CPLD"}, + ], + }, + }, + + "BMC": { + "name": "BMC", + "init_cmd": [ + {"cmd": "ipmitool raw 0x32 0x03 0x02", "gettype": "cmd", "ignore_result": 1}, + ], + "finish_cmd": [], + }, +} + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/95-0050/eeprom"}, + {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/104-0050/eeprom"}, + {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/96-0050/eeprom"}, + {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/105-0050/eeprom"}, + {"name": "fan5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/97-0050/eeprom"}, + {"name": "fan6", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/106-0050/eeprom"}, + {"name": "fan7", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/98-0050/eeprom"}, + {"name": "fan8", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/107-0050/eeprom"}, + ], + "psu": [ + {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/83-0050/eeprom"}, + {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/84-0050/eeprom"}, + {"name": "psu3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/86-0050/eeprom"}, + {"name": "psu4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/85-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, + ], +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_port_config.py new file mode 100755 index 00000000000..5ed9537f3c1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_port_config.py @@ -0,0 +1,7 @@ +#!/usr/bin/python3 +# -*- coding: UTF-8 -*- + +PLATFORM_INTF_OPTOE = { + "port_num": 64, + "optoe_start_bus": 133, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py new file mode 100755 index 00000000000..36d6cbd0f10 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py @@ -0,0 +1,1758 @@ +#!/usr/bin/python3 + +psu_fan_airflow = { + "intake": ['DPS-1300AB-6 S', 'GW-CRPS1300D'], + "exhaust": [] +} + +fanairflow = { + "intake": ['M2EFAN II-F'], + "exhaust": [], +} + +psu_display_name = { + "PA1300I-F": ['GW-CRPS1300D', 'DPS-1300AB-6 S'], +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + + +class threshold: + PSU_TEMP_MIN = -10 * 1000 + PSU_TEMP_MAX = 60 * 1000 + + PSU_FAN_SPEED_MIN = 2000 + PSU_FAN_SPEED_MAX = 28000 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 14 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 10 * 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 1300 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 10 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 1444 * 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 2 * 1000 + PSU_OUTPUT_CURRENT_MAX = 107 * 1000 + + PSU_INPUT_CURRENT_MIN = 0.2 * 1000 + PSU_INPUT_CURRENT_MAX = 7 * 1000 + + FRONT_FAN_SPEED_MAX = 14200 + REAR_FAN_SPEED_MAX = 11200 + FAN_SPEED_MIN = 2000 + + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/83-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 83, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 83, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 83, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 83, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 83, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 83, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/84-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 84, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 84, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 84, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 84, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 84, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 84, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/86-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 86, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/wb_plat/psu/psu3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU3", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 86, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 86, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 86, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 86, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 86, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/85-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 85, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/wb_plat/psu/psu4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU4", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 85, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 85, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 85, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 85, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 85, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + } + ], + "temps": [ + { + "name": "BOARD_TEMP", + "temp_id": "TEMP1", + "api_name": "Board", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/118-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "CPU_TEMP", + "temp_id": "TEMP2", + "api_name": "CPU", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -15000, + "Low": 10000, + "High": 98000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP3", + "api_name": "Inlet", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_input", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 0, + "High": 40000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP4", + "api_name": "Outlet", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/93-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/94-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/102-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/103-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 0, + "High": 70000, + "Max": 80000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"}, + "Min": -30000, + "Low": 10000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU1_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU3_TEMP", + "temp_id": "TEMP8", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU4_TEMP", + "temp_id": "TEMP9", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SFF_TEMP", + "Temperature": { + "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"}, + "Min": -15000, + "Low": 0, + "High": 80000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld4", "offset": 0x08, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x01, "red": 0x02, "amber": 0x03, "default": 0x01, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff + }, + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld4", "offset": 0x09, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff + }, + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld4", "offset": 0x0a, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff + }, + }, + ], + "fans": [ + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-95/95-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 92, "addr": 0x0d, "offset": 0x3b, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x14, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x14, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-104/104-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 101, "addr": 0x0d, "offset": 0x3b, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x14, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x14, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-96/96-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 92, "addr": 0x0d, "offset": 0x3c, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x15, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x15, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-105/105-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 101, "addr": 0x0d, "offset": 0x3c, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x15, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x15, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN5", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-97/97-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 92, "addr": 0x0d, "offset": 0x3d, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x16, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan5/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x16, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan5/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN6", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-106/106-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 101, "addr": 0x0d, "offset": 0x3d, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x16, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan6/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x16, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan6/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN7", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-98/98-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan7/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 92, "addr": 0x0d, "offset": 0x3e, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x17, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan7/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan7/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan7/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x17, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan7/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN8", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-107/107-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/wb_plat/fan/fan8/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 101, "addr": 0x0d, "offset": 0x3e, "way": "i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x17, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan8/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan8/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan8/motor0/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x17, "way": "i2c"}, + "Running": {"loc": "/sys/wb_plat/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/wb_plat/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/wb_plat/fan/fan8/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU_CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 1, + }, + { + "name": "CONNECT_CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDA", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDB", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "PORT_CPLDA", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "PORT_CPLDB", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld7", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "FAN_CPLDA", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/cpld8", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 1, + }, + { + "name": "FAN_CPLDB", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/cpld9", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_FPGA", + "cpld_id": "CPLD9", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 1, + }, + { + "name": "PORT_FPGA", + "cpld_id": "CPLD10", + "VersionFile": {"loc": "/dev/fpga1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 1, + }, + { + "name": "BIOS", + "cpld_id": "CPLD11", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "dcdc": [ + { + "name": "MAC_VDD3.3V_standby", + "dcdc_id": "DCDC1", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD12V_A", + "dcdc_id": "DCDC2", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 10200, + "Max": 13800, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD1.0V_FPGA", + "dcdc_id": "DCDC3", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 850, + "Max": 1150, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD1.8V_FPGA", + "dcdc_id": "DCDC4", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 1530, + "Max": 2070, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD1.2V_FPGA", + "dcdc_id": "DCDC5", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in5_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 1020, + "Max": 1380, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD3.3V", + "dcdc_id": "DCDC6", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in6_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD5V_CLK_MCU", + "dcdc_id": "DCDC7", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in7_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 4250, + "Max": 5750, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD3.3V_MAC", + "dcdc_id": "DCDC8", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in8_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDDO1.8V", + "dcdc_id": "DCDC9", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in9_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 1530, + "Max": 2070, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDDO1.2V", + "dcdc_id": "DCDC10", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in10_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 1020, + "Max": 1380, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD_CORE", + "dcdc_id": "DCDC11", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in11_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 680, + "Max": 980, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD3.3_CLK", + "dcdc_id": "DCDC12", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in12_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD_ANALOG", + "dcdc_id": "DCDC13", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in13_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 655, + "Max": 885, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD1.2V_MAC_A", + "dcdc_id": "DCDC14", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in14_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 1020, + "Max": 1380, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_AVDD1.8V", + "dcdc_id": "DCDC15", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in15_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 1530, + "Max": 2070, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD_ANALOG2", + "dcdc_id": "DCDC16", + "value": { + "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in16_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 655, + "Max": 885, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD12V_B", + "dcdc_id": "DCDC17", + "value": { + "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 10200, + "Max": 13800, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD5.0V", + "dcdc_id": "DCDC18", + "value": { + "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 4250, + "Max": 5750, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_QSFPDD_VDD3.3V_A", + "dcdc_id": "DCDC19", + "value": { + "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_QSFPDD_VDD3.3V_B", + "dcdc_id": "DCDC20", + "value": { + "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_QSFPDD_VDD3.3V_C", + "dcdc_id": "DCDC21", + "value": { + "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in5_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_QSFPDD_VDD3.3V_D", + "dcdc_id": "DCDC22", + "value": { + "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in6_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_QSFPDD_VDD3.3V_E", + "dcdc_id": "DCDC23", + "value": { + "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in7_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_QSFPDD_VDD3.3V_F", + "dcdc_id": "DCDC24", + "value": { + "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in8_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "PORT_VDD1.0V_FPGA", + "dcdc_id": "DCDC25", + "value": { + "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 850, + "Max": 1150, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "PORT_VDD1.8V_FPGA", + "dcdc_id": "DCDC26", + "value": { + "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 1530, + "Max": 2070, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "PORT_VDD1.2V_FPGA", + "dcdc_id": "DCDC27", + "value": { + "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 1020, + "Max": 1380, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "PORT_VDD3.3V", + "dcdc_id": "DCDC28", + "value": { + "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "PORT_VDD12V", + "dcdc_id": "DCDC29", + "value": { + "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in5_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 10200, + "Max": 13800, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "PORT_VDD3.3V_standby", + "dcdc_id": "DCDC30", + "value": { + "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in6_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "PORT_QSFPDD_VDD3.3V_A", + "dcdc_id": "DCDC31", + "value": { + "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in7_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "PORT_QSFPDD_VDD3.3V_B", + "dcdc_id": "DCDC32", + "value": { + "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in8_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "PORT_QSFPDD_VDD3.3V_C", + "dcdc_id": "DCDC33", + "value": { + "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in9_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "PORT_QSFPDD_VDD3.3V_D", + "dcdc_id": "DCDC34", + "value": { + "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in10_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "PORT_QSFPDD_VDD3.3V_E", + "dcdc_id": "DCDC35", + "value": { + "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in11_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "PORT_QSFPDD_VDD3.3V_F", + "dcdc_id": "DCDC36", + "value": { + "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in12_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2805, + "Max": 3795, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "MAC_VDD1.2V_MAC_B", + "dcdc_id": "DCDC37", + "value": { + "loc": "/sys/bus/i2c/devices/131-0067/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 1020, + "Max": 1380, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "BASE_VDD12V", + "dcdc_id": "DCDC38", + "value": { + "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 10830, + "Max": 13230, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "BASE_SW_VDD1.2V", + "dcdc_id": "DCDC39", + "value": { + "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 1083, + "Max": 1323, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "BASE_VDD2.5V", + "dcdc_id": "DCDC40", + "value": { + "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2247, + "Max": 2745, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "BASE_VDD3.3V", + "dcdc_id": "DCDC41", + "value": { + "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2960, + "Max": 3616, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "BASE_SSD_VDD3.3V", + "dcdc_id": "DCDC42", + "value": { + "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in5_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2978, + "Max": 3638, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "CPU_P1V05_V", + "dcdc_id": "DCDC43", + "value": { + "loc": "/sys/bus/i2c/devices/78-0067/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 882, + "Max": 1232, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "CPU_VCCIN_V", + "dcdc_id": "DCDC44", + "value": { + "loc": "/sys/bus/i2c/devices/78-0067/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 1368, + "Max": 2244, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "CPU_VCCD_V", + "dcdc_id": "DCDC45", + "value": { + "loc": "/sys/bus/i2c/devices/78-006c/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 990, + "Max": 1452, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "CPU_VCCSCSUS_V", + "dcdc_id": "DCDC46", + "value": { + "loc": "/sys/bus/i2c/devices/78-006c/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 855, + "Max": 1265, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "CPU_P5V_AUX_V", + "dcdc_id": "DCDC47", + "value": { + "loc": "/sys/bus/i2c/devices/78-0043/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 3852, + "Max": 6347, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "CPU_P3V3_STBY_V", + "dcdc_id": "DCDC48", + "value": { + "loc": "/sys/bus/i2c/devices/78-0043/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 2682, + "Max": 4004, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + { + "name": "CPU_P1V7_VCCSCFUSESUS_V", + "dcdc_id": "DCDC49", + "value": { + "loc": "/sys/bus/i2c/devices/78-0043/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 1, + "Min": 1377, + "Max": 2057, + "Unit": "V", + "format": "float(float(%s)/1000)", + }, + ], + "cpu": [ + { + "name": "cpu", + "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x10, "len": 1, "way": "devfile_ascii"}, + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '1.0', + "port_index_start": 0, + "port_num": 64, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_cpld": { + "dev_id": { + 4: { + "offset": { + 0x71: "49-50, 53-54, 57-58, 61-62", + }, + }, + 5: { + "offset": { + 0x73: "1-2, 5-6, 9-10, 13-14", + 0x74: "17-18, 21-22, 25-26, 29-30", + 0x75: "33-34, 37-38, 41-42, 45-46", + }, + }, + 6: { + "offset": { + 0x72: "3-4, 7-8, 11-12, 15-16", + 0x73: "20, 23-24, 27-28, 31-32", + }, + }, + 7: { + "offset": { + 0x73: "19, 35-36, 39-40, 43-44, 47", + 0x74: "48, 51-52, 55-56, 59-60, 63", + 0x75: "64", + }, + }, + }, + }, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": list(range(133, 197)), + "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class", + "optoe_driver_key": list(range(133, 197)), + "reset_cpld": { + "dev_id": { + 4: { + "offset": { + 0x70: "49-50, 53-54, 57-58, 61-62", + }, + }, + 5: { + "offset": { + 0x70: "1-2, 5-6, 9-10, 13-14", + 0x71: "17-18, 21-22, 25-26, 29-30", + 0x72: "33-34, 37-38, 41-42, 45-46", + }, + }, + 6: { + "offset": { + 0x70: "3-4, 7-8, 11-12, 15-16", + 0x71: "20, 23-24, 27-28, 31-32", + }, + }, + 7: { + "offset": { + 0x70: "19, 35-36, 39-40, 43-44, 47", + 0x71: "48, 51-52, 55-56, 59-60, 63", + 0x72: "64", + }, + }, + }, + }, + "reset_val_is_reset": 0, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_monitor.py new file mode 100755 index 00000000000..69abf0da3fb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_monitor.py @@ -0,0 +1,135 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x80, + "pwm_max": 0xff, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x80, + "pwm_max": 0xff, + "a": 0.369, + "b": -15.657, + "c": 289, + "tin_min": 25, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 90, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "SFF_TEMP": { + "name": "SFF_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 0.1, + "Ki": 0.4, + "Kd": 0, + "target": 60, + "value": [None, None, None], + }, + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 40, "critical": 50, "fix": -3}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 100, "critical": 102}, + "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999}, + }, + + "fancontrol_para": { + "interval": 5, + "max_pwm": 0xff, + "min_pwm": 0x80, + "abnormal_pwm": 0xff, + "warning_pwm": 0xff, + "temp_invalid_pid_pwm": 0x80, + "temp_error_pid_pwm": 0x80, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_fan_control": 1, + "psu_absent_fullspeed_num": 0xFF, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + }, + + "ledcontrol_para": { + "interval":5, + "checkpsu": 0, # 0: sys led don't follow psu led + "checkfan": 0, # 0: sys led don't follow fan led + "psu_amber_num": 1, + "fan_amber_num": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + }, + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/Makefile new file mode 100755 index 00000000000..1541b91bdf7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/Makefile @@ -0,0 +1,16 @@ +MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST))) +MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules) + +EXTRA_CFLAGS+= -I$(MODULES_DIR) + +obj-m += wb_pcie_dev_device.o +obj-m += wb_spi_ocores_device.o +obj-m += wb_spi_dev_device.o +obj-m += wb_lpc_drv_device.o +obj-m += wb_io_dev_device.o +obj-m += wb_fpga_i2c_bus_device.o +obj-m += wb_i2c_mux_pca954x_device.o +obj-m += wb_fpga_pca954x_device.o +obj-m += wb_spi_master.o +obj-m += wb_i2c_dev_device.o +obj-m += wb_spi_dev_platform_device.o diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_i2c_bus_device.c new file mode 100644 index 00000000000..d0650a29b1b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_i2c_bus_device.c @@ -0,0 +1,2317 @@ +/* + * An wb_fpga_i2c_bus_device driver for fpga i2c device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_fpga_i2c_debug = 0; +static int g_wb_fpga_i2c_error = 0; + +module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR); + +#define WB_FPGA_I2C_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_fpga_i2c_debug) { \ + printk(KERN_INFO "[WB_FPGA_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_FPGA_I2C_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_fpga_i2c_error) { \ + printk(KERN_ERR "[WB_FPGA_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static fpga_i2c_bus_device_t fpga_i2c_bus_device_data0 = { + .adap_nr = 2, + .i2c_timeout = 3000, + .i2c_scale = 0x100, + .i2c_filter = 0x104, + .i2c_stretch = 0x108, + .i2c_ext_9548_exits_flag = 0x10c, + .i2c_ext_9548_addr = 0x110, + .i2c_ext_9548_chan = 0x114, + .i2c_in_9548_chan = 0x118, + .i2c_slave = 0x11c, + .i2c_reg = 0x120, + .i2c_reg_len = 0x130, + .i2c_data_len = 0x134, + .i2c_ctrl = 0x138, + .i2c_status = 0x13c, + .i2c_data_buf = 0x180, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x28, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_i2c_bus_device_data1 = { + .adap_nr = 3, + .i2c_timeout = 3000, + .i2c_scale = 0x200, + .i2c_filter = 0x204, + .i2c_stretch = 0x208, + .i2c_ext_9548_exits_flag = 0x20c, + .i2c_ext_9548_addr = 0x210, + .i2c_ext_9548_chan = 0x214, + .i2c_in_9548_chan = 0x218, + .i2c_slave = 0x21c, + .i2c_reg = 0x220, + .i2c_reg_len = 0x230, + .i2c_data_len = 0x234, + .i2c_ctrl = 0x238, + .i2c_status = 0x23c, + .i2c_data_buf = 0x280, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x28, + .i2c_reset_on = 0x00000002, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_i2c_bus_device_data2 = { + .adap_nr = 4, + .i2c_timeout = 3000, + .i2c_scale = 0x300, + .i2c_filter = 0x304, + .i2c_stretch = 0x308, + .i2c_ext_9548_exits_flag = 0x30c, + .i2c_ext_9548_addr = 0x310, + .i2c_ext_9548_chan = 0x314, + .i2c_in_9548_chan = 0x318, + .i2c_slave = 0x31c, + .i2c_reg = 0x320, + .i2c_reg_len = 0x330, + .i2c_data_len = 0x334, + .i2c_ctrl = 0x338, + .i2c_status = 0x33c, + .i2c_data_buf = 0x380, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x28, + .i2c_reset_on = 0x00000004, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_i2c_bus_device_data3 = { + .adap_nr = 5, + .i2c_timeout = 3000, + .i2c_scale = 0x400, + .i2c_filter = 0x404, + .i2c_stretch = 0x408, + .i2c_ext_9548_exits_flag = 0x40c, + .i2c_ext_9548_addr = 0x410, + .i2c_ext_9548_chan = 0x414, + .i2c_in_9548_chan = 0x418, + .i2c_slave = 0x41c, + .i2c_reg = 0x420, + .i2c_reg_len = 0x430, + .i2c_data_len = 0x434, + .i2c_ctrl = 0x438, + .i2c_status = 0x43c, + .i2c_data_buf = 0x480, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x28, + .i2c_reset_on = 0x00000008, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_i2c_bus_device_data4 = { + .adap_nr = 6, + .i2c_timeout = 3000, + .i2c_scale = 0x500, + .i2c_filter = 0x504, + .i2c_stretch = 0x508, + .i2c_ext_9548_exits_flag = 0x50c, + .i2c_ext_9548_addr = 0x510, + .i2c_ext_9548_chan = 0x514, + .i2c_in_9548_chan = 0x518, + .i2c_slave = 0x51c, + .i2c_reg = 0x520, + .i2c_reg_len = 0x530, + .i2c_data_len = 0x534, + .i2c_ctrl = 0x538, + .i2c_status = 0x53c, + .i2c_data_buf = 0x580, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x28, + .i2c_reset_on = 0x00000010, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_i2c_bus_device_data5 = { + .adap_nr = 7, + .i2c_timeout = 3000, + .i2c_scale = 0x600, + .i2c_filter = 0x604, + .i2c_stretch = 0x608, + .i2c_ext_9548_exits_flag = 0x60c, + .i2c_ext_9548_addr = 0x610, + .i2c_ext_9548_chan = 0x614, + .i2c_in_9548_chan = 0x618, + .i2c_slave = 0x61c, + .i2c_reg = 0x620, + .i2c_reg_len = 0x630, + .i2c_data_len = 0x634, + .i2c_ctrl = 0x638, + .i2c_status = 0x63c, + .i2c_data_buf = 0x680, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x28, + .i2c_reset_on = 0x00000020, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_i2c_bus_device_data6 = { + .adap_nr = 199, + .i2c_timeout = 3000, + .i2c_scale = 0x1a00, + .i2c_filter = 0x1a04, + .i2c_stretch = 0x1a08, + .i2c_ext_9548_exits_flag = 0x1a0c, + .i2c_ext_9548_addr = 0x1a10, + .i2c_ext_9548_chan = 0x1a14, + .i2c_in_9548_chan = 0x1a18, + .i2c_slave = 0x1a1c, + .i2c_reg = 0x1a20, + .i2c_reg_len = 0x1a30, + .i2c_data_len = 0x1a34, + .i2c_ctrl = 0x1a38, + .i2c_status = 0x1a3c, + .i2c_data_buf = 0x1b00, + .i2c_data_buf_len = 0x100, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x28, + .i2c_reset_on = 0x00000040, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data0 = { + .adap_nr = 8, + .i2c_timeout = 3000, + .i2c_scale = 0x800, + .i2c_filter = 0x804, + .i2c_stretch = 0x808, + .i2c_ext_9548_exits_flag = 0x80c, + .i2c_ext_9548_addr = 0x810, + .i2c_ext_9548_chan = 0x814, + .i2c_in_9548_chan = 0x818, + .i2c_slave = 0x81c, + .i2c_reg = 0x820, + .i2c_reg_len = 0x830, + .i2c_data_len = 0x834, + .i2c_ctrl = 0x838, + .i2c_status = 0x83c, + .i2c_data_buf = 0x880, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data1 = { + .adap_nr = 9, + .i2c_timeout = 3000, + .i2c_scale = 0x900, + .i2c_filter = 0x904, + .i2c_stretch = 0x908, + .i2c_ext_9548_exits_flag = 0x90c, + .i2c_ext_9548_addr = 0x910, + .i2c_ext_9548_chan = 0x914, + .i2c_in_9548_chan = 0x918, + .i2c_slave = 0x91c, + .i2c_reg = 0x920, + .i2c_reg_len = 0x930, + .i2c_data_len = 0x934, + .i2c_ctrl = 0x938, + .i2c_status = 0x93c, + .i2c_data_buf = 0x980, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00000002, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data2 = { + .adap_nr = 10, + .i2c_timeout = 3000, + .i2c_scale = 0xa00, + .i2c_filter = 0xa04, + .i2c_stretch = 0xa08, + .i2c_ext_9548_exits_flag = 0xa0c, + .i2c_ext_9548_addr = 0xa10, + .i2c_ext_9548_chan = 0xa14, + .i2c_in_9548_chan = 0xa18, + .i2c_slave = 0xa1c, + .i2c_reg = 0xa20, + .i2c_reg_len = 0xa30, + .i2c_data_len = 0xa34, + .i2c_ctrl = 0xa38, + .i2c_status = 0xa3c, + .i2c_data_buf = 0xa80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00000004, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data3 = { + .adap_nr = 11, + .i2c_timeout = 3000, + .i2c_scale = 0xb00, + .i2c_filter = 0xb04, + .i2c_stretch = 0xb08, + .i2c_ext_9548_exits_flag = 0xb0c, + .i2c_ext_9548_addr = 0xb10, + .i2c_ext_9548_chan = 0xb14, + .i2c_in_9548_chan = 0xb18, + .i2c_slave = 0xb1c, + .i2c_reg = 0xb20, + .i2c_reg_len = 0xb30, + .i2c_data_len = 0xb34, + .i2c_ctrl = 0xb38, + .i2c_status = 0xb3c, + .i2c_data_buf = 0xb80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00000008, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data4 = { + .adap_nr = 12, + .i2c_timeout = 3000, + .i2c_scale = 0xc00, + .i2c_filter = 0xc04, + .i2c_stretch = 0xc08, + .i2c_ext_9548_exits_flag = 0xc0c, + .i2c_ext_9548_addr = 0xc10, + .i2c_ext_9548_chan = 0xc14, + .i2c_in_9548_chan = 0xc18, + .i2c_slave = 0xc1c, + .i2c_reg = 0xc20, + .i2c_reg_len = 0xc30, + .i2c_data_len = 0xc34, + .i2c_ctrl = 0xc38, + .i2c_status = 0xc3c, + .i2c_data_buf = 0xc80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00000010, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data5 = { + .adap_nr = 13, + .i2c_timeout = 3000, + .i2c_scale = 0xd00, + .i2c_filter = 0xd04, + .i2c_stretch = 0xd08, + .i2c_ext_9548_exits_flag = 0xd0c, + .i2c_ext_9548_addr = 0xd10, + .i2c_ext_9548_chan = 0xd14, + .i2c_in_9548_chan = 0xd18, + .i2c_slave = 0xd1c, + .i2c_reg = 0xd20, + .i2c_reg_len = 0xd30, + .i2c_data_len = 0xd34, + .i2c_ctrl = 0xd38, + .i2c_status = 0xd3c, + .i2c_data_buf = 0xd80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00000020, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data6 = { + .adap_nr = 14, + .i2c_timeout = 3000, + .i2c_scale = 0xe00, + .i2c_filter = 0xe04, + .i2c_stretch = 0xe08, + .i2c_ext_9548_exits_flag = 0xe0c, + .i2c_ext_9548_addr = 0xe10, + .i2c_ext_9548_chan = 0xe14, + .i2c_in_9548_chan = 0xe18, + .i2c_slave = 0xe1c, + .i2c_reg = 0xe20, + .i2c_reg_len = 0xe30, + .i2c_data_len = 0xe34, + .i2c_ctrl = 0xe38, + .i2c_status = 0xe3c, + .i2c_data_buf = 0xe80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00000040, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data7 = { + .adap_nr = 15, + .i2c_timeout = 3000, + .i2c_scale = 0xf00, + .i2c_filter = 0xf04, + .i2c_stretch = 0xf08, + .i2c_ext_9548_exits_flag = 0xf0c, + .i2c_ext_9548_addr = 0xf10, + .i2c_ext_9548_chan = 0xf14, + .i2c_in_9548_chan = 0xf18, + .i2c_slave = 0xf1c, + .i2c_reg = 0xf20, + .i2c_reg_len = 0xf30, + .i2c_data_len = 0xf34, + .i2c_ctrl = 0xf38, + .i2c_status = 0xf3c, + .i2c_data_buf = 0xf80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00000080, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data8 = { + .adap_nr = 16, + .i2c_timeout = 3000, + .i2c_scale = 0x1000, + .i2c_filter = 0x1004, + .i2c_stretch = 0x1008, + .i2c_ext_9548_exits_flag = 0x100c, + .i2c_ext_9548_addr = 0x1010, + .i2c_ext_9548_chan = 0x1014, + .i2c_in_9548_chan = 0x1018, + .i2c_slave = 0x101c, + .i2c_reg = 0x1020, + .i2c_reg_len = 0x1030, + .i2c_data_len = 0x1034, + .i2c_ctrl = 0x1038, + .i2c_status = 0x103c, + .i2c_data_buf = 0x1080, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00000100, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data9 = { + .adap_nr = 17, + .i2c_timeout = 3000, + .i2c_scale = 0x1100, + .i2c_filter = 0x1104, + .i2c_stretch = 0x1108, + .i2c_ext_9548_exits_flag = 0x110c, + .i2c_ext_9548_addr = 0x1110, + .i2c_ext_9548_chan = 0x1114, + .i2c_in_9548_chan = 0x1118, + .i2c_slave = 0x111c, + .i2c_reg = 0x1120, + .i2c_reg_len = 0x1130, + .i2c_data_len = 0x1134, + .i2c_ctrl = 0x1138, + .i2c_status = 0x113c, + .i2c_data_buf = 0x1180, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00000200, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data10 = { + .adap_nr = 18, + .i2c_timeout = 3000, + .i2c_scale = 0x1200, + .i2c_filter = 0x1204, + .i2c_stretch = 0x1208, + .i2c_ext_9548_exits_flag = 0x120c, + .i2c_ext_9548_addr = 0x1210, + .i2c_ext_9548_chan = 0x1214, + .i2c_in_9548_chan = 0x1218, + .i2c_slave = 0x121c, + .i2c_reg = 0x1220, + .i2c_reg_len = 0x1230, + .i2c_data_len = 0x1234, + .i2c_ctrl = 0x1238, + .i2c_status = 0x123c, + .i2c_data_buf = 0x1280, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00000400, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data11 = { + .adap_nr = 19, + .i2c_timeout = 3000, + .i2c_scale = 0x1300, + .i2c_filter = 0x1304, + .i2c_stretch = 0x1308, + .i2c_ext_9548_exits_flag = 0x130c, + .i2c_ext_9548_addr = 0x1310, + .i2c_ext_9548_chan = 0x1314, + .i2c_in_9548_chan = 0x1318, + .i2c_slave = 0x131c, + .i2c_reg = 0x1320, + .i2c_reg_len = 0x1330, + .i2c_data_len = 0x1334, + .i2c_ctrl = 0x1338, + .i2c_status = 0x133c, + .i2c_data_buf = 0x1380, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00000800, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data12 = { + .adap_nr = 20, + .i2c_timeout = 3000, + .i2c_scale = 0x1400, + .i2c_filter = 0x1404, + .i2c_stretch = 0x1408, + .i2c_ext_9548_exits_flag = 0x140c, + .i2c_ext_9548_addr = 0x1410, + .i2c_ext_9548_chan = 0x1414, + .i2c_in_9548_chan = 0x1418, + .i2c_slave = 0x141c, + .i2c_reg = 0x1420, + .i2c_reg_len = 0x1430, + .i2c_data_len = 0x1434, + .i2c_ctrl = 0x1438, + .i2c_status = 0x143c, + .i2c_data_buf = 0x1480, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00001000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data13 = { + .adap_nr = 21, + .i2c_timeout = 3000, + .i2c_scale = 0x1500, + .i2c_filter = 0x1504, + .i2c_stretch = 0x1508, + .i2c_ext_9548_exits_flag = 0x150c, + .i2c_ext_9548_addr = 0x1510, + .i2c_ext_9548_chan = 0x1514, + .i2c_in_9548_chan = 0x1518, + .i2c_slave = 0x151c, + .i2c_reg = 0x1520, + .i2c_reg_len = 0x1530, + .i2c_data_len = 0x1534, + .i2c_ctrl = 0x1538, + .i2c_status = 0x153c, + .i2c_data_buf = 0x1580, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00002000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data14 = { + .adap_nr = 22, + .i2c_timeout = 3000, + .i2c_scale = 0x1600, + .i2c_filter = 0x1604, + .i2c_stretch = 0x1608, + .i2c_ext_9548_exits_flag = 0x160c, + .i2c_ext_9548_addr = 0x1610, + .i2c_ext_9548_chan = 0x1614, + .i2c_in_9548_chan = 0x1618, + .i2c_slave = 0x161c, + .i2c_reg = 0x1620, + .i2c_reg_len = 0x1630, + .i2c_data_len = 0x1634, + .i2c_ctrl = 0x1638, + .i2c_status = 0x163c, + .i2c_data_buf = 0x1680, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00004000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data15 = { + .adap_nr = 23, + .i2c_timeout = 3000, + .i2c_scale = 0x1700, + .i2c_filter = 0x1704, + .i2c_stretch = 0x1708, + .i2c_ext_9548_exits_flag = 0x170c, + .i2c_ext_9548_addr = 0x1710, + .i2c_ext_9548_chan = 0x1714, + .i2c_in_9548_chan = 0x1718, + .i2c_slave = 0x171c, + .i2c_reg = 0x1720, + .i2c_reg_len = 0x1730, + .i2c_data_len = 0x1734, + .i2c_ctrl = 0x1738, + .i2c_status = 0x173c, + .i2c_data_buf = 0x1780, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c, + .i2c_reset_on = 0x00008000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data0 = { + .adap_nr = 24, + .i2c_timeout = 3000, + .i2c_scale = 0x100, + .i2c_filter = 0x104, + .i2c_stretch = 0x108, + .i2c_ext_9548_exits_flag = 0x10c, + .i2c_ext_9548_addr = 0x110, + .i2c_ext_9548_chan = 0x114, + .i2c_in_9548_chan = 0x118, + .i2c_slave = 0x11c, + .i2c_reg = 0x120, + .i2c_reg_len = 0x130, + .i2c_data_len = 0x134, + .i2c_ctrl = 0x138, + .i2c_status = 0x13c, + .i2c_data_buf = 0x180, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data1 = { + .adap_nr = 25, + .i2c_timeout = 3000, + .i2c_scale = 0x200, + .i2c_filter = 0x204, + .i2c_stretch = 0x208, + .i2c_ext_9548_exits_flag = 0x20c, + .i2c_ext_9548_addr = 0x210, + .i2c_ext_9548_chan = 0x214, + .i2c_in_9548_chan = 0x218, + .i2c_slave = 0x21c, + .i2c_reg = 0x220, + .i2c_reg_len = 0x230, + .i2c_data_len = 0x234, + .i2c_ctrl = 0x238, + .i2c_status = 0x23c, + .i2c_data_buf = 0x280, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00000002, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data2 = { + .adap_nr = 26, + .i2c_timeout = 3000, + .i2c_scale = 0x300, + .i2c_filter = 0x304, + .i2c_stretch = 0x308, + .i2c_ext_9548_exits_flag = 0x30c, + .i2c_ext_9548_addr = 0x310, + .i2c_ext_9548_chan = 0x314, + .i2c_in_9548_chan = 0x318, + .i2c_slave = 0x31c, + .i2c_reg = 0x320, + .i2c_reg_len = 0x330, + .i2c_data_len = 0x334, + .i2c_ctrl = 0x338, + .i2c_status = 0x33c, + .i2c_data_buf = 0x380, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00000004, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data3 = { + .adap_nr = 27, + .i2c_timeout = 3000, + .i2c_scale = 0x400, + .i2c_filter = 0x404, + .i2c_stretch = 0x408, + .i2c_ext_9548_exits_flag = 0x40c, + .i2c_ext_9548_addr = 0x410, + .i2c_ext_9548_chan = 0x414, + .i2c_in_9548_chan = 0x418, + .i2c_slave = 0x41c, + .i2c_reg = 0x420, + .i2c_reg_len = 0x430, + .i2c_data_len = 0x434, + .i2c_ctrl = 0x438, + .i2c_status = 0x43c, + .i2c_data_buf = 0x480, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00000008, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data4 = { + .adap_nr = 28, + .i2c_timeout = 3000, + .i2c_scale = 0x500, + .i2c_filter = 0x504, + .i2c_stretch = 0x508, + .i2c_ext_9548_exits_flag = 0x50c, + .i2c_ext_9548_addr = 0x510, + .i2c_ext_9548_chan = 0x514, + .i2c_in_9548_chan = 0x518, + .i2c_slave = 0x51c, + .i2c_reg = 0x520, + .i2c_reg_len = 0x530, + .i2c_data_len = 0x534, + .i2c_ctrl = 0x538, + .i2c_status = 0x53c, + .i2c_data_buf = 0x580, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00000010, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data5 = { + .adap_nr = 29, + .i2c_timeout = 3000, + .i2c_scale = 0x600, + .i2c_filter = 0x604, + .i2c_stretch = 0x608, + .i2c_ext_9548_exits_flag = 0x60c, + .i2c_ext_9548_addr = 0x610, + .i2c_ext_9548_chan = 0x614, + .i2c_in_9548_chan = 0x618, + .i2c_slave = 0x61c, + .i2c_reg = 0x620, + .i2c_reg_len = 0x630, + .i2c_data_len = 0x634, + .i2c_ctrl = 0x638, + .i2c_status = 0x63c, + .i2c_data_buf = 0x680, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00000020, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data6 = { + .adap_nr = 30, + .i2c_timeout = 3000, + .i2c_scale = 0x700, + .i2c_filter = 0x704, + .i2c_stretch = 0x708, + .i2c_ext_9548_exits_flag = 0x70c, + .i2c_ext_9548_addr = 0x710, + .i2c_ext_9548_chan = 0x714, + .i2c_in_9548_chan = 0x718, + .i2c_slave = 0x71c, + .i2c_reg = 0x720, + .i2c_reg_len = 0x730, + .i2c_data_len = 0x734, + .i2c_ctrl = 0x738, + .i2c_status = 0x73c, + .i2c_data_buf = 0x780, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00000040, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data7 = { + .adap_nr = 31, + .i2c_timeout = 3000, + .i2c_scale = 0x800, + .i2c_filter = 0x804, + .i2c_stretch = 0x808, + .i2c_ext_9548_exits_flag = 0x80c, + .i2c_ext_9548_addr = 0x810, + .i2c_ext_9548_chan = 0x814, + .i2c_in_9548_chan = 0x818, + .i2c_slave = 0x81c, + .i2c_reg = 0x820, + .i2c_reg_len = 0x830, + .i2c_data_len = 0x834, + .i2c_ctrl = 0x838, + .i2c_status = 0x83c, + .i2c_data_buf = 0x880, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00000080, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data8 = { + .adap_nr = 32, + .i2c_timeout = 3000, + .i2c_scale = 0x900, + .i2c_filter = 0x904, + .i2c_stretch = 0x908, + .i2c_ext_9548_exits_flag = 0x90c, + .i2c_ext_9548_addr = 0x910, + .i2c_ext_9548_chan = 0x914, + .i2c_in_9548_chan = 0x918, + .i2c_slave = 0x91c, + .i2c_reg = 0x920, + .i2c_reg_len = 0x930, + .i2c_data_len = 0x934, + .i2c_ctrl = 0x938, + .i2c_status = 0x93c, + .i2c_data_buf = 0x980, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00000100, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data9 = { + .adap_nr = 33, + .i2c_timeout = 3000, + .i2c_scale = 0xa00, + .i2c_filter = 0xa04, + .i2c_stretch = 0xa08, + .i2c_ext_9548_exits_flag = 0xa0c, + .i2c_ext_9548_addr = 0xa10, + .i2c_ext_9548_chan = 0xa14, + .i2c_in_9548_chan = 0xa18, + .i2c_slave = 0xa1c, + .i2c_reg = 0xa20, + .i2c_reg_len = 0xa30, + .i2c_data_len = 0xa34, + .i2c_ctrl = 0xa38, + .i2c_status = 0xa3c, + .i2c_data_buf = 0xa80, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00000200, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data10 = { + .adap_nr = 34, + .i2c_timeout = 3000, + .i2c_scale = 0xb00, + .i2c_filter = 0xb04, + .i2c_stretch = 0xb08, + .i2c_ext_9548_exits_flag = 0xb0c, + .i2c_ext_9548_addr = 0xb10, + .i2c_ext_9548_chan = 0xb14, + .i2c_in_9548_chan = 0xb18, + .i2c_slave = 0xb1c, + .i2c_reg = 0xb20, + .i2c_reg_len = 0xb30, + .i2c_data_len = 0xb34, + .i2c_ctrl = 0xb38, + .i2c_status = 0xb3c, + .i2c_data_buf = 0xb80, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00000400, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data11 = { + .adap_nr = 35, + .i2c_timeout = 3000, + .i2c_scale = 0xc00, + .i2c_filter = 0xc04, + .i2c_stretch = 0xc08, + .i2c_ext_9548_exits_flag = 0xc0c, + .i2c_ext_9548_addr = 0xc10, + .i2c_ext_9548_chan = 0xc14, + .i2c_in_9548_chan = 0xc18, + .i2c_slave = 0xc1c, + .i2c_reg = 0xc20, + .i2c_reg_len = 0xc30, + .i2c_data_len = 0xc34, + .i2c_ctrl = 0xc38, + .i2c_status = 0xc3c, + .i2c_data_buf = 0xc80, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00000800, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data12 = { + .adap_nr = 36, + .i2c_timeout = 3000, + .i2c_scale = 0xd00, + .i2c_filter = 0xd04, + .i2c_stretch = 0xd08, + .i2c_ext_9548_exits_flag = 0xd0c, + .i2c_ext_9548_addr = 0xd10, + .i2c_ext_9548_chan = 0xd14, + .i2c_in_9548_chan = 0xd18, + .i2c_slave = 0xd1c, + .i2c_reg = 0xd20, + .i2c_reg_len = 0xd30, + .i2c_data_len = 0xd34, + .i2c_ctrl = 0xd38, + .i2c_status = 0xd3c, + .i2c_data_buf = 0xd80, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00001000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data13 = { + .adap_nr = 37, + .i2c_timeout = 3000, + .i2c_scale = 0xe00, + .i2c_filter = 0xe04, + .i2c_stretch = 0xe08, + .i2c_ext_9548_exits_flag = 0xe0c, + .i2c_ext_9548_addr = 0xe10, + .i2c_ext_9548_chan = 0xe14, + .i2c_in_9548_chan = 0xe18, + .i2c_slave = 0xe1c, + .i2c_reg = 0xe20, + .i2c_reg_len = 0xe30, + .i2c_data_len = 0xe34, + .i2c_ctrl = 0xe38, + .i2c_status = 0xe3c, + .i2c_data_buf = 0xe80, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00002000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data14 = { + .adap_nr = 38, + .i2c_timeout = 3000, + .i2c_scale = 0xf00, + .i2c_filter = 0xf04, + .i2c_stretch = 0xf08, + .i2c_ext_9548_exits_flag = 0xf0c, + .i2c_ext_9548_addr = 0xf10, + .i2c_ext_9548_chan = 0xf14, + .i2c_in_9548_chan = 0xf18, + .i2c_slave = 0xf1c, + .i2c_reg = 0xf20, + .i2c_reg_len = 0xf30, + .i2c_data_len = 0xf34, + .i2c_ctrl = 0xf38, + .i2c_status = 0xf3c, + .i2c_data_buf = 0xf80, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00004000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data15 = { + .adap_nr = 39, + .i2c_timeout = 3000, + .i2c_scale = 0x1000, + .i2c_filter = 0x1004, + .i2c_stretch = 0x1008, + .i2c_ext_9548_exits_flag = 0x100c, + .i2c_ext_9548_addr = 0x1010, + .i2c_ext_9548_chan = 0x1014, + .i2c_in_9548_chan = 0x1018, + .i2c_slave = 0x101c, + .i2c_reg = 0x1020, + .i2c_reg_len = 0x1030, + .i2c_data_len = 0x1034, + .i2c_ctrl = 0x1038, + .i2c_status = 0x103c, + .i2c_data_buf = 0x1080, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00008000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data16 = { + .adap_nr = 40, + .i2c_timeout = 3000, + .i2c_scale = 0x1100, + .i2c_filter = 0x1104, + .i2c_stretch = 0x1108, + .i2c_ext_9548_exits_flag = 0x110c, + .i2c_ext_9548_addr = 0x1110, + .i2c_ext_9548_chan = 0x1114, + .i2c_in_9548_chan = 0x1118, + .i2c_slave = 0x111c, + .i2c_reg = 0x1120, + .i2c_reg_len = 0x1130, + .i2c_data_len = 0x1134, + .i2c_ctrl = 0x1138, + .i2c_status = 0x113c, + .i2c_data_buf = 0x1180, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00010000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data17 = { + .adap_nr = 41, + .i2c_timeout = 3000, + .i2c_scale = 0x1200, + .i2c_filter = 0x1204, + .i2c_stretch = 0x1208, + .i2c_ext_9548_exits_flag = 0x120c, + .i2c_ext_9548_addr = 0x1210, + .i2c_ext_9548_chan = 0x1214, + .i2c_in_9548_chan = 0x1218, + .i2c_slave = 0x121c, + .i2c_reg = 0x1220, + .i2c_reg_len = 0x1230, + .i2c_data_len = 0x1234, + .i2c_ctrl = 0x1238, + .i2c_status = 0x123c, + .i2c_data_buf = 0x1280, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00020000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data18 = { + .adap_nr = 42, + .i2c_timeout = 3000, + .i2c_scale = 0x1300, + .i2c_filter = 0x1304, + .i2c_stretch = 0x1308, + .i2c_ext_9548_exits_flag = 0x130c, + .i2c_ext_9548_addr = 0x1310, + .i2c_ext_9548_chan = 0x1314, + .i2c_in_9548_chan = 0x1318, + .i2c_slave = 0x131c, + .i2c_reg = 0x1320, + .i2c_reg_len = 0x1330, + .i2c_data_len = 0x1334, + .i2c_ctrl = 0x1338, + .i2c_status = 0x133c, + .i2c_data_buf = 0x1380, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00040000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data19 = { + .adap_nr = 43, + .i2c_timeout = 3000, + .i2c_scale = 0x1400, + .i2c_filter = 0x1404, + .i2c_stretch = 0x1408, + .i2c_ext_9548_exits_flag = 0x140c, + .i2c_ext_9548_addr = 0x1410, + .i2c_ext_9548_chan = 0x1414, + .i2c_in_9548_chan = 0x1418, + .i2c_slave = 0x141c, + .i2c_reg = 0x1420, + .i2c_reg_len = 0x1430, + .i2c_data_len = 0x1434, + .i2c_ctrl = 0x1438, + .i2c_status = 0x143c, + .i2c_data_buf = 0x1480, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00080000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data20 = { + .adap_nr = 44, + .i2c_timeout = 3000, + .i2c_scale = 0x1500, + .i2c_filter = 0x1504, + .i2c_stretch = 0x1508, + .i2c_ext_9548_exits_flag = 0x150c, + .i2c_ext_9548_addr = 0x1510, + .i2c_ext_9548_chan = 0x1514, + .i2c_in_9548_chan = 0x1518, + .i2c_slave = 0x151c, + .i2c_reg = 0x1520, + .i2c_reg_len = 0x1530, + .i2c_data_len = 0x1534, + .i2c_ctrl = 0x1538, + .i2c_status = 0x153c, + .i2c_data_buf = 0x1580, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00100000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data21 = { + .adap_nr = 45, + .i2c_timeout = 3000, + .i2c_scale = 0x1600, + .i2c_filter = 0x1604, + .i2c_stretch = 0x1608, + .i2c_ext_9548_exits_flag = 0x160c, + .i2c_ext_9548_addr = 0x1610, + .i2c_ext_9548_chan = 0x1614, + .i2c_in_9548_chan = 0x1618, + .i2c_slave = 0x161c, + .i2c_reg = 0x1620, + .i2c_reg_len = 0x1630, + .i2c_data_len = 0x1634, + .i2c_ctrl = 0x1638, + .i2c_status = 0x163c, + .i2c_data_buf = 0x1680, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00200000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data22 = { + .adap_nr = 46, + .i2c_timeout = 3000, + .i2c_scale = 0x1700, + .i2c_filter = 0x1704, + .i2c_stretch = 0x1708, + .i2c_ext_9548_exits_flag = 0x170c, + .i2c_ext_9548_addr = 0x1710, + .i2c_ext_9548_chan = 0x1714, + .i2c_in_9548_chan = 0x1718, + .i2c_slave = 0x171c, + .i2c_reg = 0x1720, + .i2c_reg_len = 0x1730, + .i2c_data_len = 0x1734, + .i2c_ctrl = 0x1738, + .i2c_status = 0x173c, + .i2c_data_buf = 0x1780, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00400000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data23 = { + .adap_nr = 47, + .i2c_timeout = 3000, + .i2c_scale = 0x1800, + .i2c_filter = 0x1804, + .i2c_stretch = 0x1808, + .i2c_ext_9548_exits_flag = 0x180c, + .i2c_ext_9548_addr = 0x1810, + .i2c_ext_9548_chan = 0x1814, + .i2c_in_9548_chan = 0x1818, + .i2c_slave = 0x181c, + .i2c_reg = 0x1820, + .i2c_reg_len = 0x1830, + .i2c_data_len = 0x1834, + .i2c_ctrl = 0x1838, + .i2c_status = 0x183c, + .i2c_data_buf = 0x1880, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x00800000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data24 = { + .adap_nr = 48, + .i2c_timeout = 3000, + .i2c_scale = 0x1900, + .i2c_filter = 0x1904, + .i2c_stretch = 0x1908, + .i2c_ext_9548_exits_flag = 0x190c, + .i2c_ext_9548_addr = 0x1910, + .i2c_ext_9548_chan = 0x1914, + .i2c_in_9548_chan = 0x1918, + .i2c_slave = 0x191c, + .i2c_reg = 0x1920, + .i2c_reg_len = 0x1930, + .i2c_data_len = 0x1934, + .i2c_ctrl = 0x1938, + .i2c_status = 0x193c, + .i2c_data_buf = 0x1980, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x01000000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data25 = { + .adap_nr = 49, + .i2c_timeout = 3000, + .i2c_scale = 0x1a00, + .i2c_filter = 0x1a04, + .i2c_stretch = 0x1a08, + .i2c_ext_9548_exits_flag = 0x1a0c, + .i2c_ext_9548_addr = 0x1a10, + .i2c_ext_9548_chan = 0x1a14, + .i2c_in_9548_chan = 0x1a18, + .i2c_slave = 0x1a1c, + .i2c_reg = 0x1a20, + .i2c_reg_len = 0x1a30, + .i2c_data_len = 0x1a34, + .i2c_ctrl = 0x1a38, + .i2c_status = 0x1a3c, + .i2c_data_buf = 0x1a80, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x02000000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data26 = { + .adap_nr = 50, + .i2c_timeout = 3000, + .i2c_scale = 0x1b00, + .i2c_filter = 0x1b04, + .i2c_stretch = 0x1b08, + .i2c_ext_9548_exits_flag = 0x1b0c, + .i2c_ext_9548_addr = 0x1b10, + .i2c_ext_9548_chan = 0x1b14, + .i2c_in_9548_chan = 0x1b18, + .i2c_slave = 0x1b1c, + .i2c_reg = 0x1b20, + .i2c_reg_len = 0x1b30, + .i2c_data_len = 0x1b34, + .i2c_ctrl = 0x1b38, + .i2c_status = 0x1b3c, + .i2c_data_buf = 0x1b80, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x04000000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data27 = { + .adap_nr = 51, + .i2c_timeout = 3000, + .i2c_scale = 0x1c00, + .i2c_filter = 0x1c04, + .i2c_stretch = 0x1c08, + .i2c_ext_9548_exits_flag = 0x1c0c, + .i2c_ext_9548_addr = 0x1c10, + .i2c_ext_9548_chan = 0x1c14, + .i2c_in_9548_chan = 0x1c18, + .i2c_slave = 0x1c1c, + .i2c_reg = 0x1c20, + .i2c_reg_len = 0x1c30, + .i2c_data_len = 0x1c34, + .i2c_ctrl = 0x1c38, + .i2c_status = 0x1c3c, + .i2c_data_buf = 0x1c80, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x08000000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data28 = { + .adap_nr = 52, + .i2c_timeout = 3000, + .i2c_scale = 0x1d00, + .i2c_filter = 0x1d04, + .i2c_stretch = 0x1d08, + .i2c_ext_9548_exits_flag = 0x1d0c, + .i2c_ext_9548_addr = 0x1d10, + .i2c_ext_9548_chan = 0x1d14, + .i2c_in_9548_chan = 0x1d18, + .i2c_slave = 0x1d1c, + .i2c_reg = 0x1d20, + .i2c_reg_len = 0x1d30, + .i2c_data_len = 0x1d34, + .i2c_ctrl = 0x1d38, + .i2c_status = 0x1d3c, + .i2c_data_buf = 0x1d80, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x10000000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data29 = { + .adap_nr = 53, + .i2c_timeout = 3000, + .i2c_scale = 0x1e00, + .i2c_filter = 0x1e04, + .i2c_stretch = 0x1e08, + .i2c_ext_9548_exits_flag = 0x1e0c, + .i2c_ext_9548_addr = 0x1e10, + .i2c_ext_9548_chan = 0x1e14, + .i2c_in_9548_chan = 0x1e18, + .i2c_slave = 0x1e1c, + .i2c_reg = 0x1e20, + .i2c_reg_len = 0x1e30, + .i2c_data_len = 0x1e34, + .i2c_ctrl = 0x1e38, + .i2c_status = 0x1e3c, + .i2c_data_buf = 0x1e80, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x20000000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data30 = { + .adap_nr = 54, + .i2c_timeout = 3000, + .i2c_scale = 0x1f00, + .i2c_filter = 0x1f04, + .i2c_stretch = 0x1f08, + .i2c_ext_9548_exits_flag = 0x1f0c, + .i2c_ext_9548_addr = 0x1f10, + .i2c_ext_9548_chan = 0x1f14, + .i2c_in_9548_chan = 0x1f18, + .i2c_slave = 0x1f1c, + .i2c_reg = 0x1f20, + .i2c_reg_len = 0x1f30, + .i2c_data_len = 0x1f34, + .i2c_ctrl = 0x1f38, + .i2c_status = 0x1f3c, + .i2c_data_buf = 0x1f80, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x40000000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data31 = { + .adap_nr = 55, + .i2c_timeout = 3000, + .i2c_scale = 0x2000, + .i2c_filter = 0x2004, + .i2c_stretch = 0x2008, + .i2c_ext_9548_exits_flag = 0x200c, + .i2c_ext_9548_addr = 0x2010, + .i2c_ext_9548_chan = 0x2014, + .i2c_in_9548_chan = 0x2018, + .i2c_slave = 0x201c, + .i2c_reg = 0x2020, + .i2c_reg_len = 0x2030, + .i2c_data_len = 0x2034, + .i2c_ctrl = 0x2038, + .i2c_status = 0x203c, + .i2c_data_buf = 0x2080, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x1c, + .i2c_reset_on = 0x80000000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_i2c_bus_device_data0 = { + .adap_nr = 56, + .i2c_timeout = 3000, + .i2c_scale = 0x2100, + .i2c_filter = 0x2104, + .i2c_stretch = 0x2108, + .i2c_ext_9548_exits_flag = 0x210c, + .i2c_ext_9548_addr = 0x2110, + .i2c_ext_9548_chan = 0x2114, + .i2c_in_9548_chan = 0x2118, + .i2c_slave = 0x211c, + .i2c_reg = 0x2120, + .i2c_reg_len = 0x2130, + .i2c_data_len = 0x2134, + .i2c_ctrl = 0x2138, + .i2c_status = 0x213c, + .i2c_data_buf = 0x2180, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x3c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_i2c_bus_device_data1 = { + .adap_nr = 57, + .i2c_timeout = 3000, + .i2c_scale = 0x2200, + .i2c_filter = 0x2204, + .i2c_stretch = 0x2208, + .i2c_ext_9548_exits_flag = 0x220c, + .i2c_ext_9548_addr = 0x2210, + .i2c_ext_9548_chan = 0x2214, + .i2c_in_9548_chan = 0x2218, + .i2c_slave = 0x221c, + .i2c_reg = 0x2220, + .i2c_reg_len = 0x2230, + .i2c_data_len = 0x2234, + .i2c_ctrl = 0x2238, + .i2c_status = 0x223c, + .i2c_data_buf = 0x2280, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x3c, + .i2c_reset_on = 0x00000002, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static void wb_fpga_i2c_bus_device_release(struct device *dev) +{ + return; +} + +static struct platform_device fpga_i2c_bus_device[] = { + { + .name = "wb-fpga-i2c", + .id = 1, + .dev = { + .platform_data = &fpga_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 2, + .dev = { + .platform_data = &fpga_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 3, + .dev = { + .platform_data = &fpga_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 4, + .dev = { + .platform_data = &fpga_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 5, + .dev = { + .platform_data = &fpga_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 6, + .dev = { + .platform_data = &fpga_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 7, + .dev = { + .platform_data = &fpga_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 8, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 9, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 10, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 11, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 12, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 13, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 14, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 15, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 16, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data8, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 17, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data9, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 18, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data10, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 19, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data11, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 20, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data12, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 21, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data13, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 22, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data14, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 23, + .dev = { + .platform_data = &fpga_dom_i2c_bus_device_data15, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 24, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 25, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 26, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 27, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 28, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 29, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 30, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 31, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 32, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data8, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 33, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data9, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 34, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data10, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 35, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data11, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 36, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data12, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 37, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data13, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 38, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data14, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 39, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data15, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 40, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data16, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 41, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data17, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 42, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data18, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 43, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data19, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 44, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data20, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 45, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data21, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 46, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data22, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 47, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data23, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 48, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data24, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 49, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data25, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 50, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data26, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 51, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data27, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 52, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data28, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 53, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data29, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 54, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data30, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 55, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data31, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 56, + .dev = { + .platform_data = &fpga1_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 57, + .dev = { + .platform_data = &fpga1_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, +}; + +static int __init wb_fpga_i2c_bus_device_init(void) +{ + int i; + int ret = 0; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + ret = platform_device_register(&fpga_i2c_bus_device[i]); + if (ret < 0) { + fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-fpga-i2c.%d register failed!\n", i + 1); + } else { + fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_fpga_i2c_bus_device_exit(void) +{ + int i; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&fpga_i2c_bus_device[i]); + } + } +} + +module_init(wb_fpga_i2c_bus_device_init); +module_exit(wb_fpga_i2c_bus_device_exit); +MODULE_DESCRIPTION("FPGA I2C Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c new file mode 100644 index 00000000000..ecb84604767 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c @@ -0,0 +1,832 @@ +/* + * An wb_fpga_pca954x_device driver for fpga pca954x device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_fpga_pca954x_device_debug = 0; +static int g_wb_fpga_pca954x_device_error = 0; + +module_param(g_wb_fpga_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_fpga_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_fpga_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_FPGA_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_FPGA_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_fpga_pca954x_device_error) { \ + printk(KERN_ERR "[WB_FPGA_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static fpga_pca954x_device_t fpga_pca954x_device_data0 = { + .i2c_bus = 2, + .i2c_addr = 0x70, + .pca9548_base_nr = 74, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data1 = { + .i2c_bus = 74, + .i2c_addr = 0x77, + .pca9548_base_nr = 75, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data2 = { + .i2c_bus = 199, + .i2c_addr = 0x70, + .pca9548_base_nr = 200, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data3 = { + .i2c_bus = 200, + .i2c_addr = 0x76, + .pca9548_base_nr = 83, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data4 = { + .i2c_bus = 3, + .i2c_addr = 0x70, + .pca9548_base_nr = 91, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data5 = { + .i2c_bus = 91, + .i2c_addr = 0x77, + .pca9548_base_nr = 92, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data6 = { + .i2c_bus = 4, + .i2c_addr = 0x70, + .pca9548_base_nr = 100, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data7 = { + .i2c_bus = 100, + .i2c_addr = 0x77, + .pca9548_base_nr = 101, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data8 = { + .i2c_bus = 5, + .i2c_addr = 0x77, + .pca9548_base_nr = 109, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data9 = { + .i2c_bus = 6, + .i2c_addr = 0x77, + .pca9548_base_nr = 117, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data10 = { + .i2c_bus = 7, + .i2c_addr = 0x77, + .pca9548_base_nr = 125, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data11 = { + .i2c_bus = 8, + .i2c_addr = 0x70, + .pca9548_base_nr = 133, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data12 = { + .i2c_bus = 9, + .i2c_addr = 0x70, + .pca9548_base_nr = 137, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data13 = { + .i2c_bus = 10, + .i2c_addr = 0x70, + .pca9548_base_nr = 141, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data14 = { + .i2c_bus = 11, + .i2c_addr = 0x70, + .pca9548_base_nr = 145, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data15 = { + .i2c_bus = 12, + .i2c_addr = 0x70, + .pca9548_base_nr = 149, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data16 = { + .i2c_bus = 13, + .i2c_addr = 0x70, + .pca9548_base_nr = 153, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data17 = { + .i2c_bus = 14, + .i2c_addr = 0x70, + .pca9548_base_nr = 157, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data18 = { + .i2c_bus = 15, + .i2c_addr = 0x70, + .pca9548_base_nr = 161, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data19 = { + .i2c_bus = 16, + .i2c_addr = 0x70, + .pca9548_base_nr = 165, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data20 = { + .i2c_bus = 17, + .i2c_addr = 0x70, + .pca9548_base_nr = 169, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data21 = { + .i2c_bus = 18, + .i2c_addr = 0x70, + .pca9548_base_nr = 173, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data22 = { + .i2c_bus = 19, + .i2c_addr = 0x70, + .pca9548_base_nr = 177, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data23 = { + .i2c_bus = 20, + .i2c_addr = 0x70, + .pca9548_base_nr = 181, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data24 = { + .i2c_bus = 21, + .i2c_addr = 0x70, + .pca9548_base_nr = 185, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data25 = { + .i2c_bus = 22, + .i2c_addr = 0x70, + .pca9548_base_nr = 189, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data26 = { + .i2c_bus = 23, + .i2c_addr = 0x70, + .pca9548_base_nr = 193, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data27 = { + .i2c_bus = 24, + .i2c_addr = 0x70, + .pca9548_base_nr = 135, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data28 = { + .i2c_bus = 25, + .i2c_addr = 0x70, + .pca9548_base_nr = 136, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data29 = { + .i2c_bus = 26, + .i2c_addr = 0x70, + .pca9548_base_nr = 139, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data30 = { + .i2c_bus = 27, + .i2c_addr = 0x70, + .pca9548_base_nr = 140, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data31 = { + .i2c_bus = 28, + .i2c_addr = 0x70, + .pca9548_base_nr = 143, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data32 = { + .i2c_bus = 29, + .i2c_addr = 0x70, + .pca9548_base_nr = 144, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data33 = { + .i2c_bus = 30, + .i2c_addr = 0x70, + .pca9548_base_nr = 147, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data34 = { + .i2c_bus = 31, + .i2c_addr = 0x70, + .pca9548_base_nr = 148, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data35 = { + .i2c_bus = 32, + .i2c_addr = 0x70, + .pca9548_base_nr = 151, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data36 = { + .i2c_bus = 33, + .i2c_addr = 0x70, + .pca9548_base_nr = 152, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data37 = { + .i2c_bus = 34, + .i2c_addr = 0x70, + .pca9548_base_nr = 155, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data38 = { + .i2c_bus = 35, + .i2c_addr = 0x70, + .pca9548_base_nr = 156, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data39 = { + .i2c_bus = 36, + .i2c_addr = 0x70, + .pca9548_base_nr = 159, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data40 = { + .i2c_bus = 37, + .i2c_addr = 0x70, + .pca9548_base_nr = 160, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data41 = { + .i2c_bus = 38, + .i2c_addr = 0x70, + .pca9548_base_nr = 163, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data42 = { + .i2c_bus = 39, + .i2c_addr = 0x70, + .pca9548_base_nr = 164, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data43 = { + .i2c_bus = 40, + .i2c_addr = 0x70, + .pca9548_base_nr = 167, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data44 = { + .i2c_bus = 41, + .i2c_addr = 0x70, + .pca9548_base_nr = 168, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data45 = { + .i2c_bus = 42, + .i2c_addr = 0x70, + .pca9548_base_nr = 171, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data46 = { + .i2c_bus = 43, + .i2c_addr = 0x70, + .pca9548_base_nr = 172, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data47 = { + .i2c_bus = 44, + .i2c_addr = 0x70, + .pca9548_base_nr = 175, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data48 = { + .i2c_bus = 45, + .i2c_addr = 0x70, + .pca9548_base_nr = 176, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data49 = { + .i2c_bus = 46, + .i2c_addr = 0x70, + .pca9548_base_nr = 179, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data50 = { + .i2c_bus = 47, + .i2c_addr = 0x70, + .pca9548_base_nr = 180, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data51 = { + .i2c_bus = 48, + .i2c_addr = 0x70, + .pca9548_base_nr = 183, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data52 = { + .i2c_bus = 49, + .i2c_addr = 0x70, + .pca9548_base_nr = 184, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data53 = { + .i2c_bus = 50, + .i2c_addr = 0x70, + .pca9548_base_nr = 187, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data54 = { + .i2c_bus = 51, + .i2c_addr = 0x70, + .pca9548_base_nr = 188, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data55 = { + .i2c_bus = 52, + .i2c_addr = 0x70, + .pca9548_base_nr = 191, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data56 = { + .i2c_bus = 53, + .i2c_addr = 0x70, + .pca9548_base_nr = 192, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data57 = { + .i2c_bus = 54, + .i2c_addr = 0x70, + .pca9548_base_nr = 195, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data58 = { + .i2c_bus = 55, + .i2c_addr = 0x70, + .pca9548_base_nr = 196, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data59 = { + .i2c_bus = 56, + .i2c_addr = 0x70, + .pca9548_base_nr = 197, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data60 = { + .i2c_bus = 57, + .i2c_addr = 0x70, + .pca9548_base_nr = 198, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +struct i2c_board_info fpga_pca954x_device_info[] = { + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data0, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data1, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data2, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data3, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data4, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data5, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data6, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data7, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data8, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data9, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data10, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data11, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data12, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data13, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data14, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data15, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data16, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data17, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data18, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data19, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data20, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data21, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data22, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data23, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data24, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data25, + }, + { + .type = "wb_fpga_pca9542", + .platform_data = &fpga_pca954x_device_data26, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data27, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data28, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data29, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data30, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data31, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data32, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data33, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data34, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data35, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data36, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data37, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data38, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data39, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data40, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data41, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data42, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data43, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data44, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data45, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data46, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data47, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data48, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data49, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data50, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data51, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data52, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data53, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data54, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data55, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data56, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data57, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data58, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data59, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data60, + }, +}; + +static int __init wb_fpga_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus); + if (adap == NULL) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]); + if (!client) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n", + fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus); + } else { + fpga_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_fpga_pca954x_device_exit(void) +{ + int i; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + if (fpga_pca954x_device_data->client) { + i2c_unregister_device(fpga_pca954x_device_data->client); + fpga_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_fpga_pca954x_device_init); +module_exit(wb_fpga_pca954x_device_exit); +MODULE_DESCRIPTION("FPGA PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c new file mode 100644 index 00000000000..0f97f8f5e04 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c @@ -0,0 +1,190 @@ +/* + * An wb_io_dev_device driver for io device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_dev_device_debug = 0; +static int g_wb_i2c_dev_device_error = 0; + +module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_dev_device_debug) { \ + printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_dev_device_error) { \ + printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_dev_device_t i2c_dev_device_data0 = { + .i2c_bus = 109, + .i2c_addr = 0x1d, + .i2c_name = "cpld4", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data1 = { + .i2c_bus = 110, + .i2c_addr = 0x2d, + .i2c_name = "cpld5", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data2 = { + .i2c_bus = 111, + .i2c_addr = 0x3d, + .i2c_name = "cpld6", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data3 = { + .i2c_bus = 112, + .i2c_addr = 0x4d, + .i2c_name = "cpld7", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data4 = { + .i2c_bus = 92, + .i2c_addr = 0x0d, + .i2c_name = "cpld8", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data5 = { + .i2c_bus = 101, + .i2c_addr = 0x0d, + .i2c_name = "cpld9", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +struct i2c_board_info i2c_dev_device_info[] = { + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data0, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data1, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data2, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data3, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data4, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data5, + }, +}; + +static int __init wb_i2c_dev_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus); + if (adap == NULL) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); + if (!client) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", + i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); + } else { + i2c_dev_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_dev_device_exit(void) +{ + int i; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + if (i2c_dev_device_data->client) { + i2c_unregister_device(i2c_dev_device_data->client); + i2c_dev_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_dev_device_init); +module_exit(wb_i2c_dev_device_exit); +MODULE_DESCRIPTION("I2C DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c new file mode 100644 index 00000000000..dc54dee29fc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c @@ -0,0 +1,146 @@ +/* + * An wb_i2c_mux_pca954x_device driver for pca954x i2c load device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_mux_pca954x_device_debug = 0; +static int g_wb_i2c_mux_pca954x_device_error = 0; + +module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_error) { \ + printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = { + .i2c_bus = 1, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 1, + .close_chan_force_reset = 1, + .pca9548_base_nr = 58, + .pca9548_reset_type = PCA9548_RESET_IO, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .io_attr.io_addr = 0x915, + .io_attr.mask = 0x20, + .io_attr.reset_on = 0, + .io_attr.reset_off = 0x20, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = { + .i2c_bus = 1, + .i2c_addr = 0x73, + .probe_disable = 1, + .select_chan_check = 1, + .close_chan_force_reset = 1, + .pca9548_base_nr = 66, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga1", + .file_attr.offset = 0x40, + .file_attr.mask = 0x1, + .file_attr.reset_on = 0x0, + .file_attr.reset_off = 0x1, + }, +}; + +struct i2c_board_info i2c_mux_pca954x_device_info[] = { + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data0, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data1, + }, +}; + +static int __init wb_i2c_mux_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus); + if (adap == NULL) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); + if (!client) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", + i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); + } else { + i2c_mux_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_mux_pca954x_device_exit(void) +{ + int i; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + if (i2c_mux_pca954x_device_data->client) { + i2c_unregister_device(i2c_mux_pca954x_device_data->client); + i2c_mux_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_mux_pca954x_device_init); +module_exit(wb_i2c_mux_pca954x_device_exit); +MODULE_DESCRIPTION("WB I2C MUX PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_io_dev_device.c new file mode 100644 index 00000000000..ae7ff5523f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_io_dev_device.c @@ -0,0 +1,138 @@ +/* + * An wb_io_dev_device driver for io device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_io_dev_device_debug = 0; +static int g_wb_io_dev_device_error = 0; + +module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_io_dev_device_debug) { \ + printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_io_dev_device_error) { \ + printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static io_dev_device_t io_dev_device_data0 = { + .io_dev_name = "cpld0", + .io_base = 0x700, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static io_dev_device_t io_dev_device_data1 = { + .io_dev_name = "cpld1", + .io_base = 0x900, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static io_dev_device_t io_dev_device_data2 = { + .io_dev_name = "cpld2", + .io_base = 0xb00, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static void wb_io_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device io_dev_device[] = { + { + .name = "wb-io-dev", + .id = 1, + .dev = { + .platform_data = &io_dev_device_data0, + .release = wb_io_dev_device_release, + }, + }, + { + .name = "wb-io-dev", + .id = 2, + .dev = { + .platform_data = &io_dev_device_data1, + .release = wb_io_dev_device_release, + }, + }, + { + .name = "wb-io-dev", + .id = 3, + .dev = { + .platform_data = &io_dev_device_data2, + .release = wb_io_dev_device_release, + }, + }, +}; + +static int __init wb_io_dev_device_init(void) +{ + int i; + int ret = 0; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + ret = platform_device_register(&io_dev_device[i]); + if (ret < 0) { + io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1); + } else { + io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_io_dev_device_exit(void) +{ + int i; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&io_dev_device[i]); + } + } +} + +module_init(wb_io_dev_device_init); +module_exit(wb_io_dev_device_exit); +MODULE_DESCRIPTION("IO DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_lpc_drv_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_lpc_drv_device.c new file mode 100644 index 00000000000..363d670d5a9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_lpc_drv_device.c @@ -0,0 +1,150 @@ +/* + * An wb_i2c_ocores_device driver for i2c ocore device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_lpc_drv_device_debug = 0; +static int g_wb_lpc_drv_device_error = 0; + +module_param(g_wb_lpc_drv_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_lpc_drv_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_LPC_DRV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_lpc_drv_device_debug) { \ + printk(KERN_INFO "[WB_LPC_DRV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_LPC_DRV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_lpc_drv_device_error) { \ + printk(KERN_ERR "[WB_LPC_DRV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static lpc_drv_device_t lpc_drv_device_data_0 = { + .lpc_io_name = "wb_lpc", + .pci_domain = 0x0000, + .pci_bus = 0x00, + .pci_slot = 0x1f, + .pci_fn = 0, + .lpc_io_base = 0x700, + .lpc_io_size = 0x100, + .lpc_gen_dec = 0x84, +}; + +static lpc_drv_device_t lpc_drv_device_data_1 = { + .lpc_io_name = "wb_lpc", + .pci_domain = 0x0000, + .pci_bus = 0x00, + .pci_slot = 0x1f, + .pci_fn = 0, + .lpc_io_base = 0x900, + .lpc_io_size = 0x100, + .lpc_gen_dec = 0x88, +}; + +static lpc_drv_device_t lpc_drv_device_data_2 = { + .lpc_io_name = "wb_lpc", + .pci_domain = 0x0000, + .pci_bus = 0x00, + .pci_slot = 0x1f, + .pci_fn = 0, + .lpc_io_base = 0xb00, + .lpc_io_size = 0x100, + .lpc_gen_dec = 0x90, +}; + +static void wb_lpc_drv_device_release(struct device *dev) +{ + return; +} + +static struct platform_device lpc_drv_device[] = { + { + .name = "wb-lpc", + .id = 1, + .dev = { + .platform_data = &lpc_drv_device_data_0, + .release = wb_lpc_drv_device_release, + }, + }, + { + .name = "wb-lpc", + .id = 2, + .dev = { + .platform_data = &lpc_drv_device_data_1, + .release = wb_lpc_drv_device_release, + }, + }, + { + .name = "wb-lpc", + .id = 3, + .dev = { + .platform_data = &lpc_drv_device_data_2, + .release = wb_lpc_drv_device_release, + }, + }, +}; + +static int __init wb_lpc_drv_device_init(void) +{ + int i; + int ret = 0; + lpc_drv_device_t *lpc_drv_device_data; + + WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(lpc_drv_device); i++) { + lpc_drv_device_data = lpc_drv_device[i].dev.platform_data; + ret = platform_device_register(&lpc_drv_device[i]); + if (ret < 0) { + lpc_drv_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-lpc.%d register failed!\n", i + 1); + } else { + lpc_drv_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_lpc_drv_device_exit(void) +{ + int i; + lpc_drv_device_t *lpc_drv_device_data; + + WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(lpc_drv_device) - 1; i >= 0; i--) { + lpc_drv_device_data = lpc_drv_device[i].dev.platform_data; + if (lpc_drv_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&lpc_drv_device[i]); + } + } +} + +module_init(wb_lpc_drv_device_init); +module_exit(wb_lpc_drv_device_exit); +MODULE_DESCRIPTION("LPC DRV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_pcie_dev_device.c new file mode 100644 index 00000000000..561e64d449b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_pcie_dev_device.c @@ -0,0 +1,113 @@ +/* + * An wb_pcie_dev_device driver for pcie device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_pcie_dev_device_debug = 0; +static int g_wb_pcie_dev_device_error = 0; + +module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_pcie_dev_device_debug) { \ + printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_pcie_dev_device_error) { \ + printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static pci_dev_device_t pcie_dev_device_data0 = { + .pci_dev_name = "fpga0", + .pci_domain = 0x0000, + .pci_bus = 0x08, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, + .upg_ctrl_base = 0xa00, + .upg_flash_base = 0x2f0000, +}; + +static void wb_pcie_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device pcie_dev_device[] = { + { + .name = "wb-pci-dev", + .id = 1, + .dev = { + .platform_data = &pcie_dev_device_data0, + .release = wb_pcie_dev_device_release, + }, + }, +}; + +static int __init wb_pcie_dev_device_init(void) +{ + int i; + int ret = 0; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + ret = platform_device_register(&pcie_dev_device[i]); + if (ret < 0) { + pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1); + } else { + pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_pcie_dev_device_exit(void) +{ + int i; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&pcie_dev_device[i]); + } + } +} + +module_init(wb_pcie_dev_device_init); +module_exit(wb_pcie_dev_device_exit); +MODULE_DESCRIPTION("PCIE DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c new file mode 100644 index 00000000000..45f6038596b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c @@ -0,0 +1,126 @@ +/* + * An wb_spi_dev_device driver for spi device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include +#include "wb_spi_master.h" + +#define SPI_DEVICE_MAX_NUM (64) + +static int g_wb_spi_dev_device_debug = 0; +static int g_wb_spi_dev_device_error = 0; + +module_param(g_wb_spi_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_spi_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_SPI_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_spi_dev_device_debug) { \ + printk(KERN_INFO "[WB_SPI_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_SPI_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_spi_dev_device_error) { \ + printk(KERN_ERR "[WB_SPI_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static spi_dev_device_t spi_dev_device_data0 = { + .spi_dev_name = "fpga1", + .data_bus_width = 4, + .addr_bus_width = 2, + .per_rd_len = 4, + .per_wr_len = 4, + .spi_len = 0xe000, +}; + +static struct spi_device *g_spi_device[SPI_DEVICE_MAX_NUM]; + +struct spi_board_info spi_dev_device_info[] = { + { + .modalias = "wb-spi-dev", + .max_speed_hz = 6250000, + .bus_num = 1, + .chip_select = 0, + .mode = SPI_MODE_3, + .platform_data = &spi_dev_device_data0, + }, +}; + +static int __init wb_spi_dev_device_init(void) +{ + int i; + struct spi_master *master; + struct spi_device *spi; + int spi_dev_num; + + WB_SPI_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + + spi_dev_num = ARRAY_SIZE(spi_dev_device_info); + if (spi_dev_num > SPI_DEVICE_MAX_NUM) { + printk(KERN_ERR "spi_dev_num[%d] is bigger than max_num[%d].\n", + spi_dev_num, SPI_DEVICE_MAX_NUM); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(spi_dev_device_info); i++) { + master = wb_spi_master_busnum_to_master(spi_dev_device_info[i].bus_num); + if (!master) { + printk(KERN_ERR "get bus_num %u spi master failed.\n", + spi_dev_device_info[i].bus_num); + continue; + } + spi = spi_new_device(master, &spi_dev_device_info[i]); + put_device(&master->dev); + if (spi) { + g_spi_device[i] = spi; + } else { + g_spi_device[i] = NULL; + printk(KERN_ERR "Failed to register spi dev device %s at bus %d!\n", + spi_dev_device_info[i].modalias, spi_dev_device_info[i].bus_num); + continue; + } + } + return 0; +} + +static void __exit wb_spi_dev_device_exit(void) +{ + int i; + + WB_SPI_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(spi_dev_device_info) - 1; i >= 0; i--) { + if (g_spi_device[i]) { + spi_unregister_device(g_spi_device[i]); + g_spi_device[i] = NULL; + } + } +} + +module_init(wb_spi_dev_device_init); +module_exit(wb_spi_dev_device_exit); +MODULE_DESCRIPTION("SPI DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_platform_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_platform_device.c new file mode 100644 index 00000000000..9c4981321b6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_platform_device.c @@ -0,0 +1,74 @@ +/* + * An wb_spi_dev_platform_device driver for spi platform device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +static int g_wb_spi_dev_platform_device_debug = 0; +static int g_wb_spi_dev_platform_device_error = 0; + +module_param(g_wb_spi_dev_platform_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_spi_dev_platform_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_SPI_DEV_PLATFORM_DEVICE_VERBOSE(fmt, args...) do { \ + if (g_wb_spi_dev_platform_device_debug) { \ + printk(KERN_INFO "[WB_SPI_DEV_PLATFORM_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_SPI_DEV_PLATFORM_DEVICE_ERROR(fmt, args...) do { \ + if (g_wb_spi_dev_platform_device_error) { \ + printk(KERN_ERR "[WB_SPI_DEV_PLATFORM_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static void wb_spi_dev_platform_device_release(struct device *dev) +{ + return; +} + +static struct platform_device wb_spi_dev_platform_device = { + .name = "wb-spi-dev-device", + .id = 1, + .dev = { + .release = wb_spi_dev_platform_device_release, + }, +}; + +static int __init wb_spi_dev_platform_device_init(void) +{ + WB_SPI_DEV_PLATFORM_DEVICE_VERBOSE("wb_spi_dev_platform_device_init enter!\n"); + return platform_device_register(&wb_spi_dev_platform_device); +} + +static void __exit wb_spi_dev_platform_device_exit(void) +{ + WB_SPI_DEV_PLATFORM_DEVICE_VERBOSE("wb_spi_dev_platform_device_exit enter!\n"); + return platform_device_unregister(&wb_spi_dev_platform_device); +} + +module_init(wb_spi_dev_platform_device_init); +module_exit(wb_spi_dev_platform_device_exit); +MODULE_DESCRIPTION("SPI Dev Platform Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.c new file mode 100644 index 00000000000..5c9cdbe1599 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.c @@ -0,0 +1,129 @@ +/* + * An wb_spi_master driver for spi master device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include + +#include "wb_spi_master.h" + +static int g_wb_spi_master_debug = 0; +static int g_wb_spi_master_error = 0; + +module_param(g_wb_spi_master_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_spi_master_error, int, S_IRUGO | S_IWUSR); + +#define WB_SPI_MASTER_VERBOSE(fmt, args...) do { \ + if (g_wb_spi_master_debug) { \ + printk(KERN_INFO "[WB_SPI_MASTER][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_SPI_MASTER_ERROR(fmt, args...) do { \ + if (g_wb_spi_master_error) { \ + printk(KERN_ERR "[WB_SPI_MASTER][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static struct device g_wb_spi_device; +/* point to spi_master_class in drivers/spi/spi.c */ +static struct class *g_wb_spi_master_class = NULL; +static struct spi_controller *g_wb_spi_controller = NULL; + +static int __spi_controller_match(struct device *dev, const void *data) +{ + struct spi_controller *ctlr; + const u16 *bus_num = data; + + ctlr = container_of(dev, struct spi_controller, dev); + return ctlr->bus_num == *bus_num; +} + +/** + * wb_spi_master_busnum_to_master - look up master associated with bus_num + * @bus_num: the master's bus number + * Context: can sleep + * + * Return: the SPI master structure on success, else NULL. + */ +struct spi_controller *wb_spi_master_busnum_to_master(u16 bus_num) +{ + struct device *dev; + struct spi_controller *ctlr = NULL; + + WB_SPI_MASTER_VERBOSE("Enter.\n"); + + if (g_wb_spi_master_class == NULL) { + WB_SPI_MASTER_ERROR("get g_wb_spi_master_class fail.\n"); + return NULL; + } + + dev = class_find_device(g_wb_spi_master_class, NULL, &bus_num, __spi_controller_match); + if (dev) { + ctlr = container_of(dev, struct spi_controller, dev); + } + /* reference got in class_find_device */ + return ctlr; +} +EXPORT_SYMBOL_GPL(wb_spi_master_busnum_to_master); + +static int __init wb_spi_master_init(void) +{ + struct device *dev; + struct spi_board_info chip; + + WB_SPI_MASTER_VERBOSE("Enter!\n"); + + device_initialize(&g_wb_spi_device); + + g_wb_spi_controller = spi_alloc_master(&g_wb_spi_device, sizeof(struct spi_board_info)); + if (g_wb_spi_controller == NULL) { + WB_SPI_MASTER_ERROR("spi_alloc_master failed.\n"); + return -ENOMEM; + } + + g_wb_spi_master_class = g_wb_spi_controller->dev.class; + if (g_wb_spi_master_class == NULL) { + WB_SPI_MASTER_ERROR("get class_spi_master failed.\n"); + kfree(g_wb_spi_controller); + g_wb_spi_controller = NULL; + return -EINVAL; + } + printk(KERN_INFO "WB spi master init success."); + + return 0; +} + +static void __exit wb_spi_master_exit(void) +{ + WB_SPI_MASTER_VERBOSE("Enter!\n"); + if (g_wb_spi_controller != NULL) { + kfree(g_wb_spi_controller); + } + + return; +} + +module_init(wb_spi_master_init); +module_exit(wb_spi_master_exit); + +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("create spi device"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.h b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.h new file mode 100644 index 00000000000..502ac68b585 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.h @@ -0,0 +1,36 @@ +/* + * A header definition for wb_spi_master driver + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __WB_SPI_MASTER_H__ +#define __WB_SPI_MASTER_H__ + +#include +#include + +/** + * wb_spi_master_busnum_to_master - look up master associated with bus_num + * @bus_num: the master's bus number + * Context: can sleep + * + * Return: the SPI master structure on success, else NULL. + */ +struct spi_controller *wb_spi_master_busnum_to_master(u16 bus_num); + +#endif /* #ifndef __WB_SPI_MASTER_H__ */ \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_ocores_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_ocores_device.c new file mode 100644 index 00000000000..86073dc12f3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_ocores_device.c @@ -0,0 +1,114 @@ +/* + * An wb_spi_ocores_device driver for spi ocores device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_spi_ocores_device_debug = 0; +static int g_wb_spi_ocores_device_error = 0; + +module_param(g_wb_spi_ocores_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_spi_ocores_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_SPI_OCORE_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_spi_ocores_device_debug) { \ + printk(KERN_INFO "[WB_SPI_OCORE_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_SPI_OCORE_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_spi_ocores_device_error) { \ + printk(KERN_ERR "[WB_SPI_OCORE_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static spi_ocores_device_t spi_ocores_device_data0 = { + .bus_num = 1, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 2, + .dev_base = 0x1900, + .reg_shift = 2, + .reg_io_width = 4, + .clock_frequency = 125000000, + .irq_flag = 0, + .num_chipselect = 8, +}; + +static void wb_spi_ocores_device_release(struct device *dev) +{ + return; +} + +static struct platform_device spi_ocores_device[] = { + { + .name = "wb-spioc", + .id = 1, + .dev = { + .platform_data = &spi_ocores_device_data0, + .release = wb_spi_ocores_device_release, + }, + }, +}; + +static int __init wb_spi_ocores_device_init(void) +{ + int i; + int ret = 0; + spi_ocores_device_t *spi_ocores_device_data; + + WB_SPI_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(spi_ocores_device); i++) { + spi_ocores_device_data = spi_ocores_device[i].dev.platform_data; + ret = platform_device_register(&spi_ocores_device[i]); + if (ret < 0) { + spi_ocores_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-spi-oc.%d register failed!\n", i + 1); + } else { + spi_ocores_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_spi_ocores_device_exit(void) +{ + int i; + spi_ocores_device_t *spi_ocores_device_data; + + WB_SPI_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(spi_ocores_device) - 1; i >= 0; i--) { + spi_ocores_device_data = spi_ocores_device[i].dev.platform_data; + if (spi_ocores_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&spi_ocores_device[i]); + } + } +} + +module_init(wb_spi_ocores_device_init); +module_exit(wb_spi_ocores_device_exit); +MODULE_DESCRIPTION("SPI OCORES Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg new file mode 100644 index 00000000000..53aa2be2aae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg @@ -0,0 +1,47 @@ +# configuration item: I2C address of CPLD +# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id] +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +# bus: I2C bus number of CPLD +# addr: I2C address of CPLD +cpld_i2c_dev.bus_0_2=109 +cpld_i2c_dev.addr_0_2=0x1d +cpld_i2c_dev.bus_0_3=110 +cpld_i2c_dev.addr_0_3=0x2d +cpld_i2c_dev.bus_0_4=111 +cpld_i2c_dev.addr_0_4=0x3d +cpld_i2c_dev.bus_0_5=112 +cpld_i2c_dev.addr_0_5=0x4d +cpld_i2c_dev.bus_0_6=92 +cpld_i2c_dev.addr_0_6=0x0d +cpld_i2c_dev.bus_0_7=101 +cpld_i2c_dev.addr_0_7=0x0d + + +# configuration item: LPC address of CPLD +# format: cpld_lpc_addr_[cpld_slot]_[cpld_id] +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +cpld_lpc_dev_0_0=0x700 +cpld_lpc_dev_0_1=0x900 + + +# configuration item: CPLD access method, lpc or i2c +# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +mode_cpld_0_0=lpc +mode_cpld_0_1=lpc +mode_cpld_0_2=i2c +mode_cpld_0_3=i2c +mode_cpld_0_4=i2c +mode_cpld_0_5=i2c +mode_cpld_0_6=i2c +mode_cpld_0_7=i2c + + +# configuration item: the number of CPLD +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: CPLD main_dev is 4 +# minor_dev: CPLD minor_dev not exist +dev_num_4_0=8 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg new file mode 100644 index 00000000000..c7f4b9de559 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg @@ -0,0 +1,574 @@ +# configuration item: the number of fans +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: fan main_dev is 1 +# minor_dev: fan minor_dev not exist(0) +dev_num_1_0=8 + +# configuration item: the number of rotors +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: rotor main_dev is 1 +# minor_dev: rotor minor_dev is 5 +dev_num_1_5=2 + +# configuration item: fan presence status +# format: dev_present_status_[main_dev_id][fan_index] +# main_dev_id: fan main_dev_id is 1 +# fan_index: start from 1 +dev_present_status.mode_1_1=config +dev_present_status.src_1_1=cpld +dev_present_status.frmt_1_1=bit +dev_present_status.pola_1_1=negative +dev_present_status.addr_1_1=0x00060030 +dev_present_status.len_1_1=1 +dev_present_status.bit_offset_1_1=0 + +dev_present_status.mode_1_2=config +dev_present_status.src_1_2=cpld +dev_present_status.frmt_1_2=bit +dev_present_status.pola_1_2=negative +dev_present_status.addr_1_2=0x00070030 +dev_present_status.len_1_2=1 +dev_present_status.bit_offset_1_2=0 + +dev_present_status.mode_1_3=config +dev_present_status.src_1_3=cpld +dev_present_status.frmt_1_3=bit +dev_present_status.pola_1_3=negative +dev_present_status.addr_1_3=0x00060030 +dev_present_status.len_1_3=1 +dev_present_status.bit_offset_1_3=1 + +dev_present_status.mode_1_4=config +dev_present_status.src_1_4=cpld +dev_present_status.frmt_1_4=bit +dev_present_status.pola_1_4=negative +dev_present_status.addr_1_4=0x00070030 +dev_present_status.len_1_4=1 +dev_present_status.bit_offset_1_4=1 + +dev_present_status.mode_1_5=config +dev_present_status.src_1_5=cpld +dev_present_status.frmt_1_5=bit +dev_present_status.pola_1_5=negative +dev_present_status.addr_1_5=0x00060030 +dev_present_status.len_1_5=1 +dev_present_status.bit_offset_1_5=2 + +dev_present_status.mode_1_6=config +dev_present_status.src_1_6=cpld +dev_present_status.frmt_1_6=bit +dev_present_status.pola_1_6=negative +dev_present_status.addr_1_6=0x00070030 +dev_present_status.len_1_6=1 +dev_present_status.bit_offset_1_6=2 + +dev_present_status.mode_1_7=config +dev_present_status.src_1_7=cpld +dev_present_status.frmt_1_7=bit +dev_present_status.pola_1_7=negative +dev_present_status.addr_1_7=0x00060030 +dev_present_status.len_1_7=1 +dev_present_status.bit_offset_1_7=3 + +dev_present_status.mode_1_8=config +dev_present_status.src_1_8=cpld +dev_present_status.frmt_1_8=bit +dev_present_status.pola_1_8=negative +dev_present_status.addr_1_8=0x00070030 +dev_present_status.len_1_8=1 +dev_present_status.bit_offset_1_8=3 + + +# configuration item: fan rotor status +# format: fan_roll_status_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_roll_status.mode_1_0=config +fan_roll_status.int_cons_1_0= +fan_roll_status.src_1_0=cpld +fan_roll_status.frmt_1_0=bit +fan_roll_status.pola_1_0=positive +fan_roll_status.fpath_1_0= +fan_roll_status.addr_1_0=0x00060031 +fan_roll_status.len_1_0=1 +fan_roll_status.bit_offset_1_0=0 + +fan_roll_status.mode_1_1=config +fan_roll_status.int_cons_1_1= +fan_roll_status.src_1_1=cpld +fan_roll_status.frmt_1_1=bit +fan_roll_status.pola_1_1=positive +fan_roll_status.fpath_1_1= +fan_roll_status.addr_1_1=0x00060034 +fan_roll_status.len_1_1=1 +fan_roll_status.bit_offset_1_1=0 + +fan_roll_status.mode_2_0=config +fan_roll_status.int_cons_2_0= +fan_roll_status.src_2_0=cpld +fan_roll_status.frmt_2_0=bit +fan_roll_status.pola_2_0=positive +fan_roll_status.fpath_2_0= +fan_roll_status.addr_2_0=0x00070031 +fan_roll_status.len_2_0=1 +fan_roll_status.bit_offset_2_0=0 + +fan_roll_status.mode_2_1=config +fan_roll_status.int_cons_2_1= +fan_roll_status.src_2_1=cpld +fan_roll_status.frmt_2_1=bit +fan_roll_status.pola_2_1=positive +fan_roll_status.fpath_2_1= +fan_roll_status.addr_2_1=0x00070034 +fan_roll_status.len_2_1=1 +fan_roll_status.bit_offset_2_1=0 + +fan_roll_status.mode_3_0=config +fan_roll_status.int_cons_3_0= +fan_roll_status.src_3_0=cpld +fan_roll_status.frmt_3_0=bit +fan_roll_status.pola_3_0=positive +fan_roll_status.fpath_3_0= +fan_roll_status.addr_3_0=0x00060031 +fan_roll_status.len_3_0=1 +fan_roll_status.bit_offset_3_0=1 + +fan_roll_status.mode_3_1=config +fan_roll_status.int_cons_3_1= +fan_roll_status.src_3_1=cpld +fan_roll_status.frmt_3_1=bit +fan_roll_status.pola_3_1=positive +fan_roll_status.fpath_3_1= +fan_roll_status.addr_3_1=0x00060034 +fan_roll_status.len_3_1=1 +fan_roll_status.bit_offset_3_1=1 + +fan_roll_status.mode_4_0=config +fan_roll_status.int_cons_4_0= +fan_roll_status.src_4_0=cpld +fan_roll_status.frmt_4_0=bit +fan_roll_status.pola_4_0=positive +fan_roll_status.fpath_4_0= +fan_roll_status.addr_4_0=0x00070031 +fan_roll_status.len_4_0=1 +fan_roll_status.bit_offset_4_0=1 + +fan_roll_status.mode_4_1=config +fan_roll_status.int_cons_4_1= +fan_roll_status.src_4_1=cpld +fan_roll_status.frmt_4_1=bit +fan_roll_status.pola_4_1=positive +fan_roll_status.fpath_4_1= +fan_roll_status.addr_4_1=0x00070034 +fan_roll_status.len_4_1=1 +fan_roll_status.bit_offset_4_1=1 + +fan_roll_status.mode_5_0=config +fan_roll_status.int_cons_5_0= +fan_roll_status.src_5_0=cpld +fan_roll_status.frmt_5_0=bit +fan_roll_status.pola_5_0=positive +fan_roll_status.fpath_5_0= +fan_roll_status.addr_5_0=0x00060031 +fan_roll_status.len_5_0=1 +fan_roll_status.bit_offset_5_0=2 + +fan_roll_status.mode_5_1=config +fan_roll_status.int_cons_5_1= +fan_roll_status.src_5_1=cpld +fan_roll_status.frmt_5_1=bit +fan_roll_status.pola_5_1=positive +fan_roll_status.fpath_5_1= +fan_roll_status.addr_5_1=0x00060034 +fan_roll_status.len_5_1=1 +fan_roll_status.bit_offset_5_1=2 + +fan_roll_status.mode_6_0=config +fan_roll_status.int_cons_6_0= +fan_roll_status.src_6_0=cpld +fan_roll_status.frmt_6_0=bit +fan_roll_status.pola_6_0=positive +fan_roll_status.fpath_6_0= +fan_roll_status.addr_6_0=0x00070031 +fan_roll_status.len_6_0=1 +fan_roll_status.bit_offset_6_0=2 + +fan_roll_status.mode_6_1=config +fan_roll_status.int_cons_6_1= +fan_roll_status.src_6_1=cpld +fan_roll_status.frmt_6_1=bit +fan_roll_status.pola_6_1=positive +fan_roll_status.fpath_6_1= +fan_roll_status.addr_6_1=0x00070034 +fan_roll_status.len_6_1=1 +fan_roll_status.bit_offset_6_1=2 + +fan_roll_status.mode_7_0=config +fan_roll_status.int_cons_7_0= +fan_roll_status.src_7_0=cpld +fan_roll_status.frmt_7_0=bit +fan_roll_status.pola_7_0=positive +fan_roll_status.fpath_7_0= +fan_roll_status.addr_7_0=0x00060031 +fan_roll_status.len_7_0=1 +fan_roll_status.bit_offset_7_0=3 + +fan_roll_status.mode_7_1=config +fan_roll_status.int_cons_7_1= +fan_roll_status.src_7_1=cpld +fan_roll_status.frmt_7_1=bit +fan_roll_status.pola_7_1=positive +fan_roll_status.fpath_7_1= +fan_roll_status.addr_7_1=0x00060034 +fan_roll_status.len_7_1=1 +fan_roll_status.bit_offset_7_1=3 + +fan_roll_status.mode_8_0=config +fan_roll_status.int_cons_8_0= +fan_roll_status.src_8_0=cpld +fan_roll_status.frmt_8_0=bit +fan_roll_status.pola_8_0=positive +fan_roll_status.fpath_8_0= +fan_roll_status.addr_8_0=0x00070031 +fan_roll_status.len_8_0=1 +fan_roll_status.bit_offset_8_0=3 + +fan_roll_status.mode_8_1=config +fan_roll_status.int_cons_8_1= +fan_roll_status.src_8_1=cpld +fan_roll_status.frmt_8_1=bit +fan_roll_status.pola_8_1=positive +fan_roll_status.fpath_8_1= +fan_roll_status.addr_8_1=0x00070034 +fan_roll_status.len_8_1=1 +fan_roll_status.bit_offset_8_1=3 + + +# configuration item: fan speed +# format: fan_speed_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_speed.mode_1_0=config +fan_speed.int_cons_1_0= +fan_speed.src_1_0=cpld +fan_speed.frmt_1_0=num_bytes +fan_speed.pola_1_0=negative +fan_speed.fpath_1_0= +fan_speed.addr_1_0=0x0006001b +fan_speed.len_1_0=2 +fan_speed.bit_offset_1_0= + +fan_speed.mode_1_1=config +fan_speed.int_cons_1_1= +fan_speed.src_1_1=cpld +fan_speed.frmt_1_1=num_bytes +fan_speed.pola_1_1=negative +fan_speed.fpath_1_1= +fan_speed.addr_1_1=0x00060025 +fan_speed.len_1_1=2 +fan_speed.bit_offset_1_1= + +fan_speed.mode_2_0=config +fan_speed.int_cons_2_0= +fan_speed.src_2_0=cpld +fan_speed.frmt_2_0=num_bytes +fan_speed.pola_2_0=negative +fan_speed.fpath_2_0= +fan_speed.addr_2_0=0x0007001b +fan_speed.len_2_0=2 +fan_speed.bit_offset_2_0= + +fan_speed.mode_2_1=config +fan_speed.int_cons_2_1= +fan_speed.src_2_1=cpld +fan_speed.frmt_2_1=num_bytes +fan_speed.pola_2_1=negative +fan_speed.fpath_2_1= +fan_speed.addr_2_1=0x00070025 +fan_speed.len_2_1=2 +fan_speed.bit_offset_2_1= + +fan_speed.mode_3_0=config +fan_speed.int_cons_3_0= +fan_speed.src_3_0=cpld +fan_speed.frmt_3_0=num_bytes +fan_speed.pola_3_0=negative +fan_speed.fpath_3_0= +fan_speed.addr_3_0=0x0006001d +fan_speed.len_3_0=2 +fan_speed.bit_offset_3_0= + +fan_speed.mode_3_1=config +fan_speed.int_cons_3_1= +fan_speed.src_3_1=cpld +fan_speed.frmt_3_1=num_bytes +fan_speed.pola_3_1=negative +fan_speed.fpath_3_1= +fan_speed.addr_3_1=0x00060027 +fan_speed.len_3_1=2 +fan_speed.bit_offset_3_1= + +fan_speed.mode_4_0=config +fan_speed.int_cons_4_0= +fan_speed.src_4_0=cpld +fan_speed.frmt_4_0=num_bytes +fan_speed.pola_4_0=negative +fan_speed.fpath_4_0= +fan_speed.addr_4_0=0x0007001d +fan_speed.len_4_0=2 +fan_speed.bit_offset_4_0= + +fan_speed.mode_4_1=config +fan_speed.int_cons_4_1= +fan_speed.src_4_1=cpld +fan_speed.frmt_4_1=num_bytes +fan_speed.pola_4_1=negative +fan_speed.fpath_4_1= +fan_speed.addr_4_1=0x00070027 +fan_speed.len_4_1=2 +fan_speed.bit_offset_4_1= + +fan_speed.mode_5_0=config +fan_speed.int_cons_5_0= +fan_speed.src_5_0=cpld +fan_speed.frmt_5_0=num_bytes +fan_speed.pola_5_0=negative +fan_speed.fpath_5_0= +fan_speed.addr_5_0=0x0006001f +fan_speed.len_5_0=2 +fan_speed.bit_offset_5_0= + +fan_speed.mode_5_1=config +fan_speed.int_cons_5_1= +fan_speed.src_5_1=cpld +fan_speed.frmt_5_1=num_bytes +fan_speed.pola_5_1=negative +fan_speed.fpath_5_1= +fan_speed.addr_5_1=0x00060029 +fan_speed.len_5_1=2 +fan_speed.bit_offset_5_1= + +fan_speed.mode_6_0=config +fan_speed.int_cons_6_0= +fan_speed.src_6_0=cpld +fan_speed.frmt_6_0=num_bytes +fan_speed.pola_6_0=negative +fan_speed.fpath_6_0= +fan_speed.addr_6_0=0x0007001f +fan_speed.len_6_0=2 +fan_speed.bit_offset_6_0= + +fan_speed.mode_6_1=config +fan_speed.int_cons_6_1= +fan_speed.src_6_1=cpld +fan_speed.frmt_6_1=num_bytes +fan_speed.pola_6_1=negative +fan_speed.fpath_6_1= +fan_speed.addr_6_1=0x00070029 +fan_speed.len_6_1=2 +fan_speed.bit_offset_6_1= + +fan_speed.mode_7_0=config +fan_speed.int_cons_7_0= +fan_speed.src_7_0=cpld +fan_speed.frmt_7_0=num_bytes +fan_speed.pola_7_0=negative +fan_speed.fpath_7_0= +fan_speed.addr_7_0=0x00060021 +fan_speed.len_7_0=2 +fan_speed.bit_offset_7_0= + +fan_speed.mode_7_1=config +fan_speed.int_cons_7_1= +fan_speed.src_7_1=cpld +fan_speed.frmt_7_1=num_bytes +fan_speed.pola_7_1=negative +fan_speed.fpath_7_1= +fan_speed.addr_7_1=0x0006002b +fan_speed.len_7_1=2 +fan_speed.bit_offset_7_1= + +fan_speed.mode_8_0=config +fan_speed.int_cons_8_0= +fan_speed.src_8_0=cpld +fan_speed.frmt_8_0=num_bytes +fan_speed.pola_8_0=negative +fan_speed.fpath_8_0= +fan_speed.addr_8_0=0x00070021 +fan_speed.len_8_0=2 +fan_speed.bit_offset_8_0= + +fan_speed.mode_8_1=config +fan_speed.int_cons_8_1= +fan_speed.src_8_1=cpld +fan_speed.frmt_8_1=num_bytes +fan_speed.pola_8_1=negative +fan_speed.fpath_8_1= +fan_speed.addr_8_1=0x0007002b +fan_speed.len_8_1=2 +fan_speed.bit_offset_8_1= + + +# configuration item: fan pwm +# format: fan_ratio_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_ratio.mode_1_0=config +fan_ratio.int_cons_1_0= +fan_ratio.src_1_0=cpld +fan_ratio.frmt_1_0=byte +fan_ratio.pola_1_0= +fan_ratio.fpath_1_0= +fan_ratio.addr_1_0=0x00060014 +fan_ratio.len_1_0=1 +fan_ratio.bit_offset_1_0= + +fan_ratio.mode_1_1=config +fan_ratio.int_cons_1_1= +fan_ratio.src_1_1=cpld +fan_ratio.frmt_1_1=byte +fan_ratio.pola_1_1= +fan_ratio.fpath_1_1= +fan_ratio.addr_1_1=0x00060014 +fan_ratio.len_1_1=1 +fan_ratio.bit_offset_1_1= + +fan_ratio.mode_2_0=config +fan_ratio.int_cons_2_0= +fan_ratio.src_2_0=cpld +fan_ratio.frmt_2_0=byte +fan_ratio.pola_2_0= +fan_ratio.fpath_2_0= +fan_ratio.addr_2_0=0x00070014 +fan_ratio.len_2_0=1 +fan_ratio.bit_offset_2_0= + +fan_ratio.mode_2_1=config +fan_ratio.int_cons_2_1= +fan_ratio.src_2_1=cpld +fan_ratio.frmt_2_1=byte +fan_ratio.pola_2_1= +fan_ratio.fpath_2_1= +fan_ratio.addr_2_1=0x00070014 +fan_ratio.len_2_1=1 +fan_ratio.bit_offset_2_1= + +fan_ratio.mode_3_0=config +fan_ratio.int_cons_3_0= +fan_ratio.src_3_0=cpld +fan_ratio.frmt_3_0=byte +fan_ratio.pola_3_0= +fan_ratio.fpath_3_0= +fan_ratio.addr_3_0=0x00060015 +fan_ratio.len_3_0=1 +fan_ratio.bit_offset_3_0= + +fan_ratio.mode_3_1=config +fan_ratio.int_cons_3_1= +fan_ratio.src_3_1=cpld +fan_ratio.frmt_3_1=byte +fan_ratio.pola_3_1= +fan_ratio.fpath_3_1= +fan_ratio.addr_3_1=0x00060015 +fan_ratio.len_3_1=1 +fan_ratio.bit_offset_3_1= + +fan_ratio.mode_4_0=config +fan_ratio.int_cons_4_0= +fan_ratio.src_4_0=cpld +fan_ratio.frmt_4_0=byte +fan_ratio.pola_4_0= +fan_ratio.fpath_4_0= +fan_ratio.addr_4_0=0x00070015 +fan_ratio.len_4_0=1 +fan_ratio.bit_offset_4_0= + +fan_ratio.mode_4_1=config +fan_ratio.int_cons_4_1= +fan_ratio.src_4_1=cpld +fan_ratio.frmt_4_1=byte +fan_ratio.pola_4_1= +fan_ratio.fpath_4_1= +fan_ratio.addr_4_1=0x00070015 +fan_ratio.len_4_1=1 +fan_ratio.bit_offset_4_1= + +fan_ratio.mode_5_0=config +fan_ratio.int_cons_5_0= +fan_ratio.src_5_0=cpld +fan_ratio.frmt_5_0=byte +fan_ratio.pola_5_0= +fan_ratio.fpath_5_0= +fan_ratio.addr_5_0=0x00060016 +fan_ratio.len_5_0=1 +fan_ratio.bit_offset_5_0= + +fan_ratio.mode_5_1=config +fan_ratio.int_cons_5_1= +fan_ratio.src_5_1=cpld +fan_ratio.frmt_5_1=byte +fan_ratio.pola_5_1= +fan_ratio.fpath_5_1= +fan_ratio.addr_5_1=0x00060016 +fan_ratio.len_5_1=1 +fan_ratio.bit_offset_5_1= + +fan_ratio.mode_6_0=config +fan_ratio.int_cons_6_0= +fan_ratio.src_6_0=cpld +fan_ratio.frmt_6_0=byte +fan_ratio.pola_6_0= +fan_ratio.fpath_6_0= +fan_ratio.addr_6_0=0x00070016 +fan_ratio.len_6_0=1 +fan_ratio.bit_offset_6_0= + +fan_ratio.mode_6_1=config +fan_ratio.int_cons_6_1= +fan_ratio.src_6_1=cpld +fan_ratio.frmt_6_1=byte +fan_ratio.pola_6_1= +fan_ratio.fpath_6_1= +fan_ratio.addr_6_1=0x00070016 +fan_ratio.len_6_1=1 +fan_ratio.bit_offset_6_1= + +fan_ratio.mode_7_0=config +fan_ratio.int_cons_7_0= +fan_ratio.src_7_0=cpld +fan_ratio.frmt_7_0=byte +fan_ratio.pola_7_0= +fan_ratio.fpath_7_0= +fan_ratio.addr_7_0=0x00060017 +fan_ratio.len_7_0=1 +fan_ratio.bit_offset_7_0= + +fan_ratio.mode_7_1=config +fan_ratio.int_cons_7_1= +fan_ratio.src_7_1=cpld +fan_ratio.frmt_7_1=byte +fan_ratio.pola_7_1= +fan_ratio.fpath_7_1= +fan_ratio.addr_7_1=0x00060017 +fan_ratio.len_7_1=1 +fan_ratio.bit_offset_7_1= + +fan_ratio.mode_8_0=config +fan_ratio.int_cons_8_0= +fan_ratio.src_8_0=cpld +fan_ratio.frmt_8_0=byte +fan_ratio.pola_8_0= +fan_ratio.fpath_8_0= +fan_ratio.addr_8_0=0x00070017 +fan_ratio.len_8_0=1 +fan_ratio.bit_offset_8_0= + +fan_ratio.mode_8_1=config +fan_ratio.int_cons_8_1= +fan_ratio.src_8_1=cpld +fan_ratio.frmt_8_1=byte +fan_ratio.pola_8_1= +fan_ratio.fpath_8_1= +fan_ratio.addr_8_1=0x00070017 +fan_ratio.len_8_1=1 +fan_ratio.bit_offset_8_1= \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg new file mode 100644 index 00000000000..a04af1e63db --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg @@ -0,0 +1,107 @@ +# configuration item: the number of psus +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: psu main_dev is 2 +# minor_dev: psu minor_dev not exist(0) +dev_num_2_0=4 + + +# configuration item: psu status +# format: psu_status_[psu_index]_[status_id] +# psu_index: start from 1 +# status_id: 0: presence 1: output 2: alert +# psu1 presence status +psu_status.mode_1_0=config +psu_status.src_1_0=cpld +psu_status.frmt_1_0=bit +psu_status.pola_1_0=negative +psu_status.addr_1_0=0x00010064 +psu_status.len_1_0=1 +psu_status.bit_offset_1_0=0 + +psu_status.mode_1_1=config +psu_status.src_1_1=cpld +psu_status.frmt_1_1=bit +psu_status.pola_1_1=positive +psu_status.addr_1_1=0x00010064 +psu_status.len_1_1=1 +psu_status.bit_offset_1_1=1 + +psu_status.mode_1_2=config +psu_status.src_1_2=cpld +psu_status.frmt_1_2=bit +psu_status.pola_1_2=negative +psu_status.addr_1_2=0x00010064 +psu_status.len_1_2=1 +psu_status.bit_offset_1_2=2 + +psu_status.mode_2_0=config +psu_status.src_2_0=cpld +psu_status.frmt_2_0=bit +psu_status.pola_2_0=negative +psu_status.addr_2_0=0x00010064 +psu_status.len_2_0=1 +psu_status.bit_offset_2_0=4 + +psu_status.mode_2_1=config +psu_status.src_2_1=cpld +psu_status.frmt_2_1=bit +psu_status.pola_2_1=positive +psu_status.addr_2_1=0x00010064 +psu_status.len_2_1=1 +psu_status.bit_offset_2_1=5 + +psu_status.mode_2_2=config +psu_status.src_2_2=cpld +psu_status.frmt_2_2=bit +psu_status.pola_2_2=negative +psu_status.addr_2_2=0x00010064 +psu_status.len_2_2=1 +psu_status.bit_offset_2_2=6 + +psu_status.mode_3_0=config +psu_status.src_3_0=cpld +psu_status.frmt_3_0=bit +psu_status.pola_3_0=negative +psu_status.addr_3_0=0x00010065 +psu_status.len_3_0=1 +psu_status.bit_offset_3_0=4 + +psu_status.mode_3_1=config +psu_status.src_3_1=cpld +psu_status.frmt_3_1=bit +psu_status.pola_3_1=positive +psu_status.addr_3_1=0x00010065 +psu_status.len_3_1=1 +psu_status.bit_offset_3_1=5 + +psu_status.mode_3_2=config +psu_status.src_3_2=cpld +psu_status.frmt_3_2=bit +psu_status.pola_3_2=negative +psu_status.addr_3_2=0x00010065 +psu_status.len_3_2=1 +psu_status.bit_offset_3_2=6 + +psu_status.mode_4_0=config +psu_status.src_4_0=cpld +psu_status.frmt_4_0=bit +psu_status.pola_4_0=negative +psu_status.addr_4_0=0x00010065 +psu_status.len_4_0=1 +psu_status.bit_offset_4_0=0 + +psu_status.mode_4_1=config +psu_status.src_4_1=cpld +psu_status.frmt_4_1=bit +psu_status.pola_4_1=positive +psu_status.addr_4_1=0x00010065 +psu_status.len_4_1=1 +psu_status.bit_offset_4_1=1 + +psu_status.mode_4_2=config +psu_status.src_4_2=cpld +psu_status.frmt_4_2=bit +psu_status.pola_4_2=negative +psu_status.addr_4_2=0x00010065 +psu_status.len_4_2=1 +psu_status.bit_offset_4_2=2 \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg new file mode 100644 index 00000000000..075073962a2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg @@ -0,0 +1,593 @@ +# configuration item: the number of sffs +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: sff main_dev is 3 +# minor_dev: sff minor_dev not exist(0) +dev_num_3_0=64 + + +# configuration item: The directory name of sff sysfs +# format: sff_dir_name_[sff_index] +# sff_index: start from 1 +sff_dir_name_1 =sff1 +sff_dir_name_2 =sff2 +sff_dir_name_3 =sff3 +sff_dir_name_4 =sff4 +sff_dir_name_5 =sff5 +sff_dir_name_6 =sff6 +sff_dir_name_7 =sff7 +sff_dir_name_8 =sff8 +sff_dir_name_9 =sff9 +sff_dir_name_10 =sff10 +sff_dir_name_11 =sff11 +sff_dir_name_12 =sff12 +sff_dir_name_13 =sff13 +sff_dir_name_14 =sff14 +sff_dir_name_15 =sff15 +sff_dir_name_16 =sff16 +sff_dir_name_17 =sff17 +sff_dir_name_18 =sff18 +sff_dir_name_19 =sff19 +sff_dir_name_20 =sff20 +sff_dir_name_21 =sff21 +sff_dir_name_22 =sff22 +sff_dir_name_23 =sff23 +sff_dir_name_24 =sff24 +sff_dir_name_25 =sff25 +sff_dir_name_26 =sff26 +sff_dir_name_27 =sff27 +sff_dir_name_28 =sff28 +sff_dir_name_29 =sff29 +sff_dir_name_30 =sff30 +sff_dir_name_31 =sff31 +sff_dir_name_32 =sff32 +sff_dir_name_33 =sff33 +sff_dir_name_34 =sff34 +sff_dir_name_35 =sff35 +sff_dir_name_36 =sff36 +sff_dir_name_37 =sff37 +sff_dir_name_38 =sff38 +sff_dir_name_39 =sff39 +sff_dir_name_40 =sff40 +sff_dir_name_41 =sff41 +sff_dir_name_42 =sff42 +sff_dir_name_43 =sff43 +sff_dir_name_44 =sff44 +sff_dir_name_45 =sff45 +sff_dir_name_46 =sff46 +sff_dir_name_47 =sff47 +sff_dir_name_48 =sff48 +sff_dir_name_49 =sff49 +sff_dir_name_50 =sff50 +sff_dir_name_51 =sff51 +sff_dir_name_52 =sff52 +sff_dir_name_53 =sff53 +sff_dir_name_54 =sff54 +sff_dir_name_55 =sff55 +sff_dir_name_56 =sff56 +sff_dir_name_57 =sff57 +sff_dir_name_58 =sff58 +sff_dir_name_59 =sff59 +sff_dir_name_60 =sff60 +sff_dir_name_61 =sff61 +sff_dir_name_62 =sff62 +sff_dir_name_63 =sff63 +sff_dir_name_64 =sff64 + +# configuration item: sff cpld register status +# format: sff_cpld_reg_[sff_index]_[cpld_reg] +# sff_index: start from 1 +# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los +# 6: reset, 7: lpmode, 8: module_present, 9: interrupt + +# sff cpld presence status +sff_cpld_reg.mode_1_8=config +sff_cpld_reg.src_1_8=cpld +sff_cpld_reg.frmt_1_8=bit +sff_cpld_reg.pola_1_8=negative +sff_cpld_reg.addr_1_8=0x00030073 +sff_cpld_reg.len_1_8=1 +sff_cpld_reg.bit_offset_1_8=0 + +sff_cpld_reg.mode_2_8=config +sff_cpld_reg.src_2_8=cpld +sff_cpld_reg.frmt_2_8=bit +sff_cpld_reg.pola_2_8=negative +sff_cpld_reg.addr_2_8=0x00030073 +sff_cpld_reg.len_2_8=1 +sff_cpld_reg.bit_offset_2_8=1 + +sff_cpld_reg.mode_3_8=config +sff_cpld_reg.src_3_8=cpld +sff_cpld_reg.frmt_3_8=bit +sff_cpld_reg.pola_3_8=negative +sff_cpld_reg.addr_3_8=0x00040072 +sff_cpld_reg.len_3_8=1 +sff_cpld_reg.bit_offset_3_8=0 + +sff_cpld_reg.mode_4_8=config +sff_cpld_reg.src_4_8=cpld +sff_cpld_reg.frmt_4_8=bit +sff_cpld_reg.pola_4_8=negative +sff_cpld_reg.addr_4_8=0x00040072 +sff_cpld_reg.len_4_8=1 +sff_cpld_reg.bit_offset_4_8=1 + +sff_cpld_reg.mode_5_8=config +sff_cpld_reg.src_5_8=cpld +sff_cpld_reg.frmt_5_8=bit +sff_cpld_reg.pola_5_8=negative +sff_cpld_reg.addr_5_8=0x00030073 +sff_cpld_reg.len_5_8=1 +sff_cpld_reg.bit_offset_5_8=2 + +sff_cpld_reg.mode_6_8=config +sff_cpld_reg.src_6_8=cpld +sff_cpld_reg.frmt_6_8=bit +sff_cpld_reg.pola_6_8=negative +sff_cpld_reg.addr_6_8=0x00030073 +sff_cpld_reg.len_6_8=1 +sff_cpld_reg.bit_offset_6_8=3 + +sff_cpld_reg.mode_7_8=config +sff_cpld_reg.src_7_8=cpld +sff_cpld_reg.frmt_7_8=bit +sff_cpld_reg.pola_7_8=negative +sff_cpld_reg.addr_7_8=0x00040072 +sff_cpld_reg.len_7_8=1 +sff_cpld_reg.bit_offset_7_8=2 + +sff_cpld_reg.mode_8_8=config +sff_cpld_reg.src_8_8=cpld +sff_cpld_reg.frmt_8_8=bit +sff_cpld_reg.pola_8_8=negative +sff_cpld_reg.addr_8_8=0x00040072 +sff_cpld_reg.len_8_8=1 +sff_cpld_reg.bit_offset_8_8=3 + +sff_cpld_reg.mode_9_8=config +sff_cpld_reg.src_9_8=cpld +sff_cpld_reg.frmt_9_8=bit +sff_cpld_reg.pola_9_8=negative +sff_cpld_reg.addr_9_8=0x00030073 +sff_cpld_reg.len_9_8=1 +sff_cpld_reg.bit_offset_9_8=4 + +sff_cpld_reg.mode_10_8=config +sff_cpld_reg.src_10_8=cpld +sff_cpld_reg.frmt_10_8=bit +sff_cpld_reg.pola_10_8=negative +sff_cpld_reg.addr_10_8=0x00030073 +sff_cpld_reg.len_10_8=1 +sff_cpld_reg.bit_offset_10_8=5 + +sff_cpld_reg.mode_11_8=config +sff_cpld_reg.src_11_8=cpld +sff_cpld_reg.frmt_11_8=bit +sff_cpld_reg.pola_11_8=negative +sff_cpld_reg.addr_11_8=0x00040072 +sff_cpld_reg.len_11_8=1 +sff_cpld_reg.bit_offset_11_8=4 + +sff_cpld_reg.mode_12_8=config +sff_cpld_reg.src_12_8=cpld +sff_cpld_reg.frmt_12_8=bit +sff_cpld_reg.pola_12_8=negative +sff_cpld_reg.addr_12_8=0x00040072 +sff_cpld_reg.len_12_8=1 +sff_cpld_reg.bit_offset_12_8=5 + +sff_cpld_reg.mode_13_8=config +sff_cpld_reg.src_13_8=cpld +sff_cpld_reg.frmt_13_8=bit +sff_cpld_reg.pola_13_8=negative +sff_cpld_reg.addr_13_8=0x00030073 +sff_cpld_reg.len_13_8=1 +sff_cpld_reg.bit_offset_13_8=6 + +sff_cpld_reg.mode_14_8=config +sff_cpld_reg.src_14_8=cpld +sff_cpld_reg.frmt_14_8=bit +sff_cpld_reg.pola_14_8=negative +sff_cpld_reg.addr_14_8=0x00030073 +sff_cpld_reg.len_14_8=1 +sff_cpld_reg.bit_offset_14_8=7 + +sff_cpld_reg.mode_15_8=config +sff_cpld_reg.src_15_8=cpld +sff_cpld_reg.frmt_15_8=bit +sff_cpld_reg.pola_15_8=negative +sff_cpld_reg.addr_15_8=0x00040072 +sff_cpld_reg.len_15_8=1 +sff_cpld_reg.bit_offset_15_8=6 + +sff_cpld_reg.mode_16_8=config +sff_cpld_reg.src_16_8=cpld +sff_cpld_reg.frmt_16_8=bit +sff_cpld_reg.pola_16_8=negative +sff_cpld_reg.addr_16_8=0x00040072 +sff_cpld_reg.len_16_8=1 +sff_cpld_reg.bit_offset_16_8=7 + +sff_cpld_reg.mode_17_8=config +sff_cpld_reg.src_17_8=cpld +sff_cpld_reg.frmt_17_8=bit +sff_cpld_reg.pola_17_8=negative +sff_cpld_reg.addr_17_8=0x00030074 +sff_cpld_reg.len_17_8=1 +sff_cpld_reg.bit_offset_17_8=0 + +sff_cpld_reg.mode_18_8=config +sff_cpld_reg.src_18_8=cpld +sff_cpld_reg.frmt_18_8=bit +sff_cpld_reg.pola_18_8=negative +sff_cpld_reg.addr_18_8=0x00030074 +sff_cpld_reg.len_18_8=1 +sff_cpld_reg.bit_offset_18_8=1 + +sff_cpld_reg.mode_19_8=config +sff_cpld_reg.src_19_8=cpld +sff_cpld_reg.frmt_19_8=bit +sff_cpld_reg.pola_19_8=negative +sff_cpld_reg.addr_19_8=0x00050073 +sff_cpld_reg.len_19_8=1 +sff_cpld_reg.bit_offset_19_8=0 + +sff_cpld_reg.mode_20_8=config +sff_cpld_reg.src_20_8=cpld +sff_cpld_reg.frmt_20_8=bit +sff_cpld_reg.pola_20_8=negative +sff_cpld_reg.addr_20_8=0x00040073 +sff_cpld_reg.len_20_8=1 +sff_cpld_reg.bit_offset_20_8=0 + +sff_cpld_reg.mode_21_8=config +sff_cpld_reg.src_21_8=cpld +sff_cpld_reg.frmt_21_8=bit +sff_cpld_reg.pola_21_8=negative +sff_cpld_reg.addr_21_8=0x00030074 +sff_cpld_reg.len_21_8=1 +sff_cpld_reg.bit_offset_21_8=2 + +sff_cpld_reg.mode_22_8=config +sff_cpld_reg.src_22_8=cpld +sff_cpld_reg.frmt_22_8=bit +sff_cpld_reg.pola_22_8=negative +sff_cpld_reg.addr_22_8=0x00030074 +sff_cpld_reg.len_22_8=1 +sff_cpld_reg.bit_offset_22_8=3 + +sff_cpld_reg.mode_23_8=config +sff_cpld_reg.src_23_8=cpld +sff_cpld_reg.frmt_23_8=bit +sff_cpld_reg.pola_23_8=negative +sff_cpld_reg.addr_23_8=0x00040073 +sff_cpld_reg.len_23_8=1 +sff_cpld_reg.bit_offset_23_8=1 + +sff_cpld_reg.mode_24_8=config +sff_cpld_reg.src_24_8=cpld +sff_cpld_reg.frmt_24_8=bit +sff_cpld_reg.pola_24_8=negative +sff_cpld_reg.addr_24_8=0x00040073 +sff_cpld_reg.len_24_8=1 +sff_cpld_reg.bit_offset_24_8=2 + +sff_cpld_reg.mode_25_8=config +sff_cpld_reg.src_25_8=cpld +sff_cpld_reg.frmt_25_8=bit +sff_cpld_reg.pola_25_8=negative +sff_cpld_reg.addr_25_8=0x00030074 +sff_cpld_reg.len_25_8=1 +sff_cpld_reg.bit_offset_25_8=4 + +sff_cpld_reg.mode_26_8=config +sff_cpld_reg.src_26_8=cpld +sff_cpld_reg.frmt_26_8=bit +sff_cpld_reg.pola_26_8=negative +sff_cpld_reg.addr_26_8=0x00030074 +sff_cpld_reg.len_26_8=1 +sff_cpld_reg.bit_offset_26_8=5 + +sff_cpld_reg.mode_27_8=config +sff_cpld_reg.src_27_8=cpld +sff_cpld_reg.frmt_27_8=bit +sff_cpld_reg.pola_27_8=negative +sff_cpld_reg.addr_27_8=0x00040073 +sff_cpld_reg.len_27_8=1 +sff_cpld_reg.bit_offset_27_8=3 + +sff_cpld_reg.mode_28_8=config +sff_cpld_reg.src_28_8=cpld +sff_cpld_reg.frmt_28_8=bit +sff_cpld_reg.pola_28_8=negative +sff_cpld_reg.addr_28_8=0x00040073 +sff_cpld_reg.len_28_8=1 +sff_cpld_reg.bit_offset_28_8=4 + +sff_cpld_reg.mode_29_8=config +sff_cpld_reg.src_29_8=cpld +sff_cpld_reg.frmt_29_8=bit +sff_cpld_reg.pola_29_8=negative +sff_cpld_reg.addr_29_8=0x00030074 +sff_cpld_reg.len_29_8=1 +sff_cpld_reg.bit_offset_29_8=6 + +sff_cpld_reg.mode_30_8=config +sff_cpld_reg.src_30_8=cpld +sff_cpld_reg.frmt_30_8=bit +sff_cpld_reg.pola_30_8=negative +sff_cpld_reg.addr_30_8=0x00030074 +sff_cpld_reg.len_30_8=1 +sff_cpld_reg.bit_offset_30_8=7 + +sff_cpld_reg.mode_31_8=config +sff_cpld_reg.src_31_8=cpld +sff_cpld_reg.frmt_31_8=bit +sff_cpld_reg.pola_31_8=negative +sff_cpld_reg.addr_31_8=0x00040073 +sff_cpld_reg.len_31_8=1 +sff_cpld_reg.bit_offset_31_8=5 + +sff_cpld_reg.mode_32_8=config +sff_cpld_reg.src_32_8=cpld +sff_cpld_reg.frmt_32_8=bit +sff_cpld_reg.pola_32_8=negative +sff_cpld_reg.addr_32_8=0x00040073 +sff_cpld_reg.len_32_8=1 +sff_cpld_reg.bit_offset_32_8=6 + +sff_cpld_reg.mode_33_8=config +sff_cpld_reg.src_33_8=cpld +sff_cpld_reg.frmt_33_8=bit +sff_cpld_reg.pola_33_8=negative +sff_cpld_reg.addr_33_8=0x00030075 +sff_cpld_reg.len_33_8=1 +sff_cpld_reg.bit_offset_33_8=0 + +sff_cpld_reg.mode_34_8=config +sff_cpld_reg.src_34_8=cpld +sff_cpld_reg.frmt_34_8=bit +sff_cpld_reg.pola_34_8=negative +sff_cpld_reg.addr_34_8=0x00030075 +sff_cpld_reg.len_34_8=1 +sff_cpld_reg.bit_offset_34_8=1 + +sff_cpld_reg.mode_35_8=config +sff_cpld_reg.src_35_8=cpld +sff_cpld_reg.frmt_35_8=bit +sff_cpld_reg.pola_35_8=negative +sff_cpld_reg.addr_35_8=0x00050073 +sff_cpld_reg.len_35_8=1 +sff_cpld_reg.bit_offset_35_8=1 + +sff_cpld_reg.mode_36_8=config +sff_cpld_reg.src_36_8=cpld +sff_cpld_reg.frmt_36_8=bit +sff_cpld_reg.pola_36_8=negative +sff_cpld_reg.addr_36_8=0x00050073 +sff_cpld_reg.len_36_8=1 +sff_cpld_reg.bit_offset_36_8=2 + +sff_cpld_reg.mode_37_8=config +sff_cpld_reg.src_37_8=cpld +sff_cpld_reg.frmt_37_8=bit +sff_cpld_reg.pola_37_8=negative +sff_cpld_reg.addr_37_8=0x00030075 +sff_cpld_reg.len_37_8=1 +sff_cpld_reg.bit_offset_37_8=2 + +sff_cpld_reg.mode_38_8=config +sff_cpld_reg.src_38_8=cpld +sff_cpld_reg.frmt_38_8=bit +sff_cpld_reg.pola_38_8=negative +sff_cpld_reg.addr_38_8=0x00030075 +sff_cpld_reg.len_38_8=1 +sff_cpld_reg.bit_offset_38_8=3 + +sff_cpld_reg.mode_39_8=config +sff_cpld_reg.src_39_8=cpld +sff_cpld_reg.frmt_39_8=bit +sff_cpld_reg.pola_39_8=negative +sff_cpld_reg.addr_39_8=0x00050073 +sff_cpld_reg.len_39_8=1 +sff_cpld_reg.bit_offset_39_8=3 + +sff_cpld_reg.mode_40_8=config +sff_cpld_reg.src_40_8=cpld +sff_cpld_reg.frmt_40_8=bit +sff_cpld_reg.pola_40_8=negative +sff_cpld_reg.addr_40_8=0x00050073 +sff_cpld_reg.len_40_8=1 +sff_cpld_reg.bit_offset_40_8=4 + +sff_cpld_reg.mode_41_8=config +sff_cpld_reg.src_41_8=cpld +sff_cpld_reg.frmt_41_8=bit +sff_cpld_reg.pola_41_8=negative +sff_cpld_reg.addr_41_8=0x00030075 +sff_cpld_reg.len_41_8=1 +sff_cpld_reg.bit_offset_41_8=4 + +sff_cpld_reg.mode_42_8=config +sff_cpld_reg.src_42_8=cpld +sff_cpld_reg.frmt_42_8=bit +sff_cpld_reg.pola_42_8=negative +sff_cpld_reg.addr_42_8=0x00030075 +sff_cpld_reg.len_42_8=1 +sff_cpld_reg.bit_offset_42_8=5 + +sff_cpld_reg.mode_43_8=config +sff_cpld_reg.src_43_8=cpld +sff_cpld_reg.frmt_43_8=bit +sff_cpld_reg.pola_43_8=negative +sff_cpld_reg.addr_43_8=0x00050073 +sff_cpld_reg.len_43_8=1 +sff_cpld_reg.bit_offset_43_8=5 + +sff_cpld_reg.mode_44_8=config +sff_cpld_reg.src_44_8=cpld +sff_cpld_reg.frmt_44_8=bit +sff_cpld_reg.pola_44_8=negative +sff_cpld_reg.addr_44_8=0x00050073 +sff_cpld_reg.len_44_8=1 +sff_cpld_reg.bit_offset_44_8=6 + +sff_cpld_reg.mode_45_8=config +sff_cpld_reg.src_45_8=cpld +sff_cpld_reg.frmt_45_8=bit +sff_cpld_reg.pola_45_8=negative +sff_cpld_reg.addr_45_8=0x00030075 +sff_cpld_reg.len_45_8=1 +sff_cpld_reg.bit_offset_45_8=6 + +sff_cpld_reg.mode_46_8=config +sff_cpld_reg.src_46_8=cpld +sff_cpld_reg.frmt_46_8=bit +sff_cpld_reg.pola_46_8=negative +sff_cpld_reg.addr_46_8=0x00030075 +sff_cpld_reg.len_46_8=1 +sff_cpld_reg.bit_offset_46_8=7 + +sff_cpld_reg.mode_47_8=config +sff_cpld_reg.src_47_8=cpld +sff_cpld_reg.frmt_47_8=bit +sff_cpld_reg.pola_47_8=negative +sff_cpld_reg.addr_47_8=0x00050073 +sff_cpld_reg.len_47_8=1 +sff_cpld_reg.bit_offset_47_8=7 + +sff_cpld_reg.mode_48_8=config +sff_cpld_reg.src_48_8=cpld +sff_cpld_reg.frmt_48_8=bit +sff_cpld_reg.pola_48_8=negative +sff_cpld_reg.addr_48_8=0x00050074 +sff_cpld_reg.len_48_8=1 +sff_cpld_reg.bit_offset_48_8=0 + +sff_cpld_reg.mode_49_8=config +sff_cpld_reg.src_49_8=cpld +sff_cpld_reg.frmt_49_8=bit +sff_cpld_reg.pola_49_8=negative +sff_cpld_reg.addr_49_8=0x00020071 +sff_cpld_reg.len_49_8=1 +sff_cpld_reg.bit_offset_49_8=0 + +sff_cpld_reg.mode_50_8=config +sff_cpld_reg.src_50_8=cpld +sff_cpld_reg.frmt_50_8=bit +sff_cpld_reg.pola_50_8=negative +sff_cpld_reg.addr_50_8=0x00020071 +sff_cpld_reg.len_50_8=1 +sff_cpld_reg.bit_offset_50_8=1 + +sff_cpld_reg.mode_51_8=config +sff_cpld_reg.src_51_8=cpld +sff_cpld_reg.frmt_51_8=bit +sff_cpld_reg.pola_51_8=negative +sff_cpld_reg.addr_51_8=0x00050074 +sff_cpld_reg.len_51_8=1 +sff_cpld_reg.bit_offset_51_8=1 + +sff_cpld_reg.mode_52_8=config +sff_cpld_reg.src_52_8=cpld +sff_cpld_reg.frmt_52_8=bit +sff_cpld_reg.pola_52_8=negative +sff_cpld_reg.addr_52_8=0x00050074 +sff_cpld_reg.len_52_8=1 +sff_cpld_reg.bit_offset_52_8=2 + +sff_cpld_reg.mode_53_8=config +sff_cpld_reg.src_53_8=cpld +sff_cpld_reg.frmt_53_8=bit +sff_cpld_reg.pola_53_8=negative +sff_cpld_reg.addr_53_8=0x00020071 +sff_cpld_reg.len_53_8=1 +sff_cpld_reg.bit_offset_53_8=2 + +sff_cpld_reg.mode_54_8=config +sff_cpld_reg.src_54_8=cpld +sff_cpld_reg.frmt_54_8=bit +sff_cpld_reg.pola_54_8=negative +sff_cpld_reg.addr_54_8=0x00020071 +sff_cpld_reg.len_54_8=1 +sff_cpld_reg.bit_offset_54_8=3 + +sff_cpld_reg.mode_55_8=config +sff_cpld_reg.src_55_8=cpld +sff_cpld_reg.frmt_55_8=bit +sff_cpld_reg.pola_55_8=negative +sff_cpld_reg.addr_55_8=0x00050074 +sff_cpld_reg.len_55_8=1 +sff_cpld_reg.bit_offset_55_8=3 + +sff_cpld_reg.mode_56_8=config +sff_cpld_reg.src_56_8=cpld +sff_cpld_reg.frmt_56_8=bit +sff_cpld_reg.pola_56_8=negative +sff_cpld_reg.addr_56_8=0x00050074 +sff_cpld_reg.len_56_8=1 +sff_cpld_reg.bit_offset_56_8=4 + +sff_cpld_reg.mode_57_8=config +sff_cpld_reg.src_57_8=cpld +sff_cpld_reg.frmt_57_8=bit +sff_cpld_reg.pola_57_8=negative +sff_cpld_reg.addr_57_8=0x00020071 +sff_cpld_reg.len_57_8=1 +sff_cpld_reg.bit_offset_57_8=4 + +sff_cpld_reg.mode_58_8=config +sff_cpld_reg.src_58_8=cpld +sff_cpld_reg.frmt_58_8=bit +sff_cpld_reg.pola_58_8=negative +sff_cpld_reg.addr_58_8=0x00020071 +sff_cpld_reg.len_58_8=1 +sff_cpld_reg.bit_offset_58_8=5 + +sff_cpld_reg.mode_59_8=config +sff_cpld_reg.src_59_8=cpld +sff_cpld_reg.frmt_59_8=bit +sff_cpld_reg.pola_59_8=negative +sff_cpld_reg.addr_59_8=0x00050074 +sff_cpld_reg.len_59_8=1 +sff_cpld_reg.bit_offset_59_8=5 + +sff_cpld_reg.mode_60_8=config +sff_cpld_reg.src_60_8=cpld +sff_cpld_reg.frmt_60_8=bit +sff_cpld_reg.pola_60_8=negative +sff_cpld_reg.addr_60_8=0x00050074 +sff_cpld_reg.len_60_8=1 +sff_cpld_reg.bit_offset_60_8=6 + +sff_cpld_reg.mode_61_8=config +sff_cpld_reg.src_61_8=cpld +sff_cpld_reg.frmt_61_8=bit +sff_cpld_reg.pola_61_8=negative +sff_cpld_reg.addr_61_8=0x00020071 +sff_cpld_reg.len_61_8=1 +sff_cpld_reg.bit_offset_61_8=6 + +sff_cpld_reg.mode_62_8=config +sff_cpld_reg.src_62_8=cpld +sff_cpld_reg.frmt_62_8=bit +sff_cpld_reg.pola_62_8=negative +sff_cpld_reg.addr_62_8=0x00020071 +sff_cpld_reg.len_62_8=1 +sff_cpld_reg.bit_offset_62_8=7 + +sff_cpld_reg.mode_63_8=config +sff_cpld_reg.src_63_8=cpld +sff_cpld_reg.frmt_63_8=bit +sff_cpld_reg.pola_63_8=negative +sff_cpld_reg.addr_63_8=0x00050074 +sff_cpld_reg.len_63_8=1 +sff_cpld_reg.bit_offset_63_8=7 + +sff_cpld_reg.mode_64_8=config +sff_cpld_reg.src_64_8=cpld +sff_cpld_reg.frmt_64_8=bit +sff_cpld_reg.pola_64_8=negative +sff_cpld_reg.addr_64_8=0x00050075 +sff_cpld_reg.len_64_8=1 +sff_cpld_reg.bit_offset_64_8=0 \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/cfg_file_name new file mode 100644 index 00000000000..5f49420441a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/cfg_file_name @@ -0,0 +1,4 @@ +WB_PLAT_CPLD +WB_PLAT_FAN +WB_PLAT_PSU +WB_PLAT_SFF diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/setup.py new file mode 100644 index 00000000000..6c3916921ab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/setup.py @@ -0,0 +1,39 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation', + license='Apache 2.0', + author='SONiC Team', + author_email='support', + url='', + maintainer='support', + maintainer_email='', + packages=[ + 'sonic_platform', + 'plat_hal', + 'wbutil', + 'eepromutil', + 'hal-config', + 'config', + ], + py_modules=[ + 'hal_pltfm', + 'platform_util', + 'platform_intf', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/Makefile new file mode 100644 index 00000000000..0ddc80aae7d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/Makefile @@ -0,0 +1,30 @@ +PWD = $(shell pwd) +DIR_KERNEL_SRC = $(PWD)/modules/driver +EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -Wall +SUB_BUILD_DIR = $(PWD)/build +INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages +INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg +INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system + +all: + $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules + @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi + cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR) + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi + @if [ -d $(PWD)/sonic_platform/ ]; then rm -rf ${INSTALL_LIB_DIR}/sonic_platform ;fi + @if [ -d $(PWD)/sonic_platform/ ]; then cp -rf $(PWD)/sonic_platform ${INSTALL_LIB_DIR} ;fi + @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi + @if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi + @if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi + @if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi + @if [ -d $(PWD)/service/ ]; then cp -r $(PWD)/service/* ${INSTALL_SERVICE_DIR} ;fi +clean: + rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd + rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order + rm -rf ${DIR_KERNEL_SRC}/.tmp_versions + rm -rf $(SUB_BUILD_DIR) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_config.py new file mode 100755 index 00000000000..58ec348834a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_config.py @@ -0,0 +1,779 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 0, + "hal_ledctrl":0, + "avscontrol": 0, + "dev_monitor": 0, + "reboot_cause": 0, + "pmon_syslog": 0, + "sff_temp_polling": 0, +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "onie" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "onie": { + "key": "ONIE", + "next": "cpu" + }, + "onie_date": { + "parent": "onie", + "key": "Build Date", + "file": "/host/machine.conf", + "pattern": r"^onie_build_date", + "separator": "=", + "arrt_index": 1, + }, + "onie_version": { + "parent": "onie", + "key": "Version", + "file": "/host/machine.conf", + "pattern": r"^onie_version", + "separator": "=", + "arrt_index": 2, + }, + + "cpu": { + "key": "CPU", + "next": "ssd" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + "ssd": { + "key": "SSD", + "next": "cpld" + }, + "ssd_model": { + "parent": "ssd", + "key": "Device Model", + "cmd": "smartctl -i /dev/sda |grep \"Device Model\"", + "pattern": r".*Device Model", + "separator": ":", + "arrt_index": 1, + }, + "ssd_fw": { + "parent": "ssd", + "key": "Firmware Version", + "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"", + "pattern": r".*Firmware Version", + "separator": ":", + "arrt_index": 2, + }, + "ssd_user_cap": { + "parent": "ssd", + "key": "User Capacity", + "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"", + "pattern": r".*User Capacity", + "separator": ":", + "arrt_index": 3, + }, + + "cpld": { + "key": "CPLD", + "next": "fpga" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "reg": { + "loc": "/dev/port", + "offset": 0xa00, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "BASE CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "reg": { + "loc": "/dev/port", + "offset": 0x900, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "LC CPLD", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "i2c": { + "bus": "17", + "loc": "0x30", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "MAC CPLDA", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "i2c": { + "bus": "18", + "loc": "0x30", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "MAC CPLDB", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "i2c": { + "bus": "19", + "loc": "0x30", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "i210": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "i210", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "i210", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "i210", + "cmd": "ethtool -i eth0", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + + "fpga": { + "key": "FPGA", + }, + "fpga_model": { + "parent": "fpga", + "config": "XC7A50T-2FGG484I", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga_vendor": { + "parent": "fpga", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga_desc": { + "parent": "fpga", + "config": "NA", + "key": "Description", + "arrt_index": 3, + }, + "fpga_hw_version": { + "parent": "fpga", + "config": "NA", + "key": "Hardware Version", + "arrt_index": 4, + }, + "fpga_fw_version": { + "parent": "fpga", + "pci": { + "bus": 3, + "slot": 0, + "fn": 0, + "bar": 0, + "offset": 0 + }, + "key": "Firmware Version", + "arrt_index": 5, + }, + "fpga_date": { + "parent": "fpga", + "pci": { + "bus": 3, + "slot": 0, + "fn": 0, + "bar": 0, + "offset": 4 + }, + "key": "Build Date", + "arrt_index": 6, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "sffs": { + "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0}, + "nochangedmsgflag": 0, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 1, + "alias": { + "sff49": "Ethernet49", + "sff50": "Ethernet50", + "sff51": "Ethernet51", + "sff52": "Ethernet52" + } + }, + "fans": { + "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2" + } + }, + "psus": { + "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/wb_plat/psu/%s/output", "okval": 1}, + {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2" + } + } +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default": 0x01, # default value, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"io_addr": 0x956, "gettype": "io"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/17-0058/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x08: 0.875, + 0x04: 0.850, + 0x02: 0.825, + 0x01: 0.800 + } + } +] + + +DRIVERLISTS = [ + {"name": "r8169", "delay": 0, "removable": 0}, + {"name": "ice", "delay": 0, "removable": 0}, + {"name": "i2c_i801", "delay": 0}, + {"name": "i2c_dev", "delay": 0}, + {"name": "i2c_mux", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40c7", "delay": 0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_i2c_ocores", "delay": 0}, + {"name": "wb_i2c_ocores_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device", "delay": 0}, + {"name": "wb_i2c_dev_device", "delay": 0}, + {"name": "optoe", "delay": 0}, + {"name": "at24", "delay": 0}, +] + +DEVICE = [ + {"name": "24c02", "bus": 0, "loc": 0x56}, +] + +OPTOE = [ + {"name": "optoe3", "startbus": 25, "endbus": 152}, +] + +REBOOT_CTRL_PARAM = { + #"cpu": {"io_addr": 0x910, "rst_val": 0x10, "rst_delay": 0, "gettype": "io"}, + #"mac": {"io_addr": 0x930, "rst_val": 0xbf, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"}, + #"phy": {"io_addr": 0x930, "rst_val": 0xf7, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"}, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu1", + "present": {"gettype": "io", "io_addr": 0xb10, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "psu1frue2", "name": "24c02", "bus": 7, "loc": 0x56, "attr": "eeprom"}, + ], + }, + { + "name": "psu2", + "present": {"gettype": "io", "io_addr": 0xb10, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "psu2frue2", "name": "24c02", "bus": 7, "loc": 0x57, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + { + "name": "fan1", + "present": {"gettype": "io", "io_addr": 0x994, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "24c02", "bus": 8, "loc": 0x53, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "io", "io_addr": 0x994, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "24c02", "bus": 9, "loc": 0x53, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "24c02", "bus": 2, "loc": 0x56, "attr": "eeprom"}, + ], + }, + { + "name": "tmp275", + "device": [ + {"id": "tmp275_1", "name": "wb_tmp275", "bus": 6, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_2", "name": "wb_tmp275", "bus": 6, "loc": 0x49, "attr": "hwmon"}, + ], + }, + { + "name": "mac_bsc", + "device": [ + {"id": "mac_bsc_1", "name": "wb_mac_bsc_td3_x2", "bus": 18, "loc": 0x44, "attr": "hwmon"}, + ], + }, + { + "name": "ina3221", + "device": [ + {"id": "ina3221_1", "name": "wb_ina3221", "bus": 3, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_2", "name": "wb_ina3221", "bus": 3, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_3", "name": "wb_ina3221", "bus": 3, "loc": 0x42, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe12284", + "device": [ + {"id": "xdpe12284_1", "name": "wb_xdpe12284", "bus": 0, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 0, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 0, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 17, "loc": 0x58, "attr": "hwmon"}, + ], + }, + ], +} + +INIT_PARAM_PRE = [] + +INIT_COMMAND_PRE = [] + +INIT_PARAM = [] + +INIT_COMMAND = [ + # set sysled + "dfd_debug io_wr 0x950 0x04", + # mac led reset + "dfd_debug sysfs_data_wr /dev/fpga0 0x40 0x98 0x00 0x00 0x00", + "dfd_debug sysfs_data_wr /dev/fpga0 0x44 0x98 0x00 0x00 0x00", + "dfd_debug sysfs_data_wr /dev/fpga0 0x48 0x98 0x00 0x00 0x00", + "dfd_debug sysfs_data_wr /dev/fpga0 0x4c 0x98 0x00 0x00 0x00", + # enable root port PCIe AER + "setpci -s 00:10.0 0x5c.b=0x1f", + "setpci -s 00:12.0 0x5c.b=0x1f", + "setpci -s 00:14.0 0x5c.b=0x1f", + "setpci -s 14:02.0 0x5c.b=0x1f", + "setpci -s 14:03.0 0x5c.b=0x1f", + "setpci -s 14:04.0 0x5c.b=0x1f", + "setpci -s 14:05.0 0x5c.b=0x1f" +] + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "wdt_reboot", + "monitor_point": {"gettype": "io", "io_addr": 0x76b, "okval": 1}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Watchdog, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Watchdog, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024} + ], + "finish_operation": [ + {"gettype": "io", "io_addr": 0x76b, "value": 0x00}, + ] + }, + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + + +WARM_UPGRADE_PARAM = { + "slot0": { + "VME": { + "chain1": [ + {"name": "CPU_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/refresh_cpu_cpld_header.vme", + "init_cmd": [ + {"cmd": "echo 98 > /sys/class/gpio/export", "gettype": "cmd"}, + {"cmd": "echo high > /sys/class/gpio/gpio98/direction", "gettype": "cmd"}, + {"io_addr": 0x7a5, "value": 0, "gettype": "io"}, + ], + "rw_recover_reg": [ + {"io_addr": 0x721, "value": None, "gettype": "io"}, + {"io_addr": 0x765, "value": None, "gettype": "io"}, + {"io_addr": 0x766, "value": None, "gettype": "io"}, + {"io_addr": 0x768, "value": None, "gettype": "io"}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "refresh_finish_flag_check": {"io_addr":0x7a5, "value":0x01, "gettype":"io"}, + "access_check_reg": {"io_addr": 0x705, "value": 0x5a, "gettype": "io"}, + "finish_cmd": [ + {"cmd": "echo 0 > /sys/class/gpio/gpio98/value", "gettype": "cmd"}, + {"cmd": "echo 98 > /sys/class/gpio/unexport", "gettype": "cmd"}, + ], + }, + ], + }, + }, + "stop_services_cmd": [ + "/usr/local/bin/platform_process.py stop", + ], + "start_services_cmd": [ + "/usr/local/bin/platform_process.py start", + ], +} + +UPGRADE_SUMMARY = { + "devtype": 0x40c7, + + "slot0": { + "subtype": 0, + "VME": { + "chain1": { + "name": "CPU_CPLD", + "is_support_warm_upg": 0, + }, + "chain2": { + "name": "BASE_CPLD", + "is_support_warm_upg": 0, + }, + "chain3": { + "name": "LC_CPLD", + "is_support_warm_upg": 0, + }, + "chain4": { + "name": "MAC_CPLDA", + "is_support_warm_upg": 0, + }, + "chain5": { + "name": "MAC_CPLDB", + "is_support_warm_upg": 0, + }, + "chain6": { + "name": "FCB_CPLD", + "is_support_warm_upg": 0, + }, + "chain7": { + "name": "MISC_CPLD", + "is_support_warm_upg": 0, + }, + "chain8": { + "name": "PCIE_CPLD", + "is_support_warm_upg": 0, + }, + }, + + "SPI-LOGIC-DEV": { + "chain1": { + "name": "FPGA", + "is_support_warm_upg": 0, + }, + }, + + "MTD": { + "chain2": { + "name": "BIOS", + "is_support_warm_upg": 0, + "filesizecheck": 20480, # bios check file size, Unit: K + "init_cmd": [ + {"cmd": "modprobe mtd", "gettype": "cmd"}, + {"cmd": "modprobe spi_nor", "gettype": "cmd"}, + {"cmd": "modprobe ofpart", "gettype": "cmd"}, + {"cmd": "modprobe spi_intel writeable=1", "gettype": "cmd"}, + {"cmd": "modprobe intel_spi_pci", "gettype": "cmd"}, + ], + "finish_cmd": [ + {"cmd": "rmmod intel_spi_pci", "gettype": "cmd"}, + {"cmd": "rmmod spi_intel", "gettype": "cmd"}, + {"cmd": "rmmod ofpart", "gettype": "cmd"}, + {"cmd": "rmmod spi_nor", "gettype": "cmd"}, + {"cmd": "rmmod mtd", "gettype": "cmd"}, + ], + }, + }, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/fpga_test_header.bin", "display_name": "FPGA"}, + ], + "cpld": [ + {"chain": 1, "file": "/etc/.upgrade_test/cpu_cpld_test_header.vme", "display_name": "CPU_CPLD"}, + {"chain": 2, "file": "/etc/.upgrade_test/base_cpld_test_header.vme", "display_name": "BASE_CPLD"}, + {"chain": 3, "file": "/etc/.upgrade_test/lc_cpld_test_header.vme", "display_name": "LC_CPLD"}, + {"chain": 4, "file": "/etc/.upgrade_test/mac_cplda_test_header.vme", "display_name": "MAC_CPLDA"}, + {"chain": 5, "file": "/etc/.upgrade_test/mac_cpldb_test_header.vme", "display_name": "MAC_CPLDB"}, + {"chain": 6, "file": "/etc/.upgrade_test/fcb_cpld_test_header.vme", "display_name": "FCB_CPLD"}, + {"chain": 7, "file": "/etc/.upgrade_test/misc_cpld_test_header.vme", "display_name": "MISC_CPLD"}, + #{"chain": 8, "file": "/etc/.upgrade_test/pcie_cpld_test_header.vme", "display_name": "PCIe_CPLD"}, + ], + }, + }, +} + + +PLATFORM_E2_CONF = { + "fan": [ + #{"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/8-0053/eeprom"}, + #{"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/9-0053/eeprom"}, + ], + "psu": [ + #{"name": "psu1", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0056/eeprom"}, + #{"name": "psu2", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0057/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/0-0056/eeprom"}, + ], +} \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_port_config.py new file mode 100755 index 00000000000..58bf1b9b404 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_port_config.py @@ -0,0 +1,136 @@ +#!/usr/bin/python3 +# -*- coding: UTF-8 -*- + +PLATFORM_INTF_OPTOE = { + "port_num": 128, + "port_bus_map": { + 1: 25, + 2: 26, + 3: 27, + 4: 28, + 7: 29, + 8: 30, + 9: 31, + 10: 32, + 13: 33, + 14: 34, + 15: 35, + 16: 36, + 19: 37, + 20: 38, + 21: 39, + 22: 40, + 25: 41, + 26: 42, + 27: 43, + 28: 44, + 31: 45, + 32: 46, + 33: 47, + 34: 48, + 37: 49, + 38: 50, + 39: 51, + 40: 52, + 43: 53, + 44: 54, + 45: 55, + 46: 56, + 49: 57, + 50: 58, + 51: 59, + 52: 60, + 55: 61, + 56: 62, + 57: 63, + 58: 64, + 61: 65, + 62: 66, + 63: 67, + 64: 68, + 67: 69, + 68: 70, + 69: 71, + 70: 72, + 73: 73, + 74: 74, + 75: 75, + 76: 76, + 79: 77, + 80: 78, + 81: 79, + 82: 80, + 85: 81, + 86: 82, + 87: 83, + 88: 84, + 91: 85, + 92: 86, + 93: 87, + 94: 88, + 97: 89, + 98: 90, + 99: 91, + 100: 92, + 103: 93, + 104: 94, + 105: 95, + 106: 96, + 109: 97, + 110: 98, + 111: 99, + 112: 100, + 115: 101, + 116: 102, + 117: 103, + 118: 104, + 121: 105, + 122: 106, + 123: 107, + 124: 108, + 125: 109, + 126: 110, + 127: 111, + 128: 112, + 5: 113, + 6: 114, + 11: 115, + 12: 116, + 17: 117, + 18: 118, + 23: 119, + 24: 120, + 29: 121, + 30: 122, + 35: 123, + 36: 124, + 41: 125, + 42: 126, + 47: 127, + 48: 128, + 53: 129, + 54: 130, + 59: 131, + 60: 132, + 65: 133, + 66: 134, + 71: 135, + 72: 136, + 77: 137, + 78: 138, + 83: 139, + 84: 140, + 89: 141, + 90: 142, + 95: 143, + 96: 144, + 101: 145, + 102: 146, + 107: 147, + 108: 148, + 113: 149, + 114: 150, + 119: 151, + 120: 152, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_device.py new file mode 100755 index 00000000000..ac42fa24569 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_device.py @@ -0,0 +1,186 @@ +#!/usr/bin/python3 + +psu_fan_airflow = { + "intake": ['GW-CRPS2000DWA'] +} + +fanairflow = { + "intake": ['FAN80-01-F'], +} + +psu_display_name = { + "PA2000I-F": ['GW-CRPS2000DWA'], +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +class Description: + CPLD = "Used for managing IO modules, SFP+ modules and system LEDs" + BIOS = "Performs initialization of hardware components during booting" + FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power" + + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/0-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + + "thermal_config": { + "number": 10, + }, + + "fan_config": { + "num_fantrays": 5, + "num_fans_pertray": 2, + }, + + "psu_config": { + "number": 4 + }, + + "cpld_config": { + "number": 7 + }, + + "bmc_config": { + "number": 1 + }, + + "fpga_config": { + "number": 1, + "fpgas": [ + { + "name": "fpga0", + "alias": "MAC FPGA", + "type": "XC7A50T-2FGG484I", + "firmware_version": { + "dev_path": "/dev/fpga0", + "offset": 0x00, + "len": 4 + }, + "board_version": { + "dev_path": "/dev/fpga0", + "offset": 0x04, + "len": 4 + } + } + ] + }, + + "bios_config": { + "number": 1, + "bios": [ + { + "name": "bios0", + "alias": "BIOS", + "type": { + "cmd": "dmidecode -t 0 |grep Vendor |awk -F\": \" \'{ print $2 }\'", + "gettype": "cmd" + }, + "firmware_version": { + "cmd": "dmidecode -t 0 |grep Version |awk -F\": \" \'{ print $2 }\'", + "gettype": "cmd" + }, + "board_version": { + "cmd": "dmidecode -t 0 |grep Version |awk -F\": \" \'{ print $2 }\'", + "gettype": "cmd" + } + } + ] + }, + + "cpu": [ + { + "name": "cpu", + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '1.0', + "port_index_start": 0, + "port_num": 128, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_cpld": { + "dev_id": { + 3: { + "offset": { + 0x30: "1-4, 7-10", + 0x31: "13-16, 19-22", + 0x32: "25-28, 31-34", + 0x33: "37-40, 43-46", + 0x34: "49-52, 55-58", + 0x35: "61-64", + }, + }, + 4: { + "offset": { + 0x30: "67-70, 73-76", + 0x31: "79-82, 85-88", + 0x32: "91-94, 97-100", + 0x33: "103-106, 109-112", + 0x34: "115-118, 121-124", + 0x35: "125-128", + }, + }, + 2: { + "offset": { + 0x30: "5-6, 11-12, 17-18, 23-24", + 0x31: "29-30, 35-36, 41-42, 47-48", + 0x32: "53-54, 59-60, 65-66, 71-72", + 0x33: "77-78, 83-84, 89-90, 95-96", + 0x34: "101-102, 107-108, 113-114, 119-120", + }, + }, + }, + }, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": list(range(25, 153)), + "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class", + "optoe_driver_key": list(range(25, 153)), + "reset_cpld": { + "dev_id": { + 3: { + "offset": { + 0x90: "1-4, 7-10", + 0x91: "13-16, 19-22", + 0x92: "25-28, 31-34", + 0x93: "37-40, 43-46", + 0x94: "49-52, 55-58", + 0x95: "61-64", + }, + }, + 4: { + "offset": { + 0x90: "67-70, 73-76", + 0x91: "79-82, 85-88", + 0x92: "91-94, 97-100", + 0x93: "103-106, 109-112", + 0x94: "115-118, 121-124", + 0x95: "125-128", + }, + }, + 2: { + "offset": { + 0x90: "5-6, 11-12, 17-18, 23-24", + 0x91: "29-30, 35-36, 41-42, 47-48", + 0x92: "53-54, 59-60, 65-66, 71-72", + 0x93: "77-78, 83-84, 89-90, 95-96", + 0x94: "101-102, 107-108, 113-114, 119-120", + }, + }, + }, + }, + "reset_val_is_reset": 0, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_monitor.py new file mode 100755 index 00000000000..6d68e1a5f9e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_monitor.py @@ -0,0 +1,141 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x55, + "pwm_max": 0xff, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x55, + "pwm_max": 0xff, + "a": -0.05, + "b": 11.32, + "c": -166, + "tin_min": 25, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 0, + "type": "duty", + "pwm_min": 0x55, + "pwm_max": 0xff, + "Kp": 1, + "Ki": 0.4, + "Kd": 0, + "target": 80, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 0, + "type": "duty", + "pwm_min": 0x55, + "pwm_max": 0xff, + "Kp": 1, + "Ki": 0.4, + "Kd": 0.3, + "target": 90, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 0, + "type": "duty", + "pwm_min": 0x55, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 60, + "value": [None, None, None], + }, + "SFF_TEMP": { + "name": "SFF_TEMP", + "flag": 0, + "type": "duty", + "pwm_min": 0x55, + "pwm_max": 0xff, + "Kp": 1, + "Ki": 1, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 105, "critical": 110}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 55, "critical": 60}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 85, "critical": 91}, + "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999}, + }, + + "fancontrol_para": { + "interval": 5, + "fan_air_flow_monitor": 1, + "psu_air_flow_monitor": 1, + "max_pwm": 0xff, + "min_pwm": 0x55, + "abnormal_pwm": 0xff, + "warning_pwm": 0xff, + "temp_invalid_pid_pwm": 0x55, + "temp_error_pid_pwm": 0x55, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_absent_fullspeed_num": 1, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + "psu_fan_control": 0, + }, + + "ledcontrol_para": { + "interval": 5, + "checkpsu": 0, # 0: sys led don't follow psu led + "checkfan": 0, # 0: sys led don't follow fan led + "psu_amber_num": 1, + "fan_amber_num": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + "psu_air_flow_monitor": 1, + "fan_air_flow_monitor": 1, + "psu_air_flow_amber_num": 1, + "fan_air_flow_amber_num": 1, + }, + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/Makefile new file mode 100644 index 00000000000..912c4f82c6e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/Makefile @@ -0,0 +1,10 @@ +MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST))) +MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules) + +EXTRA_CFLAGS+= -I$(MODULES_DIR) + +obj-m := wb_pcie_dev_device.o +obj-m += wb_i2c_ocores_device.o +obj-m += wb_i2c_mux_pca954x_device.o +obj-m += wb_i2c_dev_device.o +obj-m += wb_io_dev_device.o diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c new file mode 100644 index 00000000000..c0a7e6c0021 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c @@ -0,0 +1,161 @@ +/* + * An wb_i2c_dev_device driver for i2c dev device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_dev_device_debug = 0; +static int g_wb_i2c_dev_device_error = 0; + +module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_dev_device_debug) { \ + printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_dev_device_error) { \ + printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_dev_device_t i2c_dev_device_data0 = { + .i2c_bus = 17, + .i2c_addr = 0x30, + .i2c_name = "cpld2", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data1 = { + .i2c_bus = 18, + .i2c_addr = 0x30, + .i2c_name = "cpld3", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data2 = { + .i2c_bus = 19, + .i2c_addr = 0x30, + .i2c_name = "cpld4", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data3 = { + .i2c_bus = 20, + .i2c_addr = 0x30, + .i2c_name = "cpld5", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + + +struct i2c_board_info i2c_dev_device_info[] = { + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data0, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data1, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data2, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data3, + }, +}; + +static int __init wb_i2c_dev_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus); + if (adap == NULL) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); + if (!client) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", + i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); + } else { + i2c_dev_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_dev_device_exit(void) +{ + int i; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + if (i2c_dev_device_data->client) { + i2c_unregister_device(i2c_dev_device_data->client); + i2c_dev_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_dev_device_init); +module_exit(wb_i2c_dev_device_exit); +MODULE_DESCRIPTION("I2C DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c new file mode 100644 index 00000000000..6d96bb56590 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c @@ -0,0 +1,539 @@ +/* + * An wb_i2c_mux_pca954x_device driver for pca954x i2c load device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_mux_pca954x_device_debug = 0; +static int g_wb_i2c_mux_pca954x_device_error = 0; + +module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_error) { \ + printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = { + .i2c_bus = 1, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 25, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00000001, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00000001, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = { + .i2c_bus = 2, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 33, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00000002, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00000002, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data2 = { + .i2c_bus = 3, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 41, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00000004, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00000004, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data3 = { + .i2c_bus = 4, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 49, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00000008, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00000008, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data4 = { + .i2c_bus = 5, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 57, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00000010, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00000010, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data5 = { + .i2c_bus = 6, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 65, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00000020, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00000020, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data6 = { + .i2c_bus = 7, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 73, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00000040, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00000040, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data7 = { + .i2c_bus = 8, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 81, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00000080, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00000080, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data8 = { + .i2c_bus = 9, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 89, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00000100, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00000100, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data9 = { + .i2c_bus = 10, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 97, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00000200, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00000200, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data10 = { + .i2c_bus = 11, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 105, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00000400, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00000400, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data11 = { + .i2c_bus = 12, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 113, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00000800, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00000800, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data12 = { + .i2c_bus = 13, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 121, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00001000, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00001000, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data13 = { + .i2c_bus = 14, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 129, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00002000, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00002000, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data14 = { + .i2c_bus = 15, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 137, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00004000, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00004000, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data15 = { + .i2c_bus = 16, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 145, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00008000, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00008000, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data16 = { + .i2c_bus = 21, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 153, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x84, + .file_attr.mask = 0x00010000, + .file_attr.reset_on = 0x00000000, + .file_attr.reset_off = 0x00010000, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data17 = { + .i2c_bus = 22, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 161, +}; + + +struct i2c_board_info i2c_mux_pca954x_device_info[] = { + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data0, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data1, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data2, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data3, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data4, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data5, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data6, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data7, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data8, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data9, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data10, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data11, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data12, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data13, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data14, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data15, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data16, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data17, + }, +}; + +static int __init wb_i2c_mux_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus); + if (adap == NULL) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); + if (!client) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", + i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); + } else { + i2c_mux_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_mux_pca954x_device_exit(void) +{ + int i; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + if (i2c_mux_pca954x_device_data->client) { + i2c_unregister_device(i2c_mux_pca954x_device_data->client); + i2c_mux_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_mux_pca954x_device_init); +module_exit(wb_i2c_mux_pca954x_device_exit); +MODULE_DESCRIPTION("I2C MUX PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_ocores_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_ocores_device.c new file mode 100644 index 00000000000..c6635de2d32 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_ocores_device.c @@ -0,0 +1,717 @@ +/* + * An wb_i2c_ocores_device driver for i2c ocores device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_ocores_device_debug = 0; +static int g_wb_i2c_ocores_device_error = 0; + +module_param(g_wb_i2c_ocores_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_ocores_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_ocores_device_debug) { \ + printk(KERN_INFO "[WB_I2C_OCORE_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_OCORE_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_ocores_device_error) { \ + printk(KERN_ERR "[WB_I2C_OCORE_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_ocores_device_t i2c_ocores_device_data0 = { + .adap_nr = 1, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0800, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 0, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data1 = { + .adap_nr = 2, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0820, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 1, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data2 = { + .adap_nr = 3, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0840, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 2, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data3 = { + .adap_nr = 4, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0860, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 3, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data4 = { + .adap_nr = 5, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0880, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 4, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data5 = { + .adap_nr = 6, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x08a0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 5, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data6 = { + .adap_nr = 7, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x08c0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 6, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data7 = { + .adap_nr = 8, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x08e0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 7, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data8 = { + .adap_nr = 9, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0900, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 8, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data9 = { + .adap_nr = 10, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0920, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 9, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data10 = { + .adap_nr = 11, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0940, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 10, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data11 = { + .adap_nr = 12, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0960, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 11, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data12 = { + .adap_nr = 13, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0980, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 12, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data13 = { + .adap_nr = 14, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x09a0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 13, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data14 = { + .adap_nr = 15, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x09c0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 14, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data15 = { + .adap_nr = 16, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x09e0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 15, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data16 = { + .adap_nr = 17, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a00, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 16, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data17 = { + .adap_nr = 18, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a20, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 17, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data18 = { + .adap_nr = 19, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a40, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 18, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data19 = { + .adap_nr = 20, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a60, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 19, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data20 = { + .adap_nr = 21, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a80, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 20, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data21 = { + .adap_nr = 22, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0aa0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 21, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data22 = { + .adap_nr = 23, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0ac0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 22, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data23 = { + .adap_nr = 24, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0ae0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 23, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static void wb_i2c_ocores_device_release(struct device *dev) +{ + return; +} + +static struct platform_device i2c_ocores_device[] = { + { + .name = "wb-ocores-i2c", + .id = 1, + .dev = { + .platform_data = &i2c_ocores_device_data0, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 2, + .dev = { + .platform_data = &i2c_ocores_device_data1, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 3, + .dev = { + .platform_data = &i2c_ocores_device_data2, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 4, + .dev = { + .platform_data = &i2c_ocores_device_data3, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 5, + .dev = { + .platform_data = &i2c_ocores_device_data4, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 6, + .dev = { + .platform_data = &i2c_ocores_device_data5, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 7, + .dev = { + .platform_data = &i2c_ocores_device_data6, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 8, + .dev = { + .platform_data = &i2c_ocores_device_data7, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 9, + .dev = { + .platform_data = &i2c_ocores_device_data8, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 10, + .dev = { + .platform_data = &i2c_ocores_device_data9, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 11, + .dev = { + .platform_data = &i2c_ocores_device_data10, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 12, + .dev = { + .platform_data = &i2c_ocores_device_data11, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 13, + .dev = { + .platform_data = &i2c_ocores_device_data12, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 14, + .dev = { + .platform_data = &i2c_ocores_device_data13, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 15, + .dev = { + .platform_data = &i2c_ocores_device_data14, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 16, + .dev = { + .platform_data = &i2c_ocores_device_data15, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 17, + .dev = { + .platform_data = &i2c_ocores_device_data16, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 18, + .dev = { + .platform_data = &i2c_ocores_device_data17, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 19, + .dev = { + .platform_data = &i2c_ocores_device_data18, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 20, + .dev = { + .platform_data = &i2c_ocores_device_data19, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 21, + .dev = { + .platform_data = &i2c_ocores_device_data20, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 22, + .dev = { + .platform_data = &i2c_ocores_device_data21, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 23, + .dev = { + .platform_data = &i2c_ocores_device_data22, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 24, + .dev = { + .platform_data = &i2c_ocores_device_data23, + .release = wb_i2c_ocores_device_release, + }, + }, +}; + +static int __init wb_i2c_ocores_device_init(void) +{ + int i; + int ret = 0; + i2c_ocores_device_t *i2c_ocores_device_data; + + WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_ocores_device); i++) { + i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data; + ret = platform_device_register(&i2c_ocores_device[i]); + if (ret < 0) { + i2c_ocores_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-ocores-i2c.%d register failed!\n", i + 1); + } else { + i2c_ocores_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_i2c_ocores_device_exit(void) +{ + int i; + i2c_ocores_device_t *i2c_ocores_device_data; + + WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_ocores_device) - 1; i >= 0; i--) { + i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data; + if (i2c_ocores_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&i2c_ocores_device[i]); + } + } +} + +module_init(wb_i2c_ocores_device_init); +module_exit(wb_i2c_ocores_device_exit); +MODULE_DESCRIPTION("I2C OCORES Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_io_dev_device.c new file mode 100644 index 00000000000..e4b1dde8bca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_io_dev_device.c @@ -0,0 +1,125 @@ +/* + * An wb_io_dev_device driver for io device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_io_dev_device_debug = 0; +static int g_wb_io_dev_device_error = 0; + +module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_io_dev_device_debug) { \ + printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_io_dev_device_error) { \ + printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* CPU_CPLD */ +static io_dev_device_t io_dev_device_data0 = { + .io_dev_name = "cpld0", + .io_base = 0xa00, + .io_len = 0x100, + .indirect_addr = 0, +}; + +/* BASE CPLD */ +static io_dev_device_t io_dev_device_data1 = { + .io_dev_name = "cpld1", + .io_base = 0x900, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static void wb_io_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device io_dev_device[] = { + { + .name = "wb-io-dev", + .id = 1, + .dev = { + .platform_data = &io_dev_device_data0, + .release = wb_io_dev_device_release, + }, + }, + { + .name = "wb-io-dev", + .id = 2, + .dev = { + .platform_data = &io_dev_device_data1, + .release = wb_io_dev_device_release, + }, + }, +}; + +static int __init wb_io_dev_device_init(void) +{ + int i; + int ret = 0; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + ret = platform_device_register(&io_dev_device[i]); + if (ret < 0) { + io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1); + } else { + io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_io_dev_device_exit(void) +{ + int i; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&io_dev_device[i]); + } + } +} + +module_init(wb_io_dev_device_init); +module_exit(wb_io_dev_device_exit); +MODULE_DESCRIPTION("IO DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_pcie_dev_device.c new file mode 100644 index 00000000000..aff6ed5f798 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_pcie_dev_device.c @@ -0,0 +1,111 @@ +/* + * An wb_pcie_dev_device driver for pcie device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_pcie_dev_device_debug = 0; +static int g_wb_pcie_dev_device_error = 0; + +module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_pcie_dev_device_debug) { \ + printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_pcie_dev_device_error) { \ + printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static pci_dev_device_t pcie_dev_device_data0 = { + .pci_dev_name = "fpga0", + .pci_domain = 0x0000, + .pci_bus = 0x03, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, +}; + +static void wb_pcie_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device pcie_dev_device[] = { + { + .name = "wb-pci-dev", + .id = 1, + .dev = { + .platform_data = &pcie_dev_device_data0, + .release = wb_pcie_dev_device_release, + }, + }, +}; + +static int __init wb_pcie_dev_device_init(void) +{ + int i; + int ret = 0; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + ret = platform_device_register(&pcie_dev_device[i]); + if (ret < 0) { + pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1); + } else { + pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_pcie_dev_device_exit(void) +{ + int i; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&pcie_dev_device[i]); + } + } +} + +module_init(wb_pcie_dev_device_init); +module_exit(wb_pcie_dev_device_exit); +MODULE_DESCRIPTION("PCIE DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg new file mode 100644 index 00000000000..2c10ab9bbb2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg @@ -0,0 +1,40 @@ +# configuration item: I2C address of CPLD +# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id] +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +# bus: I2C bus number of CPLD +# addr: I2C address of CPLD +cpld_i2c_dev.bus_0_3=0 +cpld_i2c_dev.addr_0_3=0x0d +cpld_i2c_dev.bus_0_4=15 +cpld_i2c_dev.addr_0_4=0x51 +cpld_i2c_dev.bus_0_5=16 +cpld_i2c_dev.addr_0_5=0x52 + + +# configuration item: LPC address of CPLD +# format: cpld_lpc_addr_[cpld_slot]_[cpld_id] +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +cpld_lpc_dev_0_0=0x700 +cpld_lpc_dev_0_1=0x900 +cpld_lpc_dev_0_2=0xb00 + + +# configuration item: CPLD access method, lpc or i2c +# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +mode_cpld_0_0=lpc +mode_cpld_0_1=lpc +mode_cpld_0_2=lpc +mode_cpld_0_3=i2c +mode_cpld_0_4=i2c +mode_cpld_0_5=i2c + + +# configuration item: the number of CPLD +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: CPLD main_dev is 4 +# minor_dev: CPLD minor_dev not exist +dev_num_4_0=6 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg new file mode 100644 index 00000000000..eb2d7faf58c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg @@ -0,0 +1,112 @@ +# configuration item: the number of fans +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: fan main_dev is 1 +# minor_dev: fan minor_dev not exist(0) +dev_num_1_0=2 + + +# configuration item: the number of rotors +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: rotor main_dev is 1 +# minor_dev: rotor minor_dev is 5 +dev_num_1_5=1 + + +# configuration item: fan presence status +# format: dev_present_status_[main_dev_id][fan_index] +# main_dev_id: fan main_dev_id is 1 +# fan_index: start from 1 +dev_present_status.mode_1_1=config +dev_present_status.src_1_1=cpld +dev_present_status.frmt_1_1=bit +dev_present_status.pola_1_1=negative +dev_present_status.addr_1_1=0x00010094 +dev_present_status.len_1_1=1 +dev_present_status.bit_offset_1_1=0 + +dev_present_status.mode_1_2=config +dev_present_status.src_1_2=cpld +dev_present_status.frmt_1_2=bit +dev_present_status.pola_1_2=negative +dev_present_status.addr_1_2=0x00010094 +dev_present_status.len_1_2=1 +dev_present_status.bit_offset_1_2=1 + + +# configuration item: fan rotor status +# format: fan_roll_status_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_roll_status.mode_1_0=config +fan_roll_status.int_cons_1_0= +fan_roll_status.src_1_0=cpld +fan_roll_status.frmt_1_0=bit +fan_roll_status.pola_1_0=positive +fan_roll_status.fpath_1_0= +fan_roll_status.addr_1_0=0x00010095 +fan_roll_status.len_1_0=1 +fan_roll_status.bit_offset_1_0=0 + + +fan_roll_status.mode_2_0=config +fan_roll_status.int_cons_2_0= +fan_roll_status.src_2_0=cpld +fan_roll_status.frmt_2_0=bit +fan_roll_status.pola_2_0=positive +fan_roll_status.fpath_2_0= +fan_roll_status.addr_2_0=0x00010095 +fan_roll_status.len_2_0=1 +fan_roll_status.bit_offset_2_0=1 + + +# configuration item: fan speed +# format: fan_speed_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_speed.mode_1_0=config +fan_speed.int_cons_1_0= +fan_speed.src_1_0=cpld +fan_speed.frmt_1_0=byte +fan_speed.pola_1_0= +fan_speed.fpath_1_0= +fan_speed.addr_1_0=0x00010098 +fan_speed.len_1_0=1 +fan_speed.bit_offset_1_0= +fan_speed.int_extra1_1_0=1 + + +fan_speed.mode_2_0=config +fan_speed.int_cons_2_0= +fan_speed.src_2_0=cpld +fan_speed.frmt_2_0=byte +fan_speed.pola_2_0= +fan_speed.fpath_2_0= +fan_speed.addr_2_0=0x00010099 +fan_speed.len_2_0=1 +fan_speed.bit_offset_2_0= +fan_speed.int_extra1_2_0=1 + + +# configuration item: fan pwm +# format: fan_ratio_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_ratio.mode_1_0=config +fan_ratio.int_cons_1_0= +fan_ratio.src_1_0=cpld +fan_ratio.frmt_1_0=byte +fan_ratio.pola_1_0= +fan_ratio.fpath_1_0= +fan_ratio.addr_1_0=0x00010090 +fan_ratio.len_1_0=1 +fan_ratio.bit_offset_1_0= + +fan_ratio.mode_2_0=config +fan_ratio.int_cons_2_0= +fan_ratio.src_2_0=cpld +fan_ratio.frmt_2_0=byte +fan_ratio.pola_2_0= +fan_ratio.fpath_2_0= +fan_ratio.addr_2_0=0x00010091 +fan_ratio.len_2_0=1 +fan_ratio.bit_offset_2_0= diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg new file mode 100644 index 00000000000..8b2d41974eb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg @@ -0,0 +1,64 @@ +# configuration item: the number of psus +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: psu main_dev is 2 +# minor_dev: psu minor_dev not exist(0) +dev_num_2_0=2 + + +# configuration item: psu status +# format: psu_status_[psu_index]_[status_id] +# psu_index: start from 1 +# status_id: 0: presence 1: output 2: alert +# psu1 presence status +psu_status.mode_1_0=config +psu_status.src_1_0=cpld +psu_status.frmt_1_0=bit +psu_status.pola_1_0=negative +psu_status.addr_1_0=0x00020010 +psu_status.len_1_0=1 +psu_status.bit_offset_1_0=0 + +# psu1 output status +psu_status.mode_1_1=config +psu_status.src_1_1=cpld +psu_status.frmt_1_1=bit +psu_status.pola_1_1=positive +psu_status.addr_1_1=0x00020011 +psu_status.len_1_1=1 +psu_status.bit_offset_1_1=0 + +# psu1 alert status +psu_status.mode_1_2=config +psu_status.src_1_2=cpld +psu_status.frmt_1_2=bit +psu_status.pola_1_2=negative +psu_status.addr_1_2=0x00020011 +psu_status.len_1_2=1 +psu_status.bit_offset_1_2=0 + +# psu2 presence status +psu_status.mode_2_0=config +psu_status.src_2_0=cpld +psu_status.frmt_2_0=bit +psu_status.pola_2_0=negative +psu_status.addr_2_0=0x00020010 +psu_status.len_2_0=1 +psu_status.bit_offset_2_0=1 + +# psu2 output status +psu_status.mode_2_1=config +psu_status.src_2_1=cpld +psu_status.frmt_2_1=bit +psu_status.pola_2_1=positive +psu_status.addr_2_1=0x00020011 +psu_status.len_2_1=1 +psu_status.bit_offset_2_1=1 + +# psu2 alert status +psu_status.mode_2_2=config +psu_status.src_2_2=cpld +psu_status.frmt_2_2=bit +psu_status.pola_2_2=negative +psu_status.addr_2_2=0x00020011 +psu_status.len_2_2=1 +psu_status.bit_offset_2_2=1 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg new file mode 100644 index 00000000000..9cfdcd29eb8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg @@ -0,0 +1,54 @@ +# configuration item: the number of sffs +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: sff main_dev is 3 +# minor_dev: sff minor_dev not exist(0) +dev_num_3_0=4 + + +# configuration item: The directory name of sff sysfs +# format: sff_dir_name_[sff_index] +# sff_index: start from 1 +sff_dir_name_1 =sff49 +sff_dir_name_2 =sff50 +sff_dir_name_3 =sff51 +sff_dir_name_4 =sff52 + + +# configuration item: sff cpld register status +# format: sff_cpld_reg_[sff_index]_[cpld_reg] +# sff_index: start from 1 +# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los +# 6: reset, 7: lpmode, 8: module_present, 9: interrupt + +# sff cpld presence status +sff_cpld_reg.mode_1_8=config +sff_cpld_reg.src_1_8=cpld +sff_cpld_reg.frmt_1_8=bit +sff_cpld_reg.pola_1_8=negative +sff_cpld_reg.addr_1_8=0x00020030 +sff_cpld_reg.len_1_8=1 +sff_cpld_reg.bit_offset_1_8=1 + +sff_cpld_reg.mode_2_8=config +sff_cpld_reg.src_2_8=cpld +sff_cpld_reg.frmt_2_8=bit +sff_cpld_reg.pola_2_8=negative +sff_cpld_reg.addr_2_8=0x00020030 +sff_cpld_reg.len_2_8=1 +sff_cpld_reg.bit_offset_2_8=0 + +sff_cpld_reg.mode_3_8=config +sff_cpld_reg.src_3_8=cpld +sff_cpld_reg.frmt_3_8=bit +sff_cpld_reg.pola_3_8=negative +sff_cpld_reg.addr_3_8=0x00020030 +sff_cpld_reg.len_3_8=1 +sff_cpld_reg.bit_offset_3_8=3 + +sff_cpld_reg.mode_4_8=config +sff_cpld_reg.src_4_8=cpld +sff_cpld_reg.frmt_4_8=bit +sff_cpld_reg.pola_4_8=negative +sff_cpld_reg.addr_4_8=0x00020030 +sff_cpld_reg.len_4_8=1 +sff_cpld_reg.bit_offset_4_8=2 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/cfg_file_name new file mode 100644 index 00000000000..5f49420441a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/cfg_file_name @@ -0,0 +1,4 @@ +WB_PLAT_CPLD +WB_PLAT_FAN +WB_PLAT_PSU +WB_PLAT_SFF diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/service/subnetwork.service b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/service/subnetwork.service new file mode 100644 index 00000000000..66604659211 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/service/subnetwork.service @@ -0,0 +1,13 @@ +[Unit] +Description=Configuration eth0.4088 subnetwork +After=network.target +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/subnetwork.py start +ExecStop=/usr/local/bin/subnetwork.py stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/setup.py new file mode 100755 index 00000000000..a3be1cd61fb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/setup.py @@ -0,0 +1,40 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation', + license='Apache 2.0', + author='SONiC Team', + author_email='support', + url='', + maintainer='support', + maintainer_email='', + packages=[ + 'sonic_platform', + 'plat_hal', + 'wbutil', + 'eepromutil', + 'restful_util', + 'hal-config', + 'config', + ], + py_modules=[ + 'hal_pltfm', + 'platform_util', + 'platform_intf', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/__init__.py new file mode 100644 index 00000000000..b70995a582f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis", "sfp", "eeprom", "component", "thermal", "psu", "fan", "fan_drawer", "watchdog"] +from . import platform diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/chassis.py new file mode 100644 index 00000000000..96855d0d57f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/chassis.py @@ -0,0 +1,480 @@ +#!/usr/bin/env python3 + +############################################################################# +# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + import time + import sys + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.sfp import Sfp + from sonic_platform.psu import Psu + # from sonic_platform.fan import Fan + from sonic_platform.fan_drawer import FanDrawer + from sonic_platform.thermal import Thermal + # from sonic_platform.watchdog import Watchdog + from sonic_platform.component import Component + from sonic_platform.eeprom import Eeprom + from plat_hal.baseutil import baseutil + + from plat_hal.interface import interface + from .restful_interface import RestfulApi + +except ImportError as error: + raise ImportError(str(error) + "- required module not found")from error + + +class Chassis(ChassisBase): + """ + Platform-specific Chassis class + """ + # List of Dcdc objects representing all dcdc + # available on the chassis + _dcdc_list = None + + STATUS_INSERTED = "1" + STATUS_REMOVED = "0" + STATUS_NORMAL = "0" + STATUS_ABNORMAL = "1" + sfp_present_dict = {} + fan_present_dict = {} + voltage_status_dict = {} + + def __init__(self): + ChassisBase.__init__(self) + self.int_case = interface() + self.restful = RestfulApi() + + self.led_map = { + "0": self.STATUS_LED_COLOR_OFF, + "1": self.STATUS_LED_COLOR_GREEN, + "2": self.STATUS_LED_COLOR_AMBER, + "3": self.STATUS_LED_COLOR_RED + } + + # Initialize SFP list + + # sfp.py will read eeprom contents and retrive the eeprom data. + # It will also provide support sfp controls like reset and setting + # low power mode. + # We pass the eeprom path and sfp control path from chassis.py + # So that sfp.py implementation can be generic to all platforms + try: + self._sfp_list = [] + self.port_num = baseutil.get_config().get("sfps", None).get("port_num", 0) + self.port_start_index = baseutil.get_config().get("sfps", None).get("port_index_start", 0) + # fix problem with first index is 1, we add a fake sfp node + if self.port_start_index == 1: + self._sfp_list.append(Sfp(1)) + + # sfp id always start at 1 + for index in range(1, self.port_num + 1): + self._sfp_list.append(Sfp(index)) + + for i in range(self.port_start_index, self.port_start_index + self.port_num): + self.sfp_present_dict[i] = self.STATUS_REMOVED + + except Exception as err: + print("SFP init error: %s" % str(err)) + + try: + self._eeprom = Eeprom(self.int_case) + except Exception as err: + print("EEPROM INIT ERROR %s" % str(err)) + + # Initialize watchdog + # self._watchdog = Watchdog() + fantray_num = self.restful.get_fan_total_number() + for index in range(fantray_num): + fandrawer = FanDrawer(self.restful, index + 1) + self._fan_drawer_list.append(fandrawer) + self._fan_list.extend(fandrawer._fan_list) + + psu_num = self.restful.get_psu_total_number() + for index in range(psu_num): + psuobj = Psu(self.restful, index + 1) + self._psu_list.append(psuobj) + + thermal_num = self.restful.get_thermal_total_number() + for index in range(thermal_num): + self._thermal_list.append(Thermal(self.restful, index)) + + cpld_num = self.restful.get_cpld_total_number() + for index in range(cpld_num): + self._component_list.append(Component(self.restful, index, "cpld")) + fpga_num = self.restful.get_fpga_total_number() + for index in range(fpga_num): + self._component_list.append(Component(self.restful, index, "fpga")) + bois_num = self.restful.get_bios_total_number() + for index in range(bois_num): + self._component_list.append(Component(self.restful, index, "bios")) + bmc_num = self.restful.get_bmc_total_number() + for index in range(bmc_num): + self._component_list.append(Component(self.restful, index, "bmc")) + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + name = '' + sys_eeprom = self.get_eeprom() + if sys_eeprom is None: + return '' + + e = sys_eeprom.read_eeprom() + name = sys_eeprom.modelstr(e) + if name is None: + return '' + return name + + def get_presence(self): + """ + Retrieves the presence of the chassis + Returns: + bool: True if chassis is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the chassis + Returns: + string: Model/part number of chassis + """ + model = '' + sys_eeprom = self.get_eeprom() + if sys_eeprom is None: + return '' + + e = sys_eeprom.read_eeprom() + model = sys_eeprom.modelnumber(e) + if model is None: + return '' + return model + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this chassis. + """ + serial_number = '' + sys_eeprom = self.get_eeprom() + if sys_eeprom is None: + return '' + + e = sys_eeprom.read_eeprom() + serial_number = sys_eeprom.serial_number_str(e) + if serial_number is None: + return '' + + return serial_number + + def get_revision(self): + """ + Retrieves the hardware revision of the device + + Returns: + string: Revision value of device + """ + device_version = '' + sys_eeprom = self.get_eeprom() + if sys_eeprom is None: + return '' + + e = sys_eeprom.read_eeprom() + device_version = sys_eeprom.deviceversion(e) + if device_version is None: + return '' + + return device_version + + def get_serial(self): + """ + Retrieves the serial number of the chassis (Service tag) + Returns: + string: Serial number of chassis + """ + return self.get_serial_number() + + def get_status(self): + """ + Retrieves the operational status of the chassis + Returns: + bool: A boolean value, True if chassis is operating properly + False if not + """ + return True + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return -1 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False + + def initizalize_system_led(self): + return True + + def set_status_led(self, color): + return False + + def get_status_led(self): + """ + Gets the state of the system LED + + Returns: + A string, one of the valid LED color strings which could be vendor + specified. + """ + led_status = None + led_status = self.restful.get_sysled() + if led_status is None: + return 'N/A' + return self.led_map.get(led_status, "unknown status %s" % led_status) + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + base_mac = '' + sys_eeprom = self.get_eeprom() + if sys_eeprom is None: + return '' + + e = sys_eeprom.read_eeprom() + base_mac = sys_eeprom.base_mac_addr(e) + if base_mac is None: + return '' + + return base_mac.upper() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821', + '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00', + '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'} + """ + sys_eeprom = self.get_eeprom() + if sys_eeprom is None: + return {} + return sys_eeprom.system_eeprom_info() + + def get_thermal_manager(self): + """ + Retrieves thermal manager class on this chassis + :return: A class derived from ThermalManagerBase representing the + specified thermal manager. ThermalManagerBase is returned as default + """ + return False + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + reboot_cause_msg = self.int_case.get_cpu_reboot_cause() + if "Power Loss" in reboot_cause_msg: + reboot_cause_type = self.REBOOT_CAUSE_POWER_LOSS + elif "Watchdog" in reboot_cause_msg: + reboot_cause_type = self.REBOOT_CAUSE_WATCHDOG + elif "BMC reboot" in reboot_cause_msg or "BMC powerdown" in reboot_cause_msg: + reboot_cause_type = self.REBOOT_CAUSE_HARDWARE_OTHER + elif "Thermal Overload: ASIC" in reboot_cause_msg: + reboot_cause_type = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC + elif "Thermal Overload: Other" in reboot_cause_msg: + reboot_cause_type = self.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER + elif "Other" in reboot_cause_msg: + reboot_cause_type = self.REBOOT_CAUSE_NON_HARDWARE + else: + reboot_cause_type = self.REBOOT_CAUSE_NON_HARDWARE + return (reboot_cause_type, reboot_cause_msg) + + def get_module(self, index): + """ + Retrieves module represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the module to + retrieve + + Returns: + An object dervied from ModuleBase representing the specified + module + """ + module = None + + try: + if self.get_num_modules(): + module = self._module_list[index] + except IndexError: + sys.stderr.write("Module index {} out of range (0-{})\n".format( + index, len(self._module_list) - 1)) + + return module + + def get_fan_drawer(self, index): + """ + Retrieves fan drawers represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the fan drawer to + retrieve + + Returns: + An object dervied from FanDrawerBase representing the specified fan + drawer + """ + fan_drawer = None + + try: + if self.get_num_fan_drawers(): + fan_drawer = self._fan_drawer_list[index] + except IndexError: + sys.stderr.write("Fan drawer index {} out of range (0-{})\n".format( + index, len(self._fan_drawer_list) - 1)) + + return fan_drawer + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'fan' '' '0' Fan removed + '1' Fan inserted + + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + + 'voltage' '' '0' Vout normal + '1' Vout abnormal + -------------------------------------------------------------------- + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'}, + 'voltage':{'U20':'0', 'U21':'1'}} + Indicates that: + fan 0 has been removed, fan 2 has been inserted. + sfp 11 has been removed, sfp 12 has been inserted. + monitored voltage U20 became normal, voltage U21 became abnormal. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value: %s" % timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print("get_change_event:time wrap / invalid timeout value: %s" % timeout) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self): + current_sfp_present_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for i in range(self.port_start_index, self.port_start_index + self.port_num): + sfp = self._sfp_list[i] + if sfp.get_presence(): + current_sfp_present_dict[i] = self.STATUS_INSERTED + + else: + current_sfp_present_dict[i] = self.STATUS_REMOVED + + # Update reg value + if current_sfp_present_dict == self.sfp_present_dict: + return ret_dict + + for index, status in current_sfp_present_dict.items(): + if self.sfp_present_dict[index] != status: + ret_dict[index] = status + + self.sfp_present_dict = current_sfp_present_dict + + return ret_dict + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/component.py new file mode 100644 index 00000000000..85f27a016fb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/component.py @@ -0,0 +1,173 @@ +#!/usr/bin/env python3 + +######################################################################## +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in +# the platform +# +######################################################################## + +try: + import time + import subprocess + import os + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") from e + + +FIRMWARE_UPDATE_DIR = "/tmp/.firmwareupdate/" + +class Component(ComponentBase): + """Platform-specific Component class""" + + def __init__(self, interface_obj, index, fw_type): + + self.restful = interface_obj + self.fw_id = fw_type + str(index) + + def get_fw_info(self): + return self.restful.get_fw_by_id(self.fw_id) + + def get_name(self): + """ + Retrieves the name of the component + + Returns: + A string containing the name of the component + """ + fw_dict = self.get_fw_info() + if not fw_dict: + return "N/A" + return fw_dict.get("alias", "N/A") + + def get_description(self): + """ + Retrieves the description of the component + + Returns: + A string containing the description of the component + """ + fw_dict = self.get_fw_info() + if not fw_dict: + return "N/A" + return fw_dict.get("type", "N/A") + + def get_firmware_version(self): + """ + Retrieves the firmware version of the component + + Note: the firmware version will be read from HW + + Returns: + A string containing the firmware version of the component + """ + fw_dict = self.get_fw_info() + if not fw_dict: + return "N/A" + return fw_dict.get("firmware_version", "N/A") + + def get_available_firmware_version(self, image_path): + """ + Retrieves the available firmware version of the component + + Note: the firmware version will be read from image + + Args: + image_path: A string, path to firmware image + + Returns: + A string containing the available firmware version of the component + """ + raise NotImplementedError + + def get_firmware_update_notification(self, image_path): + """ + Retrieves a notification on what should be done in order to complete + the component firmware update + + Args: + image_path: A string, path to firmware image + + Returns: + A string containing the component firmware update notification if required. + By default 'None' value will be used, which indicates that no actions are required + """ + return None + + def install_firmware(self, image_path): + """ + Installs firmware to the component + + This API performs firmware installation only: this may/may not be the same as firmware update. + In case platform component requires some extra steps (apart from calling Low Level Utility) + to load the installed firmware (e.g, reboot, power cycle, etc.) - this must be done manually by user + + Note: in case immediate actions are required to complete the component firmware update + (e.g., reboot, power cycle, etc.) - will be done automatically by API and no return value provided + + Args: + image_path: A string, path to firmware image + + Returns: + A boolean, True if install was successful, False if not + """ + if not os.path.isfile(image_path): + print("ERROR: %s not found" % image_path) + return False + cmdstr = "upgrade.py cold %s %d" % (image_path, 0) + status, output = subprocess.getstatusoutput(cmdstr) + if status == 0: + print("INFO: %s firmware install succeeded" % self.get_name()) + return True + print("%s install failed. status:%d, output:\n%s" % (self.get_name(), status, output)) + return False + + def update_firmware(self, image_path): + """ + Updates firmware of the component + + This API performs firmware update: it assumes firmware installation and loading in a single call. + In case platform component requires some extra steps (apart from calling Low Level Utility) + to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically by API + + Args: + image_path: A string, path to firmware image + + Raises: + RuntimeError: update failed + """ + raise RuntimeError("not support") + + def auto_update_firmware(self, image_path, boot_type): + """ + Updates firmware of the component + + This API performs firmware update automatically based on boot_type: it assumes firmware installation + and/or creating a loading task during the reboot, if needed, in a single call. + In case platform component requires some extra steps (apart from calling Low Level Utility) + to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically during the reboot. + The loading task will be created by API. + + Args: + image_path: A string, path to firmware image + boot_type: A string, reboot type following the upgrade + - none/fast/warm/cold + + Returns: + Output: A return code + return_code: An integer number, status of component firmware auto-update + - return code of a positive number indicates successful auto-update + - status_installed = 1 + - status_updated = 2 + - status_scheduled = 3 + - return_code of a negative number indicates failed auto-update + - status_err_boot_type = -1 + - status_err_image = -2 + - status_err_unknown = -3 + + Raises: + RuntimeError: auto-update failure cause + """ + raise RuntimeError("not support") diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/eeprom.py new file mode 100644 index 00000000000..05fcc3c2567 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/eeprom.py @@ -0,0 +1,92 @@ +#!/usr/bin/env python3 +######################################################################## +# +# Module contains platform specific implementation of SONiC Platform +# Base API and provides the EEPROMs' information. +# +# The different EEPROMs available are as follows: +# - System EEPROM : Contains Serial number, Service tag, Base MA +# address, etc. in ONIE TlvInfo EEPROM format. +# - PSU EEPROM : Contains Serial number, Part number, Service Tag, +# PSU type, Revision. +# - Fan EEPROM : Contains Serial number, Part number, Service Tag, +# Fan type, Number of Fans in Fantray, Revision. +######################################################################## + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError as error: + raise ImportError(str(error) + "- required module not found") from error + + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, interface_obj): + self.int_case = interface_obj + self.name = "ONIE_E2" + + eeprom_path = self.int_case.get_onie_e2_path(self.name) + if eeprom_path is None: + raise ValueError("get eeprom path failed") + + super().__init__(eeprom_path, 0, "", True) + + def modelnumber(self, e): + ''' + Returns the value field of the model(part) number TLV as a string + ''' + (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_PART_NUMBER) + if not is_valid: + return super().part_number_str(e) + + return t[2].decode("ascii") + + def deviceversion(self, e): + ''' + Returns the value field of the Device Version as a string + ''' + (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_DEVICE_VERSION) + if not is_valid: + return "N/A" + + return str(ord(t[2])) + + def system_eeprom_info(self): + ''' + Retrieves the full content of system EEPROM information for the chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821', + '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00', + '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'} + ''' + sys_eeprom_dict = {} + e = self.read_eeprom() + if self._TLV_HDR_ENABLED: + if not self.is_valid_tlvinfo_header(e): + return {} + total_len = (e[9] << 8) | e[10] + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_len + else: + tlv_index = self.eeprom_start + tlv_end = self._TLV_INFO_MAX_LEN + + while (tlv_index + 2) < len(e) and tlv_index < tlv_end: + if not self.is_valid_tlv(e[tlv_index:]): + break + + tlv = e[tlv_index:tlv_index + 2 + e[tlv_index + 1]] + code = "0x%02X" % tlv[0] + name, value = self.decoder(None, tlv) + sys_eeprom_dict[code] = value + + if e[tlv_index] == self._TLV_CODE_QUANTA_CRC or \ + e[tlv_index] == self._TLV_CODE_CRC_32: + break + tlv_index += e[tlv_index + 1] + 2 + + return sys_eeprom_dict diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan.py new file mode 100644 index 00000000000..d4735bb9812 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan.py @@ -0,0 +1,324 @@ +#!/usr/bin/env python3 +######################################################################## +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Fans' information which are available in the platform. +# +######################################################################## + +try: + import time + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") from e + +PSU_NOT_PRESENCE = 0x01 + +class Fan(FanBase): + """Platform-specific Fan class""" + + def __init__(self, interface_obj, fantray_index, fan_index, psu_fan=False, psu_index=0): + self.restful = interface_obj + self.fantray_index = fantray_index + self.fan_index = fan_index + self.psu_index = psu_index + self.is_psu_fan = psu_fan + if not self.is_psu_fan: + self.name = "fan" + str(fantray_index) + else: + self.name = "psu" + str(psu_index) + + self.led_map = { + "0": self.STATUS_LED_COLOR_OFF, + "1": self.STATUS_LED_COLOR_GREEN, + "2": self.STATUS_LED_COLOR_AMBER, + "3": self.STATUS_LED_COLOR_RED + } + + def fan_dict_update(self): + if not self.is_psu_fan: + return self.restful.get_fan_info(self.name) + else: + return self.restful.get_psu_info(self.name) + + def get_name(self): + """ + Retrieves the fan name + Returns: + string: The name of the device + """ + if not self.is_psu_fan: + return "Fantray{}_{}".format(self.fantray_index, self.fan_index) + return "PSU{}_FAN{}".format(self.psu_index, self.fan_index) + + def get_model(self): + """ + Retrieves the part number of the FAN + Returns: + string: Part number of FAN + """ + if not self.is_psu_fan: + fan_info = self.fan_dict_update() + if fan_info is None: + return 'N/A' + return fan_info.get("model_name", 'N/A') + else: + return 'N/A' + + def get_serial(self): + """ + Retrieves the serial number of the FAN + Returns: + string: Serial number of FAN + """ + if not self.is_psu_fan: + fan_info = self.fan_dict_update() + if fan_info is None: + return 'N/A' + return fan_info.get("serial_number", 'N/A') + else: + return 'N/A' + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if fan is present, False if not + """ + if not self.is_psu_fan: + fan_info = self.fan_dict_update() + if fan_info is None: + return False + status = fan_info.get('status', None) + if status is None: + return False + if status == '1' or status == '2': + return True + return False + else: + psu_info = self.fan_dict_update() + if psu_info is None: + return False + status = psu_info.get('status', None) + if status is None or status in self.restful.restful_err_str: + return False + if int(status, 16) & PSU_NOT_PRESENCE == 0: + return True + return False + + def get_status(self): + """ + Retrieves the operational status of the FAN + Returns: + bool: True if FAN is operating properly, False if not + """ + if not self.get_presence(): + return False + + if not self.is_psu_fan: + fan_info = self.fan_dict_update() + if fan_info is not None: + status = fan_info.get('status', None) + if status == '1': + return True + else: + return False + else: + psu_info = self.fan_dict_update() + if psu_info is None: + return False + status = psu_info.get('status', None) + if status is None or status in self.restful.restful_err_str: + return False + status = int(status, 16) + if status != 0: + return False + return True + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return -1 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True + + def get_direction(self): + """ + Retrieves the fan airflow direction + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + + Notes: + - Forward/Exhaust : Air flows from Port side to Fan side. + - Reverse/Intake : Air flows from Fan side to Port side. + """ + fan_info = self.fan_dict_update() + if fan_info is None: + return self.FAN_DIRECTION_NOT_APPLICABLE + if not self.is_psu_fan: + air_flow = fan_info.get("direction", "2") + else: + air_flow = fan_info.get("fan_direction", "2") + if air_flow == "0": + return self.FAN_DIRECTION_INTAKE + elif air_flow == "1": + return self.FAN_DIRECTION_EXHAUST + else: + return self.FAN_DIRECTION_NOT_APPLICABLE + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + if not self.get_presence(): + return 0 + + if not self.is_psu_fan: + fan_info = self.fan_dict_update() + if fan_info is not None: + motor = fan_info.get('motor{}'.format(self.fan_index)) + value = motor.get('speed') + max_speed = motor.get('speed_max') + else: + psu_info = self.fan_dict_update() + if psu_info is not None: + value = psu_info.get('fan_speed', None) + max_speed = psu_info.get('fan_speed_max', None) + if value is None or value in self.restful.restful_err_str: + return None + if max_speed is None or max_speed in self.restful.restful_err_str: + return None + if isinstance(value, str): + value = int(value) + max_speed = int(max_speed) + pwm = value * 100 / max_speed + if pwm > 100: + pwm = 100 + elif pwm < 0: + pwm = 0 + return int(pwm) + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + # The default tolerance value is fixed as 30% + return 30 + + def set_speed(self, speed): + """ + Set fan speed to expected value + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + Returns: + bool: True if set success, False if fail. + """ + return True + + def set_status_led(self, color): + """ + Set led to expected color + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if set success, False if fail. + """ + # not supported + return False + + def get_status_led(self): + """ + Gets the state of the Fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings. + """ + if self.is_psu_fan: + # No LED available for PSU Fan + return 'N/A' + + if not self.get_presence(): + return 'N/A' + + fan_info = self.fan_dict_update() + if fan_info is None: + return 'N/A' + + led_status = fan_info.get('led_status', None) + if led_status is None: + return 'N/A' + + return self.led_map.get(led_status, 'N/A') + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + pwm = 0 + if not self.get_presence(): + return 0 + + if not self.is_psu_fan: + fan_info = self.fan_dict_update() + if fan_info is not None: + pwm = fan_info.get('pwm') + else: + psu_info = self.fan_dict_update() + if psu_info is not None: + pwm = psu_info.get('fan_ratio') + if pwm is None or pwm in self.restful.restful_err_str: + return None + return int(pwm) + + def get_vendor(self): + """ + Retrieves the vendor name of the fan + + Returns: + string: Vendor name of fan + """ + if not self.is_psu_fan: + fan_info = self.fan_dict_update() + if fan_info is None: + return 'N/A' + return fan_info.get("vendor", 'N/A') + else: + return 'N/A' + + def get_revision(self): + """ + Retrieves the hardware revision of the device + + Returns: + string: Revision value of device + """ + if not self.is_psu_fan: + fan_info = self.fan_dict_update() + if fan_info is None: + return 'N/A' + return fan_info.get("part_number", 'N/A') + else: + return 'N/A' diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan_drawer.py new file mode 100644 index 00000000000..0d61f0142ab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan_drawer.py @@ -0,0 +1,184 @@ +#!/usr/bin/env python3 +# +# fan_drawer_base.py +# +# Abstract base class for implementing a platform-specific class with which +# to interact with a fan drawer module in SONiC +# + +try: + import time + from sonic_platform_base.fan_drawer_base import FanDrawerBase + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") from e + + +class FanDrawer(FanDrawerBase): + """ + Abstract base class for interfacing with a fan drawer + """ + # Device type definition. Note, this is a constant. + DEVICE_TYPE = "fan_drawer" + + def __init__(self, interface_obj, fantray_index): + FanDrawerBase.__init__(self) + self.fantray_index = fantray_index + self.restful = interface_obj + self.fantrayname = "fan" + str(fantray_index) + self.num_fans_per_fantray = self.restful.get_fan_rotor_number(self.fantrayname) + for i in range(self.num_fans_per_fantray): + self._fan_list.append(Fan(interface_obj, fantray_index, i + 1)) + + def fantray_dict_update(self): + return self.restful.get_fan_info(self.fantrayname) + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return "Fantray{}".format(self.fantray_index) + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if fan is present, False if not + """ + fan_info = self.fantray_dict_update() + if fan_info is None: + return False + status = fan_info.get('status', None) + if status is None or status in self.restful.restful_err_str: + return False + if status == '1' or status == '2': + return True + return False + + def get_model(self): + """ + Retrieves the part number of the FAN + Returns: + string: Part number of FAN + """ + fan_info = self.fantray_dict_update() + if fan_info is None: + return 'N/A' + return fan_info.get("model_name", 'N/A') + + def get_serial(self): + """ + Retrieves the serial number of the FAN + Returns: + string: Serial number of FAN + """ + fan_info = self.fantray_dict_update() + if fan_info is None: + return 'N/A' + return fan_info.get("serial_number", 'N/A') + + def get_revision(self): + """ + Retrieves the hardware revision of the device + + Returns: + string: Revision value of device + """ + fan_info = self.fantray_dict_update() + if fan_info is None: + return 'N/A' + return fan_info.get("part_number", 'N/A') + + def get_status(self): + """ + Retrieves the operational status of the FAN + Returns: + bool: True if FAN is operating properly, False if not + """ + for i in range(self.num_fans_per_fantray): + if self._fan_list[i].get_status() is False: + return False + return True + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return -1 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True + + def get_num_fans(self): + """ + Retrieves the number of fans available on this fan drawer + Returns: + An integer, the number of fan modules available on this fan drawer + """ + return len(self._fan_list) + + def get_all_fans(self): + """ + Retrieves all fan modules available on this fan drawer + Returns: + A list of objects derived from FanBase representing all fan + modules available on this fan drawer + """ + return self._fan_list + + def set_status_led(self, *args): + """ + Sets the state of the fan drawer status LED + Args: + color: A string representing the color with which to set the + fan drawer status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + # not supported + return False + + def get_status_led(self): + """ + Gets the state of the Fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings. + """ + return 'N/A' + + def get_maximum_consumed_power(self): + """ + Retrives the maximum power drawn by Fan Drawer + + Returns: + A float, with value of the maximum consumable power of the + component. + """ + return 'N/A' + + def get_service_tag(self): + """ + Retrieves the service tag of the device + Returns: + string: The service tag of the device + """ + return 'N/A' + + def get_mfr_id(self): + """ + Retrieves the manufacturer's name (or ID) of the device + Returns: + string: Manufacturer's id of device + """ + return "Micas" diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/pcie.py new file mode 100644 index 00000000000..8ea66f339e9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/pcie.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python3 +# -*- coding: utf-8 -*- + +######################################################################## +# +# Module contains a platform specific implementation of SONiC Platform +# Base PCIe class +# +######################################################################## + +try: + from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil +except ImportError as e: + raise ImportError(str(e) + "- required module not found") from e + + +class Pcie(PcieUtil): + """Platform-specific Pcie class""" + + def __init__(self, platform_path): + PcieUtil.__init__(self, platform_path) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/platform.py new file mode 100644 index 00000000000..4d6fe03d93a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/platform.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python3 + +############################################################################# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") from e + + +class Platform(PlatformBase): + """ + Platform-specific class + """ + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/psu.py new file mode 100644 index 00000000000..9d6d06a3982 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/psu.py @@ -0,0 +1,615 @@ +#!/usr/bin/env python3 +######################################################################## +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs' information which are available in the platform +# +######################################################################## + + +try: + import time + from sonic_platform_base.psu_base import PsuBase + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") from e + +PSU_NOT_PRESENCE = 0x01 +PSU_POWER_LOSS = 0x02 +PSU_FAN_FAULT = 0x04 +PSU_VOL_FAULT = 0x08 +PSU_CUR_FAULT = 0x10 +PSU_PWR_FAULT = 0x20 +PSU_TEMP_FAULT = 0x40 + +PSU_ERR_VALUE = -999999 + +class Psu(PsuBase): + """Platform-specific PSU class""" + + def __init__(self, interface_obj, index): + self._fan_list = [] + self._thermal_list = [] + self.restful = interface_obj + self.index = index + self.name = "psu" + str(index) + + self._fan_list.append(Fan(self.restful, 1, 1, psu_fan=True, psu_index=index)) + + self.led_map = { + "0": self.STATUS_LED_COLOR_OFF, + "1": self.STATUS_LED_COLOR_GREEN, + "2": self.STATUS_LED_COLOR_AMBER, + "3": self.STATUS_LED_COLOR_RED + } + + def _get_value(self, value): + return round(float(value) / 1000, 1) + + def psu_dict_update(self): + return self.restful.get_psu_info(self.name) + + def psu_status_dict_update(self): + psu_info = self.psu_dict_update() + if psu_info is None: + return None + status = psu_info.get('status', None) + psu_status_dict = {} + psu_status_dict['InputStatus'] = False + psu_status_dict['FanStatus'] = False + psu_status_dict['TempStatus'] = False + psu_status_dict['OutputStatus'] = False + psu_status_dict['Temperature'] = {} + psu_status_dict['Temperature']['Value'] = PSU_ERR_VALUE + psu_status_dict['Temperature']['Max'] = PSU_ERR_VALUE + psu_status_dict['FanSpeed'] = {} + psu_status_dict['FanSpeed']['Value'] = 0 + psu_status_dict['FanSpeed']['Ratio'] = 0 + psu_status_dict['FanSpeed']['Max'] = 0 + if status is None or status in self.restful.restful_err_str: + return psu_status_dict + status = int(status, 16) + if status & PSU_POWER_LOSS == 0: + psu_status_dict['InputStatus'] = True + if status & PSU_FAN_FAULT == 0: + psu_status_dict['FanStatus'] = True + if psu_info.get('fan_speed') not in self.restful.restful_err_str: + psu_status_dict['FanSpeed']['Value'] = int(psu_info.get('fan_speed')) + if psu_info.get('fan_ratio') not in self.restful.restful_err_str: + psu_status_dict['FanSpeed']['Ratio'] = int(psu_info.get('fan_ratio')) + if psu_info.get('fan_speed_max') not in self.restful.restful_err_str: + psu_status_dict['FanSpeed']['Max'] = int(psu_info.get('fan_speed_max')) + if status & PSU_TEMP_FAULT == 0: + psu_status_dict['TempStatus'] = True + if status & PSU_VOL_FAULT == 0: + psu_status_dict['OutputStatus'] = True + + psu_temp = psu_info.get('temp0', None) + if psu_temp is not None: + if psu_temp.get('value') not in self.restful.restful_err_str: + psu_status_dict['Temperature']['Value'] = float(psu_temp.get('value')) + if psu_temp.get('max') not in self.restful.restful_err_str: + psu_status_dict['Temperature']['Max'] = float(psu_temp.get('max')) + return psu_status_dict + + def psu_power_dict_update(self): + psu_info = self.psu_dict_update() + if psu_info is None: + return None + psu_power_dict = {} + psu_power_dict['Outputs'] = {} + psu_power_dict['Outputs']['Voltage'] = {} + psu_power_dict['Outputs']['Current'] = {} + psu_power_dict['Outputs']['Power'] = {} + psu_power_dict['Outputs']['Max_Power'] = {} + psu_power_dict['Inputs'] = {} + psu_power_dict['Inputs']['Voltage'] = {} + psu_power_dict['Inputs']['Current'] = {} + psu_power_dict['Inputs']['Power'] = {} + psu_power_dict['Outputs']['Voltage']['Value'] = psu_info.get('out_vol', PSU_ERR_VALUE) + psu_power_dict['Outputs']['Current']['Value'] = psu_info.get('out_cur', PSU_ERR_VALUE) + psu_power_dict['Outputs']['Power']['Value'] = psu_info.get('out_power', PSU_ERR_VALUE) + psu_power_dict['Outputs']['Max_Power']['Value'] = psu_info.get('out_max_power', PSU_ERR_VALUE) + psu_power_dict['Outputs']['Voltage']['HighAlarm'] = psu_info.get('out_cur', PSU_ERR_VALUE) + psu_power_dict['Outputs']['Voltage']['LowAlarm'] = psu_info.get('out_cur', PSU_ERR_VALUE) + psu_power_dict['Inputs']['Voltage']['Value'] = psu_info.get('in_vol', PSU_ERR_VALUE) + psu_power_dict['Inputs']['Current']['Value'] = psu_info.get('in_cur', PSU_ERR_VALUE) + psu_power_dict['Inputs']['Power']['Value'] = psu_info.get('in_power', PSU_ERR_VALUE) + psu_power_dict['Inputs']['Type'] = psu_info.get('type', "N/A") + return psu_power_dict + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return "Psu{}".format(self.index) + + def get_mfr_id(self): + """ + Retrieves the manufacturer's name (or ID) of the device + Returns: + string: Manufacturer's id of device + """ + psu_info = self.psu_dict_update() + if psu_info is None: + return "N/A" + val = psu_info.get("vendor", "") + if val == "": + return "N/A" + return val.rstrip('#') + + def get_presence(self): + """ + Retrieves the presence of the Power Supply Unit (PSU) + + Returns: + bool: True if PSU is present, False if not + """ + psu_info = self.psu_dict_update() + if psu_info is None: + return False + status = psu_info.get('present', None) + if status is not None: + if status in self.restful.restful_err_str: + return False + if int(status) == 0: + return False + return True + # present is None, try to read status + status = psu_info.get('status', None) + if status is None or status in self.restful.restful_err_str: + return False + if int(status, 16) & PSU_NOT_PRESENCE == 0: + return True + return False + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + psu_info = self.psu_dict_update() + if psu_info is None: + return "N/A" + val = psu_info.get("model_name", "") + if val == "": + return "N/A" + return val + + def get_serial(self): + """ + Retrieves the serial number of the PSU + + Returns: + string: Serial number of PSU + """ + psu_info = self.psu_dict_update() + if psu_info is None: + return "N/A" + val = psu_info.get("serial_number", "") + if val == "": + return "N/A" + return val.rstrip('#') + + def get_status(self): + """ + Retrieves the operational status of the PSU + + Returns: + bool: True if PSU is operating properly, False if not + """ + if not self.get_presence(): + return False + psu_info = self.psu_dict_update() + if psu_info is None: + return False + status = psu_info.get('status', None) + if status is None or status in self.restful.restful_err_str: + return False + status = int(status, 16) + if status != 0: + return False + return True + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return -1 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + psu_status_dict = self.psu_status_dict_update() + if psu_status_dict is None: + return 0 + if psu_status_dict.get("InputStatus", False) is False: + value = 0 + else: + psu_power_dict = self.psu_power_dict_update() + if psu_power_dict is None: + return 0 + cur_psu_output = psu_power_dict.get("Outputs", None) + if cur_psu_output is None: + return 0 + tmp = cur_psu_output.get("Voltage", None) + if tmp is None: + return 0 + value = tmp.get("Value", 0) + if value in self.restful.restful_err_str: + return 0 + return self._get_value(value) + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + + Returns: + A float number, electric current in amperes, + e.g. 15.4 + """ + psu_status_dict = self.psu_status_dict_update() + if psu_status_dict is None: + return 0 + if psu_status_dict.get("InputStatus", False) is False: + value = 0 + else: + psu_power_dict = self.psu_power_dict_update() + if psu_power_dict is None: + return 0 + cur_psu_output = psu_power_dict.get("Outputs", None) + if cur_psu_output is None: + return 0 + tmp = cur_psu_output.get("Current", None) + if tmp is None: + return 0 + value = tmp.get("Value", 0) + if value in self.restful.restful_err_str: + return 0 + return self._get_value(value) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + psu_status_dict = self.psu_status_dict_update() + if psu_status_dict is None: + return 0 + if psu_status_dict.get("InputStatus", False) is False: + value = 0 + else: + psu_power_dict = self.psu_power_dict_update() + if psu_power_dict is None: + return 0 + cur_psu_output = psu_power_dict.get("Outputs", None) + if cur_psu_output is None: + return 0 + tmp = cur_psu_output.get("Power", None) + if tmp is None: + return 0 + value = tmp.get("Value", 0) + if value in self.restful.restful_err_str: + return 0 + value = round(float(value) / 1000, 1) + return self._get_value(value) + + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + + Returns: + A boolean, True if PSU has stablized its output voltages and + passed all its internal self-tests, False if not. + """ + if not self.get_presence(): + return False + psu_info = self.psu_dict_update() + if psu_info is None: + return False + status = psu_info.get('status', None) + if status is None or status in self.restful.restful_err_str: + return False + status = int(status, 16) + if status != 0: + return False + return True + + def get_status_led(self): + """ + Gets the state of the PSU status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings. + """ + psu_info = self.psu_dict_update() + if psu_info is None: + return self.STATUS_LED_COLOR_OFF + led_status = psu_info.get('led_status', None) + if led_status is None: + return self.STATUS_LED_COLOR_OFF + + return self.led_map.get(led_status, "unknown status %s" % led_status) + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + Args: + color: A string representing the color with which to set the + PSU status LED + Returns: + bool: True if status LED state is set successfully, False if + not + """ + # not supported + return False + + def get_temperature(self): + """ + Retrieves current temperature reading from PSU + + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + psu_status_dict = self.psu_status_dict_update() + if psu_status_dict is None: + return 0 + cur_psu_temp = psu_status_dict.get("Temperature", None) + if cur_psu_temp is None: + return 0 + value = cur_psu_temp.get("Value", None) + if value is None or value in self.restful.restful_err_str: + return 0 + return self._get_value(value) + + def get_temperature_high_threshold(self): + """ + Retrieves the high threshold temperature of PSU + + Returns: + A float number, the high threshold temperature of PSU in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + psu_status_dict = self.psu_status_dict_update() + if psu_status_dict is None: + return 0 + cur_psu_temp = psu_status_dict.get("Temperature", None) + if cur_psu_temp is None: + return 0 + value = cur_psu_temp.get("Max", None) + if value is None or value in self.restful.restful_err_str: + return 0 + return self._get_value(value) + + def get_voltage_high_threshold(self): + """ + Retrieves the high threshold PSU voltage output + + Returns: + A float number, the high threshold output voltage in volts, + e.g. 12.1 + """ + return 13.0 + + def get_voltage_low_threshold(self): + """ + Retrieves the low threshold PSU voltage output + + Returns: + A float number, the low threshold output voltage in volts, + e.g. 12.1 + """ + return 11.8 + + def get_input_voltage(self): + """ + Get the input voltage of the PSU + + Returns: + A float number, the input voltage in volts, + """ + psu_status_dict = self.psu_status_dict_update() + if psu_status_dict is None: + return 0 + if psu_status_dict.get("InputStatus", False) is False: + value = 0 + else: + psu_power_dict = self.psu_power_dict_update() + if psu_power_dict is None: + return 0 + cur_psu_input = psu_power_dict.get("Inputs", None) + if cur_psu_input is None: + return 0 + tmp = cur_psu_input.get("Voltage", None) + if tmp is None: + return 0 + value = tmp.get("Value", 0) + if value in self.restful.restful_err_str: + return 0 + return self._get_value(value) + + def get_input_current(self): + """ + Get the input electric current of the PSU + + Returns: + A float number, the input current in amperes, e.g 220.3 + """ + psu_status_dict = self.psu_status_dict_update() + if psu_status_dict is None: + return 0 + if psu_status_dict.get("InputStatus", False) is False: + value = 0 + else: + psu_power_dict = self.psu_power_dict_update() + if psu_power_dict is None: + return 0 + cur_psu_input = psu_power_dict.get("Inputs", None) + if cur_psu_input is None: + return 0 + tmp = cur_psu_input.get("Current", None) + if tmp is None: + return 0 + value = tmp.get("Value", 0) + if value in self.restful.restful_err_str: + return 0 + return self._get_value(value) + + def get_input_power(self): + """ + Get the input current energy of the PSU + + Returns: + A float number, the input power in watts, e.g. 302.6 + """ + psu_status_dict = self.psu_status_dict_update() + if psu_status_dict is None: + return 0 + if psu_status_dict.get("InputStatus", False) is False: + value = 0 + else: + psu_power_dict = self.psu_power_dict_update() + if psu_power_dict is None: + return 0 + cur_psu_input = psu_power_dict.get("Inputs", None) + if cur_psu_input is None: + return 0 + tmp = cur_psu_input.get("Power", None) + if tmp is None: + return 0 + value = tmp.get("Value", 0) + if value in self.restful.restful_err_str: + return 0 + value = round(float(value) / 1000, 1) + return self._get_value(value) + + def get_revision(self): + """ + Retrieves the hardware revision of the device + + Returns: + string: Revision value of device + """ + psu_info = self.psu_dict_update() + if psu_info is None: + return "N/A" + val = psu_info.get("hardware_version", "") + if val == "": + return "N/A" + return val + + def get_vendor(self): + """ + Retrieves the vendor name of the psu + + Returns: + string: Vendor name of psu + """ + psu_info = self.psu_dict_update() + if psu_info is None: + return "N/A" + val = psu_info.get("vendor", "") + if val == "": + return "N/A" + return val.rstrip('#') + + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU + + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + psu_power_dict = self.psu_power_dict_update() + if psu_power_dict is None: + return 0 + cur_psu_output = psu_power_dict.get("Outputs", None) + if cur_psu_output is None: + return 0 + tmp = cur_psu_output.get("Max_Power", None) + if tmp is None: + return 0 + value = tmp.get("Value", 0) + if value in self.restful.restful_err_str: + return 0 + value = round(float(value) / 1000, 1) + return self._get_value(value) + + + def get_thermal(self, index): + """ + Retrieves thermal unit represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the thermal to + retrieve + + Returns: + An object dervied from ThermalBase representing the specified thermal + """ + return False + + def get_capacity(self): + """ + Gets the capacity (maximum output power) of the PSU in watts + Returns: + An integer, the capacity of PSU + """ + return int(self.get_maximum_supplied_power()) + + def get_type(self): + """ + Gets the type of the PSU + Returns: + A string, the type of PSU (AC/DC) + """ + psu_power_dict = self.psu_power_dict_update() + if psu_power_dict is None: + return "N/A" + psu_inputs = psu_power_dict.get("Inputs", None) + if psu_inputs is None: + return "N/A" + tmp = psu_inputs.get("Type", None) + if tmp is None: + return "N/A" + if tmp == "0": + return "DC" + if tmp == "1": + return "AC" + return "N/A" + + def get_service_tag(self): + """ + Retrieves the service tag of the device + Returns: + string: The service tag of the device + """ + return 'N/A' + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py new file mode 100644 index 00000000000..49cdda39433 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py @@ -0,0 +1,459 @@ +from restful_util.restful_api import RestfulApiClient +from platform_util import exec_os_cmd, get_value, dev_file_read +from plat_hal.baseutil import baseutil +import time +import sys +PY3K = sys.version_info >= (3, 0) +if PY3K: + from time import monotonic as _time +else: + from monotonic import monotonic as _time + +PSU_NOT_PRESENCE = 0x01 +PSU_POWER_LOSS = 0x02 +PSU_FAN_FAULT = 0x04 +PSU_VOL_FAULT = 0x08 +PSU_CUR_FAULT = 0x10 +PSU_PWR_FAULT = 0x20 +PSU_TEMP_FAULT = 0x40 + +PSU_ERR_VALUE = -999999 + + +def RestfulInfoUpdate(): + def decorator(func): + def wrapper(self, *args, **kwargs): + self.update_restful_info(func.__name__) + return func(self, *args, **kwargs) + return wrapper + return decorator + + +class RestfulApi(RestfulApiClient): + + func_map = { + "get_psu_total_number": "psu", + "get_psu_info": "psu", + "get_fan_total_number": "fan", + "get_fan_rotor_number": "fan", + "get_fan_info": "fan", + "get_all_dcdc_sensors": "sensor", + "get_dcdc_sensor_by_id": "sensor", + "get_all_temp_sensors": "temp_sensor", + "get_temp_sensor_by_id": "temp_sensor", + "get_all_vol_sensors": "vol_sensor", + "get_vol_sensor_by_id": "vol_sensor", + "get_all_cur_sensors": "cur_sensor", + "get_cur_sensor_by_id": "cur_sensor", + "get_cpld_total_number": "fw", + "get_cpld_by_id": "fw", + "get_bmc_by_id": "fw", + "get_bmc_total_number": "fw", + "get_sysled": "led", + } + + def __init__(self, default_gap=3): + self.gap = default_gap + self.config = baseutil.get_config() + self.eeprom_config = self.config.get("onie_e2", None) + self.reboot_cause_config = self.config.get("reboot_cause", None) + self.fpga_config = self.config.get("fpga_config", {}) + self.bios_config = self.config.get("bios_config", {}) + self.sw_config = self.config.get("switch_config", {}) + self.cpld_config = self.config.get("cpld_config", {}) + self.bmc_config = self.config.get("bmc_config", {}) + self.fan_config = self.config.get("fan_config", {}) + self.psu_config = self.config.get("psu_config", {}) + self.thermal_config = self.config.get("thermal_config", {}) + self.restful_ready = 0 + self.dcdc_sensors = None + self.fans = None + self.psus = None + self.temp_sensors = None + self.vol_sensors = None + self.cur_sensors = None + self.cplds = None + self.bmc = None + self.sysled = None + self.temp_filter = { + "temp0": "INLET_TEMP_PDB", + "temp1": "INLET_TEMP_LC", + "temp2": "OUTLET_2_TEMP", + "temp3": "OUTLET_1_TEMP", + "temp4": "ASIC_TEMP", + "temp5": "CPU", + "temp6": "PSU1_TEMP", + "temp7": "PSU2_TEMP", + "temp8": "PSU3_TEMP", + "temp9": "PSU4_TEMP", + } + self.restful_update_map = { + "psu": { + "update_time": 0, + "update_func": self.update_psus, + "url": self.PsusUrl + }, + "fan": { + "update_time": 0, + "update_func": self.update_fans, + "url": self.FansUrl + }, + "fw": { + "update_time": 0, + "update_func": self.update_firmwares, + "url": self.FirmwaresUrl + }, + "sensor": { + "update_time": 0, + "update_func": self.update_sensors, + "url": self.SensorsUrl + }, + "temp_sensor": { + "update_time": 0, + "update_func": self.update_temp_sensors, + "url": self.TempSensorsUrl + }, + "vol_sensor": { + "update_time": 0, + "update_func": self.update_vol_sensors, + "url": self.VolSensorsUrl + }, + "cur_sensor": { + "update_time": 0, + "update_func": self.update_cur_sensors, + "url": self.CurSensorsUrl + }, + "led": { + "update_time": 0, + "update_func": self.update_sysled, + "url": self.LEDsUrl + }, + } + self.restful_err_str = ("ACCESS FAILED", "NA", "N/A") + + def restful_check_ready(self): + if self.restful_ready == 1: + return True + retry = 60 + while retry >= 0: + tmp = self.get_request(self.HostnameUrl) + if tmp is None: + time.sleep(5) + continue + ret = tmp.get('message', 'Not OK') + code = tmp.get('code', 0) + if ret == 'OK' and code == 200: + self.restful_ready = 1 + return True + return False + + def update_restful_info(self, func_name): + tmp = self.restful_update_map.get(self.func_map.get(func_name, None)) + if tmp is not None: + last_time = tmp.get("update_time", 0) + local_time = _time() + func = tmp.get("update_func", None) + url = tmp.get("url", None) + if func is not None and local_time - last_time > self.gap: + ret, data = self.restful_request(url) + if ret: + func(data) + tmp["update_time"] = _time() + + def restful_request(self, url): + try: + tmp = self.get_request(url) + if not tmp: + return False, None + ret = tmp.get('message', 'Not OK') + code = tmp.get('code', 0) + if ret == 'OK' and code == 200: + data = tmp.get('data', None) + return True, data + return False, None + except Exception as e: + return False, None + + def update_firmwares(self, val): + try: + self.cplds = val.get('cpld', None) + self.bmc = val.get('bmc', None) + except Exception as e: + self.cplds = None + self.bmc = None + + def update_sysled(self, val): + try: + self.sysled = val.get('sysled', None) + except Exception as e: + self.sysled = None + + def update_psus(self, val): + try: + self.psus = val.get('psu', None) + except Exception as e: + self.psus = None + + def update_fans(self, val): + try: + self.fans = val.get('fan', None) + except Exception as e: + self.fans = None + + def update_sensors(self, val): + try: + cur_sensors = val.get('cur_sensor', None) + vol_sensors = val.get('vol_sensor', None) + temp_sensors = val.get('temp_sensor', None) + self.dcdc_sensors = {} + self.temp_sensors = {} + if cur_sensors is not None: + for name, data in cur_sensors.items(): + if isinstance(data, dict): + self.dcdc_sensors[name] = data + if vol_sensors is not None: + for name, data in vol_sensors.items(): + if isinstance(data, dict): + self.dcdc_sensors[name] = data + if temp_sensors is not None: + for name, data in temp_sensors.items(): + if isinstance(data, dict): + if name in self.temp_filter: + self.temp_sensors[name] = data + self.temp_sensors[name]["alias"] = self.temp_filter[name] + except Exception as e: + self.dcdc_sensors = None + self.temp_sensors = None + + def update_temp_sensors(self, val): + try: + temp_sensors = val.get('temp_sensor', None) + self.temp_sensors = {} + if temp_sensors is not None: + for name, data in temp_sensors.items(): + if isinstance(data, dict): + if name in self.temp_filter: + self.temp_sensors[name] = data + self.temp_sensors[name]["alias"] = self.temp_filter[name] + except Exception as e: + self.temp_sensors = None + + def update_vol_sensors(self, val): + try: + vol_sensors = val.get('vol_sensor', None) + self.vol_sensors = {} + if vol_sensors is not None: + for name, data in vol_sensors.items(): + if isinstance(data, dict): + self.vol_sensors[name] = data + except Exception as e: + self.vol_sensors = None + + def update_cur_sensors(self, val): + try: + cur_sensors = val.get('cur_sensor', None) + self.cur_sensors = {} + if cur_sensors is not None: + for name, data in cur_sensors.items(): + if isinstance(data, dict): + self.cur_sensors[name] = data + except Exception as e: + self.cur_sensors = None + + # Interface for Psu + def get_psu_total_number(self): + psu_num = self.psu_config.get("number", 0) + return psu_num + + + @RestfulInfoUpdate() + def get_psu_info(self, psu_name): + if self.psus is None: + return None + return self.psus.get(psu_name) + + # Interface for Fan + def get_fan_total_number(self): + fan_num = self.fan_config.get("num_fantrays", 0) + return fan_num + + def get_fan_rotor_number(self, fan_name): + rotor_number = self.fan_config.get("num_fans_pertray", 0) + return rotor_number + + @RestfulInfoUpdate() + def get_fan_info(self, fan_name): + if self.fans is None: + return None + return self.fans.get(fan_name) + + @RestfulInfoUpdate() + def get_all_dcdc_sensors(self): + return self.dcdc_sensors + + # Interface for dcdc + @RestfulInfoUpdate() + def get_dcdc_sensor_by_id(self, dcdc_id): + if not self.dcdc_sensors: + return None + return self.dcdc_sensors.get(dcdc_id, None) + + def get_thermal_total_number(self): + thermal_num = self.thermal_config.get("number", 0) + return thermal_num + + @RestfulInfoUpdate() + def get_all_temp_sensors(self): + return self.temp_sensors + + @RestfulInfoUpdate() + def get_temp_sensor_by_id(self, temp_id): + if not self.temp_sensors: + return None + return self.temp_sensors.get(temp_id, None) + + @RestfulInfoUpdate() + def get_all_vol_sensors(self): + return self.vol_sensors + + @RestfulInfoUpdate() + def get_vol_sensor_by_id(self, vol_id): + if not self.vol_sensors: + return None + return self.vol_sensors.get(vol_id, None) + + @RestfulInfoUpdate() + def get_all_cur_sensors(self): + return self.cur_sensors + + @RestfulInfoUpdate() + def get_cur_sensor_by_id(self, cur_id): + if not self.cur_sensors: + return None + return self.cur_sensors.get(cur_id, None) + + def get_cpld_total_number(self): + cpld_num = self.cpld_config.get("number", 0) + return cpld_num + + def get_fw_by_id(self, fw_name): + if "cpld" in fw_name: + return self.get_cpld_by_id(fw_name) + elif "bmc" in fw_name: + return self.get_bmc_by_id(fw_name) + elif "switch" in fw_name: + return self.get_switch_by_id(fw_name) + elif "bios" in fw_name: + return self.get_bios_by_id(fw_name) + elif "fpga" in fw_name: + return self.get_fpga_by_id(fw_name) + + @RestfulInfoUpdate() + def get_cpld_by_id(self, fw_type): + if self.cplds is not None: + cpld = self.cplds.get(fw_type, None) + return cpld + return None + + @RestfulInfoUpdate() + def get_sysled(self): + return self.sysled + + def _get_value(self, config): + if config["gettype"] == "cmd": + ret, output = exec_os_cmd(config["cmd"]) + return output + + def get_fpga_total_number(self): + fpga_num = self.fpga_config.get("number", 0) + return fpga_num + + def get_fpga_reg(self, config): + if config is None: + return "N/A" + ret, tmp = dev_file_read(config["dev_path"], config["offset"], config["len"]) + if ret != True: + return "N/A" + reg = "" + for index in range(len(tmp) - 1, -1, -1): + val = hex(tmp[index]).replace("0x", "") + reg = reg + val + return reg + + def get_fpga_by_id(self, fw_type): + fw_dict = {} + fpgas = self.fpga_config.get("fpgas", []) + for i in fpgas: + if fw_type == i["name"]: + fw_dict['alias'] = i.get('alias', None) + fw_dict['board_version'] = self.get_fpga_reg(i.get("board_version", None)) + fw_dict['firmware_version'] = self.get_fpga_reg(i.get("firmware_version", None)) + fw_dict['type'] = i.get('type', None) + break + return fw_dict + + def get_bios_by_id(self, fw_type): + fw_dict = {} + bios = self.bios_config.get("bios", []) + for i in bios: + if fw_type == i["name"]: + fw_dict['alias'] = i.get('alias', None) + fw_dict['board_version'] = self._get_value(i.get("board_version", None)) + fw_dict['firmware_version'] = self._get_value(i.get("firmware_version", None)) + fw_dict['type'] = self._get_value(i.get("type", None)) + break + return fw_dict + + def get_switch_by_id(self, fw_type): + fw_dict = {} + sw = self.sw_config.get("switchs", []) + for i in sw: + if fw_type == i["name"]: + for cmd in i.get("init_cmd", []): + exec_os_cmd(cmd) + fw_dict['alias'] = i.get('alias', None) + fw_dict['board_version'] = self._get_value(i.get("board_version", None)).split(" ")[0] + fw_dict['firmware_version'] = self._get_value(i.get("firmware_version", None)).split(" ")[0] + fw_dict['type'] = i.get('type', None) + for cmd in i.get("deinit_cmd", []): + exec_os_cmd(cmd) + break + return fw_dict + + @RestfulInfoUpdate() + def get_bmc_by_id(self, fw_type): + fw_dict = {} + if self.bmc is not None: + bmc = self.bmc.get(fw_type) + fw_dict['board_version'] = bmc.get('board_version', None) + fw_dict['alias'] = bmc.get('alias', None) + fw_dict['firmware_version'] = bmc.get('firmware_version', None) + fw_dict['type'] = bmc.get('type', None) + return fw_dict + + def get_bmc_total_number(self): + bmc_num = self.bmc_config.get("number", 0) + return bmc_num + + def get_bios_total_number(self): + num = self.bios_config.get("number", 0) + return num + + def get_sw_total_number(self): + num = self.sw_config.get("number", 0) + return num + + def get_onie_e2_path(self, e2_name): + if self.eeprom_config is None: + return "/sys/bus/i2c/devices/1-0056/eeprom" + return self.eeprom_config.get("e2loc").get("loc") + + def get_cpu_reboot_cause(self): + if self.reboot_cause_config is None: + return 0 + check_point = self.reboot_cause_config.get('check_point', None) + if check_point is not None: + ret, val = get_value(check_point) + if ret == True: + return val + return 0 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/sfp.py new file mode 100644 index 00000000000..5c17530a5c8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/sfp.py @@ -0,0 +1,634 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- + +############################################################################# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +# +# *_device.py config version instruction: +# ver 1.0 - platform api: +# "presence_cpld": { +# "dev_id": { +# [dev_id]: { +# "offset": { +# [offset]: [port_id] +# } +# } +# } +# } +# "reset_cpld": { +# "dev_id": { +# [dev_id]: { +# "offset": { +# [offset]: [port_id] +# } +# } +# } +# } +# ver 2.0 - wb_plat: +# "presence_path": "/xx/wb_plat/xx[port_id]/present" +# "eeprom_path": "/sys/bus/i2c/devices/i2c-[bus]/[bus]-0050/eeprom" +# "reset_path": "/xx/wb_plat/xx[port_id]/reset" +############################################################################# +import sys +import time +import syslog +import traceback +from abc import abstractmethod + +configfile_pre = "/usr/local/bin/" +sys.path.append(configfile_pre) + +try: + from platform_intf import * + from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase + from plat_hal.baseutil import baseutil + +except ImportError as error: + raise ImportError(str(error) + "- required module not found") from error + +LOG_DEBUG_LEVEL = 1 +LOG_WARNING_LEVEL = 2 +LOG_ERROR_LEVEL = 3 + + +class Sfp(SfpOptoeBase): + + OPTOE_DRV_TYPE1 = 1 + OPTOE_DRV_TYPE2 = 2 + OPTOE_DRV_TYPE3 = 3 + + # index must start at 1 + def __init__(self, index): + SfpOptoeBase.__init__(self) + self.sfp_type = None + sfp_config = baseutil.get_config().get("sfps", None) + self.log_level_config = sfp_config.get("log_level", LOG_WARNING_LEVEL) + # Init instance of SfpCust + ver = sfp_config.get("ver", None) + if ver is None: + self._sfplog(LOG_ERROR_LEVEL, "Get Ver Config Error!") + vers = int(float(ver)) + if vers == 1: + self._sfp_api = SfpV1(index) + elif vers == 2: + self._sfp_api = SfpV2(index) + else: + self._sfplog(LOG_ERROR_LEVEL, "Get SfpVer Error!") + + def get_eeprom_path(self): + return self._sfp_api._get_eeprom_path() + + def read_eeprom(self, offset, num_bytes): + return self._sfp_api.read_eeprom(offset, num_bytes) + + def get_presence(self): + return self._sfp_api.get_presence() + + def get_transceiver_info(self): + # temporary solution for a sonic202111 bug + transceiver_info = super().get_transceiver_info() + try: + if transceiver_info == None: + return None + if transceiver_info['cable_type'] == None: + transceiver_info['cable_type'] = 'N/A' + if transceiver_info["vendor_rev"] is not None: + transceiver_info["hardware_rev"] = transceiver_info["vendor_rev"] + except BaseException: + print(traceback.format_exc()) + return None + return transceiver_info + + def get_reset_status(self): + if self.get_presence() is False: + return False + + if self.sfp_type is None: + self.refresh_xcvr_api() + + if self.sfp_type == 'SFP': + self._sfplog(LOG_ERROR_LEVEL, 'SFP does not support reset') + return False + + ret = self._sfp_api.get_reset_status() + return ret + + def reset(self): + if self.get_presence() is False: + return False + + if self.sfp_type is None: + self.refresh_xcvr_api() + + if self.sfp_type == 'SFP': + self._sfplog(LOG_ERROR_LEVEL, 'SFP does not support reset') + return False + + self._sfplog(LOG_DEBUG_LEVEL, 'resetting...') + ret = self._sfp_api.set_reset(True) + if ret: + time.sleep(0.5) + ret = self._sfp_api.set_reset(False) + + return ret + + def get_lpmode(self): + if self.get_presence() is False: + return False + + if self.sfp_type is None: + self.refresh_xcvr_api() + + if self.sfp_type == 'QSFP' or self.sfp_type == 'QSFP_DD': + return SfpOptoeBase.get_lpmode(self) + + self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode') + return False + + def set_lpmode(self, lpmode): + if self.get_presence() is False: + return False + + if self.sfp_type is None or self._xcvr_api is None: + self.refresh_xcvr_api() + + if self.sfp_type == 'QSFP_DD' or self.sfp_type == 'QSFP': + return SfpOptoeBase.set_lpmode(self, lpmode) + + self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode') + return False + + def get_tx_disable(self): + if self.get_presence() is False: + return False + + if self.sfp_type is None: + self.refresh_xcvr_api() + + if self.sfp_type == 'SFP': + return self._sfp_api.get_tx_disable() + + return SfpOptoeBase.get_tx_disable(self) + + def get_tx_disable_channel(self): + if self.get_presence() is False: + return False + + if self.sfp_type is None: + self.refresh_xcvr_api() + + if self.sfp_type == 'SFP': + return self._sfp_api.get_tx_disable_channel() + + return SfpOptoeBase.get_tx_disable_channel(self) + + def tx_disable(self, tx_disable): + if self.get_presence() is False: + return False + + if self.sfp_type is None: + self.refresh_xcvr_api() + + if self.sfp_type == 'SFP': + return self._sfp_api.set_tx_disable(tx_disable) + + return SfpOptoeBase.tx_disable(self, tx_disable) + + def tx_disable_channel(self, channel, disable): + if self.get_presence() is False: + return False + + if self.sfp_type is None: + self.refresh_xcvr_api() + + if self.sfp_type == 'SFP': + self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support tx disable channel') + return False + + return SfpOptoeBase.tx_disable_channel(self, channel, disable) + + def set_optoe_write_max(self, write_max): + """ + This func is declared and implemented by SONiC but we're not supported + so override it as NotImplemented + """ + self._sfplog(LOG_DEBUG_LEVEL, "set_optoe_write_max NotImplemented") + + def refresh_xcvr_api(self): + """ + Updates the XcvrApi associated with this SFP + """ + self._xcvr_api = self._xcvr_api_factory.create_xcvr_api() + class_name = self._xcvr_api.__class__.__name__ + optoe_type = None + # set sfp_type + if 'CmisApi' in class_name: + self.sfp_type = 'QSFP_DD' + optoe_type = self.OPTOE_DRV_TYPE3 + elif 'Sff8472Api' in class_name: + self.sfp_type = 'SFP' + optoe_type = self.OPTOE_DRV_TYPE2 + elif ('Sff8636Api' in class_name or 'Sff8436Api' in class_name): + self.sfp_type = 'QSFP' + optoe_type = self.OPTOE_DRV_TYPE1 + # set optoe driver + if optoe_type is not None: + self._sfp_api.set_optoe_type(optoe_type) + + def _sfplog(self, log_level, msg): + if log_level >= self.log_level_config: + try: + syslog.openlog("Sfp") + if log_level == LOG_DEBUG_LEVEL: + syslog.syslog(syslog.LOG_DEBUG, msg) + elif log_level == LOG_WARNING_LEVEL: + syslog.syslog(syslog.LOG_DEBUG, msg) + elif log_level == LOG_ERROR_LEVEL: + syslog.syslog(syslog.LOG_ERR, msg) + syslog.closelog() + + except BaseException: + print(traceback.format_exc()) + + +class SfpCust(): + def __init__(self, index): + self.eeprom_path = None + self._init_config(index) + + def _init_config(self, index): + sfp_config = baseutil.get_config().get("sfps", None) + self.log_level_config = sfp_config.get("log_level", LOG_WARNING_LEVEL) + self._port_id = index + self.eeprom_retry_times = sfp_config.get("eeprom_retry_times", 0) + self.eeprom_retry_break_sec = sfp_config.get("eeprom_retry_break_sec", 0) + + def _get_eeprom_path(self): + return self.eeprom_path or None + + @abstractmethod + def get_presence(self): + pass + + def read_eeprom(self, offset, num_bytes): + try: + for i in range(self.eeprom_retry_times): + with open(self._get_eeprom_path(), mode='rb', buffering=0) as f: + f.seek(offset) + result = f.read(num_bytes) + # temporary solution for a sonic202111 bug + if len(result) < num_bytes: + result = result[::-1].zfill(num_bytes)[::-1] + if result is not None: + return bytearray(result) + time.sleep(self.eeprom_retry_break_sec) + continue + + except BaseException: + self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + return None + + def write_eeprom(self, offset, num_bytes, write_buffer): + try: + for i in range(self.eeprom_retry_times): + ret = SfpOptoeBase.write_eeprom(self, offset, num_bytes, write_buffer) + if ret is False: + time.sleep(self.eeprom_retry_break_sec) + continue + break + + return ret + except BaseException: + self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + return False + + @abstractmethod + def set_optoe_type(self, optoe_type): + pass + + @abstractmethod + def set_reset(self, reset): + pass + + def _convert_str_range_to_int_arr(self, range_str): + if not range_str: + return [] + + int_range_strs = range_str.split(',') + range_res = [] + for int_range_str in int_range_strs: + if '-' in int_range_str: + range_s = int(int_range_str.split('-')[0]) + range_e = int(int_range_str.split('-')[1]) + 1 + else: + range_s = int(int_range_str) + range_e = int(int_range_str) + 1 + + range_res = range_res + list(range(range_s, range_e)) + + return range_res + + def _sfplog(self, log_level, msg): + if log_level >= self.log_level_config: + try: + syslog.openlog("SfpCust") + if log_level == LOG_DEBUG_LEVEL: + syslog.syslog(syslog.LOG_DEBUG, msg) + elif log_level == LOG_WARNING_LEVEL: + syslog.syslog(syslog.LOG_DEBUG, msg) + elif log_level == LOG_ERROR_LEVEL: + syslog.syslog(syslog.LOG_ERR, msg) + syslog.closelog() + + except BaseException: + print(traceback.format_exc()) + + +class SfpV1(SfpCust): + def _init_config(self, index): + super()._init_config(index) + # init presence path + sfp_config = baseutil.get_config().get("sfps", None) + + eeprom_path_config = sfp_config.get("eeprom_path", None) + eeprom_path_key = sfp_config.get("eeprom_path_key")[self._port_id - 1] + self.eeprom_path = None if eeprom_path_config is None else eeprom_path_config % ( + eeprom_path_key, eeprom_path_key) + self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path) + + self.presence_cpld = sfp_config.get("presence_cpld", None) + self.presence_val_is_present = sfp_config.get("presence_val_is_present", 0) + self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path") + + # init reset path + self.reset_cpld = sfp_config.get("reset_cpld", None) + self.reset_val_is_reset = sfp_config.get("reset_val_is_reset", 0) + self._sfplog(LOG_DEBUG_LEVEL, "Done init cpld path") + + # init tx_disable path + self.txdis_cpld = sfp_config.get("txdis_cpld", None) + self.txdisable_val_is_on = sfp_config.get("txdisable_val_is_on", 0) + self._sfplog(LOG_DEBUG_LEVEL, "Done init cpld tx_disable path") + + def get_presence(self): + if self.presence_cpld is None: + self._sfplog(LOG_ERROR_LEVEL, "presence_cpld is None!") + return False + try: + dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.presence_cpld) + if dev_id == -1: + return False + ret, info = platform_reg_read(0, dev_id, offset, 1) + if (ret is False + or info is None): + return False + return info[0] & (1 << offset_bit) == self.presence_val_is_present + except BaseException: + self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + return False + + def get_reset_status(self): + if self.reset_cpld is None: + self._sfplog(LOG_ERROR_LEVEL, "reset_cpld is None!") + return False + try: + dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.reset_cpld) + if dev_id == -1: + return False + ret, info = platform_reg_read(0, dev_id, offset, 1) + if (ret is False + or info is None): + self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!") + return False + + return (info[0] & (1 << offset_bit) == self.reset_val_is_reset) + except BaseException: + self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + return False + + def get_tx_disable(self): + if self.reset_cpld is None: + self._sfplog(LOG_ERROR_LEVEL, "txdis_cpld is None!") + return None + + try: + tx_disable_list = [] + dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.txdis_cpld) + if dev_id == -1: + return False + ret, info = platform_reg_read(0, dev_id, offset, 1) + if (ret is False + or info is None): + self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!") + return None + if self.txdisable_val_is_on == 1: + tx_disable_list.append(info[0] & (1 << offset_bit) != 0) + else: + tx_disable_list.append(info[0] & (1 << offset_bit) == 0) + except BaseException: + self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + return None + + return tx_disable_list + + def get_tx_disable_channel(self): + tx_disable_list = [] + tx_disable_list = self.get_tx_disable() + if tx_disable_list is None: + return 0 + + tx_disabled = 0 + for i in range(len(tx_disable_list)): + if tx_disable_list[i]: + tx_disabled |= 1 << i + + return tx_disabled + + def read_eeprom(self, offset, num_bytes): + try: + for i in range(self.eeprom_retry_times): + ret, info = platform_sfp_read(self._port_id, offset, num_bytes) + if (ret is False + or info is None): + time.sleep(self.eeprom_retry_break_sec) + continue + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append(0) + for n in range(0, len(info)): + eeprom_raw[n] = info[n] + # temporary solution for a sonic202111 bug + if len(eeprom_raw) < num_bytes: + eeprom_raw = eeprom_raw[::-1].zfill(num_bytes)[::-1] + return bytearray(eeprom_raw) + except BaseException: + self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + return None + + def set_optoe_type(self, optoe_type): + ret, info = platform_get_optoe_type(self._port_id) + if ret is True and info != optoe_type: + try: + ret, _ = platform_set_optoe_type(self._port_id, optoe_type) + except Exception as err: + self._sfplog(LOG_ERROR_LEVEL, "Set optoe err %s" % err) + + def set_reset(self, reset): + if self.reset_cpld is None: + self._sfplog(LOG_ERROR_LEVEL, "reset_cpld is None!") + return False + try: + val = [] + dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.reset_cpld) + if dev_id == -1: + return False + ret, info = platform_reg_read(0, dev_id, offset, 1) + if (ret is False + or info is None): + self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!") + return False + + if self.reset_val_is_reset == 0: + if reset: + val.append(info[0] & (~(1 << offset_bit))) + else: + val.append(info[0] | (1 << offset_bit)) + else: + if reset: + val.append(info[0] | (1 << offset_bit)) + else: + val.append(info[0] & (~(1 << offset_bit))) + + ret, info = platform_reg_write(0, dev_id, offset, val) + if ret is False: + self._sfplog(LOG_ERROR_LEVEL, "platform_reg_write error!") + return False + + except BaseException: + self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + return False + + return True + + def set_tx_disable(self, tx_disable): + if self.txdis_cpld is None: + self._sfplog(LOG_ERROR_LEVEL, "txdis_cpld is None!") + return False + try: + val = [] + dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.txdis_cpld) + if dev_id == -1: + return False + ret, info = platform_reg_read(0, dev_id, offset, 1) + if (ret is False + or info is None): + self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!") + return False + + if self.txdisable_val_is_on == 0: + if tx_disable: + val.append(info[0] & (~(1 << offset_bit))) + else: + val.append(info[0] | (1 << offset_bit)) + else: + if tx_disable: + val.append(info[0] | (1 << offset_bit)) + else: + val.append(info[0] & (~(1 << offset_bit))) + + ret, info = platform_reg_write(0, dev_id, offset, val) + if ret is False: + self._sfplog(LOG_ERROR_LEVEL, "platform_reg_write error!") + return False + + except BaseException: + self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + return False + + return True + + def _get_sfp_cpld_info(self, cpld_config): + dev_id = -1 + offset = -1 + offset_bit = -1 + for dev_id_temp in cpld_config["dev_id"]: + for offset_temp in cpld_config["dev_id"][dev_id_temp]["offset"]: + port_range_str = cpld_config["dev_id"][dev_id_temp]["offset"][offset_temp] + port_range_int = self._convert_str_range_to_int_arr(port_range_str) + if self._port_id in port_range_int: + dev_id = dev_id_temp + offset = offset_temp + offset_bit = port_range_int.index(self._port_id) + break + + return dev_id, offset, offset_bit + + +class SfpV2(SfpCust): + def _init_config(self, index): + super()._init_config(index) + # init eeprom path + sfp_config = baseutil.get_config().get("sfps", None) + eeprom_path_config = sfp_config.get("eeprom_path", None) + eeprom_path_key = sfp_config.get("eeprom_path_key")[self._port_id - 1] + self.eeprom_path = None if eeprom_path_config is None else eeprom_path_config % ( + eeprom_path_key, eeprom_path_key) + self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path) + + # init presence path + self.presence_path = None if sfp_config.get("presence_path", + None) is None else sfp_config.get("presence_path") % self._port_id + self.presence_val_is_present = sfp_config.get("presence_val_is_present", 0) + self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path: %s" % self.presence_path) + + # init optoe driver path + optoe_driver_path = sfp_config.get("optoe_driver_path", None) + optoe_driver_key = sfp_config.get("optoe_driver_key")[self._port_id - 1] + self.dev_class_path = None if optoe_driver_path is None else optoe_driver_path % ( + optoe_driver_key, optoe_driver_key) + self._sfplog(LOG_DEBUG_LEVEL, "Done init optoe driver path: %s" % self.dev_class_path) + + # init reset path + self.reset_path = None if sfp_config.get( + "reset_path", + None) is None else sfp_config.get( + "reset_path", + None) % self._port_id + self.reset_val_is_reset = sfp_config.get("reset_val_is_reset", 0) + self._sfplog(LOG_DEBUG_LEVEL, "Done init reset path: %s" % self.reset_path) + + def get_presence(self): + if self.presence_path is None: + self._sfplog(LOG_ERROR_LEVEL, "presence_path is None!") + return False + try: + with open(self.presence_path, "rb") as data: + sysfs_data = data.read(1) + if sysfs_data != "": + result = int(sysfs_data, 16) + return result == self.presence_val_is_present + except BaseException: + self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + return False + + def set_reset(self, reset): + return True + + def set_optoe_type(self, optoe_type): + if self.dev_class_path is None: + self._sfplog(LOG_ERROR_LEVEL, "dev_class_path is None!") + return False + try: + with open(self.dev_class_path, "r+") as dc_file: + dc_file_val = dc_file.read(1) + if int(dc_file_val) != optoe_type: + dc_str = "%s" % str(optoe_type) + dc_file.write(dc_str) + # dc_file.close() + except BaseException: + self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + return False + return True diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/thermal.py new file mode 100644 index 00000000000..516c86260e7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/thermal.py @@ -0,0 +1,282 @@ +#!/usr/bin/env python3 + +######################################################################## +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Thermals' information which are available in the platform +# +######################################################################## + + +try: + import time + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") from e + + +class Thermal(ThermalBase): + + def __init__(self, interface_obj, index): + + self.restful = interface_obj + self.temp_id = "temp" + str(index) + + def get_service_tag(self): + """ + Retrieves the service tag of the device + Returns: + string: The service tag of the device + """ + return 'N/A' + + def get_mfr_id(self): + """ + Retrieves the manufacturer's name (or ID) of the device + Returns: + string: Manufacturer's id of device + """ + return 'N/A' + + def get_sensor(self): + temp_info = {} + info = self.restful.get_temp_sensor_by_id(self.temp_id) + if info is None: + return None + + name = info.get("alias", "N/A") + temp_info['alias'] = info.get('alias', "N/A") + temp_info['type'] = info.get('type', "N/A") + value = info.get('value') + if value is None or value in self.restful.restful_err_str: + temp_info['value'] = None + else: + temp_info['value'] = float(value) / 1000 + max =info.get('max') + if max is None or max in self.restful.restful_err_str: + temp_info['max'] = None + else: + temp_info['max'] = float(max) / 1000 + min = info.get('min') + if min is None or min in self.restful.restful_err_str: + temp_info['min'] = None + else: + temp_info['min'] = float(min) / 1000 + return temp_info + + def get_name(self): + """ + Retrieves the name of the thermal + + Returns: + string: The name of the thermal + """ + temp_dict = self.get_sensor() + if temp_dict is None: + return "N/A" + name = temp_dict.get("alias", "N/A") + return name + + def get_presence(self): + """ + Retrieves the presence of the thermal + + Returns: + bool: True if thermal is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the Thermal + + Returns: + string: Model/part number of Thermal + """ + return "N/A" + + def get_serial(self): + """ + Retrieves the serial number of the Thermal + + Returns: + string: Serial number of Thermal + """ + return "N/A" + + def get_revision(self): + """ + Retrieves the hardware revision of the device + + Returns: + string: Revision value of device + """ + return "N/A" + + def get_status(self): + """ + Retrieves the operational status of the thermal + + Returns: + A boolean value, True if thermal is operating properly, + False if not + """ + temp_dict = self.get_sensor() + if temp_dict is None: + return False + if temp_dict.get("value") is None or temp_dict.get("max") is None or temp_dict.get("min") is None: + return False + if (temp_dict.get("value", -1) >= temp_dict.get("max", 0) + ) or (temp_dict.get("value", 0) <= temp_dict.get("min", -1)): + return False + + return True + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return -1 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + temp_dict = self.get_sensor() + if temp_dict is None: + return None + value = temp_dict.get("value", None) + if value is None: + return None + if value < -200: + return None + return round(float(value), 1) + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + temp_dict = self.get_sensor() + if temp_dict is None: + return None + value = temp_dict.get("max", None) + if value is None: + return None + return round(float(value), 1) + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + + Returns: + A float number, the low threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + temp_dict = self.get_sensor() + if temp_dict is None: + return None + value = temp_dict.get("min", None) + if value is None: + return None + return round(float(value), 1) + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + # not supported + return False + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + # not supported + return False + + def get_high_critical_threshold(self): + """ + Retrieves the high critical threshold temperature of thermal + + Returns: + A float number, the high critical threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + temp_dict = self.get_sensor() + if temp_dict is None: + return None + value = temp_dict.get("max", None) + if value is None: + return None + return round(float(value), 1) + + def get_low_critical_threshold(self): + """ + Retrieves the low critical threshold temperature of thermal + + Returns: + A float number, the low critical threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + temp_dict = self.get_sensor() + if temp_dict is None: + return None + value = temp_dict.get("min", None) + if value is None: + return None + return round(float(value), 1) + + def get_minimum_recorded(self): + """ + Retrieves the minimum recorded temperature of thermal + + Returns: + A float number, the minimum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + # not supported + return False + + def get_maximum_recorded(self): + """ + Retrieves the maximum recorded temperature of thermal + + Returns: + A float number, the maximum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + # not supported + return False diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/watchdog.py new file mode 100644 index 00000000000..948337f47a9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/watchdog.py @@ -0,0 +1,236 @@ +#!/usr/bin/env python3 + +######################################################################## +# +# +# Abstract base class for implementing a platform-specific class with +# which to interact with a hardware watchdog module in SONiC +# +######################################################################## + +import fcntl +import os +import array + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as error: + raise ImportError(str(error) + "- required module not found") from error + + +# ioctl constants +IO_WRITE = 0x40000000 +IO_READ = 0x80000000 +IO_READ_WRITE = 0xC0000000 +IO_SIZE_INT = 0x00040000 +IO_SIZE_40 = 0x00280000 +IO_TYPE_WATCHDOG = ord('W') << 8 + +WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG +WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG +WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG + +# Watchdog ioctl command +WDIOC_GETSUPPORT = 0 | WDR_40 +WDIOC_GETSTATUS = 1 | WDR_INT +WDIOC_GETBOOTSTATUS = 2 | WDR_INT +WDIOC_GETTEMP = 3 | WDR_INT +WDIOC_SETOPTIONS = 4 | WDR_INT +WDIOC_KEEPALIVE = 5 | WDR_INT +WDIOC_SETTIMEOUT = 6 | WDWR_INT +WDIOC_GETTIMEOUT = 7 | WDR_INT +WDIOC_SETPRETIMEOUT = 8 | WDWR_INT +WDIOC_GETPRETIMEOUT = 9 | WDR_INT +WDIOC_GETTIMELEFT = 10 | WDR_INT + +# Watchdog status constants +WDIOS_DISABLECARD = 0x0001 +WDIOS_ENABLECARD = 0x0002 + +WDT_COMMON_ERROR = -1 +WDT_IDENTITY = "CPLD Watchdog" +WDT_SYSFS_PATH = "/sys/class/watchdog/" + +DEFAULT_TIMEOUT = 180 + + +class Watchdog(WatchdogBase): + """ + Abstract base class for interfacing with a hardware watchdog module + """ + + def __init__(self): + self.watchdog, self.wdt_main_dev_name = self._get_wdt() + self.status_path = "/sys/class/watchdog/%s/status" % self.wdt_main_dev_name + self.state_path = "/sys/class/watchdog/%s/state" % self.wdt_main_dev_name + self.timeout_path = "/sys/class/watchdog/%s/timeout" % self.wdt_main_dev_name + # Set default value + self._disable() + self.armed = False + self.timeout = self._gettimeout() + + def _is_wd_main(self, dev): + """ + Checks watchdog identity + """ + identity = self._read_file( + "{}/{}/identity".format(WDT_SYSFS_PATH, dev)) + return identity == WDT_IDENTITY + + def _get_wdt(self): + """ + Retrieves watchdog device + """ + wdt_main_dev_list = [dev for dev in os.listdir( + "/dev/") if dev.startswith("watchdog") and self._is_wd_main(dev)] + if not wdt_main_dev_list: + return None + wdt_main_dev_name = wdt_main_dev_list[0] + watchdog_device_path = "/dev/{}".format(wdt_main_dev_name) + watchdog = os.open(watchdog_device_path, os.O_RDWR) + return watchdog, wdt_main_dev_name + + def _read_file(self, file_path): + """ + Read text file + """ + try: + with open(file_path, "r") as fd: + txt = fd.read() + except IOError: + return WDT_COMMON_ERROR + return txt.strip() + + def _enable(self): + """ + Turn on the watchdog timer + """ + req = array.array('h', [WDIOS_ENABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _disable(self): + """ + Turn off the watchdog timer + """ + req = array.array('h', [WDIOS_DISABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE) + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + req = array.array('I', [seconds]) + fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True) + return int(req[0]) + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True) + + return int(req[0]) + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True) + + return int(req[0]) + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.armed: + self._keepalive() + else: + self._settimeout(seconds) + self._enable() + self.armed = True + ret = self.timeout + except IOError: + pass + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + + Returns: + A boolean, True if watchdog is armed, False if not + """ + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + timeleft = WDT_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft + + def __del__(self): + """ + Close watchdog + """ + os.close(self.watchdog) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/Makefile new file mode 100755 index 00000000000..3039a7f8590 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/Makefile @@ -0,0 +1,28 @@ +PWD = $(shell pwd) +DIR_KERNEL_SRC = $(PWD)/modules/driver +EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -Wall +SUB_BUILD_DIR = $(PWD)/build +INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages +INSTALL_S3IP_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/s3ip_sysfs_cfg +INSTALL_S3IP_CONFIG_DIR = $(SUB_BUILD_DIR)/etc/s3ip + +all: + $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules + @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi + cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR) + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi + @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi + @if [ ! -d ${INSTALL_S3IP_CONFIG_DIR} ]; then mkdir -p ${INSTALL_S3IP_CONFIG_DIR} ;fi + @if [ -d $(PWD)/s3ip_config/ ]; then cp -r $(PWD)/s3ip_config/* ${INSTALL_S3IP_CONFIG_DIR} ;fi + @if [ ! -d ${INSTALL_S3IP_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi + @if [ -d $(PWD)/s3ip_sysfs_cfg/ ]; then cp -r $(PWD)/s3ip_sysfs_cfg/* ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi +clean: + rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd ${DIR_KERNEL_SRC}/*.mod + rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order + rm -rf ${DIR_KERNEL_SRC}/.tmp_versions + rm -rf $(SUB_BUILD_DIR) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py new file mode 100644 index 00000000000..0f2b3bb581e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py @@ -0,0 +1,1644 @@ +#!/usr/bin/python3 +# -*- coding: UTF-8 -*- +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 0, + "tty_console": 1, + "dev_monitor": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "reboot_cause": 1, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu1", + "present": {"gettype": "io", "io_addr": 0x958, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 42, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu1frue2", "name": "24c02", "bus": 42, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "psu2", + "present": {"gettype": "io", "io_addr": 0x958, "presentbit": 6, "okval": 0}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 43, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "24c02", "bus": 43, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + { + "name": "fan1", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "24c64", "bus": 52, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "24c64", "bus": 53, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan3", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "24c64", "bus": 54, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan4", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "24c64", "bus": 55, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"}, + ], + }, + { + "name": "lm75", + "device": [ + {"id": "lm75_1", "name": "lm75", "bus": 51, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_2", "name": "lm75", "bus": 56, "loc": 0x4e, "attr": "hwmon"}, + {"id": "lm75_3", "name": "lm75", "bus": 58, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_4", "name": "lm75", "bus": 75, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_5", "name": "lm75", "bus": 76, "loc": 0x4f, "attr": "hwmon"}, + ], + }, + { + "name":"ct7318", + "device":[ + {"id":"ct7318_1", "name":"ct7318","bus":77, "loc":0x4c, "attr":"hwmon"}, + {"id":"ct7318_2", "name":"ct7318","bus":78, "loc":0x4c, "attr":"hwmon"}, + ], + }, + { + "name": "ucd90160", + "device": [ + {"id": "ucd90160_1", "name": "ucd90160", "bus": 68, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_2", "name": "ucd90160", "bus": 69, "loc": 0x5f, "attr": "hwmon"}, + {"id": "ucd90160_3", "name": "ucd90160", "bus": 82, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_4", "name": "ucd90160", "bus": 83, "loc": 0x5b, "attr": "hwmon"}, + ], + }, + { + "name": "ucd9081", + "device": [ + {"id": "wb_ucd9081_1", "name": "wb_ucd9081", "bus": 72, "loc": 0x68, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe12284", + "device": [ + {"id": "xdpe12284_1", "name": "xdpe12284", "bus": 90, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "xdpe12284", "bus": 91, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_3", "name": "xdpe12284", "bus": 92, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_4", "name": "xdpe12284", "bus": 93, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_5", "name": "xdpe12284", "bus": 94, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_6", "name": "xdpe12284", "bus": 95, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_7", "name": "xdpe12284", "bus": 96, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_8", "name": "xdpe12284", "bus": 97, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_9", "name": "xdpe12284", "bus": 69, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_10", "name": "xdpe12284", "bus": 69, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_11", "name": "xdpe12284", "bus": 69, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_12", "name": "xdpe12284", "bus": 69, "loc": 0x68, "attr": "hwmon"}, + ], + }, + ], +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "onie" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "onie": { + "key": "ONIE", + "next": "cpu" + }, + "onie_date": { + "parent": "onie", + "key": "Build Date", + "file": "/host/machine.conf", + "pattern": r"^onie_build_date", + "separator": "=", + "arrt_index": 1, + }, + "onie_version": { + "parent": "onie", + "key": "Version", + "file": "/host/machine.conf", + "pattern": r"^onie_version", + "separator": "=", + "arrt_index": 2, + }, + + "cpu": { + "key": "CPU", + "next": "ssd" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + "ssd": { + "key": "SSD", + "next": "cpld" + }, + "ssd_model": { + "parent": "ssd", + "key": "Device Model", + "cmd": "smartctl -i /dev/sda |grep \"Device Model\"", + "pattern": r".*Device Model", + "separator": ":", + "arrt_index": 1, + }, + "ssd_fw": { + "parent": "ssd", + "key": "Firmware Version", + "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"", + "pattern": r".*Firmware Version", + "separator": ":", + "arrt_index": 2, + }, + "ssd_user_cap": { + "parent": "ssd", + "key": "User Capacity", + "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"", + "pattern": r".*User Capacity", + "separator": ":", + "arrt_index": 3, + }, + + "cpld": { + "key": "CPLD", + "next": "psu" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU_CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "devfile": { + "loc": "/dev/cpld0", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "CONNECT_CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "devfile": { + "loc": "/dev/cpld1", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-4300C-6BG256C", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MAC_CPLDA", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "devfile": { + "loc": "/dev/cpld6", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "MAC_CPLDB", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "devfile": { + "loc": "/dev/cpld7", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "MAC_CPLDC", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "devfile": { + "loc": "/dev/cpld8", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld6": { + "key": "CPLD6", + "parent": "cpld", + "arrt_index": 6, + }, + "cpld6_model": { + "key": "Device Model", + "parent": "cpld6", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld6_vender": { + "key": "Vendor", + "parent": "cpld6", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld6_desc": { + "key": "Description", + "parent": "cpld6", + "config": "MGMT_CPLD", + "arrt_index": 3, + }, + "cpld6_version": { + "key": "Firmware Version", + "parent": "cpld6", + "devfile": { + "loc": "/dev/cpld9", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld7": { + "key": "CPLD7", + "parent": "cpld", + "arrt_index": 7, + }, + "cpld7_model": { + "key": "Device Model", + "parent": "cpld7", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld7_vender": { + "key": "Vendor", + "parent": "cpld7", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld7_desc": { + "key": "Description", + "parent": "cpld7", + "config": "FAN_CPLD", + "arrt_index": 3, + }, + "cpld7_version": { + "key": "Firmware Version", + "parent": "cpld7", + "devfile": { + "loc": "/dev/cpld10", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu1": { + "parent": "psu", + "key": "PSU1", + "arrt_index": 1, + }, + "psu1_hw_version": { + "key": "Hardware Version", + "parent": "psu1", + "extra": { + "funcname": "getPsu", + "id": "psu1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu1_fw_version": { + "key": "Firmware Version", + "parent": "psu1", + "config": "NA", + "arrt_index": 2, + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + "next": "i210" + }, + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "i210": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "i210", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "i210", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "i210", + "cmd": "ethtool -i eth0", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + + "fpga": { + "key": "FPGA", + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "config": "XC7A50T-2FGG484I", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "MAC_FPGA", + "arrt_index": 3, + }, + "fpga1_hw_version": { + "parent": "fpga1", + "config": "NA", + "key": "Hardware Version", + "arrt_index": 4, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "pci": { + "bus": 6, + "slot": 0, + "fn": 0, + "bar": 0, + "offset": 0 + }, + "key": "Firmware Version", + "arrt_index": 5, + }, + "fpga1_date": { + "parent": "fpga1", + "pci": { + "bus": 6, + "slot": 0, + "fn": 0, + "bar": 0, + "offset": 4 + }, + "key": "Build Date", + "arrt_index": 6, + }, + + "others": { + "key": "OTHERS", + }, + "53134": { + "parent": "others", + "key": "CPU-BMC-SWITCH", + "arrt_index": 1, + }, + "53134_model": { + "parent": "53134", + "config": "BCM53134O", + "key": "Device Model", + "arrt_index": 1, + }, + "53134_vendor": { + "parent": "53134", + "config": "Broadcom", + "key": "Vendor", + "arrt_index": 2, + }, + "53134_hw_version": { + "parent": "53134", + "key": "Hardware Version", + "func": { + "funcname": "get_bcm5387_version", + "params": { + "before": [ + # OE high + {"gettype": "cmd", "cmd": "echo 323 > /sys/class/gpio/export"}, + {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio323/direction"}, + # SEL1 high + {"gettype": "cmd", "cmd": "echo 324 > /sys/class/gpio/export"}, + {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio324/direction"}, + #enable 53134 update + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x00}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x45, "value": 0x01}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x46, "value": 0x06}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=55 mosi=54 miso=52 cs=53 bus=0 gpio_chip_name=INTC3001:00"}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46"}, + ], + "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'", + "after": [ + {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio324/value"}, + {"gettype": "cmd", "cmd": "echo 324 > /sys/class/gpio/unexport"}, + {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio323/value"}, + {"gettype": "cmd", "cmd": "echo 323 > /sys/class/gpio/unexport"}, + ], + "finally": [ + {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"}, + {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio_device"}, + {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x46, "value": 0x00}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x45, "value": 0x00}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x01}, + ], + }, + }, + "arrt_index": 3, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "sffs": { + "present": {"path": ["/sys/s3ip/transceiver/*/present"], "ABSENT": 0}, + "nochangedmsgflag": 0, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 1, + "alias": { + "sff1": "Ethernet1", + "sff2": "Ethernet2", + "sff3": "Ethernet3", + "sff4": "Ethernet4", + "sff5": "Ethernet5", + "sff6": "Ethernet6", + "sff7": "Ethernet7", + "sff8": "Ethernet8", + "sff9": "Ethernet9", + "sff10": "Ethernet10", + "sff11": "Ethernet11", + "sff12": "Ethernet12", + "sff13": "Ethernet13", + "sff14": "Ethernet14", + "sff15": "Ethernet15", + "sff16": "Ethernet16", + "sff17": "Ethernet17", + "sff18": "Ethernet18", + "sff19": "Ethernet19", + "sff20": "Ethernet20", + "sff21": "Ethernet21", + "sff22": "Ethernet22", + "sff23": "Ethernet23", + "sff24": "Ethernet24", + "sff25": "Ethernet25", + "sff26": "Ethernet26", + "sff27": "Ethernet27", + "sff28": "Ethernet28", + "sff29": "Ethernet29", + "sff30": "Ethernet30", + "sff31": "Ethernet31", + "sff32": "Ethernet32", + "sff33": "Ethernet33", + "sff34": "Ethernet34", + "sff35": "Ethernet35", + "sff36": "Ethernet36", + "sff37": "Ethernet37", + "sff38": "Ethernet38", + "sff39": "Ethernet39", + "sff40": "Ethernet40", + "sff41": "Ethernet41", + "sff42": "Ethernet42", + "sff43": "Ethernet43", + "sff44": "Ethernet44", + "sff45": "Ethernet45", + "sff46": "Ethernet46", + "sff47": "Ethernet47", + "sff48": "Ethernet48", + "sff49": "Ethernet49", + "sff50": "Ethernet50", + "sff51": "Ethernet51", + "sff52": "Ethernet52", + "sff53": "Ethernet53", + "sff54": "Ethernet54", + "sff55": "Ethernet55", + "sff56": "Ethernet56", + "sff57": "Ethernet57", + "sff58": "Ethernet58", + "sff59": "Ethernet59", + "sff60": "Ethernet60", + "sff61": "Ethernet61", + "sff62": "Ethernet62", + "sff63": "Ethernet63", + "sff64": "Ethernet64", + "sff65": "Ethernet65", + "sff66": "Ethernet66", + } + }, + "fans": { + "present": {"path": ["/sys/s3ip/fan/*/status"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/fan/%s/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4" + } + }, + "psus": { + "present": {"path": ["/sys/s3ip/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/psu/%s/out_status", "okval":1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2" + } + } +} + +REBOOT_CTRL_PARAM = { + "cpu": {"path":"/dev/cpld1", "offset":0x17, "rst_val":0xfd, "rst_delay":0, "gettype":"devfile"}, + "mac": [ + {"gettype": "cmd", "cmd": "setpci -s 14:02.0 0x50.W=0x0050", "rst_delay":0.1}, + {"path":"/dev/cpld6", "offset":0x16, "rst_val":0x00, "rst_delay":1, "gettype": "devfile"}, + {"path":"/dev/cpld6", "offset":0x16, "rst_val":0x01, "rst_delay":0, "gettype": "devfile"}, + {"gettype": "cmd", "cmd": "setpci -s 14:02.0 0x50.W=0x0060", "rst_delay":0.1}, + ], + "phy": {"path":"/dev/cpld1", "offset":0x18, "rst_val":0x1e, "rst_delay":0, "gettype":"devfile"}, + "power": [ + {"bus": 42, "loc": 0x58, "offset": 0x02, "rst_val": 0x48, "rst_delay":0.1, "gettype": "i2c"}, + {"bus": 42, "loc": 0x58, "offset": 0x01, "rst_val": 0x40, "rst_delay":0.1, "gettype": "i2c"}, + {"bus": 43, "loc": 0x58, "offset": 0x02, "rst_val": 0x48, "rst_delay":0.1, "gettype": "i2c"}, + {"bus": 43, "loc": 0x58, "offset": 0x01, "rst_val": 0x40, "rst_delay":0.1, "gettype": "i2c"}, + ], + +} + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "cold_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x09}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Power Loss, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Power Loss, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ] + }, + { + "name": "wdt_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x05}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Watchdog, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Watchdog, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "bmc_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x06}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "cpu_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":[0x03, 0x04]}, + "record": [ + {"record_type":"file", "mode":"cover", "log":"CPU reboot, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "CPU reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "bmc_powerdown", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":[0x02, 0x07, 0x0a]}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default": 0x82, # default value, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"path": "/dev/cpld6", "offset": 0x30, "read_len": 1, "gettype": "devfile"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/84-0040/avs0_vout_command", "gettype": "sysfs", "formula": None}, + "mac_avs_param": { + 0x92: 0xBF4, + 0x90: 0xC29, + 0x8e: 0xC56, + 0x8c: 0xC8B, + 0x8a: 0xCBD, + 0x88: 0xCEA, + 0x86: 0xD14, + 0x84: 0xD44, + 0x82: 0xD71 + } + } +] + +DRIVERLISTS = [ + {"name": "i2c_i801", "delay": 1}, + {"name": "i2c_dev", "delay": 0}, + {"name": "i2c_algo_bit", "delay": 0}, + {"name": "i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40d7", "delay": 0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_indirect_dev", "delay": 0}, + {"name": "wb_indirect_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_spi_dev", "delay": 0}, + {"name": "wb_fpga_i2c_bus_drv", "delay": 0}, + {"name": "wb_fpga_i2c_bus_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device", "delay": 0}, + {"name": "wb_fpga_pca954x_drv", "delay": 0}, + {"name": "wb_fpga_pca954x_device", "delay": 0}, + {"name": "wb_i2c_dev_device", "delay": 0}, + {"name": "mdio_bitbang", "delay": 0}, + {"name": "mdio_gpio", "delay": 0}, + {"name": "wb_mdio_gpio_device gpio_mdc=69 gpio_mdio=70 gpio_chip_name=INTC3001:00", "delay": 0}, + {"name": "wb_wdt", "delay": 0}, + {"name": "wb_wdt_device", "delay": 0}, + {"name": "lm75", "delay": 0}, + {"name": "tmp401", "delay": 0}, + {"name": "ct7148", "delay": 0}, + {"name": "optoe", "delay": 0}, + {"name": "at24", "delay": 0}, + {"name": "pmbus_core", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, + {"name": "ina3221", "delay": 0}, + {"name": "tps53679", "delay": 0}, + {"name": "ucd9000", "delay": 0}, + {"name": "wb_ucd9081", "delay": 0}, + {"name": "xdpe12284", "delay": 0}, + {"name": "wb_xdpe132g5c_pmbus", "delay":0}, + {"name": "wb_xdpe132g5c", "delay": 0}, + {"name": "plat_dfd", "delay": 0}, + {"name": "plat_switch", "delay": 0}, + {"name": "plat_fan", "delay": 0}, + {"name": "plat_psu", "delay": 0}, + {"name": "plat_sff", "delay": 0}, + {"name": "hw_test", "delay": 0}, + + {"name": "s3ip_sysfs", "delay": 0}, + {"name": "wb_switch_driver", "delay": 0}, + {"name": "syseeprom_device_driver", "delay": 0}, + {"name": "fan_device_driver", "delay": 0}, + {"name": "cpld_device_driver", "delay": 0}, + {"name": "sysled_device_driver", "delay": 0}, + {"name": "psu_device_driver", "delay": 0}, + {"name": "transceiver_device_driver", "delay": 0}, + {"name": "temp_sensor_device_driver", "delay": 0}, + {"name": "vol_sensor_device_driver", "delay": 0}, + {"name": "curr_sensor_device_driver", "delay": 0}, + {"name": "fpga_device_driver", "delay": 0}, + {"name": "watchdog_device_driver", "delay": 0}, +] + +DEVICE = [ + {"name": "24c02", "bus": 1, "loc": 0x56}, + {"name": "24c02", "bus": 57, "loc": 0x57}, + {"name": "24c02", "bus": 61, "loc": 0x57}, + {"name": "24c02", "bus": 66, "loc": 0x57}, + # fan + {"name": "24c64", "bus": 52, "loc": 0x50}, + {"name": "24c64", "bus": 53, "loc": 0x50}, + {"name": "24c64", "bus": 54, "loc": 0x50}, + {"name": "24c64", "bus": 55, "loc": 0x50}, + # psu + {"name": "24c02", "bus": 42, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 42, "loc": 0x58}, + {"name": "24c02", "bus": 43, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 43, "loc": 0x58}, + # temp + {"name": "lm75", "bus": 51, "loc": 0x4b}, + {"name": "lm75", "bus": 56, "loc": 0x4e}, + {"name": "lm75", "bus": 58, "loc": 0x4b}, + {"name": "lm75", "bus": 75, "loc": 0x4b}, + {"name": "lm75", "bus": 76, "loc": 0x4f}, + {"name": "ct7318", "bus": 77, "loc": 0x4c}, + {"name": "ct7318", "bus": 78, "loc": 0x4c}, + #dcdc + {"name": "ucd90160", "bus": 68, "loc": 0x5b}, + {"name": "ucd90160", "bus": 69, "loc": 0x5f}, + {"name": "xdpe12284", "bus": 69, "loc": 0x70}, + {"name": "xdpe12284", "bus": 69, "loc": 0x6e}, + {"name": "xdpe12284", "bus": 69, "loc": 0x5e}, + {"name": "xdpe12284", "bus": 69, "loc": 0x68}, + {"name": "wb_ucd9081", "bus": 72, "loc": 0x68}, + {"name": "wb_ucd90160", "bus": 82, "loc": 0x5b}, + {"name": "wb_ucd90160", "bus": 83, "loc": 0x5b}, + {"name": "xdpe12284", "bus": 90, "loc": 0x70}, + {"name": "xdpe12284", "bus": 91, "loc": 0x70}, + {"name": "xdpe12284", "bus": 92, "loc": 0x70}, + {"name": "xdpe12284", "bus": 93, "loc": 0x70}, + {"name": "xdpe12284", "bus": 94, "loc": 0x70}, + {"name": "xdpe12284", "bus": 95, "loc": 0x70}, + {"name": "xdpe12284", "bus": 96, "loc": 0x70}, + {"name": "xdpe12284", "bus": 97, "loc": 0x70}, + #avs + {"name": "wb_xdpe132g5c_pmbus", "bus": 84, "loc": 0x40}, + {"name": "wb_xdpe132g5c", "bus": 84, "loc": 0x10}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 85, "loc": 0x4d}, + {"name": "wb_xdpe132g5c", "bus": 85, "loc": 0x1d}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 86, "loc": 0x4d}, + {"name": "wb_xdpe132g5c", "bus": 86, "loc": 0x1d}, +] + +OPTOE = [ + {"name": "optoe2", "startbus": 59, "endbus": 60}, + {"name": "optoe3", "startbus": 106, "endbus": 169}, +] + + +INIT_PARAM = [] + +INIT_COMMAND_PRE = [] + +INIT_COMMAND = [ + # open X86 BMC Serial port + "dfd_debug sysfs_data_wr /dev/cpld1 0x41 0x01", + # enable stream light + "dfd_debug sysfs_data_wr /dev/cpld6 0xef 0x01", + "dfd_debug sysfs_data_wr /dev/cpld7 0xef 0x01", + "dfd_debug sysfs_data_wr /dev/cpld8 0x80 0xff", + "dfd_debug sysfs_data_wr /dev/cpld8 0x81 0xff", + # KR power_on + "dfd_debug sysfs_data_wr /dev/cpld9 0x80 0x03", + # KR tx-disable enable + "dfd_debug sysfs_data_wr /dev/cpld9 0x58 0x00", + ] + +WARM_UPGRADE_PARAM = { + "slot0": { + "VME": { + "chain1": [ + { + "name": "BASE_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/base_cpld_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcb, "value": 0x01, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3b, "value": 0x00, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x36, "value": 0x2c, "delay": 0.1}, #bmc_ready + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x17, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x19, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x1b, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x1c, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x23, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x25, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x2b, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x2c, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x2d, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x31, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x32, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x33, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x36, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x38, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3e, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3f, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x40, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x41, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x43, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x44, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x45, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x57, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x5a, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x65, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x66, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x67, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x72, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x73, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x74, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x75, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x90, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x91, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x92, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x93, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x94, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x95, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb6, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb7, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb8, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xba, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xbb, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xbc, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc6, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc7, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd8, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe6, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe7, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe8, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 180, + "access_check_reg": {"skip": 1}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3b, "value": 0x03,"delay": 20}, #after bmc_ready delay time + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcb, "value": 0x00, "delay": 0.1}, + ], + }, + ], + "chain2": [ + { + "name": "MAC_CPLD_A", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/mac_cplda_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x01, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x28, "value": 0x00, "delay": 0.1}, + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x24, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x25, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x72, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x76, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x77, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x78, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd6, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd7, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd8, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd9, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xda, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xdb, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xe0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xe1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xef, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"skip": 1}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x28, "value": 0x01, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1}, + ], + }, + { + "name": "MAC_CPLD_B", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/mac_cpldb_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x02, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x28, "value": 0x00, "delay": 0.1}, + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x72, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x73, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x74, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x80, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x81, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x82, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x83, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x84, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd4, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd5, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd6, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd7, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd8, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd9, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xda, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xdb, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xdc, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xde, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xdf, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe3, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xef, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"skip": 1}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x28, "value": 0x01, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1}, + ], + } + ], + "chain3": [ + { + "name": "MAC_CPLD_C", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/mac_cpldc_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x04, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x46, "value": 0x00, "delay": 0.1}, + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x13, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x14, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x15, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x16, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x17, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x1a, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x20, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x32, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x33, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x4a, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x4b, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x52, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x59, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x62, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x63, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x80, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x81, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"skip": 1}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x46, "value": 0x01, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1}, + ], + } + ], + "chain4": [ + { + "name": "FAN_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/fan_cpld_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x08, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x40, "value": 0x00, "delay": 0.1}, + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x20, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x22, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x31, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x53, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x56, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x58, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x90, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x91, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x92, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x93, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd0, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd1, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"skip": 1}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x40, "value": 0x00, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1}, + ], + } + ], + "chain5": [ + { + "name": "MGMT_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/mgmt_cpld_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x10, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x1c, "value": 0x00, "delay": 0.1}, + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x24, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x30, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x40, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x58, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x80, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0xa8, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0xba, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 30, + "access_check_reg": {"skip": 1}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x1c, "value": 0x01, "delay": 1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1}, + ], + } + ], + "chain6": [ + { + "name": "CPU_CPLD", + "refresh_file_judge_flag": 1, + "refresh_file": "/etc/.cpld_refresh/cpu_cpld_refresh_header.vme", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"cmd": "echo 497 > /sys/class/gpio/export", "gettype": "cmd"}, + {"cmd": "echo out > /sys/class/gpio/gpio497/direction", "gettype": "cmd"}, + {"cmd": "echo 1 > /sys/class/gpio/gpio497/value", "gettype": "cmd"}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcc, "value": 0x01, "delay": 0.1}, + ], + "rw_recover_reg": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x17, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x41, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x51, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x52, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x53, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x54, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x60, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x61, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x62, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x74, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x81, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x82, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x83, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x84, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x85, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x86, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x87, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x88, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x89, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x8a, "read_len": 1, "value": None, "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcb, "read_len": 1, "value": None, "delay": 0.1}, + ], + "after_upgrade_delay": 1, + "after_upgrade_delay_timeout": 180, + "access_check_reg": {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x10, "read_len": 1, "value": 0x36, "okval": 0xff}, + "finish_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcc, "value": 0x00, "delay": 0.1}, + {"cmd": "echo 0 > /sys/class/gpio/gpio497/value", "gettype": "cmd"}, + {"cmd": "echo 497 > /sys/class/gpio/unexport", "gettype": "cmd"}, + ], + }, + ], + }, + "SPI-LOGIC-DEV": { + "chain1": [ + {"name": "MAC_FPGA", + "init_cmd": [ + {"file": WARM_UPG_FLAG, "gettype": "creat_file"}, + {"cmd": "setpci -s 00:12.0 0x114.W=0xffff", "gettype": "cmd"}, + {"cmd": "setpci -s 00:12.0 0x50.W=0x0050", "gettype": "cmd"}, # link_disable + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc6, "value": 0x00}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc6, "value": 0x01, "delay": 1}, + ], + "after_upgrade_delay": 10, + "after_upgrade_delay_timeout": 10, + "refresh_finish_flag_check": {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x63, "value": 0x01, "read_len": 1}, + "access_check_reg": { + "path": "/dev/fpga0", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len": 4, "gettype": "devfile", + "polling_cmd": [ + {"cmd": "setpci -s 00:12.0 0x50.W=0x0060", "gettype": "cmd", "delay": 1}, # retrain_link + {"cmd": "setpci -s 00:12.0 0x52.w", "gettype": "cmd", "okval": 0x12, + "timeout": 10, "mask": 0xff}, # check link status + {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd", "delay": 0.1}, + {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 2}, + ], + "polling_delay": 0.1 + }, + "finish_cmd": [ + {"cmd": "setpci -s 00:12.0 0x50.W=0x0060", "gettype": "cmd"}, # retrain_link + {"cmd": "setpci -s 00:12.0 0x110.W=0xffff", "gettype": "cmd"}, + {"cmd": "setpci -s 00:12.0 0x114.W=0x0000", "gettype": "cmd"}, + {"file": WARM_UPG_FLAG, "gettype": "remove_file"}, + ], + }, + ] + }, + }, + "stop_services_cmd": [ + "/usr/local/bin/platform_process.py stop", + ], + "start_services_cmd": [ + "/usr/local/bin/platform_process.py start", + ], +} + +UPGRADE_SUMMARY = { + "devtype": 0x40d7, + + "slot0": { + "subtype": 0, + "VME": { + "chain1": { + "name": "BASE_CPLD", + "is_support_warm_upg": 1, + }, + "chain2": { + "name": "MAC_CPLDAB", + "is_support_warm_upg": 1, + }, + "chain3": { + "name": "MAC_CPLDC", + "is_support_warm_upg": 1, + }, + "chain4": { + "name": "FAN_CPLD", + "is_support_warm_upg": 1, + }, + "chain5": { + "name": "MGMT_CPLD", + "is_support_warm_upg": 1, + }, + "chain6": { + "name": "CPU_CPLD", + "is_support_warm_upg": 1, + }, + }, + + "SPI-LOGIC-DEV": { + "chain1": { + "name": "MAC_FPGA", + "is_support_warm_upg": 1, + } + }, + + "SYSFS": { + "chain2": { + "name": "BCM53134", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x00, "delay": 0.1}, + {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_gpio_device sck=55 mosi=54 miso=52 cs=53 bus=0 gpio_chip_name=INTC3001:00", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_93xx46", "gettype": "cmd", "delay": 0.1}, + ], + "finish_cmd": [ + {"cmd": "rmmod wb_spi_93xx46", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x01, "delay": 0.1}, + ], + }, + }, + + "MTD": { + "chain4": { + "name": "BIOS", + "filesizecheck": 20480, # bios check file size, Unit: K + "is_support_warm_upg": 0, + "init_cmd": [ + {"cmd": "modprobe mtd", "gettype": "cmd"}, + {"cmd": "modprobe spi_nor", "gettype": "cmd"}, + {"cmd": "modprobe ofpart", "gettype": "cmd"}, + {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"}, + {"cmd": "modprobe intel_spi_pci", "gettype": "cmd"}, + ], + "finish_cmd": [ + {"cmd": "rmmod intel_spi_pci", "gettype": "cmd"}, + {"cmd": "rmmod intel_spi", "gettype": "cmd"}, + {"cmd": "rmmod ofpart", "gettype": "cmd"}, + {"cmd": "rmmod spi_nor", "gettype": "cmd"}, + {"cmd": "rmmod mtd", "gettype": "cmd"}, + ], + }, + }, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/fpga_test_header.bin", "display_name": "MAC_FPGA"}, + ], + "cpld": [ + {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_0_1_header.vme", "display_name": "BASE_CPLD"}, + {"chain": 2, "file": "/etc/.upgrade_test/cpld_test_0_2_header.vme", "display_name": "MAC_CPLDAB"}, + {"chain": 3, "file": "/etc/.upgrade_test/cpld_test_0_3_header.vme", "display_name": "MAC_CPLDC"}, + {"chain": 4, "file": "/etc/.upgrade_test/cpld_test_0_4_header.vme", "display_name": "FAN_CPLD"}, + {"chain": 5, "file": "/etc/.upgrade_test/cpld_test_0_5_header.vme", "display_name": "MGMT_CPLD"}, + {"chain": 6, "file": "/etc/.upgrade_test/cpld_test_0_6_header.vme", "display_name": "CPU_CPLD"}, + ], + }, + }, +} + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/52-0050/eeprom"}, + {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/53-0050/eeprom"}, + {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/54-0050/eeprom"}, + {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/55-0050/eeprom"}, + ], + "psu": [ + {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom"}, + {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/43-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, + ], +} + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_port_config.py new file mode 100644 index 00000000000..f65317aab67 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_port_config.py @@ -0,0 +1,74 @@ +#!/usr/bin/python3 +# -*- coding: UTF-8 -*- + +PLATFORM_INTF_OPTOE = { + "port_num": 66, + "port_bus_map": { + 1: 106, + 2: 107, + 3: 108, + 4: 109, + 5: 110, + 6: 111, + 7: 112, + 8: 113, + 9: 114, + 10: 115, + 11: 116, + 12: 117, + 13: 118, + 14: 119, + 15: 120, + 16: 121, + 17: 122, + 18: 123, + 19: 124, + 20: 125, + 21: 126, + 22: 127, + 23: 128, + 24: 129, + 25: 130, + 26: 131, + 27: 132, + 28: 133, + 29: 134, + 30: 135, + 31: 136, + 32: 137, + 33: 138, + 34: 139, + 35: 140, + 36: 141, + 37: 142, + 38: 143, + 39: 144, + 40: 145, + 41: 146, + 42: 147, + 43: 148, + 44: 149, + 45: 150, + 46: 151, + 47: 152, + 48: 153, + 49: 154, + 50: 155, + 51: 156, + 52: 157, + 53: 158, + 54: 159, + 55: 160, + 56: 161, + 57: 162, + 58: 163, + 59: 164, + 60: 165, + 61: 166, + 62: 167, + 63: 168, + 64: 169, + 65: 60, + 66: 59, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py new file mode 100644 index 00000000000..81a53b11f6f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py @@ -0,0 +1,756 @@ +#!/usr/bin/python3 + +psu_fan_airflow = { + "intake": ['CRPS3000CL', 'ECDL3000123'], + "exhaust": [] +} + +fanairflow = { + "intake": ['FAN80-02-F'], + "exhaust": [], +} + +psu_display_name = { + "PA3000I-F": ['CRPS3000CL', 'ECDL3000123'], +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + + +class threshold: + PSU_TEMP_MIN = -20 * 1000 + PSU_TEMP_MAX = 65 * 1000 + + PSU_FAN_SPEED_MIN = 3500 + PSU_FAN_SPEED_MAX = 23500 + PSU_A_FAN_SPEED_MAX = 39000 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 0* 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 3100* 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 0 * 1000 + PSU_OUTPUT_CURRENT_MAX = 246 * 1000 + + PSU_INPUT_CURRENT_MIN = 0 * 1000 + PSU_INPUT_CURRENT_MAX = 20 * 1000 + + FRONT_FAN_SPEED_MAX = 18000 + REAR_FAN_SPEED_MAX = 16000 + FAN_SPEED_MIN = 3200 + + +devices = { + "sensor_print_src": "s3ip", + + "dcdc_data_source": [ + { + "path": "/sys/s3ip/vol_sensor", + "type": "vol", + "Unit": Unit.Voltage, + "read_times": 3, + }, + { + "path": "/sys/s3ip/curr_sensor", + "type": "curr", + "Unit": Unit.Current, + "read_times": 3, + }, + ], + "temp_data_source": [ + { + "path": "/sys/s3ip/temp_sensor", + "type": "temp", + "Unit": Unit.Temperature, + }, + ], + + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/42-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 42, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": { + "ECDL3000123": threshold.PSU_FAN_SPEED_MAX, + "CRPS3000CL": threshold.PSU_A_FAN_SPEED_MAX, + }, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 42, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/43-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 43, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": { + "ECDL3000123": threshold.PSU_FAN_SPEED_MAX, + "CRPS3000CL": threshold.PSU_A_FAN_SPEED_MAX, + }, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 43, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + } + ], + "temps": [ + { + "name": "BOARD_TEMP", + "temp_id": "TEMP1", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp13/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp14/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp15/value", "way": "sysfs"}, + ], + "Min": -10000, + "Low": 0, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "CPU_TEMP", + "temp_id": "TEMP2", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -15000, + "Low": 10000, + "High": 98000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP3", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp10/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 0, + "High": 40000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP4", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp11/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp12/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 0, + "High": 70000, + "Max": 80000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp17/value", "way": "sysfs"}, + "Min": -30000, + "Low": 10000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU1_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "MOS_TEMP", + "temp_id": "TEMP8", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp18/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp19/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp20/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 10000, + "High": 100000, + "Max":125000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SFF_TEMP", + "Temperature": { + "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"}, + "Min": -15000, + "Low": 0, + "High": 80000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0xd2, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07 + }, + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0xd3, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07 + }, + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0xd4, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07 + }, + }, + ], + "fans": [ + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-52/52-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan1/status", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd0, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x90, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x90, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-53/53-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan2/status", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd1, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x91, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x91, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-54/54-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan3/status", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd2, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x92, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x92, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-55/55-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan4/status", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd3, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x93, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0x93, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU_CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 1, + }, + { + "name": "CONNECT_CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDA", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDB", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld7", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDC", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld8", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MGMT_CPLD", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld9", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "FAN_CPLD", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/cpld10", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_FPGA", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 1, + }, + { + "name": "BIOS", + "cpld_id": "CPLD9", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "cpu": [ + { + "name": "cpu", + "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x10, "len": 1, "way": "devfile_ascii"}, + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '1.0', + "port_index_start": 0, + "port_num": 66, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_cpld": { + "dev_id": { + 6: { + "offset": { + 0x73: "17-24", + 0x74: "9-16", + 0x75: "1-8", + }, + }, + 7: { + "offset": { + 0x76: "57-64", + 0x77: "49-56", + 0x78: "41-48", + 0x79: "33-40", + 0x7a: "25-32", + }, + }, + 9: { + "offset": { + 0x69: "65-66", + }, + }, + }, + }, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": list(range(106, 170)) + [59, 60], + "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class", + "optoe_driver_key": list(range(106, 170)) + [59, 60], + "reset_cpld": { + "dev_id": { + 6: { + "offset": { + 0x70: "17-24", + 0x71: "9-16", + 0x72: "1-8", + }, + }, + 7: { + "offset": { + 0x70: "57-64", + 0x71: "49-56", + 0x72: "41-48", + 0x73: "33-40", + 0x74: "25-32", + }, + }, + }, + }, + "reset_val_is_reset": 0, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py new file mode 100644 index 00000000000..4e95787950f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py @@ -0,0 +1,158 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x80, + "pwm_max": 0xff, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x80, + "pwm_max": 0xff, + "a": -0.38, + "b": 33.68, + "c": -476, + "tin_min": 27, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 1.5, + "Ki": 0.3, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 90, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "MOS_TEMP": { + "name": "MOS_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 1, + "Ki": 0.1, + "Kd": 0.3, + "target": 97, + "value": [None, None, None], + }, + "SFF_TEMP": { + "name": "SFF_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x80, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.3, + "Kd": 0, + "target": 65, + "value": [None, None, None], + }, + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 50, "critical": 55, "fix": -2}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 90, "critical": 95}, + "MOS_TEMP": {"name": "MOS_TEMP", "warning": 100, "critical": 125}, + "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 95, "critical": 100}, + "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999}, + }, + + "fancontrol_para": { + "interval": 5, + "max_pwm": 0xff, + "min_pwm": 0x80, + "abnormal_pwm": 0xff, + "warning_pwm": 0xff, + "temp_invalid_pid_pwm": 0x80, + "temp_error_pid_pwm": 0x80, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + {"temp_name": "MOS_TEMP"}, + {"temp_name": "OUTLET_TEMP"}, + {"temp_name": "BOARD_TEMP"}, + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_fan_control": 1, + "psu_absent_fullspeed_num": 0xFF, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + "deal_all_fan_error_method_flag": 1, + "all_fan_error_switch_temp_critical_temp": 80, + "all_fan_error_recover_log": "Power off base and mac board.", + "all_fan_error_recover_cmd": "dfd_debug io_wr 0x93a 0x01", + "all_fan_error_check_crit_reboot_num": 3, + "all_fan_error_check_crit_sleep_time": 2, + }, + + "ledcontrol_para": { + "interval":5, + "checkpsu": 0, # 0: sys led don't follow psu led + "checkfan": 0, # 0: sys led don't follow fan led + "psu_amber_num": 1, + "fan_amber_num": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + }, + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile new file mode 100644 index 00000000000..8c39927af73 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile @@ -0,0 +1,13 @@ +MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST))) +MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules) + +EXTRA_CFLAGS+= -I$(MODULES_DIR) + +obj-m += wb_pcie_dev_device.o +obj-m += wb_io_dev_device.o +obj-m += wb_fpga_i2c_bus_device.o +obj-m += wb_i2c_mux_pca954x_device.o +obj-m += wb_fpga_pca954x_device.o +obj-m += wb_i2c_dev_device.o +obj-m += wb_wdt_device.o +obj-m += wb_indirect_dev_device.o diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_i2c_bus_device.c new file mode 100644 index 00000000000..60fde91c510 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_i2c_bus_device.c @@ -0,0 +1,1101 @@ +/* + * An wb_fpga_i2c_bus_device driver for fpga i2c device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_fpga_i2c_debug = 0; +static int g_wb_fpga_i2c_error = 0; + +module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR); + +#define WB_FPGA_I2C_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_fpga_i2c_debug) { \ + printk(KERN_INFO "[WB_FPGA_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_FPGA_I2C_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_fpga_i2c_error) { \ + printk(KERN_ERR "[WB_FPGA_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* CPLD-I2C-MASTER-1 */ +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data0 = { + .adap_nr = 2, + .i2c_timeout = 3000, + .i2c_scale = 0x00, + .i2c_filter = 0x04, + .i2c_stretch = 0x08, + .i2c_ext_9548_exits_flag = 0x0c, + .i2c_ext_9548_addr = 0x10, + .i2c_ext_9548_chan = 0x14, + .i2c_in_9548_chan = 0x18, + .i2c_slave = 0x1c, + .i2c_reg = 0x20, + .i2c_reg_len = 0x30, + .i2c_data_len = 0x34, + .i2c_ctrl = 0x38, + .i2c_status = 0x3c, + .i2c_err_vec = 0x48, + .i2c_data_buf = 0x100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/cpld2", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 6, + .i2c_adap_reset_flag = 0, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +/* CPLD-I2C-MASTER-4 */ +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data1 = { + .adap_nr = 3, + .i2c_timeout = 3000, + .i2c_scale = 0x00, + .i2c_filter = 0x04, + .i2c_stretch = 0x08, + .i2c_ext_9548_exits_flag = 0x0c, + .i2c_ext_9548_addr = 0x10, + .i2c_ext_9548_chan = 0x14, + .i2c_in_9548_chan = 0x18, + .i2c_slave = 0x1c, + .i2c_reg = 0x20, + .i2c_reg_len = 0x30, + .i2c_data_len = 0x34, + .i2c_ctrl = 0x38, + .i2c_status = 0x3c, + .i2c_err_vec = 0x48, + .i2c_data_buf = 0x100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/cpld5", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 6, + .i2c_adap_reset_flag = 0, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +/* CPLD-I2C-MASTER-2 */ +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data2 = { + .adap_nr = 4, + .i2c_timeout = 3000, + .i2c_scale = 0x00, + .i2c_filter = 0x04, + .i2c_stretch = 0x08, + .i2c_ext_9548_exits_flag = 0x0c, + .i2c_ext_9548_addr = 0x10, + .i2c_ext_9548_chan = 0x14, + .i2c_in_9548_chan = 0x18, + .i2c_slave = 0x1c, + .i2c_reg = 0x20, + .i2c_reg_len = 0x30, + .i2c_data_len = 0x34, + .i2c_ctrl = 0x38, + .i2c_status = 0x3c, + .i2c_err_vec = 0x48, + .i2c_data_buf = 0x100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/cpld3", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 6, + .i2c_adap_reset_flag = 0, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +/* CPLD-I2C-MASTER-3 */ +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data3 = { + .adap_nr = 5, + .i2c_timeout = 3000, + .i2c_scale = 0x00, + .i2c_filter = 0x04, + .i2c_stretch = 0x08, + .i2c_ext_9548_exits_flag = 0x0c, + .i2c_ext_9548_addr = 0x10, + .i2c_ext_9548_chan = 0x14, + .i2c_in_9548_chan = 0x18, + .i2c_slave = 0x1c, + .i2c_reg = 0x20, + .i2c_reg_len = 0x30, + .i2c_data_len = 0x34, + .i2c_ctrl = 0x38, + .i2c_status = 0x3c, + .i2c_err_vec = 0x48, + .i2c_data_buf = 0x100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/cpld4", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 6, + .i2c_adap_reset_flag = 0, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data4 = { + .adap_nr = 6, + .i2c_timeout = 3000, + .i2c_scale = 0x1400, + .i2c_filter = 0x1404, + .i2c_stretch = 0x1408, + .i2c_ext_9548_exits_flag = 0x140c, + .i2c_ext_9548_addr = 0x1410, + .i2c_ext_9548_chan = 0x1414, + .i2c_in_9548_chan = 0x1418, + .i2c_slave = 0x141c, + .i2c_reg = 0x1420, + .i2c_reg_len = 0x1430, + .i2c_data_len = 0x1434, + .i2c_ctrl = 0x1438, + .i2c_status = 0x143c, + .i2c_err_vec = 0x1448, + .i2c_data_buf = 0x1480, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x4c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data5 = { + .adap_nr = 7, + .i2c_timeout = 3000, + .i2c_scale = 0x1500, + .i2c_filter = 0x1504, + .i2c_stretch = 0x1508, + .i2c_ext_9548_exits_flag = 0x150c, + .i2c_ext_9548_addr = 0x1510, + .i2c_ext_9548_chan = 0x1514, + .i2c_in_9548_chan = 0x1518, + .i2c_slave = 0x151c, + .i2c_reg = 0x1520, + .i2c_reg_len = 0x1530, + .i2c_data_len = 0x1534, + .i2c_ctrl = 0x1538, + .i2c_status = 0x153c, + .i2c_err_vec = 0x1548, + .i2c_data_buf = 0x1580, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x50, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data6 = { + .adap_nr = 8, + .i2c_timeout = 3000, + .i2c_scale = 0x1800, + .i2c_filter = 0x1804, + .i2c_stretch = 0x1808, + .i2c_ext_9548_exits_flag = 0x180c, + .i2c_ext_9548_addr = 0x1810, + .i2c_ext_9548_chan = 0x1814, + .i2c_in_9548_chan = 0x1818, + .i2c_slave = 0x181c, + .i2c_reg = 0x1820, + .i2c_reg_len = 0x1830, + .i2c_data_len = 0x1834, + .i2c_ctrl = 0x1838, + .i2c_status = 0x183c, + .i2c_err_vec = 0x1848, + .i2c_data_buf = 0x1880, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x54, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data7 = { + .adap_nr = 9, + .i2c_timeout = 3000, + .i2c_scale = 0x1900, + .i2c_filter = 0x1904, + .i2c_stretch = 0x1908, + .i2c_ext_9548_exits_flag = 0x190c, + .i2c_ext_9548_addr = 0x1910, + .i2c_ext_9548_chan = 0x1914, + .i2c_in_9548_chan = 0x1918, + .i2c_slave = 0x191c, + .i2c_reg = 0x1920, + .i2c_reg_len = 0x1930, + .i2c_data_len = 0x1934, + .i2c_ctrl = 0x1938, + .i2c_status = 0x193c, + .i2c_err_vec = 0x1948, + .i2c_data_buf = 0x1980, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x58, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data8 = { + .adap_nr = 10, + .i2c_timeout = 3000, + .i2c_scale = 0x1a00, + .i2c_filter = 0x1a04, + .i2c_stretch = 0x1a08, + .i2c_ext_9548_exits_flag = 0x1a0c, + .i2c_ext_9548_addr = 0x1a10, + .i2c_ext_9548_chan = 0x1a14, + .i2c_in_9548_chan = 0x1a18, + .i2c_slave = 0x1a1c, + .i2c_reg = 0x1a20, + .i2c_reg_len = 0x1a30, + .i2c_data_len = 0x1a34, + .i2c_ctrl = 0x1a38, + .i2c_status = 0x1a3c, + .i2c_err_vec = 0x1a48, + .i2c_data_buf = 0x1a80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data0 = { + .adap_nr = 11, + .i2c_timeout = 3000, + .i2c_scale = 0x2000, + .i2c_filter = 0x2004, + .i2c_stretch = 0x2008, + .i2c_ext_9548_exits_flag = 0x200c, + .i2c_ext_9548_addr = 0x2010, + .i2c_ext_9548_chan = 0x2014, + .i2c_in_9548_chan = 0x2018, + .i2c_slave = 0x201c, + .i2c_reg = 0x2020, + .i2c_reg_len = 0x2030, + .i2c_data_len = 0x2034, + .i2c_ctrl = 0x2038, + .i2c_status = 0x203c, + .i2c_err_vec = 0x2048, + .i2c_data_buf = 0x2080, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000002, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data1 = { + .adap_nr = 12, + .i2c_timeout = 3000, + .i2c_scale = 0x2100, + .i2c_filter = 0x2104, + .i2c_stretch = 0x2108, + .i2c_ext_9548_exits_flag = 0x210c, + .i2c_ext_9548_addr = 0x2110, + .i2c_ext_9548_chan = 0x2114, + .i2c_in_9548_chan = 0x2118, + .i2c_slave = 0x211c, + .i2c_reg = 0x2120, + .i2c_reg_len = 0x2130, + .i2c_data_len = 0x2134, + .i2c_ctrl = 0x2138, + .i2c_status = 0x213c, + .i2c_err_vec = 0x2148, + .i2c_data_buf = 0x2180, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x0000004, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data2 = { + .adap_nr = 13, + .i2c_timeout = 3000, + .i2c_scale = 0x2200, + .i2c_filter = 0x2204, + .i2c_stretch = 0x2208, + .i2c_ext_9548_exits_flag = 0x220c, + .i2c_ext_9548_addr = 0x2210, + .i2c_ext_9548_chan = 0x2214, + .i2c_in_9548_chan = 0x2218, + .i2c_slave = 0x221c, + .i2c_reg = 0x2220, + .i2c_reg_len = 0x2230, + .i2c_data_len = 0x2234, + .i2c_ctrl = 0x2238, + .i2c_status = 0x223c, + .i2c_err_vec = 0x2248, + .i2c_data_buf = 0x2280, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000008, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data3 = { + .adap_nr = 14, + .i2c_timeout = 3000, + .i2c_scale = 0x2300, + .i2c_filter = 0x2304, + .i2c_stretch = 0x2308, + .i2c_ext_9548_exits_flag = 0x230c, + .i2c_ext_9548_addr = 0x2310, + .i2c_ext_9548_chan = 0x2314, + .i2c_in_9548_chan = 0x2318, + .i2c_slave = 0x231c, + .i2c_reg = 0x2320, + .i2c_reg_len = 0x2330, + .i2c_data_len = 0x2334, + .i2c_ctrl = 0x2338, + .i2c_status = 0x233c, + .i2c_err_vec = 0x2348, + .i2c_data_buf = 0x2380, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000010, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data4 = { + .adap_nr = 15, + .i2c_timeout = 3000, + .i2c_scale = 0x2400, + .i2c_filter = 0x2404, + .i2c_stretch = 0x2408, + .i2c_ext_9548_exits_flag = 0x240c, + .i2c_ext_9548_addr = 0x2410, + .i2c_ext_9548_chan = 0x2414, + .i2c_in_9548_chan = 0x2418, + .i2c_slave = 0x241c, + .i2c_reg = 0x2420, + .i2c_reg_len = 0x2430, + .i2c_data_len = 0x2434, + .i2c_ctrl = 0x2438, + .i2c_status = 0x243c, + .i2c_err_vec = 0x2448, + .i2c_data_buf = 0x2480, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000020, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data5 = { + .adap_nr = 16, + .i2c_timeout = 3000, + .i2c_scale = 0x2500, + .i2c_filter = 0x2504, + .i2c_stretch = 0x2508, + .i2c_ext_9548_exits_flag = 0x250c, + .i2c_ext_9548_addr = 0x2510, + .i2c_ext_9548_chan = 0x2514, + .i2c_in_9548_chan = 0x2518, + .i2c_slave = 0x251c, + .i2c_reg = 0x2520, + .i2c_reg_len = 0x2530, + .i2c_data_len = 0x2534, + .i2c_ctrl = 0x2538, + .i2c_status = 0x253c, + .i2c_err_vec = 0x2548, + .i2c_data_buf = 0x2580, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000040, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data6 = { + .adap_nr = 17, + .i2c_timeout = 3000, + .i2c_scale = 0x2600, + .i2c_filter = 0x2604, + .i2c_stretch = 0x2608, + .i2c_ext_9548_exits_flag = 0x260c, + .i2c_ext_9548_addr = 0x2610, + .i2c_ext_9548_chan = 0x2614, + .i2c_in_9548_chan = 0x2618, + .i2c_slave = 0x261c, + .i2c_reg = 0x2620, + .i2c_reg_len = 0x2630, + .i2c_data_len = 0x2634, + .i2c_ctrl = 0x2638, + .i2c_status = 0x263c, + .i2c_err_vec = 0x2648, + .i2c_data_buf = 0x2680, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000080, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data7 = { + .adap_nr = 18, + .i2c_timeout = 3000, + .i2c_scale = 0x2700, + .i2c_filter = 0x2704, + .i2c_stretch = 0x2708, + .i2c_ext_9548_exits_flag = 0x270c, + .i2c_ext_9548_addr = 0x2710, + .i2c_ext_9548_chan = 0x2714, + .i2c_in_9548_chan = 0x2718, + .i2c_slave = 0x271c, + .i2c_reg = 0x2720, + .i2c_reg_len = 0x2730, + .i2c_data_len = 0x2734, + .i2c_ctrl = 0x2738, + .i2c_status = 0x273c, + .i2c_err_vec = 0x2748, + .i2c_data_buf = 0x2780, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000100, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data8 = { + .adap_nr = 19, + .i2c_timeout = 3000, + .i2c_scale = 0x2800, + .i2c_filter = 0x2804, + .i2c_stretch = 0x2808, + .i2c_ext_9548_exits_flag = 0x280c, + .i2c_ext_9548_addr = 0x2810, + .i2c_ext_9548_chan = 0x2814, + .i2c_in_9548_chan = 0x2818, + .i2c_slave = 0x281c, + .i2c_reg = 0x2820, + .i2c_reg_len = 0x2830, + .i2c_data_len = 0x2834, + .i2c_ctrl = 0x2838, + .i2c_status = 0x283c, + .i2c_err_vec = 0x2848, + .i2c_data_buf = 0x2880, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000200, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data9 = { + .adap_nr = 20, + .i2c_timeout = 3000, + .i2c_scale = 0x2900, + .i2c_filter = 0x2904, + .i2c_stretch = 0x2908, + .i2c_ext_9548_exits_flag = 0x290c, + .i2c_ext_9548_addr = 0x2910, + .i2c_ext_9548_chan = 0x2914, + .i2c_in_9548_chan = 0x2918, + .i2c_slave = 0x291c, + .i2c_reg = 0x2920, + .i2c_reg_len = 0x2930, + .i2c_data_len = 0x2934, + .i2c_ctrl = 0x2938, + .i2c_status = 0x293c, + .i2c_err_vec = 0x2948, + .i2c_data_buf = 0x2980, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000400, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data10 = { + .adap_nr = 21, + .i2c_timeout = 3000, + .i2c_scale = 0x2a00, + .i2c_filter = 0x2a04, + .i2c_stretch = 0x2a08, + .i2c_ext_9548_exits_flag = 0x2a0c, + .i2c_ext_9548_addr = 0x2a10, + .i2c_ext_9548_chan = 0x2a14, + .i2c_in_9548_chan = 0x2a18, + .i2c_slave = 0x2a1c, + .i2c_reg = 0x2a20, + .i2c_reg_len = 0x2a30, + .i2c_data_len = 0x2a34, + .i2c_ctrl = 0x2a38, + .i2c_status = 0x2a3c, + .i2c_err_vec = 0x2a48, + .i2c_data_buf = 0x2a80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000800, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data11 = { + .adap_nr = 22, + .i2c_timeout = 3000, + .i2c_scale = 0x2b00, + .i2c_filter = 0x2b04, + .i2c_stretch = 0x2b08, + .i2c_ext_9548_exits_flag = 0x2b0c, + .i2c_ext_9548_addr = 0x2b10, + .i2c_ext_9548_chan = 0x2b14, + .i2c_in_9548_chan = 0x2b18, + .i2c_slave = 0x2b1c, + .i2c_reg = 0x2b20, + .i2c_reg_len = 0x2b30, + .i2c_data_len = 0x2b34, + .i2c_ctrl = 0x2b38, + .i2c_status = 0x2b3c, + .i2c_err_vec = 0x2b48, + .i2c_data_buf = 0x2b80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00001000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data12 = { + .adap_nr = 23, + .i2c_timeout = 3000, + .i2c_scale = 0x2c00, + .i2c_filter = 0x2c04, + .i2c_stretch = 0x2c08, + .i2c_ext_9548_exits_flag = 0x2c0c, + .i2c_ext_9548_addr = 0x2c10, + .i2c_ext_9548_chan = 0x2c14, + .i2c_in_9548_chan = 0x2c18, + .i2c_slave = 0x2c1c, + .i2c_reg = 0x2c20, + .i2c_reg_len = 0x2c30, + .i2c_data_len = 0x2c34, + .i2c_ctrl = 0x2c38, + .i2c_status = 0x2c3c, + .i2c_err_vec = 0x2c48, + .i2c_data_buf = 0x2c80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00002000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data13 = { + .adap_nr = 24, + .i2c_timeout = 3000, + .i2c_scale = 0x2d00, + .i2c_filter = 0x2d04, + .i2c_stretch = 0x2d08, + .i2c_ext_9548_exits_flag = 0x2d0c, + .i2c_ext_9548_addr = 0x2d10, + .i2c_ext_9548_chan = 0x2d14, + .i2c_in_9548_chan = 0x2d18, + .i2c_slave = 0x2d1c, + .i2c_reg = 0x2d20, + .i2c_reg_len = 0x2d30, + .i2c_data_len = 0x2d34, + .i2c_ctrl = 0x2d38, + .i2c_status = 0x2d3c, + .i2c_err_vec = 0x2d48, + .i2c_data_buf = 0x2d80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00004000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data14 = { + .adap_nr = 25, + .i2c_timeout = 3000, + .i2c_scale = 0x2e00, + .i2c_filter = 0x2e04, + .i2c_stretch = 0x2e08, + .i2c_ext_9548_exits_flag = 0x2e0c, + .i2c_ext_9548_addr = 0x2e10, + .i2c_ext_9548_chan = 0x2e14, + .i2c_in_9548_chan = 0x2e18, + .i2c_slave = 0x2e1c, + .i2c_reg = 0x2e20, + .i2c_reg_len = 0x2e30, + .i2c_data_len = 0x2e34, + .i2c_ctrl = 0x2e38, + .i2c_status = 0x2e3c, + .i2c_err_vec = 0x2e48, + .i2c_data_buf = 0x2e80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00008000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data15 = { + .adap_nr = 26, + .i2c_timeout = 3000, + .i2c_scale = 0x2f00, + .i2c_filter = 0x2f04, + .i2c_stretch = 0x2f08, + .i2c_ext_9548_exits_flag = 0x2f0c, + .i2c_ext_9548_addr = 0x2f10, + .i2c_ext_9548_chan = 0x2f14, + .i2c_in_9548_chan = 0x2f18, + .i2c_slave = 0x2f1c, + .i2c_reg = 0x2f20, + .i2c_reg_len = 0x2f30, + .i2c_data_len = 0x2f34, + .i2c_ctrl = 0x2f38, + .i2c_status = 0x2f3c, + .i2c_err_vec = 0x2f48, + .i2c_data_buf = 0x2f80, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00010000, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static void wb_fpga_i2c_bus_device_release(struct device *dev) +{ + return; +} + +static struct platform_device fpga_i2c_bus_device[] = { + { + .name = "wb-fpga-i2c", + .id = 1, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 2, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 3, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 4, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 5, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 6, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 7, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 8, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 9, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data8, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 10, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 11, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 12, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 13, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 14, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 15, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 16, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 17, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 18, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data8, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 19, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data9, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 20, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data10, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 21, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data11, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 22, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data12, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 23, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data13, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 24, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data14, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 25, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data15, + .release = wb_fpga_i2c_bus_device_release, + }, + }, +}; + +static int __init wb_fpga_i2c_bus_device_init(void) +{ + int i; + int ret = 0; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + ret = platform_device_register(&fpga_i2c_bus_device[i]); + if (ret < 0) { + fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-fpga-i2c.%d register failed!\n", i + 1); + } else { + fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_fpga_i2c_bus_device_exit(void) +{ + int i; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&fpga_i2c_bus_device[i]); + } + } +} + +module_init(wb_fpga_i2c_bus_device_init); +module_exit(wb_fpga_i2c_bus_device_exit); +MODULE_DESCRIPTION("FPGA I2C Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c new file mode 100644 index 00000000000..043ec82366e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c @@ -0,0 +1,489 @@ +/* + * An wb_fpga_pca954x_device driver for fpga pca954x device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_fpga_pca954x_device_debug = 0; +static int g_wb_fpga_pca954x_device_error = 0; + +module_param(g_wb_fpga_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_fpga_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_fpga_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_FPGA_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_FPGA_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_fpga_pca954x_device_error) { \ + printk(KERN_ERR "[WB_FPGA_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* CPLD-I2C-MASTER-1 */ +static fpga_pca954x_device_t fpga_pca954x_device_data0 = { + .i2c_bus = 2, + .i2c_addr = 0x70, + .pca9548_base_nr = 27, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data1 = { + .i2c_bus = 27, + .i2c_addr = 0x76, + .pca9548_base_nr = 42, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +/* CPLD-I2C-MASTER-4 */ +static fpga_pca954x_device_t fpga_pca954x_device_data2 = { + .i2c_bus = 3, + .i2c_addr = 0x70, + .pca9548_base_nr = 28, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data3 = { + .i2c_bus = 28, + .i2c_addr = 0x77, + .pca9548_base_nr = 50, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +/* CPLD-I2C-MASTER-2 */ +static fpga_pca954x_device_t fpga_pca954x_device_data4 = { + .i2c_bus = 4, + .i2c_addr = 0x70, + .pca9548_base_nr = 29, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data5 = { + .i2c_bus =29, + .i2c_addr = 0x77, + .pca9548_base_nr = 58, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +/* CPLD-I2C-MASTER-3 */ +static fpga_pca954x_device_t fpga_pca954x_device_data6 = { + .i2c_bus = 5, + .i2c_addr = 0x71, + .pca9548_base_nr = 30, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data7 = { + .i2c_bus = 30, + .i2c_addr = 0x77, + .pca9548_base_nr = 66, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +/* fpga-i2c-1 */ +static fpga_pca954x_device_t fpga_pca954x_device_data8 = { + .i2c_bus = 6, + .i2c_addr = 0x70, + .pca9548_base_nr = 31, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data9 = { + .i2c_bus = 31, + .i2c_addr = 0x76, + .pca9548_base_nr = 74, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data10 = { + .i2c_bus = 7, + .i2c_addr = 0x70, + .pca9548_base_nr = 32, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data11 = { + .i2c_bus = 32, + .i2c_addr = 0x76, + .pca9548_base_nr = 82, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data12 = { + .i2c_bus = 8, + .i2c_addr = 0x71, + .pca9548_base_nr = 33, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data13 = { + .i2c_bus = 33, + .i2c_addr = 0x76, + .pca9548_base_nr = 90, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data14 = { + .i2c_bus = 9, + .i2c_addr = 0x70, + .pca9548_base_nr = 98, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data15 = { + .i2c_bus = 10, + .i2c_addr = 0x70, + .pca9548_base_nr = 102, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data16 = { + .i2c_bus = 11, + .i2c_addr = 0x70, + .pca9548_base_nr = 106, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data17 = { + .i2c_bus = 12, + .i2c_addr = 0x70, + .pca9548_base_nr = 110, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data18 = { + .i2c_bus = 13, + .i2c_addr = 0x70, + .pca9548_base_nr = 114, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data19 = { + .i2c_bus = 14, + .i2c_addr = 0x70, + .pca9548_base_nr = 118, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data20 = { + .i2c_bus = 15, + .i2c_addr = 0x70, + .pca9548_base_nr = 122, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data21 = { + .i2c_bus = 16, + .i2c_addr = 0x70, + .pca9548_base_nr = 126, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data22 = { + .i2c_bus = 17, + .i2c_addr = 0x70, + .pca9548_base_nr = 130, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data23 = { + .i2c_bus = 18, + .i2c_addr = 0x70, + .pca9548_base_nr = 134, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data24 = { + .i2c_bus = 19, + .i2c_addr = 0x70, + .pca9548_base_nr = 138, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data25 = { + .i2c_bus = 20, + .i2c_addr = 0x70, + .pca9548_base_nr = 142, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data26 = { + .i2c_bus = 21, + .i2c_addr = 0x70, + .pca9548_base_nr = 146, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data27 = { + .i2c_bus = 22, + .i2c_addr = 0x70, + .pca9548_base_nr = 150, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data28 = { + .i2c_bus = 23, + .i2c_addr = 0x70, + .pca9548_base_nr = 154, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data29 = { + .i2c_bus = 24, + .i2c_addr = 0x70, + .pca9548_base_nr = 158, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data30 = { + .i2c_bus = 25, + .i2c_addr = 0x70, + .pca9548_base_nr = 162, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data31 = { + .i2c_bus = 26, + .i2c_addr = 0x70, + .pca9548_base_nr = 166, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +struct i2c_board_info fpga_pca954x_device_info[] = { + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data0, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data1, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data2, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data3, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data4, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data5, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data6, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data7, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data8, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data9, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data10, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data11, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data12, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data13, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data14, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data15, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data16, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data17, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data18, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data19, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data20, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data21, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data22, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data23, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data24, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data25, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data26, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data27, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data28, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data29, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data30, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data31, + }, +}; + +static int __init wb_fpga_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus); + if (adap == NULL) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]); + if (!client) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n", + fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus); + } else { + fpga_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_fpga_pca954x_device_exit(void) +{ + int i; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + if (fpga_pca954x_device_data->client) { + i2c_unregister_device(fpga_pca954x_device_data->client); + fpga_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_fpga_pca954x_device_init); +module_exit(wb_fpga_pca954x_device_exit); +MODULE_DESCRIPTION("FPGA PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c new file mode 100644 index 00000000000..92bced35580 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c @@ -0,0 +1,181 @@ +/* + * An wb_io_dev_device driver for io device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_dev_device_debug = 0; +static int g_wb_i2c_dev_device_error = 0; + +module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_dev_device_debug) { \ + printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_dev_device_error) { \ + printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* mac cplda */ +static i2c_dev_device_t i2c_dev_device_data0 = { + .i2c_bus = 98, + .i2c_addr = 0x1d, + .i2c_name = "cpld6", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* mac cpldb */ +static i2c_dev_device_t i2c_dev_device_data1 = { + .i2c_bus = 99, + .i2c_addr = 0x2d, + .i2c_name = "cpld7", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* mac cpldc */ +static i2c_dev_device_t i2c_dev_device_data2 = { + .i2c_bus = 100, + .i2c_addr = 0x3d, + .i2c_name = "cpld8", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* mgmt cpld */ +static i2c_dev_device_t i2c_dev_device_data3 = { + .i2c_bus = 5, + .i2c_addr = 0x1a, + .i2c_name = "cpld9", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* fan cpld */ +static i2c_dev_device_t i2c_dev_device_data4 = { + .i2c_bus = 50, + .i2c_addr = 0x0d, + .i2c_name = "cpld10", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + + +struct i2c_board_info i2c_dev_device_info[] = { + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data0, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data1, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data2, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data3, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data4, + }, +}; + +static int __init wb_i2c_dev_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus); + if (adap == NULL) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); + if (!client) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", + i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); + } else { + i2c_dev_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_dev_device_exit(void) +{ + int i; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + if (i2c_dev_device_data->client) { + i2c_unregister_device(i2c_dev_device_data->client); + i2c_dev_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_dev_device_init); +module_exit(wb_i2c_dev_device_exit); +MODULE_DESCRIPTION("I2C DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c new file mode 100644 index 00000000000..1bc2aafed2a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c @@ -0,0 +1,122 @@ +/* + * An wb_i2c_mux_pca954x_device driver for pca954x i2c load device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_mux_pca954x_device_debug = 0; +static int g_wb_i2c_mux_pca954x_device_error = 0; + +module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_error) { \ + printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = { + .i2c_bus = 1, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 1, + .close_chan_force_reset = 1, + .pca9548_base_nr = 34, + .pca9548_reset_type = PCA9548_RESET_IO, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .io_attr.io_addr = 0x91e, + .io_attr.mask = 0x01, + .io_attr.reset_on = 0, + .io_attr.reset_off = 0x01, + }, +}; + +struct i2c_board_info i2c_mux_pca954x_device_info[] = { + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data0, + }, +}; + +static int __init wb_i2c_mux_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus); + if (adap == NULL) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); + if (!client) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", + i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); + } else { + i2c_mux_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_mux_pca954x_device_exit(void) +{ + int i; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + if (i2c_mux_pca954x_device_data->client) { + i2c_unregister_device(i2c_mux_pca954x_device_data->client); + i2c_mux_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_mux_pca954x_device_init); +module_exit(wb_i2c_mux_pca954x_device_exit); +MODULE_DESCRIPTION("WB I2C MUX PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c new file mode 100644 index 00000000000..82b692e414c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c @@ -0,0 +1,193 @@ +/* + * An wb_indirect_dev_device driver for indirect load device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_indirect_dev_device_debug = 0; +static int g_indirect_dev_device_error = 0; + +module_param(g_indirect_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_indirect_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define INDIRECT_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_indirect_dev_device_debug) { \ + printk(KERN_INFO "[INDIRECT_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define INDIRECT_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_indirect_dev_device_error) { \ + printk(KERN_ERR "[INDIRECT_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* CPLD-I2C-MASTER-0 */ +static indirect_dev_device_t indirect_dev_device_data0 = { + .logic_func_mode = 4, + .dev_name = "cpld2", + .logic_dev_name = "/dev/cpld1", + .data_bus_width = 4, + .addr_bus_width = 1, + .wr_data = 0x70, + .wr_data_width = 4, + .addr_low = 0x74, + .addr_high = 0x75, + .rd_data = 0x76, + .rd_data_width = 4, + .opt_ctl = 0x7a, + .indirect_len = 0x230, +}; + +/* CPLD-I2C-MASTER-1 */ +static indirect_dev_device_t indirect_dev_device_data1 = { + .logic_func_mode = 4, + .dev_name = "cpld3", + .logic_dev_name = "/dev/cpld1", + .data_bus_width = 4, + .addr_bus_width = 1, + .wr_data = 0x80, + .wr_data_width = 4, + .addr_low = 0x84, + .addr_high = 0x85, + .rd_data = 0x86, + .rd_data_width = 4, + .opt_ctl = 0x8a, + .indirect_len = 0x230, +}; + +/* CPLD-I2C-MASTER-2 */ +static indirect_dev_device_t indirect_dev_device_data2 = { + .logic_func_mode = 4, + .dev_name = "cpld4", + .logic_dev_name = "/dev/cpld1", + .data_bus_width = 4, + .addr_bus_width = 1, + .wr_data = 0x90, + .wr_data_width = 4, + .addr_low = 0x94, + .addr_high = 0x95, + .rd_data = 0x96, + .rd_data_width = 4, + .opt_ctl = 0x9a, + .indirect_len = 0x230, +}; + +/* CPLD-I2C-MASTER-3 */ +static indirect_dev_device_t indirect_dev_device_data3 = { + .logic_func_mode = 4, + .dev_name = "cpld5", + .logic_dev_name = "/dev/cpld1", + .data_bus_width = 4, + .addr_bus_width = 1, + .wr_data = 0xa0, + .wr_data_width = 4, + .addr_low = 0xa4, + .addr_high = 0xa5, + .rd_data = 0xa6, + .rd_data_width = 4, + .opt_ctl = 0xaa, + .indirect_len = 0x230, +}; + +static void indirect_dev_device_bus_device_release(struct device *dev) +{ + return; +} + +static struct platform_device indirect_dev_device[] = { + { + .name = "wb-indirect-dev", + .id = 1, + .dev = { + .platform_data = &indirect_dev_device_data0, + .release = indirect_dev_device_bus_device_release, + }, + }, + { + .name = "wb-indirect-dev", + .id = 2, + .dev = { + .platform_data = &indirect_dev_device_data1, + .release = indirect_dev_device_bus_device_release, + }, + }, + { + .name = "wb-indirect-dev", + .id = 3, + .dev = { + .platform_data = &indirect_dev_device_data2, + .release = indirect_dev_device_bus_device_release, + }, + }, + { + .name = "wb-indirect-dev", + .id = 4, + .dev = { + .platform_data = &indirect_dev_device_data3, + .release = indirect_dev_device_bus_device_release, + }, + }, +}; + +static int __init indirect_dev_device_bus_device_init(void) +{ + int i; + int ret = 0; + indirect_dev_device_t *indirect_dev_device_data; + + INDIRECT_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(indirect_dev_device); i++) { + indirect_dev_device_data = indirect_dev_device[i].dev.platform_data; + ret = platform_device_register(&indirect_dev_device[i]); + if (ret < 0) { + indirect_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-indirect-dev.%d register failed!\n", i + 1); + } else { + indirect_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit indirect_dev_device_bus_device_exit(void) +{ + int i; + indirect_dev_device_t *indirect_dev_device_data; + + INDIRECT_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(indirect_dev_device) - 1; i >= 0; i--) { + indirect_dev_device_data = indirect_dev_device[i].dev.platform_data; + if (indirect_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&indirect_dev_device[i]); + } + } +} + +module_init(indirect_dev_device_bus_device_init); +module_exit(indirect_dev_device_bus_device_exit); +MODULE_DESCRIPTION("INDIRECT DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_io_dev_device.c new file mode 100644 index 00000000000..91767b2fdff --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_io_dev_device.c @@ -0,0 +1,123 @@ +/* + * An wb_io_dev_device driver for io device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_io_dev_device_debug = 0; +static int g_wb_io_dev_device_error = 0; + +module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_io_dev_device_debug) { \ + printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_io_dev_device_error) { \ + printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static io_dev_device_t io_dev_device_data0 = { + .io_dev_name = "cpld0", + .io_base = 0xa00, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static io_dev_device_t io_dev_device_data1 = { + .io_dev_name = "cpld1", + .io_base = 0x900, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static void wb_io_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device io_dev_device[] = { + { + .name = "wb-io-dev", + .id = 1, + .dev = { + .platform_data = &io_dev_device_data0, + .release = wb_io_dev_device_release, + }, + }, + { + .name = "wb-io-dev", + .id = 2, + .dev = { + .platform_data = &io_dev_device_data1, + .release = wb_io_dev_device_release, + }, + }, +}; + +static int __init wb_io_dev_device_init(void) +{ + int i; + int ret = 0; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + ret = platform_device_register(&io_dev_device[i]); + if (ret < 0) { + io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1); + } else { + io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_io_dev_device_exit(void) +{ + int i; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&io_dev_device[i]); + } + } +} + +module_init(wb_io_dev_device_init); +module_exit(wb_io_dev_device_exit); +MODULE_DESCRIPTION("IO DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_pcie_dev_device.c new file mode 100644 index 00000000000..c76daa348e0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_pcie_dev_device.c @@ -0,0 +1,116 @@ +/* + * An wb_pcie_dev_device driver for pcie device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_pcie_dev_device_debug = 0; +static int g_wb_pcie_dev_device_error = 0; + +module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_pcie_dev_device_debug) { \ + printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_pcie_dev_device_error) { \ + printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static pci_dev_device_t pcie_dev_device_data0 = { + .pci_dev_name = "fpga0", + .pci_domain = 0x0000, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, + .search_mode = 1, + .bridge_bus = 0, + .bridge_slot = 0x12, + .bridge_fn = 0, + .upg_ctrl_base = 0xa00, + .upg_flash_base = 0x2f0000, +}; + +static void wb_pcie_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device pcie_dev_device[] = { + { + .name = "wb-pci-dev", + .id = 1, + .dev = { + .platform_data = &pcie_dev_device_data0, + .release = wb_pcie_dev_device_release, + }, + }, +}; + +static int __init wb_pcie_dev_device_init(void) +{ + int i; + int ret = 0; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + ret = platform_device_register(&pcie_dev_device[i]); + if (ret < 0) { + pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1); + } else { + pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_pcie_dev_device_exit(void) +{ + int i; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&pcie_dev_device[i]); + } + } +} + +module_init(wb_pcie_dev_device_init); +module_exit(wb_pcie_dev_device_exit); +MODULE_DESCRIPTION("PCIE DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c new file mode 100644 index 00000000000..e40ed10639f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c @@ -0,0 +1,155 @@ +/* + * An wb_wdt_device driver for watchdog device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include + +#include + +static int g_wb_wdt_device_debug = 0; +static int g_wb_wdt_device_error = 0; + +module_param(g_wb_wdt_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_wdt_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_WDT_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_wdt_device_debug) { \ + printk(KERN_INFO "[WB_WDT_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_WDT_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_wdt_device_error) { \ + printk(KERN_ERR "[WB_WDT_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static wb_wdt_device_t wb_wdt_device_data_0 = { + .feed_wdt_type = 1, + .hw_margin = 408000, + .feed_time = 9000, + .config_dev_name = "/dev/cpld1", + .config_mode = 1, + .priv_func_mode = 3, + .enable_reg = 0xb0, + .enable_val = 0x1, + .disable_val = 0x0, + .enable_mask = 0x1, + .timeout_cfg_reg = 0xb1, + .timeleft_cfg_reg = 0xb2, + .hw_algo = "toggle", + .wdt_config_mode.gpio_wdt = { + .gpio = 346, + .flags = 1 + }, + .timer_accuracy = 1600, /* 1.6s */ + .sysfs_index = SYSFS_NO_CFG, +}; + +/* sys led */ +static wb_wdt_device_t wb_wdt_device_data_1 = { + .feed_wdt_type = 2, + .hw_margin = 180000, + .feed_time = 30000, + .config_dev_name = "/dev/cpld1", + .config_mode = 2, + .priv_func_mode = 3, + .enable_reg = 0xba, + .enable_val = 0x1, + .disable_val = 0x0, + .enable_mask = 0x1, + .timeout_cfg_reg = 0xbc, + .timeleft_cfg_reg = 0xbd, + .hw_algo = "toggle", + .wdt_config_mode.logic_wdt = { + .feed_dev_name = "/dev/cpld1", + .feed_reg = 0xbb, + .active_val = 0x01, + .logic_func_mode = 4, + }, + .timer_accuracy = 6000, /* 6s */ + .sysfs_index = SYSFS_NO_CFG, +}; + +static void wb_wdt_device_release(struct device *dev) +{ + return; +} + +static struct platform_device wb_wdt_device[] = { + { + .name = "wb_wdt", + .id = 0, + .dev = { + .platform_data = &wb_wdt_device_data_0, + .release = wb_wdt_device_release, + }, + }, + { + .name = "wb_wdt", + .id = 1, + .dev = { + .platform_data = &wb_wdt_device_data_1, + .release = wb_wdt_device_release, + }, + }, +}; + +static int __init wb_wdt_device_init(void) +{ + int i; + int ret = 0; + wb_wdt_device_t *wb_wdt_device_data; + + WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(wb_wdt_device); i++) { + wb_wdt_device_data = wb_wdt_device[i].dev.platform_data; + ret = platform_device_register(&wb_wdt_device[i]); + if (ret < 0) { + wb_wdt_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "rg-wdt.%d register failed!\n", i + 1); + } else { + wb_wdt_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_wdt_device_exit(void) +{ + int i; + wb_wdt_device_t *wb_wdt_device_data; + + WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(wb_wdt_device) - 1; i >= 0; i--) { + wb_wdt_device_data = wb_wdt_device[i].dev.platform_data; + if (wb_wdt_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&wb_wdt_device[i]); + } + } +} + +module_init(wb_wdt_device_init); +module_exit(wb_wdt_device_exit); +MODULE_DESCRIPTION("WB WDT Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/CPLD.cfg new file mode 100644 index 00000000000..f08fd5866a8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/CPLD.cfg @@ -0,0 +1,321 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Set item: System E2 i2c bus address +# Description: Format other_i2c_dev.bus_[main_dev]_[minor_dev] other_i2c_dev.addr_[main_dev]_[minor_dev], +# .bus is configuration item corresponds to the bus number (/dev/i2c-bus) +# .addr is address of the device corresponding to the configuration item on the bus +# Note: main_dev look rg_main_dev_type_t definition, main board is 0, minor_dev is 0 +other_i2c_dev.bus_0_0=1 +other_i2c_dev.addr_0_0=0x56 + +# Configuration item: System E2 path +eeprom_path_0_0=/sys/bus/i2c/devices/1-0056/eeprom + +# Configuration item: System E2 size +eeprom_size_0_0=256 + +# Configuration item: watchdog number +# Description: Format watchdog_id_[index] +watchdog_id_0=0 + +# Configuration item: watchdog device name +# Description: Format watchdog_name_[index]_[type] +watchdog_name_0_0=identity +watchdog_name_0_1=state +watchdog_name_0_2=timeleft + +# Configuration item: i2c bus address of the cpld +# Description: Format cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id] +# All cpld numbers of each product are customized and do not have to be repeated. +# The numbers are reflected in the upper eight digits of the offset address of the cpld device +# cpld_slot: 1: cable card 1, 2: cable card 2, 3: cable card 3, 4: cable card 4,5: fan adapter board +# cpld_id: 0:CPLD_A 1:CPLD_B +# .bus is configuration item corresponds to the bus number(/dev/i2c-bus) +# .addr is address of the device corresponding to the configuration item on the bus +# Note: This field is optional. This field is not required for a cpld that does not have I2C access +cpld_i2c_dev.bus_0_2=98 +cpld_i2c_dev.addr_0_2=0x1d +cpld_i2c_dev.bus_0_3=99 +cpld_i2c_dev.addr_0_3=0x2d +cpld_i2c_dev.bus_0_4=100 +cpld_i2c_dev.addr_0_4=0x3d +cpld_i2c_dev.bus_0_5=5 +cpld_i2c_dev.addr_0_5=0x1a +cpld_i2c_dev.bus_0_6=50 +cpld_i2c_dev.addr_0_6=0x0d + +# Configuration item: cpld lpc address +# Description: Format cpld_lpc_addr_[cpld_slot]_[cpld_id] +# All cpld numbers of each product are customized and do not have to be repeated. +# The numbers are reflected in the upper eight digits of the offset address of the cpld device +# cpld_id: 0:X86_CPLD, 1:MAC_CPLDA, 2:MAC_CPLDB +# Note: This field is optional. This field is not required for CPLDS that are not accessed by LPCS +cpld_lpc_dev_0_0=0xa00 +cpld_lpc_dev_0_1=0x900 + +# Configuration item: Access mode of each cpld(LPC/I2C) +# Description: Format mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c, cpld_id is cpld number,Start at 0 +# Note: This field is required +mode_cpld_0_0=lpc +mode_cpld_0_1=lpc +mode_cpld_0_2=i2c +mode_cpld_0_3=i2c +mode_cpld_0_4=i2c +mode_cpld_0_5=i2c +mode_cpld_0_6=i2c + +# Configuration item: the number of CPLD +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev: indicates that the mainboard is 0, the subPLD is 5, and the minor_dev: CPLD is 8 +dev_num_0_8=7 + +# Configuration item: Name of each cpld +# Description: Format cpld_name_[cpld_id] cpld_id is cpld number,start with 1 +# Note: This field is required +cpld_name_0_0=CPU_CPLD +cpld_name_0_1=BASE_CPLD +cpld_name_0_2=MAC_CPLDA +cpld_name_0_3=MAC_CPLDB +cpld_name_0_4=MAC_CPLDC +cpld_name_0_5=MGMT_CPLD +cpld_name_0_6=FAN_CPLD + + +# Configuration item: Model of each cpld +# Description: Format cpld_type_[cpld_id] cpld_idis cpld number,start with 1 +# Note: This field is required +cpld_type_0_0=LATTICE/LCMXO3LF-2100C-5BG256C +cpld_type_0_1=LATTICE/LCMXO3LF-4300C-6BG324I +cpld_type_0_2=LATTICE/LCMXO3LF-4300C-6BG256C +cpld_type_0_3=LATTICE/LCMXO3LF-4300C-6BG324I +cpld_type_0_4=LATTICE/LCMXO3LF-4300C-6BG324I +cpld_type_0_5=LATTICE/LCMXO3LF-4300C-6BG324I +cpld_type_0_6=LATTICE/LCMXO3LF-2100C-5BG256C + + +# Configuration item: Version register of each CPLD +# Description: Format cpld_version_[cpld_id] cpld_id is cpld number,start with 1 +# Note: This field is required +cpld_version.mode_0_0=config +cpld_version.int_cons_0_0= +cpld_version.src_0_0=cpld +cpld_version.frmt_0_0=num_bytes +cpld_version.pola_0_0= +cpld_version.fpath_0_0= +cpld_version.addr_0_0=0x00000000 +cpld_version.len_0_0=4 +cpld_version.bit_offset_0_0= + +cpld_version.mode_0_1=config +cpld_version.int_cons_0_1= +cpld_version.src_0_1=cpld +cpld_version.frmt_0_1=num_bytes +cpld_version.pola_0_1= +cpld_version.fpath_0_1= +cpld_version.addr_0_1=0x00010000 +cpld_version.len_0_1=4 +cpld_version.bit_offset_0_1= + +cpld_version.mode_0_2=config +cpld_version.int_cons_0_2= +cpld_version.src_0_2=cpld +cpld_version.frmt_0_2=num_bytes +cpld_version.pola_0_2= +cpld_version.fpath_0_2= +cpld_version.addr_0_2=0x00020000 +cpld_version.len_0_2=4 +cpld_version.bit_offset_0_2= + +cpld_version.mode_0_3=config +cpld_version.int_cons_0_3= +cpld_version.src_0_3=cpld +cpld_version.frmt_0_3=num_bytes +cpld_version.pola_0_3= +cpld_version.fpath_0_3= +cpld_version.addr_0_3=0x00030000 +cpld_version.len_0_3=4 +cpld_version.bit_offset_0_3= + +cpld_version.mode_0_4=config +cpld_version.int_cons_0_4= +cpld_version.src_0_4=cpld +cpld_version.frmt_0_4=num_bytes +cpld_version.pola_0_4= +cpld_version.fpath_0_4= +cpld_version.addr_0_4=0x00040000 +cpld_version.len_0_4=4 +cpld_version.bit_offset_0_4= + +cpld_version.mode_0_5=config +cpld_version.int_cons_0_5= +cpld_version.src_0_5=cpld +cpld_version.frmt_0_5=num_bytes +cpld_version.pola_0_5= +cpld_version.fpath_0_5= +cpld_version.addr_0_5=0x00050000 +cpld_version.len_0_5=4 +cpld_version.bit_offset_0_5= + +cpld_version.mode_0_6=config +cpld_version.int_cons_0_6= +cpld_version.src_0_6=cpld +cpld_version.frmt_0_6=num_bytes +cpld_version.pola_0_6= +cpld_version.fpath_0_6= +cpld_version.addr_0_6=0x00060000 +cpld_version.len_0_6=4 +cpld_version.bit_offset_0_6= + +# Configuration item: Test register for each CPLD +# Description: Format cpld_test_reg_[cpld_id] cpld_id is cpld number,start with 1 +# Note: This field is required +cpld_test_reg.mode_0_0=config +cpld_test_reg.int_cons_0_0= +cpld_test_reg.src_0_0=cpld +cpld_test_reg.frmt_0_0=byte +cpld_test_reg.pola_0_0= +cpld_test_reg.fpath_0_0= +cpld_test_reg.addr_0_0=0x00000005 +cpld_test_reg.len_0_0=1 +cpld_test_reg.bit_offset_0_0= + +cpld_test_reg.mode_0_1=config +cpld_test_reg.int_cons_0_1= +cpld_test_reg.src_0_1=cpld +cpld_test_reg.frmt_0_1=byte +cpld_test_reg.pola_0_1= +cpld_test_reg.fpath_0_1= +cpld_test_reg.addr_0_1=0x00010055 +cpld_test_reg.len_0_1=1 +cpld_test_reg.bit_offset_0_1= + +cpld_test_reg.mode_0_2=config +cpld_test_reg.int_cons_0_2= +cpld_test_reg.src_0_2=cpld +cpld_test_reg.frmt_0_2=byte +cpld_test_reg.pola_0_2= +cpld_test_reg.fpath_0_2= +cpld_test_reg.addr_0_2=0x00020055 +cpld_test_reg.len_0_2=1 +cpld_test_reg.bit_offset_0_2= + +cpld_test_reg.mode_0_3=config +cpld_test_reg.int_cons_0_3= +cpld_test_reg.src_0_3=cpld +cpld_test_reg.frmt_0_3=byte +cpld_test_reg.pola_0_3= +cpld_test_reg.fpath_0_3= +cpld_test_reg.addr_0_3=0x00030055 +cpld_test_reg.len_0_3=1 +cpld_test_reg.bit_offset_0_3= + +cpld_test_reg.mode_0_4=config +cpld_test_reg.int_cons_0_4= +cpld_test_reg.src_0_4=cpld +cpld_test_reg.frmt_0_4=byte +cpld_test_reg.pola_0_4= +cpld_test_reg.fpath_0_4= +cpld_test_reg.addr_0_4=0x00040055 +cpld_test_reg.len_0_4=1 +cpld_test_reg.bit_offset_0_4= + +cpld_test_reg.mode_0_5=config +cpld_test_reg.int_cons_0_5= +cpld_test_reg.src_0_5=cpld +cpld_test_reg.frmt_0_5=byte +cpld_test_reg.pola_0_5= +cpld_test_reg.fpath_0_5= +cpld_test_reg.addr_0_5=0x00050055 +cpld_test_reg.len_0_5=1 +cpld_test_reg.bit_offset_0_5= + +cpld_test_reg.mode_0_6=config +cpld_test_reg.int_cons_0_6= +cpld_test_reg.src_0_6=cpld +cpld_test_reg.frmt_0_6=byte +cpld_test_reg.pola_0_6= +cpld_test_reg.fpath_0_6= +cpld_test_reg.addr_0_6=0x00060055 +cpld_test_reg.len_0_6=1 +cpld_test_reg.bit_offset_0_6= + +# Configuration item: Hardware version register of each CPLD +# Description: Format cpld_hw_version_[cpld_id] cpld_id is cpld number,start with 1 +# Note: Optional +cpld_hw_version.mode_0_0=config +cpld_hw_version.int_cons_0_0= +cpld_hw_version.src_0_0=cpld +cpld_hw_version.frmt_0_0=byte +cpld_hw_version.pola_0_0= +cpld_hw_version.fpath_0_0= +cpld_hw_version.addr_0_0=0x00000009 +cpld_hw_version.len_0_0=1 +cpld_hw_version.bit_offset_0_0= + +cpld_hw_version.mode_0_1=config +cpld_hw_version.int_cons_0_1= +cpld_hw_version.src_0_1=cpld +cpld_hw_version.frmt_0_1=byte +cpld_hw_version.pola_0_1= +cpld_hw_version.fpath_0_1= +cpld_hw_version.addr_0_1=0x00010009 +cpld_hw_version.len_0_1=1 +cpld_hw_version.bit_offset_0_1= + +cpld_hw_version.mode_0_2=config +cpld_hw_version.int_cons_0_2= +cpld_hw_version.src_0_2=cpld +cpld_hw_version.frmt_0_2=byte +cpld_hw_version.pola_0_2= +cpld_hw_version.fpath_0_2= +cpld_hw_version.addr_0_2=0x00020009 +cpld_hw_version.len_0_2=1 +cpld_hw_version.bit_offset_0_2= + +cpld_hw_version.mode_0_3=config +cpld_hw_version.int_cons_0_3= +cpld_hw_version.src_0_3=cpld +cpld_hw_version.frmt_0_3=byte +cpld_hw_version.pola_0_3= +cpld_hw_version.fpath_0_3= +cpld_hw_version.addr_0_3=0x00030009 +cpld_hw_version.len_0_3=1 +cpld_hw_version.bit_offset_0_3= + +cpld_hw_version.mode_0_4=config +cpld_hw_version.int_cons_0_4= +cpld_hw_version.src_0_4=cpld +cpld_hw_version.frmt_0_4=byte +cpld_hw_version.pola_0_4= +cpld_hw_version.fpath_0_4= +cpld_hw_version.addr_0_4=0x00040009 +cpld_hw_version.len_0_4=1 +cpld_hw_version.bit_offset_0_4= + +cpld_hw_version.mode_0_5=config +cpld_hw_version.int_cons_0_5= +cpld_hw_version.src_0_5=cpld +cpld_hw_version.frmt_0_5=byte +cpld_hw_version.pola_0_5= +cpld_hw_version.fpath_0_5= +cpld_hw_version.addr_0_5=0x00050009 +cpld_hw_version.len_0_5=1 +cpld_hw_version.bit_offset_0_5= + +cpld_hw_version.mode_0_6=config +cpld_hw_version.int_cons_0_6= +cpld_hw_version.src_0_6=cpld +cpld_hw_version.frmt_0_6=byte +cpld_hw_version.pola_0_6= +cpld_hw_version.fpath_0_6= +cpld_hw_version.addr_0_6=0x00060009 +cpld_hw_version.len_0_6=1 +cpld_hw_version.bit_offset_0_6= + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FAN.cfg new file mode 100644 index 00000000000..86fb3b13a10 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FAN.cfg @@ -0,0 +1,358 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration items: E2 i2c bus address +# Description: Format other_i2c_dev.bus_[main_dev]_[minor_dev] other_i2c_dev.addr_[main_dev]_[minor_dev], +# .bus is configuration item corresponds to the bus number (/dev/i2c-bus) +# .addr is address of the device corresponding to the configuration item on the bus +# Note: main_dev is defined in rg_main_dev_type_t. mainboard is 0, fan is 1, dev_index is device index +other_i2c_dev.bus_1_1=52 +other_i2c_dev.addr_1_1=0x50 +other_i2c_dev.bus_1_2=53 +other_i2c_dev.addr_1_2=0x50 +other_i2c_dev.bus_1_3=54 +other_i2c_dev.addr_1_3=0x50 +other_i2c_dev.bus_1_4=55 +other_i2c_dev.addr_1_4=0x50 + +# Configuration items: Fan dependent constant +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,Fan is 1 minor_dev, 0: does not exist, 5: motor + +# Number of fans +dev_num_1_0=4 + +# Number of motors +dev_num_1_5=2 + +# Configuration items: Product fan E2 format +# Description: Format fan_e2_mode +# Note: required +fan_e2_mode=fru + +# Configuration items: Mode of reading fan E2 +# Description: Format fan_sysfs_name +# Note: If not configured, it is read by i2c, otherwise it is read by sysfs +fan_sysfs_name=eeprom + +# Configuration items: Fan air duct type +# Filling instructions: fan_direction_[direction]_[index] +# direction is air duct 0:F2B 1:B2F, indexstart with 1 +# Note: required +fan_direction_0_1=FAN80-02-F +# Configuration items: Fan status CPLD register address +# Description: Format dev_present_status_[main_dev_id][fan_index] fan_indexstart with 1 +# Note: fan main_dev_id is 1 +dev_present_status.mode_1_1=config +dev_present_status.src_1_1=cpld +dev_present_status.frmt_1_1=bit +dev_present_status.pola_1_1=negative +dev_present_status.addr_1_1=0x0006005b +dev_present_status.len_1_1=1 +dev_present_status.bit_offset_1_1=0 + +dev_present_status.mode_1_2=config +dev_present_status.src_1_2=cpld +dev_present_status.frmt_1_2=bit +dev_present_status.pola_1_2=negative +dev_present_status.addr_1_2=0x0006005b +dev_present_status.len_1_2=1 +dev_present_status.bit_offset_1_2=1 + +dev_present_status.mode_1_3=config +dev_present_status.src_1_3=cpld +dev_present_status.frmt_1_3=bit +dev_present_status.pola_1_3=negative +dev_present_status.addr_1_3=0x0006005b +dev_present_status.len_1_3=1 +dev_present_status.bit_offset_1_3=2 + +dev_present_status.mode_1_4=config +dev_present_status.src_1_4=cpld +dev_present_status.frmt_1_4=bit +dev_present_status.pola_1_4=negative +dev_present_status.addr_1_4=0x0006005b +dev_present_status.len_1_4=1 +dev_present_status.bit_offset_1_4=3 + +# Configuration items: Fan rotation status CPLD register address +# Description: Format fan_roll_status_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1 +# Note: required +fan_roll_status.mode_1_1=config +fan_roll_status.int_cons_1_1= +fan_roll_status.src_1_1=cpld +fan_roll_status.frmt_1_1=bit +fan_roll_status.pola_1_1=positive +fan_roll_status.fpath_1_1= +fan_roll_status.addr_1_1=0x0006005c +fan_roll_status.len_1_1=1 +fan_roll_status.bit_offset_1_1=0 + +fan_roll_status.mode_1_2=config +fan_roll_status.int_cons_1_2= +fan_roll_status.src_1_2=cpld +fan_roll_status.frmt_1_2=bit +fan_roll_status.pola_1_2=positive +fan_roll_status.fpath_1_2= +fan_roll_status.addr_1_2=0x0006005d +fan_roll_status.len_1_2=1 +fan_roll_status.bit_offset_1_2=0 + +fan_roll_status.mode_2_1=config +fan_roll_status.int_cons_2_1= +fan_roll_status.src_2_1=cpld +fan_roll_status.frmt_2_1=bit +fan_roll_status.pola_2_1=positive +fan_roll_status.fpath_2_1= +fan_roll_status.addr_2_1=0x0006005c +fan_roll_status.len_2_1=1 +fan_roll_status.bit_offset_2_1=1 + +fan_roll_status.mode_2_2=config +fan_roll_status.int_cons_2_2= +fan_roll_status.src_2_2=cpld +fan_roll_status.frmt_2_2=bit +fan_roll_status.pola_2_2=positive +fan_roll_status.fpath_2_2= +fan_roll_status.addr_2_2=0x0006005d +fan_roll_status.len_2_2=1 +fan_roll_status.bit_offset_2_2=1 + +fan_roll_status.mode_3_1=config +fan_roll_status.int_cons_3_1= +fan_roll_status.src_3_1=cpld +fan_roll_status.frmt_3_1=bit +fan_roll_status.pola_3_1=positive +fan_roll_status.fpath_3_1= +fan_roll_status.addr_3_1=0x0006005c +fan_roll_status.len_3_1=1 +fan_roll_status.bit_offset_3_1=2 + +fan_roll_status.mode_3_2=config +fan_roll_status.int_cons_3_2= +fan_roll_status.src_3_2=cpld +fan_roll_status.frmt_3_2=bit +fan_roll_status.pola_3_2=positive +fan_roll_status.fpath_3_2= +fan_roll_status.addr_3_2=0x0006005d +fan_roll_status.len_3_2=1 +fan_roll_status.bit_offset_3_2=2 + +fan_roll_status.mode_4_1=config +fan_roll_status.int_cons_4_1= +fan_roll_status.src_4_1=cpld +fan_roll_status.frmt_4_1=bit +fan_roll_status.pola_4_1=positive +fan_roll_status.fpath_4_1= +fan_roll_status.addr_4_1=0x0006005c +fan_roll_status.len_4_1=1 +fan_roll_status.bit_offset_4_1=3 + +fan_roll_status.mode_4_2=config +fan_roll_status.int_cons_4_2= +fan_roll_status.src_4_2=cpld +fan_roll_status.frmt_4_2=bit +fan_roll_status.pola_4_2=positive +fan_roll_status.fpath_4_2= +fan_roll_status.addr_4_2=0x0006005d +fan_roll_status.len_4_2=1 +fan_roll_status.bit_offset_4_2=3 + +# Configuration items: Fan speed CPLD register address +# Description: Format fan_speed_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1 +# Note: required +fan_speed.mode_1_1=config +fan_speed.int_cons_1_1= +fan_speed.src_1_1=cpld +fan_speed.frmt_1_1=num_bytes +fan_speed.pola_1_1=negative +fan_speed.fpath_1_1= +fan_speed.addr_1_1=0x00060094 +fan_speed.len_1_1=2 +fan_speed.bit_offset_1_1= + +fan_speed.mode_1_2=config +fan_speed.int_cons_1_2= +fan_speed.src_1_2=cpld +fan_speed.frmt_1_2=num_bytes +fan_speed.pola_1_2=negative +fan_speed.fpath_1_2= +fan_speed.addr_1_2=0x000600a0 +fan_speed.len_1_2=2 +fan_speed.bit_offset_1_2= + +fan_speed.mode_2_1=config +fan_speed.int_cons_2_1= +fan_speed.src_2_1=cpld +fan_speed.frmt_2_1=num_bytes +fan_speed.pola_2_1=negative +fan_speed.fpath_2_1= +fan_speed.addr_2_1=0x00060096 +fan_speed.len_2_1=2 +fan_speed.bit_offset_2_1= + +fan_speed.mode_2_2=config +fan_speed.int_cons_2_2= +fan_speed.src_2_2=cpld +fan_speed.frmt_2_2=num_bytes +fan_speed.pola_2_2=negative +fan_speed.fpath_2_2= +fan_speed.addr_2_2=0x000600a2 +fan_speed.len_2_2=2 +fan_speed.bit_offset_2_2= + +fan_speed.mode_3_1=config +fan_speed.int_cons_3_1= +fan_speed.src_3_1=cpld +fan_speed.frmt_3_1=num_bytes +fan_speed.pola_3_1=negative +fan_speed.fpath_3_1= +fan_speed.addr_3_1=0x00060098 +fan_speed.len_3_1=2 +fan_speed.bit_offset_3_1= + +fan_speed.mode_3_2=config +fan_speed.int_cons_3_2= +fan_speed.src_3_2=cpld +fan_speed.frmt_3_2=num_bytes +fan_speed.pola_3_2=negative +fan_speed.fpath_3_2= +fan_speed.addr_3_2=0x000600a4 +fan_speed.len_3_2=2 +fan_speed.bit_offset_3_2= + +fan_speed.mode_4_1=config +fan_speed.int_cons_4_1= +fan_speed.src_4_1=cpld +fan_speed.frmt_4_1=num_bytes +fan_speed.pola_4_1=negative +fan_speed.fpath_4_1= +fan_speed.addr_4_1=0x0006009a +fan_speed.len_4_1=2 +fan_speed.bit_offset_4_1= + +fan_speed.mode_4_2=config +fan_speed.int_cons_4_2= +fan_speed.src_4_2=cpld +fan_speed.frmt_4_2=num_bytes +fan_speed.pola_4_2=negative +fan_speed.fpath_4_2= +fan_speed.addr_4_2=0x000600a6 +fan_speed.len_4_2=2 +fan_speed.bit_offset_4_2= + +# Configuration items: Fan speed level CPLD register address +# Description: Format fan_ratio_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1 +# Note: required +fan_ratio.mode_1=config +fan_ratio.int_cons_1= +fan_ratio.src_1=cpld +fan_ratio.frmt_1=byte +fan_ratio.pola_1= +fan_ratio.fpath_1= +fan_ratio.addr_1=0x00060090 +fan_ratio.len_1=1 +fan_ratio.bit_offset_1= + +fan_ratio.mode_2=config +fan_ratio.int_cons_2= +fan_ratio.src_2=cpld +fan_ratio.frmt_2=byte +fan_ratio.pola_2= +fan_ratio.fpath_2= +fan_ratio.addr_2=0x00060091 +fan_ratio.len_2=1 +fan_ratio.bit_offset_2= + +fan_ratio.mode_3=config +fan_ratio.int_cons_3= +fan_ratio.src_3=cpld +fan_ratio.frmt_3=byte +fan_ratio.pola_3= +fan_ratio.fpath_3= +fan_ratio.addr_3=0x00060092 +fan_ratio.len_3=1 +fan_ratio.bit_offset_3= + +fan_ratio.mode_4=config +fan_ratio.int_cons_4= +fan_ratio.src_4=cpld +fan_ratio.frmt_4=byte +fan_ratio.pola_4= +fan_ratio.fpath_4= +fan_ratio.addr_4=0x00060093 +fan_ratio.len_4=1 +fan_ratio.bit_offset_4= + +# Fan speed tolerance +fan_threshold_0x0301_0x01=30 +fan_threshold_0x0301_0x02=30 + +# Maximum fan speed +fan_threshold_0x0201_0x01=18000 +fan_threshold_0x0201_0x02=16000 + +# Minimum fan speed +fan_threshold_0x0101_0x01=3600 +fan_threshold_0x0101_0x02=3200 + +# Rated fan speed +fan_threshold_0x1001_0x01=0 +fan_threshold_0x1001_0x02=0 + +fan_threshold_0x1101_0x01=0 +fan_threshold_0x1101_0x02=0 + +fan_threshold_0x1201_0x01=3600 +fan_threshold_0x1201_0x02=3200 + +fan_threshold_0x1301_0x01=5400 +fan_threshold_0x1301_0x02=4800 + +fan_threshold_0x1401_0x01=7200 +fan_threshold_0x1401_0x02=6400 + +fan_threshold_0x1501_0x01=9000 +fan_threshold_0x1501_0x02=8000 + +fan_threshold_0x1601_0x01=10800 +fan_threshold_0x1601_0x02=9600 + +fan_threshold_0x1701_0x01=12600 +fan_threshold_0x1701_0x02=11200 + +fan_threshold_0x1801_0x01=14400 +fan_threshold_0x1801_0x02=12800 + +fan_threshold_0x1901_0x01=16200 +fan_threshold_0x1901_0x02=14400 + +fan_threshold_0x1a01_0x01=18000 +fan_threshold_0x1a01_0x02=16000 + +# Configuration items: the number of fan names displayed in the product +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,FAN is 1, minor_dev, 7: The number of fan names displayed +dev_num_1_7=1 + +# Configuration items: number of fan types supported by each fan name +# Description: Format fan_type_num_[fan_id] +# Note: fan_id start with 1 +fan_type_num_1=1 + +# Configuration items: product Fan type Name +# Description: Format fan_name_[index1]_[index2] +# Note: index1 indicates the ID of the fan that is displayed, start with 1, +# index2 Indicates different fan names with the same ID, start with 1 +fan_name_0_1=FAN80-02-F + +# Configuration items: fan name is displayed +# Description: Format decode_fan_name_[index] +# Note: index indicates the ID of the fan that is displayed +decode_fan_name_1=FAN80-02-F diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FPGA.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FPGA.cfg new file mode 100644 index 00000000000..c5dff6c6d0c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FPGA.cfg @@ -0,0 +1,64 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + + +# Configuration item: motherboard FPGA number +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev: motherboard is 0,daughter card is 5, minor_dev: FPGA is 8 +dev_num_0_9=1 + +# Configuration item: name of each fpga +# Description: Format fpga_name_[fpga_id] fpga_id is fpga number,Start at 0 +# Note: required +fpga_name_0_0=MAC_FPGA + +# Configuration item: Version register for each FPGA +# Description: Format fpga_version_[fpga_id] fpga_id is fpga number,Start at 0 +# Note: required +fpga_version.mode_0_0=config +fpga_version.int_cons_0_0= +fpga_version.src_0_0=file +fpga_version.frmt_0_0=num_bytes +fpga_version.pola_0_0=negative +fpga_version.fpath_0_0=/dev/fpga0 +fpga_version.addr_0_0=0x0 +fpga_version.len_0_0=4 +fpga_version.bit_offset_0_0= + +# Configuration item: Test registers for each FPGA +# Description: Format fpga_test_reg_[fpga_id] fpga_id is fpga number,Start at 0 +# Note: required +fpga_test_reg.mode_0_0=config +fpga_test_reg.int_cons_0_0= +fpga_test_reg.src_0_0=file +fpga_test_reg.frmt_0_0=num_bytes +fpga_test_reg.pola_0_0=negative +fpga_test_reg.fpath_0_0=/dev/fpga0 +fpga_test_reg.addr_0_0=0x08 +fpga_test_reg.len_0_0=4 +fpga_test_reg.bit_offset_0_0= + +# Configuration item: Device type register for each FPGA +# Description: Format fpga_model_reg_[main_dev]_[fpga_id] +# Note: main_dev: motherboard is 0, daughter card is 5, fpga_id is fpga number,Start at 0 +fpga_model_reg.mode_0_0=config +fpga_model_reg.int_cons_0_0= +fpga_model_reg.src_0_0=file +fpga_model_reg.frmt_0_0=num_bytes +fpga_model_reg.pola_0_0=negative +fpga_model_reg.fpath_0_0=/dev/fpga0 +fpga_model_reg.addr_0_0=0x98 +fpga_model_reg.len_0_0=4 +fpga_model_reg.bit_offset_0_0= + + +# Configuration item: Device conversion configuration for each FPGA +# Description: Format fpga_model_decode_[origin_value] +# Note: origin_value is the value read from the FPGA device model register cannot exceed 0xffff +fpga_model_decode_0x0=XC7A150T-2FGG484I \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/LED.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/LED.cfg new file mode 100644 index 00000000000..049d2af1aaa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/LED.cfg @@ -0,0 +1,128 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration item: LED CPLD register address +# Description: Formatled_status_[led_id]_[led_index] +# Note: led_id By definition wb_led_t +# led_index:If there is no index, fill in 0. If there is an index (such as a fan light), the number starts from 1 + +# Front panel SYS light +led_status.mode_0_0=config +led_status.src_0_0=cpld +led_status.frmt_0_0=bit +led_status.addr_0_0=0x000100d2 +led_status.len_0_0=3 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 0- Front panel SYS light +led_status_decode_0_0=0 +led_status_decode_0_1=7 +led_status_decode_0_2=3 +led_status_decode_0_3=5 +led_status_decode_0_4=1 +led_status_decode_0_5=6 +led_status_decode_0_6=2 +led_status_decode_0_7=0 + +# Front panel BMC light +led_status.mode_2_0=config +led_status.src_2_0=cpld +led_status.frmt_2_0=bit +led_status.addr_2_0=0x000100d5 +led_status.len_2_0=3 + +led_status_decode_2_0=0 +led_status_decode_2_1=7 +led_status_decode_2_2=3 +led_status_decode_2_3=5 +led_status_decode_2_4=1 +led_status_decode_2_5=6 +led_status_decode_2_6=2 +led_status_decode_2_7=0 + +# Front panel FAN light +led_status.mode_4_0=config +led_status.src_4_0=cpld +led_status.frmt_4_0=bit +led_status.addr_4_0=0x000100d4 +led_status.len_4_0=3 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 4-Front panel FAN light +led_status_decode_4_0=0 +led_status_decode_4_1=7 +led_status_decode_4_2=3 +led_status_decode_4_3=5 +led_status_decode_4_4=1 +led_status_decode_4_5=6 +led_status_decode_4_6=2 +led_status_decode_4_7=0 + +# Front panel PSU light +led_status.mode_6_0=config +led_status.src_6_0=cpld +led_status.frmt_6_0=bit +led_status.addr_6_0=0x000100d3 +led_status.len_6_0=3 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 6-Front panel PSU light +led_status_decode_6_0=0 +led_status_decode_6_1=7 +led_status_decode_6_2=3 +led_status_decode_6_3=5 +led_status_decode_6_4=1 +led_status_decode_6_5=6 +led_status_decode_6_6=2 +led_status_decode_6_7=0 + +# Fan body lamp1 +led_status.mode_10_1=config +led_status.src_10_1=cpld +led_status.frmt_10_1=bit +led_status.addr_10_1=0x000600d0 +led_status.len_10_1=3 + +# Fan body lamp2 +led_status.mode_10_2=config +led_status.src_10_2=cpld +led_status.frmt_10_2=bit +led_status.addr_10_2=0x000600d1 +led_status.len_10_2=3 + +# Fan body lamp3 +led_status.mode_10_3=config +led_status.src_10_3=cpld +led_status.frmt_10_3=bit +led_status.addr_10_3=0x000600d2 +led_status.len_10_3=3 + +# Fan body lamp4 +led_status.mode_10_4=config +led_status.src_10_4=cpld +led_status.frmt_10_4=bit +led_status.addr_10_4=0x000600d3 +led_status.len_10_4=3 + + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 10-Fan body lamp +led_status_decode_10_0=0 +led_status_decode_10_1=7 +led_status_decode_10_2=3 +led_status_decode_10_3=5 +led_status_decode_10_4=1 +led_status_decode_10_5=6 +led_status_decode_10_6=2 +led_status_decode_10_7=0 + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/PSU.cfg new file mode 100644 index 00000000000..a344173b362 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/PSU.cfg @@ -0,0 +1,657 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration items: PSU number +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,PSU is 2, minor_dev,0 indicates the obtained number +dev_num_2_0=2 + +# Configuration items: PSU temperature sensors number +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,PSU is 2, minor_dev, 1:temperature +dev_num_2_1=3 + +# Configuration items: PSU E2 information +# Description: Format other_i2c_dev_[main_dev]_[psu_index] +# Note: main_dev,PSU is 2, psu_index:Power supply number, start with 1 +other_i2c_dev.bus_2_1=42 +other_i2c_dev.addr_2_1=0x50 +other_i2c_dev.bus_2_2=43 +other_i2c_dev.addr_2_2=0x50 + +# Configuration items: Mode of reading power supply E2 +# Description: Format psu_sysfs_name +# Note: If not configured, it is read by i2c, otherwise it is read by sysfs +psu_sysfs_name=eeprom + +other_i2c_dev.bus_2_5=42 +other_i2c_dev.addr_2_5=0x58 +other_i2c_dev.bus_2_6=43 +other_i2c_dev.addr_2_6=0x58 + +# Configuration items: PMBUS register address of the power supply +# Description: Format psu_status_[psu_index]_[reg_id] +# Note:psu_index:Power supply number,start with 1 reg_id, 9:Power Output Status (0x79) +psu_pmbus_reg.mode_1_9=config +psu_pmbus_reg.src_1_9=other_i2c +psu_pmbus_reg.frmt_1_9=byte +psu_pmbus_reg.pola_1_9=negative +psu_pmbus_reg.addr_1_9=0x02050079 +psu_pmbus_reg.len_1_9=2 +psu_pmbus_reg.bit_offset_1_9= + +psu_pmbus_reg.mode_2_9=config +psu_pmbus_reg.src_2_9=other_i2c +psu_pmbus_reg.frmt_2_9=byte +psu_pmbus_reg.pola_2_9=negative +psu_pmbus_reg.addr_2_9=0x02060079 +psu_pmbus_reg.len_2_9=2 +psu_pmbus_reg.bit_offset_2_9= + +# Configuration items:PMBUS register address of the power supply +# Description: Format psu_status_[psu_index]_[reg_id] +# Note:psu_index:Power supply number,start with 1 reg_id, 10:Power input Status (0x79) +psu_pmbus_reg.mode_1_10=config +psu_pmbus_reg.src_1_10=other_i2c +psu_pmbus_reg.frmt_1_10=byte +psu_pmbus_reg.pola_1_10=negative +psu_pmbus_reg.addr_1_10=0x02050079 +psu_pmbus_reg.len_1_10=2 +psu_pmbus_reg.bit_offset_1_10= + +psu_pmbus_reg.mode_2_10=config +psu_pmbus_reg.src_2_10=other_i2c +psu_pmbus_reg.frmt_2_10=byte +psu_pmbus_reg.pola_2_10=negative +psu_pmbus_reg.addr_2_10=0x02060079 +psu_pmbus_reg.len_2_10=2 +psu_pmbus_reg.bit_offset_2_10= + +# Configuration items:PMBUS register address of the power supply +# Description: Format psu_status_[psu_index]_[reg_id] +# Note:psu_index:Power supply number,,start with 1 reg_id 11:Power Input type (0x80) +psu_pmbus_reg.mode_1_11=config +psu_pmbus_reg.src_1_11=other_i2c +psu_pmbus_reg.frmt_1_11=byte +psu_pmbus_reg.pola_1_11=positive +psu_pmbus_reg.addr_1_11=0x02050080 +psu_pmbus_reg.len_1_11=1 +psu_pmbus_reg.bit_offset_1_11= + +psu_pmbus_reg.mode_2_11=config +psu_pmbus_reg.src_2_11=other_i2c +psu_pmbus_reg.frmt_2_11=byte +psu_pmbus_reg.pola_2_11=positive +psu_pmbus_reg.addr_2_11=0x02060080 +psu_pmbus_reg.len_2_11=1 +psu_pmbus_reg.bit_offset_2_11= + + +psu_pmbus_reg.mode_1_12=config +psu_pmbus_reg.src_1_12=other_i2c +psu_pmbus_reg.frmt_1_12=byte +psu_pmbus_reg.pola_1_12=positive +psu_pmbus_reg.addr_1_12=0x0205003b +psu_pmbus_reg.len_1_12=1 +psu_pmbus_reg.bit_offset_1_12= + +psu_pmbus_reg.mode_2_12=config +psu_pmbus_reg.src_2_12=other_i2c +psu_pmbus_reg.frmt_2_12=byte +psu_pmbus_reg.pola_2_12=positive +psu_pmbus_reg.addr_2_12=0x0206003b +psu_pmbus_reg.len_2_12=1 +psu_pmbus_reg.bit_offset_2_12= + +# Configuration items: Input status of the power module +# Description: Format psu_pmbus_id_[psu_index]_[psu_sensor_type]=value +# Note: psu_index is Power supply number,start with 1, psu_sensor_type is PMBUS type,Input stateis 10 +# value value:bus[8]_addr[16]_offset[8] +psu_pmbus_id_1_11=0x5F005880 +psu_pmbus_id_2_11=0x60005880 + + +# Configuration items: Address of the power status register +# Description: Format psu_status_[psu_index]_[status_id] +# Note: psu_index:Power supply number,start with 1 status_id 0:present 1:status 2:Alarm status +psu_status.mode_1_0=config +psu_status.src_1_0=cpld +psu_status.frmt_1_0=bit +psu_status.pola_1_0=negative +psu_status.addr_1_0=0x00010058 +psu_status.len_1_0=1 +psu_status.bit_offset_1_0=2 + +psu_status.mode_1_1=config +psu_status.src_1_1=cpld +psu_status.frmt_1_1=bit +psu_status.pola_1_1=positive +psu_status.addr_1_1=0x00010058 +psu_status.len_1_1=1 +psu_status.bit_offset_1_1=1 + +psu_status.mode_1_2=config +psu_status.src_1_2=cpld +psu_status.frmt_1_2=bit +psu_status.pola_1_2=positive +psu_status.addr_1_2=0x00010058 +psu_status.len_1_2=1 +psu_status.bit_offset_1_2=0 + +psu_status.mode_2_0=config +psu_status.src_2_0=cpld +psu_status.frmt_2_0=bit +psu_status.pola_2_0=negative +psu_status.addr_2_0=0x00010058 +psu_status.len_2_0=1 +psu_status.bit_offset_2_0=6 + +psu_status.mode_2_1=config +psu_status.src_2_1=cpld +psu_status.frmt_2_1=bit +psu_status.pola_2_1=positive +psu_status.addr_2_1=0x00010058 +psu_status.len_2_1=1 +psu_status.bit_offset_2_1=5 + +psu_status.mode_2_2=config +psu_status.src_2_2=cpld +psu_status.frmt_2_2=bit +psu_status.pola_2_2=positive +psu_status.addr_2_2=0x00010058 +psu_status.len_2_2=1 +psu_status.bit_offset_2_2=4 + +# Configuration items:PSU PMBUS information +# Description: Format hwmon_psu_[psu_index]_[sensor_type] +# Note: psu_index:Power supply number,start with 1 sensor_type definition is as follows: +# 0:None 1:in_vol 2:in_curr 3:in_power 4:out_vol 5:out_curr 6:out_power 7:fan +# psu1 in_vol +hwmon_psu.mode_1_1=config +hwmon_psu.int_cons_1_1=0 +hwmon_psu.src_1_1=file +hwmon_psu.frmt_1_1=buf +hwmon_psu.fpath_1_1=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_1=0 +hwmon_psu.len_1_1=8 +hwmon_psu.bit_offset_1_1= +hwmon_psu.str_cons_1_1=in1_input + +# psu1 in_curr +hwmon_psu.mode_1_2=config +hwmon_psu.int_cons_1_2=0 +hwmon_psu.src_1_2=file +hwmon_psu.frmt_1_2=buf +hwmon_psu.fpath_1_2=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_2=0 +hwmon_psu.len_1_2=8 +hwmon_psu.bit_offset_1_2= +hwmon_psu.str_cons_1_2=curr1_input + +# psu1 in_power +hwmon_psu.mode_1_3=config +hwmon_psu.int_cons_1_3=0 +hwmon_psu.src_1_3=file +hwmon_psu.frmt_1_3=buf +hwmon_psu.fpath_1_3=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_3=0 +hwmon_psu.len_1_3=16 +hwmon_psu.bit_offset_1_3=0 +hwmon_psu.str_cons_1_3=power1_input + +# psu1 out_vol +hwmon_psu.mode_1_4=config +hwmon_psu.int_cons_1_4=0 +hwmon_psu.src_1_4=file +hwmon_psu.frmt_1_4=buf +hwmon_psu.fpath_1_4=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_4=0 +hwmon_psu.len_1_4=8 +hwmon_psu.bit_offset_1_4= +hwmon_psu.str_cons_1_4=in2_input + +# psu1 out_curr +hwmon_psu.mode_1_5=config +hwmon_psu.int_cons_1_5=0 +hwmon_psu.src_1_5=file +hwmon_psu.frmt_1_5=buf +hwmon_psu.fpath_1_5=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_5=0 +hwmon_psu.len_1_5=8 +hwmon_psu.bit_offset_1_5= +hwmon_psu.str_cons_1_5=curr2_input + +# psu1 out_power +hwmon_psu.mode_1_6=config +hwmon_psu.int_cons_1_6=0 +hwmon_psu.src_1_6=file +hwmon_psu.frmt_1_6=buf +hwmon_psu.fpath_1_6=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_6=0 +hwmon_psu.len_1_6=16 +hwmon_psu.bit_offset_1_6=0 +hwmon_psu.str_cons_1_6=power2_input + +# psu1 fan +hwmon_psu.mode_1_7=config +hwmon_psu.int_cons_1_7= +hwmon_psu.src_1_7=file +hwmon_psu.frmt_1_7=buf +hwmon_psu.fpath_1_7=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_psu.addr_1_7=0 +hwmon_psu.len_1_7=8 +hwmon_psu.bit_offset_1_7= +hwmon_psu.str_cons_1_7=fan1_input + +# psu2 in_vol +hwmon_psu.mode_2_1=config +hwmon_psu.int_cons_2_1=0 +hwmon_psu.src_2_1=file +hwmon_psu.frmt_2_1=buf +hwmon_psu.fpath_2_1=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_1=0 +hwmon_psu.len_2_1=8 +hwmon_psu.bit_offset_2_1= +hwmon_psu.str_cons_2_1=in1_input + +# psu2 in_curr +hwmon_psu.mode_2_2=config +hwmon_psu.int_cons_2_2=0 +hwmon_psu.src_2_2=file +hwmon_psu.frmt_2_2=buf +hwmon_psu.fpath_2_2=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_2=0 +hwmon_psu.len_2_2=8 +hwmon_psu.bit_offset_2_2= +hwmon_psu.str_cons_2_2=curr1_input + +# psu2 in_power +hwmon_psu.mode_2_3=config +hwmon_psu.int_cons_2_3=0 +hwmon_psu.src_2_3=file +hwmon_psu.frmt_2_3=buf +hwmon_psu.fpath_2_3=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_3=0 +hwmon_psu.len_2_3=16 +hwmon_psu.bit_offset_2_3=0 +hwmon_psu.str_cons_2_3=power1_input + +# psu2 out_vol +hwmon_psu.mode_2_4=config +hwmon_psu.int_cons_2_4=0 +hwmon_psu.src_2_4=file +hwmon_psu.frmt_2_4=buf +hwmon_psu.fpath_2_4=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_4=0 +hwmon_psu.len_2_4=8 +hwmon_psu.bit_offset_2_4= +hwmon_psu.str_cons_2_4=in2_input + +# psu2 out_curr +hwmon_psu.mode_2_5=config +hwmon_psu.int_cons_2_5=0 +hwmon_psu.src_2_5=file +hwmon_psu.frmt_2_5=buf +hwmon_psu.fpath_2_5=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_5=0 +hwmon_psu.len_2_5=8 +hwmon_psu.bit_offset_2_5= +hwmon_psu.str_cons_2_5=curr2_input + +# psu2 out_power +hwmon_psu.mode_2_6=config +hwmon_psu.int_cons_2_6=0 +hwmon_psu.src_2_6=file +hwmon_psu.frmt_2_6=buf +hwmon_psu.fpath_2_6=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_6=0 +hwmon_psu.len_2_6=16 +hwmon_psu.bit_offset_2_6=0 +hwmon_psu.str_cons_2_6=power2_input + +# psu2 fan +hwmon_psu.mode_2_7=config +hwmon_psu.int_cons_2_7= +hwmon_psu.src_2_7=file +hwmon_psu.frmt_2_7=buf +hwmon_psu.fpath_2_7=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_psu.addr_2_7=0 +hwmon_psu.len_2_7=8 +hwmon_psu.bit_offset_2_7= +hwmon_psu.str_cons_2_7=fan1_input + + +# Configuration items: Temperature hwmon path +# Description: Format hwmon_temp[key1]_[key2] +# Note: key1: high 8bit indicates the index of the device (start with 1), and the low 8bit indicates the temperature index,start with 1 +# key2: high 4bit indicates the main device type, the power supply is 5, and the low 4bit indicates the temperature type +# 0:input 1:alias 2:type 3:max 4:max_hyst 5:min 6:crit +# mode: str_constant takes the value of str_cons directly, and config reads it in the way specified by src +# int_cons:N raw value/(10^N) +# fpath:hwmon first half of the path +# bit_offset: Number of decimal places, retain original precision if not configured +# str_cons:if mode is str_constant,the value is result of read,if read from file the value is read file name. + +# psu1 temp1 input +hwmon_temp.mode_0x0101_0x20=config +hwmon_temp.int_cons_0x0101_0x20=0 +hwmon_temp.src_0x0101_0x20=file +hwmon_temp.frmt_0x0101_0x20=buf +hwmon_temp.fpath_0x0101_0x20=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_temp.addr_0x0101_0x20=0 +hwmon_temp.len_0x0101_0x20=8 +hwmon_temp.bit_offset_0x0101_0x20= +hwmon_temp.str_cons_0x0101_0x20=temp1_input + +# psu1 temp1 alias +hwmon_temp.mode_0x0101_0x21=str_constant +hwmon_temp.str_cons_0x0101_0x21=temp1 +# psu1 temp1 max +hwmon_temp.mode_0x0101_0x23=str_constant +hwmon_temp.str_cons_0x0101_0x23=60000 +# psu1 temp1 min +hwmon_temp.mode_0x0101_0x25=str_constant +hwmon_temp.str_cons_0x0101_0x25=-10000 +# psu1 temp1 type +hwmon_temp.mode_0x0101_0x22=str_constant +hwmon_temp.str_cons_0x0101_0x22=psu_pmbus + +# psu1 temp2 input +hwmon_temp.mode_0x0102_0x20=config +hwmon_temp.int_cons_0x0102_0x20=0 +hwmon_temp.src_0x0102_0x20=file +hwmon_temp.frmt_0x0102_0x20=buf +hwmon_temp.fpath_0x0102_0x20=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_temp.addr_0x0102_0x20=0 +hwmon_temp.len_0x0102_0x20=8 +hwmon_temp.bit_offset_0x0102_0x20= +hwmon_temp.str_cons_0x0102_0x20=temp2_input + +# psu1 temp2 alias +hwmon_temp.mode_0x0102_0x21=str_constant +hwmon_temp.str_cons_0x0102_0x21=temp2 +# psu1 temp2 max +hwmon_temp.mode_0x0102_0x23=str_constant +hwmon_temp.str_cons_0x0102_0x23=60000 +# psu1 temp2 min +hwmon_temp.mode_0x0102_0x25=str_constant +hwmon_temp.str_cons_0x0102_0x25=-10000 +# psu1 temp2 type +hwmon_temp.mode_0x0102_0x22=str_constant +hwmon_temp.str_cons_0x0102_0x22=psu_pmbus + +# psu1 temp3 input +hwmon_temp.mode_0x0103_0x20=config +hwmon_temp.int_cons_0x0103_0x20=0 +hwmon_temp.src_0x0103_0x20=file +hwmon_temp.frmt_0x0103_0x20=buf +hwmon_temp.fpath_0x0103_0x20=/sys/bus/i2c/devices/42-0058/hwmon/ +hwmon_temp.addr_0x0103_0x20=0 +hwmon_temp.len_0x0103_0x20=8 +hwmon_temp.bit_offset_0x0103_0x20= +hwmon_temp.str_cons_0x0103_0x20=temp3_input + +# psu1 temp3 alias +hwmon_temp.mode_0x0103_0x21=str_constant +hwmon_temp.str_cons_0x0103_0x21=temp3 +# psu1 temp3 max +hwmon_temp.mode_0x0103_0x23=str_constant +hwmon_temp.str_cons_0x0103_0x23=60000 +# psu1 temp3 min +hwmon_temp.mode_0x0103_0x25=str_constant +hwmon_temp.str_cons_0x0103_0x25=-10000 +# psu1 temp1 type +hwmon_temp.mode_0x0103_0x22=str_constant +hwmon_temp.str_cons_0x0103_0x22=psu_pmbus + +# psu2 temp1 input +hwmon_temp.mode_0x0201_0x20=config +hwmon_temp.int_cons_0x0201_0x20=0 +hwmon_temp.src_0x0201_0x20=file +hwmon_temp.frmt_0x0201_0x20=buf +hwmon_temp.fpath_0x0201_0x20=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_temp.addr_0x0201_0x20=0 +hwmon_temp.len_0x0201_0x20=8 +hwmon_temp.bit_offset_0x0201_0x20= +hwmon_temp.str_cons_0x0201_0x20=temp1_input + +# psu2 temp1 alias +hwmon_temp.mode_0x0201_0x21=str_constant +hwmon_temp.str_cons_0x0201_0x21=temp1 +# psu2 temp1 max +hwmon_temp.mode_0x0201_0x23=str_constant +hwmon_temp.str_cons_0x0201_0x23=60000 +# psu2 temp1 min +hwmon_temp.mode_0x0201_0x25=str_constant +hwmon_temp.str_cons_0x0201_0x25=-10000 +# psu2 temp1 type +hwmon_temp.mode_0x0201_0x22=str_constant +hwmon_temp.str_cons_0x0201_0x22=psu_pmbus + +# psu2 temp2 input +hwmon_temp.mode_0x0202_0x20=config +hwmon_temp.int_cons_0x0202_0x20=0 +hwmon_temp.src_0x0202_0x20=file +hwmon_temp.frmt_0x0202_0x20=buf +hwmon_temp.fpath_0x0202_0x20=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_temp.addr_0x0202_0x20=0 +hwmon_temp.len_0x0202_0x20=8 +hwmon_temp.bit_offset_0x0202_0x20= +hwmon_temp.str_cons_0x0202_0x20=temp2_input + +# psu2 temp2 alias +hwmon_temp.mode_0x0202_0x21=str_constant +hwmon_temp.str_cons_0x0202_0x21=temp2 +# psu2 temp2 max +hwmon_temp.mode_0x0202_0x23=str_constant +hwmon_temp.str_cons_0x0202_0x23=60000 +# psu2 temp2 min +hwmon_temp.mode_0x0202_0x25=str_constant +hwmon_temp.str_cons_0x0202_0x25=-10000 +# psu2 temp2 type +hwmon_temp.mode_0x0202_0x22=str_constant +hwmon_temp.str_cons_0x0202_0x22=psu_pmbus + +# psu2 temp3 input +hwmon_temp.mode_0x0203_0x20=config +hwmon_temp.int_cons_0x0203_0x20=0 +hwmon_temp.src_0x0203_0x20=file +hwmon_temp.frmt_0x0203_0x20=buf +hwmon_temp.fpath_0x0203_0x20=/sys/bus/i2c/devices/43-0058/hwmon/ +hwmon_temp.addr_0x0203_0x20=0 +hwmon_temp.len_0x0203_0x20=8 +hwmon_temp.bit_offset_0x0203_0x20= +hwmon_temp.str_cons_0x0203_0x20=temp3_input + +# psu2 temp3 alias +hwmon_temp.mode_0x0203_0x21=str_constant +hwmon_temp.str_cons_0x0203_0x21=temp3 +# psu2 temp3 max +hwmon_temp.mode_0x0203_0x23=str_constant +hwmon_temp.str_cons_0x0203_0x23=60000 +# psu2 temp3 min +hwmon_temp.mode_0x0203_0x25=str_constant +hwmon_temp.str_cons_0x0203_0x25=-10000 +# psu2 temp3 type +hwmon_temp.mode_0x0203_0x22=str_constant +hwmon_temp.str_cons_0x0203_0x22=psu_pmbus + +# psu3 temp1 input +hwmon_temp.mode_0x0301_0x20=config +hwmon_temp.int_cons_0x0301_0x20=0 +hwmon_temp.src_0x0301_0x20=file +hwmon_temp.frmt_0x0301_0x20=buf +hwmon_temp.fpath_0x0301_0x20=/sys/bus/i2c/devices/97-0058/hwmon/ +hwmon_temp.addr_0x0301_0x20=0 +hwmon_temp.len_0x0301_0x20=8 +hwmon_temp.bit_offset_0x0301_0x20= +hwmon_temp.str_cons_0x0301_0x20=temp1_input + +# psu3 temp1 alias +hwmon_temp.mode_0x0301_0x21=str_constant +hwmon_temp.str_cons_0x0301_0x21=temp1 +# psu3 temp1 max +hwmon_temp.mode_0x0301_0x23=str_constant +hwmon_temp.str_cons_0x0301_0x23=60000 +# psu3 temp1 min +hwmon_temp.mode_0x0301_0x25=str_constant +hwmon_temp.str_cons_0x0301_0x25=-10000 +# psu3 temp1 type +hwmon_temp.mode_0x0301_0x22=str_constant +hwmon_temp.str_cons_0x0301_0x22=psu_pmbus + +# psu3 temp2 input +hwmon_temp.mode_0x0302_0x20=config +hwmon_temp.int_cons_0x0302_0x20=0 +hwmon_temp.src_0x0302_0x20=file +hwmon_temp.frmt_0x0302_0x20=buf +hwmon_temp.fpath_0x0302_0x20=/sys/bus/i2c/devices/97-0058/hwmon/ +hwmon_temp.addr_0x0302_0x20=0 +hwmon_temp.len_0x0302_0x20=8 +hwmon_temp.bit_offset_0x0302_0x20= +hwmon_temp.str_cons_0x0302_0x20=temp2_input + +# psu3 temp2 alias +hwmon_temp.mode_0x0302_0x21=str_constant +hwmon_temp.str_cons_0x0302_0x21=temp2 +# psu3 temp2 max +hwmon_temp.mode_0x0302_0x23=str_constant +hwmon_temp.str_cons_0x0302_0x23=60000 +# psu3 temp2 min +hwmon_temp.mode_0x0302_0x25=str_constant +hwmon_temp.str_cons_0x0302_0x25=-10000 +# psu3 temp2 type +hwmon_temp.mode_0x0302_0x22=str_constant +hwmon_temp.str_cons_0x0302_0x22=psu_pmbus + +# psu3 temp3 input +hwmon_temp.mode_0x0303_0x20=config +hwmon_temp.int_cons_0x0303_0x20=0 +hwmon_temp.src_0x0303_0x20=file +hwmon_temp.frmt_0x0303_0x20=buf +hwmon_temp.fpath_0x0303_0x20=/sys/bus/i2c/devices/97-0058/hwmon/ +hwmon_temp.addr_0x0303_0x20=0 +hwmon_temp.len_0x0303_0x20=8 +hwmon_temp.bit_offset_0x0303_0x20= +hwmon_temp.str_cons_0x0303_0x20=temp3_input + +# psu3 temp3 alias +hwmon_temp.mode_0x0303_0x21=str_constant +hwmon_temp.str_cons_0x0303_0x21=temp3 +# psu3 temp3 max +hwmon_temp.mode_0x0303_0x23=str_constant +hwmon_temp.str_cons_0x0303_0x23=60000 +# psu3 temp3 min +hwmon_temp.mode_0x0303_0x25=str_constant +hwmon_temp.str_cons_0x0303_0x25=-10000 +# psu3 temp3 type +hwmon_temp.mode_0x0303_0x22=str_constant +hwmon_temp.str_cons_0x0303_0x22=psu_pmbus + +# psu4 temp1 input +hwmon_temp.mode_0x0401_0x20=config +hwmon_temp.int_cons_0x0401_0x20=0 +hwmon_temp.src_0x0401_0x20=file +hwmon_temp.frmt_0x0401_0x20=buf +hwmon_temp.fpath_0x0401_0x20=/sys/bus/i2c/devices/98-0058/hwmon/ +hwmon_temp.addr_0x0401_0x20=0 +hwmon_temp.len_0x0401_0x20=8 +hwmon_temp.bit_offset_0x0401_0x20= +hwmon_temp.str_cons_0x0401_0x20=temp1_input + +# psu4 temp1 alias +hwmon_temp.mode_0x0401_0x21=str_constant +hwmon_temp.str_cons_0x0401_0x21=temp1 +# psu4 temp1 max +hwmon_temp.mode_0x0401_0x23=str_constant +hwmon_temp.str_cons_0x0401_0x23=60000 +# psu4 temp1 min +hwmon_temp.mode_0x0401_0x25=str_constant +hwmon_temp.str_cons_0x0401_0x25=-10000 +# psu4 temp1 type +hwmon_temp.mode_0x0401_0x22=str_constant +hwmon_temp.str_cons_0x0401_0x22=psu_pmbus + +# psu4 temp2 input +hwmon_temp.mode_0x0402_0x20=config +hwmon_temp.int_cons_0x0402_0x20=0 +hwmon_temp.src_0x0402_0x20=file +hwmon_temp.frmt_0x0402_0x20=buf +hwmon_temp.fpath_0x0402_0x20=/sys/bus/i2c/devices/98-0058/hwmon/ +hwmon_temp.addr_0x0402_0x20=0 +hwmon_temp.len_0x0402_0x20=8 +hwmon_temp.bit_offset_0x0402_0x20= +hwmon_temp.str_cons_0x0402_0x20=temp2_input + +# psu4 temp2 alias +hwmon_temp.mode_0x0402_0x21=str_constant +hwmon_temp.str_cons_0x0402_0x21=temp2 +# psu4 temp2 max +hwmon_temp.mode_0x0402_0x23=str_constant +hwmon_temp.str_cons_0x0402_0x23=60000 +# psu4 temp2 min +hwmon_temp.mode_0x0402_0x25=str_constant +hwmon_temp.str_cons_0x0402_0x25=-10000 +# psu4 temp2 type +hwmon_temp.mode_0x0402_0x22=str_constant +hwmon_temp.str_cons_0x0402_0x22=psu_pmbus + +# psu4 temp3 input +hwmon_temp.mode_0x0403_0x20=config +hwmon_temp.int_cons_0x0403_0x20=0 +hwmon_temp.src_0x0403_0x20=file +hwmon_temp.frmt_0x0403_0x20=buf +hwmon_temp.fpath_0x0403_0x20=/sys/bus/i2c/devices/98-0058/hwmon/ +hwmon_temp.addr_0x0403_0x20=0 +hwmon_temp.len_0x0403_0x20=8 +hwmon_temp.bit_offset_0x0403_0x20= +hwmon_temp.str_cons_0x0403_0x20=temp3_input + +# psu4 temp3 alias +hwmon_temp.mode_0x0403_0x21=str_constant +hwmon_temp.str_cons_0x0403_0x21=temp3 +# psu4 temp3 max +hwmon_temp.mode_0x0403_0x23=str_constant +hwmon_temp.str_cons_0x0403_0x23=60000 +# psu4 temp3 min +hwmon_temp.mode_0x0403_0x25=str_constant +hwmon_temp.str_cons_0x0403_0x25=-10000 +# psu4 temp3 type +hwmon_temp.mode_0x0403_0x22=str_constant +hwmon_temp.str_cons_0x0403_0x22=psu_pmbus + +# Configuration items: The number of power supply names displayed by the product +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,PSU is 2, minor_dev, 6:The number of power supply names displayed +dev_num_2_6=2 + +# Configuration items: Product power supply type name +# Description: Format power_name_[index1]_[index2] +# Note: index1 Indicates the power supply displayed ID, start with 1, +# index2 Indicates different power supplies with the same ID, start with 1 +power_name_1_1=ECDL3000123 +power_name_1_2=CRPS3000CL + +# Configuration items: The power supply name is displayed +# Description: Format decode_power_name_[index] +# Note: index Indicates the power supply displayed ID +decode_power_name_1=PA3000I-F + + +# Configuration items: Rated power of supply +# Description: Format power_rate_supply_[index] +# Note: index Indicates the power supply displayed ID +power_rate_supply_1=1300000000 + +# Configuration items: Displays the type of power duct +# Description: Format decode_power_fan_dir_[index] +# Note: index Indicates the power supply displayed ID,attr 0 indicates -F and 1 indicates -R +decode_power_fan_dir_1=0 +decode_power_fan_dir_2=1 + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg new file mode 100644 index 00000000000..7bdfdcd9369 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg @@ -0,0 +1,3463 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration item: Temperature hwmon path +# Description: Format hwmon_temp[key1]_[key2] +# Note: key1: A high 8bit indicates the device index starting from 1. A low 8bit indicates the temperature index starting from 1 +# key2:The high 4bit indicates the main device type, the sub-card is 5, and the low 4bit indicates the temperature type 0:input 1:alias +# 2:type 3:max 4:max_hyst 5:min 6:crit +# mode: str_constant takes the value of str_cons directly, and config reads it in the way specified by src +# int_cons:N raw value/(10^N) +# fpath:hwmon first half of the path +# bit_offset: Number of decimal places, retain original precision if not configured +# str_cons:if mode is str_constant,the value is result of read,if read from file the value is read file name. + +# temperature sensor number +dev_num_0_1=20 + +# voltage sensors number +dev_num_0_2=112 + +# current sensors number +dev_num_0_3=7 + +# value : 0 +# alias : 1 +# type : 2 +# max : 3 +# hyst : 4 +# min : 5 +# crit : 6 +# range : 7 +# nominal_value : 8 +# high : 9 +# low : 10 + +# sensor temp1 input +hwmon_temp.mode_0x0001_0x00=config +hwmon_temp.int_cons_0x0001_0x00=0 +hwmon_temp.src_0x0001_0x00=file +hwmon_temp.frmt_0x0001_0x00=buf +hwmon_temp.fpath_0x0001_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0001_0x00=0 +hwmon_temp.len_0x0001_0x00=8 +hwmon_temp.bit_offset_0x0001_0x00= +hwmon_temp.str_cons_0x0001_0x00=temp1_input + +# sensor temp1 alias +hwmon_temp.mode_0x0001_0x01=config +hwmon_temp.int_cons_0x0001_0x01= +hwmon_temp.src_0x0001_0x01=file +hwmon_temp.frmt_0x0001_0x01=buf +hwmon_temp.fpath_0x0001_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0001_0x01=0 +hwmon_temp.len_0x0001_0x01=16 +hwmon_temp.bit_offset_0x0001_0x01= +hwmon_temp.str_cons_0x0001_0x01=temp1_label +# sensor temp1 type +hwmon_temp.mode_0x0001_0x02=str_constant +hwmon_temp.str_cons_0x0001_0x02=cpu + +# sensor temp1 max +hwmon_temp.mode_0x0001_0x03=config +hwmon_temp.int_cons_0x0001_0x03=0 +hwmon_temp.src_0x0001_0x03=file +hwmon_temp.frmt_0x0001_0x03=buf +hwmon_temp.fpath_0x0001_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0001_0x03=0 +hwmon_temp.len_0x0001_0x03=8 +hwmon_temp.bit_offset_0x0001_0x03= +hwmon_temp.str_cons_0x0001_0x03=temp1_max +# sensor temp1 min +hwmon_temp.mode_0x0001_0x05=str_constant +hwmon_temp.str_cons_0x0001_0x05=-30000 + +# sensor temp2 input +hwmon_temp.mode_0x0002_0x00=config +hwmon_temp.int_cons_0x0002_0x00=0 +hwmon_temp.src_0x0002_0x00=file +hwmon_temp.frmt_0x0002_0x00=buf +hwmon_temp.fpath_0x0002_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0002_0x00=0 +hwmon_temp.len_0x0002_0x00=8 +hwmon_temp.bit_offset_0x0002_0x00= +hwmon_temp.str_cons_0x0002_0x00=temp2_input + +# sensor temp2 alias +hwmon_temp.mode_0x0002_0x01=config +hwmon_temp.int_cons_0x0002_0x01= +hwmon_temp.src_0x0002_0x01=file +hwmon_temp.frmt_0x0002_0x01=buf +hwmon_temp.fpath_0x0002_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0002_0x01=0 +hwmon_temp.len_0x0002_0x01=16 +hwmon_temp.bit_offset_0x0002_0x01= +hwmon_temp.str_cons_0x0002_0x01=temp2_label + +hwmon_temp.mode_0x0002_0x02=str_constant +hwmon_temp.str_cons_0x0002_0x02=cpu + +# sensor temp2 max +hwmon_temp.mode_0x0002_0x03=config +hwmon_temp.int_cons_0x0002_0x03=0 +hwmon_temp.src_0x0002_0x03=file +hwmon_temp.frmt_0x0002_0x03=buf +hwmon_temp.fpath_0x0002_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0002_0x03=0 +hwmon_temp.len_0x0002_0x03=8 +hwmon_temp.bit_offset_0x0002_0x03= +hwmon_temp.str_cons_0x0002_0x03=temp2_max +# sensor temp2 min +hwmon_temp.mode_0x0002_0x05=str_constant +hwmon_temp.str_cons_0x0002_0x05=-30000 + +# sensor temp3 input +hwmon_temp.mode_0x0003_0x00=config +hwmon_temp.int_cons_0x0003_0x00=0 +hwmon_temp.src_0x0003_0x00=file +hwmon_temp.frmt_0x0003_0x00=buf +hwmon_temp.fpath_0x0003_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0003_0x00=0 +hwmon_temp.len_0x0003_0x00=8 +hwmon_temp.bit_offset_0x0003_0x00= +hwmon_temp.str_cons_0x0003_0x00=temp3_input + +# sensor temp3 alias +hwmon_temp.mode_0x0003_0x01=config +hwmon_temp.int_cons_0x0003_0x01= +hwmon_temp.src_0x0003_0x01=file +hwmon_temp.frmt_0x0003_0x01=buf +hwmon_temp.fpath_0x0003_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0003_0x01=0 +hwmon_temp.len_0x0003_0x01=16 +hwmon_temp.bit_offset_0x0003_0x01= +hwmon_temp.str_cons_0x0003_0x01=temp3_label + +hwmon_temp.mode_0x0003_0x02=str_constant +hwmon_temp.str_cons_0x0003_0x02=cpu + +# sensor temp3 max +hwmon_temp.mode_0x0003_0x03=config +hwmon_temp.int_cons_0x0003_0x03=0 +hwmon_temp.src_0x0003_0x03=file +hwmon_temp.frmt_0x0003_0x03=buf +hwmon_temp.fpath_0x0003_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0003_0x03=0 +hwmon_temp.len_0x0003_0x03=8 +hwmon_temp.bit_offset_0x0003_0x03= +hwmon_temp.str_cons_0x0003_0x03=temp3_max +# sensor temp3 min +hwmon_temp.mode_0x0003_0x05=str_constant +hwmon_temp.str_cons_0x0003_0x05=-30000 + +# sensor temp4 input +hwmon_temp.mode_0x0004_0x00=config +hwmon_temp.int_cons_0x0004_0x00=0 +hwmon_temp.src_0x0004_0x00=file +hwmon_temp.frmt_0x0004_0x00=buf +hwmon_temp.fpath_0x0004_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0004_0x00=0 +hwmon_temp.len_0x0004_0x00=8 +hwmon_temp.bit_offset_0x0004_0x00= +hwmon_temp.str_cons_0x0004_0x00=temp4_input + +# sensor temp4 alias +hwmon_temp.mode_0x0004_0x01=config +hwmon_temp.int_cons_0x0004_0x01= +hwmon_temp.src_0x0004_0x01=file +hwmon_temp.frmt_0x0004_0x01=buf +hwmon_temp.fpath_0x0004_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0004_0x01=0 +hwmon_temp.len_0x0004_0x01=16 +hwmon_temp.bit_offset_0x0004_0x01= +hwmon_temp.str_cons_0x0004_0x01=temp4_label + +hwmon_temp.mode_0x0004_0x02=str_constant +hwmon_temp.str_cons_0x0004_0x02=cpu + +# sensor temp4 max +hwmon_temp.mode_0x0004_0x03=config +hwmon_temp.int_cons_0x0004_0x03=0 +hwmon_temp.src_0x0004_0x03=file +hwmon_temp.frmt_0x0004_0x03=buf +hwmon_temp.fpath_0x0004_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0004_0x03=0 +hwmon_temp.len_0x0004_0x03=8 +hwmon_temp.bit_offset_0x0004_0x03= +hwmon_temp.str_cons_0x0004_0x03=temp4_max +# sensor temp4 min +hwmon_temp.mode_0x0004_0x05=str_constant +hwmon_temp.str_cons_0x0004_0x05=-30000 + +# sensor temp5 input +hwmon_temp.mode_0x0005_0x00=config +hwmon_temp.int_cons_0x0005_0x00=0 +hwmon_temp.src_0x0005_0x00=file +hwmon_temp.frmt_0x0005_0x00=buf +hwmon_temp.fpath_0x0005_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0005_0x00=0 +hwmon_temp.len_0x0005_0x00=8 +hwmon_temp.bit_offset_0x0005_0x00= +hwmon_temp.str_cons_0x0005_0x00=temp5_input + +# sensor temp5 alias +hwmon_temp.mode_0x0005_0x01=config +hwmon_temp.int_cons_0x0005_0x01= +hwmon_temp.src_0x0005_0x01=file +hwmon_temp.frmt_0x0005_0x01=buf +hwmon_temp.fpath_0x0005_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0005_0x01=0 +hwmon_temp.len_0x0005_0x01=16 +hwmon_temp.bit_offset_0x0005_0x01= +hwmon_temp.str_cons_0x0005_0x01=temp5_label + +hwmon_temp.mode_0x0005_0x02=str_constant +hwmon_temp.str_cons_0x0005_0x02=cpu + +# sensor temp5 max +hwmon_temp.mode_0x0005_0x03=config +hwmon_temp.int_cons_0x0005_0x03=0 +hwmon_temp.src_0x0005_0x03=file +hwmon_temp.frmt_0x0005_0x03=buf +hwmon_temp.fpath_0x0005_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0005_0x03=0 +hwmon_temp.len_0x0005_0x03=8 +hwmon_temp.bit_offset_0x0005_0x03= +hwmon_temp.str_cons_0x0005_0x03=temp5_max +# sensor temp5 min +hwmon_temp.mode_0x0005_0x05=str_constant +hwmon_temp.str_cons_0x0005_0x05=-30000 + +# sensor temp6 input +hwmon_temp.mode_0x0006_0x00=config +hwmon_temp.int_cons_0x0006_0x00=0 +hwmon_temp.src_0x0006_0x00=file +hwmon_temp.frmt_0x0006_0x00=buf +hwmon_temp.fpath_0x0006_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0006_0x00=0 +hwmon_temp.len_0x0006_0x00=8 +hwmon_temp.bit_offset_0x0006_0x00= +hwmon_temp.str_cons_0x0006_0x00=temp6_input + +# sensor temp6 alias +hwmon_temp.mode_0x0006_0x01=config +hwmon_temp.int_cons_0x0006_0x01= +hwmon_temp.src_0x0006_0x01=file +hwmon_temp.frmt_0x0006_0x01=buf +hwmon_temp.fpath_0x0006_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0006_0x01=0 +hwmon_temp.len_0x0006_0x01=16 +hwmon_temp.bit_offset_0x0006_0x01= +hwmon_temp.str_cons_0x0006_0x01=temp6_label + +hwmon_temp.mode_0x0006_0x02=str_constant +hwmon_temp.str_cons_0x0006_0x02=cpu + +# sensor temp6 max +hwmon_temp.mode_0x0006_0x03=config +hwmon_temp.int_cons_0x0006_0x03=0 +hwmon_temp.src_0x0006_0x03=file +hwmon_temp.frmt_0x0006_0x03=buf +hwmon_temp.fpath_0x0006_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0006_0x03=0 +hwmon_temp.len_0x0006_0x03=8 +hwmon_temp.bit_offset_0x0006_0x03= +hwmon_temp.str_cons_0x0006_0x03=temp6_max +# sensor temp6 min +hwmon_temp.mode_0x0006_0x05=str_constant +hwmon_temp.str_cons_0x0006_0x05=-30000 + +# sensor temp7 input +hwmon_temp.mode_0x0007_0x00=config +hwmon_temp.int_cons_0x0007_0x00=0 +hwmon_temp.src_0x0007_0x00=file +hwmon_temp.frmt_0x0007_0x00=buf +hwmon_temp.fpath_0x0007_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0007_0x00=0 +hwmon_temp.len_0x0007_0x00=8 +hwmon_temp.bit_offset_0x0007_0x00= +hwmon_temp.str_cons_0x0007_0x00=temp7_input + +# sensor temp7 alias +hwmon_temp.mode_0x0007_0x01=config +hwmon_temp.int_cons_0x0007_0x01= +hwmon_temp.src_0x0007_0x01=file +hwmon_temp.frmt_0x0007_0x01=buf +hwmon_temp.fpath_0x0007_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0007_0x01=0 +hwmon_temp.len_0x0007_0x01=16 +hwmon_temp.bit_offset_0x0007_0x01= +hwmon_temp.str_cons_0x0007_0x01=temp7_label + +hwmon_temp.mode_0x0007_0x02=str_constant +hwmon_temp.str_cons_0x0007_0x02=cpu + +# sensor temp7 max +hwmon_temp.mode_0x0007_0x03=config +hwmon_temp.int_cons_0x0007_0x03=0 +hwmon_temp.src_0x0007_0x03=file +hwmon_temp.frmt_0x0007_0x03=buf +hwmon_temp.fpath_0x0007_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0007_0x03=0 +hwmon_temp.len_0x0007_0x03=8 +hwmon_temp.bit_offset_0x0007_0x03= +hwmon_temp.str_cons_0x0007_0x03=temp7_max +# sensor temp7 min +hwmon_temp.mode_0x0007_0x05=str_constant +hwmon_temp.str_cons_0x0007_0x05=-30000 + +# sensor temp8 input +hwmon_temp.mode_0x0008_0x00=config +hwmon_temp.int_cons_0x0008_0x00=0 +hwmon_temp.src_0x0008_0x00=file +hwmon_temp.frmt_0x0008_0x00=buf +hwmon_temp.fpath_0x0008_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0008_0x00=0 +hwmon_temp.len_0x0008_0x00=8 +hwmon_temp.bit_offset_0x0008_0x00= +hwmon_temp.str_cons_0x0008_0x00=temp8_input + +# sensor temp8 alias +hwmon_temp.mode_0x0008_0x01=config +hwmon_temp.int_cons_0x0008_0x01= +hwmon_temp.src_0x0008_0x01=file +hwmon_temp.frmt_0x0008_0x01=buf +hwmon_temp.fpath_0x0008_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0008_0x01=0 +hwmon_temp.len_0x0008_0x01=16 +hwmon_temp.bit_offset_0x0008_0x01= +hwmon_temp.str_cons_0x0008_0x01=temp8_label + +hwmon_temp.mode_0x0008_0x02=str_constant +hwmon_temp.str_cons_0x0008_0x02=cpu + +# sensor temp8 max +hwmon_temp.mode_0x0008_0x03=config +hwmon_temp.int_cons_0x0008_0x03=0 +hwmon_temp.src_0x0008_0x03=file +hwmon_temp.frmt_0x0008_0x03=buf +hwmon_temp.fpath_0x0008_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0008_0x03=0 +hwmon_temp.len_0x0008_0x03=8 +hwmon_temp.bit_offset_0x0008_0x03= +hwmon_temp.str_cons_0x0008_0x03=temp8_max +# sensor temp8 min +hwmon_temp.mode_0x0008_0x05=str_constant +hwmon_temp.str_cons_0x0008_0x05=-30000 + +# sensor temp9 input +hwmon_temp.mode_0x0009_0x00=config +hwmon_temp.int_cons_0x0009_0x00=0 +hwmon_temp.src_0x0009_0x00=file +hwmon_temp.frmt_0x0009_0x00=buf +hwmon_temp.fpath_0x0009_0x00=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0009_0x00=0 +hwmon_temp.len_0x0009_0x00=8 +hwmon_temp.bit_offset_0x0009_0x00= +hwmon_temp.str_cons_0x0009_0x00=temp9_input + +# sensor temp9 alias +hwmon_temp.mode_0x0009_0x01=config +hwmon_temp.int_cons_0x0009_0x01= +hwmon_temp.src_0x0009_0x01=file +hwmon_temp.frmt_0x0009_0x01=buf +hwmon_temp.fpath_0x0009_0x01=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0009_0x01=0 +hwmon_temp.len_0x0009_0x01=16 +hwmon_temp.bit_offset_0x0009_0x01= +hwmon_temp.str_cons_0x0009_0x01=temp9_label + +hwmon_temp.mode_0x0009_0x02=str_constant +hwmon_temp.str_cons_0x0009_0x02=cpu + +# sensor temp9 max +hwmon_temp.mode_0x0009_0x03=config +hwmon_temp.int_cons_0x0009_0x03=0 +hwmon_temp.src_0x0009_0x03=file +hwmon_temp.frmt_0x0009_0x03=buf +hwmon_temp.fpath_0x0009_0x03=/sys/devices/platform/coretemp.0/hwmon/ +hwmon_temp.addr_0x0009_0x03=0 +hwmon_temp.len_0x0009_0x03=8 +hwmon_temp.bit_offset_0x0009_0x03= +hwmon_temp.str_cons_0x0009_0x03=temp9_max +# sensor temp9 min +hwmon_temp.mode_0x0009_0x05=str_constant +hwmon_temp.str_cons_0x0009_0x05=-30000 + +# sensor temp10 input +hwmon_temp.mode_0x000a_0x00=config +hwmon_temp.int_cons_0x000a_0x00=0 +hwmon_temp.src_0x000a_0x00=file +hwmon_temp.frmt_0x000a_0x00=buf +hwmon_temp.fpath_0x000a_0x00=/sys/bus/i2c/devices/58-004b/hwmon/ +hwmon_temp.addr_0x000a_0x00=0 +hwmon_temp.len_0x000a_0x00=8 +hwmon_temp.bit_offset_0x000a_0x00= +hwmon_temp.str_cons_0x000a_0x00=temp1_input + +hwmon_temp.mode_0x000a_0x01=str_constant +hwmon_temp.str_cons_0x000a_0x01=MGMT_INLET_TEMP_01 + +hwmon_temp.mode_0x000a_0x02=str_constant +hwmon_temp.str_cons_0x000a_0x02=lm75 + +# sensor temp10 max +hwmon_temp.mode_0x000a_0x03=config +hwmon_temp.int_cons_0x000a_0x03=0 +hwmon_temp.src_0x000a_0x03=file +hwmon_temp.frmt_0x000a_0x03=buf +hwmon_temp.fpath_0x000a_0x03=/sys/bus/i2c/devices/58-004b/hwmon/ +hwmon_temp.addr_0x000a_0x03=0 +hwmon_temp.len_0x000a_0x03=8 +hwmon_temp.bit_offset_0x000a_0x03= +hwmon_temp.str_cons_0x000a_0x03=temp1_max + +hwmon_temp.mode_0x000a_0x04=config +hwmon_temp.int_cons_0x000a_0x04=0 +hwmon_temp.src_0x000a_0x04=file +hwmon_temp.frmt_0x000a_0x04=buf +hwmon_temp.fpath_0x000a_0x04=/sys/bus/i2c/devices/58-004b/hwmon/ +hwmon_temp.addr_0x000a_0x04=0 +hwmon_temp.len_0x000a_0x04=8 +hwmon_temp.bit_offset_0x000a_0x04= +hwmon_temp.str_cons_0x000a_0x04=temp1_max_hyst +# sensor temp10 min +hwmon_temp.mode_0x000a_0x05=str_constant +hwmon_temp.str_cons_0x000a_0x05=-30000 + +hwmon_temp.mode_0x000b_0x00=config +hwmon_temp.int_cons_0x000b_0x00=0 +hwmon_temp.src_0x000b_0x00=file +hwmon_temp.frmt_0x000b_0x00=buf +hwmon_temp.fpath_0x000b_0x00=/sys/bus/i2c/devices/56-004e/hwmon/ +hwmon_temp.addr_0x000b_0x00=0 +hwmon_temp.len_0x000b_0x00=8 +hwmon_temp.bit_offset_0x000b_0x00= +hwmon_temp.str_cons_0x000b_0x00=temp1_input + +hwmon_temp.mode_0x000b_0x01=str_constant +hwmon_temp.str_cons_0x000b_0x01=FCB_TEMP_02 + +hwmon_temp.mode_0x000b_0x02=str_constant +hwmon_temp.str_cons_0x000b_0x02=lm75 + +hwmon_temp.mode_0x000b_0x03=config +hwmon_temp.int_cons_0x000b_0x03=0 +hwmon_temp.src_0x000b_0x03=file +hwmon_temp.frmt_0x000b_0x03=buf +hwmon_temp.fpath_0x000b_0x03=/sys/bus/i2c/devices/56-004e/hwmon/ +hwmon_temp.addr_0x000b_0x03=0 +hwmon_temp.len_0x000b_0x03=8 +hwmon_temp.bit_offset_0x000b_0x03= +hwmon_temp.str_cons_0x000b_0x03=temp1_max + +hwmon_temp.mode_0x000b_0x04=config +hwmon_temp.int_cons_0x000b_0x04=0 +hwmon_temp.src_0x000b_0x04=file +hwmon_temp.frmt_0x000b_0x04=buf +hwmon_temp.fpath_0x000b_0x04=/sys/bus/i2c/devices/56-004e/hwmon/ +hwmon_temp.addr_0x000b_0x04=0 +hwmon_temp.len_0x000b_0x04=8 +hwmon_temp.bit_offset_0x000b_0x04= +hwmon_temp.str_cons_0x000b_0x04=temp1_max_hyst +# sensor temp11 min +hwmon_temp.mode_0x000b_0x05=str_constant +hwmon_temp.str_cons_0x000b_0x05=-30000 + +hwmon_temp.mode_0x000c_0x00=config +hwmon_temp.int_cons_0x000c_0x00=0 +hwmon_temp.src_0x000c_0x00=file +hwmon_temp.frmt_0x000c_0x00=buf +hwmon_temp.fpath_0x000c_0x00=/sys/bus/i2c/devices/51-004b/hwmon/ +hwmon_temp.addr_0x000c_0x00=0 +hwmon_temp.len_0x000c_0x00=8 +hwmon_temp.bit_offset_0x000c_0x00= +hwmon_temp.str_cons_0x000c_0x00=temp1_input + +hwmon_temp.mode_0x000c_0x01=str_constant +hwmon_temp.str_cons_0x000c_0x01=FCB_TEMP_03 + +hwmon_temp.mode_0x000c_0x02=str_constant +hwmon_temp.str_cons_0x000c_0x02=lm75 + +hwmon_temp.mode_0x000c_0x03=config +hwmon_temp.int_cons_0x000c_0x03=0 +hwmon_temp.src_0x000c_0x03=file +hwmon_temp.frmt_0x000c_0x03=buf +hwmon_temp.fpath_0x000c_0x03=/sys/bus/i2c/devices/51-004b/hwmon/ +hwmon_temp.addr_0x000c_0x03=0 +hwmon_temp.len_0x000c_0x03=8 +hwmon_temp.bit_offset_0x000c_0x03= +hwmon_temp.str_cons_0x000c_0x03=temp1_max + +hwmon_temp.mode_0x000c_0x04=config +hwmon_temp.int_cons_0x000c_0x04=0 +hwmon_temp.src_0x000c_0x04=file +hwmon_temp.frmt_0x000c_0x04=buf +hwmon_temp.fpath_0x000c_0x04=/sys/bus/i2c/devices/51-004b/hwmon/ +hwmon_temp.addr_0x000c_0x04=0 +hwmon_temp.len_0x000c_0x04=8 +hwmon_temp.bit_offset_0x000c_0x04= +hwmon_temp.str_cons_0x000c_0x04=temp1_max_hyst +# sensor temp12 min +hwmon_temp.mode_0x000c_0x05=str_constant +hwmon_temp.str_cons_0x000c_0x05=-30000 + +#temp13 MAC_Tboard_TEMP_05 +hwmon_temp.mode_0x000d_0x00=config +hwmon_temp.int_cons_0x000d_0x00=0 +hwmon_temp.src_0x000d_0x00=file +hwmon_temp.frmt_0x000d_0x00=buf +hwmon_temp.fpath_0x000d_0x00=/sys/bus/i2c/devices/77-004c/hwmon/ +hwmon_temp.addr_0x000d_0x00=0 +hwmon_temp.len_0x000d_0x00=8 +hwmon_temp.bit_offset_0x000d_0x00= +hwmon_temp.str_cons_0x000d_0x00=temp1_input + +hwmon_temp.mode_0x000d_0x01=str_constant +hwmon_temp.str_cons_0x000d_0x01=MAC_Tboard_TEMP_05 + +hwmon_temp.mode_0x000d_0x02=str_constant +hwmon_temp.str_cons_0x000d_0x02=ct7318 + +# sensor temp13 min +hwmon_temp.mode_0x000d_0x05=str_constant +hwmon_temp.str_cons_0x000d_0x05=-30000 + +# sensor temp13 max +hwmon_temp.mode_0x000d_0x03=str_constant +hwmon_temp.str_cons_0x000d_0x03=105000 + +#temp14 MAC_Tboard_TEMP_06 +hwmon_temp.mode_0x000e_0x00=config +hwmon_temp.int_cons_0x000e_0x00=0 +hwmon_temp.src_0x000e_0x00=file +hwmon_temp.frmt_0x000e_0x00=buf +hwmon_temp.fpath_0x000e_0x00=/sys/bus/i2c/devices/78-004c/hwmon/ +hwmon_temp.addr_0x000e_0x00=0 +hwmon_temp.len_0x000e_0x00=8 +hwmon_temp.bit_offset_0x000e_0x00= +hwmon_temp.str_cons_0x000e_0x00=temp1_input + +hwmon_temp.mode_0x000e_0x01=str_constant +hwmon_temp.str_cons_0x000e_0x01=MAC_Tboard_TEMP_06 + +hwmon_temp.mode_0x000e_0x02=str_constant +hwmon_temp.str_cons_0x000e_0x02=ct7318 + +# sensor temp14 min +hwmon_temp.mode_0x000e_0x05=str_constant +hwmon_temp.str_cons_0x000e_0x05=-30000 + +# sensor temp14 ax +hwmon_temp.mode_0x000e_0x03=str_constant +hwmon_temp.str_cons_0x000e_0x03=105000 + +#temp15 MAC_Tboard_TEMP_07 +hwmon_temp.mode_0x000f_0x00=config +hwmon_temp.int_cons_0x000f_0x00=0 +hwmon_temp.src_0x000f_0x00=file +hwmon_temp.frmt_0x000f_0x00=buf +hwmon_temp.fpath_0x000f_0x00=/sys/bus/i2c/devices/76-004f/hwmon/ +hwmon_temp.addr_0x000f_0x00=0 +hwmon_temp.len_0x000f_0x00=8 +hwmon_temp.bit_offset_0x000f_0x00= +hwmon_temp.str_cons_0x000f_0x00=temp1_input + +hwmon_temp.mode_0x000f_0x01=str_constant +hwmon_temp.str_cons_0x000f_0x01=MAC_Tboard_TEMP_07 + +hwmon_temp.mode_0x000f_0x02=str_constant +hwmon_temp.str_cons_0x000f_0x02=lm75 + +hwmon_temp.mode_0x000f_0x03=config +hwmon_temp.int_cons_0x000f_0x03=0 +hwmon_temp.src_0x000f_0x03=file +hwmon_temp.frmt_0x000f_0x03=buf +hwmon_temp.fpath_0x000f_0x03=/sys/bus/i2c/devices/76-004f/hwmon/ +hwmon_temp.addr_0x000f_0x03=0 +hwmon_temp.len_0x000f_0x03=8 +hwmon_temp.bit_offset_0x000f_0x03= +hwmon_temp.str_cons_0x000f_0x03=temp1_max + +hwmon_temp.mode_0x000f_0x04=config +hwmon_temp.int_cons_0x000f_0x04=0 +hwmon_temp.src_0x000f_0x04=file +hwmon_temp.frmt_0x000f_0x04=buf +hwmon_temp.fpath_0x000f_0x04=/sys/bus/i2c/devices/76-004f/hwmon/ +hwmon_temp.addr_0x000f_0x04=0 +hwmon_temp.len_0x000f_0x04=8 +hwmon_temp.bit_offset_0x000f_0x04= +hwmon_temp.str_cons_0x000f_0x04=temp1_max_hyst +# sensor temp15 min +hwmon_temp.mode_0x000f_0x05=str_constant +hwmon_temp.str_cons_0x000f_0x05=-30000 + +# temp16 mac_temp_min +hwmon_temp.mode_0x0010_0x00=config +hwmon_temp.src_0x0010_0x00=cpld +hwmon_temp.addr_0x0010_0x00=0x00020080 +hwmon_temp.frmt_0x0010_0x00=num_bytes +hwmon_temp.len_0x00010_0x00=2 +hwmon_temp.pola_0x0010_0x00=positive +hwmon_temp.str_cons_0x0010_0x00=temp0_input +hwmon_temp.int_extra1_0x0010_0x00=4 + +hwmon_temp.mode_0x0010_0x01=str_constant +hwmon_temp.str_cons_0x0010_0x01=MAC_TEMP_MIN + +hwmon_temp.mode_0x0010_0x02=str_constant +hwmon_temp.str_cons_0x0010_0x02=CPLD + +hwmon_temp.mode_0x0010_0x03=constant +hwmon_temp.int_cons_0x0010_0x03=105000 + +hwmon_temp.mode_0x0010_0x05=constant +hwmon_temp.int_cons_0x0010_0x05=-30000 + +#temp17 mac_temp_max +hwmon_temp.mode_0x0011_0x00=config +hwmon_temp.src_0x0011_0x00=cpld +hwmon_temp.addr_0x0011_0x00=0x00020082 +hwmon_temp.frmt_0x0011_0x00=num_bytes +hwmon_temp.len_0x0011_0x00=2 +hwmon_temp.pola_0x0011_0x00=positive +hwmon_temp.str_cons_0x0011_0x00=temp1_input +hwmon_temp.int_extra1_0x0011_0x00=4 + +hwmon_temp.mode_0x0011_0x01=str_constant +hwmon_temp.str_cons_0x0011_0x01=MAC_TEMP_MAX + +hwmon_temp.mode_0x0011_0x02=str_constant +hwmon_temp.str_cons_0x0011_0x02=CPLD + +hwmon_temp.mode_0x0011_0x03=constant +hwmon_temp.int_cons_0x0011_0x03=105000 + +hwmon_temp.mode_0x0011_0x05=constant +hwmon_temp.int_cons_0x0011_0x05=-30000 + +#temp18 TMOS_CORE_TEMP_01 +hwmon_temp.mode_0x0012_0x00=config +hwmon_temp.int_cons_0x0012_0x00=0 +hwmon_temp.src_0x0012_0x00=file +hwmon_temp.frmt_0x0012_0x00=buf +hwmon_temp.fpath_0x0012_0x00=/sys/bus/i2c/devices/84-0040/hwmon/ +hwmon_temp.addr_0x0012_0x00=0 +hwmon_temp.len_0x0012_0x00=8 +hwmon_temp.bit_offset_0x0012_0x00= +hwmon_temp.str_cons_0x0012_0x00=temp1_input + +hwmon_temp.mode_0x0012_0x01=str_constant +hwmon_temp.str_cons_0x0012_0x01=TMOS_CORE_TEMP_01 + +hwmon_temp.mode_0x0012_0x02=str_constant +hwmon_temp.str_cons_0x0012_0x02=xdpe132g5c + +hwmon_temp.mode_0x0012_0x03=str_constant +hwmon_temp.str_cons_0x0012_0x03=125000 + +# sensor temp18 min +hwmon_temp.mode_0x0012_0x05=str_constant +hwmon_temp.str_cons_0x0012_0x05=-30000 + +#temp19 TMOS_ANALOG0_TEMP +hwmon_temp.mode_0x0013_0x00=config +hwmon_temp.int_cons_0x0013_0x00=0 +hwmon_temp.src_0x0013_0x00=file +hwmon_temp.frmt_0x0013_0x00=buf +hwmon_temp.fpath_0x0013_0x00=/sys/bus/i2c/devices/85-004d/hwmon/ +hwmon_temp.addr_0x0013_0x00=0 +hwmon_temp.len_0x0013_0x00=8 +hwmon_temp.bit_offset_0x0013_0x00= +hwmon_temp.str_cons_0x0013_0x00=temp1_input + +hwmon_temp.mode_0x0013_0x01=str_constant +hwmon_temp.str_cons_0x0013_0x01=TMOS_ANALOG0_TEMP + +hwmon_temp.mode_0x0013_0x02=str_constant +hwmon_temp.str_cons_0x0013_0x02=xdpe132g5c + +hwmon_temp.mode_0x0013_0x03=str_constant +hwmon_temp.str_cons_0x0013_0x03=125000 + +# sensor temp19 min +hwmon_temp.mode_0x0013_0x05=str_constant +hwmon_temp.str_cons_0x0013_0x05=-30000 + +#temp20 TMOS_ANALOG1_TEMP +hwmon_temp.mode_0x0014_0x00=config +hwmon_temp.int_cons_0x0014_0x00=0 +hwmon_temp.src_0x0014_0x00=file +hwmon_temp.frmt_0x0014_0x00=buf +hwmon_temp.fpath_0x0014_0x00=/sys/bus/i2c/devices/86-004d/hwmon/ +hwmon_temp.addr_0x0014_0x00=0 +hwmon_temp.len_0x0014_0x00=8 +hwmon_temp.bit_offset_0x0014_0x00= +hwmon_temp.str_cons_0x0014_0x00=temp1_input + +hwmon_temp.mode_0x0014_0x01=str_constant +hwmon_temp.str_cons_0x0014_0x01=TMOS_ANALOG1_TEMP + +hwmon_temp.mode_0x0014_0x02=str_constant +hwmon_temp.str_cons_0x0014_0x02=xdpe132g5c + +hwmon_temp.mode_0x0014_0x03=str_constant +hwmon_temp.str_cons_0x0014_0x03=125000 + +# sensor temp20 min +hwmon_temp.mode_0x0014_0x05=str_constant +hwmon_temp.str_cons_0x0014_0x05=-30000 + +# sensor vol +# value : 0 +# alias : 1 +# type : 2 +# max : 3 +# hyst : 4 +# min : 5 +# crit : 6 +# range : 7 +# nominal_value : 8 +# high : 9 +# low : 10 + +# vol1 +hwmon_in.mode_0x0001_0x00=config +hwmon_in.int_cons_0x0001_0x00=0 +hwmon_in.src_0x0001_0x00=file +hwmon_in.frmt_0x0001_0x00=buf +hwmon_in.fpath_0x0001_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0001_0x00=0 +hwmon_in.len_0x0001_0x00=8 +hwmon_in.bit_offset_0x0001_0x00= +hwmon_in.str_cons_0x0001_0x00=in1_input +hwmon_in.mode_0x0001_0x01=str_constant +hwmon_in.str_cons_0x0001_0x01=VDD12V_BASE +hwmon_in.mode_0x0001_0x02=str_constant +hwmon_in.str_cons_0x0001_0x02=ucd90160 +hwmon_in.mode_0x0001_0x03=constant +hwmon_in.int_cons_0x0001_0x03=13200 +hwmon_in.mode_0x0001_0x05=constant +hwmon_in.int_cons_0x0001_0x05=10800 +hwmon_in.mode_0x0001_0x08=constant +hwmon_in.int_cons_0x0001_0x08=12000 +hwmon_in.mode_0x0001_0x07=constant +hwmon_in.int_cons_0x0001_0x07=60 + +# vol2 +hwmon_in.mode_0x0002_0x00=config +hwmon_in.int_cons_0x0002_0x00=0 +hwmon_in.src_0x0002_0x00=file +hwmon_in.frmt_0x0002_0x00=buf +hwmon_in.fpath_0x0002_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0002_0x00=0 +hwmon_in.len_0x0002_0x00=8 +hwmon_in.bit_offset_0x0002_0x00= +hwmon_in.str_cons_0x0002_0x00=in2_input +hwmon_in.mode_0x0002_0x01=str_constant +hwmon_in.str_cons_0x0002_0x01=VDD3.3_STBY +hwmon_in.mode_0x0002_0x02=str_constant +hwmon_in.str_cons_0x0002_0x02=ucd90160 +hwmon_in.mode_0x0002_0x03=constant +hwmon_in.int_cons_0x0002_0x03=3630 +hwmon_in.mode_0x0002_0x05=constant +hwmon_in.int_cons_0x0002_0x05=2970 +hwmon_in.mode_0x0002_0x08=constant +hwmon_in.int_cons_0x0002_0x08=3300 +hwmon_in.mode_0x0002_0x07=constant +hwmon_in.int_cons_0x0002_0x07=16 + +# vol3 +hwmon_in.mode_0x0003_0x00=config +hwmon_in.int_cons_0x0003_0x00=0 +hwmon_in.src_0x0003_0x00=file +hwmon_in.frmt_0x0003_0x00=buf +hwmon_in.fpath_0x0003_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0003_0x00=0 +hwmon_in.len_0x0003_0x00=8 +hwmon_in.bit_offset_0x0003_0x00= +hwmon_in.str_cons_0x0003_0x00=in3_input +hwmon_in.mode_0x0003_0x01=str_constant +hwmon_in.str_cons_0x0003_0x01=VDD5V_USB +hwmon_in.mode_0x0003_0x02=str_constant +hwmon_in.str_cons_0x0003_0x02=ucd90160 +hwmon_in.mode_0x0003_0x03=constant +hwmon_in.int_cons_0x0003_0x03=5500 +hwmon_in.mode_0x0003_0x05=constant +hwmon_in.int_cons_0x0003_0x05=4500 +hwmon_in.mode_0x0003_0x08=constant +hwmon_in.int_cons_0x0003_0x08=5000 +hwmon_in.mode_0x0003_0x07=constant +hwmon_in.int_cons_0x0003_0x07=25 + +# vol4 +hwmon_in.mode_0x0004_0x00=config +hwmon_in.int_cons_0x0004_0x00=0 +hwmon_in.src_0x0004_0x00=file +hwmon_in.frmt_0x0004_0x00=buf +hwmon_in.fpath_0x0004_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0004_0x00=0 +hwmon_in.len_0x0004_0x00=8 +hwmon_in.bit_offset_0x0004_0x00= +hwmon_in.str_cons_0x0004_0x00=in4_input +hwmon_in.mode_0x0004_0x01=str_constant +hwmon_in.str_cons_0x0004_0x01=PHY_VDD1V0 +hwmon_in.mode_0x0004_0x02=str_constant +hwmon_in.str_cons_0x0004_0x02=ucd90160 +hwmon_in.mode_0x0004_0x03=constant +hwmon_in.int_cons_0x0004_0x03=1100 +hwmon_in.mode_0x0004_0x05=constant +hwmon_in.int_cons_0x0004_0x05=900 +hwmon_in.mode_0x0004_0x08=constant +hwmon_in.int_cons_0x0004_0x08=1000 +hwmon_in.mode_0x0004_0x07=constant +hwmon_in.int_cons_0x0004_0x07=5 + +# vol5 +hwmon_in.mode_0x0005_0x00=config +hwmon_in.int_cons_0x0005_0x00=0 +hwmon_in.src_0x0005_0x00=file +hwmon_in.frmt_0x0005_0x00=buf +hwmon_in.fpath_0x0005_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0005_0x00=0 +hwmon_in.len_0x0005_0x00=8 +hwmon_in.bit_offset_0x0005_0x00= +hwmon_in.str_cons_0x0005_0x00=in5_input +hwmon_in.mode_0x0005_0x01=str_constant +hwmon_in.str_cons_0x0005_0x01=VDD3.3V_BASE +hwmon_in.mode_0x0005_0x02=str_constant +hwmon_in.str_cons_0x0005_0x02=ucd90160 +hwmon_in.mode_0x0005_0x03=constant +hwmon_in.int_cons_0x0005_0x03=3630 +hwmon_in.mode_0x0005_0x05=constant +hwmon_in.int_cons_0x0005_0x05=2970 +hwmon_in.mode_0x0005_0x08=constant +hwmon_in.int_cons_0x0005_0x08=3300 +hwmon_in.mode_0x0005_0x07=constant +hwmon_in.int_cons_0x0005_0x07=16 + +# vol6 +hwmon_in.mode_0x0006_0x00=config +hwmon_in.int_cons_0x0006_0x00=0 +hwmon_in.src_0x0006_0x00=file +hwmon_in.frmt_0x0006_0x00=buf +hwmon_in.fpath_0x0006_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0006_0x00=0 +hwmon_in.len_0x0006_0x00=8 +hwmon_in.bit_offset_0x0006_0x00= +hwmon_in.str_cons_0x0006_0x00=in6_input +hwmon_in.mode_0x0006_0x01=str_constant +hwmon_in.str_cons_0x0006_0x01=VDD3.3_CLK_BASE +hwmon_in.mode_0x0006_0x02=str_constant +hwmon_in.str_cons_0x0006_0x02=ucd90160 +hwmon_in.mode_0x0006_0x03=constant +hwmon_in.int_cons_0x0006_0x03=3630 +hwmon_in.mode_0x0006_0x05=constant +hwmon_in.int_cons_0x0006_0x05=2970 +hwmon_in.mode_0x0006_0x08=constant +hwmon_in.int_cons_0x0006_0x08=3300 +hwmon_in.mode_0x0006_0x07=constant +hwmon_in.int_cons_0x0006_0x07=16 + +# vol7 +hwmon_in.mode_0x0007_0x00=config +hwmon_in.int_cons_0x0007_0x00=0 +hwmon_in.src_0x0007_0x00=file +hwmon_in.frmt_0x0007_0x00=buf +hwmon_in.fpath_0x0007_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0007_0x00=0 +hwmon_in.len_0x0007_0x00=8 +hwmon_in.bit_offset_0x0007_0x00= +hwmon_in.str_cons_0x0007_0x00=in7_input +hwmon_in.mode_0x0007_0x01=str_constant +hwmon_in.str_cons_0x0007_0x01=BMC_VCC3.3V_OUT +hwmon_in.mode_0x0007_0x02=str_constant +hwmon_in.str_cons_0x0007_0x02=ucd90160 +hwmon_in.mode_0x0007_0x03=constant +hwmon_in.int_cons_0x0007_0x03=3630 +hwmon_in.mode_0x0007_0x05=constant +hwmon_in.int_cons_0x0007_0x05=2970 +hwmon_in.mode_0x0007_0x08=constant +hwmon_in.int_cons_0x0007_0x08=3300 +hwmon_in.mode_0x0007_0x07=constant +hwmon_in.int_cons_0x0007_0x07=16 + +# vol8 +hwmon_in.mode_0x0008_0x00=config +hwmon_in.int_cons_0x0008_0x00=0 +hwmon_in.src_0x0008_0x00=file +hwmon_in.frmt_0x0008_0x00=buf +hwmon_in.fpath_0x0008_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0008_0x00=0 +hwmon_in.len_0x0008_0x00=8 +hwmon_in.bit_offset_0x0008_0x00= +hwmon_in.str_cons_0x0008_0x00=in8_input +hwmon_in.mode_0x0008_0x01=str_constant +hwmon_in.str_cons_0x0008_0x01=SSD_VDD3.3V +hwmon_in.mode_0x0008_0x02=str_constant +hwmon_in.str_cons_0x0008_0x02=ucd90160 +hwmon_in.mode_0x0008_0x03=constant +hwmon_in.int_cons_0x0008_0x03=3630 +hwmon_in.mode_0x0008_0x05=constant +hwmon_in.int_cons_0x0008_0x05=2970 +hwmon_in.mode_0x0008_0x08=constant +hwmon_in.int_cons_0x0008_0x08=3300 +hwmon_in.mode_0x0008_0x07=constant +hwmon_in.int_cons_0x0008_0x07=16 + +# vol9 +hwmon_in.mode_0x0009_0x00=config +hwmon_in.int_cons_0x0009_0x00=0 +hwmon_in.src_0x0009_0x00=file +hwmon_in.frmt_0x0009_0x00=buf +hwmon_in.fpath_0x0009_0x00=/sys/bus/i2c/devices/68-005b/hwmon/ +hwmon_in.addr_0x0009_0x00=0 +hwmon_in.len_0x0009_0x00=8 +hwmon_in.bit_offset_0x0009_0x00= +hwmon_in.str_cons_0x0009_0x00=in9_input +hwmon_in.mode_0x0009_0x01=str_constant +hwmon_in.str_cons_0x0009_0x01=VDD3V8_CLK_BASE +hwmon_in.mode_0x0009_0x02=str_constant +hwmon_in.str_cons_0x0009_0x02=ucd90160 +hwmon_in.mode_0x0009_0x03=constant +hwmon_in.int_cons_0x0009_0x03=4180 +hwmon_in.mode_0x0009_0x05=constant +hwmon_in.int_cons_0x0009_0x05=3420 +hwmon_in.mode_0x0009_0x08=constant +hwmon_in.int_cons_0x0009_0x08=3800 +hwmon_in.mode_0x0009_0x07=constant +hwmon_in.int_cons_0x0009_0x07=19 + +# vol10 +hwmon_in.mode_0x000a_0x00=config +hwmon_in.int_cons_0x000a_0x00=0 +hwmon_in.src_0x000a_0x00=file +hwmon_in.frmt_0x000a_0x00=buf +hwmon_in.fpath_0x000a_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x000a_0x00=0 +hwmon_in.len_0x000a_0x00=8 +hwmon_in.bit_offset_0x000a_0x00= +hwmon_in.str_cons_0x000a_0x00=in1_input +hwmon_in.mode_0x000a_0x01=str_constant +hwmon_in.str_cons_0x000a_0x01=VDD12V_MAC1 +hwmon_in.mode_0x000a_0x02=str_constant +hwmon_in.str_cons_0x000a_0x02=ucd90160 +hwmon_in.mode_0x000a_0x03=constant +hwmon_in.int_cons_0x000a_0x03=13200 +hwmon_in.mode_0x000a_0x05=constant +hwmon_in.int_cons_0x000a_0x05=10800 +hwmon_in.mode_0x000a_0x08=constant +hwmon_in.int_cons_0x000a_0x08=12000 +hwmon_in.mode_0x000a_0x07=constant +hwmon_in.int_cons_0x000a_0x07=60 + +# vol11 +hwmon_in.mode_0x000b_0x00=config +hwmon_in.int_cons_0x000b_0x00=0 +hwmon_in.src_0x000b_0x00=file +hwmon_in.frmt_0x000b_0x00=buf +hwmon_in.fpath_0x000b_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x000b_0x00=0 +hwmon_in.len_0x000b_0x00=8 +hwmon_in.bit_offset_0x000b_0x00= +hwmon_in.str_cons_0x000b_0x00=in2_input +hwmon_in.mode_0x000b_0x01=str_constant +hwmon_in.str_cons_0x000b_0x01=VDD1.8_CLK +hwmon_in.mode_0x000b_0x02=str_constant +hwmon_in.str_cons_0x000b_0x02=ucd90160 +hwmon_in.mode_0x000b_0x03=constant +hwmon_in.int_cons_0x000b_0x03=1980 +hwmon_in.mode_0x000b_0x05=constant +hwmon_in.int_cons_0x000b_0x05=1620 +hwmon_in.mode_0x000b_0x08=constant +hwmon_in.int_cons_0x000b_0x08=1800 +hwmon_in.mode_0x000b_0x07=constant +hwmon_in.int_cons_0x000b_0x07=9 + +# vol12 +hwmon_in.mode_0x000c_0x00=config +hwmon_in.int_cons_0x000c_0x00=0 +hwmon_in.src_0x000c_0x00=file +hwmon_in.frmt_0x000c_0x00=buf +hwmon_in.fpath_0x000c_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x000c_0x00=0 +hwmon_in.len_0x000c_0x00=8 +hwmon_in.bit_offset_0x000c_0x00= +hwmon_in.str_cons_0x000c_0x00=in3_input +hwmon_in.mode_0x000c_0x01=str_constant +hwmon_in.str_cons_0x000c_0x01=VDD3.3_CLK_MAC +hwmon_in.mode_0x000c_0x02=str_constant +hwmon_in.str_cons_0x000c_0x02=ucd90160 +hwmon_in.mode_0x000c_0x03=constant +hwmon_in.int_cons_0x000c_0x03=3630 +hwmon_in.mode_0x000c_0x05=constant +hwmon_in.int_cons_0x000c_0x05=2970 +hwmon_in.mode_0x000c_0x08=constant +hwmon_in.int_cons_0x000c_0x08=3300 +hwmon_in.mode_0x000c_0x07=constant +hwmon_in.int_cons_0x000c_0x07=16 + +# vol13 +hwmon_in.mode_0x000d_0x00=config +hwmon_in.int_cons_0x000d_0x00=0 +hwmon_in.src_0x000d_0x00=file +hwmon_in.frmt_0x000d_0x00=buf +hwmon_in.fpath_0x000d_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x000d_0x00=0 +hwmon_in.len_0x000d_0x00=8 +hwmon_in.bit_offset_0x000d_0x00= +hwmon_in.str_cons_0x000d_0x00=in4_input +hwmon_in.mode_0x000d_0x01=str_constant +hwmon_in.str_cons_0x000d_0x01=VDD1.0V_FPGA +hwmon_in.mode_0x000d_0x02=str_constant +hwmon_in.str_cons_0x000d_0x02=ucd90160 +hwmon_in.mode_0x000d_0x03=constant +hwmon_in.int_cons_0x000d_0x03=1100 +hwmon_in.mode_0x000d_0x05=constant +hwmon_in.int_cons_0x000d_0x05=900 +hwmon_in.mode_0x000d_0x08=constant +hwmon_in.int_cons_0x000d_0x08=1000 +hwmon_in.mode_0x000d_0x07=constant +hwmon_in.int_cons_0x000d_0x07=5 + +# vol14 +hwmon_in.mode_0x000e_0x00=config +hwmon_in.int_cons_0x000e_0x00=0 +hwmon_in.src_0x000e_0x00=file +hwmon_in.frmt_0x000e_0x00=buf +hwmon_in.fpath_0x000e_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x000e_0x00=0 +hwmon_in.len_0x000e_0x00=8 +hwmon_in.bit_offset_0x000e_0x00= +hwmon_in.str_cons_0x000e_0x00=in5_input +hwmon_in.mode_0x000e_0x01=str_constant +hwmon_in.str_cons_0x000e_0x01=VDD1.8V_FPGA +hwmon_in.mode_0x000e_0x02=str_constant +hwmon_in.str_cons_0x000e_0x02=ucd90160 +hwmon_in.mode_0x000e_0x03=constant +hwmon_in.int_cons_0x000e_0x03=1980 +hwmon_in.mode_0x000e_0x05=constant +hwmon_in.int_cons_0x000e_0x05=1620 +hwmon_in.mode_0x000e_0x08=constant +hwmon_in.int_cons_0x000e_0x08=1800 +hwmon_in.mode_0x000e_0x07=constant +hwmon_in.int_cons_0x000e_0x07=9 + +# vol15 +hwmon_in.mode_0x000f_0x00=config +hwmon_in.int_cons_0x000f_0x00=0 +hwmon_in.src_0x000f_0x00=file +hwmon_in.frmt_0x000f_0x00=buf +hwmon_in.fpath_0x000f_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x000f_0x00=0 +hwmon_in.len_0x000f_0x00=8 +hwmon_in.bit_offset_0x000f_0x00= +hwmon_in.str_cons_0x000f_0x00=in6_input +hwmon_in.mode_0x000f_0x01=str_constant +hwmon_in.str_cons_0x000f_0x01=VDD1.2V_FPGA +hwmon_in.mode_0x000f_0x02=str_constant +hwmon_in.str_cons_0x000f_0x02=ucd90160 +hwmon_in.mode_0x000f_0x03=constant +hwmon_in.int_cons_0x000f_0x03=1320 +hwmon_in.mode_0x000f_0x05=constant +hwmon_in.int_cons_0x000f_0x05=1080 +hwmon_in.mode_0x000f_0x08=constant +hwmon_in.int_cons_0x000f_0x08=1200 +hwmon_in.mode_0x000f_0x07=constant +hwmon_in.int_cons_0x000f_0x07=6 + +# vol16 +hwmon_in.mode_0x0010_0x00=config +hwmon_in.int_cons_0x0010_0x00=0 +hwmon_in.src_0x0010_0x00=file +hwmon_in.frmt_0x0010_0x00=buf +hwmon_in.fpath_0x0010_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0010_0x00=0 +hwmon_in.len_0x0010_0x00=8 +hwmon_in.bit_offset_0x0010_0x00= +hwmon_in.str_cons_0x0010_0x00=in7_input +hwmon_in.mode_0x0010_0x01=str_constant +hwmon_in.str_cons_0x0010_0x01=VDD3.3V_MAC +hwmon_in.mode_0x0010_0x02=str_constant +hwmon_in.str_cons_0x0010_0x02=ucd90160 +hwmon_in.mode_0x0010_0x03=constant +hwmon_in.int_cons_0x0010_0x03=3630 +hwmon_in.mode_0x0010_0x05=constant +hwmon_in.int_cons_0x0010_0x05=2970 +hwmon_in.mode_0x0010_0x08=constant +hwmon_in.int_cons_0x0010_0x08=3300 +hwmon_in.mode_0x0010_0x07=constant +hwmon_in.int_cons_0x0010_0x07=16 + +# vol17 +hwmon_in.mode_0x0011_0x00=config +hwmon_in.int_cons_0x0011_0x00=0 +hwmon_in.src_0x0011_0x00=file +hwmon_in.frmt_0x0011_0x00=buf +hwmon_in.fpath_0x0011_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0011_0x00=0 +hwmon_in.len_0x0011_0x00=8 +hwmon_in.bit_offset_0x0011_0x00= +hwmon_in.str_cons_0x0011_0x00=in8_input +hwmon_in.mode_0x0011_0x01=str_constant +hwmon_in.str_cons_0x0011_0x01=VDDO1.2V +hwmon_in.mode_0x0011_0x02=str_constant +hwmon_in.str_cons_0x0011_0x02=ucd90160 +hwmon_in.mode_0x0011_0x03=constant +hwmon_in.int_cons_0x0011_0x03=1320 +hwmon_in.mode_0x0011_0x05=constant +hwmon_in.int_cons_0x0011_0x05=1080 +hwmon_in.mode_0x0011_0x08=constant +hwmon_in.int_cons_0x0011_0x08=1200 +hwmon_in.mode_0x0011_0x07=constant +hwmon_in.int_cons_0x0011_0x07=6 + +# vol18 +hwmon_in.mode_0x0012_0x00=config +hwmon_in.int_cons_0x0012_0x00=0 +hwmon_in.src_0x0012_0x00=file +hwmon_in.frmt_0x0012_0x00=buf +hwmon_in.fpath_0x0012_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0012_0x00=0 +hwmon_in.len_0x0012_0x00=8 +hwmon_in.bit_offset_0x0012_0x00= +hwmon_in.str_cons_0x0012_0x00=in9_input +hwmon_in.mode_0x0012_0x01=str_constant +hwmon_in.str_cons_0x0012_0x01=VDDO1.8V +hwmon_in.mode_0x0012_0x02=str_constant +hwmon_in.str_cons_0x0012_0x02=ucd90160 +hwmon_in.mode_0x0012_0x03=constant +hwmon_in.int_cons_0x0012_0x03=1980 +hwmon_in.mode_0x0012_0x05=constant +hwmon_in.int_cons_0x0012_0x05=1620 +hwmon_in.mode_0x0012_0x08=constant +hwmon_in.int_cons_0x0012_0x08=1800 +hwmon_in.mode_0x0012_0x07=constant +hwmon_in.int_cons_0x0012_0x07=9 + +# vol19 +hwmon_in.mode_0x0013_0x00=config +hwmon_in.int_cons_0x0013_0x00=0 +hwmon_in.src_0x0013_0x00=file +hwmon_in.frmt_0x0013_0x00=buf +hwmon_in.fpath_0x0013_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0013_0x00=0 +hwmon_in.len_0x0013_0x00=8 +hwmon_in.bit_offset_0x0013_0x00= +hwmon_in.str_cons_0x0013_0x00=in10_input +hwmon_in.mode_0x0013_0x01=str_constant +hwmon_in.str_cons_0x0013_0x01=VDD_CORE +hwmon_in.mode_0x0013_0x02=str_constant +hwmon_in.str_cons_0x0013_0x02=ucd90160 +hwmon_in.mode_0x0013_0x03=constant +hwmon_in.int_cons_0x0013_0x03=900 +hwmon_in.mode_0x0013_0x05=constant +hwmon_in.int_cons_0x0013_0x05=630 +hwmon_in.mode_0x0013_0x08=constant +hwmon_in.int_cons_0x0013_0x08=800 +hwmon_in.mode_0x0013_0x07=constant +hwmon_in.int_cons_0x0013_0x07=4 + +# vol20 +hwmon_in.mode_0x0014_0x00=config +hwmon_in.int_cons_0x0014_0x00=0 +hwmon_in.src_0x0014_0x00=file +hwmon_in.frmt_0x0014_0x00=buf +hwmon_in.fpath_0x0014_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0014_0x00=0 +hwmon_in.len_0x0014_0x00=8 +hwmon_in.bit_offset_0x0014_0x00= +hwmon_in.str_cons_0x0014_0x00=in11_input +hwmon_in.mode_0x0014_0x01=str_constant +hwmon_in.str_cons_0x0014_0x01=VDDA1.5V +hwmon_in.mode_0x0014_0x02=str_constant +hwmon_in.str_cons_0x0014_0x02=ucd90160 +hwmon_in.mode_0x0014_0x03=constant +hwmon_in.int_cons_0x0014_0x03=1650 +hwmon_in.mode_0x0014_0x05=constant +hwmon_in.int_cons_0x0014_0x05=1350 +hwmon_in.mode_0x0014_0x08=constant +hwmon_in.int_cons_0x0014_0x08=1500 +hwmon_in.mode_0x0014_0x07=constant +hwmon_in.int_cons_0x0014_0x07=7 + +# vol21 +hwmon_in.mode_0x0015_0x00=config +hwmon_in.int_cons_0x0015_0x00=0 +hwmon_in.src_0x0015_0x00=file +hwmon_in.frmt_0x0015_0x00=buf +hwmon_in.fpath_0x0015_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0015_0x00=0 +hwmon_in.len_0x0015_0x00=8 +hwmon_in.bit_offset_0x0015_0x00=0 +hwmon_in.str_cons_0x0015_0x00=in12_input +hwmon_in.mode_0x0015_0x01=str_constant +hwmon_in.str_cons_0x0015_0x01=VDD0_9V_ANLG0 +hwmon_in.mode_0x0015_0x02=str_constant +hwmon_in.str_cons_0x0015_0x02=ucd90160 +hwmon_in.mode_0x0015_0x03=constant +hwmon_in.int_cons_0x0015_0x03=990 +hwmon_in.mode_0x0015_0x05=constant +hwmon_in.int_cons_0x0015_0x05=810 +hwmon_in.mode_0x0015_0x08=constant +hwmon_in.int_cons_0x0015_0x08=900 +hwmon_in.mode_0x0015_0x07=constant +hwmon_in.int_cons_0x0015_0x07=4 + + +# vol22 +hwmon_in.mode_0x0016_0x00=config +hwmon_in.int_cons_0x0016_0x00=0 +hwmon_in.src_0x0016_0x00=file +hwmon_in.frmt_0x0016_0x00=buf +hwmon_in.fpath_0x0016_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0016_0x00=0 +hwmon_in.len_0x0016_0x00=8 +hwmon_in.bit_offset_0x0016_0x00=0 +hwmon_in.str_cons_0x0016_0x00=in13_input +hwmon_in.mode_0x0016_0x01=str_constant +hwmon_in.str_cons_0x0016_0x01=VDD0_9V_ANLG1 +hwmon_in.mode_0x0016_0x02=str_constant +hwmon_in.str_cons_0x0016_0x02=ucd90160 +hwmon_in.mode_0x0016_0x03=constant +hwmon_in.int_cons_0x0016_0x03=990 +hwmon_in.mode_0x0016_0x05=constant +hwmon_in.int_cons_0x0016_0x05=810 +hwmon_in.mode_0x0016_0x08=constant +hwmon_in.int_cons_0x0016_0x08=900 +hwmon_in.mode_0x0016_0x07=constant +hwmon_in.int_cons_0x0016_0x07=4 + + +# vol23 +hwmon_in.mode_0x0017_0x00=config +hwmon_in.int_cons_0x0017_0x00=0 +hwmon_in.src_0x0017_0x00=file +hwmon_in.frmt_0x0017_0x00=buf +hwmon_in.fpath_0x0017_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0017_0x00=0 +hwmon_in.len_0x0017_0x00=8 +hwmon_in.bit_offset_0x0017_0x00= +hwmon_in.str_cons_0x0017_0x00=in14_input +hwmon_in.mode_0x0017_0x01=str_constant +hwmon_in.str_cons_0x0017_0x01=VDD0_75V_ANLG0 +hwmon_in.mode_0x0017_0x02=str_constant +hwmon_in.str_cons_0x0017_0x02=ucd90160 +hwmon_in.mode_0x0017_0x03=constant +hwmon_in.int_cons_0x0017_0x03=825 +hwmon_in.mode_0x0017_0x05=constant +hwmon_in.int_cons_0x0017_0x05=675 +hwmon_in.mode_0x0017_0x08=constant +hwmon_in.int_cons_0x0017_0x08=750 +hwmon_in.mode_0x0017_0x07=constant +hwmon_in.int_cons_0x0017_0x07=3 + +# vol24 +hwmon_in.mode_0x0018_0x00=config +hwmon_in.int_cons_0x0018_0x00=0 +hwmon_in.src_0x0018_0x00=file +hwmon_in.frmt_0x0018_0x00=buf +hwmon_in.fpath_0x0018_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0018_0x00=0 +hwmon_in.len_0x0018_0x00=8 +hwmon_in.bit_offset_0x0018_0x00= +hwmon_in.str_cons_0x0018_0x00=in15_input +hwmon_in.mode_0x0018_0x01=str_constant +hwmon_in.str_cons_0x0018_0x01=VDD0_75V_ANLG1 +hwmon_in.mode_0x0018_0x02=str_constant +hwmon_in.str_cons_0x0018_0x02=ucd90160 +hwmon_in.mode_0x0018_0x03=constant +hwmon_in.int_cons_0x0018_0x03=825 +hwmon_in.mode_0x0018_0x05=constant +hwmon_in.int_cons_0x0018_0x05=675 +hwmon_in.mode_0x0018_0x08=constant +hwmon_in.int_cons_0x0018_0x08=750 +hwmon_in.mode_0x0018_0x07=constant +hwmon_in.int_cons_0x0018_0x07=3 + +# vol25 +hwmon_in.mode_0x0019_0x00=config +hwmon_in.int_cons_0x0019_0x00=0 +hwmon_in.src_0x0019_0x00=file +hwmon_in.frmt_0x0019_0x00=buf +hwmon_in.fpath_0x0019_0x00=/sys/bus/i2c/devices/82-005b/hwmon/ +hwmon_in.addr_0x0019_0x00=0 +hwmon_in.len_0x0019_0x00=8 +hwmon_in.bit_offset_0x0019_0x00= +hwmon_in.str_cons_0x0019_0x00=in16_input +hwmon_in.mode_0x0019_0x01=str_constant +hwmon_in.str_cons_0x0019_0x01=VDD0.8V +hwmon_in.mode_0x0019_0x02=str_constant +hwmon_in.str_cons_0x0019_0x02=ucd90160 +hwmon_in.mode_0x0019_0x03=constant +hwmon_in.int_cons_0x0019_0x03=880 +hwmon_in.mode_0x0019_0x05=constant +hwmon_in.int_cons_0x0019_0x05=720 +hwmon_in.mode_0x0019_0x08=constant +hwmon_in.int_cons_0x0019_0x08=750 +hwmon_in.mode_0x0019_0x07=constant +hwmon_in.int_cons_0x0019_0x07=3 + +# vol26 +hwmon_in.mode_0x001a_0x00=config +hwmon_in.int_cons_0x001a_0x00=0 +hwmon_in.src_0x001a_0x00=file +hwmon_in.frmt_0x001a_0x00=buf +hwmon_in.fpath_0x001a_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001a_0x00=0 +hwmon_in.len_0x001a_0x00=8 +hwmon_in.bit_offset_0x001a_0x00= +hwmon_in.str_cons_0x001a_0x00=in1_input +hwmon_in.mode_0x001a_0x01=str_constant +hwmon_in.str_cons_0x001a_0x01=VDD12V_MAC2 +hwmon_in.mode_0x001a_0x02=str_constant +hwmon_in.str_cons_0x001a_0x02=ucd90160 +hwmon_in.mode_0x001a_0x03=constant +hwmon_in.int_cons_0x001a_0x03=13200 +hwmon_in.mode_0x001a_0x05=constant +hwmon_in.int_cons_0x001a_0x05=10800 +hwmon_in.mode_0x001a_0x08=constant +hwmon_in.int_cons_0x001a_0x08=12000 +hwmon_in.mode_0x001a_0x07=constant +hwmon_in.int_cons_0x001a_0x07=60 + +# vol27 +hwmon_in.mode_0x001b_0x00=config +hwmon_in.int_cons_0x001b_0x00=0 +hwmon_in.src_0x001b_0x00=file +hwmon_in.frmt_0x001b_0x00=buf +hwmon_in.fpath_0x001b_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001b_0x00=0 +hwmon_in.len_0x001b_0x00=8 +hwmon_in.bit_offset_0x001b_0x00= +hwmon_in.str_cons_0x001b_0x00=in2_input +hwmon_in.mode_0x001b_0x01=str_constant +hwmon_in.str_cons_0x001b_0x01=VDD3.3V_STANDBY +hwmon_in.mode_0x001b_0x02=str_constant +hwmon_in.str_cons_0x001b_0x02=ucd90160 +hwmon_in.mode_0x001b_0x03=constant +hwmon_in.int_cons_0x001b_0x03=3630 +hwmon_in.mode_0x001b_0x05=constant +hwmon_in.int_cons_0x001b_0x05=2970 +hwmon_in.mode_0x001b_0x08=constant +hwmon_in.int_cons_0x001b_0x08=3300 +hwmon_in.mode_0x001b_0x07=constant +hwmon_in.int_cons_0x001b_0x07=16 + +# vol28 +hwmon_in.mode_0x001c_0x00=config +hwmon_in.int_cons_0x001c_0x00=0 +hwmon_in.src_0x001c_0x00=file +hwmon_in.frmt_0x001c_0x00=buf +hwmon_in.fpath_0x001c_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001c_0x00=0 +hwmon_in.len_0x001c_0x00=8 +hwmon_in.bit_offset_0x001c_0x00=0 +hwmon_in.str_cons_0x001c_0x00=in3_input +hwmon_in.mode_0x001c_0x01=str_constant +hwmon_in.str_cons_0x001c_0x01=VDD3V8_CLK +hwmon_in.mode_0x001c_0x02=str_constant +hwmon_in.str_cons_0x001c_0x02=ucd90160 +hwmon_in.mode_0x001c_0x03=constant +hwmon_in.int_cons_0x001c_0x03=4180 +hwmon_in.mode_0x001c_0x05=constant +hwmon_in.int_cons_0x001c_0x05=3420 +hwmon_in.mode_0x001c_0x08=constant +hwmon_in.int_cons_0x001c_0x08=3800 +hwmon_in.mode_0x001c_0x07=constant +hwmon_in.int_cons_0x001c_0x07=19 + +# vol29 +hwmon_in.mode_0x001d_0x00=config +hwmon_in.int_cons_0x001d_0x00=0 +hwmon_in.src_0x001d_0x00=file +hwmon_in.frmt_0x001d_0x00=buf +hwmon_in.fpath_0x001d_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001d_0x00=0 +hwmon_in.len_0x001d_0x00=8 +hwmon_in.bit_offset_0x001d_0x00=0 +hwmon_in.str_cons_0x001d_0x00=in4_input +hwmon_in.mode_0x001d_0x01=str_constant +hwmon_in.str_cons_0x001d_0x01=VDD5V_VR +hwmon_in.mode_0x001d_0x02=str_constant +hwmon_in.str_cons_0x001d_0x02=ucd90160 +hwmon_in.mode_0x001d_0x03=constant +hwmon_in.int_cons_0x001d_0x03=5500 +hwmon_in.mode_0x001d_0x05=constant +hwmon_in.int_cons_0x001d_0x05=4500 +hwmon_in.mode_0x001d_0x08=constant +hwmon_in.int_cons_0x001d_0x08=5000 +hwmon_in.mode_0x001d_0x07=constant +hwmon_in.int_cons_0x001d_0x07=25 + +# vol30 +hwmon_in.mode_0x001e_0x00=config +hwmon_in.int_cons_0x001e_0x00=0 +hwmon_in.src_0x001e_0x00=file +hwmon_in.frmt_0x001e_0x00=buf +hwmon_in.fpath_0x001e_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001e_0x00=0 +hwmon_in.len_0x001e_0x00=8 +hwmon_in.bit_offset_0x001e_0x00=0 +hwmon_in.str_cons_0x001e_0x00=in5_input +hwmon_in.mode_0x001e_0x01=str_constant +hwmon_in.str_cons_0x001e_0x01=VDD1.5V +hwmon_in.mode_0x001e_0x02=str_constant +hwmon_in.str_cons_0x001e_0x02=ucd90160 +hwmon_in.mode_0x001e_0x03=constant +hwmon_in.int_cons_0x001e_0x03=1650 +hwmon_in.mode_0x001e_0x05=constant +hwmon_in.int_cons_0x001e_0x05=1350 +hwmon_in.mode_0x001e_0x08=constant +hwmon_in.int_cons_0x001e_0x08=1500 +hwmon_in.mode_0x001e_0x07=constant +hwmon_in.int_cons_0x001e_0x07=7 + +# vol31 +hwmon_in.mode_0x001f_0x00=config +hwmon_in.int_cons_0x001f_0x00=0 +hwmon_in.src_0x001f_0x00=file +hwmon_in.frmt_0x001f_0x00=buf +hwmon_in.fpath_0x001f_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001f_0x00=0 +hwmon_in.len_0x001f_0x00=8 +hwmon_in.bit_offset_0x001f_0x00=0 +hwmon_in.str_cons_0x001f_0x00=in6_input +hwmon_in.mode_0x001f_0x01=str_constant +hwmon_in.str_cons_0x001f_0x01=VDD1_2V +hwmon_in.mode_0x001f_0x02=str_constant +hwmon_in.str_cons_0x001f_0x02=ucd90160 +hwmon_in.mode_0x001f_0x03=constant +hwmon_in.int_cons_0x001f_0x03=1320 +hwmon_in.mode_0x001f_0x05=constant +hwmon_in.int_cons_0x001f_0x05=1080 +hwmon_in.mode_0x001f_0x08=constant +hwmon_in.int_cons_0x001f_0x08=1200 +hwmon_in.mode_0x001f_0x07=constant +hwmon_in.int_cons_0x001f_0x07=6 + +# vol32 +hwmon_in.mode_0x0020_0x00=config +hwmon_in.int_cons_0x0020_0x00=0 +hwmon_in.src_0x0020_0x00=file +hwmon_in.frmt_0x0020_0x00=buf +hwmon_in.fpath_0x0020_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0020_0x00=0 +hwmon_in.len_0x0020_0x00=8 +hwmon_in.bit_offset_0x0020_0x00= +hwmon_in.str_cons_0x0020_0x00=in7_input +hwmon_in.mode_0x0020_0x01=str_constant +hwmon_in.str_cons_0x0020_0x01=VDD_PLL0 +hwmon_in.mode_0x0020_0x02=str_constant +hwmon_in.str_cons_0x0020_0x02=ucd90160 +hwmon_in.mode_0x0020_0x03=constant +hwmon_in.int_cons_0x0020_0x03=990 +hwmon_in.mode_0x0020_0x05=constant +hwmon_in.int_cons_0x0020_0x05=810 +hwmon_in.mode_0x0020_0x08=constant +hwmon_in.int_cons_0x0020_0x08=900 +hwmon_in.mode_0x0020_0x07=constant +hwmon_in.int_cons_0x0020_0x07=4 + +# vol33 +hwmon_in.mode_0x0021_0x00=config +hwmon_in.int_cons_0x0021_0x00=0 +hwmon_in.src_0x0021_0x00=file +hwmon_in.frmt_0x0021_0x00=buf +hwmon_in.fpath_0x0021_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0021_0x00=0 +hwmon_in.len_0x0021_0x00=8 +hwmon_in.bit_offset_0x0021_0x00= +hwmon_in.str_cons_0x0021_0x00=in8_input +hwmon_in.mode_0x0021_0x01=str_constant +hwmon_in.str_cons_0x0021_0x01=VDD_PLL1 +hwmon_in.mode_0x0021_0x02=str_constant +hwmon_in.str_cons_0x0021_0x02=ucd90160 +hwmon_in.mode_0x0021_0x03=constant +hwmon_in.int_cons_0x0021_0x03=990 +hwmon_in.mode_0x0021_0x05=constant +hwmon_in.int_cons_0x0021_0x05=810 +hwmon_in.mode_0x0021_0x08=constant +hwmon_in.int_cons_0x0021_0x08=900 +hwmon_in.mode_0x0021_0x07=constant +hwmon_in.int_cons_0x0021_0x07=4 + +# vol34 +hwmon_in.mode_0x0022_0x00=config +hwmon_in.int_cons_0x0022_0x00=0 +hwmon_in.src_0x0022_0x00=file +hwmon_in.frmt_0x0022_0x00=buf +hwmon_in.fpath_0x0022_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0022_0x00=0 +hwmon_in.len_0x0022_0x00=8 +hwmon_in.bit_offset_0x0022_0x00= +hwmon_in.str_cons_0x0022_0x00=in9_input +hwmon_in.mode_0x0022_0x01=str_constant +hwmon_in.str_cons_0x0022_0x01=VDD_PLL2 +hwmon_in.mode_0x0022_0x02=str_constant +hwmon_in.str_cons_0x0022_0x02=ucd90160 +hwmon_in.mode_0x0022_0x03=constant +hwmon_in.int_cons_0x0022_0x03=990 +hwmon_in.mode_0x0022_0x05=constant +hwmon_in.int_cons_0x0022_0x05=810 +hwmon_in.mode_0x0022_0x08=constant +hwmon_in.int_cons_0x0022_0x08=900 +hwmon_in.mode_0x0022_0x07=constant +hwmon_in.int_cons_0x0022_0x07=4 + +# vol35 +hwmon_in.mode_0x0023_0x00=config +hwmon_in.int_cons_0x0023_0x00=0 +hwmon_in.src_0x0023_0x00=file +hwmon_in.frmt_0x0023_0x00=buf +hwmon_in.fpath_0x0023_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0023_0x00=0 +hwmon_in.len_0x0023_0x00=8 +hwmon_in.bit_offset_0x0023_0x00= +hwmon_in.str_cons_0x0023_0x00=in10_input +hwmon_in.mode_0x0023_0x01=str_constant +hwmon_in.str_cons_0x0023_0x01=VDD_PLL3 +hwmon_in.mode_0x0023_0x02=str_constant +hwmon_in.str_cons_0x0023_0x02=ucd90160 +hwmon_in.mode_0x0023_0x03=constant +hwmon_in.int_cons_0x0023_0x03=990 +hwmon_in.mode_0x0023_0x05=constant +hwmon_in.int_cons_0x0023_0x05=810 +hwmon_in.mode_0x0023_0x08=constant +hwmon_in.int_cons_0x0023_0x08=900 +hwmon_in.mode_0x0023_0x07=constant +hwmon_in.int_cons_0x0023_0x07=4 + +# vol36 +hwmon_in.mode_0x0024_0x00=config +hwmon_in.int_cons_0x0024_0x00=0 +hwmon_in.src_0x0024_0x00=file +hwmon_in.frmt_0x0024_0x00=buf +hwmon_in.fpath_0x0024_0x00=/sys/bus/i2c/devices/84-0040/hwmon/ +hwmon_in.addr_0x0024_0x00=0 +hwmon_in.len_0x0024_0x00=8 +hwmon_in.bit_offset_0x0024_0x00= +hwmon_in.str_cons_0x0024_0x00=in3_input +hwmon_in.mode_0x0024_0x01=str_constant +hwmon_in.str_cons_0x0024_0x01=XDPE_VDD_CORE +hwmon_in.mode_0x0024_0x02=str_constant +hwmon_in.str_cons_0x0024_0x02=xdpe132g5c +hwmon_in.mode_0x0024_0x03=constant +hwmon_in.int_cons_0x0024_0x03=900 +hwmon_in.mode_0x0024_0x05=constant +hwmon_in.int_cons_0x0024_0x05=630 +hwmon_in.mode_0x0024_0x08=constant +hwmon_in.int_cons_0x0024_0x08=800 +hwmon_in.mode_0x0024_0x07=constant +hwmon_in.int_cons_0x0024_0x07=12 + +# vol37 +hwmon_in.mode_0x0025_0x00=config +hwmon_in.int_cons_0x0025_0x00=0 +hwmon_in.src_0x0025_0x00=file +hwmon_in.frmt_0x0025_0x00=buf +hwmon_in.fpath_0x0025_0x00=/sys/bus/i2c/devices/85-004d/hwmon/ +hwmon_in.addr_0x0025_0x00=0 +hwmon_in.len_0x0025_0x00=8 +hwmon_in.bit_offset_0x0025_0x00= +hwmon_in.str_cons_0x0025_0x00=in3_input +hwmon_in.mode_0x0025_0x01=str_constant +hwmon_in.str_cons_0x0025_0x01=XDPE_VDD0_9V_ANLG0 +hwmon_in.mode_0x0025_0x02=str_constant +hwmon_in.str_cons_0x0025_0x02=xdpe132g5c +hwmon_in.mode_0x0025_0x03=constant +hwmon_in.int_cons_0x0025_0x03=990 +hwmon_in.mode_0x0025_0x05=constant +hwmon_in.int_cons_0x0025_0x05=810 +hwmon_in.mode_0x0025_0x08=constant +hwmon_in.int_cons_0x0025_0x08=900 +hwmon_in.mode_0x0025_0x07=constant +hwmon_in.int_cons_0x0025_0x07=12 + +# vol38 +hwmon_in.mode_0x0026_0x00=config +hwmon_in.int_cons_0x0026_0x00=0 +hwmon_in.src_0x0026_0x00=file +hwmon_in.frmt_0x0026_0x00=buf +hwmon_in.fpath_0x0026_0x00=/sys/bus/i2c/devices/85-004d/hwmon/ +hwmon_in.addr_0x0026_0x00=0 +hwmon_in.len_0x0026_0x00=8 +hwmon_in.bit_offset_0x0026_0x00= +hwmon_in.str_cons_0x0026_0x00=in4_input +hwmon_in.mode_0x0026_0x01=str_constant +hwmon_in.str_cons_0x0026_0x01=XDPE_VDD0_75V_ANLG0 +hwmon_in.mode_0x0026_0x02=str_constant +hwmon_in.str_cons_0x0026_0x02=xdpe132g5c +hwmon_in.mode_0x0026_0x03=constant +hwmon_in.int_cons_0x0026_0x03=825 +hwmon_in.mode_0x0026_0x05=constant +hwmon_in.int_cons_0x0026_0x05=675 +hwmon_in.mode_0x0026_0x08=constant +hwmon_in.int_cons_0x0026_0x08=750 +hwmon_in.mode_0x0026_0x07=constant +hwmon_in.int_cons_0x0026_0x07=12 + +# vol39 +hwmon_in.mode_0x0027_0x00=config +hwmon_in.int_cons_0x0027_0x00=0 +hwmon_in.src_0x0027_0x00=file +hwmon_in.frmt_0x0027_0x00=buf +hwmon_in.fpath_0x0027_0x00=/sys/bus/i2c/devices/86-004d/hwmon/ +hwmon_in.addr_0x0027_0x00=0 +hwmon_in.len_0x0027_0x00=8 +hwmon_in.bit_offset_0x0027_0x00= +hwmon_in.str_cons_0x0027_0x00=in3_input +hwmon_in.mode_0x0027_0x01=str_constant +hwmon_in.str_cons_0x0027_0x01=XDPE_VDD0_9V_ANLG1 +hwmon_in.mode_0x0027_0x02=str_constant +hwmon_in.str_cons_0x0027_0x02=xdpe132g5c +hwmon_in.mode_0x0027_0x03=constant +hwmon_in.int_cons_0x0027_0x03=990 +hwmon_in.mode_0x0027_0x05=constant +hwmon_in.int_cons_0x0027_0x05=810 +hwmon_in.mode_0x0027_0x08=constant +hwmon_in.int_cons_0x0027_0x08=900 +hwmon_in.mode_0x0027_0x07=constant +hwmon_in.int_cons_0x0027_0x07=12 + +# vol40 +hwmon_in.mode_0x0028_0x00=config +hwmon_in.int_cons_0x0028_0x00=0 +hwmon_in.src_0x0028_0x00=file +hwmon_in.frmt_0x0028_0x00=buf +hwmon_in.fpath_0x0028_0x00=/sys/bus/i2c/devices/86-004d/hwmon/ +hwmon_in.addr_0x0028_0x00=0 +hwmon_in.len_0x0028_0x00=8 +hwmon_in.bit_offset_0x0028_0x00= +hwmon_in.str_cons_0x0028_0x00=in4_input +hwmon_in.mode_0x0028_0x01=str_constant +hwmon_in.str_cons_0x0028_0x01=XDPE_VDD0_75V_ANLG1 +hwmon_in.mode_0x0028_0x02=str_constant +hwmon_in.str_cons_0x0028_0x02=xdpe132g5c +hwmon_in.mode_0x0028_0x03=constant +hwmon_in.int_cons_0x0028_0x03=825 +hwmon_in.mode_0x0028_0x05=constant +hwmon_in.int_cons_0x0028_0x05=675 +hwmon_in.mode_0x0028_0x08=constant +hwmon_in.int_cons_0x0028_0x08=750 +hwmon_in.mode_0x0028_0x07=constant +hwmon_in.int_cons_0x0028_0x07=12 + +# vol41 +hwmon_in.mode_0x0029_0x00=config +hwmon_in.int_cons_0x0029_0x00=3 +hwmon_in.src_0x0029_0x00=file +hwmon_in.frmt_0x0029_0x00=buf +hwmon_in.fpath_0x0029_0x00=/sys/bus/i2c/devices/90-0070/hwmon/ +hwmon_in.addr_0x0029_0x00=0 +hwmon_in.len_0x0029_0x00=8 +hwmon_in.bit_offset_0x0029_0x00=0 +hwmon_in.str_cons_0x0029_0x00=in3_input +hwmon_in.mode_0x0029_0x01=str_constant +hwmon_in.str_cons_0x0029_0x01=OSFP_VDD3.3V_A1 +hwmon_in.mode_0x0029_0x02=str_constant +hwmon_in.str_cons_0x0029_0x02=xdpe12284c +hwmon_in.mode_0x0029_0x03=constant +hwmon_in.int_cons_0x0029_0x03=3630 +hwmon_in.mode_0x0029_0x05=constant +hwmon_in.int_cons_0x0029_0x05=2970 +hwmon_in.mode_0x0029_0x08=constant +hwmon_in.int_cons_0x0029_0x08=3300 +hwmon_in.mode_0x0029_0x07=constant +hwmon_in.int_cons_0x0029_0x07=12 +hwmon_in.int_extra1_0x0029_0x00=1500 + +# vol42 +hwmon_in.mode_0x002a_0x00=config +hwmon_in.int_cons_0x002a_0x00=3 +hwmon_in.src_0x002a_0x00=file +hwmon_in.frmt_0x002a_0x00=buf +hwmon_in.fpath_0x002a_0x00=/sys/bus/i2c/devices/90-0070/hwmon/ +hwmon_in.addr_0x002a_0x00=0 +hwmon_in.len_0x002a_0x00=8 +hwmon_in.bit_offset_0x002a_0x00=0 +hwmon_in.str_cons_0x002a_0x00=in4_input +hwmon_in.mode_0x002a_0x01=str_constant +hwmon_in.str_cons_0x002a_0x01=OSFP_VDD3.3V_B1 +hwmon_in.mode_0x002a_0x02=str_constant +hwmon_in.str_cons_0x002a_0x02=xdpe12284c +hwmon_in.mode_0x002a_0x03=constant +hwmon_in.int_cons_0x002a_0x03=3630 +hwmon_in.mode_0x002a_0x05=constant +hwmon_in.int_cons_0x002a_0x05=2970 +hwmon_in.mode_0x002a_0x08=constant +hwmon_in.int_cons_0x002a_0x08=3300 +hwmon_in.mode_0x002a_0x07=constant +hwmon_in.int_cons_0x002a_0x07=12 +hwmon_in.int_extra1_0x002a_0x00=1500 + +# vol43 +hwmon_in.mode_0x002b_0x00=config +hwmon_in.int_cons_0x002b_0x00=3 +hwmon_in.src_0x002b_0x00=file +hwmon_in.frmt_0x002b_0x00=buf +hwmon_in.fpath_0x002b_0x00=/sys/bus/i2c/devices/91-0070/hwmon/ +hwmon_in.addr_0x002b_0x00=0 +hwmon_in.len_0x002b_0x00=8 +hwmon_in.bit_offset_0x002b_0x00=0 +hwmon_in.str_cons_0x002b_0x00=in3_input +hwmon_in.mode_0x002b_0x01=str_constant +hwmon_in.str_cons_0x002b_0x01=OSFP_VDD3.3V_A2 +hwmon_in.mode_0x002b_0x02=str_constant +hwmon_in.str_cons_0x002b_0x02=xdpe12284c +hwmon_in.mode_0x002b_0x03=constant +hwmon_in.int_cons_0x002b_0x03=3630 +hwmon_in.mode_0x002b_0x05=constant +hwmon_in.int_cons_0x002b_0x05=2970 +hwmon_in.mode_0x002b_0x08=constant +hwmon_in.int_cons_0x002b_0x08=3300 +hwmon_in.mode_0x002b_0x07=constant +hwmon_in.int_cons_0x002b_0x07=12 +hwmon_in.int_extra1_0x002b_0x00=1500 + +# vol44 +hwmon_in.mode_0x002c_0x00=config +hwmon_in.int_cons_0x002c_0x00=3 +hwmon_in.src_0x002c_0x00=file +hwmon_in.frmt_0x002c_0x00=buf +hwmon_in.fpath_0x002c_0x00=/sys/bus/i2c/devices/91-0070/hwmon/ +hwmon_in.addr_0x002c_0x00=0 +hwmon_in.len_0x002c_0x00=8 +hwmon_in.bit_offset_0x002c_0x00=0 +hwmon_in.str_cons_0x002c_0x00=in4_input +hwmon_in.mode_0x002c_0x01=str_constant +hwmon_in.str_cons_0x002c_0x01=OSFP_VDD3.3V_B2 +hwmon_in.mode_0x002c_0x02=str_constant +hwmon_in.str_cons_0x002c_0x02=xdpe12284c +hwmon_in.mode_0x002c_0x03=constant +hwmon_in.int_cons_0x002c_0x03=3630 +hwmon_in.mode_0x002c_0x05=constant +hwmon_in.int_cons_0x002c_0x05=2970 +hwmon_in.mode_0x002c_0x08=constant +hwmon_in.int_cons_0x002c_0x08=3300 +hwmon_in.mode_0x002c_0x07=constant +hwmon_in.int_cons_0x002c_0x07=12 +hwmon_in.int_extra1_0x002c_0x00=1500 + +# vol45 +hwmon_in.mode_0x002d_0x00=config +hwmon_in.int_cons_0x002d_0x00=3 +hwmon_in.src_0x002d_0x00=file +hwmon_in.frmt_0x002d_0x00=buf +hwmon_in.fpath_0x002d_0x00=/sys/bus/i2c/devices/92-0070/hwmon/ +hwmon_in.addr_0x002d_0x00=0 +hwmon_in.len_0x002d_0x00=8 +hwmon_in.bit_offset_0x002d_0x00=0 +hwmon_in.str_cons_0x002d_0x00=in3_input +hwmon_in.mode_0x002d_0x01=str_constant +hwmon_in.str_cons_0x002d_0x01=OSFP_VDD3.3V_A3 +hwmon_in.mode_0x002d_0x02=str_constant +hwmon_in.str_cons_0x002d_0x02=xdpe12284c +hwmon_in.mode_0x002d_0x03=constant +hwmon_in.int_cons_0x002d_0x03=3630 +hwmon_in.mode_0x002d_0x05=constant +hwmon_in.int_cons_0x002d_0x05=2970 +hwmon_in.mode_0x002d_0x08=constant +hwmon_in.int_cons_0x002d_0x08=3300 +hwmon_in.mode_0x002d_0x07=constant +hwmon_in.int_cons_0x002d_0x07=12 +hwmon_in.int_extra1_0x002d_0x00=1500 + +# vol46 +hwmon_in.mode_0x002e_0x00=config +hwmon_in.int_cons_0x002e_0x00=3 +hwmon_in.src_0x002e_0x00=file +hwmon_in.frmt_0x002e_0x00=buf +hwmon_in.fpath_0x002e_0x00=/sys/bus/i2c/devices/92-0070/hwmon/ +hwmon_in.addr_0x002e_0x00=0 +hwmon_in.len_0x002e_0x00=8 +hwmon_in.bit_offset_0x002e_0x00=0 +hwmon_in.str_cons_0x002e_0x00=in4_input +hwmon_in.mode_0x002e_0x01=str_constant +hwmon_in.str_cons_0x002e_0x01=OSFP_VDD3.3V_B3 +hwmon_in.mode_0x002e_0x02=str_constant +hwmon_in.str_cons_0x002e_0x02=xdpe12284c +hwmon_in.mode_0x002e_0x03=constant +hwmon_in.int_cons_0x002e_0x03=3630 +hwmon_in.mode_0x002e_0x05=constant +hwmon_in.int_cons_0x002e_0x05=2970 +hwmon_in.mode_0x002e_0x08=constant +hwmon_in.int_cons_0x002e_0x08=3300 +hwmon_in.mode_0x002e_0x07=constant +hwmon_in.int_cons_0x002e_0x07=12 +hwmon_in.int_extra1_0x002e_0x00=1500 + +# vol47 +hwmon_in.mode_0x002f_0x00=config +hwmon_in.int_cons_0x002f_0x00=3 +hwmon_in.src_0x002f_0x00=file +hwmon_in.frmt_0x002f_0x00=buf +hwmon_in.fpath_0x002f_0x00=/sys/bus/i2c/devices/93-0070/hwmon/ +hwmon_in.addr_0x002f_0x00=0 +hwmon_in.len_0x002f_0x00=8 +hwmon_in.bit_offset_0x002f_0x00=0 +hwmon_in.str_cons_0x002f_0x00=in3_input +hwmon_in.mode_0x002f_0x01=str_constant +hwmon_in.str_cons_0x002f_0x01=OSFP_VDD3.3V_A4 +hwmon_in.mode_0x002f_0x02=str_constant +hwmon_in.str_cons_0x002f_0x02=xdpe12284c +hwmon_in.mode_0x002f_0x03=constant +hwmon_in.int_cons_0x002f_0x03=3630 +hwmon_in.mode_0x002f_0x05=constant +hwmon_in.int_cons_0x002f_0x05=2970 +hwmon_in.mode_0x002f_0x08=constant +hwmon_in.int_cons_0x002f_0x08=3300 +hwmon_in.mode_0x002f_0x07=constant +hwmon_in.int_cons_0x002f_0x07=12 +hwmon_in.int_extra1_0x002f_0x00=1500 + +# vol48 +hwmon_in.mode_0x0030_0x00=config +hwmon_in.int_cons_0x0030_0x00=3 +hwmon_in.src_0x0030_0x00=file +hwmon_in.frmt_0x0030_0x00=buf +hwmon_in.fpath_0x0030_0x00=/sys/bus/i2c/devices/93-0070/hwmon/ +hwmon_in.addr_0x0030_0x00=0 +hwmon_in.len_0x0030_0x00=8 +hwmon_in.bit_offset_0x0030_0x00=0 +hwmon_in.str_cons_0x0030_0x00=in4_input +hwmon_in.mode_0x0030_0x01=str_constant +hwmon_in.str_cons_0x0030_0x01=OSFP_VDD3.3V_B4 +hwmon_in.mode_0x0030_0x02=str_constant +hwmon_in.str_cons_0x0030_0x02=xdpe12284c +hwmon_in.mode_0x0030_0x03=constant +hwmon_in.int_cons_0x0030_0x03=3630 +hwmon_in.mode_0x0030_0x05=constant +hwmon_in.int_cons_0x0030_0x05=2970 +hwmon_in.mode_0x0030_0x08=constant +hwmon_in.int_cons_0x0030_0x08=3300 +hwmon_in.mode_0x0030_0x07=constant +hwmon_in.int_cons_0x0030_0x07=12 +hwmon_in.int_extra1_0x0030_0x00=1500 + +# vol49 +hwmon_in.mode_0x0031_0x00=config +hwmon_in.int_cons_0x0031_0x00=3 +hwmon_in.src_0x0031_0x00=file +hwmon_in.frmt_0x0031_0x00=buf +hwmon_in.fpath_0x0031_0x00=/sys/bus/i2c/devices/94-0070/hwmon/ +hwmon_in.addr_0x0031_0x00=0 +hwmon_in.len_0x0031_0x00=8 +hwmon_in.bit_offset_0x0031_0x00=0 +hwmon_in.str_cons_0x0031_0x00=in3_input +hwmon_in.mode_0x0031_0x01=str_constant +hwmon_in.str_cons_0x0031_0x01=OSFP_VDD3.3V_A5 +hwmon_in.mode_0x0031_0x02=str_constant +hwmon_in.str_cons_0x0031_0x02=xdpe12284c +hwmon_in.mode_0x0031_0x03=constant +hwmon_in.int_cons_0x0031_0x03=3630 +hwmon_in.mode_0x0031_0x05=constant +hwmon_in.int_cons_0x0031_0x05=2970 +hwmon_in.mode_0x0031_0x08=constant +hwmon_in.int_cons_0x0031_0x08=3300 +hwmon_in.mode_0x0031_0x07=constant +hwmon_in.int_cons_0x0031_0x07=12 +hwmon_in.int_extra1_0x0031_0x00=1500 + +# vol50 +hwmon_in.mode_0x0032_0x00=config +hwmon_in.int_cons_0x0032_0x00=3 +hwmon_in.src_0x0032_0x00=file +hwmon_in.frmt_0x0032_0x00=buf +hwmon_in.fpath_0x0032_0x00=/sys/bus/i2c/devices/94-0070/hwmon/ +hwmon_in.addr_0x0032_0x00=0 +hwmon_in.len_0x0032_0x00=8 +hwmon_in.bit_offset_0x0032_0x00=0 +hwmon_in.str_cons_0x0032_0x00=in4_input +hwmon_in.mode_0x0032_0x01=str_constant +hwmon_in.str_cons_0x0032_0x01=OSFP_VDD3.3V_B5 +hwmon_in.mode_0x0032_0x02=str_constant +hwmon_in.str_cons_0x0032_0x02=xdpe12284c +hwmon_in.mode_0x0032_0x03=constant +hwmon_in.int_cons_0x0032_0x03=3630 +hwmon_in.mode_0x0032_0x05=constant +hwmon_in.int_cons_0x0032_0x05=2970 +hwmon_in.mode_0x0032_0x08=constant +hwmon_in.int_cons_0x0032_0x08=3300 +hwmon_in.mode_0x0032_0x07=constant +hwmon_in.int_cons_0x0032_0x07=12 +hwmon_in.int_extra1_0x0032_0x00=1500 + +# vol51 +hwmon_in.mode_0x0033_0x00=config +hwmon_in.int_cons_0x0033_0x00=3 +hwmon_in.src_0x0033_0x00=file +hwmon_in.frmt_0x0033_0x00=buf +hwmon_in.fpath_0x0033_0x00=/sys/bus/i2c/devices/95-0070/hwmon/ +hwmon_in.addr_0x0033_0x00=0 +hwmon_in.len_0x0033_0x00=8 +hwmon_in.bit_offset_0x0033_0x00=0 +hwmon_in.str_cons_0x0033_0x00=in3_input +hwmon_in.mode_0x0033_0x01=str_constant +hwmon_in.str_cons_0x0033_0x01=OSFP_VDD3.3V_A6 +hwmon_in.mode_0x0033_0x02=str_constant +hwmon_in.str_cons_0x0033_0x02=xdpe12284c +hwmon_in.mode_0x0033_0x03=constant +hwmon_in.int_cons_0x0033_0x03=3630 +hwmon_in.mode_0x0033_0x05=constant +hwmon_in.int_cons_0x0033_0x05=2970 +hwmon_in.mode_0x0033_0x08=constant +hwmon_in.int_cons_0x0033_0x08=3300 +hwmon_in.mode_0x0033_0x07=constant +hwmon_in.int_cons_0x0033_0x07=12 +hwmon_in.int_extra1_0x0033_0x00=1500 + +# vol52 +hwmon_in.mode_0x0034_0x00=config +hwmon_in.int_cons_0x0034_0x00=3 +hwmon_in.src_0x0034_0x00=file +hwmon_in.frmt_0x0034_0x00=buf +hwmon_in.fpath_0x0034_0x00=/sys/bus/i2c/devices/95-0070/hwmon/ +hwmon_in.addr_0x0034_0x00=0 +hwmon_in.len_0x0034_0x00=8 +hwmon_in.bit_offset_0x0034_0x00=0 +hwmon_in.str_cons_0x0034_0x00=in4_input +hwmon_in.mode_0x0034_0x01=str_constant +hwmon_in.str_cons_0x0034_0x01=OSFP_VDD3.3V_B6 +hwmon_in.mode_0x0034_0x02=str_constant +hwmon_in.str_cons_0x0034_0x02=xdpe12284c +hwmon_in.mode_0x0034_0x03=constant +hwmon_in.int_cons_0x0034_0x03=3630 +hwmon_in.mode_0x0034_0x05=constant +hwmon_in.int_cons_0x0034_0x05=2970 +hwmon_in.mode_0x0034_0x08=constant +hwmon_in.int_cons_0x0034_0x08=3300 +hwmon_in.mode_0x0034_0x07=constant +hwmon_in.int_cons_0x0034_0x07=12 +hwmon_in.int_extra1_0x0034_0x00=1500 + +# vol53 +hwmon_in.mode_0x0035_0x00=config +hwmon_in.int_cons_0x0035_0x00=3 +hwmon_in.src_0x0035_0x00=file +hwmon_in.frmt_0x0035_0x00=buf +hwmon_in.fpath_0x0035_0x00=/sys/bus/i2c/devices/96-0070/hwmon/ +hwmon_in.addr_0x0035_0x00=0 +hwmon_in.len_0x0035_0x00=8 +hwmon_in.bit_offset_0x0035_0x00=0 +hwmon_in.str_cons_0x0035_0x00=in3_input +hwmon_in.mode_0x0035_0x01=str_constant +hwmon_in.str_cons_0x0035_0x01=OSFP_VDD3.3V_A7 +hwmon_in.mode_0x0035_0x02=str_constant +hwmon_in.str_cons_0x0035_0x02=xdpe12284c +hwmon_in.mode_0x0035_0x03=constant +hwmon_in.int_cons_0x0035_0x03=3630 +hwmon_in.mode_0x0035_0x05=constant +hwmon_in.int_cons_0x0035_0x05=2970 +hwmon_in.mode_0x0035_0x08=constant +hwmon_in.int_cons_0x0035_0x08=3300 +hwmon_in.mode_0x0035_0x07=constant +hwmon_in.int_cons_0x0035_0x07=12 +hwmon_in.int_extra1_0x0035_0x00=1500 + +# vol54 +hwmon_in.mode_0x0036_0x00=config +hwmon_in.int_cons_0x0036_0x00=3 +hwmon_in.src_0x0036_0x00=file +hwmon_in.frmt_0x0036_0x00=buf +hwmon_in.fpath_0x0036_0x00=/sys/bus/i2c/devices/96-0070/hwmon/ +hwmon_in.addr_0x0036_0x00=0 +hwmon_in.len_0x0036_0x00=8 +hwmon_in.bit_offset_0x0036_0x00=0 +hwmon_in.str_cons_0x0036_0x00=in4_input +hwmon_in.mode_0x0036_0x01=str_constant +hwmon_in.str_cons_0x0036_0x01=OSFP_VDD3.3V_B7 +hwmon_in.mode_0x0036_0x02=str_constant +hwmon_in.str_cons_0x0036_0x02=xdpe12284c +hwmon_in.mode_0x0036_0x03=constant +hwmon_in.int_cons_0x0036_0x03=3630 +hwmon_in.mode_0x0036_0x05=constant +hwmon_in.int_cons_0x0036_0x05=2970 +hwmon_in.mode_0x0036_0x08=constant +hwmon_in.int_cons_0x0036_0x08=3300 +hwmon_in.mode_0x0036_0x07=constant +hwmon_in.int_cons_0x0036_0x07=12 +hwmon_in.int_extra1_0x0036_0x00=1500 + +# vol55 +hwmon_in.mode_0x0037_0x00=config +hwmon_in.int_cons_0x0037_0x00=3 +hwmon_in.src_0x0037_0x00=file +hwmon_in.frmt_0x0037_0x00=buf +hwmon_in.fpath_0x0037_0x00=/sys/bus/i2c/devices/97-0070/hwmon/ +hwmon_in.addr_0x0037_0x00=0 +hwmon_in.len_0x0037_0x00=8 +hwmon_in.bit_offset_0x0037_0x00=0 +hwmon_in.str_cons_0x0037_0x00=in3_input +hwmon_in.mode_0x0037_0x01=str_constant +hwmon_in.str_cons_0x0037_0x01=OSFP_VDD3.3V_A8 +hwmon_in.mode_0x0037_0x02=str_constant +hwmon_in.str_cons_0x0037_0x02=xdpe12284c +hwmon_in.mode_0x0037_0x03=constant +hwmon_in.int_cons_0x0037_0x03=3630 +hwmon_in.mode_0x0037_0x05=constant +hwmon_in.int_cons_0x0037_0x05=2970 +hwmon_in.mode_0x0037_0x08=constant +hwmon_in.int_cons_0x0037_0x08=3300 +hwmon_in.mode_0x0037_0x07=constant +hwmon_in.int_cons_0x0037_0x07=12 +hwmon_in.int_extra1_0x0037_0x00=1500 + +# vol56 +hwmon_in.mode_0x0038_0x00=config +hwmon_in.int_cons_0x0038_0x00=3 +hwmon_in.src_0x0038_0x00=file +hwmon_in.frmt_0x0038_0x00=buf +hwmon_in.fpath_0x0038_0x00=/sys/bus/i2c/devices/97-0070/hwmon/ +hwmon_in.addr_0x0038_0x00=0 +hwmon_in.len_0x0038_0x00=8 +hwmon_in.bit_offset_0x0038_0x00=0 +hwmon_in.str_cons_0x0038_0x00=in3_input +hwmon_in.mode_0x0038_0x01=str_constant +hwmon_in.str_cons_0x0038_0x01=OSFP_VDD3.3V_B8 +hwmon_in.mode_0x0038_0x02=str_constant +hwmon_in.str_cons_0x0038_0x02=xdpe12284c +hwmon_in.mode_0x0038_0x03=constant +hwmon_in.int_cons_0x0038_0x03=3630 +hwmon_in.mode_0x0038_0x05=constant +hwmon_in.int_cons_0x0038_0x05=2970 +hwmon_in.mode_0x0038_0x08=constant +hwmon_in.int_cons_0x0038_0x08=3300 +hwmon_in.mode_0x0038_0x07=constant +hwmon_in.int_cons_0x0038_0x07=12 +hwmon_in.int_extra1_0x0038_0x00=1500 + +# vol57 +hwmon_in.mode_0x0039_0x00=config +hwmon_in.int_cons_0x0039_0x00=0 +hwmon_in.src_0x0039_0x00=file +hwmon_in.frmt_0x0039_0x00=buf +hwmon_in.fpath_0x0039_0x00=/sys/bus/i2c/devices/69-0070/hwmon/ +hwmon_in.addr_0x0039_0x00=0 +hwmon_in.len_0x0039_0x00=8 +hwmon_in.bit_offset_0x0039_0x00= +hwmon_in.str_cons_0x0039_0x00=in3_input +hwmon_in.mode_0x0039_0x01=str_constant +hwmon_in.str_cons_0x0039_0x01=CPU_XDPE_VCCIN_V +hwmon_in.mode_0x0039_0x02=str_constant +hwmon_in.str_cons_0x0039_0x02=xdpe12284c +hwmon_in.mode_0x0039_0x03=constant +hwmon_in.int_cons_0x0039_0x03=2200 +hwmon_in.mode_0x0039_0x05=constant +hwmon_in.int_cons_0x0039_0x05=1350 +hwmon_in.mode_0x0039_0x08=constant +hwmon_in.int_cons_0x0039_0x08=1800 +hwmon_in.mode_0x0039_0x07=constant +hwmon_in.int_cons_0x0039_0x07=12 + +# vol58 +hwmon_in.mode_0x003a_0x00=config +hwmon_in.int_cons_0x003a_0x00=0 +hwmon_in.src_0x003a_0x00=file +hwmon_in.frmt_0x003a_0x00=buf +hwmon_in.fpath_0x003a_0x00=/sys/bus/i2c/devices/69-0070/hwmon/ +hwmon_in.addr_0x003a_0x00=0 +hwmon_in.len_0x003a_0x00=8 +hwmon_in.bit_offset_0x003a_0x00= +hwmon_in.str_cons_0x003a_0x00=in4_input +hwmon_in.mode_0x003a_0x01=str_constant +hwmon_in.str_cons_0x003a_0x01=CPU_XDPE_P1V8_V +hwmon_in.mode_0x003a_0x02=str_constant +hwmon_in.str_cons_0x003a_0x02=xdpe12284c +hwmon_in.mode_0x003a_0x03=constant +hwmon_in.int_cons_0x003a_0x03=1910 +hwmon_in.mode_0x003a_0x05=constant +hwmon_in.int_cons_0x003a_0x05=1690 +hwmon_in.mode_0x003a_0x08=constant +hwmon_in.int_cons_0x003a_0x08=1800 +hwmon_in.mode_0x003a_0x07=constant +hwmon_in.int_cons_0x003a_0x07=12 + +# vol59 +hwmon_in.mode_0x003b_0x00=config +hwmon_in.int_cons_0x003b_0x00=0 +hwmon_in.src_0x003b_0x00=file +hwmon_in.frmt_0x003b_0x00=buf +hwmon_in.fpath_0x003b_0x00=/sys/bus/i2c/devices/69-006e/hwmon/ +hwmon_in.addr_0x003b_0x00=0 +hwmon_in.len_0x003b_0x00=8 +hwmon_in.bit_offset_0x003b_0x00= +hwmon_in.str_cons_0x003b_0x00=in3_input +hwmon_in.mode_0x003b_0x01=str_constant +hwmon_in.str_cons_0x003b_0x01=CPU_XDPE_P1V05_V +hwmon_in.mode_0x003b_0x02=str_constant +hwmon_in.str_cons_0x003b_0x02=xdpe12284c +hwmon_in.mode_0x003b_0x03=constant +hwmon_in.int_cons_0x003b_0x03=1160 +hwmon_in.mode_0x003b_0x05=constant +hwmon_in.int_cons_0x003b_0x05=954 +hwmon_in.mode_0x003b_0x08=constant +hwmon_in.int_cons_0x003b_0x08=1060 +hwmon_in.mode_0x003b_0x07=constant +hwmon_in.int_cons_0x003b_0x07=12 + +# vol60 +hwmon_in.mode_0x003c_0x00=config +hwmon_in.int_cons_0x003c_0x00=0 +hwmon_in.src_0x003c_0x00=file +hwmon_in.frmt_0x003c_0x00=buf +hwmon_in.fpath_0x003c_0x00=/sys/bus/i2c/devices/69-006e/hwmon/ +hwmon_in.addr_0x003c_0x00=0 +hwmon_in.len_0x003c_0x00=8 +hwmon_in.bit_offset_0x003c_0x00= +hwmon_in.str_cons_0x003c_0x00=in4_input +hwmon_in.mode_0x003c_0x01=str_constant +hwmon_in.str_cons_0x003c_0x01=CPU_XDPE_VNN_PCH_V +hwmon_in.mode_0x003c_0x02=str_constant +hwmon_in.str_cons_0x003c_0x02=xdpe12284c +hwmon_in.mode_0x003c_0x03=constant +hwmon_in.int_cons_0x003c_0x03=1320 +hwmon_in.mode_0x003c_0x05=constant +hwmon_in.int_cons_0x003c_0x05=540 +hwmon_in.mode_0x003c_0x08=constant +hwmon_in.int_cons_0x003c_0x08=1000 +hwmon_in.mode_0x003c_0x07=constant +hwmon_in.int_cons_0x003c_0x07=12 + +# vol61 +hwmon_in.mode_0x003d_0x00=config +hwmon_in.int_cons_0x003d_0x00=0 +hwmon_in.src_0x003d_0x00=file +hwmon_in.frmt_0x003d_0x00=buf +hwmon_in.fpath_0x003d_0x00=/sys/bus/i2c/devices/69-0068/hwmon/ +hwmon_in.addr_0x003d_0x00=0 +hwmon_in.len_0x003d_0x00=8 +hwmon_in.bit_offset_0x003d_0x00= +hwmon_in.str_cons_0x003d_0x00=in3_input +hwmon_in.mode_0x003d_0x01=str_constant +hwmon_in.str_cons_0x003d_0x01=CPU_XDPE_VNN_NAC_V +hwmon_in.mode_0x003d_0x02=str_constant +hwmon_in.str_cons_0x003d_0x02=xdpe12284c +hwmon_in.mode_0x003d_0x03=constant +hwmon_in.int_cons_0x003d_0x03=1320 +hwmon_in.mode_0x003d_0x05=constant +hwmon_in.int_cons_0x003d_0x05=540 +hwmon_in.mode_0x003d_0x08=constant +hwmon_in.int_cons_0x003d_0x08=1000 +hwmon_in.mode_0x003d_0x07=constant +hwmon_in.int_cons_0x003d_0x07=12 + +# vol62 +hwmon_in.mode_0x003e_0x00=config +hwmon_in.int_cons_0x003e_0x00=0 +hwmon_in.src_0x003e_0x00=file +hwmon_in.frmt_0x003e_0x00=buf +hwmon_in.fpath_0x003e_0x00=/sys/bus/i2c/devices/69-0068/hwmon/ +hwmon_in.addr_0x003e_0x00=0 +hwmon_in.len_0x003e_0x00=8 +hwmon_in.bit_offset_0x003e_0x00=0 +hwmon_in.str_cons_0x003e_0x00=in4_input +hwmon_in.mode_0x003e_0x01=str_constant +hwmon_in.str_cons_0x003e_0x01=CPU_XDPE_VCC_ANA_V +hwmon_in.mode_0x003e_0x02=str_constant +hwmon_in.str_cons_0x003e_0x02=xdpe12284c +hwmon_in.mode_0x003e_0x03=constant +hwmon_in.int_cons_0x003e_0x03=1100 +hwmon_in.mode_0x003e_0x05=constant +hwmon_in.int_cons_0x003e_0x05=900 +hwmon_in.mode_0x003e_0x08=constant +hwmon_in.int_cons_0x003e_0x08=1000 +hwmon_in.mode_0x003e_0x07=constant +hwmon_in.int_cons_0x003e_0x07=12 + +# vol63 +hwmon_in.mode_0x003f_0x00=config +hwmon_in.int_cons_0x003f_0x00=0 +hwmon_in.src_0x003f_0x00=file +hwmon_in.frmt_0x003f_0x00=buf +hwmon_in.fpath_0x003f_0x00=/sys/bus/i2c/devices/69-005e/hwmon/ +hwmon_in.addr_0x003f_0x00=0 +hwmon_in.len_0x003f_0x00=8 +hwmon_in.bit_offset_0x003f_0x00=0 +hwmon_in.str_cons_0x003f_0x00=in3_input +hwmon_in.mode_0x003f_0x01=str_constant +hwmon_in.str_cons_0x003f_0x01=CPU_XDPE_P1V2_VDDQ_V +hwmon_in.mode_0x003f_0x02=str_constant +hwmon_in.str_cons_0x003f_0x02=xdpe12284c +hwmon_in.mode_0x003f_0x03=constant +hwmon_in.int_cons_0x003f_0x03=1280 +hwmon_in.mode_0x003f_0x05=constant +hwmon_in.int_cons_0x003f_0x05=1120 +hwmon_in.mode_0x003f_0x08=constant +hwmon_in.int_cons_0x003f_0x08=1200 +hwmon_in.mode_0x003f_0x07=constant +hwmon_in.int_cons_0x003f_0x07=12 + +# vol64 +hwmon_in.mode_0x0040_0x00=config +hwmon_in.int_cons_0x0040_0x00=0 +hwmon_in.src_0x0040_0x00=file +hwmon_in.frmt_0x0040_0x00=buf +hwmon_in.fpath_0x0040_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0040_0x00=0 +hwmon_in.len_0x0040_0x00=8 +hwmon_in.bit_offset_0x0040_0x00= +hwmon_in.str_cons_0x0040_0x00=in1_input +hwmon_in.mode_0x0040_0x01=str_constant +hwmon_in.str_cons_0x0040_0x01=CPU_P1V05_V +hwmon_in.mode_0x0040_0x02=str_constant +hwmon_in.str_cons_0x0040_0x02=ucd90160 +hwmon_in.mode_0x0040_0x03=constant +hwmon_in.int_cons_0x0040_0x03=1160 +hwmon_in.mode_0x0040_0x05=constant +hwmon_in.int_cons_0x0040_0x05=954 +hwmon_in.mode_0x0040_0x08=constant +hwmon_in.int_cons_0x0040_0x08=1060 +hwmon_in.mode_0x0040_0x07=constant +hwmon_in.int_cons_0x0040_0x07=5 + +# vol65 +hwmon_in.mode_0x0041_0x00=config +hwmon_in.int_cons_0x0041_0x00=0 +hwmon_in.src_0x0041_0x00=file +hwmon_in.frmt_0x0041_0x00=buf +hwmon_in.fpath_0x0041_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0041_0x00=0 +hwmon_in.len_0x0041_0x00=8 +hwmon_in.bit_offset_0x0041_0x00= +hwmon_in.str_cons_0x0041_0x00=in2_input +hwmon_in.mode_0x0041_0x01=str_constant +hwmon_in.str_cons_0x0041_0x01=CPU_VCCIN_V +hwmon_in.mode_0x0041_0x02=str_constant +hwmon_in.str_cons_0x0041_0x02=ucd90160 +hwmon_in.mode_0x0041_0x03=constant +hwmon_in.int_cons_0x0041_0x03=2200 +hwmon_in.mode_0x0041_0x05=constant +hwmon_in.int_cons_0x0041_0x05=1350 +hwmon_in.mode_0x0041_0x08=constant +hwmon_in.int_cons_0x0041_0x08=1800 +hwmon_in.mode_0x0041_0x07=constant +hwmon_in.int_cons_0x0041_0x07=9 + +# vol66 +hwmon_in.mode_0x0042_0x00=config +hwmon_in.int_cons_0x0042_0x00=0 +hwmon_in.src_0x0042_0x00=file +hwmon_in.frmt_0x0042_0x00=buf +hwmon_in.fpath_0x0042_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0042_0x00=0 +hwmon_in.len_0x0042_0x00=8 +hwmon_in.bit_offset_0x0042_0x00= +hwmon_in.str_cons_0x0042_0x00=in3_input +hwmon_in.mode_0x0042_0x01=str_constant +hwmon_in.str_cons_0x0042_0x01=CPU_P1V2_VDDQ_V +hwmon_in.mode_0x0042_0x02=str_constant +hwmon_in.str_cons_0x0042_0x02=ucd90160 +hwmon_in.mode_0x0042_0x03=constant +hwmon_in.int_cons_0x0042_0x03=1280 +hwmon_in.mode_0x0042_0x05=constant +hwmon_in.int_cons_0x0042_0x05=1100 +hwmon_in.mode_0x0042_0x08=constant +hwmon_in.int_cons_0x0042_0x08=1210 +hwmon_in.mode_0x0042_0x07=constant +hwmon_in.int_cons_0x0042_0x07=6 + +# vol67 +hwmon_in.mode_0x0043_0x00=config +hwmon_in.int_cons_0x0043_0x00=0 +hwmon_in.src_0x0043_0x00=file +hwmon_in.frmt_0x0043_0x00=buf +hwmon_in.fpath_0x0043_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0043_0x00=0 +hwmon_in.len_0x0043_0x00=8 +hwmon_in.bit_offset_0x0043_0x00= +hwmon_in.str_cons_0x0043_0x00=in4_input +hwmon_in.mode_0x0043_0x01=str_constant +hwmon_in.str_cons_0x0043_0x01=CPU_P1V8_V +hwmon_in.mode_0x0043_0x02=str_constant +hwmon_in.str_cons_0x0043_0x02=ucd90160 +hwmon_in.mode_0x0043_0x03=constant +hwmon_in.int_cons_0x0043_0x03=1910 +hwmon_in.mode_0x0043_0x05=constant +hwmon_in.int_cons_0x0043_0x05=169- +hwmon_in.mode_0x0043_0x08=constant +hwmon_in.int_cons_0x0043_0x08=1800 +hwmon_in.mode_0x0043_0x07=constant +hwmon_in.int_cons_0x0043_0x07=9 + +# vol68 +hwmon_in.mode_0x0044_0x00=config +hwmon_in.int_cons_0x0044_0x00=0 +hwmon_in.src_0x0044_0x00=file +hwmon_in.frmt_0x0044_0x00=buf +hwmon_in.fpath_0x0044_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0044_0x00=0 +hwmon_in.len_0x0044_0x00=8 +hwmon_in.bit_offset_0x0044_0x00= +hwmon_in.str_cons_0x0044_0x00=in5_input +hwmon_in.mode_0x0044_0x01=str_constant +hwmon_in.str_cons_0x0044_0x01=CPU_P0V6_VTT_V +hwmon_in.mode_0x0044_0x02=str_constant +hwmon_in.str_cons_0x0044_0x02=ucd90160 +hwmon_in.mode_0x0044_0x03=constant +hwmon_in.int_cons_0x0044_0x03=682 +hwmon_in.mode_0x0044_0x05=constant +hwmon_in.int_cons_0x0044_0x05=558 +hwmon_in.mode_0x0044_0x08=constant +hwmon_in.int_cons_0x0044_0x08=615 +hwmon_in.mode_0x0044_0x07=constant +hwmon_in.int_cons_0x0044_0x07=3 + +# vol69 +hwmon_in.mode_0x0045_0x00=config +hwmon_in.int_cons_0x0045_0x00=0 +hwmon_in.src_0x0045_0x00=file +hwmon_in.frmt_0x0045_0x00=buf +hwmon_in.fpath_0x0045_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0045_0x00=0 +hwmon_in.len_0x0045_0x00=8 +hwmon_in.bit_offset_0x0045_0x00= +hwmon_in.str_cons_0x0045_0x00=in6_input +hwmon_in.mode_0x0045_0x01=str_constant +hwmon_in.str_cons_0x0045_0x01=CPU_VNN_PCH_V +hwmon_in.mode_0x0045_0x02=str_constant +hwmon_in.str_cons_0x0045_0x02=ucd90160 +hwmon_in.mode_0x0045_0x03=constant +hwmon_in.int_cons_0x0045_0x03=1320 +hwmon_in.mode_0x0045_0x05=constant +hwmon_in.int_cons_0x0045_0x05=540 +hwmon_in.mode_0x0045_0x08=constant +hwmon_in.int_cons_0x0045_0x08=1000 +hwmon_in.mode_0x0045_0x07=constant +hwmon_in.int_cons_0x0045_0x07=5 + +# vol70 +hwmon_in.mode_0x0046_0x00=config +hwmon_in.int_cons_0x0046_0x00=0 +hwmon_in.src_0x0046_0x00=file +hwmon_in.frmt_0x0046_0x00=buf +hwmon_in.fpath_0x0046_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0046_0x00=0 +hwmon_in.len_0x0046_0x00=8 +hwmon_in.bit_offset_0x0046_0x00= +hwmon_in.str_cons_0x0046_0x00=in7_input +hwmon_in.mode_0x0046_0x01=str_constant +hwmon_in.str_cons_0x0046_0x01=CPU_VNN_NAC_V +hwmon_in.mode_0x0046_0x02=str_constant +hwmon_in.str_cons_0x0046_0x02=ucd90160 +hwmon_in.mode_0x0046_0x03=constant +hwmon_in.int_cons_0x0046_0x03=1320 +hwmon_in.mode_0x0046_0x05=constant +hwmon_in.int_cons_0x0046_0x05=540 +hwmon_in.mode_0x0046_0x08=constant +hwmon_in.int_cons_0x0046_0x08=1000 +hwmon_in.mode_0x0046_0x07=constant +hwmon_in.int_cons_0x0046_0x07=5 + +# vol71 +hwmon_in.mode_0x0047_0x00=config +hwmon_in.int_cons_0x0047_0x00=0 +hwmon_in.src_0x0047_0x00=file +hwmon_in.frmt_0x0047_0x00=buf +hwmon_in.fpath_0x0047_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0047_0x00=0 +hwmon_in.len_0x0047_0x00=8 +hwmon_in.bit_offset_0x0047_0x00= +hwmon_in.str_cons_0x0047_0x00=in8_input +hwmon_in.mode_0x0047_0x01=str_constant +hwmon_in.str_cons_0x0047_0x01=CPU_P2V5_VPP_V +hwmon_in.mode_0x0047_0x02=str_constant +hwmon_in.str_cons_0x0047_0x02=ucd90160 +hwmon_in.mode_0x0047_0x03=constant +hwmon_in.int_cons_0x0047_0x03=2750 +hwmon_in.mode_0x0047_0x05=constant +hwmon_in.int_cons_0x0047_0x05=2250 +hwmon_in.mode_0x0047_0x08=constant +hwmon_in.int_cons_0x0047_0x08=2500 +hwmon_in.mode_0x0047_0x07=constant +hwmon_in.int_cons_0x0047_0x07=12 + +# vol72 +hwmon_in.mode_0x0048_0x00=config +hwmon_in.int_cons_0x0048_0x00=0 +hwmon_in.src_0x0048_0x00=file +hwmon_in.frmt_0x0048_0x00=buf +hwmon_in.fpath_0x0048_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0048_0x00=0 +hwmon_in.len_0x0048_0x00=8 +hwmon_in.bit_offset_0x0048_0x00= +hwmon_in.str_cons_0x0048_0x00=in9_input +hwmon_in.mode_0x0048_0x01=str_constant +hwmon_in.str_cons_0x0048_0x01=CPU_VCC_ANA_V +hwmon_in.mode_0x0048_0x02=str_constant +hwmon_in.str_cons_0x0048_0x02=ucd90160 +hwmon_in.mode_0x0048_0x03=constant +hwmon_in.int_cons_0x0048_0x03=1100 +hwmon_in.mode_0x0048_0x05=constant +hwmon_in.int_cons_0x0048_0x05=900 +hwmon_in.mode_0x0048_0x08=constant +hwmon_in.int_cons_0x0048_0x08=1000 +hwmon_in.mode_0x0048_0x07=constant +hwmon_in.int_cons_0x0048_0x07=5 + +# vol73 +hwmon_in.mode_0x0049_0x00=config +hwmon_in.int_cons_0x0049_0x00=0 +hwmon_in.src_0x0049_0x00=file +hwmon_in.frmt_0x0049_0x00=buf +hwmon_in.fpath_0x0049_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x0049_0x00=0 +hwmon_in.len_0x0049_0x00=8 +hwmon_in.bit_offset_0x0049_0x00= +hwmon_in.str_cons_0x0049_0x00=in10_input +hwmon_in.mode_0x0049_0x01=str_constant +hwmon_in.str_cons_0x0049_0x01=CPU_P3V3_STBY_V +hwmon_in.mode_0x0049_0x02=str_constant +hwmon_in.str_cons_0x0049_0x02=ucd90160 +hwmon_in.mode_0x0049_0x03=constant +hwmon_in.int_cons_0x0049_0x03=3630 +hwmon_in.mode_0x0049_0x05=constant +hwmon_in.int_cons_0x0049_0x05=2970 +hwmon_in.mode_0x0049_0x08=constant +hwmon_in.int_cons_0x0049_0x08=3300 +hwmon_in.mode_0x0049_0x07=constant +hwmon_in.int_cons_0x0049_0x07=16 + +# vol74 +hwmon_in.mode_0x004a_0x00=config +hwmon_in.int_cons_0x004a_0x00=0 +hwmon_in.src_0x004a_0x00=file +hwmon_in.frmt_0x004a_0x00=buf +hwmon_in.fpath_0x004a_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x004a_0x00=0 +hwmon_in.len_0x004a_0x00=8 +hwmon_in.bit_offset_0x004a_0x00= +hwmon_in.str_cons_0x004a_0x00=in11_input +hwmon_in.mode_0x004a_0x01=str_constant +hwmon_in.str_cons_0x004a_0x01=CPU_P5V_AUX_V +hwmon_in.mode_0x004a_0x02=str_constant +hwmon_in.str_cons_0x004a_0x02=ucd90160 +hwmon_in.mode_0x004a_0x03=constant +hwmon_in.int_cons_0x004a_0x03=5750 +hwmon_in.mode_0x004a_0x05=constant +hwmon_in.int_cons_0x004a_0x05=4000 +hwmon_in.mode_0x004a_0x08=constant +hwmon_in.int_cons_0x004a_0x08=5000 +hwmon_in.mode_0x004a_0x07=constant +hwmon_in.int_cons_0x004a_0x07=25 + +# vol75 +hwmon_in.mode_0x004b_0x00=config +hwmon_in.int_cons_0x004b_0x00=0 +hwmon_in.src_0x004b_0x00=file +hwmon_in.frmt_0x004b_0x00=buf +hwmon_in.fpath_0x004b_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x004b_0x00=0 +hwmon_in.len_0x004b_0x00=8 +hwmon_in.bit_offset_0x004b_0x00= +hwmon_in.str_cons_0x004b_0x00=in12_input +hwmon_in.mode_0x004b_0x01=str_constant +hwmon_in.str_cons_0x004b_0x01=CPU_P1V8_AUX_NAC_V +hwmon_in.mode_0x004b_0x02=str_constant +hwmon_in.str_cons_0x004b_0x02=ucd90160 +hwmon_in.mode_0x004b_0x03=constant +hwmon_in.int_cons_0x004b_0x03=1910 +hwmon_in.mode_0x004b_0x05=constant +hwmon_in.int_cons_0x004b_0x05=1690 +hwmon_in.mode_0x004b_0x08=constant +hwmon_in.int_cons_0x004b_0x08=1800 +hwmon_in.mode_0x004b_0x07=constant +hwmon_in.int_cons_0x004b_0x07=9 + +# vol76 +hwmon_in.mode_0x004c_0x00=config +hwmon_in.int_cons_0x004c_0x00=0 +hwmon_in.src_0x004c_0x00=file +hwmon_in.frmt_0x004c_0x00=buf +hwmon_in.fpath_0x004c_0x00=/sys/bus/i2c/devices/69-005f/hwmon/ +hwmon_in.addr_0x004c_0x00=0 +hwmon_in.len_0x004c_0x00=8 +hwmon_in.bit_offset_0x004c_0x00= +hwmon_in.str_cons_0x004c_0x00=in13_input +hwmon_in.mode_0x004c_0x01=str_constant +hwmon_in.str_cons_0x004c_0x01=CPU_P3V3_AUX_V +hwmon_in.mode_0x004c_0x02=str_constant +hwmon_in.str_cons_0x004c_0x02=ucd90160 +hwmon_in.mode_0x004c_0x03=constant +hwmon_in.int_cons_0x004c_0x03=3630 +hwmon_in.mode_0x004c_0x05=constant +hwmon_in.int_cons_0x004c_0x05=2970 +hwmon_in.mode_0x004c_0x08=constant +hwmon_in.int_cons_0x004c_0x08=3300 +hwmon_in.mode_0x004c_0x07=constant +hwmon_in.int_cons_0x004c_0x07=16 + +# vol77 FANA_VDD3.3V +hwmon_in.mode_0x004d_0x00=config +hwmon_in.int_cons_0x004d_0x00=0 +hwmon_in.src_0x004d_0x00=cpld +hwmon_in.frmt_0x004d_0x00=num_bytes +hwmon_in.addr_0x004d_0x00=0x000600e8 +hwmon_in.len_0x004d_0x00=2 +hwmon_in.int_extra1_0x004d_0x00=0x000600e8 +hwmon_in.int_extra2_0x004d_0x00=2000 +hwmon_in.int_extra3_0x004d_0x00=1 + +hwmon_in.mode_0x004d_0x01=str_constant +hwmon_in.str_cons_0x004d_0x01=FANA_VDD3.3V + +hwmon_in.mode_0x004d_0x02=str_constant +hwmon_in.str_cons_0x004d_0x02=cpld + +hwmon_in.mode_0x004d_0x03=str_constant +hwmon_in.str_cons_0x004d_0x03=3630 + +hwmon_in.mode_0x004d_0x05=str_constant +hwmon_in.str_cons_0x004d_0x05=2970 + +# vol78 FANB_VDD3.3V +hwmon_in.mode_0x004e_0x00=config +hwmon_in.int_cons_0x004e_0x00=0 +hwmon_in.src_0x004e_0x00=cpld +hwmon_in.frmt_0x004e_0x00=num_bytes +hwmon_in.addr_0x004e_0x00=0x000600ea +hwmon_in.len_0x004e_0x00=2 +hwmon_in.int_extra1_0x004e_0x00=0x000600ea +hwmon_in.int_extra2_0x004e_0x00=2000 +hwmon_in.int_extra3_0x004e_0x00=1 + +hwmon_in.mode_0x004e_0x01=str_constant +hwmon_in.str_cons_0x004e_0x01=FANB_VDD3.3V + +hwmon_in.mode_0x004e_0x02=str_constant +hwmon_in.str_cons_0x004e_0x02=cpld + +hwmon_in.mode_0x004e_0x03=str_constant +hwmon_in.str_cons_0x004e_0x03=3630 + +hwmon_in.mode_0x004e_0x05=str_constant +hwmon_in.str_cons_0x004e_0x05=2970 + +# vol79 FANC_VDD3.3V +hwmon_in.mode_0x004f_0x00=config +hwmon_in.int_cons_0x004f_0x00=0 +hwmon_in.src_0x004f_0x00=cpld +hwmon_in.frmt_0x004f_0x00=num_bytes +hwmon_in.addr_0x004f_0x00=0x000600ec +hwmon_in.len_0x004f_0x00=2 +hwmon_in.int_extra1_0x004f_0x00=0x000600ec +hwmon_in.int_extra2_0x004f_0x00=2000 +hwmon_in.int_extra3_0x004f_0x00=1 + +hwmon_in.mode_0x004f_0x01=str_constant +hwmon_in.str_cons_0x004f_0x01=FANC_VDD3.3V + +hwmon_in.mode_0x004f_0x02=str_constant +hwmon_in.str_cons_0x004f_0x02=cpld + +hwmon_in.mode_0x004f_0x03=str_constant +hwmon_in.str_cons_0x004f_0x03=3630 + +hwmon_in.mode_0x004f_0x05=str_constant +hwmon_in.str_cons_0x004f_0x05=2970 + +# vol80 FAND_VDD3.3V +hwmon_in.mode_0x0050_0x00=config +hwmon_in.int_cons_0x0050_0x00=0 +hwmon_in.src_0x0050_0x00=cpld +hwmon_in.frmt_0x0050_0x00=num_bytes +hwmon_in.addr_0x0050_0x00=0x000600ee +hwmon_in.len_0x0050_0x00=2 +hwmon_in.int_extra1_0x0050_0x00=0x000600ee +hwmon_in.int_extra2_0x0050_0x00=2000 +hwmon_in.int_extra3_0x0050_0x00=1 + +hwmon_in.mode_0x0050_0x01=str_constant +hwmon_in.str_cons_0x0050_0x01=FAND_VDD3.3V + +hwmon_in.mode_0x0050_0x02=str_constant +hwmon_in.str_cons_0x0050_0x02=cpld + +hwmon_in.mode_0x0050_0x03=str_constant +hwmon_in.str_cons_0x0050_0x03=3630 + +hwmon_in.mode_0x0050_0x05=str_constant +hwmon_in.str_cons_0x0050_0x05=2970 + +# vol81 FAN_VDD12V_1 +hwmon_in.mode_0x0051_0x00=config +hwmon_in.int_cons_0x0051_0x00=0 +hwmon_in.src_0x0051_0x00=cpld +hwmon_in.frmt_0x0051_0x00=num_bytes +hwmon_in.addr_0x0051_0x00=0x000600e0 +hwmon_in.len_0x0051_0x00=2 +hwmon_in.int_extra1_0x0051_0x00=0x000600e0 +hwmon_in.int_extra2_0x0051_0x00=7070 +hwmon_in.int_extra3_0x0051_0x00=1 + +hwmon_in.mode_0x0051_0x01=str_constant +hwmon_in.str_cons_0x0051_0x01=FAN_VDD12V_1 + +hwmon_in.mode_0x0051_0x02=str_constant +hwmon_in.str_cons_0x0051_0x02=cpld + +hwmon_in.mode_0x0051_0x03=str_constant +hwmon_in.str_cons_0x0051_0x03=13200 + +hwmon_in.mode_0x0051_0x05=str_constant +hwmon_in.str_cons_0x0051_0x05=10800 + +# vol82 FAN_VDD12V_2 +hwmon_in.mode_0x0052_0x00=config +hwmon_in.int_cons_0x0052_0x00=0 +hwmon_in.src_0x0052_0x00=cpld +hwmon_in.frmt_0x0052_0x00=num_bytes +hwmon_in.addr_0x0052_0x00=0x000600e2 +hwmon_in.len_0x0052_0x00=2 +hwmon_in.int_extra1_0x0052_0x00=0x000600e2 +hwmon_in.int_extra2_0x0052_0x00=7070 +hwmon_in.int_extra3_0x0052_0x00=1 + +hwmon_in.mode_0x0052_0x01=str_constant +hwmon_in.str_cons_0x0052_0x01=FAN_VDD12V_2 + +hwmon_in.mode_0x0052_0x02=str_constant +hwmon_in.str_cons_0x0052_0x02=cpld + +hwmon_in.mode_0x0052_0x03=str_constant +hwmon_in.str_cons_0x0052_0x03=13200 + +hwmon_in.mode_0x0052_0x05=str_constant +hwmon_in.str_cons_0x0052_0x05=10800 + +# vol83 FAN_VDD12V_3 +hwmon_in.mode_0x0053_0x00=config +hwmon_in.int_cons_0x0053_0x00=0 +hwmon_in.src_0x0053_0x00=cpld +hwmon_in.frmt_0x0053_0x00=num_bytes +hwmon_in.addr_0x0053_0x00=0x000600e4 +hwmon_in.len_0x0053_0x00=2 +hwmon_in.int_extra1_0x0053_0x00=0x000600e4 +hwmon_in.int_extra2_0x0053_0x00=7070 +hwmon_in.int_extra3_0x0053_0x00=1 + +hwmon_in.mode_0x0053_0x01=str_constant +hwmon_in.str_cons_0x0053_0x01=FAN_VDD12V_3 + +hwmon_in.mode_0x0053_0x02=str_constant +hwmon_in.str_cons_0x0053_0x02=cpld + +hwmon_in.mode_0x0053_0x03=str_constant +hwmon_in.str_cons_0x0053_0x03=13200 + +hwmon_in.mode_0x0053_0x05=str_constant +hwmon_in.str_cons_0x0053_0x05=10800 + +# vol84 FAN_VDD12V_4 +hwmon_in.mode_0x0054_0x00=config +hwmon_in.int_cons_0x0054_0x00=0 +hwmon_in.src_0x0054_0x00=cpld +hwmon_in.frmt_0x0054_0x00=num_bytes +hwmon_in.addr_0x0054_0x00=0x000600e6 +hwmon_in.len_0x0054_0x00=2 +hwmon_in.int_extra1_0x0054_0x00=0x000600e6 +hwmon_in.int_extra2_0x0054_0x00=7070 +hwmon_in.int_extra3_0x0054_0x00=1 + +hwmon_in.mode_0x0054_0x01=str_constant +hwmon_in.str_cons_0x0054_0x01=FAN_VDD12V_4 + +hwmon_in.mode_0x0054_0x02=str_constant +hwmon_in.str_cons_0x0054_0x02=cpld + +hwmon_in.mode_0x0054_0x03=str_constant +hwmon_in.str_cons_0x0054_0x03=13200 + +hwmon_in.mode_0x0054_0x05=str_constant +hwmon_in.str_cons_0x0054_0x05=10800 + +# vol85 +hwmon_in.mode_0x0055_0x00=config +hwmon_in.int_cons_0x0055_0x00=0 +hwmon_in.src_0x0055_0x00=cpld +hwmon_in.frmt_0x0055_0x00=num_bytes +hwmon_in.addr_0x0055_0x00=0x00040092 +hwmon_in.len_0x0055_0x00=2 +hwmon_in.int_extra1_0x0055_0x00=0x00040092 +hwmon_in.int_extra2_0x0055_0x00=2000 +hwmon_in.int_extra3_0x0055_0x00=1 + +hwmon_in.mode_0x0055_0x01=str_constant +hwmon_in.str_cons_0x0055_0x01=OSFP_CPLD_VDD3.3V_A1 + +hwmon_in.mode_0x0055_0x02=str_constant +hwmon_in.str_cons_0x0055_0x02=cpld + +hwmon_in.mode_0x0055_0x03=str_constant +hwmon_in.str_cons_0x0055_0x03=3630 + +hwmon_in.mode_0x0055_0x05=str_constant +hwmon_in.str_cons_0x0055_0x05=2970 + +# vol86 +hwmon_in.mode_0x0056_0x00=config +hwmon_in.int_cons_0x0056_0x00=0 +hwmon_in.src_0x0056_0x00=cpld +hwmon_in.frmt_0x0056_0x00=num_bytes +hwmon_in.addr_0x0056_0x00=0x00040094 +hwmon_in.len_0x0056_0x00=2 +hwmon_in.int_extra1_0x0056_0x00=0x00040094 +hwmon_in.int_extra2_0x0056_0x00=2000 +hwmon_in.int_extra3_0x0056_0x00=1 + +hwmon_in.mode_0x0056_0x01=str_constant +hwmon_in.str_cons_0x0056_0x01=OSFP_CPLD_VDD3.3V_A2 + +hwmon_in.mode_0x0056_0x02=str_constant +hwmon_in.str_cons_0x0056_0x02=cpld + +hwmon_in.mode_0x0056_0x03=str_constant +hwmon_in.str_cons_0x0056_0x03=3630 + +hwmon_in.mode_0x0056_0x05=str_constant +hwmon_in.str_cons_0x0056_0x05=2970 + +# vol87 +hwmon_in.mode_0x0057_0x00=config +hwmon_in.int_cons_0x0057_0x00=0 +hwmon_in.src_0x0057_0x00=cpld +hwmon_in.frmt_0x0057_0x00=num_bytes +hwmon_in.addr_0x0057_0x00=0x00040096 +hwmon_in.len_0x0057_0x00=2 +hwmon_in.int_extra1_0x0057_0x00=0x00040096 +hwmon_in.int_extra2_0x0057_0x00=2000 +hwmon_in.int_extra3_0x0057_0x00=1 + +hwmon_in.mode_0x0057_0x01=str_constant +hwmon_in.str_cons_0x0057_0x01=OSFP_CPLD_VDD3.3V_A3 + +hwmon_in.mode_0x0057_0x02=str_constant +hwmon_in.str_cons_0x0057_0x02=cpld + +hwmon_in.mode_0x0057_0x03=str_constant +hwmon_in.str_cons_0x0057_0x03=3630 + +hwmon_in.mode_0x0057_0x05=str_constant +hwmon_in.str_cons_0x0057_0x05=2970 + +# vol88 +hwmon_in.mode_0x0058_0x00=config +hwmon_in.int_cons_0x0058_0x00=0 +hwmon_in.src_0x0058_0x00=cpld +hwmon_in.frmt_0x0058_0x00=num_bytes +hwmon_in.addr_0x0058_0x00=0x00040098 +hwmon_in.len_0x0058_0x00=2 +hwmon_in.int_extra1_0x0058_0x00=0x00040098 +hwmon_in.int_extra2_0x0058_0x00=2000 +hwmon_in.int_extra3_0x0058_0x00=1 + +hwmon_in.mode_0x0058_0x01=str_constant +hwmon_in.str_cons_0x0058_0x01=OSFP_CPLD_VDD3.3V_A4 + +hwmon_in.mode_0x0058_0x02=str_constant +hwmon_in.str_cons_0x0058_0x02=cpld + +hwmon_in.mode_0x0058_0x03=str_constant +hwmon_in.str_cons_0x0058_0x03=3630 + +hwmon_in.mode_0x0058_0x05=str_constant +hwmon_in.str_cons_0x0058_0x05=2970 + +# vol89 +hwmon_in.mode_0x0059_0x00=config +hwmon_in.int_cons_0x0059_0x00=0 +hwmon_in.src_0x0059_0x00=cpld +hwmon_in.frmt_0x0059_0x00=num_bytes +hwmon_in.addr_0x0059_0x00=0x0004009a +hwmon_in.len_0x0059_0x00=2 +hwmon_in.int_extra1_0x0059_0x00=0x0004009a +hwmon_in.int_extra2_0x0059_0x00=2000 +hwmon_in.int_extra3_0x0059_0x00=1 + +hwmon_in.mode_0x0059_0x01=str_constant +hwmon_in.str_cons_0x0059_0x01=OSFP_CPLD_VDD3.3V_A5 + +hwmon_in.mode_0x0059_0x02=str_constant +hwmon_in.str_cons_0x0059_0x02=cpld + +hwmon_in.mode_0x0059_0x03=str_constant +hwmon_in.str_cons_0x0059_0x03=3630 + +hwmon_in.mode_0x0059_0x05=str_constant +hwmon_in.str_cons_0x0059_0x05=2970 + +# vol90 +hwmon_in.mode_0x005a_0x00=config +hwmon_in.int_cons_0x005a_0x00=0 +hwmon_in.src_0x005a_0x00=cpld +hwmon_in.frmt_0x005a_0x00=num_bytes +hwmon_in.addr_0x005a_0x00=0x0004009c +hwmon_in.len_0x005a_0x00=2 +hwmon_in.int_extra1_0x005a_0x00=0x0004009c +hwmon_in.int_extra2_0x005a_0x00=2000 +hwmon_in.int_extra3_0x005a_0x00=1 + +hwmon_in.mode_0x005a_0x01=str_constant +hwmon_in.str_cons_0x005a_0x01=OSFP_CPLD_VDD3.3V_A6 + +hwmon_in.mode_0x005a_0x02=str_constant +hwmon_in.str_cons_0x005a_0x02=cpld + +hwmon_in.mode_0x005a_0x03=str_constant +hwmon_in.str_cons_0x005a_0x03=3630 + +hwmon_in.mode_0x005a_0x05=str_constant +hwmon_in.str_cons_0x005a_0x05=2970 + +# vol91 +hwmon_in.mode_0x005b_0x00=config +hwmon_in.int_cons_0x005b_0x00=0 +hwmon_in.src_0x005b_0x00=cpld +hwmon_in.frmt_0x005b_0x00=num_bytes +hwmon_in.addr_0x005b_0x00=0x0004009e +hwmon_in.len_0x005b_0x00=2 +hwmon_in.int_extra1_0x005b_0x00=0x0004009e +hwmon_in.int_extra2_0x005b_0x00=2000 +hwmon_in.int_extra3_0x005b_0x00=1 + +hwmon_in.mode_0x005b_0x01=str_constant +hwmon_in.str_cons_0x005b_0x01=OSFP_CPLD_VDD3.3V_A7 + +hwmon_in.mode_0x005b_0x02=str_constant +hwmon_in.str_cons_0x005b_0x02=cpld + +hwmon_in.mode_0x005b_0x03=str_constant +hwmon_in.str_cons_0x005b_0x03=3630 + +hwmon_in.mode_0x005b_0x05=str_constant +hwmon_in.str_cons_0x005b_0x05=2970 + +# vol92 +hwmon_in.mode_0x005c_0x00=config +hwmon_in.int_cons_0x005c_0x00=0 +hwmon_in.src_0x005c_0x00=cpld +hwmon_in.frmt_0x005c_0x00=num_bytes +hwmon_in.addr_0x005c_0x00=0x000400a0 +hwmon_in.len_0x005c_0x00=2 +hwmon_in.int_extra1_0x005c_0x00=0x000400a0 +hwmon_in.int_extra2_0x005c_0x00=2000 +hwmon_in.int_extra3_0x005c_0x00=1 + +hwmon_in.mode_0x005c_0x01=str_constant +hwmon_in.str_cons_0x005c_0x01=OSFP_CPLD_VDD3.3V_A8 + +hwmon_in.mode_0x005c_0x02=str_constant +hwmon_in.str_cons_0x005c_0x02=cpld + +hwmon_in.mode_0x005c_0x03=str_constant +hwmon_in.str_cons_0x005c_0x03=3630 + +hwmon_in.mode_0x005c_0x05=str_constant +hwmon_in.str_cons_0x005c_0x05=2970 + +# vol93 +hwmon_in.mode_0x005d_0x00=config +hwmon_in.int_cons_0x005d_0x00=0 +hwmon_in.src_0x005d_0x00=cpld +hwmon_in.frmt_0x005d_0x00=num_bytes +hwmon_in.addr_0x005d_0x00=0x000400a2 +hwmon_in.len_0x005d_0x00=2 +hwmon_in.int_extra1_0x005d_0x00=0x000400a2 +hwmon_in.int_extra2_0x005d_0x00=2000 +hwmon_in.int_extra3_0x005d_0x00=1 + +hwmon_in.mode_0x005d_0x01=str_constant +hwmon_in.str_cons_0x005d_0x01=OSFP_CPLD_VDD3.3V_B1 + +hwmon_in.mode_0x005d_0x02=str_constant +hwmon_in.str_cons_0x005d_0x02=cpld + +hwmon_in.mode_0x005d_0x03=str_constant +hwmon_in.str_cons_0x005d_0x03=3630 + +hwmon_in.mode_0x005d_0x05=str_constant +hwmon_in.str_cons_0x005d_0x05=2970 + +# vol94 +hwmon_in.mode_0x005e_0x00=config +hwmon_in.int_cons_0x005e_0x00=0 +hwmon_in.src_0x005e_0x00=cpld +hwmon_in.frmt_0x005e_0x00=num_bytes +hwmon_in.addr_0x005e_0x00=0x000400a4 +hwmon_in.len_0x005e_0x00=2 +hwmon_in.int_extra1_0x005e_0x00=0x000400a4 +hwmon_in.int_extra2_0x005e_0x00=2000 +hwmon_in.int_extra3_0x005e_0x00=1 + +hwmon_in.mode_0x005e_0x01=str_constant +hwmon_in.str_cons_0x005e_0x01=OSFP_CPLD_VDD3.3V_B2 + +hwmon_in.mode_0x005e_0x02=str_constant +hwmon_in.str_cons_0x005e_0x02=cpld + +hwmon_in.mode_0x005e_0x03=str_constant +hwmon_in.str_cons_0x005e_0x03=3630 + +hwmon_in.mode_0x005e_0x05=str_constant +hwmon_in.str_cons_0x005e_0x05=2970 + +# vol95 +hwmon_in.mode_0x005f_0x00=config +hwmon_in.int_cons_0x005f_0x00=0 +hwmon_in.src_0x005f_0x00=cpld +hwmon_in.frmt_0x005f_0x00=num_bytes +hwmon_in.addr_0x005f_0x00=0x000400a6 +hwmon_in.len_0x005f_0x00=2 +hwmon_in.int_extra1_0x005f_0x00=0x000400a6 +hwmon_in.int_extra2_0x005f_0x00=2000 +hwmon_in.int_extra3_0x005f_0x00=1 + +hwmon_in.mode_0x005f_0x01=str_constant +hwmon_in.str_cons_0x005f_0x01=OSFP_CPLD_VDD3.3V_B3 + +hwmon_in.mode_0x005f_0x02=str_constant +hwmon_in.str_cons_0x005f_0x02=cpld + +hwmon_in.mode_0x005f_0x03=str_constant +hwmon_in.str_cons_0x005f_0x03=3630 + +hwmon_in.mode_0x005f_0x05=str_constant +hwmon_in.str_cons_0x005f_0x05=2970 + +# vol96 +hwmon_in.mode_0x0060_0x00=config +hwmon_in.int_cons_0x0060_0x00=0 +hwmon_in.src_0x0060_0x00=cpld +hwmon_in.frmt_0x0060_0x00=num_bytes +hwmon_in.addr_0x0060_0x00=0x000400a8 +hwmon_in.len_0x0060_0x00=2 +hwmon_in.int_extra1_0x0060_0x00=0x000400a8 +hwmon_in.int_extra2_0x0060_0x00=2000 +hwmon_in.int_extra3_0x0060_0x00=1 + +hwmon_in.mode_0x0060_0x01=str_constant +hwmon_in.str_cons_0x0060_0x01=OSFP_CPLD_VDD3.3V_B4 + +hwmon_in.mode_0x0060_0x02=str_constant +hwmon_in.str_cons_0x0060_0x02=cpld + +hwmon_in.mode_0x0060_0x03=str_constant +hwmon_in.str_cons_0x0060_0x03=3630 + +hwmon_in.mode_0x0060_0x05=str_constant +hwmon_in.str_cons_0x0060_0x05=2970 + +# vol97 +hwmon_in.mode_0x0061_0x00=config +hwmon_in.int_cons_0x0061_0x00=0 +hwmon_in.src_0x0061_0x00=cpld +hwmon_in.frmt_0x0061_0x00=num_bytes +hwmon_in.addr_0x0061_0x00=0x000400aa +hwmon_in.len_0x0061_0x00=2 +hwmon_in.int_extra1_0x0061_0x00=0x000400aa +hwmon_in.int_extra2_0x0061_0x00=2000 +hwmon_in.int_extra3_0x0061_0x00=1 + +hwmon_in.mode_0x0061_0x01=str_constant +hwmon_in.str_cons_0x0061_0x01=OSFP_CPLD_VDD3.3V_B5 + +hwmon_in.mode_0x0061_0x02=str_constant +hwmon_in.str_cons_0x0061_0x02=cpld + +hwmon_in.mode_0x0061_0x03=str_constant +hwmon_in.str_cons_0x0061_0x03=3630 + +hwmon_in.mode_0x0061_0x05=str_constant +hwmon_in.str_cons_0x0061_0x05=2970 + +# vol98 +hwmon_in.mode_0x0062_0x00=config +hwmon_in.int_cons_0x0062_0x00=0 +hwmon_in.src_0x0062_0x00=cpld +hwmon_in.frmt_0x0062_0x00=num_bytes +hwmon_in.addr_0x0062_0x00=0x000400ac +hwmon_in.len_0x0062_0x00=2 +hwmon_in.int_extra1_0x0062_0x00=0x000400ac +hwmon_in.int_extra2_0x0062_0x00=2000 +hwmon_in.int_extra3_0x0062_0x00=1 + +hwmon_in.mode_0x0062_0x01=str_constant +hwmon_in.str_cons_0x0062_0x01=OSFP_CPLD_VDD3.3V_B6 + +hwmon_in.mode_0x0062_0x02=str_constant +hwmon_in.str_cons_0x0062_0x02=cpld + +hwmon_in.mode_0x0062_0x03=str_constant +hwmon_in.str_cons_0x0062_0x03=3630 + +hwmon_in.mode_0x0062_0x05=str_constant +hwmon_in.str_cons_0x0062_0x05=2970 + +# vol99 +hwmon_in.mode_0x0063_0x00=config +hwmon_in.int_cons_0x0063_0x00=0 +hwmon_in.src_0x0063_0x00=cpld +hwmon_in.frmt_0x0063_0x00=num_bytes +hwmon_in.addr_0x0063_0x00=0x000400ae +hwmon_in.len_0x0063_0x00=2 +hwmon_in.int_extra1_0x0063_0x00=0x000400ae +hwmon_in.int_extra2_0x0063_0x00=2000 +hwmon_in.int_extra3_0x0063_0x00=1 + +hwmon_in.mode_0x0063_0x01=str_constant +hwmon_in.str_cons_0x0063_0x01=OSFP_CPLD_VDD3.3V_B7 + +hwmon_in.mode_0x0063_0x02=str_constant +hwmon_in.str_cons_0x0063_0x02=cpld + +hwmon_in.mode_0x0063_0x03=str_constant +hwmon_in.str_cons_0x0063_0x03=3630 + +hwmon_in.mode_0x0063_0x05=str_constant +hwmon_in.str_cons_0x0063_0x05=2970 + +# vol100 +hwmon_in.mode_0x0064_0x00=config +hwmon_in.int_cons_0x0064_0x00=0 +hwmon_in.src_0x0064_0x00=cpld +hwmon_in.frmt_0x0064_0x00=num_bytes +hwmon_in.addr_0x0064_0x00=0x000400b0 +hwmon_in.len_0x0064_0x00=2 +hwmon_in.int_extra1_0x0064_0x00=0x000400b0 +hwmon_in.int_extra2_0x0064_0x00=2000 +hwmon_in.int_extra3_0x0064_0x00=1 + +hwmon_in.mode_0x0064_0x01=str_constant +hwmon_in.str_cons_0x0064_0x01=OSFP_CPLD_VDD3.3V_B8 + +hwmon_in.mode_0x0064_0x02=str_constant +hwmon_in.str_cons_0x0064_0x02=cpld + +hwmon_in.mode_0x0064_0x03=str_constant +hwmon_in.str_cons_0x0064_0x03=3630 + +hwmon_in.mode_0x0064_0x05=str_constant +hwmon_in.str_cons_0x0064_0x05=2970 + + +# vol101 +hwmon_in.mode_0x0065_0x00=config +hwmon_in.int_cons_0x0065_0x00=3 +hwmon_in.src_0x0065_0x00=file +hwmon_in.frmt_0x0065_0x00=buf +hwmon_in.fpath_0x0065_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x0065_0x00=0 +hwmon_in.len_0x0065_0x00=8 +hwmon_in.bit_offset_0x0065_0x00=0 +hwmon_in.str_cons_0x0065_0x00=in1_input +hwmon_in.mode_0x0065_0x01=str_constant +hwmon_in.str_cons_0x0065_0x01=VCC_3V3_BMC +hwmon_in.mode_0x0065_0x02=str_constant +hwmon_in.str_cons_0x0065_0x02=ucd9081 +hwmon_in.mode_0x0065_0x03=constant +hwmon_in.int_cons_0x0065_0x03=3630 +hwmon_in.mode_0x0065_0x05=constant +hwmon_in.int_cons_0x0065_0x05=2970 +hwmon_in.mode_0x0065_0x08=constant +hwmon_in.int_cons_0x0065_0x08=3300 +hwmon_in.mode_0x0065_0x07=constant +hwmon_in.int_cons_0x0065_0x07=5 +hwmon_in.int_extra1_0x0065_0x00=1500 + +# vol102 +hwmon_in.mode_0x0066_0x00=config +hwmon_in.int_cons_0x0066_0x00=3 +hwmon_in.src_0x0066_0x00=file +hwmon_in.frmt_0x0066_0x00=buf +hwmon_in.fpath_0x0066_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x0066_0x00=0 +hwmon_in.len_0x0066_0x00=8 +hwmon_in.bit_offset_0x0066_0x00=0 +hwmon_in.str_cons_0x0066_0x00=in2_input +hwmon_in.mode_0x0066_0x01=str_constant +hwmon_in.str_cons_0x0066_0x01=VCC_2V5_BMC +hwmon_in.mode_0x0066_0x02=str_constant +hwmon_in.str_cons_0x0066_0x02=ucd9081 +hwmon_in.mode_0x0066_0x03=constant +hwmon_in.int_cons_0x0066_0x03=2750 +hwmon_in.mode_0x0066_0x05=constant +hwmon_in.int_cons_0x0066_0x05=2250 +hwmon_in.mode_0x0066_0x08=constant +hwmon_in.int_cons_0x0066_0x08=2500 +hwmon_in.mode_0x0066_0x07=constant +hwmon_in.int_cons_0x0066_0x07=5 +hwmon_in.int_extra1_0x0066_0x00=1500 + + +# vol103 +hwmon_in.mode_0x0067_0x00=config +hwmon_in.int_cons_0x0067_0x00=0 +hwmon_in.src_0x0067_0x00=file +hwmon_in.frmt_0x0067_0x00=buf +hwmon_in.fpath_0x0067_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x0067_0x00=0 +hwmon_in.len_0x0067_0x00=8 +hwmon_in.bit_offset_0x0067_0x00= +hwmon_in.str_cons_0x0067_0x00=in3_input +hwmon_in.mode_0x0067_0x01=str_constant +hwmon_in.str_cons_0x0067_0x01=VCC_1V8_BMC +hwmon_in.mode_0x0067_0x02=str_constant +hwmon_in.str_cons_0x0067_0x02=ucd9081 +hwmon_in.mode_0x0067_0x03=constant +hwmon_in.int_cons_0x0067_0x03=1980 +hwmon_in.mode_0x0067_0x05=constant +hwmon_in.int_cons_0x0067_0x05=1620 +hwmon_in.mode_0x0067_0x08=constant +hwmon_in.int_cons_0x0067_0x08=1800 +hwmon_in.mode_0x0067_0x07=constant +hwmon_in.int_cons_0x0067_0x07=5 + +# vol104 +hwmon_in.mode_0x0068_0x00=config +hwmon_in.int_cons_0x0068_0x00=3 +hwmon_in.src_0x0068_0x00=file +hwmon_in.frmt_0x0068_0x00=buf +hwmon_in.fpath_0x0068_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x0068_0x00=0 +hwmon_in.len_0x0068_0x00=8 +hwmon_in.bit_offset_0x0068_0x00=0 +hwmon_in.str_cons_0x0068_0x00=in4_input +hwmon_in.mode_0x0068_0x01=str_constant +hwmon_in.str_cons_0x0068_0x01=VCC_3V3_RGM_BMC +hwmon_in.mode_0x0068_0x02=str_constant +hwmon_in.str_cons_0x0068_0x02=ucd9081 +hwmon_in.mode_0x0068_0x03=constant +hwmon_in.int_cons_0x0068_0x03=3630 +hwmon_in.mode_0x0068_0x05=constant +hwmon_in.int_cons_0x0068_0x05=2970 +hwmon_in.mode_0x0068_0x08=constant +hwmon_in.int_cons_0x0068_0x08=3300 +hwmon_in.mode_0x0068_0x07=constant +hwmon_in.int_cons_0x0068_0x07=5 +hwmon_in.int_extra1_0x0068_0x00=1500 + +# vol105 +hwmon_in.mode_0x0069_0x00=config +hwmon_in.int_cons_0x0069_0x00=0 +hwmon_in.src_0x0069_0x00=file +hwmon_in.frmt_0x0069_0x00=buf +hwmon_in.fpath_0x0069_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x0069_0x00=0 +hwmon_in.len_0x0069_0x00=8 +hwmon_in.bit_offset_0x0069_0x00= +hwmon_in.str_cons_0x0069_0x00=in5_input +hwmon_in.mode_0x0069_0x01=str_constant +hwmon_in.str_cons_0x0069_0x01=VCC_DDRVDDQ_BMC +hwmon_in.mode_0x0069_0x02=str_constant +hwmon_in.str_cons_0x0069_0x02=ucd9081 +hwmon_in.mode_0x0069_0x03=constant +hwmon_in.int_cons_0x0069_0x03=1320 +hwmon_in.mode_0x0069_0x05=constant +hwmon_in.int_cons_0x0069_0x05=1080 +hwmon_in.mode_0x0069_0x08=constant +hwmon_in.int_cons_0x0069_0x08=1200 +hwmon_in.mode_0x0069_0x07=constant +hwmon_in.int_cons_0x0069_0x07=5 + +# vol106 +hwmon_in.mode_0x006a_0x00=config +hwmon_in.int_cons_0x006a_0x00=0 +hwmon_in.src_0x006a_0x00=file +hwmon_in.frmt_0x006a_0x00=buf +hwmon_in.fpath_0x006a_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x006a_0x00=0 +hwmon_in.len_0x006a_0x00=8 +hwmon_in.bit_offset_0x006a_0x00= +hwmon_in.str_cons_0x006a_0x00=in6_input +hwmon_in.mode_0x006a_0x01=str_constant +hwmon_in.str_cons_0x006a_0x01=VCC_1V0_BMC +hwmon_in.mode_0x006a_0x02=str_constant +hwmon_in.str_cons_0x006a_0x02=ucd9081 +hwmon_in.mode_0x006a_0x03=constant +hwmon_in.int_cons_0x006a_0x03=1100 +hwmon_in.mode_0x006a_0x05=constant +hwmon_in.int_cons_0x006a_0x05=900 +hwmon_in.mode_0x006a_0x08=constant +hwmon_in.int_cons_0x006a_0x08=1000 +hwmon_in.mode_0x006a_0x07=constant +hwmon_in.int_cons_0x006a_0x07=5 + +# vol107 +hwmon_in.mode_0x006b_0x00=config +hwmon_in.int_cons_0x006b_0x00=0 +hwmon_in.src_0x006b_0x00=file +hwmon_in.frmt_0x006b_0x00=buf +hwmon_in.fpath_0x006b_0x00=/sys/bus/i2c/devices/72-0068/hwmon/ +hwmon_in.addr_0x006b_0x00=0 +hwmon_in.len_0x006b_0x00=8 +hwmon_in.bit_offset_0x006b_0x00= +hwmon_in.str_cons_0x006b_0x00=in7_input +hwmon_in.mode_0x006b_0x01=str_constant +hwmon_in.str_cons_0x006b_0x01=PE_RC_VCC18A_BMC +hwmon_in.mode_0x006b_0x02=str_constant +hwmon_in.str_cons_0x006b_0x02=ucd9081 +hwmon_in.mode_0x006b_0x03=constant +hwmon_in.int_cons_0x006b_0x03=1980 +hwmon_in.mode_0x006b_0x05=constant +hwmon_in.int_cons_0x006b_0x05=1620 +hwmon_in.mode_0x006b_0x08=constant +hwmon_in.int_cons_0x006b_0x08=1800 +hwmon_in.mode_0x006b_0x07=constant +hwmon_in.int_cons_0x006b_0x07=5 + +# vol108 +hwmon_in.mode_0x006c_0x00=config +hwmon_in.int_cons_0x006c_0x00=0 +hwmon_in.src_0x006c_0x00=cpld +hwmon_in.frmt_0x006c_0x00=num_bytes +hwmon_in.addr_0x006c_0x00=0x0005009a +hwmon_in.len_0x006c_0x00=2 +hwmon_in.int_extra1_0x006c_0x00=0x0005009a +hwmon_in.int_extra2_0x006c_0x00=2000 +hwmon_in.int_extra3_0x006c_0x00=1 + +hwmon_in.mode_0x006c_0x01=str_constant +hwmon_in.str_cons_0x006c_0x01=MGMT_VDD3.3V + +hwmon_in.mode_0x006c_0x02=str_constant +hwmon_in.str_cons_0x006c_0x02=cpld + +hwmon_in.mode_0x006c_0x03=str_constant +hwmon_in.str_cons_0x006c_0x03=3630 + +hwmon_in.mode_0x006c_0x05=str_constant +hwmon_in.str_cons_0x006c_0x05=2970 + +# vol109 +hwmon_in.mode_0x006d_0x00=config +hwmon_in.int_cons_0x006d_0x00=0 +hwmon_in.src_0x006d_0x00=cpld +hwmon_in.frmt_0x006d_0x00=num_bytes +hwmon_in.addr_0x006d_0x00=0x00050090 +hwmon_in.len_0x006d_0x00=2 +hwmon_in.int_extra1_0x006d_0x00=0x00050090 +hwmon_in.int_extra2_0x006d_0x00=2000 +hwmon_in.int_extra3_0x006d_0x00=1 + +hwmon_in.mode_0x006d_0x01=str_constant +hwmon_in.str_cons_0x006d_0x01=MGMT_VDD3.3V_PHY + +hwmon_in.mode_0x006d_0x02=str_constant +hwmon_in.str_cons_0x006d_0x02=cpld + +hwmon_in.mode_0x006d_0x03=str_constant +hwmon_in.str_cons_0x006d_0x03=3630 + +hwmon_in.mode_0x006d_0x05=str_constant +hwmon_in.str_cons_0x006d_0x05=2970 + +# vol110 +hwmon_in.mode_0x006e_0x00=config +hwmon_in.int_cons_0x006e_0x00=0 +hwmon_in.src_0x006e_0x00=cpld +hwmon_in.frmt_0x006e_0x00=num_bytes +hwmon_in.addr_0x006e_0x00=0x00050092 +hwmon_in.len_0x006e_0x00=2 +hwmon_in.int_extra1_0x006e_0x00=0x00050092 +hwmon_in.int_extra2_0x006e_0x00=1000 +hwmon_in.int_extra3_0x006e_0x00=1 + +hwmon_in.mode_0x006e_0x01=str_constant +hwmon_in.str_cons_0x006e_0x01=MGMT_PHY_VDD1_8V + +hwmon_in.mode_0x006e_0x02=str_constant +hwmon_in.str_cons_0x006e_0x02=cpld + +hwmon_in.mode_0x006e_0x03=str_constant +hwmon_in.str_cons_0x006e_0x03=1910 + +hwmon_in.mode_0x006e_0x05=str_constant +hwmon_in.str_cons_0x006e_0x05=1690 + +# vol111 +hwmon_in.mode_0x006f_0x00=config +hwmon_in.int_cons_0x006f_0x00=0 +hwmon_in.src_0x006f_0x00=cpld +hwmon_in.frmt_0x006f_0x00=num_bytes +hwmon_in.addr_0x006f_0x00=0x00050094 +hwmon_in.len_0x006f_0x00=2 +hwmon_in.int_extra1_0x006f_0x00=0x00050094 +hwmon_in.int_extra2_0x006f_0x00=1000 +hwmon_in.int_extra3_0x006f_0x00=1 + +hwmon_in.mode_0x006f_0x01=str_constant +hwmon_in.str_cons_0x006f_0x01=MGMT_PHY_VDD1_25V + +hwmon_in.mode_0x006f_0x02=str_constant +hwmon_in.str_cons_0x006f_0x02=cpld + +hwmon_in.mode_0x006f_0x03=str_constant +hwmon_in.str_cons_0x006f_0x03=1375 + +hwmon_in.mode_0x006f_0x05=str_constant +hwmon_in.str_cons_0x006f_0x05=1125 + +# vol112 +hwmon_in.mode_0x0070_0x00=config +hwmon_in.int_cons_0x0070_0x00=0 +hwmon_in.src_0x0070_0x00=cpld +hwmon_in.frmt_0x0070_0x00=num_bytes +hwmon_in.addr_0x0070_0x00=0x00050098 +hwmon_in.len_0x0070_0x00=2 +hwmon_in.int_extra1_0x0070_0x00=0x00050098 +hwmon_in.int_extra2_0x0070_0x00=1000 +hwmon_in.int_extra3_0x0070_0x00=1 + +hwmon_in.mode_0x0070_0x01=str_constant +hwmon_in.str_cons_0x0070_0x01=MGMT_PHY_VDD0_8V + +hwmon_in.mode_0x0070_0x02=str_constant +hwmon_in.str_cons_0x0070_0x02=cpld + +hwmon_in.mode_0x0070_0x03=str_constant +hwmon_in.str_cons_0x0070_0x03=880 + +hwmon_in.mode_0x0070_0x05=str_constant +hwmon_in.str_cons_0x0070_0x05=720 + + +# curr1 +hwmon_curr.mode_0x0001_0x00=config +hwmon_curr.int_cons_0x0001_0x00=0 +hwmon_curr.src_0x0001_0x00=file +hwmon_curr.frmt_0x0001_0x00=buf +hwmon_curr.fpath_0x0001_0x00=/sys/bus/i2c/devices/69-0070/hwmon/ +hwmon_curr.addr_0x0001_0x00=0 +hwmon_curr.len_0x0001_0x00=8 +hwmon_curr.bit_offset_0x0001_0x00= +hwmon_curr.str_cons_0x0001_0x00=curr3_input +hwmon_curr.mode_0x0001_0x01=str_constant +hwmon_curr.str_cons_0x0001_0x01=CPU_XDPE_VCCIN_C +hwmon_curr.mode_0x0001_0x02=str_constant +hwmon_curr.str_cons_0x0001_0x02=xdpe12284c +hwmon_curr.mode_0x0001_0x03=constant +hwmon_curr.int_cons_0x0001_0x03=14700 +hwmon_curr.mode_0x0001_0x05=constant +hwmon_curr.int_cons_0x0001_0x05=-3100 + +# curr2 +hwmon_curr.mode_0x0002_0x00=config +hwmon_curr.int_cons_0x0002_0x00=0 +hwmon_curr.src_0x0002_0x00=file +hwmon_curr.frmt_0x0002_0x00=buf +hwmon_curr.fpath_0x0002_0x00=/sys/bus/i2c/devices/69-0070/hwmon/ +hwmon_curr.addr_0x0002_0x00=0 +hwmon_curr.len_0x0002_0x00=8 +hwmon_curr.bit_offset_0x0002_0x00= +hwmon_curr.str_cons_0x0002_0x00=curr4_input +hwmon_curr.mode_0x0002_0x01=str_constant +hwmon_curr.str_cons_0x0002_0x01=CPU_XDPE_P1V8_C +hwmon_curr.mode_0x0002_0x02=str_constant +hwmon_curr.str_cons_0x0002_0x02=xdpe12284c +hwmon_curr.mode_0x0002_0x03=constant +hwmon_curr.int_cons_0x0002_0x03=4100 +hwmon_curr.mode_0x0002_0x05=constant +hwmon_curr.int_cons_0x0002_0x05=-3100 + +# curr3 +hwmon_curr.mode_0x0003_0x00=config +hwmon_curr.int_cons_0x0003_0x00=0 +hwmon_curr.src_0x0003_0x00=file +hwmon_curr.frmt_0x0003_0x00=buf +hwmon_curr.fpath_0x0003_0x00=/sys/bus/i2c/devices/69-006e/hwmon/ +hwmon_curr.addr_0x0003_0x00=0 +hwmon_curr.len_0x0003_0x00=8 +hwmon_curr.bit_offset_0x0003_0x00= +hwmon_curr.str_cons_0x0003_0x00=curr3_input +hwmon_curr.mode_0x0003_0x01=str_constant +hwmon_curr.str_cons_0x0003_0x01=CPU_XDPE_P1V05_C +hwmon_curr.mode_0x0003_0x02=str_constant +hwmon_curr.str_cons_0x0003_0x02=xdpe12284c +hwmon_curr.mode_0x0003_0x03=constant +hwmon_curr.int_cons_0x0003_0x03=14300 +hwmon_curr.mode_0x0003_0x05=constant +hwmon_curr.int_cons_0x0003_0x05=-3100 + +# curr4 +hwmon_curr.mode_0x0004_0x00=config +hwmon_curr.int_cons_0x0004_0x00=0 +hwmon_curr.src_0x0004_0x00=file +hwmon_curr.frmt_0x0004_0x00=buf +hwmon_curr.fpath_0x0004_0x00=/sys/bus/i2c/devices/69-006e/hwmon/ +hwmon_curr.addr_0x0004_0x00=0 +hwmon_curr.len_0x0004_0x00=8 +hwmon_curr.bit_offset_0x0004_0x00= +hwmon_curr.str_cons_0x0004_0x00=curr4_input +hwmon_curr.mode_0x0004_0x01=str_constant +hwmon_curr.str_cons_0x0004_0x01=CPU_XDPE_VNN_PCH_C +hwmon_curr.mode_0x0004_0x02=str_constant +hwmon_curr.str_cons_0x0004_0x02=xdpe12284c +hwmon_curr.mode_0x0004_0x03=constant +hwmon_curr.int_cons_0x0004_0x03=9100 +hwmon_curr.mode_0x0004_0x05=constant +hwmon_curr.int_cons_0x0004_0x05=-3100 + +# curr5 +hwmon_curr.mode_0x0005_0x00=config +hwmon_curr.int_cons_0x0005_0x00=0 +hwmon_curr.src_0x0005_0x00=file +hwmon_curr.frmt_0x0005_0x00=buf +hwmon_curr.fpath_0x0005_0x00=/sys/bus/i2c/devices/69-0068/hwmon/ +hwmon_curr.addr_0x0005_0x00=0 +hwmon_curr.len_0x0005_0x00=8 +hwmon_curr.bit_offset_0x0005_0x00= +hwmon_curr.str_cons_0x0005_0x00=curr3_input +hwmon_curr.mode_0x0005_0x01=str_constant +hwmon_curr.str_cons_0x0005_0x01=CPU_XDPE_VNN_NAC_C +hwmon_curr.mode_0x0005_0x02=str_constant +hwmon_curr.str_cons_0x0005_0x02=xdpe12284c +hwmon_curr.mode_0x0005_0x03=constant +hwmon_curr.int_cons_0x0005_0x03=22000 +hwmon_curr.mode_0x0005_0x05=constant +hwmon_curr.int_cons_0x0005_0x05=-3100 + +# curr6 +hwmon_curr.mode_0x0006_0x00=config +hwmon_curr.int_cons_0x0006_0x00=0 +hwmon_curr.src_0x0006_0x00=file +hwmon_curr.frmt_0x0006_0x00=buf +hwmon_curr.fpath_0x0006_0x00=/sys/bus/i2c/devices/69-0068/hwmon/ +hwmon_curr.addr_0x0006_0x00=0 +hwmon_curr.len_0x0006_0x00=8 +hwmon_curr.bit_offset_0x0006_0x00= +hwmon_curr.str_cons_0x0006_0x00=curr4_input +hwmon_curr.mode_0x0006_0x01=str_constant +hwmon_curr.str_cons_0x0006_0x01=CPU_XDPE_VCC_ANA_C +hwmon_curr.mode_0x0006_0x02=str_constant +hwmon_curr.str_cons_0x0006_0x02=xdpe12284c +hwmon_curr.mode_0x0006_0x03=constant +hwmon_curr.int_cons_0x0006_0x03=4100 +hwmon_curr.mode_0x0006_0x05=constant +hwmon_curr.int_cons_0x0006_0x05=-3100 + +# curr7 +hwmon_curr.mode_0x0007_0x00=config +hwmon_curr.int_cons_0x0007_0x00=0 +hwmon_curr.src_0x0007_0x00=file +hwmon_curr.frmt_0x0007_0x00=buf +hwmon_curr.fpath_0x0007_0x00=/sys/bus/i2c/devices/69-005e/hwmon/ +hwmon_curr.addr_0x0007_0x00=0 +hwmon_curr.len_0x0007_0x00=8 +hwmon_curr.bit_offset_0x0007_0x00= +hwmon_curr.str_cons_0x0007_0x00=curr3_input +hwmon_curr.mode_0x0007_0x01=str_constant +hwmon_curr.str_cons_0x0007_0x01=CPU_XDPE_P1V2_VDDQ_C +hwmon_curr.mode_0x0007_0x02=str_constant +hwmon_curr.str_cons_0x0007_0x02=xdpe12284c +hwmon_curr.mode_0x0007_0x03=constant +hwmon_curr.int_cons_0x0007_0x03=19000 +hwmon_curr.mode_0x0007_0x05=constant +hwmon_curr.int_cons_0x0007_0x05=-3100 + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SFF.cfg new file mode 100644 index 00000000000..cab181a680f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SFF.cfg @@ -0,0 +1,2682 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration item: Number of optical modules +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,optical module is 3, minor_dev, 0:does not exist +dev_num_3_0=66 + +# Configuration items:: optical module EEPROM size +# Description: Format eeprom_size_[main_dev]_[index] +# Note: main_dev,optical module is 3, index, Optical module index, starting from 1 +eeprom_size_3_1=0x8180 +eeprom_size_3_2=0x8180 +eeprom_size_3_3=0x8180 +eeprom_size_3_4=0x8180 +eeprom_size_3_5=0x8180 +eeprom_size_3_6=0x8180 +eeprom_size_3_7=0x8180 +eeprom_size_3_8=0x8180 +eeprom_size_3_9=0x8180 +eeprom_size_3_10=0x8180 +eeprom_size_3_11=0x8180 +eeprom_size_3_12=0x8180 +eeprom_size_3_13=0x8180 +eeprom_size_3_14=0x8180 +eeprom_size_3_15=0x8180 +eeprom_size_3_16=0x8180 +eeprom_size_3_17=0x8180 +eeprom_size_3_18=0x8180 +eeprom_size_3_19=0x8180 +eeprom_size_3_20=0x8180 +eeprom_size_3_21=0x8180 +eeprom_size_3_22=0x8180 +eeprom_size_3_23=0x8180 +eeprom_size_3_24=0x8180 +eeprom_size_3_25=0x8180 +eeprom_size_3_26=0x8180 +eeprom_size_3_27=0x8180 +eeprom_size_3_28=0x8180 +eeprom_size_3_29=0x8180 +eeprom_size_3_30=0x8180 +eeprom_size_3_31=0x8180 +eeprom_size_3_32=0x8180 +eeprom_size_3_33=0x8180 +eeprom_size_3_34=0x8180 +eeprom_size_3_35=0x8180 +eeprom_size_3_36=0x8180 +eeprom_size_3_37=0x8180 +eeprom_size_3_38=0x8180 +eeprom_size_3_39=0x8180 +eeprom_size_3_40=0x8180 +eeprom_size_3_41=0x8180 +eeprom_size_3_42=0x8180 +eeprom_size_3_43=0x8180 +eeprom_size_3_44=0x8180 +eeprom_size_3_45=0x8180 +eeprom_size_3_46=0x8180 +eeprom_size_3_47=0x8180 +eeprom_size_3_48=0x8180 +eeprom_size_3_49=0x8180 +eeprom_size_3_50=0x8180 +eeprom_size_3_51=0x8180 +eeprom_size_3_52=0x8180 +eeprom_size_3_53=0x8180 +eeprom_size_3_54=0x8180 +eeprom_size_3_55=0x8180 +eeprom_size_3_56=0x8180 +eeprom_size_3_57=0x8180 +eeprom_size_3_58=0x8180 +eeprom_size_3_59=0x8180 +eeprom_size_3_60=0x8180 +eeprom_size_3_61=0x8180 +eeprom_size_3_62=0x8180 +eeprom_size_3_63=0x8180 +eeprom_size_3_64=0x8180 +eeprom_size_3_65=0x8180 +eeprom_size_3_66=0x8180 + +# Configuration items: optical module EEPROM sysfs path +# Description: Format eeprom_size_[main_dev]_[index] +# Note: main_dev,optical module is 3, index, Optical module index, starting from 1 +eeprom_path_3_1=/sys/bus/i2c/devices/106-0050/eeprom +eeprom_path_3_2=/sys/bus/i2c/devices/107-0050/eeprom +eeprom_path_3_3=/sys/bus/i2c/devices/108-0050/eeprom +eeprom_path_3_4=/sys/bus/i2c/devices/109-0050/eeprom +eeprom_path_3_5=/sys/bus/i2c/devices/110-0050/eeprom +eeprom_path_3_6=/sys/bus/i2c/devices/111-0050/eeprom +eeprom_path_3_7=/sys/bus/i2c/devices/112-0050/eeprom +eeprom_path_3_8=/sys/bus/i2c/devices/113-0050/eeprom +eeprom_path_3_9=/sys/bus/i2c/devices/114-0050/eeprom +eeprom_path_3_10=/sys/bus/i2c/devices/115-0050/eeprom +eeprom_path_3_11=/sys/bus/i2c/devices/116-0050/eeprom +eeprom_path_3_12=/sys/bus/i2c/devices/117-0050/eeprom +eeprom_path_3_13=/sys/bus/i2c/devices/118-0050/eeprom +eeprom_path_3_14=/sys/bus/i2c/devices/119-0050/eeprom +eeprom_path_3_15=/sys/bus/i2c/devices/120-0050/eeprom +eeprom_path_3_16=/sys/bus/i2c/devices/121-0050/eeprom +eeprom_path_3_17=/sys/bus/i2c/devices/122-0050/eeprom +eeprom_path_3_18=/sys/bus/i2c/devices/123-0050/eeprom +eeprom_path_3_19=/sys/bus/i2c/devices/124-0050/eeprom +eeprom_path_3_20=/sys/bus/i2c/devices/125-0050/eeprom +eeprom_path_3_21=/sys/bus/i2c/devices/126-0050/eeprom +eeprom_path_3_22=/sys/bus/i2c/devices/127-0050/eeprom +eeprom_path_3_23=/sys/bus/i2c/devices/128-0050/eeprom +eeprom_path_3_24=/sys/bus/i2c/devices/129-0050/eeprom +eeprom_path_3_25=/sys/bus/i2c/devices/130-0050/eeprom +eeprom_path_3_26=/sys/bus/i2c/devices/131-0050/eeprom +eeprom_path_3_27=/sys/bus/i2c/devices/132-0050/eeprom +eeprom_path_3_28=/sys/bus/i2c/devices/133-0050/eeprom +eeprom_path_3_29=/sys/bus/i2c/devices/134-0050/eeprom +eeprom_path_3_30=/sys/bus/i2c/devices/135-0050/eeprom +eeprom_path_3_31=/sys/bus/i2c/devices/136-0050/eeprom +eeprom_path_3_32=/sys/bus/i2c/devices/137-0050/eeprom +eeprom_path_3_33=/sys/bus/i2c/devices/138-0050/eeprom +eeprom_path_3_34=/sys/bus/i2c/devices/139-0050/eeprom +eeprom_path_3_35=/sys/bus/i2c/devices/140-0050/eeprom +eeprom_path_3_36=/sys/bus/i2c/devices/141-0050/eeprom +eeprom_path_3_37=/sys/bus/i2c/devices/142-0050/eeprom +eeprom_path_3_38=/sys/bus/i2c/devices/143-0050/eeprom +eeprom_path_3_39=/sys/bus/i2c/devices/144-0050/eeprom +eeprom_path_3_40=/sys/bus/i2c/devices/145-0050/eeprom +eeprom_path_3_41=/sys/bus/i2c/devices/146-0050/eeprom +eeprom_path_3_42=/sys/bus/i2c/devices/147-0050/eeprom +eeprom_path_3_43=/sys/bus/i2c/devices/148-0050/eeprom +eeprom_path_3_44=/sys/bus/i2c/devices/149-0050/eeprom +eeprom_path_3_45=/sys/bus/i2c/devices/150-0050/eeprom +eeprom_path_3_46=/sys/bus/i2c/devices/151-0050/eeprom +eeprom_path_3_47=/sys/bus/i2c/devices/152-0050/eeprom +eeprom_path_3_48=/sys/bus/i2c/devices/153-0050/eeprom +eeprom_path_3_49=/sys/bus/i2c/devices/154-0050/eeprom +eeprom_path_3_50=/sys/bus/i2c/devices/155-0050/eeprom +eeprom_path_3_51=/sys/bus/i2c/devices/156-0050/eeprom +eeprom_path_3_52=/sys/bus/i2c/devices/157-0050/eeprom +eeprom_path_3_53=/sys/bus/i2c/devices/158-0050/eeprom +eeprom_path_3_54=/sys/bus/i2c/devices/159-0050/eeprom +eeprom_path_3_55=/sys/bus/i2c/devices/160-0050/eeprom +eeprom_path_3_56=/sys/bus/i2c/devices/161-0050/eeprom +eeprom_path_3_57=/sys/bus/i2c/devices/162-0050/eeprom +eeprom_path_3_58=/sys/bus/i2c/devices/163-0050/eeprom +eeprom_path_3_59=/sys/bus/i2c/devices/164-0050/eeprom +eeprom_path_3_60=/sys/bus/i2c/devices/165-0050/eeprom +eeprom_path_3_61=/sys/bus/i2c/devices/166-0050/eeprom +eeprom_path_3_62=/sys/bus/i2c/devices/167-0050/eeprom +eeprom_path_3_63=/sys/bus/i2c/devices/168-0050/eeprom +eeprom_path_3_64=/sys/bus/i2c/devices/169-0050/eeprom +eeprom_path_3_65=/sys/bus/i2c/devices/60-0050/eeprom +eeprom_path_3_66=/sys/bus/i2c/devices/59-0050/eeprom + + +# Configuration items: Optical module CPLD register +# Description: Format sff_cpld_reg_[sff_index]_[cpld_reg] +# Note: sff_index indicates the optical module number, starting from 1. 0 indicates that the power_on register is useful +# cpld_reg 1:power_on 2:tx_fault, 3:tx_dis 4:reserve 5:rx_los +# 6:reset 7:lpmode 8:module_present 9:interrupt + + +# 800G module reset signal +sff_cpld_reg.mode_1_6=config +sff_cpld_reg.src_1_6=cpld +sff_cpld_reg.frmt_1_6=bit +sff_cpld_reg.pola_1_6=negative +sff_cpld_reg.addr_1_6=0x00020072 +sff_cpld_reg.len_1_6=1 +sff_cpld_reg.bit_offset_1_6=0 + +sff_cpld_reg.mode_2_6=config +sff_cpld_reg.src_2_6=cpld +sff_cpld_reg.frmt_2_6=bit +sff_cpld_reg.pola_2_6=negative +sff_cpld_reg.addr_2_6=0x00020072 +sff_cpld_reg.len_2_6=1 +sff_cpld_reg.bit_offset_2_6=1 + +sff_cpld_reg.mode_3_6=config +sff_cpld_reg.src_3_6=cpld +sff_cpld_reg.frmt_3_6=bit +sff_cpld_reg.pola_3_6=negative +sff_cpld_reg.addr_3_6=0x00020072 +sff_cpld_reg.len_3_6=1 +sff_cpld_reg.bit_offset_3_6=2 + +sff_cpld_reg.mode_4_6=config +sff_cpld_reg.src_4_6=cpld +sff_cpld_reg.frmt_4_6=bit +sff_cpld_reg.pola_4_6=negative +sff_cpld_reg.addr_4_6=0x00020072 +sff_cpld_reg.len_4_6=1 +sff_cpld_reg.bit_offset_4_6=3 + +sff_cpld_reg.mode_5_6=config +sff_cpld_reg.src_5_6=cpld +sff_cpld_reg.frmt_5_6=bit +sff_cpld_reg.pola_5_6=negative +sff_cpld_reg.addr_5_6=0x00020072 +sff_cpld_reg.len_5_6=1 +sff_cpld_reg.bit_offset_5_6=4 + +sff_cpld_reg.mode_6_6=config +sff_cpld_reg.src_6_6=cpld +sff_cpld_reg.frmt_6_6=bit +sff_cpld_reg.pola_6_6=negative +sff_cpld_reg.addr_6_6=0x00020072 +sff_cpld_reg.len_6_6=1 +sff_cpld_reg.bit_offset_6_6=5 + +sff_cpld_reg.mode_7_6=config +sff_cpld_reg.src_7_6=cpld +sff_cpld_reg.frmt_7_6=bit +sff_cpld_reg.pola_7_6=negative +sff_cpld_reg.addr_7_6=0x00020072 +sff_cpld_reg.len_7_6=1 +sff_cpld_reg.bit_offset_7_6=6 + +sff_cpld_reg.mode_8_6=config +sff_cpld_reg.src_8_6=cpld +sff_cpld_reg.frmt_8_6=bit +sff_cpld_reg.pola_8_6=negative +sff_cpld_reg.addr_8_6=0x00020072 +sff_cpld_reg.len_8_6=1 +sff_cpld_reg.bit_offset_8_6=7 + +sff_cpld_reg.mode_9_6=config +sff_cpld_reg.src_9_6=cpld +sff_cpld_reg.frmt_9_6=bit +sff_cpld_reg.pola_9_6=negative +sff_cpld_reg.addr_9_6=0x00020071 +sff_cpld_reg.len_9_6=1 +sff_cpld_reg.bit_offset_9_6=0 + +sff_cpld_reg.mode_10_6=config +sff_cpld_reg.src_10_6=cpld +sff_cpld_reg.frmt_10_6=bit +sff_cpld_reg.pola_10_6=negative +sff_cpld_reg.addr_10_6=0x00020071 +sff_cpld_reg.len_10_6=1 +sff_cpld_reg.bit_offset_10_6=1 + +sff_cpld_reg.mode_11_6=config +sff_cpld_reg.src_11_6=cpld +sff_cpld_reg.frmt_11_6=bit +sff_cpld_reg.pola_11_6=negative +sff_cpld_reg.addr_11_6=0x00020071 +sff_cpld_reg.len_11_6=1 +sff_cpld_reg.bit_offset_11_6=2 + +sff_cpld_reg.mode_12_6=config +sff_cpld_reg.src_12_6=cpld +sff_cpld_reg.frmt_12_6=bit +sff_cpld_reg.pola_12_6=negative +sff_cpld_reg.addr_12_6=0x00020071 +sff_cpld_reg.len_12_6=1 +sff_cpld_reg.bit_offset_12_6=3 + +sff_cpld_reg.mode_13_6=config +sff_cpld_reg.src_13_6=cpld +sff_cpld_reg.frmt_13_6=bit +sff_cpld_reg.pola_13_6=negative +sff_cpld_reg.addr_13_6=0x00020071 +sff_cpld_reg.len_13_6=1 +sff_cpld_reg.bit_offset_13_6=4 + +sff_cpld_reg.mode_14_6=config +sff_cpld_reg.src_14_6=cpld +sff_cpld_reg.frmt_14_6=bit +sff_cpld_reg.pola_14_6=negative +sff_cpld_reg.addr_14_6=0x00020071 +sff_cpld_reg.len_14_6=1 +sff_cpld_reg.bit_offset_14_6=5 + +sff_cpld_reg.mode_15_6=config +sff_cpld_reg.src_15_6=cpld +sff_cpld_reg.frmt_15_6=bit +sff_cpld_reg.pola_15_6=negative +sff_cpld_reg.addr_15_6=0x00020071 +sff_cpld_reg.len_15_6=1 +sff_cpld_reg.bit_offset_15_6=6 + +sff_cpld_reg.mode_16_6=config +sff_cpld_reg.src_16_6=cpld +sff_cpld_reg.frmt_16_6=bit +sff_cpld_reg.pola_16_6=negative +sff_cpld_reg.addr_16_6=0x00020071 +sff_cpld_reg.len_16_6=1 +sff_cpld_reg.bit_offset_16_6=7 + +sff_cpld_reg.mode_17_6=config +sff_cpld_reg.src_17_6=cpld +sff_cpld_reg.frmt_17_6=bit +sff_cpld_reg.pola_17_6=negative +sff_cpld_reg.addr_17_6=0x00020070 +sff_cpld_reg.len_17_6=1 +sff_cpld_reg.bit_offset_17_6=0 + +sff_cpld_reg.mode_18_6=config +sff_cpld_reg.src_18_6=cpld +sff_cpld_reg.frmt_18_6=bit +sff_cpld_reg.pola_18_6=negative +sff_cpld_reg.addr_18_6=0x00020070 +sff_cpld_reg.len_18_6=1 +sff_cpld_reg.bit_offset_18_6=1 + +sff_cpld_reg.mode_19_6=config +sff_cpld_reg.src_19_6=cpld +sff_cpld_reg.frmt_19_6=bit +sff_cpld_reg.pola_19_6=negative +sff_cpld_reg.addr_19_6=0x00020070 +sff_cpld_reg.len_19_6=1 +sff_cpld_reg.bit_offset_19_6=2 + +sff_cpld_reg.mode_20_6=config +sff_cpld_reg.src_20_6=cpld +sff_cpld_reg.frmt_20_6=bit +sff_cpld_reg.pola_20_6=negative +sff_cpld_reg.addr_20_6=0x00020070 +sff_cpld_reg.len_20_6=1 +sff_cpld_reg.bit_offset_20_6=3 + +sff_cpld_reg.mode_21_6=config +sff_cpld_reg.src_21_6=cpld +sff_cpld_reg.frmt_21_6=bit +sff_cpld_reg.pola_21_6=negative +sff_cpld_reg.addr_21_6=0x00020070 +sff_cpld_reg.len_21_6=1 +sff_cpld_reg.bit_offset_21_6=4 + +sff_cpld_reg.mode_22_6=config +sff_cpld_reg.src_22_6=cpld +sff_cpld_reg.frmt_22_6=bit +sff_cpld_reg.pola_22_6=negative +sff_cpld_reg.addr_22_6=0x00020070 +sff_cpld_reg.len_22_6=1 +sff_cpld_reg.bit_offset_22_6=5 + +sff_cpld_reg.mode_23_6=config +sff_cpld_reg.src_23_6=cpld +sff_cpld_reg.frmt_23_6=bit +sff_cpld_reg.pola_23_6=negative +sff_cpld_reg.addr_23_6=0x00020070 +sff_cpld_reg.len_23_6=1 +sff_cpld_reg.bit_offset_23_6=6 + +sff_cpld_reg.mode_24_6=config +sff_cpld_reg.src_24_6=cpld +sff_cpld_reg.frmt_24_6=bit +sff_cpld_reg.pola_24_6=negative +sff_cpld_reg.addr_24_6=0x00020070 +sff_cpld_reg.len_24_6=1 +sff_cpld_reg.bit_offset_24_6=7 + +sff_cpld_reg.mode_25_6=config +sff_cpld_reg.src_25_6=cpld +sff_cpld_reg.frmt_25_6=bit +sff_cpld_reg.pola_25_6=negative +sff_cpld_reg.addr_25_6=0x00030074 +sff_cpld_reg.len_25_6=1 +sff_cpld_reg.bit_offset_25_6=0 + +sff_cpld_reg.mode_26_6=config +sff_cpld_reg.src_26_6=cpld +sff_cpld_reg.frmt_26_6=bit +sff_cpld_reg.pola_26_6=negative +sff_cpld_reg.addr_26_6=0x00030074 +sff_cpld_reg.len_26_6=1 +sff_cpld_reg.bit_offset_26_6=1 + +sff_cpld_reg.mode_27_6=config +sff_cpld_reg.src_27_6=cpld +sff_cpld_reg.frmt_27_6=bit +sff_cpld_reg.pola_27_6=negative +sff_cpld_reg.addr_27_6=0x00030074 +sff_cpld_reg.len_27_6=1 +sff_cpld_reg.bit_offset_27_6=2 + +sff_cpld_reg.mode_28_6=config +sff_cpld_reg.src_28_6=cpld +sff_cpld_reg.frmt_28_6=bit +sff_cpld_reg.pola_28_6=negative +sff_cpld_reg.addr_28_6=0x00030074 +sff_cpld_reg.len_28_6=1 +sff_cpld_reg.bit_offset_28_6=3 + +sff_cpld_reg.mode_29_6=config +sff_cpld_reg.src_29_6=cpld +sff_cpld_reg.frmt_29_6=bit +sff_cpld_reg.pola_29_6=negative +sff_cpld_reg.addr_29_6=0x00030074 +sff_cpld_reg.len_29_6=1 +sff_cpld_reg.bit_offset_29_6=4 + +sff_cpld_reg.mode_30_6=config +sff_cpld_reg.src_30_6=cpld +sff_cpld_reg.frmt_30_6=bit +sff_cpld_reg.pola_30_6=negative +sff_cpld_reg.addr_30_6=0x00030074 +sff_cpld_reg.len_30_6=1 +sff_cpld_reg.bit_offset_30_6=5 + +sff_cpld_reg.mode_31_6=config +sff_cpld_reg.src_31_6=cpld +sff_cpld_reg.frmt_31_6=bit +sff_cpld_reg.pola_31_6=negative +sff_cpld_reg.addr_31_6=0x00030074 +sff_cpld_reg.len_31_6=1 +sff_cpld_reg.bit_offset_31_6=6 + +sff_cpld_reg.mode_32_6=config +sff_cpld_reg.src_32_6=cpld +sff_cpld_reg.frmt_32_6=bit +sff_cpld_reg.pola_32_6=negative +sff_cpld_reg.addr_32_6=0x00030074 +sff_cpld_reg.len_32_6=1 +sff_cpld_reg.bit_offset_32_6=7 + +sff_cpld_reg.mode_33_6=config +sff_cpld_reg.src_33_6=cpld +sff_cpld_reg.frmt_33_6=bit +sff_cpld_reg.pola_33_6=negative +sff_cpld_reg.addr_33_6=0x00030073 +sff_cpld_reg.len_33_6=1 +sff_cpld_reg.bit_offset_33_6=0 + +sff_cpld_reg.mode_34_6=config +sff_cpld_reg.src_34_6=cpld +sff_cpld_reg.frmt_34_6=bit +sff_cpld_reg.pola_34_6=negative +sff_cpld_reg.addr_34_6=0x00030073 +sff_cpld_reg.len_34_6=1 +sff_cpld_reg.bit_offset_34_6=1 + +sff_cpld_reg.mode_35_6=config +sff_cpld_reg.src_35_6=cpld +sff_cpld_reg.frmt_35_6=bit +sff_cpld_reg.pola_35_6=negative +sff_cpld_reg.addr_35_6=0x00030073 +sff_cpld_reg.len_35_6=1 +sff_cpld_reg.bit_offset_35_6=2 + +sff_cpld_reg.mode_36_6=config +sff_cpld_reg.src_36_6=cpld +sff_cpld_reg.frmt_36_6=bit +sff_cpld_reg.pola_36_6=negative +sff_cpld_reg.addr_36_6=0x00030073 +sff_cpld_reg.len_36_6=1 +sff_cpld_reg.bit_offset_36_6=3 + +sff_cpld_reg.mode_37_6=config +sff_cpld_reg.src_37_6=cpld +sff_cpld_reg.frmt_37_6=bit +sff_cpld_reg.pola_37_6=negative +sff_cpld_reg.addr_37_6=0x00030073 +sff_cpld_reg.len_37_6=1 +sff_cpld_reg.bit_offset_37_6=4 + +sff_cpld_reg.mode_38_6=config +sff_cpld_reg.src_38_6=cpld +sff_cpld_reg.frmt_38_6=bit +sff_cpld_reg.pola_38_6=negative +sff_cpld_reg.addr_38_6=0x00030073 +sff_cpld_reg.len_38_6=1 +sff_cpld_reg.bit_offset_38_6=5 + +sff_cpld_reg.mode_39_6=config +sff_cpld_reg.src_39_6=cpld +sff_cpld_reg.frmt_39_6=bit +sff_cpld_reg.pola_39_6=negative +sff_cpld_reg.addr_39_6=0x00030073 +sff_cpld_reg.len_39_6=1 +sff_cpld_reg.bit_offset_39_6=6 + +sff_cpld_reg.mode_40_6=config +sff_cpld_reg.src_40_6=cpld +sff_cpld_reg.frmt_40_6=bit +sff_cpld_reg.pola_40_6=negative +sff_cpld_reg.addr_40_6=0x00030073 +sff_cpld_reg.len_40_6=1 +sff_cpld_reg.bit_offset_40_6=7 + +sff_cpld_reg.mode_41_6=config +sff_cpld_reg.src_41_6=cpld +sff_cpld_reg.frmt_41_6=bit +sff_cpld_reg.pola_41_6=negative +sff_cpld_reg.addr_41_6=0x00030072 +sff_cpld_reg.len_41_6=1 +sff_cpld_reg.bit_offset_41_6=0 + +sff_cpld_reg.mode_42_6=config +sff_cpld_reg.src_42_6=cpld +sff_cpld_reg.frmt_42_6=bit +sff_cpld_reg.pola_42_6=negative +sff_cpld_reg.addr_42_6=0x00030072 +sff_cpld_reg.len_42_6=1 +sff_cpld_reg.bit_offset_42_6=1 + +sff_cpld_reg.mode_43_6=config +sff_cpld_reg.src_43_6=cpld +sff_cpld_reg.frmt_43_6=bit +sff_cpld_reg.pola_43_6=negative +sff_cpld_reg.addr_43_6=0x00030072 +sff_cpld_reg.len_43_6=1 +sff_cpld_reg.bit_offset_43_6=2 + +sff_cpld_reg.mode_44_6=config +sff_cpld_reg.src_44_6=cpld +sff_cpld_reg.frmt_44_6=bit +sff_cpld_reg.pola_44_6=negative +sff_cpld_reg.addr_44_6=0x00030072 +sff_cpld_reg.len_44_6=1 +sff_cpld_reg.bit_offset_44_6=3 + +sff_cpld_reg.mode_45_6=config +sff_cpld_reg.src_45_6=cpld +sff_cpld_reg.frmt_45_6=bit +sff_cpld_reg.pola_45_6=negative +sff_cpld_reg.addr_45_6=0x00030072 +sff_cpld_reg.len_45_6=1 +sff_cpld_reg.bit_offset_45_6=4 + +sff_cpld_reg.mode_46_6=config +sff_cpld_reg.src_46_6=cpld +sff_cpld_reg.frmt_46_6=bit +sff_cpld_reg.pola_46_6=negative +sff_cpld_reg.addr_46_6=0x00030072 +sff_cpld_reg.len_46_6=1 +sff_cpld_reg.bit_offset_46_6=5 + +sff_cpld_reg.mode_47_6=config +sff_cpld_reg.src_47_6=cpld +sff_cpld_reg.frmt_47_6=bit +sff_cpld_reg.pola_47_6=negative +sff_cpld_reg.addr_47_6=0x00030072 +sff_cpld_reg.len_47_6=1 +sff_cpld_reg.bit_offset_47_6=6 + +sff_cpld_reg.mode_48_6=config +sff_cpld_reg.src_48_6=cpld +sff_cpld_reg.frmt_48_6=bit +sff_cpld_reg.pola_48_6=negative +sff_cpld_reg.addr_48_6=0x00030072 +sff_cpld_reg.len_48_6=1 +sff_cpld_reg.bit_offset_48_6=7 + +sff_cpld_reg.mode_49_6=config +sff_cpld_reg.src_49_6=cpld +sff_cpld_reg.frmt_49_6=bit +sff_cpld_reg.pola_49_6=negative +sff_cpld_reg.addr_49_6=0x00030071 +sff_cpld_reg.len_49_6=1 +sff_cpld_reg.bit_offset_49_6=0 + +sff_cpld_reg.mode_50_6=config +sff_cpld_reg.src_50_6=cpld +sff_cpld_reg.frmt_50_6=bit +sff_cpld_reg.pola_50_6=negative +sff_cpld_reg.addr_50_6=0x00030071 +sff_cpld_reg.len_50_6=1 +sff_cpld_reg.bit_offset_50_6=1 + +sff_cpld_reg.mode_51_6=config +sff_cpld_reg.src_51_6=cpld +sff_cpld_reg.frmt_51_6=bit +sff_cpld_reg.pola_51_6=negative +sff_cpld_reg.addr_51_6=0x00030071 +sff_cpld_reg.len_51_6=1 +sff_cpld_reg.bit_offset_51_6=2 + +sff_cpld_reg.mode_52_6=config +sff_cpld_reg.src_52_6=cpld +sff_cpld_reg.frmt_52_6=bit +sff_cpld_reg.pola_52_6=negative +sff_cpld_reg.addr_52_6=0x00030071 +sff_cpld_reg.len_52_6=1 +sff_cpld_reg.bit_offset_52_6=3 + +sff_cpld_reg.mode_53_6=config +sff_cpld_reg.src_53_6=cpld +sff_cpld_reg.frmt_53_6=bit +sff_cpld_reg.pola_53_6=negative +sff_cpld_reg.addr_53_6=0x00030071 +sff_cpld_reg.len_53_6=1 +sff_cpld_reg.bit_offset_53_6=4 + +sff_cpld_reg.mode_54_6=config +sff_cpld_reg.src_54_6=cpld +sff_cpld_reg.frmt_54_6=bit +sff_cpld_reg.pola_54_6=negative +sff_cpld_reg.addr_54_6=0x00030071 +sff_cpld_reg.len_54_6=1 +sff_cpld_reg.bit_offset_54_6=5 + +sff_cpld_reg.mode_55_6=config +sff_cpld_reg.src_55_6=cpld +sff_cpld_reg.frmt_55_6=bit +sff_cpld_reg.pola_55_6=negative +sff_cpld_reg.addr_55_6=0x00030071 +sff_cpld_reg.len_55_6=1 +sff_cpld_reg.bit_offset_55_6=6 + +sff_cpld_reg.mode_56_6=config +sff_cpld_reg.src_56_6=cpld +sff_cpld_reg.frmt_56_6=bit +sff_cpld_reg.pola_56_6=negative +sff_cpld_reg.addr_56_6=0x00030071 +sff_cpld_reg.len_56_6=1 +sff_cpld_reg.bit_offset_56_6=7 + +sff_cpld_reg.mode_57_6=config +sff_cpld_reg.src_57_6=cpld +sff_cpld_reg.frmt_57_6=bit +sff_cpld_reg.pola_57_6=negative +sff_cpld_reg.addr_57_6=0x00030070 +sff_cpld_reg.len_57_6=1 +sff_cpld_reg.bit_offset_57_6=0 + +sff_cpld_reg.mode_58_6=config +sff_cpld_reg.src_58_6=cpld +sff_cpld_reg.frmt_58_6=bit +sff_cpld_reg.pola_58_6=negative +sff_cpld_reg.addr_58_6=0x00030070 +sff_cpld_reg.len_58_6=1 +sff_cpld_reg.bit_offset_58_6=1 + +sff_cpld_reg.mode_59_6=config +sff_cpld_reg.src_59_6=cpld +sff_cpld_reg.frmt_59_6=bit +sff_cpld_reg.pola_59_6=negative +sff_cpld_reg.addr_59_6=0x00030070 +sff_cpld_reg.len_59_6=1 +sff_cpld_reg.bit_offset_59_6=2 + +sff_cpld_reg.mode_60_6=config +sff_cpld_reg.src_60_6=cpld +sff_cpld_reg.frmt_60_6=bit +sff_cpld_reg.pola_60_6=negative +sff_cpld_reg.addr_60_6=0x00030070 +sff_cpld_reg.len_60_6=1 +sff_cpld_reg.bit_offset_60_6=3 + +sff_cpld_reg.mode_61_6=config +sff_cpld_reg.src_61_6=cpld +sff_cpld_reg.frmt_61_6=bit +sff_cpld_reg.pola_61_6=negative +sff_cpld_reg.addr_61_6=0x00030070 +sff_cpld_reg.len_61_6=1 +sff_cpld_reg.bit_offset_61_6=4 + +sff_cpld_reg.mode_62_6=config +sff_cpld_reg.src_62_6=cpld +sff_cpld_reg.frmt_62_6=bit +sff_cpld_reg.pola_62_6=negative +sff_cpld_reg.addr_62_6=0x00030070 +sff_cpld_reg.len_62_6=1 +sff_cpld_reg.bit_offset_62_6=5 + +sff_cpld_reg.mode_63_6=config +sff_cpld_reg.src_63_6=cpld +sff_cpld_reg.frmt_63_6=bit +sff_cpld_reg.pola_63_6=negative +sff_cpld_reg.addr_63_6=0x00030070 +sff_cpld_reg.len_63_6=1 +sff_cpld_reg.bit_offset_63_6=6 + +sff_cpld_reg.mode_64_6=config +sff_cpld_reg.src_64_6=cpld +sff_cpld_reg.frmt_64_6=bit +sff_cpld_reg.pola_64_6=negative +sff_cpld_reg.addr_64_6=0x00030070 +sff_cpld_reg.len_64_6=1 +sff_cpld_reg.bit_offset_64_6=7 + +# 800G module lpmode signal +sff_cpld_reg.mode_1_7=config +sff_cpld_reg.src_1_7=cpld +sff_cpld_reg.frmt_1_7=bit +sff_cpld_reg.pola_1_7=positive +sff_cpld_reg.addr_1_7=0x00020078 +sff_cpld_reg.len_1_7=1 +sff_cpld_reg.bit_offset_1_7=0 + +sff_cpld_reg.mode_2_7=config +sff_cpld_reg.src_2_7=cpld +sff_cpld_reg.frmt_2_7=bit +sff_cpld_reg.pola_2_7=positive +sff_cpld_reg.addr_2_7=0x00020078 +sff_cpld_reg.len_2_7=1 +sff_cpld_reg.bit_offset_2_7=1 + +sff_cpld_reg.mode_3_7=config +sff_cpld_reg.src_3_7=cpld +sff_cpld_reg.frmt_3_7=bit +sff_cpld_reg.pola_3_7=positive +sff_cpld_reg.addr_3_7=0x00020078 +sff_cpld_reg.len_3_7=1 +sff_cpld_reg.bit_offset_3_7=2 + +sff_cpld_reg.mode_4_7=config +sff_cpld_reg.src_4_7=cpld +sff_cpld_reg.frmt_4_7=bit +sff_cpld_reg.pola_4_7=positive +sff_cpld_reg.addr_4_7=0x00020078 +sff_cpld_reg.len_4_7=1 +sff_cpld_reg.bit_offset_4_7=3 + +sff_cpld_reg.mode_5_7=config +sff_cpld_reg.src_5_7=cpld +sff_cpld_reg.frmt_5_7=bit +sff_cpld_reg.pola_5_7=positive +sff_cpld_reg.addr_5_7=0x00020078 +sff_cpld_reg.len_5_7=1 +sff_cpld_reg.bit_offset_5_7=4 + +sff_cpld_reg.mode_6_7=config +sff_cpld_reg.src_6_7=cpld +sff_cpld_reg.frmt_6_7=bit +sff_cpld_reg.pola_6_7=positive +sff_cpld_reg.addr_6_7=0x00020078 +sff_cpld_reg.len_6_7=1 +sff_cpld_reg.bit_offset_6_7=5 + +sff_cpld_reg.mode_7_7=config +sff_cpld_reg.src_7_7=cpld +sff_cpld_reg.frmt_7_7=bit +sff_cpld_reg.pola_7_7=positive +sff_cpld_reg.addr_7_7=0x00020078 +sff_cpld_reg.len_7_7=1 +sff_cpld_reg.bit_offset_7_7=6 + +sff_cpld_reg.mode_8_7=config +sff_cpld_reg.src_8_7=cpld +sff_cpld_reg.frmt_8_7=bit +sff_cpld_reg.pola_8_7=positive +sff_cpld_reg.addr_8_7=0x00020078 +sff_cpld_reg.len_8_7=1 +sff_cpld_reg.bit_offset_8_7=7 + +sff_cpld_reg.mode_9_7=config +sff_cpld_reg.src_9_7=cpld +sff_cpld_reg.frmt_9_7=bit +sff_cpld_reg.pola_9_7=positive +sff_cpld_reg.addr_9_7=0x00020077 +sff_cpld_reg.len_9_7=1 +sff_cpld_reg.bit_offset_9_7=0 + +sff_cpld_reg.mode_10_7=config +sff_cpld_reg.src_10_7=cpld +sff_cpld_reg.frmt_10_7=bit +sff_cpld_reg.pola_10_7=positive +sff_cpld_reg.addr_10_7=0x00020077 +sff_cpld_reg.len_10_7=1 +sff_cpld_reg.bit_offset_10_7=1 + +sff_cpld_reg.mode_11_7=config +sff_cpld_reg.src_11_7=cpld +sff_cpld_reg.frmt_11_7=bit +sff_cpld_reg.pola_11_7=positive +sff_cpld_reg.addr_11_7=0x00020077 +sff_cpld_reg.len_11_7=1 +sff_cpld_reg.bit_offset_11_7=2 + +sff_cpld_reg.mode_12_7=config +sff_cpld_reg.src_12_7=cpld +sff_cpld_reg.frmt_12_7=bit +sff_cpld_reg.pola_12_7=positive +sff_cpld_reg.addr_12_7=0x00020077 +sff_cpld_reg.len_12_7=1 +sff_cpld_reg.bit_offset_12_7=3 + +sff_cpld_reg.mode_13_7=config +sff_cpld_reg.src_13_7=cpld +sff_cpld_reg.frmt_13_7=bit +sff_cpld_reg.pola_13_7=positive +sff_cpld_reg.addr_13_7=0x00020077 +sff_cpld_reg.len_13_7=1 +sff_cpld_reg.bit_offset_13_7=4 + +sff_cpld_reg.mode_14_7=config +sff_cpld_reg.src_14_7=cpld +sff_cpld_reg.frmt_14_7=bit +sff_cpld_reg.pola_14_7=positive +sff_cpld_reg.addr_14_7=0x00020077 +sff_cpld_reg.len_14_7=1 +sff_cpld_reg.bit_offset_14_7=5 + +sff_cpld_reg.mode_15_7=config +sff_cpld_reg.src_15_7=cpld +sff_cpld_reg.frmt_15_7=bit +sff_cpld_reg.pola_15_7=positive +sff_cpld_reg.addr_15_7=0x00020077 +sff_cpld_reg.len_15_7=1 +sff_cpld_reg.bit_offset_15_7=6 + +sff_cpld_reg.mode_16_7=config +sff_cpld_reg.src_16_7=cpld +sff_cpld_reg.frmt_16_7=bit +sff_cpld_reg.pola_16_7=positive +sff_cpld_reg.addr_16_7=0x00020077 +sff_cpld_reg.len_16_7=1 +sff_cpld_reg.bit_offset_16_7=7 + +sff_cpld_reg.mode_17_7=config +sff_cpld_reg.src_17_7=cpld +sff_cpld_reg.frmt_17_7=bit +sff_cpld_reg.pola_17_7=positive +sff_cpld_reg.addr_17_7=0x00020076 +sff_cpld_reg.len_17_7=1 +sff_cpld_reg.bit_offset_17_7=0 + +sff_cpld_reg.mode_18_7=config +sff_cpld_reg.src_18_7=cpld +sff_cpld_reg.frmt_18_7=bit +sff_cpld_reg.pola_18_7=positive +sff_cpld_reg.addr_18_7=0x00020076 +sff_cpld_reg.len_18_7=1 +sff_cpld_reg.bit_offset_18_7=1 + +sff_cpld_reg.mode_19_7=config +sff_cpld_reg.src_19_7=cpld +sff_cpld_reg.frmt_19_7=bit +sff_cpld_reg.pola_19_7=positive +sff_cpld_reg.addr_19_7=0x00020076 +sff_cpld_reg.len_19_7=1 +sff_cpld_reg.bit_offset_19_7=2 + +sff_cpld_reg.mode_20_7=config +sff_cpld_reg.src_20_7=cpld +sff_cpld_reg.frmt_20_7=bit +sff_cpld_reg.pola_20_7=positive +sff_cpld_reg.addr_20_7=0x00020076 +sff_cpld_reg.len_20_7=1 +sff_cpld_reg.bit_offset_20_7=3 + +sff_cpld_reg.mode_21_7=config +sff_cpld_reg.src_21_7=cpld +sff_cpld_reg.frmt_21_7=bit +sff_cpld_reg.pola_21_7=positive +sff_cpld_reg.addr_21_7=0x00020076 +sff_cpld_reg.len_21_7=1 +sff_cpld_reg.bit_offset_21_7=4 + +sff_cpld_reg.mode_22_7=config +sff_cpld_reg.src_22_7=cpld +sff_cpld_reg.frmt_22_7=bit +sff_cpld_reg.pola_22_7=positive +sff_cpld_reg.addr_22_7=0x00020076 +sff_cpld_reg.len_22_7=1 +sff_cpld_reg.bit_offset_22_7=5 + +sff_cpld_reg.mode_23_7=config +sff_cpld_reg.src_23_7=cpld +sff_cpld_reg.frmt_23_7=bit +sff_cpld_reg.pola_23_7=positive +sff_cpld_reg.addr_23_7=0x00020076 +sff_cpld_reg.len_23_7=1 +sff_cpld_reg.bit_offset_23_7=6 + +sff_cpld_reg.mode_24_7=config +sff_cpld_reg.src_24_7=cpld +sff_cpld_reg.frmt_24_7=bit +sff_cpld_reg.pola_24_7=positive +sff_cpld_reg.addr_24_7=0x00020076 +sff_cpld_reg.len_24_7=1 +sff_cpld_reg.bit_offset_24_7=7 + +sff_cpld_reg.mode_25_7=config +sff_cpld_reg.src_25_7=cpld +sff_cpld_reg.frmt_25_7=bit +sff_cpld_reg.pola_25_7=positive +sff_cpld_reg.addr_25_7=0x00030084 +sff_cpld_reg.len_25_7=1 +sff_cpld_reg.bit_offset_25_7=0 + +sff_cpld_reg.mode_26_7=config +sff_cpld_reg.src_26_7=cpld +sff_cpld_reg.frmt_26_7=bit +sff_cpld_reg.pola_26_7=positive +sff_cpld_reg.addr_26_7=0x00030084 +sff_cpld_reg.len_26_7=1 +sff_cpld_reg.bit_offset_26_7=1 + +sff_cpld_reg.mode_27_7=config +sff_cpld_reg.src_27_7=cpld +sff_cpld_reg.frmt_27_7=bit +sff_cpld_reg.pola_27_7=positive +sff_cpld_reg.addr_27_7=0x00030084 +sff_cpld_reg.len_27_7=1 +sff_cpld_reg.bit_offset_27_7=2 + +sff_cpld_reg.mode_28_7=config +sff_cpld_reg.src_28_7=cpld +sff_cpld_reg.frmt_28_7=bit +sff_cpld_reg.pola_28_7=positive +sff_cpld_reg.addr_28_7=0x00030084 +sff_cpld_reg.len_28_7=1 +sff_cpld_reg.bit_offset_28_7=3 + +sff_cpld_reg.mode_29_7=config +sff_cpld_reg.src_29_7=cpld +sff_cpld_reg.frmt_29_7=bit +sff_cpld_reg.pola_29_7=positive +sff_cpld_reg.addr_29_7=0x00030084 +sff_cpld_reg.len_29_7=1 +sff_cpld_reg.bit_offset_29_7=4 + +sff_cpld_reg.mode_30_7=config +sff_cpld_reg.src_30_7=cpld +sff_cpld_reg.frmt_30_7=bit +sff_cpld_reg.pola_30_7=positive +sff_cpld_reg.addr_30_7=0x00030084 +sff_cpld_reg.len_30_7=1 +sff_cpld_reg.bit_offset_30_7=5 + +sff_cpld_reg.mode_31_7=config +sff_cpld_reg.src_31_7=cpld +sff_cpld_reg.frmt_31_7=bit +sff_cpld_reg.pola_31_7=positive +sff_cpld_reg.addr_31_7=0x00030084 +sff_cpld_reg.len_31_7=1 +sff_cpld_reg.bit_offset_31_7=6 + +sff_cpld_reg.mode_32_7=config +sff_cpld_reg.src_32_7=cpld +sff_cpld_reg.frmt_32_7=bit +sff_cpld_reg.pola_32_7=positive +sff_cpld_reg.addr_32_7=0x00030084 +sff_cpld_reg.len_32_7=1 +sff_cpld_reg.bit_offset_32_7=7 + +sff_cpld_reg.mode_33_7=config +sff_cpld_reg.src_33_7=cpld +sff_cpld_reg.frmt_33_7=bit +sff_cpld_reg.pola_33_7=positive +sff_cpld_reg.addr_33_7=0x00030083 +sff_cpld_reg.len_33_7=1 +sff_cpld_reg.bit_offset_33_7=0 + +sff_cpld_reg.mode_34_7=config +sff_cpld_reg.src_34_7=cpld +sff_cpld_reg.frmt_34_7=bit +sff_cpld_reg.pola_34_7=positive +sff_cpld_reg.addr_34_7=0x00030083 +sff_cpld_reg.len_34_7=1 +sff_cpld_reg.bit_offset_34_7=1 + +sff_cpld_reg.mode_35_7=config +sff_cpld_reg.src_35_7=cpld +sff_cpld_reg.frmt_35_7=bit +sff_cpld_reg.pola_35_7=positive +sff_cpld_reg.addr_35_7=0x00030083 +sff_cpld_reg.len_35_7=1 +sff_cpld_reg.bit_offset_35_7=2 + +sff_cpld_reg.mode_36_7=config +sff_cpld_reg.src_36_7=cpld +sff_cpld_reg.frmt_36_7=bit +sff_cpld_reg.pola_36_7=positive +sff_cpld_reg.addr_36_7=0x00030083 +sff_cpld_reg.len_36_7=1 +sff_cpld_reg.bit_offset_36_7=3 + +sff_cpld_reg.mode_37_7=config +sff_cpld_reg.src_37_7=cpld +sff_cpld_reg.frmt_37_7=bit +sff_cpld_reg.pola_37_7=positive +sff_cpld_reg.addr_37_7=0x00030083 +sff_cpld_reg.len_37_7=1 +sff_cpld_reg.bit_offset_37_7=4 + +sff_cpld_reg.mode_38_7=config +sff_cpld_reg.src_38_7=cpld +sff_cpld_reg.frmt_38_7=bit +sff_cpld_reg.pola_38_7=positive +sff_cpld_reg.addr_38_7=0x00030083 +sff_cpld_reg.len_38_7=1 +sff_cpld_reg.bit_offset_38_7=5 + +sff_cpld_reg.mode_39_7=config +sff_cpld_reg.src_39_7=cpld +sff_cpld_reg.frmt_39_7=bit +sff_cpld_reg.pola_39_7=positive +sff_cpld_reg.addr_39_7=0x00030083 +sff_cpld_reg.len_39_7=1 +sff_cpld_reg.bit_offset_39_7=6 + +sff_cpld_reg.mode_40_7=config +sff_cpld_reg.src_40_7=cpld +sff_cpld_reg.frmt_40_7=bit +sff_cpld_reg.pola_40_7=positive +sff_cpld_reg.addr_40_7=0x00030083 +sff_cpld_reg.len_40_7=1 +sff_cpld_reg.bit_offset_40_7=7 + +sff_cpld_reg.mode_41_7=config +sff_cpld_reg.src_41_7=cpld +sff_cpld_reg.frmt_41_7=bit +sff_cpld_reg.pola_41_7=positive +sff_cpld_reg.addr_41_7=0x00030082 +sff_cpld_reg.len_41_7=1 +sff_cpld_reg.bit_offset_41_7=0 + +sff_cpld_reg.mode_42_7=config +sff_cpld_reg.src_42_7=cpld +sff_cpld_reg.frmt_42_7=bit +sff_cpld_reg.pola_42_7=positive +sff_cpld_reg.addr_42_7=0x00030082 +sff_cpld_reg.len_42_7=1 +sff_cpld_reg.bit_offset_42_7=1 + +sff_cpld_reg.mode_43_7=config +sff_cpld_reg.src_43_7=cpld +sff_cpld_reg.frmt_43_7=bit +sff_cpld_reg.pola_43_7=positive +sff_cpld_reg.addr_43_7=0x00030082 +sff_cpld_reg.len_43_7=1 +sff_cpld_reg.bit_offset_43_7=2 + +sff_cpld_reg.mode_44_7=config +sff_cpld_reg.src_44_7=cpld +sff_cpld_reg.frmt_44_7=bit +sff_cpld_reg.pola_44_7=positive +sff_cpld_reg.addr_44_7=0x00030082 +sff_cpld_reg.len_44_7=1 +sff_cpld_reg.bit_offset_44_7=3 + +sff_cpld_reg.mode_45_7=config +sff_cpld_reg.src_45_7=cpld +sff_cpld_reg.frmt_45_7=bit +sff_cpld_reg.pola_45_7=positive +sff_cpld_reg.addr_45_7=0x00030082 +sff_cpld_reg.len_45_7=1 +sff_cpld_reg.bit_offset_45_7=4 + +sff_cpld_reg.mode_46_7=config +sff_cpld_reg.src_46_7=cpld +sff_cpld_reg.frmt_46_7=bit +sff_cpld_reg.pola_46_7=positive +sff_cpld_reg.addr_46_7=0x00030082 +sff_cpld_reg.len_46_7=1 +sff_cpld_reg.bit_offset_46_7=5 + +sff_cpld_reg.mode_47_7=config +sff_cpld_reg.src_47_7=cpld +sff_cpld_reg.frmt_47_7=bit +sff_cpld_reg.pola_47_7=positive +sff_cpld_reg.addr_47_7=0x00030082 +sff_cpld_reg.len_47_7=1 +sff_cpld_reg.bit_offset_47_7=6 + +sff_cpld_reg.mode_48_7=config +sff_cpld_reg.src_48_7=cpld +sff_cpld_reg.frmt_48_7=bit +sff_cpld_reg.pola_48_7=positive +sff_cpld_reg.addr_48_7=0x00030082 +sff_cpld_reg.len_48_7=1 +sff_cpld_reg.bit_offset_48_7=7 + +sff_cpld_reg.mode_49_7=config +sff_cpld_reg.src_49_7=cpld +sff_cpld_reg.frmt_49_7=bit +sff_cpld_reg.pola_49_7=positive +sff_cpld_reg.addr_49_7=0x00030081 +sff_cpld_reg.len_49_7=1 +sff_cpld_reg.bit_offset_49_7=0 + +sff_cpld_reg.mode_50_7=config +sff_cpld_reg.src_50_7=cpld +sff_cpld_reg.frmt_50_7=bit +sff_cpld_reg.pola_50_7=positive +sff_cpld_reg.addr_50_7=0x00030081 +sff_cpld_reg.len_50_7=1 +sff_cpld_reg.bit_offset_50_7=1 + +sff_cpld_reg.mode_51_7=config +sff_cpld_reg.src_51_7=cpld +sff_cpld_reg.frmt_51_7=bit +sff_cpld_reg.pola_51_7=positive +sff_cpld_reg.addr_51_7=0x00030081 +sff_cpld_reg.len_51_7=1 +sff_cpld_reg.bit_offset_51_7=2 + +sff_cpld_reg.mode_52_7=config +sff_cpld_reg.src_52_7=cpld +sff_cpld_reg.frmt_52_7=bit +sff_cpld_reg.pola_52_7=positive +sff_cpld_reg.addr_52_7=0x00030081 +sff_cpld_reg.len_52_7=1 +sff_cpld_reg.bit_offset_52_7=3 + +sff_cpld_reg.mode_53_7=config +sff_cpld_reg.src_53_7=cpld +sff_cpld_reg.frmt_53_7=bit +sff_cpld_reg.pola_53_7=positive +sff_cpld_reg.addr_53_7=0x00030081 +sff_cpld_reg.len_53_7=1 +sff_cpld_reg.bit_offset_53_7=4 + +sff_cpld_reg.mode_54_7=config +sff_cpld_reg.src_54_7=cpld +sff_cpld_reg.frmt_54_7=bit +sff_cpld_reg.pola_54_7=positive +sff_cpld_reg.addr_54_7=0x00030081 +sff_cpld_reg.len_54_7=1 +sff_cpld_reg.bit_offset_54_7=5 + +sff_cpld_reg.mode_55_7=config +sff_cpld_reg.src_55_7=cpld +sff_cpld_reg.frmt_55_7=bit +sff_cpld_reg.pola_55_7=positive +sff_cpld_reg.addr_55_7=0x00030081 +sff_cpld_reg.len_55_7=1 +sff_cpld_reg.bit_offset_55_7=6 + +sff_cpld_reg.mode_56_7=config +sff_cpld_reg.src_56_7=cpld +sff_cpld_reg.frmt_56_7=bit +sff_cpld_reg.pola_56_7=positive +sff_cpld_reg.addr_56_7=0x00030081 +sff_cpld_reg.len_56_7=1 +sff_cpld_reg.bit_offset_56_7=7 + +sff_cpld_reg.mode_57_7=config +sff_cpld_reg.src_57_7=cpld +sff_cpld_reg.frmt_57_7=bit +sff_cpld_reg.pola_57_7=positive +sff_cpld_reg.addr_57_7=0x00030080 +sff_cpld_reg.len_57_7=1 +sff_cpld_reg.bit_offset_57_7=0 + +sff_cpld_reg.mode_58_7=config +sff_cpld_reg.src_58_7=cpld +sff_cpld_reg.frmt_58_7=bit +sff_cpld_reg.pola_58_7=positive +sff_cpld_reg.addr_58_7=0x00030080 +sff_cpld_reg.len_58_7=1 +sff_cpld_reg.bit_offset_58_7=1 + +sff_cpld_reg.mode_59_7=config +sff_cpld_reg.src_59_7=cpld +sff_cpld_reg.frmt_59_7=bit +sff_cpld_reg.pola_59_7=positive +sff_cpld_reg.addr_59_7=0x00030080 +sff_cpld_reg.len_59_7=1 +sff_cpld_reg.bit_offset_59_7=2 + +sff_cpld_reg.mode_60_7=config +sff_cpld_reg.src_60_7=cpld +sff_cpld_reg.frmt_60_7=bit +sff_cpld_reg.pola_60_7=positive +sff_cpld_reg.addr_60_7=0x00030080 +sff_cpld_reg.len_60_7=1 +sff_cpld_reg.bit_offset_60_7=3 + +sff_cpld_reg.mode_61_7=config +sff_cpld_reg.src_61_7=cpld +sff_cpld_reg.frmt_61_7=bit +sff_cpld_reg.pola_61_7=positive +sff_cpld_reg.addr_61_7=0x00030080 +sff_cpld_reg.len_61_7=1 +sff_cpld_reg.bit_offset_61_7=4 + +sff_cpld_reg.mode_62_7=config +sff_cpld_reg.src_62_7=cpld +sff_cpld_reg.frmt_62_7=bit +sff_cpld_reg.pola_62_7=positive +sff_cpld_reg.addr_62_7=0x00030080 +sff_cpld_reg.len_62_7=1 +sff_cpld_reg.bit_offset_62_7=5 + +sff_cpld_reg.mode_63_7=config +sff_cpld_reg.src_63_7=cpld +sff_cpld_reg.frmt_63_7=bit +sff_cpld_reg.pola_63_7=positive +sff_cpld_reg.addr_63_7=0x00030080 +sff_cpld_reg.len_63_7=1 +sff_cpld_reg.bit_offset_63_7=6 + +sff_cpld_reg.mode_64_7=config +sff_cpld_reg.src_64_7=cpld +sff_cpld_reg.frmt_64_7=bit +sff_cpld_reg.pola_64_7=positive +sff_cpld_reg.addr_64_7=0x00030080 +sff_cpld_reg.len_64_7=1 +sff_cpld_reg.bit_offset_64_7=7 + + +# 800G module module_present signal +sff_cpld_reg.mode_1_8=config +sff_cpld_reg.src_1_8=cpld +sff_cpld_reg.frmt_1_8=bit +sff_cpld_reg.pola_1_8=negative +sff_cpld_reg.addr_1_8=0x00020075 +sff_cpld_reg.len_1_8=1 +sff_cpld_reg.bit_offset_1_8=0 + +sff_cpld_reg.mode_2_8=config +sff_cpld_reg.src_2_8=cpld +sff_cpld_reg.frmt_2_8=bit +sff_cpld_reg.pola_2_8=negative +sff_cpld_reg.addr_2_8=0x00020075 +sff_cpld_reg.len_2_8=1 +sff_cpld_reg.bit_offset_2_8=1 + +sff_cpld_reg.mode_3_8=config +sff_cpld_reg.src_3_8=cpld +sff_cpld_reg.frmt_3_8=bit +sff_cpld_reg.pola_3_8=negative +sff_cpld_reg.addr_3_8=0x00020075 +sff_cpld_reg.len_3_8=1 +sff_cpld_reg.bit_offset_3_8=2 + +sff_cpld_reg.mode_4_8=config +sff_cpld_reg.src_4_8=cpld +sff_cpld_reg.frmt_4_8=bit +sff_cpld_reg.pola_4_8=negative +sff_cpld_reg.addr_4_8=0x00020075 +sff_cpld_reg.len_4_8=1 +sff_cpld_reg.bit_offset_4_8=3 + +sff_cpld_reg.mode_5_8=config +sff_cpld_reg.src_5_8=cpld +sff_cpld_reg.frmt_5_8=bit +sff_cpld_reg.pola_5_8=negative +sff_cpld_reg.addr_5_8=0x00020075 +sff_cpld_reg.len_5_8=1 +sff_cpld_reg.bit_offset_5_8=4 + +sff_cpld_reg.mode_6_8=config +sff_cpld_reg.src_6_8=cpld +sff_cpld_reg.frmt_6_8=bit +sff_cpld_reg.pola_6_8=negative +sff_cpld_reg.addr_6_8=0x00020075 +sff_cpld_reg.len_6_8=1 +sff_cpld_reg.bit_offset_6_8=5 + +sff_cpld_reg.mode_7_8=config +sff_cpld_reg.src_7_8=cpld +sff_cpld_reg.frmt_7_8=bit +sff_cpld_reg.pola_7_8=negative +sff_cpld_reg.addr_7_8=0x00020075 +sff_cpld_reg.len_7_8=1 +sff_cpld_reg.bit_offset_7_8=6 + +sff_cpld_reg.mode_8_8=config +sff_cpld_reg.src_8_8=cpld +sff_cpld_reg.frmt_8_8=bit +sff_cpld_reg.pola_8_8=negative +sff_cpld_reg.addr_8_8=0x00020075 +sff_cpld_reg.len_8_8=1 +sff_cpld_reg.bit_offset_8_8=7 + +sff_cpld_reg.mode_9_8=config +sff_cpld_reg.src_9_8=cpld +sff_cpld_reg.frmt_9_8=bit +sff_cpld_reg.pola_9_8=negative +sff_cpld_reg.addr_9_8=0x00020074 +sff_cpld_reg.len_9_8=1 +sff_cpld_reg.bit_offset_9_8=0 + +sff_cpld_reg.mode_10_8=config +sff_cpld_reg.src_10_8=cpld +sff_cpld_reg.frmt_10_8=bit +sff_cpld_reg.pola_10_8=negative +sff_cpld_reg.addr_10_8=0x00020074 +sff_cpld_reg.len_10_8=1 +sff_cpld_reg.bit_offset_10_8=1 + +sff_cpld_reg.mode_11_8=config +sff_cpld_reg.src_11_8=cpld +sff_cpld_reg.frmt_11_8=bit +sff_cpld_reg.pola_11_8=negative +sff_cpld_reg.addr_11_8=0x00020074 +sff_cpld_reg.len_11_8=1 +sff_cpld_reg.bit_offset_11_8=2 + +sff_cpld_reg.mode_12_8=config +sff_cpld_reg.src_12_8=cpld +sff_cpld_reg.frmt_12_8=bit +sff_cpld_reg.pola_12_8=negative +sff_cpld_reg.addr_12_8=0x00020074 +sff_cpld_reg.len_12_8=1 +sff_cpld_reg.bit_offset_12_8=3 + +sff_cpld_reg.mode_13_8=config +sff_cpld_reg.src_13_8=cpld +sff_cpld_reg.frmt_13_8=bit +sff_cpld_reg.pola_13_8=negative +sff_cpld_reg.addr_13_8=0x00020074 +sff_cpld_reg.len_13_8=1 +sff_cpld_reg.bit_offset_13_8=4 + +sff_cpld_reg.mode_14_8=config +sff_cpld_reg.src_14_8=cpld +sff_cpld_reg.frmt_14_8=bit +sff_cpld_reg.pola_14_8=negative +sff_cpld_reg.addr_14_8=0x00020074 +sff_cpld_reg.len_14_8=1 +sff_cpld_reg.bit_offset_14_8=5 + +sff_cpld_reg.mode_15_8=config +sff_cpld_reg.src_15_8=cpld +sff_cpld_reg.frmt_15_8=bit +sff_cpld_reg.pola_15_8=negative +sff_cpld_reg.addr_15_8=0x00020074 +sff_cpld_reg.len_15_8=1 +sff_cpld_reg.bit_offset_15_8=6 + +sff_cpld_reg.mode_16_8=config +sff_cpld_reg.src_16_8=cpld +sff_cpld_reg.frmt_16_8=bit +sff_cpld_reg.pola_16_8=negative +sff_cpld_reg.addr_16_8=0x00020074 +sff_cpld_reg.len_16_8=1 +sff_cpld_reg.bit_offset_16_8=7 + +sff_cpld_reg.mode_17_8=config +sff_cpld_reg.src_17_8=cpld +sff_cpld_reg.frmt_17_8=bit +sff_cpld_reg.pola_17_8=negative +sff_cpld_reg.addr_17_8=0x00020073 +sff_cpld_reg.len_17_8=1 +sff_cpld_reg.bit_offset_17_8=0 + +sff_cpld_reg.mode_18_8=config +sff_cpld_reg.src_18_8=cpld +sff_cpld_reg.frmt_18_8=bit +sff_cpld_reg.pola_18_8=negative +sff_cpld_reg.addr_18_8=0x00020073 +sff_cpld_reg.len_18_8=1 +sff_cpld_reg.bit_offset_18_8=1 + +sff_cpld_reg.mode_19_8=config +sff_cpld_reg.src_19_8=cpld +sff_cpld_reg.frmt_19_8=bit +sff_cpld_reg.pola_19_8=negative +sff_cpld_reg.addr_19_8=0x00020073 +sff_cpld_reg.len_19_8=1 +sff_cpld_reg.bit_offset_19_8=2 + +sff_cpld_reg.mode_20_8=config +sff_cpld_reg.src_20_8=cpld +sff_cpld_reg.frmt_20_8=bit +sff_cpld_reg.pola_20_8=negative +sff_cpld_reg.addr_20_8=0x00020073 +sff_cpld_reg.len_20_8=1 +sff_cpld_reg.bit_offset_20_8=3 + +sff_cpld_reg.mode_21_8=config +sff_cpld_reg.src_21_8=cpld +sff_cpld_reg.frmt_21_8=bit +sff_cpld_reg.pola_21_8=negative +sff_cpld_reg.addr_21_8=0x00020073 +sff_cpld_reg.len_21_8=1 +sff_cpld_reg.bit_offset_21_8=4 + +sff_cpld_reg.mode_22_8=config +sff_cpld_reg.src_22_8=cpld +sff_cpld_reg.frmt_22_8=bit +sff_cpld_reg.pola_22_8=negative +sff_cpld_reg.addr_22_8=0x00020073 +sff_cpld_reg.len_22_8=1 +sff_cpld_reg.bit_offset_22_8=5 + +sff_cpld_reg.mode_23_8=config +sff_cpld_reg.src_23_8=cpld +sff_cpld_reg.frmt_23_8=bit +sff_cpld_reg.pola_23_8=negative +sff_cpld_reg.addr_23_8=0x00020073 +sff_cpld_reg.len_23_8=1 +sff_cpld_reg.bit_offset_23_8=6 + +sff_cpld_reg.mode_24_8=config +sff_cpld_reg.src_24_8=cpld +sff_cpld_reg.frmt_24_8=bit +sff_cpld_reg.pola_24_8=negative +sff_cpld_reg.addr_24_8=0x00020073 +sff_cpld_reg.len_24_8=1 +sff_cpld_reg.bit_offset_24_8=7 + +sff_cpld_reg.mode_25_8=config +sff_cpld_reg.src_25_8=cpld +sff_cpld_reg.frmt_25_8=bit +sff_cpld_reg.pola_25_8=negative +sff_cpld_reg.addr_25_8=0x0003007a +sff_cpld_reg.len_25_8=1 +sff_cpld_reg.bit_offset_25_8=0 + +sff_cpld_reg.mode_26_8=config +sff_cpld_reg.src_26_8=cpld +sff_cpld_reg.frmt_26_8=bit +sff_cpld_reg.pola_26_8=negative +sff_cpld_reg.addr_26_8=0x0003007a +sff_cpld_reg.len_26_8=1 +sff_cpld_reg.bit_offset_26_8=1 + +sff_cpld_reg.mode_27_8=config +sff_cpld_reg.src_27_8=cpld +sff_cpld_reg.frmt_27_8=bit +sff_cpld_reg.pola_27_8=negative +sff_cpld_reg.addr_27_8=0x0003007a +sff_cpld_reg.len_27_8=1 +sff_cpld_reg.bit_offset_27_8=2 + +sff_cpld_reg.mode_28_8=config +sff_cpld_reg.src_28_8=cpld +sff_cpld_reg.frmt_28_8=bit +sff_cpld_reg.pola_28_8=negative +sff_cpld_reg.addr_28_8=0x0003007a +sff_cpld_reg.len_28_8=1 +sff_cpld_reg.bit_offset_28_8=3 + +sff_cpld_reg.mode_29_8=config +sff_cpld_reg.src_29_8=cpld +sff_cpld_reg.frmt_29_8=bit +sff_cpld_reg.pola_29_8=negative +sff_cpld_reg.addr_29_8=0x0003007a +sff_cpld_reg.len_29_8=1 +sff_cpld_reg.bit_offset_29_8=4 + +sff_cpld_reg.mode_30_8=config +sff_cpld_reg.src_30_8=cpld +sff_cpld_reg.frmt_30_8=bit +sff_cpld_reg.pola_30_8=negative +sff_cpld_reg.addr_30_8=0x0003007a +sff_cpld_reg.len_30_8=1 +sff_cpld_reg.bit_offset_30_8=5 + +sff_cpld_reg.mode_31_8=config +sff_cpld_reg.src_31_8=cpld +sff_cpld_reg.frmt_31_8=bit +sff_cpld_reg.pola_31_8=negative +sff_cpld_reg.addr_31_8=0x0003007a +sff_cpld_reg.len_31_8=1 +sff_cpld_reg.bit_offset_31_8=6 + +sff_cpld_reg.mode_32_8=config +sff_cpld_reg.src_32_8=cpld +sff_cpld_reg.frmt_32_8=bit +sff_cpld_reg.pola_32_8=negative +sff_cpld_reg.addr_32_8=0x0003007a +sff_cpld_reg.len_32_8=1 +sff_cpld_reg.bit_offset_32_8=7 + +sff_cpld_reg.mode_33_8=config +sff_cpld_reg.src_33_8=cpld +sff_cpld_reg.frmt_33_8=bit +sff_cpld_reg.pola_33_8=negative +sff_cpld_reg.addr_33_8=0x00030079 +sff_cpld_reg.len_33_8=1 +sff_cpld_reg.bit_offset_33_8=0 + +sff_cpld_reg.mode_34_8=config +sff_cpld_reg.src_34_8=cpld +sff_cpld_reg.frmt_34_8=bit +sff_cpld_reg.pola_34_8=negative +sff_cpld_reg.addr_34_8=0x00030079 +sff_cpld_reg.len_34_8=1 +sff_cpld_reg.bit_offset_34_8=1 + +sff_cpld_reg.mode_35_8=config +sff_cpld_reg.src_35_8=cpld +sff_cpld_reg.frmt_35_8=bit +sff_cpld_reg.pola_35_8=negative +sff_cpld_reg.addr_35_8=0x00030079 +sff_cpld_reg.len_35_8=1 +sff_cpld_reg.bit_offset_35_8=2 + +sff_cpld_reg.mode_36_8=config +sff_cpld_reg.src_36_8=cpld +sff_cpld_reg.frmt_36_8=bit +sff_cpld_reg.pola_36_8=negative +sff_cpld_reg.addr_36_8=0x00030079 +sff_cpld_reg.len_36_8=1 +sff_cpld_reg.bit_offset_36_8=3 + +sff_cpld_reg.mode_37_8=config +sff_cpld_reg.src_37_8=cpld +sff_cpld_reg.frmt_37_8=bit +sff_cpld_reg.pola_37_8=negative +sff_cpld_reg.addr_37_8=0x00030079 +sff_cpld_reg.len_37_8=1 +sff_cpld_reg.bit_offset_37_8=4 + +sff_cpld_reg.mode_38_8=config +sff_cpld_reg.src_38_8=cpld +sff_cpld_reg.frmt_38_8=bit +sff_cpld_reg.pola_38_8=negative +sff_cpld_reg.addr_38_8=0x00030079 +sff_cpld_reg.len_38_8=1 +sff_cpld_reg.bit_offset_38_8=5 + +sff_cpld_reg.mode_39_8=config +sff_cpld_reg.src_39_8=cpld +sff_cpld_reg.frmt_39_8=bit +sff_cpld_reg.pola_39_8=negative +sff_cpld_reg.addr_39_8=0x00030079 +sff_cpld_reg.len_39_8=1 +sff_cpld_reg.bit_offset_39_8=6 + +sff_cpld_reg.mode_40_8=config +sff_cpld_reg.src_40_8=cpld +sff_cpld_reg.frmt_40_8=bit +sff_cpld_reg.pola_40_8=negative +sff_cpld_reg.addr_40_8=0x00030079 +sff_cpld_reg.len_40_8=1 +sff_cpld_reg.bit_offset_40_8=7 + +sff_cpld_reg.mode_41_8=config +sff_cpld_reg.src_41_8=cpld +sff_cpld_reg.frmt_41_8=bit +sff_cpld_reg.pola_41_8=negative +sff_cpld_reg.addr_41_8=0x00030078 +sff_cpld_reg.len_41_8=1 +sff_cpld_reg.bit_offset_41_8=0 + +sff_cpld_reg.mode_42_8=config +sff_cpld_reg.src_42_8=cpld +sff_cpld_reg.frmt_42_8=bit +sff_cpld_reg.pola_42_8=negative +sff_cpld_reg.addr_42_8=0x00030078 +sff_cpld_reg.len_42_8=1 +sff_cpld_reg.bit_offset_42_8=1 + +sff_cpld_reg.mode_43_8=config +sff_cpld_reg.src_43_8=cpld +sff_cpld_reg.frmt_43_8=bit +sff_cpld_reg.pola_43_8=negative +sff_cpld_reg.addr_43_8=0x00030078 +sff_cpld_reg.len_43_8=1 +sff_cpld_reg.bit_offset_43_8=2 + +sff_cpld_reg.mode_44_8=config +sff_cpld_reg.src_44_8=cpld +sff_cpld_reg.frmt_44_8=bit +sff_cpld_reg.pola_44_8=negative +sff_cpld_reg.addr_44_8=0x00030078 +sff_cpld_reg.len_44_8=1 +sff_cpld_reg.bit_offset_44_8=3 + +sff_cpld_reg.mode_45_8=config +sff_cpld_reg.src_45_8=cpld +sff_cpld_reg.frmt_45_8=bit +sff_cpld_reg.pola_45_8=negative +sff_cpld_reg.addr_45_8=0x00030078 +sff_cpld_reg.len_45_8=1 +sff_cpld_reg.bit_offset_45_8=4 + +sff_cpld_reg.mode_46_8=config +sff_cpld_reg.src_46_8=cpld +sff_cpld_reg.frmt_46_8=bit +sff_cpld_reg.pola_46_8=negative +sff_cpld_reg.addr_46_8=0x00030078 +sff_cpld_reg.len_46_8=1 +sff_cpld_reg.bit_offset_46_8=5 + +sff_cpld_reg.mode_47_8=config +sff_cpld_reg.src_47_8=cpld +sff_cpld_reg.frmt_47_8=bit +sff_cpld_reg.pola_47_8=negative +sff_cpld_reg.addr_47_8=0x00030078 +sff_cpld_reg.len_47_8=1 +sff_cpld_reg.bit_offset_47_8=6 + +sff_cpld_reg.mode_48_8=config +sff_cpld_reg.src_48_8=cpld +sff_cpld_reg.frmt_48_8=bit +sff_cpld_reg.pola_48_8=negative +sff_cpld_reg.addr_48_8=0x00030078 +sff_cpld_reg.len_48_8=1 +sff_cpld_reg.bit_offset_48_8=7 + +sff_cpld_reg.mode_49_8=config +sff_cpld_reg.src_49_8=cpld +sff_cpld_reg.frmt_49_8=bit +sff_cpld_reg.pola_49_8=negative +sff_cpld_reg.addr_49_8=0x00030077 +sff_cpld_reg.len_49_8=1 +sff_cpld_reg.bit_offset_49_8=0 + +sff_cpld_reg.mode_50_8=config +sff_cpld_reg.src_50_8=cpld +sff_cpld_reg.frmt_50_8=bit +sff_cpld_reg.pola_50_8=negative +sff_cpld_reg.addr_50_8=0x00030077 +sff_cpld_reg.len_50_8=1 +sff_cpld_reg.bit_offset_50_8=1 + +sff_cpld_reg.mode_51_8=config +sff_cpld_reg.src_51_8=cpld +sff_cpld_reg.frmt_51_8=bit +sff_cpld_reg.pola_51_8=negative +sff_cpld_reg.addr_51_8=0x00030077 +sff_cpld_reg.len_51_8=1 +sff_cpld_reg.bit_offset_51_8=2 + +sff_cpld_reg.mode_52_8=config +sff_cpld_reg.src_52_8=cpld +sff_cpld_reg.frmt_52_8=bit +sff_cpld_reg.pola_52_8=negative +sff_cpld_reg.addr_52_8=0x00030077 +sff_cpld_reg.len_52_8=1 +sff_cpld_reg.bit_offset_52_8=3 + +sff_cpld_reg.mode_53_8=config +sff_cpld_reg.src_53_8=cpld +sff_cpld_reg.frmt_53_8=bit +sff_cpld_reg.pola_53_8=negative +sff_cpld_reg.addr_53_8=0x00030077 +sff_cpld_reg.len_53_8=1 +sff_cpld_reg.bit_offset_53_8=4 + +sff_cpld_reg.mode_54_8=config +sff_cpld_reg.src_54_8=cpld +sff_cpld_reg.frmt_54_8=bit +sff_cpld_reg.pola_54_8=negative +sff_cpld_reg.addr_54_8=0x00030077 +sff_cpld_reg.len_54_8=1 +sff_cpld_reg.bit_offset_54_8=5 + +sff_cpld_reg.mode_55_8=config +sff_cpld_reg.src_55_8=cpld +sff_cpld_reg.frmt_55_8=bit +sff_cpld_reg.pola_55_8=negative +sff_cpld_reg.addr_55_8=0x00030077 +sff_cpld_reg.len_55_8=1 +sff_cpld_reg.bit_offset_55_8=6 + +sff_cpld_reg.mode_56_8=config +sff_cpld_reg.src_56_8=cpld +sff_cpld_reg.frmt_56_8=bit +sff_cpld_reg.pola_56_8=negative +sff_cpld_reg.addr_56_8=0x00030077 +sff_cpld_reg.len_56_8=1 +sff_cpld_reg.bit_offset_56_8=7 + +sff_cpld_reg.mode_57_8=config +sff_cpld_reg.src_57_8=cpld +sff_cpld_reg.frmt_57_8=bit +sff_cpld_reg.pola_57_8=negative +sff_cpld_reg.addr_57_8=0x00030076 +sff_cpld_reg.len_57_8=1 +sff_cpld_reg.bit_offset_57_8=0 + +sff_cpld_reg.mode_58_8=config +sff_cpld_reg.src_58_8=cpld +sff_cpld_reg.frmt_58_8=bit +sff_cpld_reg.pola_58_8=negative +sff_cpld_reg.addr_58_8=0x00030076 +sff_cpld_reg.len_58_8=1 +sff_cpld_reg.bit_offset_58_8=1 + +sff_cpld_reg.mode_59_8=config +sff_cpld_reg.src_59_8=cpld +sff_cpld_reg.frmt_59_8=bit +sff_cpld_reg.pola_59_8=negative +sff_cpld_reg.addr_59_8=0x00030076 +sff_cpld_reg.len_59_8=1 +sff_cpld_reg.bit_offset_59_8=2 + +sff_cpld_reg.mode_60_8=config +sff_cpld_reg.src_60_8=cpld +sff_cpld_reg.frmt_60_8=bit +sff_cpld_reg.pola_60_8=negative +sff_cpld_reg.addr_60_8=0x00030076 +sff_cpld_reg.len_60_8=1 +sff_cpld_reg.bit_offset_60_8=3 + +sff_cpld_reg.mode_61_8=config +sff_cpld_reg.src_61_8=cpld +sff_cpld_reg.frmt_61_8=bit +sff_cpld_reg.pola_61_8=negative +sff_cpld_reg.addr_61_8=0x00030076 +sff_cpld_reg.len_61_8=1 +sff_cpld_reg.bit_offset_61_8=4 + +sff_cpld_reg.mode_62_8=config +sff_cpld_reg.src_62_8=cpld +sff_cpld_reg.frmt_62_8=bit +sff_cpld_reg.pola_62_8=negative +sff_cpld_reg.addr_62_8=0x00030076 +sff_cpld_reg.len_62_8=1 +sff_cpld_reg.bit_offset_62_8=5 + +sff_cpld_reg.mode_63_8=config +sff_cpld_reg.src_63_8=cpld +sff_cpld_reg.frmt_63_8=bit +sff_cpld_reg.pola_63_8=negative +sff_cpld_reg.addr_63_8=0x00030076 +sff_cpld_reg.len_63_8=1 +sff_cpld_reg.bit_offset_63_8=6 + +sff_cpld_reg.mode_64_8=config +sff_cpld_reg.src_64_8=cpld +sff_cpld_reg.frmt_64_8=bit +sff_cpld_reg.pola_64_8=negative +sff_cpld_reg.addr_64_8=0x00030076 +sff_cpld_reg.len_64_8=1 +sff_cpld_reg.bit_offset_64_8=7 + +sff_cpld_reg.mode_65_8=config +sff_cpld_reg.src_65_8=cpld +sff_cpld_reg.frmt_65_8=bit +sff_cpld_reg.pola_65_8=negative +sff_cpld_reg.addr_65_8=0x00050069 +sff_cpld_reg.len_65_8=1 +sff_cpld_reg.bit_offset_65_8=1 + +sff_cpld_reg.mode_66_8=config +sff_cpld_reg.src_66_8=cpld +sff_cpld_reg.frmt_66_8=bit +sff_cpld_reg.pola_66_8=negative +sff_cpld_reg.addr_66_8=0x00050069 +sff_cpld_reg.len_66_8=1 +sff_cpld_reg.bit_offset_66_8=0 + + +# 800G module power_on signal +sff_cpld_reg.mode_1_1=config +sff_cpld_reg.src_1_1=cpld +sff_cpld_reg.frmt_1_1=bit +sff_cpld_reg.addr_1_1=0x00040080 +sff_cpld_reg.len_1_1=1 +sff_cpld_reg.bit_offset_1_1=0 + +sff_cpld_reg.mode_2_1=config +sff_cpld_reg.src_2_1=cpld +sff_cpld_reg.frmt_2_1=bit +sff_cpld_reg.addr_2_1=0x00040080 +sff_cpld_reg.len_2_1=1 +sff_cpld_reg.bit_offset_2_1=0 + +sff_cpld_reg.mode_3_1=config +sff_cpld_reg.src_3_1=cpld +sff_cpld_reg.frmt_3_1=bit +sff_cpld_reg.addr_3_1=0x00040080 +sff_cpld_reg.len_3_1=1 +sff_cpld_reg.bit_offset_3_1=0 + +sff_cpld_reg.mode_4_1=config +sff_cpld_reg.src_4_1=cpld +sff_cpld_reg.frmt_4_1=bit +sff_cpld_reg.addr_4_1=0x00040080 +sff_cpld_reg.len_4_1=1 +sff_cpld_reg.bit_offset_4_1=0 + +sff_cpld_reg.mode_5_1=config +sff_cpld_reg.src_5_1=cpld +sff_cpld_reg.frmt_5_1=bit +sff_cpld_reg.addr_5_1=0x00040081 +sff_cpld_reg.len_5_1=1 +sff_cpld_reg.bit_offset_5_1=0 + +sff_cpld_reg.mode_6_1=config +sff_cpld_reg.src_6_1=cpld +sff_cpld_reg.frmt_6_1=bit +sff_cpld_reg.addr_6_1=0x00040081 +sff_cpld_reg.len_6_1=1 +sff_cpld_reg.bit_offset_6_1=0 + +sff_cpld_reg.mode_7_1=config +sff_cpld_reg.src_7_1=cpld +sff_cpld_reg.frmt_7_1=bit +sff_cpld_reg.addr_7_1=0x00040081 +sff_cpld_reg.len_7_1=1 +sff_cpld_reg.bit_offset_7_1=0 + +sff_cpld_reg.mode_8_1=config +sff_cpld_reg.src_8_1=cpld +sff_cpld_reg.frmt_8_1=bit +sff_cpld_reg.addr_8_1=0x00040081 +sff_cpld_reg.len_8_1=1 +sff_cpld_reg.bit_offset_8_1=0 + +sff_cpld_reg.mode_9_1=config +sff_cpld_reg.src_9_1=cpld +sff_cpld_reg.frmt_9_1=bit +sff_cpld_reg.addr_9_1=0x00040080 +sff_cpld_reg.len_9_1=1 +sff_cpld_reg.bit_offset_9_1=1 + +sff_cpld_reg.mode_10_1=config +sff_cpld_reg.src_10_1=cpld +sff_cpld_reg.frmt_10_1=bit +sff_cpld_reg.addr_10_1=0x00040080 +sff_cpld_reg.len_10_1=1 +sff_cpld_reg.bit_offset_10_1=1 + +sff_cpld_reg.mode_11_1=config +sff_cpld_reg.src_11_1=cpld +sff_cpld_reg.frmt_11_1=bit +sff_cpld_reg.addr_11_1=0x00040080 +sff_cpld_reg.len_11_1=1 +sff_cpld_reg.bit_offset_11_1=1 + +sff_cpld_reg.mode_12_1=config +sff_cpld_reg.src_12_1=cpld +sff_cpld_reg.frmt_12_1=bit +sff_cpld_reg.addr_12_1=0x00040080 +sff_cpld_reg.len_12_1=1 +sff_cpld_reg.bit_offset_12_1=1 + +sff_cpld_reg.mode_13_1=config +sff_cpld_reg.src_13_1=cpld +sff_cpld_reg.frmt_13_1=bit +sff_cpld_reg.addr_13_1=0x00040081 +sff_cpld_reg.len_13_1=1 +sff_cpld_reg.bit_offset_13_1=1 + +sff_cpld_reg.mode_14_1=config +sff_cpld_reg.src_14_1=cpld +sff_cpld_reg.frmt_14_1=bit +sff_cpld_reg.addr_14_1=0x00040081 +sff_cpld_reg.len_14_1=1 +sff_cpld_reg.bit_offset_14_1=1 + +sff_cpld_reg.mode_15_1=config +sff_cpld_reg.src_15_1=cpld +sff_cpld_reg.frmt_15_1=bit +sff_cpld_reg.addr_15_1=0x00040081 +sff_cpld_reg.len_15_1=1 +sff_cpld_reg.bit_offset_15_1=1 + +sff_cpld_reg.mode_16_1=config +sff_cpld_reg.src_16_1=cpld +sff_cpld_reg.frmt_16_1=bit +sff_cpld_reg.addr_16_1=0x00040081 +sff_cpld_reg.len_16_1=1 +sff_cpld_reg.bit_offset_16_1=1 + +sff_cpld_reg.mode_17_1=config +sff_cpld_reg.src_17_1=cpld +sff_cpld_reg.frmt_17_1=bit +sff_cpld_reg.addr_17_1=0x00040080 +sff_cpld_reg.len_17_1=1 +sff_cpld_reg.bit_offset_17_1=2 + +sff_cpld_reg.mode_18_1=config +sff_cpld_reg.src_18_1=cpld +sff_cpld_reg.frmt_18_1=bit +sff_cpld_reg.addr_18_1=0x00040080 +sff_cpld_reg.len_18_1=1 +sff_cpld_reg.bit_offset_18_1=2 + +sff_cpld_reg.mode_19_1=config +sff_cpld_reg.src_19_1=cpld +sff_cpld_reg.frmt_19_1=bit +sff_cpld_reg.addr_19_1=0x00040080 +sff_cpld_reg.len_19_1=1 +sff_cpld_reg.bit_offset_19_1=2 + +sff_cpld_reg.mode_20_1=config +sff_cpld_reg.src_20_1=cpld +sff_cpld_reg.frmt_20_1=bit +sff_cpld_reg.addr_20_1=0x00040080 +sff_cpld_reg.len_20_1=1 +sff_cpld_reg.bit_offset_20_1=2 + +sff_cpld_reg.mode_21_1=config +sff_cpld_reg.src_21_1=cpld +sff_cpld_reg.frmt_21_1=bit +sff_cpld_reg.addr_21_1=0x00040081 +sff_cpld_reg.len_21_1=1 +sff_cpld_reg.bit_offset_21_1=2 + +sff_cpld_reg.mode_22_1=config +sff_cpld_reg.src_22_1=cpld +sff_cpld_reg.frmt_22_1=bit +sff_cpld_reg.addr_22_1=0x00040081 +sff_cpld_reg.len_22_1=1 +sff_cpld_reg.bit_offset_22_1=2 + +sff_cpld_reg.mode_23_1=config +sff_cpld_reg.src_23_1=cpld +sff_cpld_reg.frmt_23_1=bit +sff_cpld_reg.addr_23_1=0x00040081 +sff_cpld_reg.len_23_1=1 +sff_cpld_reg.bit_offset_23_1=2 + +sff_cpld_reg.mode_24_1=config +sff_cpld_reg.src_24_1=cpld +sff_cpld_reg.frmt_24_1=bit +sff_cpld_reg.addr_24_1=0x00040081 +sff_cpld_reg.len_24_1=1 +sff_cpld_reg.bit_offset_24_1=2 + +sff_cpld_reg.mode_25_1=config +sff_cpld_reg.src_25_1=cpld +sff_cpld_reg.frmt_25_1=bit +sff_cpld_reg.addr_25_1=0x00040080 +sff_cpld_reg.len_25_1=1 +sff_cpld_reg.bit_offset_25_1=3 + +sff_cpld_reg.mode_26_1=config +sff_cpld_reg.src_26_1=cpld +sff_cpld_reg.frmt_26_1=bit +sff_cpld_reg.addr_26_1=0x00040080 +sff_cpld_reg.len_26_1=1 +sff_cpld_reg.bit_offset_26_1=3 + +sff_cpld_reg.mode_27_1=config +sff_cpld_reg.src_27_1=cpld +sff_cpld_reg.frmt_27_1=bit +sff_cpld_reg.addr_27_1=0x00040080 +sff_cpld_reg.len_27_1=1 +sff_cpld_reg.bit_offset_27_1=3 + +sff_cpld_reg.mode_28_1=config +sff_cpld_reg.src_28_1=cpld +sff_cpld_reg.frmt_28_1=bit +sff_cpld_reg.addr_28_1=0x00040080 +sff_cpld_reg.len_28_1=1 +sff_cpld_reg.bit_offset_28_1=3 + +sff_cpld_reg.mode_29_1=config +sff_cpld_reg.src_29_1=cpld +sff_cpld_reg.frmt_29_1=bit +sff_cpld_reg.addr_29_1=0x00040081 +sff_cpld_reg.len_29_1=1 +sff_cpld_reg.bit_offset_29_1=3 + +sff_cpld_reg.mode_30_1=config +sff_cpld_reg.src_30_1=cpld +sff_cpld_reg.frmt_30_1=bit +sff_cpld_reg.addr_30_1=0x00040081 +sff_cpld_reg.len_30_1=1 +sff_cpld_reg.bit_offset_30_1=3 + +sff_cpld_reg.mode_31_1=config +sff_cpld_reg.src_31_1=cpld +sff_cpld_reg.frmt_31_1=bit +sff_cpld_reg.addr_31_1=0x00040081 +sff_cpld_reg.len_31_1=1 +sff_cpld_reg.bit_offset_31_1=3 + +sff_cpld_reg.mode_32_1=config +sff_cpld_reg.src_32_1=cpld +sff_cpld_reg.frmt_32_1=bit +sff_cpld_reg.addr_32_1=0x00040081 +sff_cpld_reg.len_32_1=1 +sff_cpld_reg.bit_offset_32_1=3 + +sff_cpld_reg.mode_33_1=config +sff_cpld_reg.src_33_1=cpld +sff_cpld_reg.frmt_33_1=bit +sff_cpld_reg.addr_33_1=0x00040080 +sff_cpld_reg.len_33_1=1 +sff_cpld_reg.bit_offset_33_1=4 + +sff_cpld_reg.mode_34_1=config +sff_cpld_reg.src_34_1=cpld +sff_cpld_reg.frmt_34_1=bit +sff_cpld_reg.addr_34_1=0x00040080 +sff_cpld_reg.len_34_1=1 +sff_cpld_reg.bit_offset_34_1=4 + +sff_cpld_reg.mode_35_1=config +sff_cpld_reg.src_35_1=cpld +sff_cpld_reg.frmt_35_1=bit +sff_cpld_reg.addr_35_1=0x00040080 +sff_cpld_reg.len_35_1=1 +sff_cpld_reg.bit_offset_35_1=4 + +sff_cpld_reg.mode_36_1=config +sff_cpld_reg.src_36_1=cpld +sff_cpld_reg.frmt_36_1=bit +sff_cpld_reg.addr_36_1=0x00040080 +sff_cpld_reg.len_36_1=1 +sff_cpld_reg.bit_offset_36_1=4 + +sff_cpld_reg.mode_37_1=config +sff_cpld_reg.src_37_1=cpld +sff_cpld_reg.frmt_37_1=bit +sff_cpld_reg.addr_37_1=0x00040081 +sff_cpld_reg.len_37_1=1 +sff_cpld_reg.bit_offset_37_1=4 + +sff_cpld_reg.mode_38_1=config +sff_cpld_reg.src_38_1=cpld +sff_cpld_reg.frmt_38_1=bit +sff_cpld_reg.addr_38_1=0x00040081 +sff_cpld_reg.len_38_1=1 +sff_cpld_reg.bit_offset_38_1=4 + +sff_cpld_reg.mode_39_1=config +sff_cpld_reg.src_39_1=cpld +sff_cpld_reg.frmt_39_1=bit +sff_cpld_reg.addr_39_1=0x00040081 +sff_cpld_reg.len_39_1=1 +sff_cpld_reg.bit_offset_39_1=4 + +sff_cpld_reg.mode_40_1=config +sff_cpld_reg.src_40_1=cpld +sff_cpld_reg.frmt_40_1=bit +sff_cpld_reg.addr_40_1=0x00040081 +sff_cpld_reg.len_40_1=1 +sff_cpld_reg.bit_offset_40_1=4 + +sff_cpld_reg.mode_41_1=config +sff_cpld_reg.src_41_1=cpld +sff_cpld_reg.frmt_41_1=bit +sff_cpld_reg.addr_41_1=0x00040080 +sff_cpld_reg.len_41_1=1 +sff_cpld_reg.bit_offset_41_1=5 + +sff_cpld_reg.mode_42_1=config +sff_cpld_reg.src_42_1=cpld +sff_cpld_reg.frmt_42_1=bit +sff_cpld_reg.addr_42_1=0x00040080 +sff_cpld_reg.len_42_1=1 +sff_cpld_reg.bit_offset_42_1=5 + +sff_cpld_reg.mode_43_1=config +sff_cpld_reg.src_43_1=cpld +sff_cpld_reg.frmt_43_1=bit +sff_cpld_reg.addr_43_1=0x00040080 +sff_cpld_reg.len_43_1=1 +sff_cpld_reg.bit_offset_43_1=5 + +sff_cpld_reg.mode_44_1=config +sff_cpld_reg.src_44_1=cpld +sff_cpld_reg.frmt_44_1=bit +sff_cpld_reg.addr_44_1=0x00040080 +sff_cpld_reg.len_44_1=1 +sff_cpld_reg.bit_offset_44_1=5 + +sff_cpld_reg.mode_45_1=config +sff_cpld_reg.src_45_1=cpld +sff_cpld_reg.frmt_45_1=bit +sff_cpld_reg.addr_45_1=0x00040081 +sff_cpld_reg.len_45_1=1 +sff_cpld_reg.bit_offset_45_1=5 + +sff_cpld_reg.mode_46_1=config +sff_cpld_reg.src_46_1=cpld +sff_cpld_reg.frmt_46_1=bit +sff_cpld_reg.addr_46_1=0x00040081 +sff_cpld_reg.len_46_1=1 +sff_cpld_reg.bit_offset_46_1=5 + +sff_cpld_reg.mode_47_1=config +sff_cpld_reg.src_47_1=cpld +sff_cpld_reg.frmt_47_1=bit +sff_cpld_reg.addr_47_1=0x00040081 +sff_cpld_reg.len_47_1=1 +sff_cpld_reg.bit_offset_47_1=5 + +sff_cpld_reg.mode_48_1=config +sff_cpld_reg.src_48_1=cpld +sff_cpld_reg.frmt_48_1=bit +sff_cpld_reg.addr_48_1=0x00040081 +sff_cpld_reg.len_48_1=1 +sff_cpld_reg.bit_offset_48_1=5 + +sff_cpld_reg.mode_49_1=config +sff_cpld_reg.src_49_1=cpld +sff_cpld_reg.frmt_49_1=bit +sff_cpld_reg.addr_49_1=0x00040080 +sff_cpld_reg.len_49_1=1 +sff_cpld_reg.bit_offset_49_1=6 + +sff_cpld_reg.mode_50_1=config +sff_cpld_reg.src_50_1=cpld +sff_cpld_reg.frmt_50_1=bit +sff_cpld_reg.addr_50_1=0x00040080 +sff_cpld_reg.len_50_1=1 +sff_cpld_reg.bit_offset_50_1=6 + +sff_cpld_reg.mode_51_1=config +sff_cpld_reg.src_51_1=cpld +sff_cpld_reg.frmt_51_1=bit +sff_cpld_reg.addr_51_1=0x00040080 +sff_cpld_reg.len_51_1=1 +sff_cpld_reg.bit_offset_51_1=6 + +sff_cpld_reg.mode_52_1=config +sff_cpld_reg.src_52_1=cpld +sff_cpld_reg.frmt_52_1=bit +sff_cpld_reg.addr_52_1=0x00040080 +sff_cpld_reg.len_52_1=1 +sff_cpld_reg.bit_offset_52_1=6 + +sff_cpld_reg.mode_53_1=config +sff_cpld_reg.src_53_1=cpld +sff_cpld_reg.frmt_53_1=bit +sff_cpld_reg.addr_53_1=0x00040081 +sff_cpld_reg.len_53_1=1 +sff_cpld_reg.bit_offset_53_1=6 + +sff_cpld_reg.mode_54_1=config +sff_cpld_reg.src_54_1=cpld +sff_cpld_reg.frmt_54_1=bit +sff_cpld_reg.addr_54_1=0x00040081 +sff_cpld_reg.len_54_1=1 +sff_cpld_reg.bit_offset_54_1=6 + +sff_cpld_reg.mode_55_1=config +sff_cpld_reg.src_55_1=cpld +sff_cpld_reg.frmt_55_1=bit +sff_cpld_reg.addr_55_1=0x00040081 +sff_cpld_reg.len_55_1=1 +sff_cpld_reg.bit_offset_55_1=6 + +sff_cpld_reg.mode_56_1=config +sff_cpld_reg.src_56_1=cpld +sff_cpld_reg.frmt_56_1=bit +sff_cpld_reg.addr_56_1=0x00040081 +sff_cpld_reg.len_56_1=1 +sff_cpld_reg.bit_offset_56_1=6 + +sff_cpld_reg.mode_57_1=config +sff_cpld_reg.src_57_1=cpld +sff_cpld_reg.frmt_57_1=bit +sff_cpld_reg.addr_57_1=0x00040080 +sff_cpld_reg.len_57_1=1 +sff_cpld_reg.bit_offset_57_1=7 + +sff_cpld_reg.mode_58_1=config +sff_cpld_reg.src_58_1=cpld +sff_cpld_reg.frmt_58_1=bit +sff_cpld_reg.addr_58_1=0x00040080 +sff_cpld_reg.len_58_1=1 +sff_cpld_reg.bit_offset_58_1=7 + +sff_cpld_reg.mode_59_1=config +sff_cpld_reg.src_59_1=cpld +sff_cpld_reg.frmt_59_1=bit +sff_cpld_reg.addr_59_1=0x00040080 +sff_cpld_reg.len_59_1=1 +sff_cpld_reg.bit_offset_59_1=7 + +sff_cpld_reg.mode_60_1=config +sff_cpld_reg.src_60_1=cpld +sff_cpld_reg.frmt_60_1=bit +sff_cpld_reg.addr_60_1=0x00040080 +sff_cpld_reg.len_60_1=1 +sff_cpld_reg.bit_offset_60_1=7 + +sff_cpld_reg.mode_61_1=config +sff_cpld_reg.src_61_1=cpld +sff_cpld_reg.frmt_61_1=bit +sff_cpld_reg.addr_61_1=0x00040081 +sff_cpld_reg.len_61_1=1 +sff_cpld_reg.bit_offset_61_1=7 + +sff_cpld_reg.mode_62_1=config +sff_cpld_reg.src_62_1=cpld +sff_cpld_reg.frmt_62_1=bit +sff_cpld_reg.addr_62_1=0x00040081 +sff_cpld_reg.len_62_1=1 +sff_cpld_reg.bit_offset_62_1=7 + +sff_cpld_reg.mode_63_1=config +sff_cpld_reg.src_63_1=cpld +sff_cpld_reg.frmt_63_1=bit +sff_cpld_reg.addr_63_1=0x00040081 +sff_cpld_reg.len_63_1=1 +sff_cpld_reg.bit_offset_63_1=7 + +sff_cpld_reg.mode_64_1=config +sff_cpld_reg.src_64_1=cpld +sff_cpld_reg.frmt_64_1=bit +sff_cpld_reg.addr_64_1=0x00040081 +sff_cpld_reg.len_64_1=1 +sff_cpld_reg.bit_offset_64_1=7 + + +# interrupt +sff_cpld_reg.mode_1_9=config +sff_cpld_reg.src_1_9=cpld +sff_cpld_reg.frmt_1_9=bit +sff_cpld_reg.pola_1_9=negative +sff_cpld_reg.addr_1_9=0x00020062 +sff_cpld_reg.len_1_9=1 +sff_cpld_reg.bit_offset_1_9=0 + +sff_cpld_reg.mode_2_9=config +sff_cpld_reg.src_2_9=cpld +sff_cpld_reg.frmt_2_9=bit +sff_cpld_reg.pola_2_9=negative +sff_cpld_reg.addr_2_9=0x00020062 +sff_cpld_reg.len_2_9=1 +sff_cpld_reg.bit_offset_2_9=1 + +sff_cpld_reg.mode_3_9=config +sff_cpld_reg.src_3_9=cpld +sff_cpld_reg.frmt_3_9=bit +sff_cpld_reg.pola_3_9=negative +sff_cpld_reg.addr_3_9=0x00020062 +sff_cpld_reg.len_3_9=1 +sff_cpld_reg.bit_offset_3_9=2 + +sff_cpld_reg.mode_4_9=config +sff_cpld_reg.src_4_9=cpld +sff_cpld_reg.frmt_4_9=bit +sff_cpld_reg.pola_4_9=negative +sff_cpld_reg.addr_4_9=0x00020062 +sff_cpld_reg.len_4_9=1 +sff_cpld_reg.bit_offset_4_9=3 + +sff_cpld_reg.mode_5_9=config +sff_cpld_reg.src_5_9=cpld +sff_cpld_reg.frmt_5_9=bit +sff_cpld_reg.pola_5_9=negative +sff_cpld_reg.addr_5_9=0x00020062 +sff_cpld_reg.len_5_9=1 +sff_cpld_reg.bit_offset_5_9=4 + +sff_cpld_reg.mode_6_9=config +sff_cpld_reg.src_6_9=cpld +sff_cpld_reg.frmt_6_9=bit +sff_cpld_reg.pola_6_9=negative +sff_cpld_reg.addr_6_9=0x00020062 +sff_cpld_reg.len_6_9=1 +sff_cpld_reg.bit_offset_6_9=5 + +sff_cpld_reg.mode_7_9=config +sff_cpld_reg.src_7_9=cpld +sff_cpld_reg.frmt_7_9=bit +sff_cpld_reg.pola_7_9=negative +sff_cpld_reg.addr_7_9=0x00020062 +sff_cpld_reg.len_7_9=1 +sff_cpld_reg.bit_offset_7_9=6 + +sff_cpld_reg.mode_8_9=config +sff_cpld_reg.src_8_9=cpld +sff_cpld_reg.frmt_8_9=bit +sff_cpld_reg.pola_8_9=negative +sff_cpld_reg.addr_8_9=0x00020062 +sff_cpld_reg.len_8_9=1 +sff_cpld_reg.bit_offset_8_9=7 + +sff_cpld_reg.mode_9_9=config +sff_cpld_reg.src_9_9=cpld +sff_cpld_reg.frmt_9_9=bit +sff_cpld_reg.pola_9_9=negative +sff_cpld_reg.addr_9_9=0x00020061 +sff_cpld_reg.len_9_9=1 +sff_cpld_reg.bit_offset_9_9=0 + +sff_cpld_reg.mode_10_9=config +sff_cpld_reg.src_10_9=cpld +sff_cpld_reg.frmt_10_9=bit +sff_cpld_reg.pola_10_9=negative +sff_cpld_reg.addr_10_9=0x00020061 +sff_cpld_reg.len_10_9=1 +sff_cpld_reg.bit_offset_10_9=1 + +sff_cpld_reg.mode_11_9=config +sff_cpld_reg.src_11_9=cpld +sff_cpld_reg.frmt_11_9=bit +sff_cpld_reg.pola_11_9=negative +sff_cpld_reg.addr_11_9=0x00020061 +sff_cpld_reg.len_11_9=1 +sff_cpld_reg.bit_offset_11_9=2 + +sff_cpld_reg.mode_12_9=config +sff_cpld_reg.src_12_9=cpld +sff_cpld_reg.frmt_12_9=bit +sff_cpld_reg.pola_12_9=negative +sff_cpld_reg.addr_12_9=0x00020061 +sff_cpld_reg.len_12_9=1 +sff_cpld_reg.bit_offset_12_9=3 + +sff_cpld_reg.mode_13_9=config +sff_cpld_reg.src_13_9=cpld +sff_cpld_reg.frmt_13_9=bit +sff_cpld_reg.pola_13_9=negative +sff_cpld_reg.addr_13_9=0x00020061 +sff_cpld_reg.len_13_9=1 +sff_cpld_reg.bit_offset_13_9=4 + +sff_cpld_reg.mode_14_9=config +sff_cpld_reg.src_14_9=cpld +sff_cpld_reg.frmt_14_9=bit +sff_cpld_reg.pola_14_9=negative +sff_cpld_reg.addr_14_9=0x00020061 +sff_cpld_reg.len_14_9=1 +sff_cpld_reg.bit_offset_14_9=5 + +sff_cpld_reg.mode_15_9=config +sff_cpld_reg.src_15_9=cpld +sff_cpld_reg.frmt_15_9=bit +sff_cpld_reg.pola_15_9=negative +sff_cpld_reg.addr_15_9=0x00020061 +sff_cpld_reg.len_15_9=1 +sff_cpld_reg.bit_offset_15_9=6 + +sff_cpld_reg.mode_16_9=config +sff_cpld_reg.src_16_9=cpld +sff_cpld_reg.frmt_16_9=bit +sff_cpld_reg.pola_16_9=negative +sff_cpld_reg.addr_16_9=0x00020061 +sff_cpld_reg.len_16_9=1 +sff_cpld_reg.bit_offset_16_9=7 + +sff_cpld_reg.mode_17_9=config +sff_cpld_reg.src_17_9=cpld +sff_cpld_reg.frmt_17_9=bit +sff_cpld_reg.pola_17_9=negative +sff_cpld_reg.addr_17_9=0x00020060 +sff_cpld_reg.len_17_9=1 +sff_cpld_reg.bit_offset_17_9=0 + +sff_cpld_reg.mode_18_9=config +sff_cpld_reg.src_18_9=cpld +sff_cpld_reg.frmt_18_9=bit +sff_cpld_reg.pola_18_9=negative +sff_cpld_reg.addr_18_9=0x00020060 +sff_cpld_reg.len_18_9=1 +sff_cpld_reg.bit_offset_18_9=1 + +sff_cpld_reg.mode_19_9=config +sff_cpld_reg.src_19_9=cpld +sff_cpld_reg.frmt_19_9=bit +sff_cpld_reg.pola_19_9=negative +sff_cpld_reg.addr_19_9=0x00020060 +sff_cpld_reg.len_19_9=1 +sff_cpld_reg.bit_offset_19_9=2 + +sff_cpld_reg.mode_20_9=config +sff_cpld_reg.src_20_9=cpld +sff_cpld_reg.frmt_20_9=bit +sff_cpld_reg.pola_20_9=negative +sff_cpld_reg.addr_20_9=0x00020060 +sff_cpld_reg.len_20_9=1 +sff_cpld_reg.bit_offset_20_9=3 + +sff_cpld_reg.mode_21_9=config +sff_cpld_reg.src_21_9=cpld +sff_cpld_reg.frmt_21_9=bit +sff_cpld_reg.pola_21_9=negative +sff_cpld_reg.addr_21_9=0x00020060 +sff_cpld_reg.len_21_9=1 +sff_cpld_reg.bit_offset_21_9=4 + +sff_cpld_reg.mode_22_9=config +sff_cpld_reg.src_22_9=cpld +sff_cpld_reg.frmt_22_9=bit +sff_cpld_reg.pola_22_9=negative +sff_cpld_reg.addr_22_9=0x00020060 +sff_cpld_reg.len_22_9=1 +sff_cpld_reg.bit_offset_22_9=5 + +sff_cpld_reg.mode_23_9=config +sff_cpld_reg.src_23_9=cpld +sff_cpld_reg.frmt_23_9=bit +sff_cpld_reg.pola_23_9=negative +sff_cpld_reg.addr_23_9=0x00020060 +sff_cpld_reg.len_23_9=1 +sff_cpld_reg.bit_offset_23_9=6 + +sff_cpld_reg.mode_24_9=config +sff_cpld_reg.src_24_9=cpld +sff_cpld_reg.frmt_24_9=bit +sff_cpld_reg.pola_24_9=negative +sff_cpld_reg.addr_24_9=0x00020060 +sff_cpld_reg.len_24_9=1 +sff_cpld_reg.bit_offset_24_9=7 + +sff_cpld_reg.mode_25_9=config +sff_cpld_reg.src_25_9=cpld +sff_cpld_reg.frmt_25_9=bit +sff_cpld_reg.pola_25_9=negative +sff_cpld_reg.addr_25_9=0x00030064 +sff_cpld_reg.len_25_9=1 +sff_cpld_reg.bit_offset_25_9=0 + +sff_cpld_reg.mode_26_9=config +sff_cpld_reg.src_26_9=cpld +sff_cpld_reg.frmt_26_9=bit +sff_cpld_reg.pola_26_9=negative +sff_cpld_reg.addr_26_9=0x00030064 +sff_cpld_reg.len_26_9=1 +sff_cpld_reg.bit_offset_26_9=1 + +sff_cpld_reg.mode_27_9=config +sff_cpld_reg.src_27_9=cpld +sff_cpld_reg.frmt_27_9=bit +sff_cpld_reg.pola_27_9=negative +sff_cpld_reg.addr_27_9=0x00030064 +sff_cpld_reg.len_27_9=1 +sff_cpld_reg.bit_offset_27_9=2 + +sff_cpld_reg.mode_28_9=config +sff_cpld_reg.src_28_9=cpld +sff_cpld_reg.frmt_28_9=bit +sff_cpld_reg.pola_28_9=negative +sff_cpld_reg.addr_28_9=0x00030064 +sff_cpld_reg.len_28_9=1 +sff_cpld_reg.bit_offset_28_9=3 + +sff_cpld_reg.mode_29_9=config +sff_cpld_reg.src_29_9=cpld +sff_cpld_reg.frmt_29_9=bit +sff_cpld_reg.pola_29_9=negative +sff_cpld_reg.addr_29_9=0x00030064 +sff_cpld_reg.len_29_9=1 +sff_cpld_reg.bit_offset_29_9=4 + +sff_cpld_reg.mode_30_9=config +sff_cpld_reg.src_30_9=cpld +sff_cpld_reg.frmt_30_9=bit +sff_cpld_reg.pola_30_9=negative +sff_cpld_reg.addr_30_9=0x00030064 +sff_cpld_reg.len_30_9=1 +sff_cpld_reg.bit_offset_30_9=5 + +sff_cpld_reg.mode_31_9=config +sff_cpld_reg.src_31_9=cpld +sff_cpld_reg.frmt_31_9=bit +sff_cpld_reg.pola_31_9=negative +sff_cpld_reg.addr_31_9=0x00030064 +sff_cpld_reg.len_31_9=1 +sff_cpld_reg.bit_offset_31_9=6 + +sff_cpld_reg.mode_32_9=config +sff_cpld_reg.src_32_9=cpld +sff_cpld_reg.frmt_32_9=bit +sff_cpld_reg.pola_32_9=negative +sff_cpld_reg.addr_32_9=0x00030064 +sff_cpld_reg.len_32_9=1 +sff_cpld_reg.bit_offset_32_9=7 + +sff_cpld_reg.mode_33_9=config +sff_cpld_reg.src_33_9=cpld +sff_cpld_reg.frmt_33_9=bit +sff_cpld_reg.pola_33_9=negative +sff_cpld_reg.addr_33_9=0x00030063 +sff_cpld_reg.len_33_9=1 +sff_cpld_reg.bit_offset_33_9=0 + +sff_cpld_reg.mode_34_9=config +sff_cpld_reg.src_34_9=cpld +sff_cpld_reg.frmt_34_9=bit +sff_cpld_reg.pola_34_9=negative +sff_cpld_reg.addr_34_9=0x00030063 +sff_cpld_reg.len_34_9=1 +sff_cpld_reg.bit_offset_34_9=1 + +sff_cpld_reg.mode_35_9=config +sff_cpld_reg.src_35_9=cpld +sff_cpld_reg.frmt_35_9=bit +sff_cpld_reg.pola_35_9=negative +sff_cpld_reg.addr_35_9=0x00030063 +sff_cpld_reg.len_35_9=1 +sff_cpld_reg.bit_offset_35_9=2 + +sff_cpld_reg.mode_36_9=config +sff_cpld_reg.src_36_9=cpld +sff_cpld_reg.frmt_36_9=bit +sff_cpld_reg.pola_36_9=negative +sff_cpld_reg.addr_36_9=0x00030063 +sff_cpld_reg.len_36_9=1 +sff_cpld_reg.bit_offset_36_9=3 + +sff_cpld_reg.mode_37_9=config +sff_cpld_reg.src_37_9=cpld +sff_cpld_reg.frmt_37_9=bit +sff_cpld_reg.pola_37_9=negative +sff_cpld_reg.addr_37_9=0x00030063 +sff_cpld_reg.len_37_9=1 +sff_cpld_reg.bit_offset_37_9=4 + +sff_cpld_reg.mode_38_9=config +sff_cpld_reg.src_38_9=cpld +sff_cpld_reg.frmt_38_9=bit +sff_cpld_reg.pola_38_9=negative +sff_cpld_reg.addr_38_9=0x00030063 +sff_cpld_reg.len_38_9=1 +sff_cpld_reg.bit_offset_38_9=5 + +sff_cpld_reg.mode_39_9=config +sff_cpld_reg.src_39_9=cpld +sff_cpld_reg.frmt_39_9=bit +sff_cpld_reg.pola_39_9=negative +sff_cpld_reg.addr_39_9=0x00030063 +sff_cpld_reg.len_39_9=1 +sff_cpld_reg.bit_offset_39_9=6 + +sff_cpld_reg.mode_40_9=config +sff_cpld_reg.src_40_9=cpld +sff_cpld_reg.frmt_40_9=bit +sff_cpld_reg.pola_40_9=negative +sff_cpld_reg.addr_40_9=0x00030063 +sff_cpld_reg.len_40_9=1 +sff_cpld_reg.bit_offset_40_9=7 + +sff_cpld_reg.mode_41_9=config +sff_cpld_reg.src_41_9=cpld +sff_cpld_reg.frmt_41_9=bit +sff_cpld_reg.pola_41_9=negative +sff_cpld_reg.addr_41_9=0x00030062 +sff_cpld_reg.len_41_9=1 +sff_cpld_reg.bit_offset_41_9=0 + +sff_cpld_reg.mode_42_9=config +sff_cpld_reg.src_42_9=cpld +sff_cpld_reg.frmt_42_9=bit +sff_cpld_reg.pola_42_9=negative +sff_cpld_reg.addr_42_9=0x00030062 +sff_cpld_reg.len_42_9=1 +sff_cpld_reg.bit_offset_42_9=1 + +sff_cpld_reg.mode_43_9=config +sff_cpld_reg.src_43_9=cpld +sff_cpld_reg.frmt_43_9=bit +sff_cpld_reg.pola_43_9=negative +sff_cpld_reg.addr_43_9=0x00030062 +sff_cpld_reg.len_43_9=1 +sff_cpld_reg.bit_offset_43_9=2 + +sff_cpld_reg.mode_44_9=config +sff_cpld_reg.src_44_9=cpld +sff_cpld_reg.frmt_44_9=bit +sff_cpld_reg.pola_44_9=negative +sff_cpld_reg.addr_44_9=0x00030062 +sff_cpld_reg.len_44_9=1 +sff_cpld_reg.bit_offset_44_9=3 + +sff_cpld_reg.mode_45_9=config +sff_cpld_reg.src_45_9=cpld +sff_cpld_reg.frmt_45_9=bit +sff_cpld_reg.pola_45_9=negative +sff_cpld_reg.addr_45_9=0x00030062 +sff_cpld_reg.len_45_9=1 +sff_cpld_reg.bit_offset_45_9=4 + +sff_cpld_reg.mode_46_9=config +sff_cpld_reg.src_46_9=cpld +sff_cpld_reg.frmt_46_9=bit +sff_cpld_reg.pola_46_9=negative +sff_cpld_reg.addr_46_9=0x00030062 +sff_cpld_reg.len_46_9=1 +sff_cpld_reg.bit_offset_46_9=5 + +sff_cpld_reg.mode_47_9=config +sff_cpld_reg.src_47_9=cpld +sff_cpld_reg.frmt_47_9=bit +sff_cpld_reg.pola_47_9=negative +sff_cpld_reg.addr_47_9=0x00030062 +sff_cpld_reg.len_47_9=1 +sff_cpld_reg.bit_offset_47_9=6 + +sff_cpld_reg.mode_48_9=config +sff_cpld_reg.src_48_9=cpld +sff_cpld_reg.frmt_48_9=bit +sff_cpld_reg.pola_48_9=negative +sff_cpld_reg.addr_48_9=0x00030062 +sff_cpld_reg.len_48_9=1 +sff_cpld_reg.bit_offset_48_9=7 + +sff_cpld_reg.mode_49_9=config +sff_cpld_reg.src_49_9=cpld +sff_cpld_reg.frmt_49_9=bit +sff_cpld_reg.pola_49_9=negative +sff_cpld_reg.addr_49_9=0x00030061 +sff_cpld_reg.len_49_9=1 +sff_cpld_reg.bit_offset_49_9=0 + +sff_cpld_reg.mode_50_9=config +sff_cpld_reg.src_50_9=cpld +sff_cpld_reg.frmt_50_9=bit +sff_cpld_reg.pola_50_9=negative +sff_cpld_reg.addr_50_9=0x00030061 +sff_cpld_reg.len_50_9=1 +sff_cpld_reg.bit_offset_50_9=1 + +sff_cpld_reg.mode_51_9=config +sff_cpld_reg.src_51_9=cpld +sff_cpld_reg.frmt_51_9=bit +sff_cpld_reg.pola_51_9=negative +sff_cpld_reg.addr_51_9=0x00030061 +sff_cpld_reg.len_51_9=1 +sff_cpld_reg.bit_offset_51_9=2 + +sff_cpld_reg.mode_52_9=config +sff_cpld_reg.src_52_9=cpld +sff_cpld_reg.frmt_52_9=bit +sff_cpld_reg.pola_52_9=negative +sff_cpld_reg.addr_52_9=0x00030061 +sff_cpld_reg.len_52_9=1 +sff_cpld_reg.bit_offset_52_9=3 + +sff_cpld_reg.mode_53_9=config +sff_cpld_reg.src_53_9=cpld +sff_cpld_reg.frmt_53_9=bit +sff_cpld_reg.pola_53_9=negative +sff_cpld_reg.addr_53_9=0x00030061 +sff_cpld_reg.len_53_9=1 +sff_cpld_reg.bit_offset_53_9=4 + +sff_cpld_reg.mode_54_9=config +sff_cpld_reg.src_54_9=cpld +sff_cpld_reg.frmt_54_9=bit +sff_cpld_reg.pola_54_9=negative +sff_cpld_reg.addr_54_9=0x00030061 +sff_cpld_reg.len_54_9=1 +sff_cpld_reg.bit_offset_54_9=5 + +sff_cpld_reg.mode_55_9=config +sff_cpld_reg.src_55_9=cpld +sff_cpld_reg.frmt_55_9=bit +sff_cpld_reg.pola_55_9=negative +sff_cpld_reg.addr_55_9=0x00030061 +sff_cpld_reg.len_55_9=1 +sff_cpld_reg.bit_offset_55_9=6 + +sff_cpld_reg.mode_56_9=config +sff_cpld_reg.src_56_9=cpld +sff_cpld_reg.frmt_56_9=bit +sff_cpld_reg.pola_56_9=negative +sff_cpld_reg.addr_56_9=0x00030061 +sff_cpld_reg.len_56_9=1 +sff_cpld_reg.bit_offset_56_9=7 + +sff_cpld_reg.mode_57_9=config +sff_cpld_reg.src_57_9=cpld +sff_cpld_reg.frmt_57_9=bit +sff_cpld_reg.pola_57_9=negative +sff_cpld_reg.addr_57_9=0x00030060 +sff_cpld_reg.len_57_9=1 +sff_cpld_reg.bit_offset_57_9=0 + +sff_cpld_reg.mode_58_9=config +sff_cpld_reg.src_58_9=cpld +sff_cpld_reg.frmt_58_9=bit +sff_cpld_reg.pola_58_9=negative +sff_cpld_reg.addr_58_9=0x00030060 +sff_cpld_reg.len_58_9=1 +sff_cpld_reg.bit_offset_58_9=1 + +sff_cpld_reg.mode_59_9=config +sff_cpld_reg.src_59_9=cpld +sff_cpld_reg.frmt_59_9=bit +sff_cpld_reg.pola_59_9=negative +sff_cpld_reg.addr_59_9=0x00030060 +sff_cpld_reg.len_59_9=1 +sff_cpld_reg.bit_offset_59_9=2 + +sff_cpld_reg.mode_60_9=config +sff_cpld_reg.src_60_9=cpld +sff_cpld_reg.frmt_60_9=bit +sff_cpld_reg.pola_60_9=negative +sff_cpld_reg.addr_60_9=0x00030060 +sff_cpld_reg.len_60_9=1 +sff_cpld_reg.bit_offset_60_9=3 + +sff_cpld_reg.mode_61_9=config +sff_cpld_reg.src_61_9=cpld +sff_cpld_reg.frmt_61_9=bit +sff_cpld_reg.pola_61_9=negative +sff_cpld_reg.addr_61_9=0x00030060 +sff_cpld_reg.len_61_9=1 +sff_cpld_reg.bit_offset_61_9=4 + +sff_cpld_reg.mode_62_9=config +sff_cpld_reg.src_62_9=cpld +sff_cpld_reg.frmt_62_9=bit +sff_cpld_reg.pola_62_9=negative +sff_cpld_reg.addr_62_9=0x00030060 +sff_cpld_reg.len_62_9=1 +sff_cpld_reg.bit_offset_62_9=5 + +sff_cpld_reg.mode_63_9=config +sff_cpld_reg.src_63_9=cpld +sff_cpld_reg.frmt_63_9=bit +sff_cpld_reg.pola_63_9=negative +sff_cpld_reg.addr_63_9=0x00030060 +sff_cpld_reg.len_63_9=1 +sff_cpld_reg.bit_offset_63_9=6 + +sff_cpld_reg.mode_64_9=config +sff_cpld_reg.src_64_9=cpld +sff_cpld_reg.frmt_64_9=bit +sff_cpld_reg.pola_64_9=negative +sff_cpld_reg.addr_64_9=0x00030060 +sff_cpld_reg.len_64_9=1 +sff_cpld_reg.bit_offset_64_9=7 + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg new file mode 100644 index 00000000000..e087fee6204 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg @@ -0,0 +1,20 @@ + +watchdog_dev.mode_0_4=config +watchdog_dev.src_0_4=cpld +watchdog_dev.frmt_0_4=bit +watchdog_dev.addr_0_4=0x000100b0 +watchdog_dev.len_0_4=1 +watchdog_dev.bit_offset_0_4=0 + +watchdog_dev.mode_0_3=config +watchdog_dev.src_0_3=cpld +watchdog_dev.frmt_0_3=byte +watchdog_dev.addr_0_3=0x000100b1 +watchdog_dev.len_0_3=1 + +watchdog_dev.mode_0_5=config +watchdog_dev.src_0_5=cpld +watchdog_dev.frmt_0_5=bit +watchdog_dev.addr_0_5=0x000100b0 +watchdog_dev.len_0_5=1 +watchdog_dev.bit_offset_0_5=0 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/file_name/0x40d7 b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/file_name/0x40d7 new file mode 100644 index 00000000000..3944674a473 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/file_name/0x40d7 @@ -0,0 +1,8 @@ +CPLD +FAN +LED +PSU +SENSOR +SFF +FPGA +WATCHDOG diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/setup.py new file mode 100755 index 00000000000..6c3916921ab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/setup.py @@ -0,0 +1,39 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation', + license='Apache 2.0', + author='SONiC Team', + author_email='support', + url='', + maintainer='support', + maintainer_email='', + packages=[ + 'sonic_platform', + 'plat_hal', + 'wbutil', + 'eepromutil', + 'hal-config', + 'config', + ], + py_modules=[ + 'hal_pltfm', + 'platform_util', + 'platform_intf', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-nokia b/platform/broadcom/sonic-platform-modules-nokia index cdfbbe2becb..071535f343c 160000 --- a/platform/broadcom/sonic-platform-modules-nokia +++ b/platform/broadcom/sonic-platform-modules-nokia @@ -1 +1 @@ -Subproject commit cdfbbe2becbf1bca62481f7e8389f254465a9d8c +Subproject commit 071535f343c5b3c0d34c3797a8878a0d76aa625a diff --git a/platform/cavium/docker-saiserver-cavm/supervisord.conf b/platform/cavium/docker-saiserver-cavm/supervisord.conf index cb67a0fc9a4..d8fef1c012f 100644 --- a/platform/cavium/docker-saiserver-cavm/supervisord.conf +++ b/platform/cavium/docker-saiserver-cavm/supervisord.conf @@ -8,21 +8,27 @@ command=/usr/bin/start.sh priority=1 autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:rsyslogd] command=/usr/sbin/rsyslogd -n priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:saiserver] command=/usr/bin/saiserver -p /etc/sai/profile.ini -f /etc/sai/portmap.ini priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true diff --git a/platform/cavium/docker-syncd-cavm/supervisord.conf b/platform/cavium/docker-syncd-cavm/supervisord.conf index 0f1ae559348..e19a41baca9 100644 --- a/platform/cavium/docker-syncd-cavm/supervisord.conf +++ b/platform/cavium/docker-syncd-cavm/supervisord.conf @@ -15,21 +15,27 @@ command=/usr/bin/start.sh priority=1 autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:rsyslogd] command=/usr/sbin/rsyslogd -n priority=2 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:syncd] command=/usr/bin/syncd_start.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true diff --git a/platform/centec-arm64/docker-saiserver-centec/supervisord.conf b/platform/centec-arm64/docker-saiserver-centec/supervisord.conf index ccb107b3d1f..ab3bb3b67d6 100644 --- a/platform/centec-arm64/docker-saiserver-centec/supervisord.conf +++ b/platform/centec-arm64/docker-saiserver-centec/supervisord.conf @@ -8,21 +8,27 @@ command=/usr/bin/start.sh priority=1 autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:rsyslogd] command=/usr/sbin/rsyslogd -n priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:saiserver] command=/usr/sbin/saiserver -p /usr/share/sonic/hwsku/sai.profile -f /usr/share/sonic/hwsku/port_config.ini priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true diff --git a/platform/centec-arm64/docker-syncd-centec/supervisord.conf b/platform/centec-arm64/docker-syncd-centec/supervisord.conf index 62a28387248..e76ff9baae8 100755 --- a/platform/centec-arm64/docker-syncd-centec/supervisord.conf +++ b/platform/centec-arm64/docker-syncd-centec/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:syncd] @@ -33,7 +35,9 @@ command=/usr/bin/syncd_start.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running diff --git a/platform/centec-arm64/platform-modules-fs.mk b/platform/centec-arm64/platform-modules-fs.mk index 5942eabe206..8bfff5c9dad 100644 --- a/platform/centec-arm64/platform-modules-fs.mk +++ b/platform/centec-arm64/platform-modules-fs.mk @@ -9,4 +9,8 @@ FS_S5800_48T4S_PLATFORM_MODULE = platform-modules-s5800-48t4s_$(FS_S5800_48T4S_P $(FS_S5800_48T4S_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-fs $(FS_S5800_48T4S_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(FS_S5800_48T4S_PLATFORM_MODULE)_PLATFORM = arm64-fs_s5800_48t4s-r0 +# Both this and the e530 modules compile ../centec/centec-dal/, which causes a problem +# if both are being compiled at the same time. To get around that, add an artificial +# dependency here so that this part is serialized. +$(FS_S5800_48T4S_PLATFORM_MODULE)_AFTER = $(CENTEC_E530_48T4X_P_PLATFORM_MODULE) SONIC_DPKG_DEBS += $(FS_S5800_48T4S_PLATFORM_MODULE) diff --git a/platform/centec/docker-saiserver-centec/supervisord.conf b/platform/centec/docker-saiserver-centec/supervisord.conf index ccb107b3d1f..ab3bb3b67d6 100644 --- a/platform/centec/docker-saiserver-centec/supervisord.conf +++ b/platform/centec/docker-saiserver-centec/supervisord.conf @@ -8,21 +8,27 @@ command=/usr/bin/start.sh priority=1 autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:rsyslogd] command=/usr/sbin/rsyslogd -n priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:saiserver] command=/usr/sbin/saiserver -p /usr/share/sonic/hwsku/sai.profile -f /usr/share/sonic/hwsku/port_config.ini priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true diff --git a/platform/centec/docker-syncd-centec/supervisord.conf b/platform/centec/docker-syncd-centec/supervisord.conf index 56d8b29de18..42f6e37195b 100644 --- a/platform/centec/docker-syncd-centec/supervisord.conf +++ b/platform/centec/docker-syncd-centec/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:syncd] @@ -33,7 +35,9 @@ command=/usr/bin/syncd_start.sh priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini index fcb26512c35..3965e969f49 100644 --- a/platform/checkout/cisco-8000.ini +++ b/platform/checkout/cisco-8000.ini @@ -1,3 +1,3 @@ [module] repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git -ref=202405.0.8 +ref=202405.0.15 diff --git a/platform/components/docker-gbsyncd-broncos/supervisord.conf.j2 b/platform/components/docker-gbsyncd-broncos/supervisord.conf.j2 index 2ac52c22c28..ec3453e7863 100644 --- a/platform/components/docker-gbsyncd-broncos/supervisord.conf.j2 +++ b/platform/components/docker-gbsyncd-broncos/supervisord.conf.j2 @@ -16,8 +16,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -26,8 +28,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -37,7 +41,9 @@ command=/usr/bin/dsserve -f /var/run/sswsyncd/sswgbsyncd.socket /usr/bin/syncd - priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/platform/components/docker-gbsyncd-credo/supervisord.conf.j2 b/platform/components/docker-gbsyncd-credo/supervisord.conf.j2 index 01ef324450a..655e2b71c3d 100644 --- a/platform/components/docker-gbsyncd-credo/supervisord.conf.j2 +++ b/platform/components/docker-gbsyncd-credo/supervisord.conf.j2 @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -45,7 +49,9 @@ command=/usr/bin/syncd -s -p /etc/sai.d/psai.profile -x /usr/share/sonic/hwsku/c priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/platform/innovium/docker-saiserver-invm.dep b/platform/innovium/docker-saiserver-invm.dep deleted file mode 100644 index cf8cc4b6b0f..00000000000 --- a/platform/innovium/docker-saiserver-invm.dep +++ /dev/null @@ -1,8 +0,0 @@ -DPATH := $($(DOCKER_SAISERVER_INVM)_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/innovium/docker-saiserver-invm.mk platform/innovium/docker-saiserver-invm.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files $(DPATH)) - -$(DOCKER_SAISERVER_INVM)_CACHE_MODE := GIT_CONTENT_SHA -$(DOCKER_SAISERVER_INVM)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) -$(DOCKER_SAISERVER_INVM)_DEP_FILES := $(DEP_FILES) diff --git a/platform/innovium/docker-saiserver-invm.mk b/platform/innovium/docker-saiserver-invm.mk deleted file mode 100644 index 1f30efc6b1c..00000000000 --- a/platform/innovium/docker-saiserver-invm.mk +++ /dev/null @@ -1,14 +0,0 @@ -# docker image for invm saiserver - -DOCKER_SAISERVER_INVM = docker-saiserver$(SAITHRIFT_VER)-invm.gz -$(DOCKER_SAISERVER_INVM)_PATH = $(PLATFORM_PATH)/docker-saiserver-invm -$(DOCKER_SAISERVER_INVM)_DEPENDS += $(SAISERVER) -$(DOCKER_SAISERVER_INVM)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) -SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_INVM) - -$(DOCKER_SAISERVER_INVM)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER) -$(DOCKER_SAISERVER_INVM)_RUN_OPT += --privileged -t -$(DOCKER_SAISERVER_INVM)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf -$(DOCKER_SAISERVER_INVM)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd -$(DOCKER_SAISERVER_INVM)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SAISERVER_INVM)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/innovium/docker-syncd-invm-rpc.mk b/platform/innovium/docker-syncd-invm-rpc.mk deleted file mode 100755 index c4e1c876287..00000000000 --- a/platform/innovium/docker-syncd-invm-rpc.mk +++ /dev/null @@ -1,22 +0,0 @@ -# docker image for innovium syncd with rpc - -DOCKER_SYNCD_INVM_RPC = docker-syncd-invm-rpc.gz -$(DOCKER_SYNCD_INVM_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-invm-rpc -$(DOCKER_SYNCD_INVM_RPC)_DEPENDS += $(SYNCD_RPC) $(INVM_LIBSAI) $(INVM_SHELL) -$(DOCKER_SYNCD_INVM_RPC)_PYTHON_WHEELS += $(PTF_PY3) -$(DOCKER_SYNCD_INVM_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) -$(DOCKER_SYNCD_INVM_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE) -SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_INVM_RPC) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_INVM_RPC) -ifeq ($(ENABLE_SYNCD_RPC),y) -SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_INVM_RPC) -endif - -$(DOCKER_SYNCD_INVM_RPC)_CONTAINER_NAME = syncd -$(DOCKER_SYNCD_INVM_RPC)_VERSION = 1.0.0-rpc -$(DOCKER_SYNCD_INVM_RPC)_PACKAGE_NAME = syncd -$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += --privileged -t -$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf -$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd -$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/innovium/invm-sai.mk b/platform/innovium/invm-sai.mk deleted file mode 100755 index fa3e8abad9a..00000000000 --- a/platform/innovium/invm-sai.mk +++ /dev/null @@ -1,17 +0,0 @@ -# INVM SAI - -INVM_SAI_ONLINE = https://github.com/Innovium/SONiC/raw/master/debian/master - -INVM_LIBSAI = isai.deb -INVM_HSAI = saihdr.deb -INVM_DRV = ipd.deb -INVM_SHELL = ishell.deb - -$(INVM_LIBSAI)_URL = $(INVM_SAI_ONLINE)/$(INVM_LIBSAI) -$(INVM_HSAI)_URL = $(INVM_SAI_ONLINE)/$(INVM_HSAI) -$(INVM_DRV)_URL = $(INVM_SAI_ONLINE)/$(INVM_DRV) -$(INVM_SHELL)_URL = $(INVM_SAI_ONLINE)/$(INVM_SHELL) - -$(eval $(call add_conflict_package,$(INVM_HSAI),$(LIBSAIVS_DEV))) - -SONIC_ONLINE_DEBS += $(INVM_LIBSAI) $(INVM_HSAI) $(INVM_DRV) $(INVM_SHELL) diff --git a/platform/innovium/python-saithrift.mk b/platform/innovium/python-saithrift.mk deleted file mode 100755 index 23d7df18834..00000000000 --- a/platform/innovium/python-saithrift.mk +++ /dev/null @@ -1,6 +0,0 @@ -# python-saithrift package - -PYTHON_SAITHRIFT_INVM = python-saithrift_1.2.1_$(CONFIGURED_ARCH).deb -$(PYTHON_SAITHRIFT_INVM)_SRC_PATH = $(SRC_PATH)/SAI -$(PYTHON_SAITHRIFT_INVM)_DEPENDS += $(INVM_LIBSAI) $(INVM_HSAI) $(THRIFT_COMPILER) $(PYTHON_THRIFT) $(LIBTHRIFT_DEV) -SONIC_DPKG_DEBS += $(PYTHON_SAITHRIFT_INVM) diff --git a/platform/innovium/rules.mk b/platform/innovium/rules.mk deleted file mode 100755 index 906d0619d5f..00000000000 --- a/platform/innovium/rules.mk +++ /dev/null @@ -1,28 +0,0 @@ -include $(PLATFORM_PATH)/invm-sai.mk -include $(PLATFORM_PATH)/platform-modules-cel.mk -include $(PLATFORM_PATH)/platform-modules-supermicro.mk -include $(PLATFORM_PATH)/platform-modules-wistron.mk -include $(PLATFORM_PATH)/platform-modules-marvell.mk -include $(PLATFORM_PATH)/docker-syncd-invm.mk -include $(PLATFORM_PATH)/docker-syncd-invm-rpc.mk -include $(PLATFORM_PATH)/one-image.mk -include $(PLATFORM_PATH)/docker-saiserver-invm.mk -include $(PLATFORM_PATH)/libsaithrift-dev.mk -include $(PLATFORM_PATH)/python-saithrift.mk - -SONIC_ALL += $(SONIC_INVM_ONE_IMAGE) \ - $(DOCKER_FPM) \ - $(DOCKER_PTF_INVM) \ - $(DOCKER_SYNCD_INVM_RPC) - -# Inject invm sai into syncd -$(SYNCD)_DEPENDS += $(INVM_HSAI) $(INVM_LIBSAI) $(INVM_SHELL) -$(SYNCD)_UNINSTALLS += $(INVM_HSAI) - -ifeq ($(ENABLE_SYNCD_RPC),y) -$(SYNCD)_DEPENDS := $(filter-out $(LIBTHRIFT_DEV),$($(SYNCD)_DEPENDS)) -$(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV) -endif - -# Runtime dependency on invm sai is set only for syncd -$(SYNCD)_RDEPENDS += $(INVM_HSAI) diff --git a/platform/innovium/sonic-platform-marvell b/platform/innovium/sonic-platform-marvell deleted file mode 160000 index a6e250959b4..00000000000 --- a/platform/innovium/sonic-platform-marvell +++ /dev/null @@ -1 +0,0 @@ -Subproject commit a6e250959b4e98f443e759179ac25f93cc891c9a diff --git a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.init b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.init deleted file mode 100755 index 7074d2b5812..00000000000 --- a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.init +++ /dev/null @@ -1,52 +0,0 @@ -#!/bin/bash - -### BEGIN INIT INFO -# Provides: setup-board -# Required-Start: $portmap -# Required-Stop: -# Should-Start: -# Should-Stop: -# Default-Start: S -# Default-Stop: 0 6 -# Short-Description: Setup 200i board. -### END INIT INFO - -case "$1" in -start) - echo -n "Setting up board... " - - # Attach TLV 0x56 eeprom - echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-0/new_device - sleep 2 - - modprobe 200i-cpld - sleep 2 - - # Turn off/down lpmod by defult (0 - Normal, 1 - Low Pow) - echo 0x00 > /sys/devices/platform/ms200i_cpld/qsfp_lpmode - - # Attach 64 instances of EEPROM driver QSFP ports - for ((n=1;n<=66;n++)); - do - echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-$n/new_device - sleep 0.1 - done - - echo "done." - ;; - -stop) - echo "done." - ;; - -force-reload|restart) - echo "Not supported" - ;; - -*) - echo "Usage: /etc/init.d/platform-modules-200i.init {start|stop}" - exit 1 - ;; -esac - -exit 0 diff --git a/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.init b/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.init deleted file mode 100755 index f2d24b04a0d..00000000000 --- a/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.init +++ /dev/null @@ -1,39 +0,0 @@ -#!/bin/bash - -### BEGIN INIT INFO -# Provides: setup-board -# Required-Start: -# Required-Stop: -# Should-Start: -# Should-Stop: -# Default-Start: S -# Default-Stop: 0 6 -# Short-Description: Setup et-c032if board. -### END INIT INFO - -case "$1" in -start) - echo -n "Setting up board... " - modprobe optoe - modprobe delta_et-c032if_platform - - /usr/local/bin/et-c032if_platform_init.sh - echo "done." - ;; - -stop) - echo "done." - - ;; - -force-reload|restart) - echo "Not supported" - ;; - -*) - echo "Usage: /etc/init.d/platform-modules-et-c032if.init {start|stop}" - exit 1 - ;; -esac - -exit 0 diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/netberg_platform_version.sh b/platform/innovium/sonic-platform-modules-netberg/debian/netberg_platform_version.sh deleted file mode 100755 index 17c6ff4cdd7..00000000000 --- a/platform/innovium/sonic-platform-modules-netberg/debian/netberg_platform_version.sh +++ /dev/null @@ -1,14 +0,0 @@ -#! /bin/sh -# driver version - -PLATFROM=$1 -PLATFROM_PATH=$2 - -export PLATFORM_DRIVER_VER='"0.3.16"' - -echo "PLATFORM_DRIVER_VER = $PLATFORM_DRIVER_VER" - -util_name=$(echo $PLATFROM) - -j2 $PLATFROM_PATH/templates/netberg_${util_name}_util.py.j2 -o $PLATFROM_PATH/utils/netberg_${util_name}_util.py -chmod 775 $PLATFROM_PATH/utils/netberg_${util_name}_util.py diff --git a/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.dep b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.dep new file mode 100644 index 00000000000..5fa3dd44389 --- /dev/null +++ b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.dep @@ -0,0 +1,8 @@ +DPATH := $($(DOCKER_SAISERVER_MRVL_TERALYNX)_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.mk platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(DPATH)) + +$(DOCKER_SAISERVER_MRVL_TERALYNX)_CACHE_MODE := GIT_CONTENT_SHA +$(DOCKER_SAISERVER_MRVL_TERALYNX)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(DOCKER_SAISERVER_MRVL_TERALYNX)_DEP_FILES := $(DEP_FILES) diff --git a/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.mk b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.mk new file mode 100644 index 00000000000..3c01455d4c6 --- /dev/null +++ b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.mk @@ -0,0 +1,14 @@ +# docker image for mrvl-teralynx saiserver + +DOCKER_SAISERVER_MRVL_TERALYNX = docker-saiserver$(SAITHRIFT_VER)-mrvl-teralynx.gz +$(DOCKER_SAISERVER_MRVL_TERALYNX)_PATH = $(PLATFORM_PATH)/docker-saiserver-mrvl-teralynx +$(DOCKER_SAISERVER_MRVL_TERALYNX)_DEPENDS += $(SAISERVER) +$(DOCKER_SAISERVER_MRVL_TERALYNX)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MRVL_TERALYNX) + +$(DOCKER_SAISERVER_MRVL_TERALYNX)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER) +$(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += --privileged -t +$(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd +$(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/innovium/docker-saiserver-invm/Dockerfile.j2 b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/Dockerfile.j2 similarity index 88% rename from platform/innovium/docker-saiserver-invm/Dockerfile.j2 rename to platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/Dockerfile.j2 index c6d0ada17e3..2dd04f57f4e 100644 --- a/platform/innovium/docker-saiserver-invm/Dockerfile.j2 +++ b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/Dockerfile.j2 @@ -21,13 +21,13 @@ RUN pip3 install numpy RUN pip3 install yamlordereddictloader COPY \ -{% for deb in docker_saiserver_invm_debs.split(' ') -%} +{% for deb in docker_saiserver_mrvl_teralynx_debs.split(' ') -%} debs/{{ deb }}{{' '}} {%- endfor -%} debs/ RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ -{% for deb in docker_saiserver_invm_debs.split(' ') -%} +{% for deb in docker_saiserver_mrvl_teralynx_debs.split(' ') -%} dpkg_apt debs/{{ deb }}{{'; '}} {%- endfor %} diff --git a/platform/innovium/docker-saiserver-invm/start.sh b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/start.sh similarity index 100% rename from platform/innovium/docker-saiserver-invm/start.sh rename to platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/start.sh diff --git a/platform/innovium/docker-saiserver-invm/supervisord.conf b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/supervisord.conf similarity index 64% rename from platform/innovium/docker-saiserver-invm/supervisord.conf rename to platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/supervisord.conf index ccb107b3d1f..ab3bb3b67d6 100644 --- a/platform/innovium/docker-saiserver-invm/supervisord.conf +++ b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/supervisord.conf @@ -8,21 +8,27 @@ command=/usr/bin/start.sh priority=1 autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:rsyslogd] command=/usr/sbin/rsyslogd -n priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:saiserver] command=/usr/sbin/saiserver -p /usr/share/sonic/hwsku/sai.profile -f /usr/share/sonic/hwsku/port_config.ini priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true diff --git a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.mk b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.mk new file mode 100755 index 00000000000..c0ba78183dc --- /dev/null +++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.mk @@ -0,0 +1,22 @@ +# docker image for marvell-teralynx syncd with rpc + +DOCKER_SYNCD_MRVL_TERALYNX_RPC = docker-syncd-mrvl-teralynx-rpc.gz +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-mrvl-teralynx-rpc +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_DEPENDS += $(SYNCD_RPC) $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_SHELL) +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_PYTHON_WHEELS += $(PTF_PY3) +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_TERALYNX_RPC) +SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_MRVL_TERALYNX_RPC) +ifeq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_TERALYNX_RPC) +endif + +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_VERSION = 1.0.0-rpc +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_PACKAGE_NAME = syncd +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += --privileged -t +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2 b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/Dockerfile.j2 similarity index 77% rename from platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2 rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/Dockerfile.j2 index b5e00c0a811..39fe5a21e2e 100755 --- a/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2 +++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/Dockerfile.j2 @@ -1,11 +1,11 @@ -FROM docker-syncd-invm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +FROM docker-syncd-mrvl-teralynx-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} {% from "dockers/dockerfile-macros.j2" import install_python_wheels, copy_files %} ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive COPY \ -{% for deb in docker_syncd_invm_rpc_debs.split(' ') -%} +{% for deb in docker_syncd_mrvl_teralynx_rpc_debs.split(' ') -%} debs/{{ deb }}{{' '}} {%- endfor -%} debs/ @@ -34,7 +34,7 @@ RUN apt-get update \ libnanomsg-dev RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \ -{% for deb in docker_syncd_invm_rpc_debs.split(' ') -%} +{% for deb in docker_syncd_mrvl_teralynx_rpc_debs.split(' ') -%} dpkg_apt debs/{{ deb }}{{'; '}} {%- endfor %} @@ -46,12 +46,12 @@ RUN pip3 install cffi \ COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] -{% if docker_syncd_invm_rpc_whls.strip() -%} +{% if docker_syncd_mrvl_teralynx_rpc_whls.strip() -%} # Copy locally-built Python wheel dependencies -{{ copy_files("python-wheels/", docker_syncd_invm_rpc_whls.split(' '), "/python-wheels/") }} +{{ copy_files("python-wheels/", docker_syncd_mrvl_teralynx_rpc_whls.split(' '), "/python-wheels/") }} # Install locally-built Python wheel dependencies -{{ install_python_wheels(docker_syncd_invm_rpc_whls.split(' ')) }} +{{ install_python_wheels(docker_syncd_mrvl_teralynx_rpc_whls.split(' ')) }} {% endif %} diff --git a/platform/innovium/docker-syncd-invm-rpc/ptf_nn_agent.conf b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/ptf_nn_agent.conf similarity index 100% rename from platform/innovium/docker-syncd-invm-rpc/ptf_nn_agent.conf rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/ptf_nn_agent.conf diff --git a/platform/innovium/docker-syncd-invm.mk b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx.mk similarity index 63% rename from platform/innovium/docker-syncd-invm.mk rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx.mk index 572680721f0..d95e2efbf76 100755 --- a/platform/innovium/docker-syncd-invm.mk +++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx.mk @@ -1,9 +1,9 @@ -# docker image for innovium syncd +# docker image for marvell-teralynx syncd -DOCKER_SYNCD_PLATFORM_CODE = invm +DOCKER_SYNCD_PLATFORM_CODE = mrvl-teralynx include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk -$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) $(INVM_LIBSAI) $(INVM_SHELL) +$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_SHELL) $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ $(LIBSWSSCOMMON_DBG) \ @@ -12,6 +12,6 @@ $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ $(DOCKER_SYNCD_BASE)_VERSION = 1.0.0 $(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd -$(DOCKER_SYNCD_BASE)_MACHINE = innovium +$(DOCKER_SYNCD_BASE)_MACHINE = marvell-teralynx $(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/innovium/docker-syncd-invm/Dockerfile.j2 b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/Dockerfile.j2 similarity index 84% rename from platform/innovium/docker-syncd-invm/Dockerfile.j2 rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx/Dockerfile.j2 index 3abe009d0af..0e93cab95b3 100755 --- a/platform/innovium/docker-syncd-invm/Dockerfile.j2 +++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/Dockerfile.j2 @@ -9,12 +9,12 @@ ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update COPY \ -{% for deb in docker_syncd_invm_debs.split(' ') -%} +{% for deb in docker_syncd_mrvl_teralynx_debs.split(' ') -%} debs/{{ deb }}{{' '}} {%- endfor -%} debs/ -# Needed for Innovium Debug Shell +# Needed for Marvell Teralynx Debug Shell RUN apt-get install -y net-tools RUN apt-get install -y libjansson4 RUN apt-get install -y libyaml-dev @@ -23,7 +23,7 @@ RUN pip3 install numpy RUN pip3 install yamlordereddictloader RUN dpkg -i \ -{% for deb in docker_syncd_invm_debs.split(' ') -%} +{% for deb in docker_syncd_mrvl_teralynx_debs.split(' ') -%} debs/{{ deb }}{{' '}} {%- endfor %} diff --git a/platform/innovium/docker-syncd-invm/critical_processes b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/critical_processes similarity index 100% rename from platform/innovium/docker-syncd-invm/critical_processes rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx/critical_processes diff --git a/platform/innovium/docker-syncd-invm/ivm_start.sh b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/ivm_start.sh similarity index 100% rename from platform/innovium/docker-syncd-invm/ivm_start.sh rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx/ivm_start.sh diff --git a/platform/innovium/docker-syncd-invm/start.sh b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/start.sh similarity index 100% rename from platform/innovium/docker-syncd-invm/start.sh rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx/start.sh diff --git a/platform/innovium/docker-syncd-invm/supervisord.conf b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/supervisord.conf similarity index 79% rename from platform/innovium/docker-syncd-invm/supervisord.conf rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx/supervisord.conf index ef84810b0cb..ee7d59a5107 100755 --- a/platform/innovium/docker-syncd-invm/supervisord.conf +++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -44,7 +48,9 @@ command=/usr/bin/syncd_start.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/platform/innovium/libsaithrift-dev.dep b/platform/marvell-teralynx/libsaithrift-dev.dep similarity index 82% rename from platform/innovium/libsaithrift-dev.dep rename to platform/marvell-teralynx/libsaithrift-dev.dep index eee628b5f23..6655bf6d0b4 100644 --- a/platform/innovium/libsaithrift-dev.dep +++ b/platform/marvell-teralynx/libsaithrift-dev.dep @@ -1,6 +1,6 @@ #DPKG FRK SPATH := $($(LIBSAITHRIFT_DEV)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/innovium/libsaithrift-dev.mk platform/innovium/libsaithrift-dev.dep +DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/marvell-teralynx/libsaithrift-dev.mk platform/marvell-teralynx/libsaithrift-dev.dep DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) SMDEP_PATHS := $(SPATH) $(SPATH)/test/ptf $(SPATH)/test/saithrift/ctypesgen $(foreach path, $(SMDEP_PATHS), $(eval $(path) :=$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/, $(shell cd $(path) && git ls-files | grep -Ev " " ))))) diff --git a/platform/innovium/libsaithrift-dev.mk b/platform/marvell-teralynx/libsaithrift-dev.mk similarity index 59% rename from platform/innovium/libsaithrift-dev.mk rename to platform/marvell-teralynx/libsaithrift-dev.mk index 2a8b6bf137c..17972dd7e85 100755 --- a/platform/innovium/libsaithrift-dev.mk +++ b/platform/marvell-teralynx/libsaithrift-dev.mk @@ -4,22 +4,20 @@ SAI_VER = 0.9.4 LIBSAITHRIFT_DEV = libsaithrift$(SAITHRIFT_VER)-dev_$(SAI_VER)_$(CONFIGURED_ARCH).deb $(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI ifeq ($(SAITHRIFT_V2),y) -$(LIBSAITHRIFT_DEV)_DEPENDS += $(INVM_LIBSAI) $(INVM_HSAI) $(LIBSAIMETADATA) $(LIBSAIMETADATA_DEV) -$(LIBSAITHRIFT_DEV)_RDEPENDS += $(INVM_HSAI) $(LIBSAIMETADATA) +$(LIBSAITHRIFT_DEV)_DEPENDS += $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_SHELL) $(LIBSAIMETADATA) $(LIBSAIMETADATA_DEV) +$(LIBSAITHRIFT_DEV)_RDEPENDS += $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_SHELL) $(LIBSAIMETADATA) $(LIBSAITHRIFT_DEV)_BUILD_ENV = SAITHRIFTV2=true SAITHRIFT_VER=v2 else -$(LIBSAITHRIFT_DEV)_DEPENDS += $(INVM_LIBSAI) $(INVM_HSAI) -$(LIBSAITHRIFT_DEV)_RDEPENDS += $(INVM_HSAI) +$(LIBSAITHRIFT_DEV)_DEPENDS += $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_SHELL) +$(LIBSAITHRIFT_DEV)_RDEPENDS += $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_SHELL) endif -$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBSAIMETADATA) $(LIBSAIMETADATA_DEV) -$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBSAIMETADATA) $(INVM_LIBSAI) $(INVM_SHELL) SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV) PYTHON_SAITHRIFT = python-saithrift$(SAITHRIFT_VER)_$(SAI_VER)_$(CONFIGURED_ARCH).deb $(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT))) SAISERVER = saiserver$(SAITHRIFT_VER)_$(SAI_VER)_$(CONFIGURED_ARCH).deb -$(SAISERVER)_RDEPENDS += $(LIBSAITHRIFT_DEV) $(INVM_LIBSAI) $(INVM_HSAI) $(INVM_SHELL) +$(SAISERVER)_RDEPENDS += $(LIBSAITHRIFT_DEV) $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_SHELL) $(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER))) SAISERVER_DBG = saiserver$(SAITHRIFT_VER)-dbg_$(SAI_VER)_$(CONFIGURED_ARCH).deb diff --git a/platform/innovium/one-image.mk b/platform/marvell-teralynx/one-image.mk similarity index 76% rename from platform/innovium/one-image.mk rename to platform/marvell-teralynx/one-image.mk index b1abcf613aa..f62c9aecec3 100755 --- a/platform/innovium/one-image.mk +++ b/platform/marvell-teralynx/one-image.mk @@ -1,7 +1,7 @@ -# sonic innovium ONE image installer +# sonic marvell-teralynx ONE image installer -SONIC_ONE_IMAGE = sonic-innovium.bin -$(SONIC_ONE_IMAGE)_MACHINE = innovium +SONIC_ONE_IMAGE = sonic-marvell-teralynx.bin +$(SONIC_ONE_IMAGE)_MACHINE = marvell-teralynx $(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) $(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(CEL_MIDSTONE_200I_PLATFORM_MODULE) @@ -10,6 +10,6 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NETBERG_AURORA_715_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(SMCI_SSE_T7132S_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(WISTRON_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(TL10_DBMVTX9180_PLATFORM) -$(SONIC_ONE_IMAGE)_INSTALLS += $(INVM_DRV) +$(SONIC_ONE_IMAGE)_INSTALLS += $(MRVL_TERALYNX_DRV) $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_IMAGES) SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/innovium/platform-modules-cel.mk b/platform/marvell-teralynx/platform-modules-cel.mk similarity index 100% rename from platform/innovium/platform-modules-cel.mk rename to platform/marvell-teralynx/platform-modules-cel.mk diff --git a/platform/innovium/platform-modules-delta.mk b/platform/marvell-teralynx/platform-modules-delta.mk similarity index 100% rename from platform/innovium/platform-modules-delta.mk rename to platform/marvell-teralynx/platform-modules-delta.mk diff --git a/platform/innovium/platform-modules-marvell.mk b/platform/marvell-teralynx/platform-modules-marvell.mk similarity index 95% rename from platform/innovium/platform-modules-marvell.mk rename to platform/marvell-teralynx/platform-modules-marvell.mk index b3d720e64dd..eadd190deb1 100644 --- a/platform/innovium/platform-modules-marvell.mk +++ b/platform/marvell-teralynx/platform-modules-marvell.mk @@ -5,7 +5,7 @@ TL10_DBMVTX9180_VERSION = 1.0 export TL10_DBMVTX9180_VERSION TL10_DBMVTX9180_PLATFORM = sonic-platform-marvell-dbmvtx9180_$(TL10_DBMVTX9180_VERSION)_$(CONFIGURED_ARCH).deb -$(TL10_DBMVTX9180_PLATFORM)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-marvell +$(TL10_DBMVTX9180_PLATFORM)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-marvell-teralynx $(TL10_DBMVTX9180_PLATFORM)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(TL10_DBMVTX9180_PLATFORM)_PLATFORM = x86_64-marvell_dbmvtx9180-r0 diff --git a/platform/innovium/platform-modules-netberg.mk b/platform/marvell-teralynx/platform-modules-netberg.mk similarity index 100% rename from platform/innovium/platform-modules-netberg.mk rename to platform/marvell-teralynx/platform-modules-netberg.mk diff --git a/platform/innovium/platform-modules-supermicro.mk b/platform/marvell-teralynx/platform-modules-supermicro.mk similarity index 100% rename from platform/innovium/platform-modules-supermicro.mk rename to platform/marvell-teralynx/platform-modules-supermicro.mk diff --git a/platform/innovium/platform-modules-wistron.mk b/platform/marvell-teralynx/platform-modules-wistron.mk similarity index 100% rename from platform/innovium/platform-modules-wistron.mk rename to platform/marvell-teralynx/platform-modules-wistron.mk diff --git a/src/sonic-bmpcfgd/__init__.py b/platform/marvell-teralynx/platform.conf old mode 100644 new mode 100755 similarity index 100% rename from src/sonic-bmpcfgd/__init__.py rename to platform/marvell-teralynx/platform.conf diff --git a/platform/marvell-teralynx/python-saithrift.mk b/platform/marvell-teralynx/python-saithrift.mk new file mode 100755 index 00000000000..f220ebc2bae --- /dev/null +++ b/platform/marvell-teralynx/python-saithrift.mk @@ -0,0 +1,6 @@ +# python-saithrift package + +PYTHON_SAITHRIFT_MRVL_TERALYNX = python-saithrift_1.2.1_$(CONFIGURED_ARCH).deb +$(PYTHON_SAITHRIFT_MRVL_TERALYNX)_SRC_PATH = $(SRC_PATH)/SAI +$(PYTHON_SAITHRIFT_MRVL_TERALYNX)_DEPENDS += $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(THRIFT_COMPILER) $(PYTHON_THRIFT) $(LIBTHRIFT_DEV) +SONIC_DPKG_DEBS += $(PYTHON_SAITHRIFT_MRVL_TERALYNX) diff --git a/platform/marvell-teralynx/rules.mk b/platform/marvell-teralynx/rules.mk new file mode 100755 index 00000000000..3ba96af2f66 --- /dev/null +++ b/platform/marvell-teralynx/rules.mk @@ -0,0 +1,28 @@ +include $(PLATFORM_PATH)/sai.mk +include $(PLATFORM_PATH)/platform-modules-cel.mk +include $(PLATFORM_PATH)/platform-modules-supermicro.mk +include $(PLATFORM_PATH)/platform-modules-wistron.mk +include $(PLATFORM_PATH)/platform-modules-marvell.mk +include $(PLATFORM_PATH)/docker-syncd-mrvl-teralynx.mk +include $(PLATFORM_PATH)/docker-syncd-mrvl-teralynx-rpc.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/docker-saiserver-mrvl-teralynx.mk +include $(PLATFORM_PATH)/libsaithrift-dev.mk +include $(PLATFORM_PATH)/python-saithrift.mk + +SONIC_ALL += $(SONIC_MRVL_TERALYNX_ONE_IMAGE) \ + $(DOCKER_FPM) \ + $(DOCKER_PTF_MRVL_TERALYNX) \ + $(DOCKER_SYNCD_MRVL_TERALYNX_RPC) + +# Inject mrvl-teralynx sai into syncd +$(SYNCD)_DEPENDS += $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_SHELL) +$(SYNCD)_UNINSTALLS += $(MRVL_TERALYNX_HSAI) + +ifeq ($(ENABLE_SYNCD_RPC),y) +$(SYNCD)_DEPENDS := $(filter-out $(LIBTHRIFT_DEV),$($(SYNCD)_DEPENDS)) +$(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV) +endif + +# Runtime dependency on mrvl-teralynx sai is set only for syncd +$(SYNCD)_RDEPENDS += $(MRVL_TERALYNX_HSAI) diff --git a/platform/marvell-teralynx/sai.mk b/platform/marvell-teralynx/sai.mk new file mode 100755 index 00000000000..272ddc269a3 --- /dev/null +++ b/platform/marvell-teralynx/sai.mk @@ -0,0 +1,17 @@ +# MRVL_TERALYNX SAI + +MRVL_TERALYNX_SAI_ONLINE = https://github.com/Marvell-switching/sonic-marvell-teralynx-binaries/raw/main/debian/master + +MRVL_TERALYNX_LIBSAI = isai.deb +MRVL_TERALYNX_HSAI = saihdr.deb +MRVL_TERALYNX_DRV = ipd.deb +MRVL_TERALYNX_SHELL = ishell.deb + +$(MRVL_TERALYNX_LIBSAI)_URL = $(MRVL_TERALYNX_SAI_ONLINE)/$(MRVL_TERALYNX_LIBSAI) +$(MRVL_TERALYNX_HSAI)_URL = $(MRVL_TERALYNX_SAI_ONLINE)/$(MRVL_TERALYNX_HSAI) +$(MRVL_TERALYNX_DRV)_URL = $(MRVL_TERALYNX_SAI_ONLINE)/$(MRVL_TERALYNX_DRV) +$(MRVL_TERALYNX_SHELL)_URL = $(MRVL_TERALYNX_SAI_ONLINE)/$(MRVL_TERALYNX_SHELL) + +$(eval $(call add_conflict_package,$(MRVL_TERALYNX_HSAI),$(LIBSAIVS_DEV))) + +SONIC_ONLINE_DEBS += $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_DRV) $(MRVL_TERALYNX_SHELL) diff --git a/platform/marvell-teralynx/sonic-platform-marvell-teralynx b/platform/marvell-teralynx/sonic-platform-marvell-teralynx new file mode 160000 index 00000000000..dafbe124ef1 --- /dev/null +++ b/platform/marvell-teralynx/sonic-platform-marvell-teralynx @@ -0,0 +1 @@ +Subproject commit dafbe124ef14e7b9f1e0a52076ce8b8d14c88d6b diff --git a/platform/innovium/sonic-platform-modules-cel/.gitignore b/platform/marvell-teralynx/sonic-platform-modules-cel/.gitignore similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/.gitignore rename to platform/marvell-teralynx/sonic-platform-modules-cel/.gitignore diff --git a/platform/innovium/sonic-platform-modules-cel/LICENSE b/platform/marvell-teralynx/sonic-platform-modules-cel/LICENSE similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/LICENSE rename to platform/marvell-teralynx/sonic-platform-modules-cel/LICENSE diff --git a/platform/innovium/sonic-platform-modules-cel/README.md b/platform/marvell-teralynx/sonic-platform-modules-cel/README.md similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/README.md rename to platform/marvell-teralynx/sonic-platform-modules-cel/README.md diff --git a/platform/innovium/sonic-platform-modules-cel/debian/changelog b/platform/marvell-teralynx/sonic-platform-modules-cel/debian/changelog similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/debian/changelog rename to platform/marvell-teralynx/sonic-platform-modules-cel/debian/changelog diff --git a/platform/innovium/sonic-platform-modules-cel/debian/compat b/platform/marvell-teralynx/sonic-platform-modules-cel/debian/compat similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/debian/compat rename to platform/marvell-teralynx/sonic-platform-modules-cel/debian/compat diff --git a/platform/innovium/sonic-platform-modules-cel/debian/control b/platform/marvell-teralynx/sonic-platform-modules-cel/debian/control similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/debian/control rename to platform/marvell-teralynx/sonic-platform-modules-cel/debian/control diff --git a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install b/platform/marvell-teralynx/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install rename to platform/marvell-teralynx/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install diff --git a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst b/platform/marvell-teralynx/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst rename to platform/marvell-teralynx/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst diff --git a/platform/innovium/sonic-platform-modules-cel/debian/rules b/platform/marvell-teralynx/sonic-platform-modules-cel/debian/rules similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/debian/rules rename to platform/marvell-teralynx/sonic-platform-modules-cel/debian/rules diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf b/platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf rename to platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c b/platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c rename to platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c b/platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c rename to platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/Makefile b/platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/Makefile similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/Makefile rename to platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/Makefile diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c b/platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c rename to platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service b/platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service similarity index 100% rename from platform/innovium/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service rename to platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service diff --git a/platform/innovium/sonic-platform-modules-delta/LICENSE b/platform/marvell-teralynx/sonic-platform-modules-delta/LICENSE similarity index 100% rename from platform/innovium/sonic-platform-modules-delta/LICENSE rename to platform/marvell-teralynx/sonic-platform-modules-delta/LICENSE diff --git a/platform/innovium/sonic-platform-modules-delta/common/modules/dni_emc2305.c b/platform/marvell-teralynx/sonic-platform-modules-delta/common/modules/dni_emc2305.c similarity index 100% rename from platform/innovium/sonic-platform-modules-delta/common/modules/dni_emc2305.c rename to platform/marvell-teralynx/sonic-platform-modules-delta/common/modules/dni_emc2305.c diff --git a/platform/innovium/sonic-platform-modules-delta/debian/changelog b/platform/marvell-teralynx/sonic-platform-modules-delta/debian/changelog similarity index 100% rename from platform/innovium/sonic-platform-modules-delta/debian/changelog rename to platform/marvell-teralynx/sonic-platform-modules-delta/debian/changelog diff --git a/platform/innovium/sonic-platform-modules-delta/debian/compat b/platform/marvell-teralynx/sonic-platform-modules-delta/debian/compat similarity index 100% rename from platform/innovium/sonic-platform-modules-delta/debian/compat rename to platform/marvell-teralynx/sonic-platform-modules-delta/debian/compat diff --git a/platform/innovium/sonic-platform-modules-delta/debian/control b/platform/marvell-teralynx/sonic-platform-modules-delta/debian/control similarity index 100% rename from platform/innovium/sonic-platform-modules-delta/debian/control rename to platform/marvell-teralynx/sonic-platform-modules-delta/debian/control diff --git a/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install b/platform/marvell-teralynx/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install similarity index 100% rename from platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install rename to platform/marvell-teralynx/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install diff --git a/platform/innovium/sonic-platform-modules-delta/debian/rules b/platform/marvell-teralynx/sonic-platform-modules-delta/debian/rules similarity index 100% rename from platform/innovium/sonic-platform-modules-delta/debian/rules rename to platform/marvell-teralynx/sonic-platform-modules-delta/debian/rules diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf b/platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf similarity index 100% rename from platform/innovium/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf rename to platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/Makefile b/platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/modules/Makefile similarity index 100% rename from platform/innovium/sonic-platform-modules-delta/et-c032if/modules/Makefile rename to platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/modules/Makefile diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c b/platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c similarity index 100% rename from platform/innovium/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c rename to platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh b/platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh similarity index 100% rename from platform/innovium/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh rename to platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh diff --git a/platform/innovium/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service b/platform/marvell-teralynx/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service similarity index 100% rename from platform/innovium/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service rename to platform/marvell-teralynx/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/Makefile b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/Makefile similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/Makefile rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/Makefile diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.c similarity index 99% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.c rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.c index f73295f832b..466968c9244 100644 --- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.c +++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.c @@ -1,4 +1,4 @@ -/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */ +/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */ #pragma GCC diagnostic ignored "-Wformat-zero-length" #include "x86-64-netberg-aurora-715.h" #include "x86-64-netberg-aurora-715-common.h" diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.h similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.h rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.h diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.c similarity index 99% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.c rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.c index 4cb4d7ebfa5..12d82161ac7 100644 --- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.c +++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.c @@ -1,4 +1,4 @@ -/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */ +/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */ #pragma GCC diagnostic ignored "-Wformat-zero-length" #include "x86-64-netberg-aurora-715.h" #include "x86-64-netberg-aurora-715-common.h" diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.h similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.h rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.h diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.c similarity index 98% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.c rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.c index df4957212d1..940f9e0aaec 100644 --- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.c +++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.c @@ -1,4 +1,4 @@ -/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */ +/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */ #pragma GCC diagnostic ignored "-Wformat-zero-length" #include "x86-64-netberg-aurora-715.h" #include "x86-64-netberg-aurora-715-common.h" diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.h similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.h rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.h diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.c similarity index 99% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.c rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.c index 1913d1716bb..1b5c2443114 100644 --- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.c +++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.c @@ -1,4 +1,4 @@ -/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */ +/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */ #pragma GCC diagnostic ignored "-Wformat-zero-length" #include "x86-64-netberg-aurora-715.h" #include "x86-64-netberg-aurora-715-common.h" diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.h similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.h rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.h diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.c similarity index 99% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.c rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.c index 97525e62984..e66d8677f35 100644 --- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.c +++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.c @@ -1,4 +1,4 @@ -/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */ +/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */ #pragma GCC diagnostic ignored "-Wformat-zero-length" #include "x86-64-netberg-aurora-715.h" #include "x86-64-netberg-aurora-715-common.h" diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.h similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.h rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.h diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.c similarity index 99% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.c rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.c index 6ee287b9ef6..1e9169398b8 100644 --- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.c +++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.c @@ -1,4 +1,4 @@ -/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */ +/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */ #pragma GCC diagnostic ignored "-Wformat-zero-length" #include "x86-64-netberg-aurora-715.h" #include "x86-64-netberg-aurora-715-common.h" diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.h similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.h rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.h diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.c similarity index 99% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.c rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.c index 8e288f4aa32..e35c3eb221e 100644 --- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.c +++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.c @@ -1,4 +1,4 @@ -/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */ +/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */ #pragma GCC diagnostic ignored "-Wformat-zero-length" #include "x86-64-netberg-aurora-715.h" #include "x86-64-netberg-aurora-715-common.h" diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.h similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.h rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.h diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715.h similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715.h rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715.h diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/scripts/sensors b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/scripts/sensors similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/scripts/sensors rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/scripts/sensors diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/service/nba715-platform-init.service b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/service/nba715-platform-init.service similarity index 83% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/service/nba715-platform-init.service rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/service/nba715-platform-init.service index 6f019485ee8..339ca7a8ea0 100644 --- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/service/nba715-platform-init.service +++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/service/nba715-platform-init.service @@ -1,6 +1,6 @@ [Unit] Description=Netberg Aurora 715 Platform initialization service -After=local-fs.target innovium_platform_driver.service +After=local-fs.target teralynx_platform_driver.service Before=pmon.service diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/setup.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/setup.py similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/setup.py rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/setup.py diff --git a/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/__init__.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/chassis.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/chassis.py similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/chassis.py rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/chassis.py diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/component.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/component.py similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/component.py rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/component.py diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/eeprom.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/eeprom.py similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/eeprom.py rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/eeprom.py diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/fan.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/fan.py similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/fan.py rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/fan.py diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/platDev.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/platDev.py similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/platDev.py rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/platDev.py diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/platform.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/platform.py similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/platform.py rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/platform.py diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/psu.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/psu.py similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/psu.py rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/psu.py diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/sfp.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/sfp.py similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/sfp.py rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/sfp.py diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/thermal.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/thermal.py similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/thermal.py rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/thermal.py diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/templates/netberg_aurora-715_util.py.j2 b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/templates/netberg_aurora-715_util.py.j2 similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/templates/netberg_aurora-715_util.py.j2 rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/templates/netberg_aurora-715_util.py.j2 diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/halt b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/halt similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/halt rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/halt diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_platform.sh b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_platform.sh similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_platform.sh rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_platform.sh diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_sensors.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_sensors.py similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_sensors.py rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_sensors.py diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_startup b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_startup similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_startup rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_startup diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/poweroff b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/poweroff similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/poweroff rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/poweroff diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/shutdown b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/shutdown similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/shutdown rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/shutdown diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/changelog b/platform/marvell-teralynx/sonic-platform-modules-netberg/debian/changelog similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/debian/changelog rename to platform/marvell-teralynx/sonic-platform-modules-netberg/debian/changelog diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/compat b/platform/marvell-teralynx/sonic-platform-modules-netberg/debian/compat similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/debian/compat rename to platform/marvell-teralynx/sonic-platform-modules-netberg/debian/compat diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/control b/platform/marvell-teralynx/sonic-platform-modules-netberg/debian/control similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/debian/control rename to platform/marvell-teralynx/sonic-platform-modules-netberg/debian/control diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/rules b/platform/marvell-teralynx/sonic-platform-modules-netberg/debian/rules similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/debian/rules rename to platform/marvell-teralynx/sonic-platform-modules-netberg/debian/rules diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.install b/platform/marvell-teralynx/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.install similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.install rename to platform/marvell-teralynx/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.install diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.postinst b/platform/marvell-teralynx/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.postinst similarity index 100% rename from platform/innovium/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.postinst rename to platform/marvell-teralynx/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.postinst diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/changelog b/platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/changelog similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/debian/changelog rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/changelog diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/compat b/platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/compat similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/debian/compat rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/compat diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/control b/platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/control similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/debian/control rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/control diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.install b/platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.install similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.install rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.install diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.postinst b/platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.postinst similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.postinst rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.postinst diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/rules b/platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/rules similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/debian/rules rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/rules diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/iTCO_wdt.conf b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/cfg/iTCO_wdt.conf similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/iTCO_wdt.conf rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/cfg/iTCO_wdt.conf diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/t7132s-modules.conf b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/cfg/t7132s-modules.conf similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/t7132s-modules.conf rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/cfg/t7132s-modules.conf diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/Makefile b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/modules/Makefile similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/Makefile rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/modules/Makefile diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/health_checker_thermal.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/health_checker_thermal.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/health_checker_thermal.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/health_checker_thermal.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/platform.sh b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/platform.sh similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/platform.sh rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/platform.sh diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/sysledctl.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/sysledctl.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/sysledctl.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/sysledctl.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/test_cpld.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/test_cpld.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/test_cpld.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/test_cpld.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/setup.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/setup.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/setup.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/setup.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/__init__.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/__init__.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/__init__.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/__init__.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/chassis.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/chassis.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/chassis.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/chassis.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/component.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/component.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/component.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/component.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/eeprom.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/eeprom.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/eeprom.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/eeprom.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan_drawer.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan_drawer.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan_drawer.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan_drawer.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/helper.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/helper.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/helper.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/helper.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/pcie.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/pcie.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/pcie.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/pcie.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/platform.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/platform.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/platform.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/platform.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/psu.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/psu.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/psu.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/psu.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/sfp.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/sfp.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/sfp.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/sfp.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/thermal.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/thermal.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/thermal.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/thermal.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/watchdog.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/watchdog.py similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/watchdog.py rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/watchdog.py diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/systemd/platform-modules-sse-t7132s.service b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/systemd/platform-modules-sse-t7132s.service similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/systemd/platform-modules-sse-t7132s.service rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/systemd/platform-modules-sse-t7132s.service diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/systemd/sysled.service b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/systemd/sysled.service similarity index 100% rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/systemd/sysled.service rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/systemd/sysled.service diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/Makefile b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/Makefile similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/Makefile rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/Makefile diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/i2c-imc.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/i2c-imc.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/i2c-imc.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/i2c-imc.c diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/oldjc42.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/oldjc42.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/oldjc42.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/oldjc42.c diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_cpld.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_cpld.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_cpld.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_cpld.c diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_fan.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_fan.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_fan.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_fan.c diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_leds.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_leds.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_leds.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_leds.c diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_oom.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_oom.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_oom.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_oom.c diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_psu.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_psu.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_psu.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_psu.c diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_syseeprom.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_syseeprom.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_syseeprom.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_syseeprom.c diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_thermal.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_thermal.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_thermal.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_thermal.c diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/service/6512-32r-firmware_ver.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/service/6512-32r-firmware_ver.service similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/service/6512-32r-firmware_ver.service rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/service/6512-32r-firmware_ver.service diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/service/6512-32r-platform.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/service/6512-32r-platform.service similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/service/6512-32r-platform.service rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/service/6512-32r-platform.service diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/service/6512-32r-syseeprom.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/service/6512-32r-syseeprom.service similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/service/6512-32r-syseeprom.service rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/service/6512-32r-syseeprom.service diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/service/platform-modules-6512-32r.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/service/platform-modules-6512-32r.service similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/service/platform-modules-6512-32r.service rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/service/platform-modules-6512-32r.service diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/setup.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/setup.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/setup.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/setup.py diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/__init__.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/__init__.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/__init__.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/__init__.py diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/chassis.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/chassis.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/chassis.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/chassis.py diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/component.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/component.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/component.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/component.py diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/eeprom.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/eeprom.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/eeprom.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/eeprom.py diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/fan.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/fan.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/fan.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/fan.py diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/fan_drawer.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/fan_drawer.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/fan_drawer.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/fan_drawer.py diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/platform.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/platform.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/platform.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/platform.py diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/psu.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/psu.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/psu.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/psu.py diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/sfp.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/sfp.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/sfp.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/sfp.py diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/thermal.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/thermal.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/thermal.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/thermal.py diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/watchdog.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/watchdog.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/watchdog.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/watchdog.py diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/platform_firmware_version b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/platform_firmware_version similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/platform_firmware_version rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/platform_firmware_version diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/platform_sync b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/platform_sync similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/platform_sync rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/platform_sync diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/platform_syseeprom b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/platform_syseeprom similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/platform_syseeprom rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/platform_syseeprom diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-fanthrml-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-fanthrml-monitor similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-fanthrml-monitor rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-fanthrml-monitor diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-led-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-led-monitor similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-led-monitor rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-led-monitor diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-psu-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-psu-monitor similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-psu-monitor rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-psu-monitor diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-qsfp-eeprom-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-qsfp-eeprom-monitor similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-qsfp-eeprom-monitor rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-qsfp-eeprom-monitor diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-qsfp-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-qsfp-monitor similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-qsfp-monitor rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-qsfp-monitor diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-send-temp-to-bmc b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-send-temp-to-bmc similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-send-temp-to-bmc rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-send-temp-to-bmc diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/wistron_6512_32r_util.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/wistron_6512_32r_util.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/wistron_6512_32r_util.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/wistron_6512_32r_util.py diff --git a/platform/innovium/sonic-platform-modules-wistron/LICENSE b/platform/marvell-teralynx/sonic-platform-modules-wistron/LICENSE similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/LICENSE rename to platform/marvell-teralynx/sonic-platform-modules-wistron/LICENSE diff --git a/platform/innovium/sonic-platform-modules-wistron/debian/changelog b/platform/marvell-teralynx/sonic-platform-modules-wistron/debian/changelog similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/debian/changelog rename to platform/marvell-teralynx/sonic-platform-modules-wistron/debian/changelog diff --git a/platform/innovium/sonic-platform-modules-wistron/debian/compat b/platform/marvell-teralynx/sonic-platform-modules-wistron/debian/compat similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/debian/compat rename to platform/marvell-teralynx/sonic-platform-modules-wistron/debian/compat diff --git a/platform/innovium/sonic-platform-modules-wistron/debian/control b/platform/marvell-teralynx/sonic-platform-modules-wistron/debian/control similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/debian/control rename to platform/marvell-teralynx/sonic-platform-modules-wistron/debian/control diff --git a/platform/innovium/sonic-platform-modules-wistron/debian/rules b/platform/marvell-teralynx/sonic-platform-modules-wistron/debian/rules similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/debian/rules rename to platform/marvell-teralynx/sonic-platform-modules-wistron/debian/rules diff --git a/platform/innovium/sonic-platform-modules-wistron/debian/sonic-platform-wistron-6512-32r.install b/platform/marvell-teralynx/sonic-platform-modules-wistron/debian/sonic-platform-wistron-6512-32r.install similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/debian/sonic-platform-wistron-6512-32r.install rename to platform/marvell-teralynx/sonic-platform-modules-wistron/debian/sonic-platform-wistron-6512-32r.install diff --git a/platform/innovium/sonic-platform-modules-wistron/debian/sonic-platform-wistron-6512-32r.postinst b/platform/marvell-teralynx/sonic-platform-modules-wistron/debian/sonic-platform-wistron-6512-32r.postinst similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/debian/sonic-platform-wistron-6512-32r.postinst rename to platform/marvell-teralynx/sonic-platform-modules-wistron/debian/sonic-platform-wistron-6512-32r.postinst diff --git a/platform/innovium/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.install b/platform/marvell-teralynx/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.install similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.install rename to platform/marvell-teralynx/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.install diff --git a/platform/innovium/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.postinst b/platform/marvell-teralynx/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.postinst similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.postinst rename to platform/marvell-teralynx/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.postinst diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/cfg/sw-to3200k-modules.conf b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/cfg/sw-to3200k-modules.conf similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/cfg/sw-to3200k-modules.conf rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/cfg/sw-to3200k-modules.conf diff --git a/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/classes/__init__.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/classes/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/Makefile b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/Makefile similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/Makefile rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/Makefile diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_i2c_psu.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_i2c_psu.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_i2c_psu.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_i2c_psu.c diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_cpld.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_cpld.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_cpld.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_cpld.c diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_fan.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_fan.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_fan.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_fan.c diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_leds.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_leds.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_leds.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_leds.c diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_oom.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_oom.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_oom.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_oom.c diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_psu.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_psu.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_psu.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_psu.c diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_thermal.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_thermal.c similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_thermal.c rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_thermal.c diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/platform-modules-sw-to3200k.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/platform-modules-sw-to3200k.service similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/platform-modules-sw-to3200k.service rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/platform-modules-sw-to3200k.service diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/sw-to3200k-firmware_ver.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/sw-to3200k-firmware_ver.service similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/sw-to3200k-firmware_ver.service rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/sw-to3200k-firmware_ver.service diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-led.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-led.service similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-led.service rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-led.service diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-platform.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-platform.service similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-platform.service rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-platform.service diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-pld.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-pld.service similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-pld.service rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-pld.service diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/setup.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/setup.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/setup.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/setup.py diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/__init__.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/__init__.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/__init__.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/__init__.py diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/chassis.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/chassis.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/chassis.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/chassis.py diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/component.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/component.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/component.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/component.py diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/eeprom.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/eeprom.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/eeprom.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/eeprom.py diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/fan.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/fan.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/fan.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/fan.py diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/fan_drawer.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/fan_drawer.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/fan_drawer.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/fan_drawer.py diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/platform.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/platform.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/platform.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/platform.py diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/psu.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/psu.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/psu.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/psu.py diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/sfp.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/sfp.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/sfp.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/sfp.py diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/thermal.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/thermal.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/thermal.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/thermal.py diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/watchdog.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/watchdog.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/watchdog.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/watchdog.py diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/platform_firmware_version b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/platform_firmware_version similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/platform_firmware_version rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/platform_firmware_version diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/platform_led b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/platform_led similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/platform_led rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/platform_led diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/platform_pld b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/platform_pld similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/platform_pld rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/platform_pld diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/platform_sync b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/platform_sync similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/platform_sync rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/platform_sync diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-fanthrml-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-fanthrml-monitor similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-fanthrml-monitor rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-fanthrml-monitor diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-led-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-led-monitor similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-led-monitor rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-led-monitor diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-psu-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-psu-monitor similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-psu-monitor rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-psu-monitor diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-qsfp-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-qsfp-monitor similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-qsfp-monitor rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-qsfp-monitor diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/sw_to3200k_watchdog.sh b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/sw_to3200k_watchdog.sh similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/sw_to3200k_watchdog.sh rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/sw_to3200k_watchdog.sh diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/wistron_sw_to3200k_util.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/wistron_sw_to3200k_util.py similarity index 100% rename from platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/wistron_sw_to3200k_util.py rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/wistron_sw_to3200k_util.py diff --git a/platform/marvell/docker-saiserver-mrvl/supervisord.conf b/platform/marvell/docker-saiserver-mrvl/supervisord.conf index ccb107b3d1f..ab3bb3b67d6 100644 --- a/platform/marvell/docker-saiserver-mrvl/supervisord.conf +++ b/platform/marvell/docker-saiserver-mrvl/supervisord.conf @@ -8,21 +8,27 @@ command=/usr/bin/start.sh priority=1 autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:rsyslogd] command=/usr/sbin/rsyslogd -n priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:saiserver] command=/usr/sbin/saiserver -p /usr/share/sonic/hwsku/sai.profile -f /usr/share/sonic/hwsku/port_config.ini priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true diff --git a/platform/marvell/docker-syncd-mrvl/supervisord.conf b/platform/marvell/docker-syncd-mrvl/supervisord.conf index 62a28387248..e76ff9baae8 100644 --- a/platform/marvell/docker-syncd-mrvl/supervisord.conf +++ b/platform/marvell/docker-syncd-mrvl/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:syncd] @@ -33,7 +35,9 @@ command=/usr/bin/syncd_start.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running diff --git a/platform/marvell/mrvl-prestera b/platform/marvell/mrvl-prestera index 9608c8c41e4..f3735bec489 160000 --- a/platform/marvell/mrvl-prestera +++ b/platform/marvell/mrvl-prestera @@ -1 +1 @@ -Subproject commit 9608c8c41e462998cd144ed34780e34f1b48e081 +Subproject commit f3735bec489c8475d2dcc0b0b5d5a810a6ee919e diff --git a/platform/marvell/one-image.mk b/platform/marvell/one-image.mk index b58a6179c25..be282e921ab 100644 --- a/platform/marvell/one-image.mk +++ b/platform/marvell/one-image.mk @@ -21,6 +21,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(AC5X_RD98DX35xx_PLATFORM) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(FALCON_DB98CX8580_32CD_PLATFORM) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(FALCON_DB98CX8540_16CD_PLATFORM) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(FALCON_DB98CX8514_10CC_PLATFORM) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(FALCON_DB98CX8522_10CC_PLATFORM) endif ifeq ($(INSTALL_DEBUG_TOOLS),y) $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) diff --git a/platform/marvell/platform-marvell.mk b/platform/marvell/platform-marvell.mk index c4f237757c9..eec94d18a11 100644 --- a/platform/marvell/platform-marvell.mk +++ b/platform/marvell/platform-marvell.mk @@ -36,4 +36,7 @@ FALCON_DB98CX8514_10CC_PLATFORM = sonic-platform-db98cx8514-10cc_$(FALCON_PLATFO $(FALCON_DB98CX8514_10CC_PLATFORM)_PLATFORM = x86_64-marvell_db98cx8514_10cc-r0 $(eval $(call add_extra_package,$(AC5X_RD98DX35xx_PLATFORM),$(FALCON_DB98CX8514_10CC_PLATFORM))) +FALCON_DB98CX8522_10CC_PLATFORM = sonic-platform-db98cx8522-10cc_$(FALCON_PLATFORM_MODULE_VERSION)_$(CONFIGURED_ARCH).deb +$(FALCON_DB98CX8522_10CC_PLATFORM)_PLATFORM = x86_64-marvell_db98cx8522_10cc-r0 +$(eval $(call add_extra_package,$(AC5X_RD98DX35xx_PLATFORM),$(FALCON_DB98CX8522_10CC_PLATFORM))) endif diff --git a/platform/marvell/sonic-platform-marvell b/platform/marvell/sonic-platform-marvell index be63e9c4b33..f6224ee910e 160000 --- a/platform/marvell/sonic-platform-marvell +++ b/platform/marvell/sonic-platform-marvell @@ -1 +1 @@ -Subproject commit be63e9c4b330fd5eabfc5c694fe0231cf25b4425 +Subproject commit f6224ee910e4a7cdb2cc7c245480ec4e21817a27 diff --git a/platform/mellanox/component-versions.dep b/platform/mellanox/component-versions.dep deleted file mode 100644 index 5457ab3d491..00000000000 --- a/platform/mellanox/component-versions.dep +++ /dev/null @@ -1,10 +0,0 @@ -# DPKG FRK - -SPATH := $($(COMPONENT_VERSIONS_FILE)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/component-versions.mk $(PLATFORM_PATH)/component-versions.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files -- $(SPATH)) - -$(COMPONENT_VERSIONS_FILE)_CACHE_MODE := GIT_CONTENT_SHA -$(COMPONENT_VERSIONS_FILE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) -$(COMPONENT_VERSIONS_FILE)_DEP_FILES := $(DEP_FILES) diff --git a/platform/mellanox/docker-saiserver-mlnx/supervisord.conf b/platform/mellanox/docker-saiserver-mlnx/supervisord.conf index e90e4164504..68ca875f045 100644 --- a/platform/mellanox/docker-saiserver-mlnx/supervisord.conf +++ b/platform/mellanox/docker-saiserver-mlnx/supervisord.conf @@ -8,21 +8,27 @@ command=/usr/bin/start.sh priority=1 autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:rsyslogd] command=/usr/sbin/rsyslogd -n priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:saiserver] command=/usr/sbin/saiserver -p /etc/sai/profile.ini -f /etc/sai/portmap.ini priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true diff --git a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 index 62c3c6a9e1c..7b418ab8582 100755 --- a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 +++ b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 @@ -29,7 +29,7 @@ ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update && \ apt-get install -y \ {%- if ENABLE_ASAN == "y" %} - libasan6 \ + libasan8 \ {%- endif %} libxml2 \ python3-pip \ diff --git a/platform/mellanox/docker-syncd-mlnx/supervisord.conf.j2 b/platform/mellanox/docker-syncd-mlnx/supervisord.conf.j2 index c4290d920f5..61f26329440 100644 --- a/platform/mellanox/docker-syncd-mlnx/supervisord.conf.j2 +++ b/platform/mellanox/docker-syncd-mlnx/supervisord.conf.j2 @@ -25,8 +25,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:syncd] @@ -34,8 +36,10 @@ command=/usr/bin/syncd_start.sh priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running {% if ENABLE_ASAN == "y" %} diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk index 8a3f45c0350..c1774f55aed 100644 --- a/platform/mellanox/fw.mk +++ b/platform/mellanox/fw.mk @@ -21,33 +21,33 @@ MLNX_FW_BASE_PATH = $(MLNX_SDK_BASE_PATH) # Place an URL here to FW if you want to download FW instead MLNX_FW_BASE_URL = -SIMX_VERSION = 24.7-1154 +SIMX_VERSION = 25.1-1070 FW_FROM_URL = y -MLNX_FW_ASSETS_RELEASE_TAG = fw-2014.1150 +MLNX_FW_ASSETS_RELEASE_TAG = fw-2014.2164 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG) ifeq ($(MLNX_FW_BASE_URL), ) MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL) endif -MLNX_SPC_FW_VERSION = 13.2014.1150 +MLNX_SPC_FW_VERSION = 13.2014.2164 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE) -MLNX_SPC2_FW_VERSION = 29.2014.1150 +MLNX_SPC2_FW_VERSION = 29.2014.2164 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE) -MLNX_SPC3_FW_VERSION = 30.2014.1150 +MLNX_SPC3_FW_VERSION = 30.2014.2164 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE) -MLNX_SPC4_FW_VERSION = 34.2014.1150 +MLNX_SPC4_FW_VERSION = 34.2014.2164 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE) diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk index 6255e17cef3..ce6e883af3d 100644 --- a/platform/mellanox/hw-management.mk +++ b/platform/mellanox/hw-management.mk @@ -1,5 +1,6 @@ # -# Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -16,7 +17,7 @@ # # Mellanox HW Management -MLNX_HW_MANAGEMENT_VERSION = 7.0040.1011 +MLNX_HW_MANAGEMENT_VERSION = 7.0040.2000 export MLNX_HW_MANAGEMENT_VERSION diff --git a/platform/mellanox/hw-management/0001-Make-SONiC-determine-reboot-cause-service-start-afte.patch b/platform/mellanox/hw-management/0001-Make-SONiC-determine-reboot-cause-service-start-afte.patch index a8fb95786bd..8642d8fa346 100644 --- a/platform/mellanox/hw-management/0001-Make-SONiC-determine-reboot-cause-service-start-afte.patch +++ b/platform/mellanox/hw-management/0001-Make-SONiC-determine-reboot-cause-service-start-afte.patch @@ -1,7 +1,7 @@ -From 5a7bf8934772b94a2414f54cb3e343d0d1d81efd Mon Sep 17 00:00:00 2001 -From: keboliu -Date: Fri, 15 Jan 2021 14:41:16 +0800 -Subject: [PATCH 1/3] Make SONiC determine-reboot-cause service start after +From e588b87a2e80de284ea6e63563e27684acb2f56e Mon Sep 17 00:00:00 2001 +From: davidza +Date: Tue, 15 Oct 2024 09:44:05 +0300 +Subject: [PATCH 1/3] Make SONiC determine-reboot-cause service start after hw-mgmt service Signed-off-by: Kebo Liu @@ -10,17 +10,17 @@ Signed-off-by: Kebo Liu 1 file changed, 1 insertion(+) diff --git a/debian/hw-management.hw-management.service b/debian/hw-management.hw-management.service -index 8bdcaef5..1c25ffb2 100755 +index 4bc1780e..1a50dc3c 100755 --- a/debian/hw-management.hw-management.service +++ b/debian/hw-management.hw-management.service -@@ -1,6 +1,7 @@ - [Unit] +@@ -2,6 +2,7 @@ Description=Chassis HW management service of Mellanox systems Documentation=man:hw-management.service(8) + Wants=hw-management-sync.service +Before=determine-reboot-cause.service [Service] Type=oneshot -- -2.30.2 +2.34.1 diff --git a/platform/mellanox/hw-management/0003-Make-system-health-service-starts-after-hw-managemen.patch b/platform/mellanox/hw-management/0003-Make-system-health-service-starts-after-hw-managemen.patch index 5cbecf74295..18efb60f282 100644 --- a/platform/mellanox/hw-management/0003-Make-system-health-service-starts-after-hw-managemen.patch +++ b/platform/mellanox/hw-management/0003-Make-system-health-service-starts-after-hw-managemen.patch @@ -1,7 +1,7 @@ -From e45320c61765b07f5d73f6c207f9f1d3b4d21721 Mon Sep 17 00:00:00 2001 -From: Stephen Sun -Date: Mon, 28 Nov 2022 03:55:14 +0000 -Subject: [PATCH 3/3] Make system-health service starts after hw-management to +From 69d083e05e39dc82567a338a59a2cefdcd022034 Mon Sep 17 00:00:00 2001 +From: davidza +Date: Tue, 15 Oct 2024 09:51:11 +0300 +Subject: [PATCH 3/3] Make system-health service starts after hw-management to avoid failures On SN2410, it can fail to read the file led_status_capability if it starts from ONIE @@ -12,18 +12,18 @@ Signed-off-by: Stephen Sun 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/debian/hw-management.hw-management.service b/debian/hw-management.hw-management.service -index 1c25ffb2..639bd3cd 100755 +index 1a50dc3c..8a5c0423 100755 --- a/debian/hw-management.hw-management.service +++ b/debian/hw-management.hw-management.service -@@ -1,7 +1,7 @@ - [Unit] +@@ -2,7 +2,7 @@ Description=Chassis HW management service of Mellanox systems Documentation=man:hw-management.service(8) + Wants=hw-management-sync.service -Before=determine-reboot-cause.service +Before=determine-reboot-cause.service system-health.service watchdog-control.service [Service] Type=oneshot -- -2.30.2 +2.34.1 diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt index 164c9ef66b1..6e2f3609d96 160000 --- a/platform/mellanox/hw-management/hw-mgmt +++ b/platform/mellanox/hw-management/hw-mgmt @@ -1 +1 @@ -Subproject commit 164c9ef66b10eb88bad20225d200c048449033cb +Subproject commit 6e2f3609d968e68ae9355339c4478c185ada8896 diff --git a/platform/mellanox/issu-version.mk b/platform/mellanox/issu-version.mk index ee0855c56ce..756ebfb2019 100644 --- a/platform/mellanox/issu-version.mk +++ b/platform/mellanox/issu-version.mk @@ -19,7 +19,7 @@ ISSU_VERSION_FILE = issu-version $(ISSU_VERSION_FILE)_SRC_PATH = $(PLATFORM_PATH)/issu-version -$(ISSU_VERSION_FILE)_DEPENDS += $(APPLIBS) +$(ISSU_VERSION_FILE)_DEPENDS += $(SYSSDK) SONIC_MAKE_FILES += $(ISSU_VERSION_FILE) diff --git a/platform/mellanox/mft.mk b/platform/mellanox/mft.mk index 808ee75987a..f68e12c1828 100644 --- a/platform/mellanox/mft.mk +++ b/platform/mellanox/mft.mk @@ -17,8 +17,8 @@ # # Mellanox SAI -MFT_VERSION = 4.30.0 -MFT_REVISION = 136 +MFT_VERSION = 4.30.2 +MFT_REVISION = 20 MLNX_MFT_INTERNAL_SOURCE_BASE_URL = diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py index bb7eb6a4328..74b096c1e8c 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py @@ -1198,3 +1198,155 @@ def get_sfp(self, index): return None return module.get_sfp(sfp_index - 1) + +class SmartSwitchChassis(Chassis): + def __init__(self): + super(SmartSwitchChassis, self).__init__() + self.module_initialized_count = 0 + self.module_name_index_map = {} + self.initialize_modules() + + def is_modular_chassis(self): + """ + Retrieves whether the sonic instance is part of modular chassis + + Returns: + A bool value, should return False by default or for fixed-platforms. + Should return True for supervisor-cards, line-cards etc running as part + of modular-chassis. + For SmartSwitch platforms this should return True even if they are + fixed-platforms, as they are treated like a modular chassis as the + DPU cards are treated like line-cards of a modular-chassis. + """ + return False + + ############################################## + # Module methods + ############################################## + def initialize_single_module(self, index): + count = self.get_num_modules() + if index < 0: + raise RuntimeError(f"Invalid index = {index} for module initialization with total module count = {count}") + if index >= count: + return + if not self._module_list: + self._module_list = [None] * count + if not self._module_list[index]: + from .module import DpuModule + module = DpuModule(index) + self._module_list[index] = module + self.module_name_index_map[module.get_name()] = index + self.module_initialized_count += 1 + + def initialize_modules(self): + count = self.get_num_modules() + for index in range(count): + self.initialize_single_module(index=index) + + def get_num_modules(self): + """ + Retrieves the number of modules available on this chassis + On a SmarSwitch chassis this includes the number of DPUs. + + Returns: + An integer, the number of modules available on this chassis + """ + return DeviceDataManager.get_dpu_count() + + def get_all_modules(self): + """ + Retrieves all modules available on this chassis. On a SmarSwitch + chassis this includes the number of DPUs. + + Returns: + A list of objects derived from ModuleBase representing all + modules available on this chassis + """ + self.initialize_modules() + return self._module_list + + def get_module(self, index): + """ + Retrieves module represented by (0-based) index + On a SmartSwitch index:0 will fetch switch, index:1 will fetch + DPU0 and so on + + Args: + index: An integer, the index (0-based) of the module to + retrieve + + Returns: + An object dervied from ModuleBase representing the specified + module + """ + self.initialize_single_module(index) + return super(SmartSwitchChassis, self).get_module(index) + + def get_module_index(self, module_name): + """ + Retrieves module index from the module name + + Args: + module_name: A string, prefixed by SUPERVISOR, LINE-CARD or FABRIC-CARD + Ex. SUPERVISOR0, LINE-CARD1, FABRIC-CARD5 + SmartSwitch Example: SWITCH, DPU1, DPU2 ... DPUX + + Returns: + An integer, the index of the ModuleBase object in the module_list + """ + return self.module_name_index_map[module_name.upper()] + + ############################################## + # SmartSwitch methods + ############################################## + + def get_dpu_id(self, name): + """ + Retrieves the DPU ID for the given dpu-module name. + Returns None for non-smartswitch chassis. + Returns: + An integer, indicating the DPU ID Ex: name:DPU0 return value 1, + name:DPU1 return value 2, name:DPUX return value X+1 + """ + module = self.get_module(self.get_module_index(name)) + return module.get_dpu_id() + + def is_smartswitch(self): + """ + Retrieves whether the sonic instance is part of smartswitch + Returns: + Returns:True for SmartSwitch and False for other platforms + """ + return True + + def init_midplane_switch(self): + """ + Initializes the midplane functionality of the modular chassis. For + example, any validation of midplane, populating any lookup tables etc + can be done here. The expectation is that the required kernel modules, + ip-address assignment etc are done before the pmon, database dockers + are up. + + Returns: + A bool value, should return True if the midplane initialized + successfully. + """ + return True + + def get_module_dpu_data_port(self, index): + """ + Retrieves the DPU data port NPU-DPU association represented for + the DPU index. Platforms that need to overwrite the platform.json + file will use this API. This is valid only on the Switch and not on DPUs + Args: + index: An integer, the index of the module to retrieve + Returns: + A string giving the NPU-DPU port association: + Ex: For index: 1 will return the dup0 port association which is + "Ethernet-BP0: Ethernet0" where the string left of ":" (Ethernet-BP0) + is the NPU port and the string right of ":" (Ethernet0) is the DPU port + """ + platform_dpus_data = DeviceDataManager.get_platform_dpus_data() + module = self._module_list[index] + module_name = module.get_name() + return platform_dpus_data[module_name.lower()]["interface"] diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py index e0592fd58fe..2f2eee7b871 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py @@ -1,6 +1,7 @@ # -# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -19,12 +20,22 @@ import os import time import re +from enum import Enum from . import utils from sonic_py_common.general import check_output_pipe DEFAULT_WD_PERIOD = 65535 + +class DpuInterfaceEnum(Enum): + MIDPLANE_INT = "midplane_interface" + RSHIM_INT = "rshim_info" + PCIE_INT = "bus_info" + + +dpu_interface_values = [item.value for item in DpuInterfaceEnum] + DEVICE_DATA = { 'x86_64-mlnx_msn2700-r0': { 'thermal': { @@ -271,16 +282,26 @@ def get_linecard_max_port_count(cls): @classmethod @utils.read_only_cache() def get_platform_dpus_data(cls): - json_data = cls.get_platform_json_data() + from sonic_py_common import device_info + platform_path = device_info.get_path_to_platform_dir() + platform_json_path = os.path.join(platform_path, 'platform.json') + json_data = utils.load_json_file(platform_json_path) return json_data.get('DPUS', None) + @classmethod + def get_dpu_interface(cls, dpu, interface): + dpu_data = cls.get_platform_dpus_data() + if (not dpu_data) or (interface not in dpu_interface_values): + return None + return dpu_data.get(dpu, {}).get(interface) + @classmethod @utils.read_only_cache() - def get_platform_json_data(cls): - from sonic_py_common import device_info - platform_path = device_info.get_path_to_platform_dir() - platform_json_path = os.path.join(platform_path, 'platform.json') - return utils.load_json_file(platform_json_path) + def get_dpu_count(cls): + dpu_data = cls.get_platform_dpus_data() + if not dpu_data: + return 0 + return len(dpu_data) @classmethod def get_bios_component(cls): diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/dpu_vpd_parser.py b/platform/mellanox/mlnx-platform-api/sonic_platform/dpu_vpd_parser.py new file mode 100644 index 00000000000..3347a55aa56 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/dpu_vpd_parser.py @@ -0,0 +1,46 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from .vpd_parser import VpdParser + + +class DpuVpdParser(VpdParser): + """DPU Specific VPD parser""" + def __init__(self, file_path, dpu_name): + super(DpuVpdParser, self).__init__(file_path=file_path) + self.dpu_name = dpu_name + + def get_dpu_data(self, key=None): + """Retrieves VPD Entry for DPU Specific Key""" + return self.get_entry_value(f"{self.dpu_name}_{key}") + + def get_dpu_base_mac(self): + """Retrieves VPD Entry for DPU Specific Mac Address""" + return self.get_dpu_data("BASE_MAC") + + def get_dpu_serial(self): + """Retrieves VPD Entry for DPU Specific Serial Number""" + return self.get_dpu_data("SN") + + def get_dpu_revision(self): + """Retrieves VPD Entry for DPU Specific Revision""" + return self.get_dpu_data("REV") + + def get_dpu_model(self): + """Retrieves VPD Entry for DPU Specific Model Number""" + return self.get_dpu_data("PN") diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py index 12281db1e78..b66f1be2daa 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py @@ -1,5 +1,6 @@ # -# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -28,6 +29,7 @@ from .inotify_helper import InotifyHelper from sonic_py_common.syslogger import SysLogger from . import utils + from .device_data import DeviceDataManager, DpuInterfaceEnum except ImportError as e: raise ImportError(str(e)) from e @@ -48,6 +50,7 @@ class OperationType(Enum): CLR = "0" SET = "1" + class BootProgEnum(Enum): RST = 0 BL2 = 1 @@ -63,20 +66,13 @@ class BootProgEnum(Enum): FW_FAULT_DONE = 11 SW_INACTIVE = 15 -# The rshim services are in a different order as compared to the DPU names -dpu_map = { - "dpu1": {"pci_id": "0000:08:00.0", "rshim": "rshim@0"}, - "dpu2": {"pci_id": "0000:07:00.0", "rshim": "rshim@1"}, - "dpu3": {"pci_id": "0000:01:00.0", "rshim": "rshim@2"}, - "dpu4": {"pci_id": "0000:02:00.0", "rshim": "rshim@3"}, -} - class DpuCtlPlat(): """Class for Per DPU API Call""" def __init__(self, dpu_name): self.dpu_name = dpu_name self._name = self.get_hwmgmt_name() + self.dpu_id = int(self.dpu_name[3:]) self.rst_path = os.path.join(SYSTEM_BASE, f"{self._name}_rst") self.pwr_path = os.path.join(SYSTEM_BASE, @@ -89,9 +85,6 @@ def __init__(self, dpu_name): f"{self._name}_shtdn_ready") self.boot_prog_path = os.path.join(HW_BASE, f"{self._name}/system/boot_progress") - self.pci_dev_path = os.path.join(PCI_DEV_BASE, - dpu_map[self._name]["pci_id"], - "remove") self.boot_prog_map = { BootProgEnum.RST.value: "Reset/Boot-ROM", BootProgEnum.BL2.value: "BL2 (from ATF image on eMMC partition)", @@ -111,6 +104,10 @@ def __init__(self, dpu_name): self.shtdn_state = None self.dpu_ready_state = None self.setup_logger() + self.pci_dev_path = None + self.rshim_interface = None + # Use systemd dbus to execute start and stop rshim service + os.environ['DBUS_SESSION_BUS_ADDRESS'] = 'unix:path=/run/dbus/system_bus_socket' self.verbosity = False def setup_logger(self, use_print=False): @@ -125,8 +122,7 @@ def setup_logger(self, use_print=False): def log_debug(self, msg=None): # Print only in verbose mode - if self.verbosity: - self.logger_debug(f"{self.dpu_name}: {msg}") + self.logger_debug(f"{self.dpu_name}: {msg}") def log_info(self, msg=None): self.logger_info(f"{self.dpu_name}: {msg}") @@ -134,32 +130,56 @@ def log_info(self, msg=None): def log_error(self, msg=None): self.logger_error(f"{self.dpu_name}: {msg}") - def run_cmd_output(self, cmd): + def run_cmd_output(self, cmd, raise_exception=True): try: - subprocess.check_output(cmd) + return subprocess.check_output(cmd).decode().strip() except Exception as err: - self.log_error(f"Failed to run cmd {' '.join(cmd)}") - raise err + if raise_exception: + raise err + else: + self.log_debug(f"Failed to run cmd {' '.join(cmd)}") def dpu_pre_shutdown(self): """Method to execute shutdown activities for the DPU""" - self.dpu_rshim_service_control("stop") - self.dpu_pci_remove() + rshim_op = self.dpu_rshim_service_control("stop") + pci_rem_op = self.dpu_pci_remove() + return rshim_op and pci_rem_op def dpu_post_startup(self): """Method to execute all post startup activities for the DPU""" - self.dpu_pci_scan() - self.wait_for_pci() - self.dpu_rshim_service_control("start") - - def dpu_rshim_service_control(self, set_state): + pci_scan_op = self.dpu_pci_scan() + rshim_op = None + if self.wait_for_pci(): + rshim_op = self.dpu_rshim_service_control("start") + if rshim_op and pci_scan_op: + return True + return False + + def get_rshim_interface(self): + """Parse the rshim interface from platform.json, raise Runtime error if the device id is not available""" + if not self.rshim_interface: + interface_name = DeviceDataManager.get_dpu_interface(self.dpu_name, DpuInterfaceEnum.RSHIM_INT.value) + if not interface_name: + raise RuntimeError(f"Unable to Parse rshim information for {self.dpu_name} from Platform.json") + # rshim1 -> rshim@1 + self.rshim_interface = interface_name[:5] + "@" + interface_name[5:] + return self.rshim_interface + + def dpu_rshim_service_control(self, op): """Start/Stop the RSHIM service for the current DPU""" try: - cmd = ['systemctl', set_state, dpu_map[self.get_hwmgmt_name()]['rshim'] + ".service"] - self.run_cmd_output(cmd) - self.log_debug(f"Executed rshim service command: {' '.join(cmd)}") - except Exception: - self.log_error(f"Failed to start rshim!") + rshim_cmd = ["dbus-send", "--dest=org.freedesktop.systemd1", "--type=method_call", + "--print-reply", "--reply-timeout=2000", + "/org/freedesktop/systemd1", + f"org.freedesktop.systemd1.Manager.{op.capitalize()}Unit", + f"string:{self.get_rshim_interface()}.service", + "string:replace"] + self.run_cmd_output(rshim_cmd) + # If command fails execution exception is raised , return true if control is still in try block + return True + except Exception as e: + self.log_error(f"Failed to {op} rshim!: {e}") + return False @contextmanager def get_open_fd(self, path, flag): @@ -169,11 +189,20 @@ def get_open_fd(self, path, flag): finally: os.close(fd) + def get_pci_dev_path(self): + """Parse the PCIE device ID from platform.json, raise Runtime error if the device id is not available""" + if not self.pci_dev_path: + pci_dev_id = DeviceDataManager.get_dpu_interface(self.dpu_name, DpuInterfaceEnum.PCIE_INT.value) + if not pci_dev_id: + raise RuntimeError(f"Unable to obtain pci device id for {self.dpu_name} from platform.json") + self.pci_dev_path = os.path.join(PCI_DEV_BASE, pci_dev_id, "remove") + return self.pci_dev_path + def wait_for_pci(self): """Wait for the PCI device folder in the PCI Path, required before starting rshim""" try: with self.get_open_fd(PCI_DEV_BASE, os.O_RDONLY) as dir_fd: - if os.path.exists(os.path.dirname(self.pci_dev_path)): + if os.path.exists(os.path.dirname(self.get_pci_dev_path())): return True poll_obj = poll() poll_obj.register(dir_fd, POLLIN) @@ -181,11 +210,11 @@ def wait_for_pci(self): while (time.time() - start) < WAIT_FOR_PCI_DEV: events = poll_obj.poll(WAIT_FOR_PCI_DEV * 1000) if events: - if os.path.exists(os.path.dirname(self.pci_dev_path)): + if os.path.exists(os.path.dirname(self.get_pci_dev_path())): return True - return os.path.exists(os.path.dirname(self.pci_dev_path)) - except Exception: - self.log_error("Unable to wait for PCI device") + return os.path.exists(os.path.dirname(self.get_pci_dev_path())) + except Exception as e: + self.log_error(f"Unable to wait for PCI device:{e}") def write_file(self, file_name, content_towrite): """Write given value to file only if file exists""" @@ -229,12 +258,15 @@ def _power_off_force(self): self.log_info(f"Force Power Off complete") return True - def _power_on_force(self, count=4): + def _power_on_force(self, count=4, no_wait=False): """Per DPU Power on with force private function""" if count < 4: self.log_error(f"Failed Force Power on! Retry {4-count}..") self.write_file(self.pwr_f_path, OperationType.SET.value) self.write_file(self.rst_path, OperationType.SET.value) + if no_wait: + self.log_debug("Exiting without checking result of reboot command") + return True get_rdy_inotify = InotifyHelper(self.dpu_rdy_path) with self.time_check_context("power on force"): dpu_rdy = get_rdy_inotify.wait_watch(WAIT_FOR_DPU_READY, 1) @@ -265,20 +297,30 @@ def _power_on(self): def dpu_pci_remove(self): """Per DPU PCI remove API""" try: - self.write_file(self.pci_dev_path, OperationType.SET.value) + self.write_file(self.get_pci_dev_path(), OperationType.SET.value) + return True except Exception: self.log_info(f"Failed PCI Removal!") + return False def dpu_pci_scan(self): """PCI Scan API""" - pci_scan_path = "/sys/bus/pci/rescan" - self.write_file(pci_scan_path, OperationType.SET.value) + try: + pci_scan_path = "/sys/bus/pci/rescan" + self.write_file(pci_scan_path, OperationType.SET.value) + return True + except Exception: + self.log_info(f"Failed to rescan") + return False def dpu_power_on(self, forced=False): """Per DPU Power on API""" with self.boot_prog_context(): self.log_info(f"Power on with force = {forced}") - if forced: + if self.read_boot_prog() == BootProgEnum.OS_RUN.value: + self.log_info(f"Skipping DPU power on as DPU is already powered on") + return_value = True + elif forced: return_value = self._power_on_force() else: return_value = self._power_on() @@ -290,18 +332,24 @@ def dpu_power_off(self, forced=False): with self.boot_prog_context(): self.dpu_pre_shutdown() self.log_info(f"Power off with force = {forced}") - if forced: + if self.read_boot_prog() == BootProgEnum.RST.value: + self.log_info(f"Skipping DPU power off as DPU is already powered off") + return True + elif forced: return self._power_off_force() elif self.read_boot_prog() != BootProgEnum.OS_RUN.value: self.log_info(f"Power off with force = True since since OS is not in running state on DPU") return self._power_off_force() return self._power_off() - def _reboot(self): + def _reboot(self, no_wait): """Per DPU Reboot Private function API""" if not self.dpu_go_down(): self._power_off_force() self.write_file(self.rst_path, OperationType.SET.value) + if no_wait: + self.log_debug("Exiting without checking result of reboot command") + return True get_rdy_inotify = InotifyHelper(self.dpu_rdy_path) with self.time_check_context("power on"): dpu_rdy = get_rdy_inotify.wait_watch(WAIT_FOR_DPU_READY, 1) @@ -311,25 +359,28 @@ def _reboot(self): return_value = self._power_on_force() return return_value - def _reboot_force(self): + def _reboot_force(self, no_wait): """Per DPU Force Reboot Private function API""" self._power_off_force() - return_value = self._power_on_force() + return_value = self._power_on_force(no_wait=no_wait) return return_value - def dpu_reboot(self, forced=False): + def dpu_reboot(self, forced=False, no_wait=False, skip_pre_post=False): """Per DPU Power on API""" with self.boot_prog_context(): - self.dpu_pre_shutdown() + if not skip_pre_post: + self.dpu_pre_shutdown() self.log_info(f"Reboot with force = {forced}") if forced: - return_value = self._reboot_force() + return_value = self._reboot_force(no_wait) elif self.read_boot_prog() != BootProgEnum.OS_RUN.value: self.log_info(f"Reboot with force = True since OS is not in running state on DPU") - return_value = self._reboot_force() + return_value = self._reboot_force(no_wait) else: - return_value = self._reboot() - self.dpu_post_startup() + return_value = self._reboot(no_wait) + # No Post startup as well for no_wait call + if (not no_wait) and (not skip_pre_post): + self.dpu_post_startup() if return_value: self.log_info("Reboot Complete") return return_value diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/module.py b/platform/mellanox/mlnx-platform-api/sonic_platform/module.py index 765314d7baf..7dc5167473e 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/module.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/module.py @@ -1,6 +1,7 @@ # -# Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -18,14 +19,19 @@ import redis import threading from sonic_platform_base.module_base import ModuleBase -from sonic_py_common.logger import Logger +from sonic_platform_base.chassis_base import ChassisBase +from sonic_py_common.syslogger import SysLogger +from .dpuctlplat import DpuCtlPlat, BootProgEnum +import subprocess from . import utils -from .device_data import DeviceDataManager +from .device_data import DeviceDataManager, DpuInterfaceEnum from .vpd_parser import VpdParser +from .dpu_vpd_parser import DpuVpdParser +from swsscommon.swsscommon import ConfigDBConnector, SonicV2Connector # Global logger class instance -logger = Logger() +logger = SysLogger() class Module(ModuleBase): @@ -247,3 +253,290 @@ def get_sfp(self, index): with self.lock: self.initialize_single_sfp(index) return super(Module, self).get_sfp(index) + + +class DpuModule(ModuleBase): + + def __init__(self, dpu_id): + super(DpuModule, self).__init__() + self.dpu_id = dpu_id + self._name = f"DPU{self.dpu_id}" + self.dpuctl_obj = DpuCtlPlat(self._name.lower()) + self.fault_state = False + self.dpu_vpd_parser = DpuVpdParser('/var/run/hw-management/eeprom/vpd_data', self.dpuctl_obj._name.upper()) + self.CONFIG_DB_NAME = "CONFIG_DB" + self.DHCP_SERVER_HASH = f"DHCP_SERVER_IPV4_PORT|bridge-midplane|{self._name.lower()}" + self.DHCP_IP_ADDRESS_KEY = "ips@" + self.config_db = ConfigDBConnector(use_unix_socket_path=True) + self.config_db.connect() + self.midplane_ip = None + self.midplane_interface = None + self.bus_info = None + self.reboot_base_path = f"/var/run/hw-management/{self.dpuctl_obj._name}/system/" + self.reboot_cause_map = { + f'{self.reboot_base_path}reset_aux_pwr_or_reload': + (ChassisBase.REBOOT_CAUSE_POWER_LOSS, 'power auxiliary outage or reload'), + f'{self.reboot_base_path}reset_comex_pwr_fail': + (ChassisBase.REBOOT_CAUSE_POWER_LOSS, 'Power failed to comex module'), + f'{self.reboot_base_path}reset_from_main_board': + (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, 'Reset from Main board'), + f'{self.reboot_base_path}reset_dpu_thermal': + (ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER, 'Thermal shutdown of the DPU'), + } + self.chassis_state_db = SonicV2Connector(host="127.0.0.1") + self.chassis_state_db.connect(self.chassis_state_db.CHASSIS_STATE_DB) + + def get_base_mac(self): + """ + Retrieves the base MAC address for the module + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self.dpu_vpd_parser.get_dpu_base_mac() + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + return self.dpu_vpd_parser.get_dpu_model() + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + return self.dpu_vpd_parser.get_dpu_serial() + + def get_revision(self): + """ + Retrieves the hardware revision of the device + + Returns: + string: Revision value of device + """ + return self.dpu_vpd_parser.get_dpu_revision() + + def reboot(self, reboot_type=ModuleBase.MODULE_REBOOT_DPU): + """ + Request to reboot the module + + Args: + reboot_type: A string, the type of reboot requested from one of the + predefined reboot types: MODULE_REBOOT_DEFAULT, MODULE_REBOOT_CPU_COMPLEX, + MODULE_REBOOT_FPGA_COMPLEX or MODULE_REBOOT_DPU + + MODULE_REBOOT_DPU is only applicable for smartswitch chassis. + + Returns: + bool: True if the request has been issued successfully, False if not + """ + # Skip pre shutdown and Post startup, handled by pci_detach and pci_reattach + if reboot_type == ModuleBase.MODULE_REBOOT_DPU: + return self.dpuctl_obj.dpu_reboot(skip_pre_post=True) + elif reboot_type == ModuleBase.MODULE_REBOOT_SMARTSWITCH: + # Do not wait for result if we are rebooting NPU + DPUs + return self.dpuctl_obj.dpu_reboot(no_wait=True, skip_pre_post=True) + raise RuntimeError(f"Invalid Reboot Type provided for {self._name}: {reboot_type}") + + def set_admin_state(self, up): + """ + Request to keep the card in administratively up/down state. + The down state will power down the module and the status should show + MODULE_STATUS_OFFLINE. + The up state will take the module to MODULE_STATUS_FAULT or + MODULE_STATUS_ONLINE states. + + Args: + up: A boolean, True to set the admin-state to UP. False to set the + admin-state to DOWN. + + Returns: + bool: True if the request has been issued successfully, False if not + """ + if up: + if self.dpuctl_obj.dpu_power_on(): + return True + logger.log_error(f"Failed to set the admin state for {self._name}") + return False + return self.dpuctl_obj.dpu_power_off() + + def get_type(self): + """ + Retrieves the type of the module. + + Returns: + A string, the module-type from one of the predefined types: + MODULE_TYPE_SUPERVISOR, MODULE_TYPE_LINE or MODULE_TYPE_FABRIC + or MODULE_TYPE_DPU or MODULE_TYPE_SWITCH + """ + return ModuleBase.MODULE_TYPE_DPU + + def get_name(self): + """ + Retrieves the type of the module. + + Returns: + A string, the module-type from one of the predefined types: + MODULE_TYPE_SUPERVISOR, MODULE_TYPE_LINE or MODULE_TYPE_FABRIC + or MODULE_TYPE_DPU + """ + return self._name + + def get_description(self): + """ + Retrieves the platform vendor's product description of the module + + Returns: + A string, providing the vendor's product description of the module. + """ + return "NVIDIA BlueField-3 DPU" + + def get_oper_status(self): + boot_prog = self.dpuctl_obj.read_boot_prog() + if boot_prog == BootProgEnum.OS_RUN.value: + return ModuleBase.MODULE_STATUS_ONLINE + return ModuleBase.MODULE_STATUS_OFFLINE + + ############################################## + # SmartSwitch methods + ############################################## + + def get_dpu_id(self): + """ + Retrieves the DPU ID. Returns None for non-smartswitch chassis. + + Returns: + An integer, indicating the DPU ID. DPU0 returns 0, DPUX returns X + DPU ID can be greater than or equal to 0. + """ + return self.dpu_id + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot of the DPU module + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must + be one of the predefined strings in this class. If the first + string is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be + used to pass a description of the reboot cause. + Some more causes are appended to the existing list to handle other + modules such as DPUs. + Ex: REBOOT_CAUSE_POWER_LOSS, REBOOT_CAUSE_HOST_RESET_DPU, + REBOOT_CAUSE_HOST_POWERCYCLED_DPU, REBOOT_CAUSE_SW_THERMAL, + REBOOT_CAUSE_DPU_SELF_REBOOT + """ + for f, rd in self.reboot_cause_map.items(): + if utils.read_int_from_file(f) == 1: + return rd + return ChassisBase.REBOOT_CAUSE_NON_HARDWARE, '' + + def get_midplane_ip(self): + """ + Retrieves the midplane IP-address of the module in a modular chassis + When called from the Supervisor, the module could represent the + line-card and return the midplane IP-address of the line-card. + When called from the line-card, the module will represent the + Supervisor and return its midplane IP-address. + When called from the DPU, returns the midplane IP-address of the dpu-card. + When called from the Switch returns the midplane IP-address of Switch. + Returns: + A string, the IP-address of the module reachable over the midplane + """ + if not self.midplane_ip: + self.midplane_ip = self.config_db.get(self.CONFIG_DB_NAME, self.DHCP_SERVER_HASH, self.DHCP_IP_ADDRESS_KEY) + return self.midplane_ip + + def is_midplane_reachable(self): + """ + Retrieves the reachability status of the module from the Supervisor or + of the Supervisor from the module via the midplane of the modular chassis + Returns: + A bool value, should return True if module is reachable via midplane + """ + if not self._is_midplane_up(): + return False + command = ['ping', '-c', '1', '-W', '1', self.get_midplane_ip()] + try: + return subprocess.call(command, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL) == 0 + except Exception as e: + logger.log_error(f"Failed to check midplane reachability for {self.get_name()}! {e}") + return False + + def get_midplane_interface(self): + if not self.midplane_interface: + # Cache the data to prevent multiple platform.json parsing + self.midplane_interface = DeviceDataManager.get_dpu_interface(self.get_name().lower(), DpuInterfaceEnum.MIDPLANE_INT.value) + # If we are unable to parse platform.json for midplane interface raise RunTimeError + if not self.midplane_interface: + raise RuntimeError(f"Unable to obtain midplane interface information from platform.json for {self.get_name()}") + return self.midplane_interface + + def _is_midplane_up(self): + # If rshim is not activated then the interface does not exist, do not log the error + return utils.read_int_from_file(f'/sys/class/net/{self.get_midplane_interface()}/carrier', log_func=None) == 1 + + def get_pci_bus_info(self): + """ + Retrieves the bus information. + + Returns: + Returns the PCI bus information in BDF format like "[DDDD:]BB:SS:F" + """ + if not self.bus_info: + # Cache the data to prevent multiple platform.json parsing + self.bus_info = DeviceDataManager.get_dpu_interface(self.get_name().lower(), DpuInterfaceEnum.PCIE_INT.value) + # If we are unable to parse platform.json for midplane interface raise RunTimeError + if not self.bus_info: + raise RuntimeError(f"Unable to obtain bus info from platform.json for {self.get_name()}") + return self.bus_info + + def pci_detach(self): + """ + Detaches the DPU PCI device specified by "module_name" on a SmartSwitch. + + Returns: True once the PCI is successfully detached. + """ + return self.dpuctl_obj.dpu_pre_shutdown() + + def pci_reattach(self): + """ + Rescans and reconnects the DPU PCI device specified by "module_name" on a SmartSwitch. + + Returns: True once the PCI is successfully reconnected. + """ + return self.dpuctl_obj.dpu_post_startup() + + def get_hw_mgmt_id(self): + """ + Obtains the id used by hw-mgmt API, so that we can use different APIs and access sysfs files provided + """ + return self.dpu_id + 1 + + def get_temperature_dict(self): + """ + This function is used to obtain the TEMPERATURE INFO TABLE from CHASSIS_STATE_DB + """ + chassis_state_db_name = "CHASSIS_STATE_DB" + ddr = "DDR" + nvme = "NVME" + cpu = "CPU" + dpu_ddr_temperature_info_table = f"TEMPERATURE_INFO_{self.dpu_id}|{ddr}" + dpu_cpu_temperature_info_table = f"TEMPERATURE_INFO_{self.dpu_id}|{cpu}" + dpu_drive_temperature_info_table = f"TEMPERATURE_INFO_{self.dpu_id}|{nvme}" + return_dict = {} + try: + return_dict[ddr] = self.chassis_state_db.get_all(chassis_state_db_name, dpu_ddr_temperature_info_table) + return_dict[cpu] = self.chassis_state_db.get_all(chassis_state_db_name, dpu_cpu_temperature_info_table) + return_dict[nvme] = self.chassis_state_db.get_all(chassis_state_db_name, dpu_drive_temperature_info_table) + except Exception as e: + logger.log_error(f"Failed to check obtain DPU temperature informatoin for {self.get_name()}! {e}") + return {} + return return_dict diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py b/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py index 9100e8fb2f2..eb60329e7e0 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py @@ -1,6 +1,7 @@ # -# Copyright (c) 2019-2021 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -22,7 +23,7 @@ try: from sonic_platform_base.platform_base import PlatformBase - from .chassis import Chassis, ModularChassis + from .chassis import Chassis, ModularChassis, SmartSwitchChassis from .device_data import DeviceDataManager except ImportError as e: raise ImportError(str(e) + "- required module not found") @@ -30,7 +31,9 @@ class Platform(PlatformBase): def __init__(self): PlatformBase.__init__(self) - if DeviceDataManager.get_linecard_count() == 0: + if DeviceDataManager.get_dpu_count(): + self._chassis = SmartSwitchChassis() + elif DeviceDataManager.get_linecard_count() == 0: self._chassis = Chassis() else: self._chassis = ModularChassis() diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py index aa3e188ae5f..0e76f947b83 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py @@ -1,5 +1,6 @@ # -# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -675,7 +676,8 @@ def get_error_description(self): """ try: if self.is_sw_control(): - return 'Not supported' + api = self.get_xcvr_api() + return api.get_error_description() if api else None except: return self.SFP_STATUS_INITIALIZING diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/smartswitch_thermal_updater.py b/platform/mellanox/mlnx-platform-api/sonic_platform/smartswitch_thermal_updater.py new file mode 100644 index 00000000000..da2253e77c3 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/smartswitch_thermal_updater.py @@ -0,0 +1,152 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from . import utils +from .thermal_updater import ThermalUpdater +from sonic_py_common import logger + +import sys + +sys.path.append('/run/hw-management/bin') + +try: + import hw_management_dpu_thermal_update +except ImportError: + # For unit test and for non-smartswitch systems, these functions should not be called + from unittest import mock + hw_management_dpu_thermal_update = mock.MagicMock() + hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set = mock.MagicMock() + hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set = mock.MagicMock() + hw_management_dpu_thermal_update.thermal_data_dpu_drive_set = mock.MagicMock() + hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear = mock.MagicMock() + hw_management_dpu_thermal_update.thermal_data_dpu_ddr_clear = mock.MagicMock() + hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear = mock.MagicMock() + +CRIT_THRESH = "critical_high_threshold" +HIGH_THRESH = "high_threshold" +TEMPERATURE_DATA = "temperature" +DPU_STATUS_OFFLINE = "Offline" +DPU_STATUS_ONLINE = "Online" +CPU_FIELD = "CPU" +NVME_FIELD = "NVME" +DDR_FIELD = "DDR" +dpu_func_dict = { + CPU_FIELD: hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set, + NVME_FIELD: hw_management_dpu_thermal_update.thermal_data_dpu_drive_set, + DDR_FIELD: hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set, + } + +ERROR_READ_THERMAL_DATA = 254000 + +TC_CONFIG_FILE = '/run/hw-management/config/tc_config.json' +logger = logger.Logger('smart-switch-thermal-updater') + + +class SmartswitchThermalUpdater(ThermalUpdater): + def __init__(self, sfp_list, dpu_list, is_host_mgmt_mode=True): + super().__init__(sfp_list=sfp_list) + self._dpu_list = dpu_list + self._dpu_status = {} + self.host_mgmt_mode = is_host_mgmt_mode + + def load_tc_config_dpu(self): + dpu_poll_interval = 3 + data = utils.load_json_file(TC_CONFIG_FILE, log_func=None) + if data: + dev_parameters = data.get('dev_parameters', {}) + dpu_parameter = dev_parameters.get('dpu\\d+_module', {}) + dpu_poll_interval_config = dpu_parameter.get('poll_time') + dpu_poll_interval = int(dpu_poll_interval_config) / 2 if dpu_poll_interval_config else dpu_poll_interval + else: + logger.log_notice(f'{TC_CONFIG_FILE} does not exist, use default polling interval') + logger.log_notice(f'DPU polling interval: {dpu_poll_interval}') + self._timer.schedule(dpu_poll_interval, self.update_dpu) + + def start(self): + self.clean_thermal_data_dpu() + self.load_tc_config_dpu() + if self.host_mgmt_mode: + super().start() + else: + self._timer.start() + + def stop(self): + if self.host_mgmt_mode: + super().stop() + else: + self._timer.stop() + + def clean_thermal_data_dpu(self): + for dpu in self._dpu_list: + self.thermal_data_dpu_clear(dpu.get_hw_mgmt_id()) + + def thermal_data_dpu_clear(self, dpu_index): + hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear(dpu_index) + hw_management_dpu_thermal_update.thermal_data_dpu_ddr_clear(dpu_index) + hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear(dpu_index) + + def get_dpu_temperature_data_from_dict_obj(self, dpu_component_temperature_data, field_name): + value = dpu_component_temperature_data.get(field_name) + fault_state = False + if not value: + fault_state = True + return 0, fault_state + try: + int_value = int(float(value)) + except ValueError: + logger.log_error(f"Unable to obtain temperature data for DPU {field_name}: {value}") + int_value = 0 + fault_state = True + return int_value, fault_state + + def get_dpu_component_temperature_data(self, dpu_temperature_data, component_name): + dpu_component_temperature_data = dpu_temperature_data.get(component_name, {}) + output_dict = {} + output_false_state = False + for value in [TEMPERATURE_DATA, HIGH_THRESH, CRIT_THRESH]: + output_dict[value], fault_state = self.get_dpu_temperature_data_from_dict_obj(dpu_component_temperature_data, value) + output_false_state = output_false_state or fault_state + return output_dict[TEMPERATURE_DATA], output_dict[HIGH_THRESH], output_dict[CRIT_THRESH], ERROR_READ_THERMAL_DATA if output_false_state else 0 + + def update_dpu_temperature(self, dpu, fault_state=False): + dpu_temperature_data = dpu.get_temperature_dict() if not fault_state else {} + for key, func in dpu_func_dict.items(): + temp_data, temp_thresh, temp_crit_thresh, fault_val = self.get_dpu_component_temperature_data(dpu_temperature_data, key) + return_val = func(dpu.get_hw_mgmt_id(), temp_data, temp_thresh, temp_crit_thresh, fault_val) + if not return_val: + logger.log_error(f"Unable to update Temperature data to hw-mgmt for {key} for {dpu.get_name()}") + + def update_single_dpu(self, dpu): + try: + dpu_oper_status = dpu.get_oper_status() + pre_oper_status = self._dpu_status.get(dpu.get_name()) + if dpu_oper_status == DPU_STATUS_ONLINE: + self.update_dpu_temperature(dpu) + elif pre_oper_status != dpu_oper_status: + # If dpu is shutdown from previous execution + self.thermal_data_dpu_clear(dpu.get_hw_mgmt_id()) + if pre_oper_status != dpu_oper_status: + # If there is a change in oper_status (irrespective of type of change) + self._dpu_status[dpu.get_name()] = dpu_oper_status + except Exception as e: + logger.log_error(f'Failed to update DPU {dpu.get_hw_mgmt_id()} thermal data - {e}') + self.update_dpu_temperature(dpu, fault_state=True) + + def update_dpu(self): + for dpu in self._dpu_list: + self.update_single_dpu(dpu) diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py index 3512a0cf52e..813c5e8eefb 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py @@ -15,7 +15,8 @@ # limitations under the License. # from sonic_platform_base.sonic_thermal_control.thermal_manager_base import ThermalManagerBase -from . import thermal_updater +from . import thermal_updater +from . import smartswitch_thermal_updater from .device_data import DeviceDataManager @@ -33,12 +34,21 @@ def initialize(cls): and any other vendor specific initialization. :return: """ - if DeviceDataManager.is_module_host_management_mode(): + dpus_present = DeviceDataManager.get_platform_dpus_data() + host_mgmt_mode = DeviceDataManager.is_module_host_management_mode() + if not dpus_present and host_mgmt_mode: + # Non smart switch behaviour has highest priority from .chassis import Chassis - cls.thermal_updater_task = thermal_updater.ThermalUpdater(Chassis.chassis_instance.get_all_sfps()) + cls.thermal_updater_task = thermal_updater.ThermalUpdater(sfp_list=Chassis.chassis_instance.get_all_sfps()) + elif dpus_present: + from .chassis import Chassis + dpus = Chassis.chassis_instance.get_all_modules() + cls.thermal_updater_task = smartswitch_thermal_updater.SmartswitchThermalUpdater(sfp_list=Chassis.chassis_instance.get_all_sfps(), + dpu_list=dpus, + is_host_mgmt_mode=host_mgmt_mode) + if cls.thermal_updater_task: cls.thermal_updater_task.start() - @classmethod def deinitialize(cls): """ @@ -46,5 +56,5 @@ def deinitialize(cls): is a no-op. :return: """ - if DeviceDataManager.is_module_host_management_mode() and cls.thermal_updater_task: + if cls.thermal_updater_task: cls.thermal_updater_task.stop() diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py index 77aad4a315c..190299d3733 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py @@ -1,6 +1,7 @@ # -# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -105,7 +106,7 @@ def read_float_from_file(file_path, default=0.0, raise_exception=False, log_func def _key_value_converter(content, delimeter): ret = {} for line in content.splitlines(): - k,v = line.split(delimeter) + k,v = line.split(delimeter, 1) ret[k.strip()] = v.strip() return ret diff --git a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py index 19ceb7f2995..f07f164b730 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py @@ -1,6 +1,7 @@ # -# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -20,6 +21,7 @@ import sys import subprocess import threading +import pytest from mock import MagicMock if sys.version_info.major == 3: @@ -33,7 +35,7 @@ import sonic_platform.chassis from sonic_platform_base.sfp_base import SfpBase -from sonic_platform.chassis import Chassis +from sonic_platform.chassis import Chassis, SmartSwitchChassis from sonic_platform.device_data import DeviceDataManager sonic_platform.chassis.extract_RJ45_ports_index = mock.MagicMock(return_value=[]) @@ -342,3 +344,77 @@ def test_parse_vpd(self): chassis = Chassis() content = chassis._parse_vpd_data(os.path.join(test_path, 'vpd_data_file')) assert content.get('REV') == 'A7' + + @mock.patch('sonic_platform.module.SonicV2Connector', mock.MagicMock()) + @mock.patch('sonic_platform.module.ConfigDBConnector', mock.MagicMock()) + def test_smartswitch(self): + orig_dpu_count = DeviceDataManager.get_dpu_count + DeviceDataManager.get_dpu_count = mock.MagicMock(return_value=4) + chassis = SmartSwitchChassis() + + assert not chassis.is_modular_chassis() + assert chassis.is_smartswitch() + assert chassis.init_midplane_switch() + + chassis._module_list = None + chassis.module_initialized_count = 0 + chassis.module_name_index_map = {} + with pytest.raises(RuntimeError, match="Invalid index = -1 for module" + " initialization with total module count = 4"): + chassis.initialize_single_module(-1) + chassis.get_module(-1) + with pytest.raises(KeyError): + chassis.get_module_index('DPU1') + chassis.get_module_index('DPU2') + chassis.get_dpu_id("DPU1") + chassis.get_dpu_id("DPU2") + chassis.get_dpu_id("DPU3") + + DeviceDataManager.get_dpu_count = mock.MagicMock(return_value=0) + assert chassis.get_num_modules() == 0 + with pytest.raises(TypeError): + chassis.get_module(0) + chassis.initialize_modules() + assert chassis.get_all_modules() is None + + DeviceDataManager.get_dpu_count = mock.MagicMock(return_value=4) + from sonic_platform.module import DpuModule + assert isinstance(chassis.get_module(0), DpuModule) + assert chassis.get_module(4) is None + + chassis.initialize_modules() + assert chassis.get_module_index('DPU0') == 0 + assert chassis.get_module_index('DPU3') == 3 + with pytest.raises(KeyError): + chassis.get_module_index('DPU10') + chassis.get_module_index('ABC') + + assert chassis.get_num_modules() == 4 + module_list = chassis.get_all_modules() + assert len(module_list) == 4 + pl_data = { + "dpu0": { + "interface": {"Ethernet224": "Ethernet0"} + }, + "dpu1": { + "interface": {"Ethernet232": "Ethernet0"} + }, + "dpu2": { + "interface": {"EthernetX": "EthernetY"} + } + } + orig_dpus_data = DeviceDataManager.get_platform_dpus_data + DeviceDataManager.get_platform_dpus_data = mock.MagicMock(return_value=pl_data) + chassis.get_module_dpu_data_port(0) == str({"Ethernet232": "Ethernet0"}) + with pytest.raises(IndexError): + assert chassis.get_module_dpu_data_port(5) + assert chassis.get_module_dpu_data_port(-1) + + assert chassis.get_dpu_id("DPU1") == 1 + assert chassis.get_dpu_id("DPU3") == 3 + assert chassis.get_dpu_id("DPU2") == 2 + with pytest.raises(KeyError): + chassis.get_dpu_id('DPU15') + chassis.get_dpu_id('ABC') + DeviceDataManager.get_platform_dpus_data = orig_dpus_data + DeviceDataManager.get_dpu_count = orig_dpu_count diff --git a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py index f6779341909..f34cb4e471e 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py @@ -1,6 +1,7 @@ # -# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -28,7 +29,7 @@ modules_path = os.path.dirname(test_path) sys.path.insert(0, modules_path) -from sonic_platform.device_data import DeviceDataManager +from sonic_platform.device_data import DeviceDataManager, DpuInterfaceEnum, dpu_interface_values class TestDeviceData: @@ -83,3 +84,77 @@ def test_wait_platform_ready(self, mock_is_indep, mock_exists): assert DeviceDataManager.wait_platform_ready() mock_exists.return_value = False assert not DeviceDataManager.wait_platform_ready() + + @mock.patch('sonic_py_common.device_info.get_path_to_platform_dir', mock.MagicMock(return_value='/tmp')) + @mock.patch('sonic_platform.device_data.utils.load_json_file') + def test_dpu_count(self, mock_load_json): + mock_value = { + "DPUS": { + "dpu1": { + "interface": {"Ethernet224": "Ethernet0"} + }, + "dpu2": { + "interface": {"Ethernet232": "Ethernet0"} + }, + "dpu3": { + "interface": {"EthernetX": "EthernetY"} + } + }, + } + mock_load_json.return_value = mock_value + return_dict = DeviceDataManager.get_platform_dpus_data() + dpu_data = mock_value["DPUS"] + assert dpu_data == return_dict + mock_load_json.return_value = {} + # Data is Cached + assert DeviceDataManager.get_platform_dpus_data() == mock_value["DPUS"] + assert DeviceDataManager.get_dpu_count() == 3 + + @mock.patch('sonic_py_common.device_info.get_path_to_platform_dir', mock.MagicMock(return_value='/tmp')) + @mock.patch('sonic_platform.device_data.DeviceDataManager.get_platform_dpus_data') + def test_dpu_interface_data(self, mock_load_json): + mock_value = { + "dpu0": { + "midplane_interface": "dpu0", + "interface": { + "Ethernet224": "Ethernet0" + }, + "rshim_info": "rshim0", + "bus_info": "0000:08:00.0" + }, + "dpu1": { + "midplane_interface": "dpu1", + "interface": { + "Ethernet232": "Ethernet0" + }, + "rshim_info": "rshim1", + "bus_info": "0000:07:00.0" + }, + "dpu2": { + "midplane_interface": "dpu2", + "interface": { + "Ethernet240": "Ethernet0" + }, + "rshim_info": "rshim2", + "bus_info": "0000:01:00.0" + }, + "dpu3": { + "midplane_interface": "dpu3", + "interface": { + "Ethernet248": "Ethernet0" + }, + "rshim_info": "rshim3", + "bus_info": "0000:02:00.0" + } + } + mock_load_json.return_value = mock_value + for dpu_name in mock_value: + for dpu_interface in dpu_interface_values: + assert DeviceDataManager.get_dpu_interface(dpu_name, dpu_interface) == mock_value[dpu_name][dpu_interface] + invalid_dpu_names = ["dpu4", "", "dpu"] + invalid_interface_names = ["midplane", "rshim", "bus"] + for interface_name in invalid_interface_names: + assert not DeviceDataManager.get_dpu_interface("dpu0", interface_name) + for dpu_name in invalid_dpu_names: + assert not DeviceDataManager.get_dpu_interface(dpu_name, DpuInterfaceEnum.MIDPLANE_INT.value) + assert not DeviceDataManager.get_dpu_interface("", "") diff --git a/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py index 7340a004195..34c7870cfd8 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py @@ -1,5 +1,6 @@ # -# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -19,7 +20,8 @@ import os import sys import pytest -from sonic_platform.dpuctlplat import DpuCtlPlat, dpu_map, BootProgEnum +import sonic_platform +from sonic_platform.dpuctlplat import DpuCtlPlat, BootProgEnum, PCI_DEV_BASE from unittest.mock import MagicMock, patch, Mock, call @@ -45,6 +47,9 @@ def create_dpu_list(): obj = create_dpu_list() +rshim_interface = "rshim@0" +pci_dev_path = os.path.join(PCI_DEV_BASE, "0000:08:00.0", 'remove') + class TestDpuClass: """Tests for dpuctl Platform API Wrapper""" @@ -53,6 +58,9 @@ def setup_class(cls): """Setup function for all tests for dpuctl implementation""" os.environ["PATH"] += os.pathsep + scripts_path os.environ["MLNX_PLATFORM_API_DPUCTL_UNIT_TESTING"] = "2" + dpuctl_obj = obj["dpuctl_list"][0] + dpuctl_obj.rshim_interface = rshim_interface + dpuctl_obj.pci_dev_path = pci_dev_path @patch('os.path.exists', MagicMock(return_value=True)) @patch('multiprocessing.Process.start', MagicMock(return_value=True)) @@ -74,8 +82,8 @@ def mock_write_file(file_name, content_towrite): with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)): assert dpuctl_obj.dpu_power_off(True) - assert written_data[0]["file"].endswith( - f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + print(f"{written_data}") + assert written_data[0]["file"].endswith(f"{pci_dev_path}") assert "1" == written_data[0]["data"] assert "0" == written_data[1]["data"] assert written_data[1]["file"].endswith( @@ -88,7 +96,7 @@ def mock_write_file(file_name, content_towrite): assert mock_inotify.call_args.args[0].endswith( f"{dpuctl_obj.get_hwmgmt_name()}_shtdn_ready") assert written_data[0]["file"].endswith( - f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + f"{pci_dev_path}") assert "1" == written_data[0]["data"] assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") assert "0" == written_data[1]["data"] @@ -100,7 +108,7 @@ def mock_write_file(file_name, content_towrite): assert mock_inotify.call_args.args[0].endswith( f"{dpuctl_obj.get_hwmgmt_name()}_shtdn_ready") assert written_data[0]["file"].endswith( - f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + f"{pci_dev_path}") assert "1" == written_data[0]["data"] assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") assert "0" == written_data[1]["data"] @@ -108,7 +116,7 @@ def mock_write_file(file_name, content_towrite): assert "0" == written_data[2]["data"] assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") assert "0" == written_data[3]["data"] - # Test whether value of boot_progress changes power off to force_power_off + # Test whether value of boot_progress skips power off with patch.object(dpuctl_obj, 'read_boot_prog') as mock_boot_prog, \ patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ patch.object(dpuctl_obj, '_power_off_force') as mock_power_off_force, \ @@ -117,6 +125,16 @@ def mock_write_file(file_name, content_towrite): mock_boot_prog.return_value = BootProgEnum.RST.value mock_add_watch.return_value = True assert dpuctl_obj.dpu_power_off(False) + assert mock_obj.call_args_list[1].args[0] == "Skipping DPU power off as DPU is already powered off" + # Test whether value of boot_progress changes power off to force_power_off + with patch.object(dpuctl_obj, 'read_boot_prog') as mock_boot_prog, \ + patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, '_power_off_force') as mock_power_off_force, \ + patch.object(dpuctl_obj, '_power_off') as mock_power_off, \ + patch.object(dpuctl_obj, 'log_info') as mock_obj: + mock_boot_prog.return_value = BootProgEnum.OS_CRASH_PROG.value + mock_add_watch.return_value = True + assert dpuctl_obj.dpu_power_off(False) assert mock_obj.call_args_list[1].args[0] == "Power off with force = True since since OS is not in running state on DPU" mock_power_off_force.assert_called_once() mock_power_off.assert_not_called() @@ -126,7 +144,6 @@ def mock_write_file(file_name, content_towrite): assert dpuctl_obj.dpu_power_off(False) mock_power_off_force.assert_not_called() mock_power_off.assert_called_once() - @patch('os.path.exists', MagicMock(return_value=True)) @patch('multiprocessing.Process.start', MagicMock(return_value=True)) @@ -147,7 +164,8 @@ def mock_write_file(file_name, content_towrite): return True with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ patch.object(dpuctl_obj, 'wait_for_pci', wraps=MagicMock(return_value=None)), \ - patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)): + patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)), \ + patch.object(dpuctl_obj, 'read_boot_prog', wraps=MagicMock(return_value=BootProgEnum.RST.value)): assert dpuctl_obj.dpu_power_on(True) assert mock_inotify.call_args.args[0].endswith( f"{dpuctl_obj.get_hwmgmt_name()}_ready") @@ -186,7 +204,7 @@ def mock_write_file(file_name, content_towrite): assert "1" == written_data[18]["data"] @patch('os.path.exists', MagicMock(return_value=True)) - @patch('multiprocessing.Process.start', MagicMock(return_value=True)) + @patch('multiprocessing.Process.start', MagicMock(return_value=None)) @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False)) @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch') @patch('sonic_platform.inotify_helper.InotifyHelper.__init__') @@ -207,7 +225,7 @@ def mock_write_file(file_name, content_towrite): dpuctl_obj.write_file = mock_write_file assert dpuctl_obj.dpu_reboot(False) assert len(written_data) == 4 - assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert written_data[0]["file"].endswith(f"{pci_dev_path}") assert "1" == written_data[0]["data"] assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") assert "0" == written_data[1]["data"] @@ -221,7 +239,7 @@ def mock_write_file(file_name, content_towrite): written_data = [] assert not dpuctl_obj.dpu_reboot() assert len(written_data) == 22 - assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert written_data[0]["file"].endswith(f"{pci_dev_path}") assert "1" == written_data[0]["data"] assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") assert "0" == written_data[1]["data"] @@ -246,7 +264,7 @@ def mock_write_file(file_name, content_towrite): mock_inotify.reset_mock() mock_add_watch.return_value = True mock_inotify.return_value = None - written_data=[] + written_data = [] with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)), \ patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)): @@ -254,7 +272,7 @@ def mock_write_file(file_name, content_towrite): assert dpuctl_obj.dpu_reboot(True) mock_add_watch.return_value = None assert len(written_data) == 6 - assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert written_data[0]["file"].endswith(f"{pci_dev_path}") assert "1" == written_data[0]["data"] assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") assert "0" == written_data[1]["data"] @@ -272,7 +290,7 @@ def mock_write_file(file_name, content_towrite): written_data = [] assert not dpuctl_obj.dpu_reboot(True) assert len(written_data) == 18 - assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert written_data[0]["file"].endswith(f"{pci_dev_path}") assert "1" == written_data[0]["data"] assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") assert "0" == written_data[1]["data"] @@ -312,6 +330,60 @@ def mock_write_file(file_name, content_towrite): assert dpuctl_obj.dpu_reboot(False) mock_reset_force.assert_not_called() mock_reset.assert_called_once() + written_data = [] + mock_inotify.reset_mock() + mock_add_watch.reset_mock() + mock_inotify.return_value = None + mock_add_watch.return_value = True + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)), \ + patch.object(dpuctl_obj, 'dpu_rshim_service_control') as mock_rshim: + assert dpuctl_obj.dpu_reboot(forced=False, no_wait=True) + # Rshim service is only stopped and not started + mock_rshim.assert_called_once() + mock_rshim.call_args.args[0] == "stop" + assert written_data[0]["file"].endswith(f"{pci_dev_path}") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[2]["data"] + mock_inotify.called_once() + mock_add_watch.called_once() + written_data = [] + mock_inotify.reset_mock() + mock_add_watch.reset_mock() + mock_inotify.return_value = None + mock_add_watch.return_value = True + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_START.value)), \ + patch.object(dpuctl_obj, 'dpu_rshim_service_control') as mock_rshim: + assert dpuctl_obj.dpu_reboot(forced=False, no_wait=True) + mock_rshim.assert_called_once() + mock_rshim.call_args.args[0] == "stop" + assert written_data[0]["file"].endswith(f"{pci_dev_path}") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[2]["data"] + assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "1" == written_data[3]["data"] + assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[4]["data"] + mock_inotify.called_once() + mock_add_watch.called_once() + # Skip pre startup and post shutdown + written_data = [] + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_START.value)), \ + patch.object(dpuctl_obj, 'dpu_rshim_service_control') as mock_rshim: + assert dpuctl_obj.dpu_reboot(skip_pre_post=True) + mock_rshim.assert_not_called() + # We skip writing PCI data + assert written_data[0]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[0]["data"] + assert not written_data[-1]["file"].endswith("rescan") def test_prog_update(self): dpuctl_obj = obj["dpuctl_list"][0] @@ -392,7 +464,8 @@ def mock_time_diff(): with patch("time.time", wraps=mock_time_diff): # PCI Device is not recognized assert not dpuctl_obj.wait_for_pci() - assert f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}" in mock_exists.call_args.args[0] + pci_parent_path = os.path.dirname(pci_dev_path) + assert pci_parent_path == mock_exists.call_args.args[0] mock_obj.register.assert_called_once() mock_obj.poll.assert_called_once() # PCI device is recognized immediately @@ -400,7 +473,7 @@ def mock_time_diff(): mock_exists.reset_mock() mock_exists.return_value = True assert dpuctl_obj.wait_for_pci() - assert f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}" in mock_exists.call_args.args[0] + assert pci_parent_path == mock_exists.call_args.args[0] mock_obj.register.assert_not_called() mock_obj.poll.assert_not_called() # PCI device is added later (Detected in Loop) @@ -420,9 +493,22 @@ def mock_time_diff(): assert dpuctl_obj.wait_for_pci() mock_obj.register.assert_called_once() mock_obj.poll.assert_not_called() - with patch.object(dpuctl_obj, '_name', "dpua"), patch.object(dpuctl_obj, 'log_error') as mock_obj: + with patch.object(dpuctl_obj, 'pci_dev_path', None), \ + patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_int,\ + patch.object(dpuctl_obj, 'log_error') as mock_obj: + mock_int.return_value = None + dpuctl_obj.wait_for_pci() + mock_obj.assert_called_once_with("Unable to wait for PCI device:Unable to obtain pci device id for dpu0 from platform.json") + new_pci_dev_id = "0000:05:00.0" + mock_int.return_value = new_pci_dev_id + dpuctl_obj.wait_for_pci() + assert dpuctl_obj.pci_dev_path.endswith(f"{new_pci_dev_id}/remove") + # pci dev_path is cached + mock_int.reset_mock() + mock_int.return_value = "None" dpuctl_obj.wait_for_pci() - mock_obj.assert_called_once_with("Unable to wait for PCI device") + mock_int.assert_not_called() + assert dpuctl_obj.pci_dev_path.endswith(f"{new_pci_dev_id}/remove") def test_rshim_service(self): dpuctl_obj = obj["dpuctl_list"][0] @@ -430,16 +516,32 @@ def test_rshim_service(self): dpuctl_obj.dpu_rshim_service_control('start') mock_method.assert_called_once() cmd_string = ' '.join(mock_method.call_args.args[0]) - cmd_string == f"systemctl start {dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('rshim')}.service" + service_name = rshim_interface + operation = "Start" + assert (operation in cmd_string) and (service_name in cmd_string) mock_method.reset_mock() + operation = "Stop" dpuctl_obj.dpu_rshim_service_control('stop') - cmd_string == f"systemctl stop {dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('rshim')}.service" + cmd_string = ' '.join(mock_method.call_args.args[0]) + assert (operation in cmd_string) and (service_name in cmd_string) mock_method.assert_called_once() with pytest.raises(TypeError): dpuctl_obj.dpu_rshim_service_control() - with patch.object(dpuctl_obj, 'get_hwmgmt_name', return_value="dpu5"), patch.object(dpuctl_obj, 'log_error') as mock_obj: + with patch.object(dpuctl_obj, 'rshim_interface', None), \ + patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_int,\ + patch.object(dpuctl_obj, 'log_error') as mock_obj: + mock_int.return_value = None + dpuctl_obj.dpu_rshim_service_control('start') + mock_obj.assert_called_once_with("Failed to start rshim!: Unable to Parse rshim information for dpu0 from Platform.json") + mock_int.return_value = "rshim1" + dpuctl_obj.dpu_rshim_service_control('start') + assert dpuctl_obj.rshim_interface == "rshim@1" + mock_int.reset_mock() + mock_int.return_value = "rshim20" dpuctl_obj.dpu_rshim_service_control('start') - mock_obj.assert_called_once_with("Failed to start rshim!") + # Rshim name is cached + mock_int.assert_not_called() + assert dpuctl_obj.rshim_interface == "rshim@1" def test_pre_and_post(self): dpuctl_obj = obj["dpuctl_list"][0] @@ -447,12 +549,17 @@ def test_pre_and_post(self): manager_mock = Mock() manager_mock.attach_mock(mock_rshim, 'rshim') manager_mock.attach_mock(mock_write, 'write') - dpuctl_obj.dpu_pre_shutdown() + mock_rshim.return_value = True + mock_write.return_value = True + assert dpuctl_obj.dpu_pre_shutdown() mock_rshim.assert_called_once() mock_write.assert_called_once() # Confirm the order of calls and the parameters manager_mock.mock_calls[0] == call.rshim('stop') manager_mock.mock_calls[1] == call.rshim(dpuctl_obj.pci_dev_path, '1') + mock_rshim.return_value = False + assert not dpuctl_obj.dpu_pre_shutdown() + mock_rshim.return_value = True # Test post startup mock_rshim.reset_mock() mock_write.reset_mock() @@ -469,6 +576,22 @@ def test_pre_and_post(self): manager_mock.mock_calls[0] == call.rshim('/sys/bus/pci/rescan', '1') manager_mock.mock_calls[1] == call.pci() manager_mock.mock_calls[2] == call.rshim('start') + mock_rshim.return_value = False + assert not dpuctl_obj.dpu_post_startup() + with patch.object(dpuctl_obj, 'write_file', side_effect=Exception("Mock")), \ + patch.object(dpuctl_obj, 'run_cmd_output', MagicMock(return_value=True)): + assert not dpuctl_obj.dpu_pre_shutdown() + with patch.object(dpuctl_obj, 'run_cmd_output', side_effect=Exception("Mock")), \ + patch.object(dpuctl_obj, 'dpu_pci_remove', MagicMock(return_value=True)): + assert not dpuctl_obj.dpu_pre_shutdown() + with patch.object(dpuctl_obj, 'write_file', side_effect=Exception("Mock")), \ + patch.object(dpuctl_obj, 'wait_for_pci', MagicMock(return_value=True)), \ + patch.object(dpuctl_obj, 'run_cmd_output', MagicMock(return_value=True)): + assert not dpuctl_obj.dpu_post_startup() + with patch.object(dpuctl_obj, 'run_cmd_output', side_effect=Exception("Mock")), \ + patch.object(dpuctl_obj, 'wait_for_pci', MagicMock(return_value=True)), \ + patch.object(dpuctl_obj, 'dpu_pci_scan', MagicMock(return_value=True)): + assert not dpuctl_obj.dpu_post_startup() @classmethod def teardown_class(cls): diff --git a/platform/mellanox/mlnx-platform-api/tests/test_module.py b/platform/mellanox/mlnx-platform-api/tests/test_module.py index 4cba90ac95f..f80eb602053 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_module.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_module.py @@ -1,6 +1,7 @@ # -# Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -17,6 +18,10 @@ import os import sys +import pytest +import sonic_platform.utils +import subprocess +from mock import patch if sys.version_info.major == 3: from unittest import mock else: @@ -28,9 +33,12 @@ import sonic_platform.chassis from sonic_platform import utils -from sonic_platform.chassis import ModularChassis +from sonic_platform.chassis import ModularChassis, SmartSwitchChassis from sonic_platform.device_data import DeviceDataManager from sonic_platform.module import Module +from sonic_platform_base.module_base import ModuleBase +from sonic_platform_base.chassis_base import ChassisBase + class TestModule: @@ -39,6 +47,7 @@ def setup_class(cls): DeviceDataManager.get_linecard_sfp_count = mock.MagicMock(return_value=2) DeviceDataManager.get_linecard_count = mock.MagicMock(return_value=2) sonic_platform.chassis.extract_RJ45_ports_index = mock.MagicMock(return_value=[]) + DeviceDataManager.get_dpu_count = mock.MagicMock(return_value=4) def test_chassis_get_num_sfp(self): chassis = ModularChassis() @@ -49,6 +58,12 @@ def test_chassis_get_all_sfps(self): chassis = ModularChassis() assert len(chassis.get_all_sfps()) == 4 + @patch('sonic_platform.module.SonicV2Connector', mock.MagicMock()) + @patch('sonic_platform.module.ConfigDBConnector', mock.MagicMock()) + def test_chassis_get_num_modules(self): + chassis = SmartSwitchChassis() + assert chassis.get_num_modules() == 4 + @mock.patch('sonic_platform.device_data.DeviceDataManager.get_linecard_max_port_count', mock.MagicMock(return_value=16)) def test_chassis_get_sfp(self): utils.read_int_from_file = mock.MagicMock(return_value=1) @@ -167,6 +182,8 @@ def test_check_state(self): assert len(m._sfp_list) == 0 assert len(m._thermal_list) == 0 + @patch('sonic_platform.module.SonicV2Connector', mock.MagicMock()) + @patch('sonic_platform.module.ConfigDBConnector', mock.MagicMock()) def test_module_vpd(self): m = Module(1) m.vpd_parser.vpd_file = os.path.join(test_path, 'mock_psu_vpd') @@ -185,3 +202,215 @@ def test_module_vpd(self): assert m.get_model() == 'MTEF-PSF-AC-C' assert m.get_serial() == 'MT1946X07684' assert m.get_revision() == 'A3' + + from sonic_platform.module import DpuModule + dm = DpuModule(2) + dm.dpu_vpd_parser.vpd_file_last_mtime = None + dm.dpu_vpd_parser.vpd_file = os.path.join(test_path, 'mock_psu_vpd_dpu') + # dpu2 in pmon = DPU3 in eeprom (1 based indexing is used in HW) + dpu_data = { + "DPU3_SN": "MT4431X26022", + "DPU3_PN": "SN4280BF3DPU2", + "DPU3_REV": "A0", + "DPU3_BASE_MAC": "90:0A:84:C6:00:B1" + } + dm.dpu_vpd_parser.vpd_data = dpu_data + with patch.object(dm.dpu_vpd_parser, '_get_data', wraps=mock.MagicMock(return_value=True)): + assert dm.get_base_mac() == "90:0A:84:C6:00:B1" + assert dm.get_model() == "SN4280BF3DPU2" + assert dm.get_serial() == "MT4431X26022" + assert dm.get_revision() == "A0" + + dm.dpu_vpd_parser = None + with pytest.raises(AttributeError): + dm.get_base_mac() + dm.get_model() + dm.get_serial() + dm.get_revision() + + dm = DpuModule(3) + # DPU4 is not present in the VPD Parser output + dm.dpu_vpd_parser.vpd_data = dpu_data + assert dm.get_base_mac() == "N/A" + assert dm.get_model() == "N/A" + assert dm.get_serial() == "N/A" + assert dm.get_revision() == "N/A" + + @patch('sonic_platform.module.SonicV2Connector', mock.MagicMock()) + @patch('swsscommon.swsscommon.ConfigDBConnector.connect', mock.MagicMock()) + @mock.patch('swsscommon.swsscommon.ConfigDBConnector.get') + @mock.patch('subprocess.call') + def test_dpu_module(self, mock_call, mock_get): + from sonic_platform.module import DpuModule + m = DpuModule(3) + assert m.get_type() == ModuleBase.MODULE_TYPE_DPU + assert m.get_name() == "DPU3" + assert m.get_description() == "NVIDIA BlueField-3 DPU" + assert m.get_dpu_id() == 3 + with patch.object(m.dpuctl_obj, "dpu_reboot") as mock_obj: + mock_obj.return_value = True + assert m.reboot() is True + mock_obj.assert_called_once_with(skip_pre_post=True) + mock_obj.reset_mock() + m.reboot(reboot_type=ModuleBase.MODULE_REBOOT_SMARTSWITCH) + mock_obj.assert_called_once_with(no_wait=True, skip_pre_post=True) + with pytest.raises(RuntimeError): + m.reboot("None") + with patch('sonic_py_common.syslogger.SysLogger.log_error') as mock_method: + m.dpuctl_obj.dpu_power_on = mock.MagicMock(return_value=True) + assert m.set_admin_state(True) + mock_method.assert_not_called() + m.dpuctl_obj.dpu_power_on = mock.MagicMock(return_value=False) + assert not m.set_admin_state(True) + mock_method.assert_called_once_with("Failed to set the admin state for DPU3") + m.dpuctl_obj.dpu_power_off = mock.MagicMock(return_value=True) + assert m.set_admin_state(False) + midplane_ips = { + "dpu0": "169.254.200.1", + "dpu1": "169.254.200.2", + "dpu2": "169.254.200.3", + "dpu3": "169.254.200.4" + } + def get_midplane_ip(DB_NAME, _hash, key): + dpu_name = _hash.split("|")[-1] + return midplane_ips.get(dpu_name) + mock_get.side_effect = get_midplane_ip + assert m.get_midplane_ip() == "169.254.200.4" + assert m.midplane_ip == "169.254.200.4" + mock_get.assert_called_with('CONFIG_DB', 'DHCP_SERVER_IPV4_PORT|bridge-midplane|dpu3', 'ips@') + m1 = DpuModule(2) + assert m1.get_midplane_ip() == "169.254.200.3" + assert m1.midplane_ip == "169.254.200.3" + mock_get.assert_called_with('CONFIG_DB', 'DHCP_SERVER_IPV4_PORT|bridge-midplane|dpu2', 'ips@') + mock_get.reset_mock() + mock_get.return_value = None + mock_get.side_effect = None + # We check for the IP only once in CONFIG_DB after initialization + assert m.get_midplane_ip() == "169.254.200.4" + mock_get.assert_not_called() + m.midplane_ip = None + m1.midplane_ip = None + assert not m.get_midplane_ip() + assert not m1.get_midplane_ip() + mock_get.side_effect = get_midplane_ip + with patch.object(m, '_is_midplane_up', ) as mock_midplane_m, \ + patch.object(m1, '_is_midplane_up',) as mock_midplane_m1: + mock_midplane_m.return_value = True + mock_midplane_m1.return_value = True + m.midplane_ip = None + midplane_ips["dpu3"] = "169.254.200.244" + command = ['ping', '-c', '1', '-W', '1', "169.254.200.244"] + mock_call.return_value = 0 + assert m.is_midplane_reachable() + mock_call.assert_called_with(command, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL) + mock_call.return_value = 1 + assert not m.is_midplane_reachable() + mock_call.assert_called_with(command, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL) + mock_call.side_effect = subprocess.CalledProcessError(1, command) + assert not m.is_midplane_reachable() + assert not m1.is_midplane_reachable() + mock_call.reset_mock() + mock_call.side_effect = None + mock_midplane_m.return_value = False + mock_midplane_m1.return_value = False + assert not m.is_midplane_reachable() + assert not m1.is_midplane_reachable() + mock_call.assert_not_called() + + m.fault_state = False + test_file_path = "" + pl_data = { + "dpu0": { + "interface": {"Ethernet224": "Ethernet0"}, + "midplane_interface": "dpu0_mid", + "bus_info": "0000:08:0.0" + }, + "dpu1": { + "interface": {"Ethernet232": "Ethernet1"}, + "midplane_interface": "dpu1_mid", + "bus_info": "0000:08:0.0" + }, + "dpu2": { + "interface": {"Ethernet236": "Ethernet2"}, + "midplane_interface": "dpu2_mid", + "bus_info": "0000:08:0.0" + }, + } + DeviceDataManager.get_platform_dpus_data = mock.MagicMock(return_value=pl_data) + + def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_func=None): + if file_path.endswith(test_file_path): + return 1 + else: + return 0 + file_name_list = ['reset_aux_pwr_or_reload', 'reset_comex_pwr_fail', 'reset_from_main_board', 'reset_dpu_thermal', 'None'] + reboot_cause_list = [ + (ChassisBase.REBOOT_CAUSE_POWER_LOSS, 'power auxiliary outage or reload'), + (ChassisBase.REBOOT_CAUSE_POWER_LOSS, 'Power failed to comex module'), + (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, 'Reset from Main board'), + (ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER, 'Thermal shutdown of the DPU'), + (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, ''), + ] + with patch("sonic_platform.utils.read_int_from_file", wraps=mock_read_int_from_file): + for index, file_name in enumerate(file_name_list): + test_file_path = file_name + assert m.get_reboot_cause() == reboot_cause_list[index] + m1 = DpuModule(0) + m2 = DpuModule(1) + m3 = DpuModule(2) + m4 = DpuModule(3) + # DPU0 in PMON = dpu1 in hw-mgmt + m1.get_hw_mgmt_id() == 1 + m2.get_hw_mgmt_id() == 2 + m3.get_hw_mgmt_id() == 3 + m4.get_hw_mgmt_id() == 4 + assert not m1.midplane_interface + with patch("sonic_platform.utils.read_int_from_file", wraps=mock.MagicMock(return_value=1)): + assert m1._is_midplane_up() + assert m2._is_midplane_up() + assert m3._is_midplane_up() + assert m1.get_pci_bus_info() == pl_data["dpu0"]['bus_info'] + assert m2.get_pci_bus_info() == pl_data["dpu1"]['bus_info'] + assert m3.get_pci_bus_info() == pl_data["dpu2"]['bus_info'] + with pytest.raises(RuntimeError): + m4._is_midplane_up() + m4.get_pci_bus_info() + assert m1.midplane_interface == "dpu0_mid" + assert m2.midplane_interface == "dpu1_mid" + assert m3.midplane_interface == "dpu2_mid" + with patch("sonic_platform.utils.read_str_from_file", wraps=mock.MagicMock(return_value=0)): + assert not m1._is_midplane_up() + assert not m2._is_midplane_up() + assert not m3._is_midplane_up() + + with patch.object(m1.dpuctl_obj, "read_boot_prog") as mock_obj: + mock_obj.return_value = 5 + m1.get_oper_status() == ModuleBase.MODULE_STATUS_ONLINE + mock_obj.return_value = 0 + m1.get_oper_status() == ModuleBase.MODULE_STATUS_OFFLINE + mock_obj.return_value = 2 + m1.get_oper_status() == ModuleBase.MODULE_STATUS_OFFLINE + mock_obj.return_value = 4 + m1.get_oper_status() == ModuleBase.MODULE_STATUS_OFFLINE + + temp_data = { + f"TEMPERATURE_INFO_{m.get_dpu_id()}|DDR": {"temperature": "45.0", "high_threshold":"90", "critical_high_threshold": "100"}, + f"TEMPERATURE_INFO_{m.get_dpu_id()}|NVME": {"temperature": "100.0", "high_threshold":"85", "critical_high_threshold": "110"}, + f"TEMPERATURE_INFO_{m.get_dpu_id()}|CPU": {"temperature": "75.0", "high_threshold":"80", "critical_high_threshold": "95"} + } + def new_get_all(db_name, table_name): + return temp_data[table_name] + + with patch.object(m.chassis_state_db, 'get_all', wraps=new_get_all): + output_dict = m.get_temperature_dict() + assert output_dict['DDR'] == temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|DDR"] + assert output_dict['CPU'] == temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|CPU"] + assert output_dict['NVME'] == temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|NVME"] + temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|CPU"] = {} + output_dict = m.get_temperature_dict() + assert output_dict['DDR'] == temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|DDR"] + assert output_dict['CPU'] == {} + assert output_dict['NVME'] == temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|NVME"] + del temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|CPU"] + assert m.get_temperature_dict() == {} + diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py index 092179f03ff..fecfadc1d93 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py @@ -1,5 +1,6 @@ # -# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -59,6 +60,7 @@ def test_sfp_index(self, mock_max_port): @mock.patch('sonic_platform.sfp.SFP._get_module_info') @mock.patch('sonic_platform.chassis.Chassis.get_num_sfps', mock.MagicMock(return_value=2)) @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[])) + @mock.patch('sonic_platform.sfp.SFP.get_xcvr_api', mock.MagicMock(return_value=None)) def test_sfp_get_error_status(self, mock_get_error_code, mock_control): sfp = SFP(1) mock_control.return_value = False @@ -87,7 +89,7 @@ def test_sfp_get_error_status(self, mock_get_error_code, mock_control): mock_control.return_value = True description = sfp.get_error_description() - assert description == 'Not supported' + assert description == None mock_control.side_effect = RuntimeError('') description = sfp.get_error_description() diff --git a/platform/mellanox/mlnx-platform-api/tests/test_smartswsitch_thermal_updater.py b/platform/mellanox/mlnx-platform-api/tests/test_smartswsitch_thermal_updater.py new file mode 100644 index 00000000000..ce87afa6ddd --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/tests/test_smartswsitch_thermal_updater.py @@ -0,0 +1,220 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from unittest import mock +import copy + +from sonic_platform.thermal_updater import hw_management_independent_mode_update +from sonic_platform.smartswitch_thermal_updater import SmartswitchThermalUpdater, hw_management_dpu_thermal_update +from sonic_platform.thermal_updater import ERROR_READ_THERMAL_DATA + + +mock_tc_config = """ +{ + "dev_parameters": { + "asic": { + "pwm_min": 20, + "pwm_max": 100, + "val_min": "!70000", + "val_max": "!105000", + "poll_time": 3 + }, + "module\\\\d+": { + "pwm_min": 20, + "pwm_max": 100, + "val_min": 60000, + "val_max": 80000, + "poll_time": 20 + }, + "dpu\\\\d+_module": { + "child_sensors_list": ["cx_amb", "voltmon1", "voltmon2"], + "poll_time": 24 + } + } +} +""" + + +class TestSmartSwitchThermalUpdater: + @mock.patch('sonic_platform.utils.write_file') + def test_configuration(self, mock_write): + dpu = mock.MagicMock() + mock_sfp = mock.MagicMock() + mock_sfp.sdk_index = 1 + self.reset_hw_mgmt_mocks() + mock_os_open = mock.mock_open(read_data=mock_tc_config) + updater = SmartswitchThermalUpdater([mock_sfp], dpu_list=[dpu]) + """ Expectation on start - Clean is called for sfp, asic, DPU + suspend -> 1 and load config for all 3 along with start of timer""" + updater._timer = mock.MagicMock() + mock_os_open = mock.mock_open(read_data=mock_tc_config) + with mock.patch('sonic_platform.utils.open', mock_os_open): + updater.start() + hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear.assert_called_once_with(dpu.get_hw_mgmt_id()) + hw_management_dpu_thermal_update.thermal_data_dpu_ddr_clear.assert_called_once_with(dpu.get_hw_mgmt_id()) + hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear.assert_called_once_with(dpu.get_hw_mgmt_id()) + hw_management_independent_mode_update.thermal_data_clean_asic.assert_called_once() + hw_management_independent_mode_update.thermal_data_clean_module.assert_called_once() + mock_write.assert_called_once_with('/run/hw-management/config/suspend', 0) + assert updater._timer.schedule.call_count == 3 + # Called for DPU with time 24/2 = 12 + assert updater._timer.schedule.call_args_list[0][0][0] == 12 + # Expectation on stop - timer stop and suspend = 1 + mock_write.reset_mock() + updater.stop() + updater._timer.stop.assert_called_once() + mock_write.assert_called_once_with('/run/hw-management/config/suspend', 1) + mock_write.reset_mock() + self.reset_hw_mgmt_mocks() + updater = SmartswitchThermalUpdater(None, dpu_list=[dpu], is_host_mgmt_mode=False) + """ Expectation on start - Clean is called for DPU + load config for DPU along with start of timer""" + updater._timer = mock.MagicMock() + updater.start() + mock_write.assert_not_called() + hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear.assert_called_once_with(dpu.get_hw_mgmt_id()) + hw_management_dpu_thermal_update.thermal_data_dpu_ddr_clear.assert_called_once_with(dpu.get_hw_mgmt_id()) + hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear.assert_called_once_with(dpu.get_hw_mgmt_id()) + hw_management_independent_mode_update.thermal_data_clean_asic.assert_not_called() + hw_management_independent_mode_update.thermal_data_clean_module.assert_not_called() + # Expectation on stop - timer stop + updater.stop() + updater._timer.stop.assert_called_once() + mock_write.assert_not_called() + + def test_update_dpu(self): + self.reset_hw_mgmt_mocks() + mock_dpu = mock.MagicMock() + mock_dpu.get_hw_mgmt_id = mock.MagicMock(return_value=1) + mock_dpu.get_name = mock.MagicMock(return_value="DPU0") + mock_dpu.get_oper_status = mock.MagicMock(return_value="Online") + temp_data = { + "DDR": {'temperature': '75.0', 'high_threshold': '95', 'critical_high_threshold': '100'}, + "CPU": {'temperature': '82.0', 'high_threshold': '90', 'critical_high_threshold': '100'}, + "NVME": {'temperature': '91', 'high_threshold': '95', 'critical_high_threshold': '98'} + } + mock_dpu.get_temperature_dict = mock.MagicMock(return_value=temp_data) + print(f"{mock_dpu.get_temperature_dict()}") + updater = SmartswitchThermalUpdater(sfp_list=None, dpu_list=[mock_dpu], is_host_mgmt_mode=False) + updater.update_dpu() + hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.assert_called_once_with(1, 75, 95, 100, 0) + hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.assert_called_once_with(1, 82, 90, 100, 0) + hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.assert_called_once_with(1, 91, 95, 98, 0) + mock_dpu.get_temperature_dict = mock.MagicMock(return_value={}) + self.reset_hw_mgmt_mocks() + updater.update_dpu() + hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.assert_called_once_with(1, 0, 0, 0, ERROR_READ_THERMAL_DATA) + hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.assert_called_once_with(1, 0, 0, 0, ERROR_READ_THERMAL_DATA) + hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.assert_called_once_with(1, 0, 0, 0, ERROR_READ_THERMAL_DATA) + func_dict = { + "DDR": hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set, + "CPU": hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set, + "NVME": hw_management_dpu_thermal_update.thermal_data_dpu_drive_set, + } + for value in ["DDR", "CPU", "NVME"]: + temp_data_without_entry = copy.deepcopy(temp_data) + # One of the values in DDR, CPU and NVME is set to empty + temp_data_without_entry[value] = {} + mock_dpu.get_temperature_dict = mock.MagicMock(return_value=temp_data_without_entry) + self.reset_hw_mgmt_mocks() + updater.update_dpu() + for key, func in func_dict.items(): + if key == value: + func.assert_called_once_with(1, 0, 0, 0, ERROR_READ_THERMAL_DATA) + else: + func.assert_called_once_with( + 1, + int(float(temp_data[key]['temperature'])), + int(float(temp_data[key]['high_threshold'])), + int(float(temp_data[key]['critical_high_threshold'])), + 0) + # One of the values in DDR, CPU and NVME is set to a string, can not convert to integer + for field in ["temperature", "high_threshold", "critical_high_threshold"]: + temp_data_invalid = copy.deepcopy(temp_data) + temp_data_orig = copy.deepcopy(temp_data) + temp_data_invalid[value][field] = "N/A" + mock_dpu.get_temperature_dict = mock.MagicMock(return_value=temp_data_invalid) + self.reset_hw_mgmt_mocks() + updater.update_dpu() + for key, func in func_dict.items(): + temp_data_orig[value][field] = 0 + func.assert_called_once_with( + 1, + int(float(temp_data_orig[key]['temperature'])), + int(float(temp_data_orig[key]['high_threshold'])), + int(float(temp_data_orig[key]['critical_high_threshold'])), + ERROR_READ_THERMAL_DATA if value == key else 0) + self.reset_hw_mgmt_mocks() + mock_dpu.get_oper_status = mock.MagicMock(return_value="Offline") + updater.update_dpu() + hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear.assert_called_once_with(1) + hw_management_dpu_thermal_update.thermal_data_dpu_ddr_clear.assert_called_once_with(1) + hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear.assert_called_once_with(1) + hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.assert_not_called() + hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.assert_not_called() + hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.assert_not_called() + # Clear is called only once + updater.update_dpu() + updater.update_dpu() + hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear.assert_called_once_with(1) + hw_management_dpu_thermal_update.thermal_data_dpu_ddr_clear.assert_called_once_with(1) + hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear.assert_called_once_with(1) + self.reset_hw_mgmt_mocks() + mock_dpu.get_oper_status = mock.MagicMock(return_value="Online") + mock_dpu.get_temperature_dict = mock.MagicMock(return_value=temp_data) + updater.update_dpu() + hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.assert_called_once_with(1, 75, 95, 100, 0) + hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.assert_called_once_with(1, 82, 90, 100, 0) + hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.assert_called_once_with(1, 91, 95, 98, 0) + # Multiple dpus + mock_dpu1 = mock.MagicMock() + mock_dpu1.get_hw_mgmt_id = mock.MagicMock(return_value=2) + mock_dpu1.get_name = mock.MagicMock(return_value="DPU1") + mock_dpu1.get_oper_status = mock.MagicMock(return_value="Online") + temp_data_1 = copy.deepcopy(temp_data) + temp_data_1["DDR"]["temperature"] = "52.0" + temp_data_1["CPU"]["temperature"] = "20.0" + temp_data_1["NVME"]["temperature"] = "100.0" + mock_dpu1.get_temperature_dict = mock.MagicMock(return_value=temp_data_1) + updater = SmartswitchThermalUpdater(sfp_list=None, dpu_list=[mock_dpu, mock_dpu1], is_host_mgmt_mode=False) + self.reset_hw_mgmt_mocks() + updater.update_dpu() + assert hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.call_count == 2 + assert hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.call_count == 2 + assert hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.call_count == 2 + assert hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.call_args_list \ + == [mock.call(1, 75, 95, 100, 0), mock.call(2, 52, 95, 100, 0)] + assert hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.call_args_list \ + == [mock.call(1, 82, 90, 100, 0), mock.call(2, 20, 90, 100, 0)] + assert hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.call_args_list \ + == [mock.call(1, 91, 95, 98, 0), mock.call(2, 100, 95, 98, 0)] + + def reset_hw_mgmt_mocks(self): + hw_management_independent_mode_update.reset_mock() + hw_management_independent_mode_update.thermal_data_clean_module.reset_mock() + hw_management_independent_mode_update.thermal_data_clean_asic.reset_mock() + hw_management_independent_mode_update.module_data_set_module_counter.reset_mock() + hw_management_independent_mode_update.thermal_data_set_asic.reset_mock() + hw_management_independent_mode_update.thermal_data_set_module.reset_mock() + hw_management_dpu_thermal_update.reset_mock() + hw_management_dpu_thermal_update.thermal_data_clean_module.reset_mock() + hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear.reset_mock() + hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear.reset_mock() + hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.reset_mock() + hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.reset_mock() + hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.reset_mock() diff --git a/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py b/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py new file mode 100644 index 00000000000..2f39b1cd1a8 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py @@ -0,0 +1,67 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from unittest import mock +from sonic_platform.thermal_manager import ThermalManager + + +class TestThermalManager: + + @mock.patch('sonic_platform.chassis.Chassis.chassis_instance', new_callable=mock.MagicMock) + @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode') + @mock.patch('sonic_platform.device_data.DeviceDataManager.get_platform_dpus_data') + def test_updater_init(self, mock_dpus_data, mock_management_mode, mock_chassis_instance): + mock_dpus_data.return_value = {} + mock_management_mode.return_value = True + sfp_mock = mock.MagicMock() + mod_mock = mock.MagicMock() + mock_chassis_instance.get_all_sfps = sfp_mock + mock_chassis_instance.get_all_modules = mod_mock + sfp_mock.return_value = ['sfp1', 'sfp2'] + mod_mock.return_value = ['dpu1', 'dpu2'] + + with mock.patch('sonic_platform.thermal_updater.ThermalUpdater') as mock_thermal, \ + mock.patch('sonic_platform.smartswitch_thermal_updater.SmartswitchThermalUpdater') as mock_sm_thermal: + # Host mgmt mode, no DPUs are used for init + mgr = ThermalManager() + mgr.initialize() + mock_thermal.assert_called_once_with(sfp_list=['sfp1', 'sfp2']) + mgr.deinitialize() + mgr.thermal_updater_task.stop.assert_called_once() + # Not initialized if no DPUs and not in host mgmt mode + mock_management_mode.return_value = False + mock_thermal.reset_mock() + mgr.initialize() + mock_thermal.assert_not_called() + mgr.deinitialize() + mgr.thermal_updater_task.stop.assert_called_once() + # Initialized with DPUs if DPUs are present + mock_dpus_data.return_value = {'DPUS': 'dpu1'} + mock_thermal.reset_mock() + mgr.initialize() + mock_sm_thermal.assert_called_once_with(sfp_list=['sfp1', 'sfp2'], dpu_list=['dpu1', 'dpu2'], is_host_mgmt_mode=False) + mgr.deinitialize() + mgr.thermal_updater_task.stop.assert_called_once() + # Host mgmt mode, with DPUS + mock_thermal.reset_mock() + mock_sm_thermal.reset_mock() + mock_management_mode.return_value = True + mgr.initialize() + mock_sm_thermal.assert_called_once_with(sfp_list=['sfp1', 'sfp2'], dpu_list=['dpu1', 'dpu2'], is_host_mgmt_mode=True) + mgr.deinitialize() + mgr.thermal_updater_task.stop.assert_called_once() diff --git a/platform/mellanox/mlnx-sai.mk b/platform/mellanox/mlnx-sai.mk index 6e184f67032..c4675dc4052 100644 --- a/platform/mellanox/mlnx-sai.mk +++ b/platform/mellanox/mlnx-sai.mk @@ -1,6 +1,6 @@ # Mellanox SAI -MLNX_SAI_VERSION = SAIBuild2405.28.0.33 +MLNX_SAI_VERSION = SAIBuild2405.30.0.13 MLNX_SAI_ASSETS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins MLNX_SAI_ASSETS_RELEASE_TAG = sai-$(MLNX_SAI_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH) MLNX_SAI_ASSETS_URL = $(MLNX_SAI_ASSETS_GITHUB_URL)/releases/download/$(MLNX_SAI_ASSETS_RELEASE_TAG) diff --git a/platform/mellanox/rules.dep b/platform/mellanox/rules.dep index 725331b0f52..cffb61f0da1 100644 --- a/platform/mellanox/rules.dep +++ b/platform/mellanox/rules.dep @@ -16,5 +16,4 @@ include $(PLATFORM_PATH)/issu-version.dep include $(PLATFORM_PATH)/mlnx-onie-fw-update.dep include $(PLATFORM_PATH)/mlnx-ssd-fw-update.dep include $(PLATFORM_PATH)/install-pending-fw.dep -include $(PLATFORM_PATH)/component-versions.dep include $(PLATFORM_PATH)/rshim.dep diff --git a/platform/mellanox/sdk-src/applibs/Makefile b/platform/mellanox/sdk-src/applibs/Makefile deleted file mode 100644 index 47e4f5388db..00000000000 --- a/platform/mellanox/sdk-src/applibs/Makefile +++ /dev/null @@ -1,30 +0,0 @@ -.ONESHELL: -SHELL = /bin/bash - -MAIN_TARGET = applibs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -DERIVED_TARGETS = applibs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb applibs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -PACKAGE_NAME = applibs - -$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # get sources - rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz - - # build - pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - sed -i "s/sx-libnl/$(LIBNL3)/g" ./debian/control - sed -i "s/-Werror//g" ./configure.in - - if [ -f autogen.sh ]; then - ./autogen.sh - fi - - debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) - - popd - - mv $(DERIVED_TARGETS) $* $(DEST)/ - -$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sx-acl-helper/Makefile b/platform/mellanox/sdk-src/sx-acl-helper/Makefile deleted file mode 100644 index 42109c74e0b..00000000000 --- a/platform/mellanox/sdk-src/sx-acl-helper/Makefile +++ /dev/null @@ -1,29 +0,0 @@ -.ONESHELL: -SHELL = /bin/bash - -MAIN_TARGET = sx-acl-helper_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -DERIVED_TARGETS = sx-acl-helper-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \ - sx-acl-helper-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \ - sx-acl-helper-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -PACKAGE_NAME = sx_acl_helper - -$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # get sources - rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz - - # build - pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - if [ -f autogen.sh ]; then - ./autogen.sh - fi - - debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) - - popd - - mv $(DERIVED_TARGETS) $* $(DEST)/ - -$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sx-complib/Makefile b/platform/mellanox/sdk-src/sx-complib/Makefile deleted file mode 100644 index c717ffda93c..00000000000 --- a/platform/mellanox/sdk-src/sx-complib/Makefile +++ /dev/null @@ -1,29 +0,0 @@ -.ONESHELL: -SHELL = /bin/bash - -MAIN_TARGET = sx-complib_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -DERIVED_TARGETS = sx-complib-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \ - sx-complib-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \ - sx-complib-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -PACKAGE_NAME = sx_complib - -$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # get sources - rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz - - # build - pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - if [ -f autogen.sh ]; then - ./autogen.sh - fi - - debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) - - popd - - mv $(DERIVED_TARGETS) $* $(DEST)/ - -$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sx-examples/Makefile b/platform/mellanox/sdk-src/sx-examples/Makefile deleted file mode 100644 index 2084e397f98..00000000000 --- a/platform/mellanox/sdk-src/sx-examples/Makefile +++ /dev/null @@ -1,27 +0,0 @@ -.ONESHELL: -SHELL = /bin/bash - -MAIN_TARGET = sx-examples_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -DERIVED_TARGETS = sx-examples-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb sx-examples-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -PACKAGE_NAME = sx_examples - -$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # get sources - rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz - - # build - pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - if [ -f autogen.sh ]; then - ./autogen.sh - fi - - debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) - - popd - - mv $(DERIVED_TARGETS) $* $(DEST)/ - -$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sx-gen-utils/Makefile b/platform/mellanox/sdk-src/sx-gen-utils/Makefile deleted file mode 100644 index 66d2fb6b453..00000000000 --- a/platform/mellanox/sdk-src/sx-gen-utils/Makefile +++ /dev/null @@ -1,27 +0,0 @@ -.ONESHELL: -SHELL = /bin/bash - -MAIN_TARGET = sx-gen-utils_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -DERIVED_TARGETS = sx-gen-utils-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb sx-gen-utils-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -PACKAGE_NAME = sx_gen_utils - -$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # get sources - rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz - - # build - pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - if [ -f autogen.sh ]; then - ./autogen.sh - fi - - debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) - - popd - - mv $(DERIVED_TARGETS) $* $(DEST)/ - -$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sx-hash-calc/Makefile b/platform/mellanox/sdk-src/sx-hash-calc/Makefile deleted file mode 100644 index 927d4bc892a..00000000000 --- a/platform/mellanox/sdk-src/sx-hash-calc/Makefile +++ /dev/null @@ -1,27 +0,0 @@ -.ONESHELL: -SHELL = /bin/bash - -MAIN_TARGET = sx-hash-calc_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb -DERIVED_TARGETS = sx-hash-calc-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb -PACKAGE_NAME = sx_hash_calc - -$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # get sources - rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz - - # build - pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - if [ -f autogen.sh ]; then - ./autogen.sh - fi - - debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) - - popd - - mv $(DERIVED_TARGETS) $* $(DEST)/ - -$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sx-obj-desc-lib/Makefile b/platform/mellanox/sdk-src/sx-obj-desc-lib/Makefile deleted file mode 100644 index 26d1f65ca72..00000000000 --- a/platform/mellanox/sdk-src/sx-obj-desc-lib/Makefile +++ /dev/null @@ -1,29 +0,0 @@ -.ONESHELL: -SHELL = /bin/bash - -MAIN_TARGET = sx-obj-desc-lib_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -DERIVED_TARGETS = sx-obj-desc-lib-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \ - sx-obj-desc-lib-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \ - sx-obj-desc-lib-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -PACKAGE_NAME = sx_obj_desc_lib - -$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # get sources - rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz - - # build - pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - if [ -f autogen.sh ]; then - ./autogen.sh - fi - - debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) - - popd - - mv $(DERIVED_TARGETS) $* $(DEST)/ - -$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sx-scew/Makefile b/platform/mellanox/sdk-src/sx-scew/Makefile deleted file mode 100644 index 8bb61fcda67..00000000000 --- a/platform/mellanox/sdk-src/sx-scew/Makefile +++ /dev/null @@ -1,29 +0,0 @@ -.ONESHELL: -SHELL = /bin/bash - -MAIN_TARGET = sx-scew_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -DERIVED_TARGETS = sx-scew-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \ - sx-scew-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \ - sx-scew-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -PACKAGE_NAME = sx_scew - -$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # get sources - rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz - - # build - pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - if [ -f autogen.sh ]; then - ./autogen.sh - fi - - debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) - - popd - - mv $(DERIVED_TARGETS) $* $(DEST)/ - -$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sxd-libs/Makefile b/platform/mellanox/sdk-src/sxd-libs/Makefile deleted file mode 100644 index 0472056c987..00000000000 --- a/platform/mellanox/sdk-src/sxd-libs/Makefile +++ /dev/null @@ -1,29 +0,0 @@ -.ONESHELL: -SHELL = /bin/bash - -MAIN_TARGET = sxd-libs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -DERIVED_TARGETS = sxd-libs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \ - sxd-libs-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \ - sxd-libs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -PACKAGE_NAME = sxd_libs - -$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # get sources - rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz - - # build - pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) - - if [ -f autogen.sh ]; then - ./autogen.sh - fi - - debuild -e 'configure_options=--enable-sniffer=yes' -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) - - popd - - mv $(DERIVED_TARGETS) $* $(DEST)/ - -$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk-src/sys-sdk/Makefile b/platform/mellanox/sdk-src/sys-sdk/Makefile new file mode 100644 index 00000000000..0bd78f6901d --- /dev/null +++ b/platform/mellanox/sdk-src/sys-sdk/Makefile @@ -0,0 +1,30 @@ +.ONESHELL: +SHELL = /bin/bash + +MAIN_TARGET = sys-sdk_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb +DERIVED_TARGETS = sys-sdk_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH)-dev.deb sys-sdk_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH)-dbgsym.ddeb + +PACKAGE_NAME = sys_sdk + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # get sources + rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION) + + @echo 'wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz' + + wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz + + # build + rm -rf builds/cmake + + cmake -B builds/cmake -DCMAKE_SYSTEM_VERSION=$(shell ls -t /lib/modules |head -1) -DPYTHON_INTERPRETERS=python3 -DSKIP_UNINSTALL_INSTALL_DEPENDENCY=on -DSKIP_DEPMOD_IN_INSTALL_PHASE=on -DUSE_API_TESTER=OFF -DUSE_KERNEL=OFF -DCMAKE_PROJECT_VERSION=$(MLNX_SDK_DEB_VERSION) + + cmake --build builds/cmake -j$(SONIC_CONFIG_MAKE_JOBS) + + cd builds/cmake + + cpack -G DEB + + mv $(DERIVED_TARGETS) $* $(DEST)/ + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/sdk.dep b/platform/mellanox/sdk.dep index 122548192c6..97ad0b25acf 100644 --- a/platform/mellanox/sdk.dep +++ b/platform/mellanox/sdk.dep @@ -10,204 +10,6 @@ # SONIC_OVERRIDE_BUILD_VARS. MLNX_SDK_COMMON_FLAGS_LIST = $(SONIC_COMMON_FLAGS_LIST) $(MLNX_SDK_DEB_VERSION) -# APPLIBS - -SPATH := $($(APPLIBS)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files -- $(SPATH)) - -$(APPLIBS)_CACHE_MODE := GIT_CONTENT_SHA -$(APPLIBS)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(APPLIBS)_DEP_FILES := $(DEP_FILES) - -$(APPLIBS_DEV)_CACHE_MODE := GIT_CONTENT_SHA -$(APPLIBS_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(APPLIBS_DEV)_DEP_FILES := $(DEP_FILES) - -ifeq ($(SDK_FROM_SRC),y) -$(APPLIBS_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA -$(APPLIBS_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(APPLIBS_DBGSYM)_DEP_FILES := $(DEP_FILES) -endif - -# SX_COMPLIB - -SPATH := $($(SX_COMPLIB)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files -- $(SPATH)) - -$(SX_COMPLIB)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_COMPLIB)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_COMPLIB)_DEP_FILES := $(DEP_FILES) - -$(SX_COMPLIB_DEV)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_COMPLIB_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_COMPLIB_DEV)_DEP_FILES := $(DEP_FILES) - -ifeq ($(SDK_FROM_SRC),y) -$(SX_COMPLIB_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_COMPLIB_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_COMPLIB_DBGSYM)_DEP_FILES := $(DEP_FILES) -endif - -# SX_EXAMPLES - -SPATH := $($(SX_EXAMPLES)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files -- $(SPATH)) - -$(SX_EXAMPLES)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_EXAMPLES)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_EXAMPLES)_DEP_FILES := $(DEP_FILES) - -$(SX_EXAMPLES_DEV)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_EXAMPLES_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_EXAMPLES_DEV)_DEP_FILES := $(DEP_FILES) - -ifeq ($(SDK_FROM_SRC),y) -$(SX_EXAMPLES_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_EXAMPLES_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_EXAMPLES_DBGSYM)_DEP_FILES := $(DEP_FILES) -endif - -# SX_GEN_UTILS - -SPATH := $($(SX_GEN_UTILS)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files -- $(SPATH)) - -$(SX_GEN_UTILS)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_GEN_UTILS)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_GEN_UTILS)_DEP_FILES := $(DEP_FILES) - -$(SX_GEN_UTILS_DEV)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_GEN_UTILS_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_GEN_UTILS_DEV)_DEP_FILES := $(DEP_FILES) - -ifeq ($(SDK_FROM_SRC),y) -$(SX_GEN_UTILS_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_GEN_UTILS_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_GEN_UTILS_DBGSYM)_DEP_FILES := $(DEP_FILES) -endif - -# SXD_LIBS - -SPATH := $($(SXD_LIBS)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files -- $(SPATH)) - -$(SXD_LIBS)_CACHE_MODE := GIT_CONTENT_SHA -$(SXD_LIBS)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SXD_LIBS)_DEP_FILES := $(DEP_FILES) - -$(SXD_LIBS_DEV)_CACHE_MODE := GIT_CONTENT_SHA -$(SXD_LIBS_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SXD_LIBS_DEV)_DEP_FILES := $(DEP_FILES) - -ifeq ($(SDK_FROM_SRC),y) -$(SXD_LIBS_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA -$(SXD_LIBS_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SXD_LIBS_DBGSYM)_DEP_FILES := $(DEP_FILES) -endif - -# PYTHON_SDK_API - -SPATH := $($(PYTHON_SDK_API)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files -- $(SPATH)) - -$(PYTHON_SDK_API)_CACHE_MODE := GIT_CONTENT_SHA -$(PYTHON_SDK_API)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(PYTHON_SDK_API)_DEP_FILES := $(DEP_FILES) - -ifeq ($(SDK_FROM_SRC),y) -$(PYTHON_SDK_API_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA -$(PYTHON_SDK_API_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(PYTHON_SDK_API_DBGSYM)_DEP_FILES := $(DEP_FILES) -endif - -# SX_ACL_HELPER - -SPATH := $($(SX_ACL_HELPER)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files -- $(SPATH)) - -$(SX_ACL_HELPER)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_ACL_HELPER)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_ACL_HELPER)_DEP_FILES := $(DEP_FILES) - -$(SX_ACL_HELPER_DEV)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_ACL_HELPER_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_ACL_HELPER_DEV)_DEP_FILES := $(DEP_FILES) - -ifeq ($(SDK_FROM_SRC),y) -$(SX_ACL_HELPER_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_ACL_HELPER_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_ACL_HELPER_DBGSYM)_DEP_FILES := $(DEP_FILES) -endif - -# WJH_LIBS - -SPATH := $($(WJH_LIBS)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files -- $(SPATH)) - -$(WJH_LIBS)_CACHE_MODE := GIT_CONTENT_SHA -$(WJH_LIBS)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(WJH_LIBS)_DEP_FILES := $(DEP_FILES) - -$(WJH_LIBS_DEV)_CACHE_MODE := GIT_CONTENT_SHA -$(WJH_LIBS_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(WJH_LIBS_DEV)_DEP_FILES := $(DEP_FILES) - -ifeq ($(SDK_FROM_SRC),y) -$(WJH_LIBS_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA -$(WJH_LIBS_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(WJH_LIBS_DBGSYM)_DEP_FILES := $(DEP_FILES) -endif - -# SX_HASH_CALC - -SPATH := $($(SX_HASH_CALC)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files -- $(SPATH)) - -$(SX_HASH_CALC)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_HASH_CALC)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_HASH_CALC)_DEP_FILES := $(DEP_FILES) - -ifeq ($(SDK_FROM_SRC),y) -$(SX_HASH_CALC_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_HASH_CALC_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_HASH_CALC_DBGSYM)_DEP_FILES := $(DEP_FILES) -endif - -# SX_OBJ_DESC_LIB - -SPATH := $($(SX_OBJ_DESC_LIB)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files -- $(SPATH)) - -$(SX_OBJ_DESC_LIB)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_OBJ_DESC_LIB)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_OBJ_DESC_LIB)_DEP_FILES := $(DEP_FILES) - -ifeq ($(SDK_FROM_SRC),y) -$(SX_OBJ_DESC_LIB_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA -$(SX_OBJ_DESC_LIB_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST) -$(SX_OBJ_DESC_LIB_DBGSYM)_DEP_FILES := $(DEP_FILES) -endif - # SX_KERNEL SPATH := $($(SX_KERNEL)_SRC_PATH) diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk index 5346e8a4458..5119ef97794 100644 --- a/platform/mellanox/sdk.mk +++ b/platform/mellanox/sdk.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. +# Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -14,7 +14,7 @@ # See the License for the specific language governing permissions and # limitations under the License. # -MLNX_SDK_VERSION = 4.7.1150 +MLNX_SDK_VERSION = 4.7.2164 MLNX_SDK_ISSU_VERSION = 101 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers @@ -34,123 +34,23 @@ endif export MLNX_SDK_SOURCE_BASE_URL MLNX_SDK_VERSION MLNX_SDK_ISSU_VERSION MLNX_SDK_DEB_VERSION MLNX_ASSETS_GITHUB_URL MLNX_SDK_DRIVERS_GITHUB_URL -MLNX_SDK_RDEBS += $(APPLIBS) $(SX_COMPLIB) $(SX_EXAMPLES) \ - $(SX_GEN_UTILS) $(SXD_LIBS) $(WJH_LIBS) $(SX_ACL_HELPER) \ - $(SX_HASH_CALC) $(SX_OBJ_DESC_LIB) - -MLNX_SDK_DEBS += $(APPLIBS_DEV) $(SX_COMPLIB_DEV) \ - $(SX_COMPLIB_DEV_STATIC) $(SX_EXAMPLES_DEV) $(SX_GEN_UTILS_DEV) \ - $(SXD_LIBS_DEV) $(SXD_LIBS_DEV_STATIC) $(WJH_LIBS_DEV) $(SX_ACL_HELPER_DEV) \ - $(SX_HASH_CALC) $(SX_OBJ_DESC_LIB_DEV) - -MLNX_SDK_DBG_DEBS += $(APPLIBS_DBGSYM) $(SX_COMPLIB_DBGSYM) \ - $(SX_EXAMPLES_DBGSYM) $(SX_GEN_UTILS_DBGSYM) \ - $(SXD_LIBS_DBGSYM) $(WJH_LIBS_DBGSYM) $(SX_ACL_HELPER_DBGSYM) \ - $(SX_HASH_CALC_DBGSYM) $(SX_OBJ_DESC_LIB_DBGSYM) - -APPLIBS = applibs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(APPLIBS)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/applibs -$(APPLIBS)_DEPENDS += $(SX_COMPLIB_DEV) $(SX_GEN_UTILS_DEV) $(SXD_LIBS_DEV) $(LIBNL3_DEV) $(LIBNL_GENL3_DEV) -$(APPLIBS)_RDEPENDS += $(SX_COMPLIB) $(SX_GEN_UTILS) $(SXD_LIBS) $(LIBNL3) $(LIBNL_GENL3) -APPLIBS_DEV = applibs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(APPLIBS),$(APPLIBS_DEV))) -APPLIBS_DBGSYM = applibs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb +MLNX_SDK_RDEBS += $(SYSSDK) +MLNX_SDK_DEBS += $(SYSSDK_DEV) +MLNX_SDK_DBG_DEBS += $(SYSSDK_DBGSYM) + +SYSSDK = sys-sdk_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb +$(SYSSDK)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sys-sdk +$(SYSSDK)_DEPENDS += $(LIBNL3_DEV) $(LIBNL_GENL3_DEV) +$(SYSSDK)_RDEPENDS += $(LIBNL3) $(LIBNL_GENL3) +SYSSDK_DEV = sys-sdk_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH)-dev.deb +$(eval $(call add_derived_package,$(SYSSDK),$(SYSSDK_DEV))) +SYSSDK_DBGSYM = sys-sdk_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH)-dbgsym.ddeb ifeq ($(SDK_FROM_SRC),y) -$(eval $(call add_derived_package,$(APPLIBS),$(APPLIBS_DBGSYM))) +$(eval $(call add_derived_package,$(SYSSDK),$(SYSSDK_DBGSYM))) endif -SX_COMPLIB = sx-complib_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(SX_COMPLIB)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-complib -SX_COMPLIB_DEV = sx-complib-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(SX_COMPLIB),$(SX_COMPLIB_DEV))) -SX_COMPLIB_DBGSYM = sx-complib-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -ifeq ($(SDK_FROM_SRC),y) -$(eval $(call add_derived_package,$(SX_COMPLIB),$(SX_COMPLIB_DBGSYM))) -endif - -SX_EXAMPLES = sx-examples_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(SX_EXAMPLES)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-examples -$(SX_EXAMPLES)_DEPENDS += $(APPLIBS_DEV) $(SXD_LIBS_DEV) -$(SX_EXAMPLES)_RDEPENDS += $(APPLIBS) $(SXD_LIBS) -SX_EXAMPLES_DEV = sx-examples-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(SX_EXAMPLES),$(SX_EXAMPLES_DEV))) -SX_EXAMPLES_DBGSYM = sx-examples-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -ifeq ($(SDK_FROM_SRC),y) -$(eval $(call add_derived_package,$(SX_EXAMPLES),$(SX_EXAMPLES_DBGSYM))) -endif - -SX_GEN_UTILS = sx-gen-utils_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(SX_GEN_UTILS)_SRC_PATH += $(PLATFORM_PATH)/sdk-src/sx-gen-utils -$(SX_GEN_UTILS)_DEPENDS += $(SX_COMPLIB_DEV) -$(SX_GEN_UTILS)_RDEPENDS += $(SX_COMPLIB) -SX_GEN_UTILS_DEV = sx-gen-utils-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(SX_GEN_UTILS),$(SX_GEN_UTILS_DEV))) -SX_GEN_UTILS_DBGSYM = sx-gen-utils-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -ifeq ($(SDK_FROM_SRC),y) -$(eval $(call add_derived_package,$(SX_GEN_UTILS),$(SX_GEN_UTILS_DBGSYM))) -endif - -SXD_LIBS = sxd-libs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(SXD_LIBS)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sxd-libs -$(SXD_LIBS)_DEPENDS += $(SX_COMPLIB_DEV) $(SX_GEN_UTILS_DEV) -SXD_LIBS_DEV = sxd-libs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(SXD_LIBS),$(SXD_LIBS_DEV))) -SXD_LIBS_DBGSYM = sxd-libs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -ifeq ($(SDK_FROM_SRC),y) -$(eval $(call add_derived_package,$(SXD_LIBS),$(SXD_LIBS_DBGSYM))) -endif #packages that are required for runtime only -PYTHON_SDK_API = python-sdk-api_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(PYTHON_SDK_API)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/python-sdk-api -$(PYTHON_SDK_API)_DEPENDS += $(APPLIBS_DEV) $(SXD_LIBS_DEV) $(SWIG) -$(PYTHON_SDK_API)_RDEPENDS += $(APPLIBS) $(SXD_LIBS) -PYTHON_SDK_API_DBGSYM = python-sdk-api-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -ifeq ($(SDK_FROM_SRC),y) -$(eval $(call add_derived_package,$(PYTHON_SDK_API),$(PYTHON_SDK_API_DBGSYM))) -endif - -SX_ACL_HELPER = sx-acl-helper_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(SX_ACL_HELPER)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-acl-helper -$(SX_ACL_HELPER)_DEPENDS += $(SX_COMPLIB_DEV) $(SXD_LIBS_DEV) $(APPLIBS_DEV) -$(SX_ACL_HELPER)_RDEPENDS += $(SX_COMPLIB) $(PYTHON_SDK_API) -SX_ACL_HELPER_DEV = sx-acl-helper-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(SX_ACL_HELPER),$(SX_ACL_HELPER_DEV))) -SX_ACL_HELPER_DBGSYM = sx-acl-helper-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -ifeq ($(SDK_FROM_SRC),y) -$(eval $(call add_derived_package,$(SX_ACL_HELPER),$(SX_ACL_HELPER_DBGSYM))) -endif - -SX_OBJ_DESC_LIB = sx-obj-desc-lib_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(SX_OBJ_DESC_LIB)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-obj-desc-lib -$(SX_OBJ_DESC_LIB)_DEPENDS += $(APPLIBS_DEV) $(SX_COMPLIB_DEV) $(SXD_LIBS_DEV) -$(SX_OBJ_DESC_LIB)_RDEPENDS += $(APPLIBS) $(SX_COMPLIB) $(PYTHON_SDK_API) -SX_OBJ_DESC_LIB_DEV = sx-obj-desc-lib-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(SX_OBJ_DESC_LIB),$(SX_OBJ_DESC_LIB_DEV))) -SX_OBJ_DESC_LIB_DBGSYM = sx-obj-desc-lib-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -ifeq ($(SDK_FROM_SRC),y) -$(eval $(call add_derived_package,$(SX_OBJ_DESC_LIB),$(SX_OBJ_DESC_LIB_DBGSYM))) -endif - -WJH_LIBS = wjh-libs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(WJH_LIBS)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/wjh-libs -$(WJH_LIBS)_DEPENDS += $(SX_COMPLIB_DEV) $(SXD_LIBS_DEV) $(APPLIBS_DEV) $(SX_ACL_HELPER_DEV) -$(WJH_LIBS)_RDEPENDS += $(SX_COMPLIB) $(PYTHON_SDK_API) $(SX_ACL_HELPER) -WJH_LIBS_DEV = wjh-libs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(WJH_LIBS),$(WJH_LIBS_DEV))) -WJH_LIBS_DBGSYM = wjh-libs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb -ifeq ($(SDK_FROM_SRC),y) -$(eval $(call add_derived_package,$(WJH_LIBS),$(WJH_LIBS_DBGSYM))) -endif - -SX_HASH_CALC = sx-hash-calc_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb -$(SX_HASH_CALC)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-hash-calc -$(SX_HASH_CALC)_DEPENDS += $(SX_COMPLIB_DEV) $(SXD_LIBS_DEV) $(APPLIBS_DEV) $(SX_GEN_UTILS_DEV) -$(SX_HASH_CALC)_RDEPENDS += $(SX_COMPLIB) $(SXD_LIBS) $(APPLIBS) -SX_HASH_CALC_DBGSYM = sx-hash-calc-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb -ifeq ($(SDK_FROM_SRC),y) -$(eval $(call add_derived_package,$(SX_HASH_CALC),$(SX_HASH_CALC_DBGSYM))) -endif SX_KERNEL = sx-kernel_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb $(SX_KERNEL)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) diff --git a/platform/nephos/docker-syncd-nephos/supervisord.conf b/platform/nephos/docker-syncd-nephos/supervisord.conf index 944c3be9171..5600e25500c 100644 --- a/platform/nephos/docker-syncd-nephos/supervisord.conf +++ b/platform/nephos/docker-syncd-nephos/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:syncd] @@ -33,7 +35,9 @@ command=/usr/bin/syncd_start.sh priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh index e0576167533..c82ce3023d4 100755 --- a/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh +++ b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh @@ -17,25 +17,6 @@ # pci_iface=eth0-midplane -cp_iface=Ethernet0 -pidfile=/run/dhcl-internal.$cp_iface.pid -leasefile=/var/lib/dhcp/dhcl-internal.$cp_iface.leases - -stop_cp_dhclient() -{ - if [[ -f $pidfile ]]; then - kill $(cat $pidfile) - rm -f $pidfile - fi - rm -f $leasefile -} - -start_cp_dhclient() -{ - stop_cp_dhclient - - /sbin/dhclient -pf $pidfile -lf $leasefile $cp_iface -nw -} start() { @@ -46,17 +27,10 @@ start() if [[ $? != "0" ]]; then exit 1 fi - - hwsku=$(sonic-cfggen -d -v 'DEVICE_METADATA["localhost"]["hwsku"]') - if [[ $hwsku == *"-C1" ]]; then - start_cp_dhclient - fi } stop() { - stop_cp_dhclient - /usr/bin/mst stop rmmod mlx5_ib mlx5_core } diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/bin/platform-dump.sh b/platform/nvidia-bluefield/bluefield-platform-modules/bin/platform-dump.sh index 80dd4e059b1..05254bcf932 100755 --- a/platform/nvidia-bluefield/bluefield-platform-modules/bin/platform-dump.sh +++ b/platform/nvidia-bluefield/bluefield-platform-modules/bin/platform-dump.sh @@ -49,5 +49,13 @@ dump_cmd "lspci -vvv" "lspci" "5" dump_cmd "top -SHb -n 1 | tail -n +8 | sort -nrk 11" "top" "5" dump_cmd "tail /sys/kernel/debug/mlxbf-ptm/monitors/status/*" "mlxbf-ptm-dump" "3" +pushd /dev/mst/ +mstdevs=$(ls mt*) +popd + +for mstdev in $mstdevs; do + dump_cmd "mstdump -full /dev/mst/$mstdev" "mstdump_$mstdev" "20" +done + tar czf /tmp/platform-dump.tar.gz -C $DUMP_FOLDER . rm -rf $DUMP_FOLDER diff --git a/platform/nvidia-bluefield/docker-syncd-bluefield/supervisord.conf b/platform/nvidia-bluefield/docker-syncd-bluefield/supervisord.conf index 6fd59606062..0015bd6797a 100644 --- a/platform/nvidia-bluefield/docker-syncd-bluefield/supervisord.conf +++ b/platform/nvidia-bluefield/docker-syncd-bluefield/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:syncd] @@ -33,7 +35,9 @@ command=/usr/bin/syncd_start.sh priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running diff --git a/platform/p4/docker-sonic-p4/supervisord.conf b/platform/p4/docker-sonic-p4/supervisord.conf index a4026f61c14..ca4ba0c5e2f 100644 --- a/platform/p4/docker-sonic-p4/supervisord.conf +++ b/platform/p4/docker-sonic-p4/supervisord.conf @@ -18,124 +18,156 @@ command=/usr/sbin/rsyslogd -n priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:bm_router] command=ip netns exec sw_net simple_switch -i 0@router_port1 -i 250@router_cpu_port --thrift-port 9091 --log-file bm_logs/router_log --log-flush --notifications-addr ipc:///tmp/bmv2-router-notifications.ipc /usr/share/p4-sai-bm/sai_router.json priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:bm_bridge] command=ip netns exec sw_net simple_switch -i 0@sw_port0 -i 1@sw_port1 -i 2@sw_port2 -i 3@sw_port3 -i 4@sw_port4 -i 5@sw_port5 -i 6@sw_port6 -i 7@sw_port7 -i 7@sw_port7 -i 8@sw_port8 -i 9@sw_port9 -i 10@sw_port10 -i 11@sw_port11 -i 12@sw_port12 -i 13@sw_port13 -i 14@sw_port14 -i 15@sw_port15 -i 16@sw_port16 -i 17@sw_port17 -i 18@sw_port18 -i 19@sw_port19 -i 20@sw_port20 -i 21@sw_port21 -i 22@sw_port22 -i 23@sw_port23 -i 24@sw_port24 -i 25@sw_port25 -i 26@sw_port26 -i 27@sw_port27 -i 28@sw_port28 -i 29@sw_port29 -i 30@sw_port30 -i 31@sw_port31 -i 250@cpu_port -i 251@router_port0 --log-file bm_logs/bridge_log --log-flush /usr/share/p4-sai-bm/sai_bridge.json & priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:redis-server] command=/usr/bin/redis-server /etc/redis/redis.conf priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:syncd] command=/usr/bin/syncd -u autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:orchagent] command=/usr/bin/orchagent.sh priority=5 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:portsyncd] command=/usr/bin/portsyncd priority=6 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:neighsyncd] command=/usr/bin/neighsyncd priority=8 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:teamsyncd] command=/usr/bin/teamsyncd priority=9 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:vlanmgrd] command=/usr/bin/vlanmgrd priority=10 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:intfmgrd] command=/usr/bin/intfmgrd priority=11 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:zebra] command=/usr/lib/quagga/zebra -A 127.0.0.1 priority=12 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:bgpd] command=/usr/lib/quagga/bgpd -A 127.0.0.1 -F priority=13 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:fpmsyncd] command=/usr/bin/fpmsyncd priority=14 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:arp_update] command=/usr/bin/arp_update priority=15 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:fdbsyncd] command=/usr/bin/fdbsyncd priority=16 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true diff --git a/platform/pensando/docker-syncd-pensando/supervisord.conf b/platform/pensando/docker-syncd-pensando/supervisord.conf index 56d8b29de18..42f6e37195b 100644 --- a/platform/pensando/docker-syncd-pensando/supervisord.conf +++ b/platform/pensando/docker-syncd-pensando/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:syncd] @@ -33,7 +35,9 @@ command=/usr/bin/syncd_start.sh priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running diff --git a/platform/vpp b/platform/vpp new file mode 160000 index 00000000000..fbda3bd1034 --- /dev/null +++ b/platform/vpp @@ -0,0 +1 @@ +Subproject commit fbda3bd10348381886038790f11cc2641bf972b9 diff --git a/platform/vs/docker-dash-engine.mk b/platform/vs/docker-dash-engine.mk index 177045f299b..d23b71d1395 100644 --- a/platform/vs/docker-dash-engine.mk +++ b/platform/vs/docker-dash-engine.mk @@ -12,3 +12,4 @@ $(DOCKER_DASH_ENGINE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) $(DOCKER_DASH_ENGINE)_CONTAINER_NAME = dash_engine $(DOCKER_DASH_ENGINE)_CONTAINER_PRIVILEGED = true +$(DOCKER_DASH_ENGINE)_RUN_OPT += --privileged -t diff --git a/platform/vs/docker-dash-engine/Dockerfile.j2 b/platform/vs/docker-dash-engine/Dockerfile.j2 index a3d2ebf034a..e1f6ff946c6 100644 --- a/platform/vs/docker-dash-engine/Dockerfile.j2 +++ b/platform/vs/docker-dash-engine/Dockerfile.j2 @@ -6,7 +6,7 @@ ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update -RUN apt-get install -f -y supervisor rsyslog python3-pip +RUN apt-get install -f -y net-tools supervisor rsyslog python3-pip RUN pip3 install supervisord-dependent-startup COPY ["start.sh", "/usr/bin/"] diff --git a/platform/vs/docker-dash-engine/start.sh b/platform/vs/docker-dash-engine/start.sh index 26adccd38b5..54bb6d3dc92 100755 --- a/platform/vs/docker-dash-engine/start.sh +++ b/platform/vs/docker-dash-engine/start.sh @@ -1,3 +1,9 @@ #!/usr/bin/env bash -simple_switch_grpc --interface 0@eth1 --interface 1@eth2 --log-console --no-p4 +PORT1=eth1 +PORT2=eth2 + +[[ $(cat /sys/class/net/$PORT1/operstate) != up ]] && ifconfig $PORT1 up +[[ $(cat /sys/class/net/$PORT2/operstate) != up ]] && ifconfig $PORT2 up + +simple_switch_grpc --interface 0@$PORT1 --interface 1@$PORT2 --log-console --no-p4 diff --git a/platform/vs/docker-dash-engine/supervisord.conf b/platform/vs/docker-dash-engine/supervisord.conf index df50a2d9a63..f5df597a2a9 100644 --- a/platform/vs/docker-dash-engine/supervisord.conf +++ b/platform/vs/docker-dash-engine/supervisord.conf @@ -17,8 +17,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=true autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -27,7 +29,9 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running diff --git a/platform/vs/docker-gbsyncd-vs.mk b/platform/vs/docker-gbsyncd-vs.mk index f3cd8a139e8..9433a28a06b 100644 --- a/platform/vs/docker-gbsyncd-vs.mk +++ b/platform/vs/docker-gbsyncd-vs.mk @@ -3,7 +3,9 @@ DOCKER_GBSYNCD_PLATFORM_CODE = vs include $(PLATFORM_PATH)/../template/docker-gbsyncd-bookworm.mk -$(DOCKER_GBSYNCD_BASE)_DEPENDS += $(SYNCD_VS) +$(DOCKER_GBSYNCD_BASE)_DEPENDS += $(SYNCD_VS) \ + $(LIBNL3_DEV) \ + $(LIBNL3) $(DOCKER_GBSYNCD_BASE)_DBG_DEPENDS += $(SYNCD_VS_DBG) \ $(LIBSWSSCOMMON_DBG) \ diff --git a/platform/vs/docker-gbsyncd-vs/Dockerfile.j2 b/platform/vs/docker-gbsyncd-vs/Dockerfile.j2 index 1c28688ca7c..59bafc9c920 100644 --- a/platform/vs/docker-gbsyncd-vs/Dockerfile.j2 +++ b/platform/vs/docker-gbsyncd-vs/Dockerfile.j2 @@ -11,8 +11,8 @@ RUN apt-get install -f -y iproute2 libcap2-bin # For DASH engine -COPY debs/libnl-3-dev_3.5.0-1_amd64.deb debs/libnl-route-3-dev_3.5.0-1_amd64.deb debs/ -RUN dpkg -i debs/libnl-3-dev_3.5.0-1_amd64.deb debs/libnl-route-3-dev_3.5.0-1_amd64.deb +COPY debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/ +RUN dpkg -i debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb RUN apt-get install -f -y libabsl20220623 libc-ares2 python3-six libboost-thread1.74.0 libboost-dev libboost-system-dev libboost-thread-dev libboost-filesystem1.74.0 libboost-program-options1.74.0 libboost-thread1.74.0 libnanomsg5 libpcap0.8 libthrift-0.17.0 libboost-dev libboost-filesystem-dev libboost-program-options-dev libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libboost-iostreams1.74.0 libgc1 cpp libboost-dev libboost-all-dev libboost-graph-dev libboost-iostreams-dev libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libthrift-0.17.0 libgrpc++1.51 libgrpc29 libprotobuf32 libboost-dev libboost-system-dev libboost-thread-dev libprotoc-dev protobuf-compiler python3-protobuf libgrpc++-dev libgrpc-dev protobuf-compiler-grpc python3-grpcio diff --git a/platform/vs/docker-gbsyncd-vs/supervisord.conf b/platform/vs/docker-gbsyncd-vs/supervisord.conf index b539349bcf4..ea123787723 100644 --- a/platform/vs/docker-gbsyncd-vs/supervisord.conf +++ b/platform/vs/docker-gbsyncd-vs/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -44,7 +48,9 @@ command=/usr/bin/gbsyncdmgrd priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/platform/vs/docker-sonic-vs.mk b/platform/vs/docker-sonic-vs.mk index 53735eb980c..3e66e94546a 100644 --- a/platform/vs/docker-sonic-vs.mk +++ b/platform/vs/docker-sonic-vs.mk @@ -46,7 +46,7 @@ $(DOCKER_SONIC_VS)_FILES += $(CONFIGDB_LOAD_SCRIPT) \ $(UPDATE_CHASSISDB_CONFIG_SCRIPT) \ $(COPP_CONFIG_TEMPLATE) -$(DOCKER_SONIC_VS)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BULLSEYE) +$(DOCKER_SONIC_VS)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM) SONIC_DOCKER_IMAGES += $(DOCKER_SONIC_VS) -SONIC_BULLSEYE_DOCKERS += $(DOCKER_SONIC_VS) +SONIC_BOOKWORM_DOCKERS += $(DOCKER_SONIC_VS) diff --git a/platform/vs/docker-sonic-vs/Dockerfile.j2 b/platform/vs/docker-sonic-vs/Dockerfile.j2 index 6caa69b301f..92ba5b06dbd 100644 --- a/platform/vs/docker-sonic-vs/Dockerfile.j2 +++ b/platform/vs/docker-sonic-vs/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} -FROM docker-swss-layer-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +FROM docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} ARG docker_container_name @@ -12,24 +12,18 @@ ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update && apt-get install -y gnupg RUN apt-get install -y net-tools \ + iproute2 \ arping \ ndisc6 \ ethtool \ tcpdump \ ifupdown \ bridge-utils \ - python-ply \ - libqt5core5a \ - libqt5network5 \ - libgmp10 \ libjudydebian1 \ openssh-client \ openssh-server \ libc-ares2 \ - grub2-common \ bash-completion \ - libelf1 \ - libmnl0 \ logrotate \ apt-utils \ psmisc \ @@ -37,7 +31,6 @@ RUN apt-get install -y net-tools \ conntrack \ iptables \ jq \ - libzmq5 \ uuid-dev \ # For installing Python m2crypto package # (these can be uninstalled after installation) @@ -67,9 +60,9 @@ RUN apt-get install -y net-tools \ # For libkrb5-dev comerr-dev \ libgssrpc4 \ - libkdb5-10 - -RUN apt-get install -y -t bullseye-backports iproute2 + libkdb5-10 \ + libprotobuf-c-dev \ + protobuf-c-compiler # For sonic-config-engine Python 3 package # Install pyangbind here, outside sonic-config-engine dependencies, as pyangbind causes enum34 to be installed. @@ -81,9 +74,8 @@ RUN pip3 uninstall -y enum34 # Dependencies of restore_neighbors.py RUN pip3 install \ - scapy==2.4.4 \ - pyroute2==0.5.14 \ - netifaces==0.10.9 + pyroute2==0.7.2 \ + netifaces==0.11.0 {% if docker_sonic_vs_debs.strip() -%} # Copy built Debian packages @@ -120,14 +112,15 @@ RUN apt-get autoclean -y RUN apt-get autoremove -y RUN rm -rf /debs ~/.cache -RUN sed -ri 's/^(save .*$)/# \1/g; \ - s/^daemonize yes$/daemonize no/; \ - s/^logfile .*$/logfile ""/; \ - s/^# syslog-enabled no$/syslog-enabled no/; \ - s/^# unixsocket/unixsocket/; \ - s/notify-keyspace-events ""/notify-keyspace-events AKE/; \ - s/redis-server.sock/redis.sock/g; \ - s/^client-output-buffer-limit pubsub [0-9]+mb [0-9]+mb [0-9]+/client-output-buffer-limit pubsub 0 0 0/ \ +RUN sed -ri 's/^# save ""$/save ""/g; \ + s/^daemonize yes$/daemonize no/; \ + s/^logfile .*$/logfile ""/; \ + s/^# syslog-enabled no$/syslog-enabled no/; \ + s/^# unixsocket/unixsocket/; \ + s/redis-server.sock/redis.sock/g; \ + s/^client-output-buffer-limit pubsub [0-9]+mb [0-9]+mb [0-9]+/client-output-buffer-limit pubsub 0 0 0/; \ + s/^notify-keyspace-events ""$/notify-keyspace-events AKE/; \ + s/^databases [0-9]+$/databases 100/ \ ' /etc/redis/redis.conf COPY ["50-default.conf", "/etc/rsyslog.d/"] diff --git a/platform/vs/docker-sonic-vs/frr/zebra.conf b/platform/vs/docker-sonic-vs/frr/zebra.conf index 4c994e60def..695d339cdeb 100644 --- a/platform/vs/docker-sonic-vs/frr/zebra.conf +++ b/platform/vs/docker-sonic-vs/frr/zebra.conf @@ -1,4 +1,5 @@ no fpm use-next-hop-groups fpm address 127.0.0.1 +zebra nexthop-group keep 1 diff --git a/platform/vs/docker-sonic-vs/start.sh b/platform/vs/docker-sonic-vs/start.sh index f28f05f3707..f7dbde8dcff 100755 --- a/platform/vs/docker-sonic-vs/start.sh +++ b/platform/vs/docker-sonic-vs/start.sh @@ -160,6 +160,8 @@ supervisorctl start vlanmgrd supervisorctl start zebra +supervisorctl start mgmtd + supervisorctl start staticd supervisorctl start buffermgrd diff --git a/platform/vs/docker-sonic-vs/supervisord.conf.j2 b/platform/vs/docker-sonic-vs/supervisord.conf.j2 index d8d9ce390cb..a394d29d406 100644 --- a/platform/vs/docker-sonic-vs/supervisord.conf.j2 +++ b/platform/vs/docker-sonic-vs/supervisord.conf.j2 @@ -9,40 +9,50 @@ command=/usr/bin/start.sh priority=1 autostart=true autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:rsyslogd] command=/usr/sbin/rsyslogd -n priority=2 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:redis-server] command=/usr/bin/redis-server /etc/redis/redis.conf priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:redis-chassis] -command=/bin/bash -c "{ [[ -s /var/lib/redis_chassis/dump.rdb ]] || rm -f /var/lib/redis_chassis/dump.rdb; } && mkdir -p /var/lib/redis_chassis && exec /usr/bin/redis-server /etc/redis/redis.conf --bind redis_chassis.server --port 6380 --unixsocket /var/run/redis/redis_chassis.sock --pidfile /var/run/redis/redis_chassis.pid --dir /var/lib/redis_chassis" +command=/bin/bash -c "{ [[ -s /var/lib/redis_chassis/dump.rdb ]] || rm -f /var/lib/redis_chassis/dump.rdb; } && mkdir -p /var/lib/redis_chassis && exec /usr/bin/redis-server /etc/redis/redis.conf --bind redis_chassis.server --port 6380 --protected-mode no --unixsocket /var/run/redis/redis_chassis.sock --pidfile /var/run/redis/redis_chassis.pid --dir /var/lib/redis_chassis" priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:syncd] command=/usr/bin/syncd_start.sh priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/syncd-asan.log{{ asan_extra_options }}" {% endif %} @@ -52,8 +62,10 @@ command=/usr/bin/syncd -s -p /usr/share/sonic/hwsku/pai.profile -x /usr/share/so priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:gearsyncd] command=/usr/bin/gearsyncd -p /usr/share/sonic/hwsku/gearbox_config.json @@ -61,16 +73,20 @@ startsecs=0 priority=5 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:portsyncd] command=/usr/bin/portsyncd priority=5 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/portsyncd-asan.log{{ asan_extra_options }}" {% endif %} @@ -80,8 +96,10 @@ command=/usr/bin/orchagent.sh priority=6 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/orchagent-asan.log{{ asan_extra_options }}" {% endif %} @@ -91,8 +109,10 @@ command=/usr/bin/coppmgrd priority=7 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/coppmgrd-asan.log{{ asan_extra_options }}" {% endif %} @@ -102,8 +122,10 @@ command=/usr/bin/neighsyncd priority=8 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/neighsyncd-asan.log{{ asan_extra_options }}" {% endif %} @@ -113,8 +135,10 @@ command=/usr/bin/teamsyncd priority=9 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/teamsyncd-asan.log{{ asan_extra_options }}" {% endif %} @@ -124,8 +148,10 @@ command=/usr/bin/vlanmgrd priority=10 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/vlanmgrd-asan.log{{ asan_extra_options }}" {% endif %} @@ -135,8 +161,10 @@ command=/usr/bin/intfmgrd priority=11 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/intfmgrd-asan.log{{ asan_extra_options }}" {% endif %} @@ -146,8 +174,10 @@ command=/usr/bin/portmgrd priority=12 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/portmgrd-asan.log{{ asan_extra_options }}" {% endif %} @@ -157,62 +187,92 @@ command=/usr/bin/teammgrd priority=12 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/teammgrd-asan.log{{ asan_extra_options }}" {% endif %} -[program:zebra] -command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic --asic-offload=notify_on_offload +[program:mgmtd] +command=/usr/lib/frr/mgmtd -A 127.0.0.1 priority=13 autostart=false autorestart=false stdout_logfile=syslog stderr_logfile=syslog +[program:zebra] +command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic --asic-offload=notify_on_offload +priority=13 +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true + [program:bgpd] command=/usr/lib/frr/bgpd -A 127.0.0.1 priority=14 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:staticd] command=/usr/lib/frr/staticd -A 127.0.0.1 priority=14 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:fpmsyncd] command=/usr/bin/fpmsyncd priority=15 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/fpmsyncd-asan.log{{ asan_extra_options }}" {% endif %} +[program:pathd] +command=/usr/lib/frr/pathd -A 127.0.0.1 +priority=14 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog + [program:arp_update] command=/usr/bin/arp_update priority=16 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:buffermgrd] command=/usr/bin/buffermgrd.sh priority=17 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/buffermgrd-asan.log{{ asan_extra_options }}" {% endif %} @@ -222,8 +282,10 @@ command=/usr/bin/vrfmgrd priority=18 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/vrfmgrd-asan.log{{ asan_extra_options }}" {% endif %} @@ -235,16 +297,20 @@ autostart=false autorestart=false startsecs=0 startretries=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true [program:nbrmgrd] command=/usr/bin/nbrmgrd priority=20 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/nbrmgrd-asan.log{{ asan_extra_options }}" {% endif %} @@ -254,8 +320,10 @@ command=/usr/bin/vxlanmgrd priority=21 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/vxlanmgrd-asan.log{{ asan_extra_options }}" {% endif %} @@ -265,8 +333,10 @@ command=/usr/bin/sflowmgrd priority=22 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/sflowmgrd-asan.log{{ asan_extra_options }}" {% endif %} @@ -276,8 +346,10 @@ command=/usr/bin/natmgrd priority=23 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/natmgrd-asan.log{{ asan_extra_options }}" {% endif %} @@ -287,8 +359,10 @@ command=/usr/bin/natsyncd priority=24 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/natsyncd-asan.log{{ asan_extra_options }}" {% endif %} @@ -298,8 +372,10 @@ command=/usr/bin/fdbsyncd priority=25 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/fdbsyncd-asan.log{{ asan_extra_options }}" {% endif %} @@ -309,8 +385,10 @@ command=/usr/bin/tunnelmgrd priority=26 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/tunnelmgrd-asan.log{{ asan_extra_options }}" {% endif %} @@ -320,8 +398,10 @@ command=/usr/bin/fabricmgrd priority=27 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true {% if ENABLE_ASAN == "y" %} environment=ASAN_OPTIONS="log_path=/var/log/asan/fabricmgrd-asan.log{{ asan_extra_options }}" {% endif %} diff --git a/platform/vs/docker-syncd-vs.mk b/platform/vs/docker-syncd-vs.mk index a9656f291f2..9ca9746bd7c 100644 --- a/platform/vs/docker-syncd-vs.mk +++ b/platform/vs/docker-syncd-vs.mk @@ -3,7 +3,9 @@ DOCKER_SYNCD_PLATFORM_CODE = vs include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk -$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD_VS) +$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD_VS) \ + $(LIBNL3_DEV) \ + $(LIBNL3) $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_VS_DBG) \ $(LIBSWSSCOMMON_DBG) \ diff --git a/platform/vs/docker-syncd-vs/Dockerfile.j2 b/platform/vs/docker-syncd-vs/Dockerfile.j2 index 6e40fd8225b..b23c1c23481 100644 --- a/platform/vs/docker-syncd-vs/Dockerfile.j2 +++ b/platform/vs/docker-syncd-vs/Dockerfile.j2 @@ -12,8 +12,8 @@ RUN apt-get install -f -y iproute2 libcap2-bin # For DASH engine -COPY debs/libnl-3-dev_3.5.0-1_amd64.deb debs/libnl-route-3-dev_3.5.0-1_amd64.deb debs/ -RUN dpkg -i debs/libnl-3-dev_3.5.0-1_amd64.deb debs/libnl-route-3-dev_3.5.0-1_amd64.deb +COPY debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/ +RUN dpkg -i debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb RUN apt-get install -f -y libabsl20220623 libc-ares2 python3-six libboost-thread1.74.0 libboost-dev libboost-system-dev libboost-thread-dev libboost-filesystem1.74.0 libboost-program-options1.74.0 libboost-thread1.74.0 libnanomsg5 libpcap0.8 libthrift-0.17.0 libboost-dev libboost-filesystem-dev libboost-program-options-dev libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libboost-iostreams1.74.0 libgc1 cpp libboost-dev libboost-all-dev libboost-graph-dev libboost-iostreams-dev libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libthrift-0.17.0 libgrpc++1.51 libgrpc29 libprotobuf32 libboost-dev libboost-system-dev libboost-thread-dev libprotoc-dev protobuf-compiler python3-protobuf libgrpc++-dev libgrpc-dev protobuf-compiler-grpc python3-grpcio diff --git a/platform/vs/docker-syncd-vs/supervisord.conf b/platform/vs/docker-syncd-vs/supervisord.conf index 7e18237b7de..1bcf82989d0 100644 --- a/platform/vs/docker-syncd-vs/supervisord.conf +++ b/platform/vs/docker-syncd-vs/supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=unexpected -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -44,7 +48,9 @@ command=/usr/bin/syncd_start.sh priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/platform/vs/tests/bgp/files/gr_livelock/bgpd.conf b/platform/vs/tests/bgp/files/gr_livelock/bgpd.conf index dc861ed4693..e52c771a1da 100644 --- a/platform/vs/tests/bgp/files/gr_livelock/bgpd.conf +++ b/platform/vs/tests/bgp/files/gr_livelock/bgpd.conf @@ -6,10 +6,10 @@ router bgp 65501 neighbor 10.0.0.1 remote-as 65502 address-family ipv4 neighbor 10.0.0.1 activate - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor 10.0.0.3 remote-as 65503 address-family ipv4 neighbor 10.0.0.3 activate - maximum-paths 64 + maximum-paths 514 exit-address-family diff --git a/platform/vs/tests/bgp/files/no_export/bgpd.conf b/platform/vs/tests/bgp/files/no_export/bgpd.conf index cd87c330c29..be97c1c37ab 100644 --- a/platform/vs/tests/bgp/files/no_export/bgpd.conf +++ b/platform/vs/tests/bgp/files/no_export/bgpd.conf @@ -5,10 +5,10 @@ router bgp 65501 neighbor 10.0.0.1 remote-as 65502 address-family ipv4 neighbor 10.0.0.1 activate - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor 10.0.0.3 remote-as 65503 address-family ipv4 neighbor 10.0.0.3 activate - maximum-paths 64 + maximum-paths 514 exit-address-family diff --git a/rules/config b/rules/config index 8229160b0d7..0ab40596ad3 100644 --- a/rules/config +++ b/rules/config @@ -54,7 +54,7 @@ DEFAULT_PASSWORD = YourPaSsWoRd # ENABLE_ZTP - installs Zero Touch Provisioning support. # ENABLE_ZTP = y -# INCLUDE_PDE - Enable platform development enviroment +# INCLUDE_PDE - Enable platform development environment # INCLUDE_PDE = y # SHUTDOWN_BGP_ON_START - if set to y all bgp sessions will be in admin down state when # bgp service starts. @@ -124,6 +124,9 @@ DEFAULT_VS_PREPARE_MEM = yes # INCLUDE_SYSTEM_GNMI - build docker-sonic-gnmi for system gnmi support INCLUDE_SYSTEM_GNMI = y +# INCLUDE_SYSTEM_BMP - build docker-sonic-bmp for system bmp support +INCLUDE_SYSTEM_BMP = y + # INCLUDE_SYSTEM_EVENTD - build docker-eventd for system eventd support INCLUDE_SYSTEM_EVENTD = y @@ -261,7 +264,7 @@ TRUSTED_GPG_URLS = https://packages.trafficmanager.net/debian/public_key.gpg,htt # web : web packages, downloaded by wget, curl # git : git repositories, donloaded by git clone # docker: docker base images -SONIC_VERSION_CONTROL_COMPONENTS ?= none +SONIC_VERSION_CONTROL_COMPONENTS ?= deb,py2,py3,web,git,docker ifeq ($(SONIC_VERSION_CONTROL_COMPONENTS),all) override MIRROR_SNAPSHOT = y @@ -300,7 +303,7 @@ INCLUDE_MUX = y ENABLE_ASAN ?= n # reset default container registry from dockerhub to other -DEFAULT_CONTAINER_REGISTRY ?= +DEFAULT_CONTAINER_REGISTRY ?= publicmirror.azurecr.io # INCLUDE_BOOTCHART - install systemd-bootchart INCLUDE_BOOTCHART = y diff --git a/rules/dash-sai.mk b/rules/dash-sai.mk index 7accf72e901..54f3771eeee 100644 --- a/rules/dash-sai.mk +++ b/rules/dash-sai.mk @@ -1,7 +1,7 @@ # DASH SAI repo: https://github.com/sonic-net/DASH DASH_SAI_VERSION = 1.0.0 -DASH_SAI_COMMIT = cc281333e24ade258773ea843f669251a44d7c9a +DASH_SAI_COMMIT = f5b4b70ec5a0b43b4f63a9375a56a7e20a54ed0e export DASH_SAI_VERSION export DASH_SAI_COMMIT diff --git a/rules/docker-bmp.dep b/rules/docker-bmp.dep new file mode 100644 index 00000000000..09bd14d0dfc --- /dev/null +++ b/rules/docker-bmp.dep @@ -0,0 +1,10 @@ +DPATH := $($(DOCKER_BMP)_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/docker-bmp.mk rules/docker-bmp.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(DPATH)) + +$(DOCKER_BMP)_CACHE_MODE := GIT_CONTENT_SHA +$(DOCKER_BMP)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(DOCKER_BMP)_DEP_FILES := $(DEP_FILES) + +$(eval $(call add_dbg_docker,$(DOCKER_BMP),$(DOCKER_BMP_DBG))) \ No newline at end of file diff --git a/rules/docker-bmp.mk b/rules/docker-bmp.mk new file mode 100644 index 00000000000..95ad79799e6 --- /dev/null +++ b/rules/docker-bmp.mk @@ -0,0 +1,46 @@ +# docker image for BMP agent + +DOCKER_BMP_STEM = docker-sonic-bmp +DOCKER_BMP = $(DOCKER_BMP_STEM).gz +DOCKER_BMP_DBG = $(DOCKER_BMP_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_BMP)_PATH = $(DOCKERS_PATH)/$(DOCKER_BMP_STEM) + +$(DOCKER_BMP)_DEPENDS += $(LIBSWSSCOMMON) \ + $(SONIC_BMPD) + +$(DOCKER_BMP)_PYTHON_WHEELS = $(SONIC_BMPCFGD) +$(DOCKER_BMP)_INSTALL_DEBS = $(LIBSWSSCOMMON) \ + $(SONIC_BMPD) \ + $(PYTHON3_SWSSCOMMON) \ + $(LIBYANG_PY3) + +$(DOCKER_BMP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) + +$(DOCKER_BMP)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) + +$(DOCKER_BMP)_VERSION = 1.0.0 +$(DOCKER_BMP)_PACKAGE_NAME = bmp + +$(DOCKER_BMP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) + +SONIC_DOCKER_IMAGES += $(DOCKER_BMP) +SONIC_BOOKWORM_DOCKERS += $(DOCKER_BMP) +ifeq ($(INCLUDE_SYSTEM_BMP), y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_BMP) +endif + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_BMP_DBG) +SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_BMP_DBG) +ifeq ($(INCLUDE_SYSTEM_BMP), y) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_BMP_DBG) +endif + +$(DOCKER_BMP)_CONTAINER_NAME = bmp +$(DOCKER_BMP)_RUN_OPT += -t +$(DOCKER_BMP)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_BMP)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro +$(DOCKER_BMP)_RUN_OPT += -v /var/run/dbus:/var/run/dbus:rw + +$(DOCKER_BMP)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) +$(DOCKER_BMP)_BASE_IMAGE_FILES += monit_bmp:/etc/monit/conf.d \ No newline at end of file diff --git a/rules/docker-database.mk b/rules/docker-database.mk index 3b16960f632..55e78b52336 100644 --- a/rules/docker-database.mk +++ b/rules/docker-database.mk @@ -30,7 +30,7 @@ SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_DATABASE_DBG) $(DOCKER_DATABASE)_CONTAINER_NAME = database $(DOCKER_DATABASE)_RUN_OPT += -t --security-opt apparmor=unconfined --security-opt="systempaths=unconfined" $(DOCKER_DATABASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_DATABASE)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_DATABASE)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_DATABASE)_BASE_IMAGE_FILES += redis-cli:/usr/bin/redis-cli $(DOCKER_DATABASE)_FILES += $(SYSCTL_NET_CONFIG) $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-dhcp-relay.mk b/rules/docker-dhcp-relay.mk index 6462b4d4116..c8aa011d43f 100644 --- a/rules/docker-dhcp-relay.mk +++ b/rules/docker-dhcp-relay.mk @@ -48,7 +48,7 @@ endif $(DOCKER_DHCP_RELAY)_CONTAINER_NAME = dhcp_relay $(DOCKER_DHCP_RELAY)_CONTAINER_PRIVILEGED = false $(DOCKER_DHCP_RELAY)_CONTAINER_VOLUMES += /etc/sonic:/etc/sonic:ro -$(DOCKER_DHCP_RELAY)_CONTAINER_VOLUMES += /etc/timezone:/etc/timezone:ro +$(DOCKER_DHCP_RELAY)_CONTAINER_VOLUMES += /etc/localtime:/etc/localtime:ro $(DOCKER_DHCP_RELAY)_CONTAINER_TMPFS += /tmp/ $(DOCKER_DHCP_RELAY)_CONTAINER_TMPFS += /var/tmp/ diff --git a/rules/docker-dhcp-server.mk b/rules/docker-dhcp-server.mk index b3960f16a9c..530fdd9a411 100644 --- a/rules/docker-dhcp-server.mk +++ b/rules/docker-dhcp-server.mk @@ -37,6 +37,7 @@ endif $(DOCKER_DHCP_SERVER)_CONTAINER_NAME = dhcp_server $(DOCKER_DHCP_SERVER)_VERSION = 1.0.0 $(DOCKER_DHCP_SERVER)_PACKAGE_NAME = dhcp-server +$(DOCKER_DHCP_SERVER)_CONTAINER_VOLUMES += /etc/localtime:/etc/localtime:ro $(DOCKER_DHCP_SERVER)_SERVICE_REQUIRES = config-setup $(DOCKER_DHCP_SERVER)_SERVICE_AFTER = swss syncd diff --git a/rules/docker-eventd.mk b/rules/docker-eventd.mk index 77c4fad21ea..510dc338af0 100644 --- a/rules/docker-eventd.mk +++ b/rules/docker-eventd.mk @@ -35,7 +35,7 @@ $(DOCKER_EVENTD)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) $(DOCKER_EVENTD)_CONTAINER_NAME = eventd $(DOCKER_EVENTD)_RUN_OPT += -t $(DOCKER_EVENTD)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_EVENTD)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_EVENTD)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro SONIC_BOOKWORM_DOCKERS += $(DOCKER_EVENTD) SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_EVENTD_DBG) diff --git a/rules/docker-fpm-frr.mk b/rules/docker-fpm-frr.mk index f3353e3a34d..edfa17f5eb6 100644 --- a/rules/docker-fpm-frr.mk +++ b/rules/docker-fpm-frr.mk @@ -30,7 +30,7 @@ SONIC_DOCKER_DBG_IMAGES += $(DOCKER_FPM_FRR_DBG) $(DOCKER_FPM_FRR)_CONTAINER_NAME = bgp $(DOCKER_FPM_FRR)_RUN_OPT += -t --cap-add=NET_ADMIN --cap-add=SYS_ADMIN $(DOCKER_FPM_FRR)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_FPM_FRR)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_FPM_FRR)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_FPM_FRR)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-gnmi.mk b/rules/docker-gnmi.mk index fccbafd2a88..9f2c6ac7406 100644 --- a/rules/docker-gnmi.mk +++ b/rules/docker-gnmi.mk @@ -32,7 +32,7 @@ endif $(DOCKER_GNMI)_CONTAINER_NAME = gnmi $(DOCKER_GNMI)_RUN_OPT += -t $(DOCKER_GNMI)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_GNMI)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_GNMI)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_GNMI)_RUN_OPT += -v /var/run/dbus:/var/run/dbus:rw $(DOCKER_GNMI)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-iccpd.mk b/rules/docker-iccpd.mk index a83f93642e9..eff5b4d68dc 100644 --- a/rules/docker-iccpd.mk +++ b/rules/docker-iccpd.mk @@ -23,7 +23,7 @@ endif $(DOCKER_ICCPD)_CONTAINER_NAME = iccpd $(DOCKER_ICCPD)_RUN_OPT += -t --cap-add=NET_ADMIN $(DOCKER_ICCPD)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_ICCPD)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_ICCPD)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_ICCPD)_BASE_IMAGE_FILES += mclagdctl:/usr/bin/mclagdctl diff --git a/rules/docker-lldp.mk b/rules/docker-lldp.mk index 81cc582a3f1..e245da3dcae 100644 --- a/rules/docker-lldp.mk +++ b/rules/docker-lldp.mk @@ -30,7 +30,7 @@ SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_LLDP_DBG) $(DOCKER_LLDP)_CONTAINER_NAME = lldp $(DOCKER_LLDP)_RUN_OPT += -t --cap-add=NET_ADMIN $(DOCKER_LLDP)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_LLDP)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_LLDP)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_LLDP)_BASE_IMAGE_FILES += lldpctl:/usr/bin/lldpctl $(DOCKER_LLDP)_BASE_IMAGE_FILES += lldpcli:/usr/bin/lldpcli diff --git a/rules/docker-macsec.mk b/rules/docker-macsec.mk index df52eccdf70..682ef619e9b 100644 --- a/rules/docker-macsec.mk +++ b/rules/docker-macsec.mk @@ -41,7 +41,7 @@ $(DOCKER_MACSEC)_VERSION = 1.0.0 $(DOCKER_MACSEC)_PACKAGE_NAME = macsec $(DOCKER_MACSEC)_CONTAINER_PRIVILEGED = false $(DOCKER_MACSEC)_CONTAINER_VOLUMES += /etc/sonic:/etc/sonic:ro -$(DOCKER_MACSEC)_CONTAINER_VOLUMES += /etc/timezone:/etc/timezone:ro +$(DOCKER_MACSEC)_CONTAINER_VOLUMES += /etc/localtime:/etc/localtime:ro $(DOCKER_MACSEC)_CONTAINER_VOLUMES += /host/warmboot:/var/warmboot $(DOCKER_MACSEC)_SERVICE_REQUIRES = config-setup diff --git a/rules/docker-mux.mk b/rules/docker-mux.mk index a0b17323380..1f973755cf9 100644 --- a/rules/docker-mux.mk +++ b/rules/docker-mux.mk @@ -35,5 +35,5 @@ SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_MUX_DBG) $(DOCKER_MUX)_CONTAINER_NAME = mux $(DOCKER_MUX)_RUN_OPT += -t $(DOCKER_MUX)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_MUX)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_MUX)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_MUX)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-nat.mk b/rules/docker-nat.mk index d15c4362288..475ff4507f3 100644 --- a/rules/docker-nat.mk +++ b/rules/docker-nat.mk @@ -31,7 +31,7 @@ endif $(DOCKER_NAT)_CONTAINER_NAME = nat $(DOCKER_NAT)_RUN_OPT += -t --cap-add=NET_ADMIN $(DOCKER_NAT)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_NAT)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_NAT)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_NAT)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_NAT)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-orchagent.mk b/rules/docker-orchagent.mk index 7cf538eaeb8..2095306689f 100644 --- a/rules/docker-orchagent.mk +++ b/rules/docker-orchagent.mk @@ -37,9 +37,9 @@ SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_ORCHAGENT_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_ORCHAGENT_DBG) $(DOCKER_ORCHAGENT)_CONTAINER_NAME = swss -$(DOCKER_ORCHAGENT)_RUN_OPT += --privileged -t +$(DOCKER_ORCHAGENT)_RUN_OPT += -t --cap-add=NET_ADMIN --security-opt apparmor=unconfined --security-opt="systempaths=unconfined" $(DOCKER_ORCHAGENT)_RUN_OPT += -v /etc/network/interfaces:/etc/network/interfaces:ro -$(DOCKER_ORCHAGENT)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_ORCHAGENT)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_ORCHAGENT)_RUN_OPT += -v /etc/network/interfaces.d/:/etc/network/interfaces.d/:ro $(DOCKER_ORCHAGENT)_RUN_OPT += -v /host/machine.conf:/host/machine.conf:ro $(DOCKER_ORCHAGENT)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro diff --git a/rules/docker-p4rt.mk b/rules/docker-p4rt.mk index 85cfb67552c..4b359be3c97 100644 --- a/rules/docker-p4rt.mk +++ b/rules/docker-p4rt.mk @@ -33,7 +33,7 @@ endif $(DOCKER_P4RT)_CONTAINER_NAME = p4rt $(DOCKER_P4RT)_RUN_OPT += -t $(DOCKER_P4RT)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_P4RT)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_P4RT)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_P4RT)_GIT_COMMIT = $(shell cd "$($(SONIC_P4RT)_SRC_PATH)" && git log -n 1 --format=format:"%H %s" || echo "Unable to fetch git log for p4rt") $(DOCKER_P4RT)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-platform-monitor.mk b/rules/docker-platform-monitor.mk index 71f9678b5f6..0b79fd936a0 100644 --- a/rules/docker-platform-monitor.mk +++ b/rules/docker-platform-monitor.mk @@ -53,7 +53,8 @@ SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_PLATFORM_MONITOR_DBG) $(DOCKER_PLATFORM_MONITOR)_CONTAINER_NAME = pmon $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += --privileged -t $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro +$(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /host/reboot-cause:/host/reboot-cause:rw $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /host/pmon/stormond:/usr/share/stormond:rw $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /var/run/platform_cache:/var/run/platform_cache:ro $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /usr/share/sonic/device/pddf:/usr/share/sonic/device/pddf:ro diff --git a/rules/docker-router-advertiser.mk b/rules/docker-router-advertiser.mk index fc23a43192e..2537bfddfed 100644 --- a/rules/docker-router-advertiser.mk +++ b/rules/docker-router-advertiser.mk @@ -33,5 +33,5 @@ SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_ROUTER_ADVERTISER_DBG) $(DOCKER_ROUTER_ADVERTISER)_CONTAINER_NAME = radv $(DOCKER_ROUTER_ADVERTISER)_RUN_OPT += -t $(DOCKER_ROUTER_ADVERTISER)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_ROUTER_ADVERTISER)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_ROUTER_ADVERTISER)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_ROUTER_ADVERTISER)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) diff --git a/rules/docker-sflow.mk b/rules/docker-sflow.mk index cf54436a091..84e096927d9 100644 --- a/rules/docker-sflow.mk +++ b/rules/docker-sflow.mk @@ -32,7 +32,7 @@ endif $(DOCKER_SFLOW)_CONTAINER_NAME = sflow $(DOCKER_SFLOW)_RUN_OPT += -t --cap-add=NET_ADMIN --cap-add=SYS_ADMIN $(DOCKER_SFLOW)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SFLOW)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_SFLOW)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_SFLOW)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SFLOW)_BASE_IMAGE_FILES += psample:/usr/bin/psample diff --git a/rules/docker-snmp.mk b/rules/docker-snmp.mk index 3546d47787a..e1891f672be 100644 --- a/rules/docker-snmp.mk +++ b/rules/docker-snmp.mk @@ -30,7 +30,7 @@ SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_SNMP_DBG) $(DOCKER_SNMP)_CONTAINER_NAME = snmp $(DOCKER_SNMP)_RUN_OPT += -t $(DOCKER_SNMP)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SNMP)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_SNMP)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_SNMP)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) $(DOCKER_SNMP)_BASE_IMAGE_FILES += monit_snmp:/etc/monit/conf.d diff --git a/rules/docker-sonic-mgmt-framework.mk b/rules/docker-sonic-mgmt-framework.mk index b93c5e1006d..b61716bb8f6 100644 --- a/rules/docker-sonic-mgmt-framework.mk +++ b/rules/docker-sonic-mgmt-framework.mk @@ -31,7 +31,7 @@ endif $(DOCKER_MGMT_FRAMEWORK)_CONTAINER_NAME = mgmt-framework $(DOCKER_MGMT_FRAMEWORK)_RUN_OPT += -t $(DOCKER_MGMT_FRAMEWORK)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_MGMT_FRAMEWORK)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_MGMT_FRAMEWORK)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_MGMT_FRAMEWORK)_RUN_OPT += -v /etc:/host_etc:ro $(DOCKER_MGMT_FRAMEWORK)_RUN_OPT += -v /var/run/dbus:/var/run/dbus:rw $(DOCKER_MGMT_FRAMEWORK)_RUN_OPT += --mount type=bind,source="/var/platform/",target="/mnt/platform/" diff --git a/rules/docker-teamd.mk b/rules/docker-teamd.mk index 6d29e0f7e4c..400268404b2 100644 --- a/rules/docker-teamd.mk +++ b/rules/docker-teamd.mk @@ -34,7 +34,7 @@ endif $(DOCKER_TEAMD)_CONTAINER_NAME = teamd $(DOCKER_TEAMD)_RUN_OPT += -t --cap-add=NET_ADMIN $(DOCKER_TEAMD)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_TEAMD)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_TEAMD)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_TEAMD)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_TEAMD)_BASE_IMAGE_FILES += teamdctl:/usr/bin/teamdctl diff --git a/rules/docker-telemetry.mk b/rules/docker-telemetry.mk index f710eedd572..bcbb68dfdb9 100644 --- a/rules/docker-telemetry.mk +++ b/rules/docker-telemetry.mk @@ -30,7 +30,7 @@ endif $(DOCKER_TELEMETRY)_CONTAINER_NAME = telemetry $(DOCKER_TELEMETRY)_RUN_OPT += -t $(DOCKER_TELEMETRY)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_TELEMETRY)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_TELEMETRY)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_TELEMETRY)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) $(DOCKER_TELEMETRY)_BASE_IMAGE_FILES += monit_telemetry:/etc/monit/conf.d diff --git a/rules/frr.mk b/rules/frr.mk index da42179a031..ff3c3ea4ab1 100644 --- a/rules/frr.mk +++ b/rules/frr.mk @@ -1,9 +1,9 @@ # FRRouting (frr) package -FRR_VERSION = 8.5.4 +FRR_VERSION = 10.0.1 FRR_SUBVERSION = 0 -FRR_BRANCH = frr/8.5 -FRR_TAG = frr-8.5.4 +FRR_BRANCH = frr-10.0.1 +FRR_TAG = frr-10.0.1 export FRR_VERSION FRR_SUBVERSION FRR_BRANCH FRR_TAG diff --git a/rules/libnl3.mk b/rules/libnl3.mk index cdd807b2f5c..a40392e7784 100644 --- a/rules/libnl3.mk +++ b/rules/libnl3.mk @@ -1,49 +1,52 @@ # libnl3 -LIBNL3_VERSION_BASE = 3.5.0 -LIBNL3_VERSION = $(LIBNL3_VERSION_BASE)-1 +LIBNL3_VERSION_BASE = 3.7.0 +LIBNL3_VERSION = $(LIBNL3_VERSION_BASE)-0.2 +LIBNL3_VERSION_SONIC = $(LIBNL3_VERSION_BASE)-0.2+b1sonic1 export LIBNL3_VERSION_BASE export LIBNL3_VERSION +export LIBNL3_VERSION_SONIC -LIBNL3 = libnl-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +LIBNL3 = libnl-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb $(LIBNL3)_SRC_PATH = $(SRC_PATH)/libnl3 SONIC_MAKE_DEBS += $(LIBNL3) -LIBNL3_DEV = libnl-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +LIBNL3_DEV = libnl-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb +$(LIBNL3_DEV)_DEPENDS += $(LIBNL3) $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL3_DEV))) -LIBNL_GENL3 = libnl-genl-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +LIBNL_GENL3 = libnl-genl-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb $(LIBNL_GENL3)_RDEPENDS += $(LIBNL3) $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_GENL3))) -LIBNL_GENL3_DEV = libnl-genl-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +LIBNL_GENL3_DEV = libnl-genl-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb $(LIBNL_GENL3_DEV)_DEPENDS += $(LIBNL_GENL3) $(LIBNL3_DEV) $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_GENL3_DEV))) -LIBNL_ROUTE3 = libnl-route-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +LIBNL_ROUTE3 = libnl-route-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb $(LIBNL_ROUTE3)_RDEPENDS += $(LIBNL3) $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_ROUTE3))) -LIBNL_ROUTE3_DEV = libnl-route-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +LIBNL_ROUTE3_DEV = libnl-route-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb $(LIBNL_ROUTE3_DEV)_DEPENDS += $(LIBNL_ROUTE3) $(LIBNL3_DEV) $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_ROUTE3_DEV))) -LIBNL_NF3 = libnl-nf-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +LIBNL_NF3 = libnl-nf-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb $(LIBNL_NF3)_DEPENDS += $(LIBNL_ROUTE3_DEV) $(LIBNL_NF3)_RDEPENDS += $(LIBNL_ROUTE3) $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_NF3))) -LIBNL_NF3_DEV = libnl-nf-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +LIBNL_NF3_DEV = libnl-nf-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb $(LIBNL_NF3_DEV)_DEPENDS += $(LIBNL_NF3) $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_NF3_DEV))) -LIBNL_CLI = libnl-cli-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +LIBNL_CLI = libnl-cli-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb $(LIBNL_CLI)_DEPENDS += $(LIBNL_GENL3_DEV) $(LIBNL_NF3_DEV) $(LIBNL_ROUTE3_DEV) $(LIBNL_CLI)_RDEPENDS += $(LIBNL_GENL3) $(LIBNL_NF3) $(LIBNL_ROUTE3) $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_CLI))) -LIBNL_CLI_DEV = libnl-cli-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +LIBNL_CLI_DEV = libnl-cli-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb $(LIBNL_CLI_DEV)_DEPENDS += $(LIBNL_CLI) $(LIBNL_GENL3_DEV) $(LIBNL_NF3_DEV) $(LIBNL_ROUTE3_DEV) $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_CLI_DEV))) diff --git a/rules/libyang2.mk b/rules/libyang2.mk index ca6d611b52e..e683ff05eb1 100644 --- a/rules/libyang2.mk +++ b/rules/libyang2.mk @@ -1,8 +1,8 @@ # libyang2 -LIBYANG2_VERSION_BASE = 2.0 -LIBYANG2_VERSION = $(LIBYANG2_VERSION_BASE).112 -LIBYANG2_SUBVERSION = 6 +LIBYANG2_VERSION_BASE = 2.1 +LIBYANG2_VERSION = $(LIBYANG2_VERSION_BASE).148 +LIBYANG2_SUBVERSION = 0.2 LIBYANG2_FULLVERSION = $(LIBYANG2_VERSION)-$(LIBYANG2_SUBVERSION) export LIBYANG2_VERSION_BASE @@ -10,14 +10,14 @@ export LIBYANG2_VERSION export LIBYANG2_SUBVERSION export LIBYANG2_FULLVERSION -LIBYANG2 = libyang2_$(LIBYANG2_FULLVERSION)_$(CONFIGURED_ARCH).deb +LIBYANG2 = libyang2t64_$(LIBYANG2_FULLVERSION)_$(CONFIGURED_ARCH).deb $(LIBYANG2)_SRC_PATH = $(SRC_PATH)/libyang2 SONIC_MAKE_DEBS += $(LIBYANG2) LIBYANG2_DEV = libyang2-dev_$(LIBYANG2_FULLVERSION)_$(CONFIGURED_ARCH).deb $(eval $(call add_derived_package,$(LIBYANG2),$(LIBYANG2_DEV))) -LIBYANG2_DBG = libyang2-dbgsym_$(LIBYANG2_FULLVERSION)_$(CONFIGURED_ARCH).deb +LIBYANG2_DBG = libyang2t64-dbgsym_$(LIBYANG2_FULLVERSION)_$(CONFIGURED_ARCH).deb $(eval $(call add_derived_package,$(LIBYANG2),$(LIBYANG2_DBG))) diff --git a/rules/sonic-bmp.dep b/rules/sonic-bmp.dep new file mode 100644 index 00000000000..ff0a10222be --- /dev/null +++ b/rules/sonic-bmp.dep @@ -0,0 +1,10 @@ +SPATH := $($(SONIC_BMPD)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/sonic-bmp.mk rules/sonic-bmp.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files)) + +$(SONIC_BMPD)_CACHE_MODE := GIT_CONTENT_SHA +$(SONIC_BMPD)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(SONIC_BMPD)_DEP_FILES := $(DEP_FILES) +$(SONIC_BMPD)_SMDEP_FILES := $(SMDEP_FILES) +$(SONIC_BMPD)_SMDEP_PATHS := $(SPATH) \ No newline at end of file diff --git a/rules/sonic-bmp.mk b/rules/sonic-bmp.mk new file mode 100644 index 00000000000..1d9f6b1a00c --- /dev/null +++ b/rules/sonic-bmp.mk @@ -0,0 +1,6 @@ +# sonic-bmp package +SONIC_BMPD = sonic-bmp_0.1_$(CONFIGURED_ARCH).deb +$(SONIC_BMPD)_SRC_PATH = $(SRC_PATH)/sonic-bmp +$(SONIC_BMPD)_DEPENDS = $(LIBSWSSCOMMON_DEV) $(LIBSWSSCOMMON) +$(SONIC_BMPD)_RDEPENDS = $(LIBSWSSCOMMON) +SONIC_DPKG_DEBS += $(SONIC_BMPD) \ No newline at end of file diff --git a/rules/sonic-utilities.mk b/rules/sonic-utilities.mk index 64db62c49f5..d0dec73e90e 100644 --- a/rules/sonic-utilities.mk +++ b/rules/sonic-utilities.mk @@ -21,4 +21,7 @@ $(SONIC_UTILITIES_PY3)_DEBS_DEPENDS = $(LIBYANG) \ $(LIBYANG_PY3) \ $(LIBSWSSCOMMON) \ $(PYTHON3_SWSSCOMMON) +ifeq ($(CONFIGURED_PLATFORM),nvidia-bluefield) +$(SONIC_UTILITIES_PY3)_DEBS_DEPENDS += $(LIB_SONIC_DASH_API) +endif SONIC_PYTHON_WHEELS += $(SONIC_UTILITIES_PY3) diff --git a/rules/sonic_bmpcfgd.dep b/rules/sonic_bmpcfgd.dep new file mode 100644 index 00000000000..b5360b7ad05 --- /dev/null +++ b/rules/sonic_bmpcfgd.dep @@ -0,0 +1,13 @@ + +SPATH := $($(SONIC_BMPCFGD)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/sonic_bmpcfgd.mk rules/sonic_bmpcfgd.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(SPATH)) +SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files)) + +$(SONIC_BMPCFGD)_CACHE_MODE := GIT_CONTENT_SHA +$(SONIC_BMPCFGD)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(SONIC_BMPCFGD)_DEP_FILES := $(DEP_FILES) +$(SONIC_BMPCFGD)_SMDEP_FILES := $(SMDEP_FILES) +$(SONIC_BMPCFGD)_SMDEP_PATHS := $(SPATH) + diff --git a/rules/sonic_bmpcfgd.mk b/rules/sonic_bmpcfgd.mk new file mode 100644 index 00000000000..ac39175773d --- /dev/null +++ b/rules/sonic_bmpcfgd.mk @@ -0,0 +1,10 @@ +# sonic-bmpcfgd package + +SONIC_BMPCFGD = sonic_bmpcfgd_services-1.0-py3-none-any.whl +$(SONIC_BMPCFGD)_SRC_PATH = $(SRC_PATH)/sonic-bmpcfgd +$(SONIC_BMPCFGD)_PYTHON_VERSION = 3 +$(SONIC_BMPCFGD)_DEPENDS += $(SONIC_PY_COMMON_PY3) \ + $(SONIC_UTILITIES_PY3) +$(SONIC_BMPCFGD)_DEBS_DEPENDS = $(LIBSWSSCOMMON) \ + $(PYTHON3_SWSSCOMMON) +SONIC_PYTHON_WHEELS += $(SONIC_BMPCFGD) \ No newline at end of file diff --git a/slave.mk b/slave.mk index 22b13a5ad45..f3d9ad3e237 100644 --- a/slave.mk +++ b/slave.mk @@ -170,6 +170,10 @@ ifeq ($(SONIC_INCLUDE_SYSTEM_GNMI),y) INCLUDE_SYSTEM_GNMI = y endif +ifeq ($(SONIC_INCLUDE_SYSTEM_BMP),y) +INCLUDE_SYSTEM_BMP = y +endif + ifeq ($(SONIC_INCLUDE_SYSTEM_EVENTD),y) INCLUDE_SYSTEM_EVENTD = y endif @@ -439,6 +443,7 @@ $(info "INCLUDE_MGMT_FRAMEWORK" : "$(INCLUDE_MGMT_FRAMEWORK)") $(info "INCLUDE_ICCPD" : "$(INCLUDE_ICCPD)") $(info "INCLUDE_SYSTEM_TELEMETRY" : "$(INCLUDE_SYSTEM_TELEMETRY)") $(info "INCLUDE_SYSTEM_GNMI" : "$(INCLUDE_SYSTEM_GNMI)") +$(info "INCLUDE_SYSTEM_BMP" : "$(INCLUDE_SYSTEM_BMP)") $(info "INCLUDE_SYSTEM_EVENTD" : "$(INCLUDE_SYSTEM_EVENTD)") $(info "ENABLE_HOST_SERVICE_ON_START" : "$(ENABLE_HOST_SERVICE_ON_START)") $(info "INCLUDE_RESTAPI" : "$(INCLUDE_RESTAPI)") @@ -472,6 +477,7 @@ $(info "CROSS_BUILD_ENVIRON" : "$(CROSS_BUILD_ENVIRON)") $(info "LEGACY_SONIC_MGMT_DOCKER" : "$(LEGACY_SONIC_MGMT_DOCKER)") $(info "INCLUDE_EXTERNAL_PATCHES" : "$(INCLUDE_EXTERNAL_PATCHES)") $(info "PTF_ENV_PY_VER" : "$(PTF_ENV_PY_VER)") +$(info "ENABLE_MULTIDB" : "$(ENABLE_MULTIDB)") $(info ) else $(info SONiC Build System for $(CONFIGURED_PLATFORM):$(CONFIGURED_ARCH)) @@ -1432,6 +1438,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ export sonic_su_prod_signing_tool="/sonic/scripts/$(shell basename -- $(SECURE_UPGRADE_PROD_SIGNING_TOOL))" export include_system_telemetry="$(INCLUDE_SYSTEM_TELEMETRY)" export include_system_gnmi="$(INCLUDE_SYSTEM_GNMI)" + export include_system_bmp="$(INCLUDE_SYSTEM_BMP)" export include_system_eventd="$(INCLUDE_SYSTEM_EVENTD)" export build_reduce_image_size="$(BUILD_REDUCE_IMAGE_SIZE)" export include_restapi="$(INCLUDE_RESTAPI)" @@ -1491,6 +1498,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ export include_mux="$(INCLUDE_MUX)" export include_bootchart="$(INCLUDE_BOOTCHART)" export enable_bootchart="$(ENABLE_BOOTCHART)" + export enable_multidb="$(ENABLE_MULTIDB)" $(foreach docker, $($*_DOCKERS),\ export docker_image="$(docker)" export docker_image_name="$(basename $(docker))" diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2 index e2fc3780121..9bbce154192 100644 --- a/sonic-slave-bookworm/Dockerfile.j2 +++ b/sonic-slave-bookworm/Dockerfile.j2 @@ -145,6 +145,8 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install libjson-c-dev \ libsystemd-dev \ libcmocka-dev \ + libprotobuf-c-dev \ + protobuf-c-compiler \ #{%- if CROSS_BUILD_ENVIRON != "y" %} python3-all-dev \ python3-all-dbg \ @@ -281,6 +283,10 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install libbsd-dev \ pkg-config \ check \ +# For bmp + librdkafka-dev \ + libyaml-cpp-dev \ + libsasl2-dev \ # For mpdecimal docutils-common \ libjs-sphinxdoc \ @@ -483,6 +489,14 @@ RUN eatmydata apt-get install -y \ python3-thrift {%- endif %} +{%- if CONFIGURED_ARCH == "amd64" %} +# Upgrade CMAKE version +RUN wget https://github.com/Kitware/CMake/releases/download/v3.27.6/cmake-3.27.6-linux-x86_64.sh +RUN chmod +x cmake-3.27.6-linux-x86_64.sh +RUN sudo ./cmake-3.27.6-linux-x86_64.sh --skip-license --prefix=/usr +RUN sudo apt-get update -y +{%- endif %} + {%- if CROSS_BUILD_ENVIRON == "y" %} # Arm vs. amd64 versions conflict - remove amd64 packages RUN apt-get remove -y libnl-3-200 @@ -541,7 +555,7 @@ RUN patch -p1 -i /disable-non-manylinux.patch /usr/local/lib/python3.11/dist-pac RUN pip3 install fastentrypoints mock # For DASH BMv2 -RUN pip3 install jsonpath_ng +RUN pip3 install jsonpath_ng pyyaml-include # For building sonic_ycabled # Note: Match version in bookworm diff --git a/sonic-slave-bullseye/Dockerfile.j2 b/sonic-slave-bullseye/Dockerfile.j2 index 1aca2a0ba5e..06f8cb1e65a 100644 --- a/sonic-slave-bullseye/Dockerfile.j2 +++ b/sonic-slave-bullseye/Dockerfile.j2 @@ -148,6 +148,8 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install libsystemd-dev \ python3-ipaddr \ libcmocka-dev \ + libprotobuf-c-dev \ + protobuf-c-compiler \ #{%- if CROSS_BUILD_ENVIRON != "y" %} python3-all-dev \ python3-all-dbg \ @@ -458,6 +460,14 @@ RUN eatmydata apt install -y \ libabsl20200923 libc-ares2 python3-six libboost-thread1.74.0 libboost-dev libboost-system-dev libboost-thread-dev libboost-filesystem1.74.0 libboost-program-options1.74.0 libboost-thread1.74.0 libnanomsg5 libpcap0.8 libthrift-0.13.0 libboost-dev libboost-filesystem-dev libboost-program-options-dev libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libboost-iostreams1.74.0 libgc1 cpp libboost-dev libboost-all-dev libboost-graph-dev libboost-iostreams-dev libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libthrift-0.13.0 {%- endif %} +{%- if CONFIGURED_ARCH == "amd64" %} +# Upgrade CMAKE version +RUN wget https://github.com/Kitware/CMake/releases/download/v3.27.6/cmake-3.27.6-linux-x86_64.sh +RUN chmod +x cmake-3.27.6-linux-x86_64.sh +RUN sudo ./cmake-3.27.6-linux-x86_64.sh --skip-license --prefix=/usr +RUN sudo apt-get update -y +{%- endif %} + {%- if CROSS_BUILD_ENVIRON == "y" %} # Arm vs. amd64 versions conflict - remove amd64 packages RUN apt-get remove -y libnl-3-200 diff --git a/sonic-slave-buster/Dockerfile.j2 b/sonic-slave-buster/Dockerfile.j2 index dce6daa520a..b65a1a08957 100644 --- a/sonic-slave-buster/Dockerfile.j2 +++ b/sonic-slave-buster/Dockerfile.j2 @@ -144,6 +144,8 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install libsystemd-dev \ python-ipaddr \ libcmocka-dev \ + libprotobuf-c-dev \ + protobuf-c-compiler \ {%- if CROSS_BUILD_ENVIRON != "y" %} python3-all-dev \ python3-all-dbg \ diff --git a/src/dash-sai/Makefile b/src/dash-sai/Makefile index 927f799f9b7..4dfc908f613 100644 --- a/src/dash-sai/Makefile +++ b/src/dash-sai/Makefile @@ -29,6 +29,7 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : p4c-bm2-ss -DTARGET_BMV2_V1MODEL $(P4_MAIN) -o $(P4_OUTDIR)/dash_pipeline.json --p4runtime-files $(P4_OUTDIR)/dash_pipeline_p4rt.json,$(P4_OUTDIR)/dash_pipeline_p4rt.txt --toJSON $(P4_OUTDIR)/dash_pipeline_ir.json # Generate SAI files + sudo ln -sf $(PIPELINE_DIR)/SAI /SAI pushd SAI make popd diff --git a/src/dhcpmon b/src/dhcpmon index 22a7467a8ab..e00352233d4 160000 --- a/src/dhcpmon +++ b/src/dhcpmon @@ -1 +1 @@ -Subproject commit 22a7467a8ab3e26c3d20e959a0702380f0d4b5ae +Subproject commit e00352233d4446ea10df2e9afc969d40409c3b86 diff --git a/src/dhcprelay b/src/dhcprelay index 84e4419eef4..b242307e819 160000 --- a/src/dhcprelay +++ b/src/dhcprelay @@ -1 +1 @@ -Subproject commit 84e4419eef4f9b1fafa86ebb7937fe4904aa0795 +Subproject commit b242307e819d257acc0410a81f839f9cd518bce4 diff --git a/src/flashrom/Makefile b/src/flashrom/Makefile index 1ebc6363e94..70365d648f4 100644 --- a/src/flashrom/Makefile +++ b/src/flashrom/Makefile @@ -12,7 +12,7 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : pushd ./flashrom-$(FLASHROM_VERSION_FULL) # Check out tag: tags/0.9.7 - git checkout -b flashrom-src tags/$(FLASHROM_VERSION_FULL) + git checkout -b flashrom-src v$(FLASHROM_VERSION_FULL) # Apply patch series stg init diff --git a/src/iccpd/include/mlacp_link_handler.h b/src/iccpd/include/mlacp_link_handler.h index 5de4dba5bb8..c862a2f5c6d 100644 --- a/src/iccpd/include/mlacp_link_handler.h +++ b/src/iccpd/include/mlacp_link_handler.h @@ -28,6 +28,8 @@ #include "../include/mlacp_tlv.h" #define MCLAG_MAX_MSG_LEN 4096 +#define MCLAG_MEMBER_NAME_STR_LEN 2048 + #define ICCP_MLAGSYNCD_SEND_MSG_BUFFER_SIZE MCLAG_MAX_MSG_LEN #define ICCP_MLAGSYNCD_RECV_MSG_BUFFER_SIZE (MCLAG_MAX_MSG_LEN * 256) diff --git a/src/iccpd/src/mlacp_link_handler.c b/src/iccpd/src/mlacp_link_handler.c index fe6e639237d..a6ab21c0cdc 100644 --- a/src/iccpd/src/mlacp_link_handler.c +++ b/src/iccpd/src/mlacp_link_handler.c @@ -1050,7 +1050,7 @@ void update_peerlink_isolate_from_all_csm_lif( char *msg_buf = g_iccp_mlagsyncd_send_buf; struct System *sys; - char mlag_po_buf[512]; + char mlag_po_buf[MCLAG_MEMBER_NAME_STR_LEN]; int src_len = 0, dst_len = 0; ssize_t rc; @@ -1065,7 +1065,7 @@ void update_peerlink_isolate_from_all_csm_lif( return; memset(msg_buf, 0, ICCP_MLAGSYNCD_SEND_MSG_BUFFER_SIZE); - memset(mlag_po_buf, 0, 511); + memset(mlag_po_buf, 0, MCLAG_MEMBER_NAME_STR_LEN); msg_hdr = (struct IccpSyncdHDr *)msg_buf; msg_hdr->ver = ICCPD_TO_MCLAGSYNCD_HDR_VERSION; @@ -1130,12 +1130,24 @@ void update_peerlink_isolate_from_all_csm_lif( /* check pif port state and lif pochannel state */ if (lif->isolate_to_peer_link == 1) { - /* need to isolate port, get it's member name */ - if (strlen(mlag_po_buf) != 0) - dst_len += snprintf(mlag_po_buf + dst_len, sizeof(mlag_po_buf) - dst_len, "%s", ","); + //The return value of the snprintf function is the length of the source string. + if ((sizeof(mlag_po_buf) - dst_len) > + (strlen(lif->name) + strlen(lif->portchannel_member_buf) + 2)) + { + /* need to isolate port, get it's member name */ + if (strlen(mlag_po_buf) != 0) + { + dst_len += snprintf(mlag_po_buf + dst_len, sizeof(mlag_po_buf) - dst_len, "%s", ","); + } - dst_len += snprintf(mlag_po_buf + dst_len, sizeof(mlag_po_buf) - dst_len, "%s%s%s", - lif->name, lif->portchannel_member_buf[0] == 0 ? "" : ",", lif->portchannel_member_buf); + dst_len += snprintf(mlag_po_buf + dst_len, sizeof(mlag_po_buf) - dst_len, "%s%s%s", + lif->name, lif->portchannel_member_buf[0] == 0 ? "" : ",", lif->portchannel_member_buf); + } + else + { + ICCPD_LOG_WARN(__FUNCTION__, "the remaining length %d is not enough to store:%s%s%s", + sizeof(mlag_po_buf) - dst_len, lif->name, lif->portchannel_member_buf[0] == 0 ? "" : ",", lif->portchannel_member_buf); + } } } diff --git a/src/libnl3/Makefile b/src/libnl3/Makefile index e510363df7e..34a40d5d237 100644 --- a/src/libnl3/Makefile +++ b/src/libnl3/Makefile @@ -2,33 +2,36 @@ SHELL = /bin/bash .SHELLFLAGS += -e -MAIN_TARGET = libnl-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb -DERIVED_TARGETS = libnl-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ - libnl-genl-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ - libnl-genl-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ - libnl-route-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ - libnl-route-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ - libnl-nf-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ - libnl-nf-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ - libnl-cli-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \ - libnl-cli-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb +MAIN_TARGET = libnl-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb +DERIVED_TARGETS = libnl-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \ + libnl-genl-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \ + libnl-genl-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \ + libnl-route-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \ + libnl-route-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \ + libnl-nf-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \ + libnl-nf-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \ + libnl-cli-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \ + libnl-cli-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : # Obtaining the libnl3 rm -rf ./libnl3-$(LIBNL3_VERSION_BASE) - git clone https://github.com/thom311/libnl libnl3-$(LIBNL3_VERSION_BASE) + dget https://deb.debian.org/debian/pool/main/libn/libnl3/libnl3_$(LIBNL3_VERSION).dsc pushd libnl3-$(LIBNL3_VERSION_BASE) - git checkout tags/libnl$(subst .,_,$(LIBNL3_VERSION_BASE)) - git checkout -b sonic + # Create a git repository here for stg to apply patches + git init + git add -f * + git commit -qm "initial commit" + + # Apply patch series stg init stg import -s ../patch/series - cp -r ../debian debian ifeq ($(CROSS_BUILD_ENVIRON), y) - dpkg-buildpackage -rfakeroot -b -us -uc -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) + DPKG_GENSYMBOLS_CHECK_LEVEL=0 dpkg-buildpackage -rfakeroot -b -us -uc -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) else - dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) + DPKG_GENSYMBOLS_CHECK_LEVEL=0 dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) endif popd diff --git a/src/libnl3/debian/README.Debian b/src/libnl3/debian/README.Debian deleted file mode 100644 index 002e249bbfc..00000000000 --- a/src/libnl3/debian/README.Debian +++ /dev/null @@ -1,17 +0,0 @@ - -libnl versions explained -======================== - -Once libnl3 hits the archive there will exist 3 versions of libnl. -libnl1 with libnl-dev - up until March 2011 the stable version -libnl2 with libnl2-dev - development version that resulted in -libnl3 with libnl3-dev - the new stable (API and ABI wise) version - -libnl1 has currently a lot of users in the archive and a lot of changes -happened since its last upstream release in 2008-01. - -The plan is therefore to introduce libnl3, port the two users of libnl2 -(freesmartphone.org libs and powertop) to it, remove libnl2 and don't touch -libnl1 and libnl-dev for now. - - -- Heiko Stuebner Sat, 21 May 2011 19:25:13 +0200 diff --git a/src/libnl3/debian/README.source b/src/libnl3/debian/README.source deleted file mode 100644 index f6e8ee70da9..00000000000 --- a/src/libnl3/debian/README.source +++ /dev/null @@ -1,10 +0,0 @@ -This package uses the simple-patchsys of cdbs. - -The following patches are used: -0001: Fixes the header inclusion in the Makefiles. - This for example make distcheck -0002: Includes all generated libraries as linktargets in the pkg-config file. - Reason: Currently libnl3 generates a bunch of child libraries. - These don't get individual .pc files from upstream at the moment but - programs linking against libnl3 using the .pc file mostly need these - additional libraries too. diff --git a/src/libnl3/debian/changelog b/src/libnl3/debian/changelog deleted file mode 100644 index 58b68510576..00000000000 --- a/src/libnl3/debian/changelog +++ /dev/null @@ -1,1043 +0,0 @@ -libnl3 (3.5.0-1) unstable; urgency=low - - [ skuklinski ] - * route/link: IFLA_VLAN_PROTOCOL added to vlan_put_attrs - - [ Thomas Haller ] - * rtnl/link: indicate capability NL_CAPABILITY_RTNL_LINK_VLAN_PROTOCOL_SERIALZE - - [ David Ahern ] - * route/vrf: add VRF support - * neigh: add support for NTF_SELF - - [ Beniamino Galvani ] - * route/link: fix parsing of 'remote' attribute for GRE links - - [ Thomas Haller ] - * route/vlan: allow clearing vlan ingress map - - [ David Ahern ] - * link/neigh: add flags option to link and neighbor caches - - [ Thomas Haller ] - * gitignore: ignore test binaries in "tests/" - - [ Beniamino Galvani ] - * route/link: add macvtap support - * route/link: fix dump of parent link for some link types - * route/link: add ipv6 support to vxlan links - - [ Tobias Jungel ] - * route/link: corrected array size for inet_policy - - [ David Ahern ] - * route/link: add link info compare operation - * route/link/vxlan: trivial rename VXLAN_HAS_ prefix and vxi_mask - * route/link/vxlan: add support for link_info compare - - [ Andrew Vagin ] - * libnl: don't use out-of-scope buffer in nl_send_iovec() - - [ David Ahern ] - * link: add AF operation to append attributes to a GETLINK message - * lib: handle family-based parsing of IFLA_AF_SPEC attribute - - [ Thomas Haller ] - * include/linux: update copy of kernel headers - - [ David Ahern ] - * bridge: add support for VLANs - - [ Tobias Jungel ] - * route/link: handle RTEXT_FILTER_BRVLAN_COMPRESSED - * route/link/bridge: fixed return type - - [ Quentin Armitage ] - * route/link: add support for IN6_ADDR_GEN_MODE_STABLE_PRIVACY - - [ Amit Khatri ] - * lib/route: potential memory leak in pktloc.c - - [ Nick Lewycky ] - * remove null dereference from netlink/link.h - - [ David Ahern ] - * lib: update ce-mask to uint64_t - - [ Thomas Haller ] - * libnl: add nl_object_diff64() to libnl-3.sym - * lib/utils: add NL_CAPABILITY_NL_OBJECT_DIFF64 capability - - [ Przemyslaw Szczerbik ] - * lib: add type casting for nla_for_each_nested macro - - [ Tobias Klauser ] - * build: move -rdynamic from CPPFLAGS to LDFLAGS - - [ Thomas Haller ] - * route: sort entries in libnl-route-3.sym by name - - [ Haishuang Yan ] - * ipgre: add support for gretap tunnel - - [ Thadeu Lima de Souza Cascardo ] - * sit: add 6RD support - - [ Thomas Haller ] - * sit/trivial: whitespace - * sit: don't print ip6rd_prefix as integer in sit_dump_details() - * sit: refactor IS_SIT_LINK_ASSERT() - * sit: fix invalid declaration of rtnl_link_sit_get_proto() in sit.h - * sit: add public API for sit 6RD support - - [ Jonas Johansson ] - * neigh: support neighbour flag NTF_SELF - * neigh: add function to look up neighbour (fdb) by ifindex, mac and vlan - - [ Jef Oliver ] - * link: support RTEXT_FILTER_VF - - [ Thomas Haller ] - * link: allow overwriting IFLA_EXT_MASK flag in ao_get_af() function - - [ Przemyslaw Szczerbik ] - * lib: return error on Netlink attribute length overflow - - [ Thomas Egerer ] - * xfrm: fix buffer overflow when copying keys - * xfrm: check length of alg_name before strcpying it - * xfrm: make character pointers in setters const - * xfrm: fix segfault when using encapsulation templates - - [ Thomas Haller ] - * xfrm: reuse encap data in xfrmnl_sa_set_encap_tmpl() - - [ Thomas Egerer ] - * xfrm: fix memory leak for encap original address - * xfrm: attach only one xfrm alg attribute to netlink message - - [ Thomas Haller ] - * xfrm: fix memleak in build_xfrm_sa_message() error-path - - [ Sabrina Dubroca ] - * pass flags through ->io_compare op - * vxlan: properly handle LOOSE_COMPARISON in ->io_compare - * import macsec uapi headers - * lib/route: add macsec support - - [ Thomas Haller ] - * xfrm: allow avoiding buffer overflow for key in xfrmnl_sa_get_*_params() - * route/addr: fix ID comparison for AF_INET and AF_INET6 addresses - * route/addr: fix handling peer addresses for IPv4 addresses - * route/addr: add capability NL_CAPABILITY_RTNL_ADDR_PEER_FIX to indicate address fixes - * build: fix adding macsec files to include/Makefile.am - * libnl-3.2.28-rc1 release - * libnl-3.2.28 release - - [ Craig Gallek ] - * build: fixup headers for C++ inclusion - - [ Peter Wu ] - * trivial: whitespace-only fixes for src and lib - * cli: add noreturn attributes - * xfrm: fix memleak in another error path of build_xfrm_sa_message - * exp: fix a GCC 6 -Wmisleading-indentation warning - * doc: fix URLs and typo - - [ Tobias Jungel ] - * route/addr: address attributes based on object - - [ Thomas Haller ] - * lib: capability NL_CAPABILITY_RTNL_ADDR_PEER_ID_FIX for ID comparison of v4 addresses - * nl-addr: avoid read-out-of-bound in nl_addr_fill_sockaddr() - - [ André Draszik ] - * lib: add utility function nl_strerror_l() - * lib: switch to using strerror_l() instead of strerror_r() - * src: switch to using strerror_l() instead of strerror_r() - - [ Jeff Squyres ] - * compat: add linux/socket.h for __kernel_sa_family_t - - [ Jef Oliver ] - * lib/route: allow override of message type during link change - * lib/route: set IFLA_PROTINFO attribute in request message - * lib/route: modify link/bridge to set attributes - - [ Davide Caratti ] - * macsec: fix endianness of 'sci' parameter - * macsec: fix maximum ICV length - * remove multiple implementations of htonll(), ntohll() - - [ Jef Oliver ] - * lib/route: Fix appending IFLA_BRPORT_FASTLEAVE - * lib/route: Add port state translation functions - * lib/route: Extend Bridge Flags - * lib/route: Allow override of IFLA_AF_SPEC nesting - * lib/route: Support IFLA_BRIDGE_MODE - - [ Thomas Haller ] - * trivial: whitespace - * bridge: change return values for rtnl_link_bridge_get_hwmode() - - [ Michael Braun ] - * macvlan: add support for "source" mode - - [ Thomas Haller ] - * macvlan: adjust types and merge MACVLAN_HAS_MACCOUNT and MACVLAN_HAS_MACDATA - - [ Brandon Carpenter ] - * vxlan: add support for additional VXLAN attributes. - - [ Thomas Haller ] - * vxlan: fix exporting new symbols - * vxlan: remove redundant enable/disable API from vxlan - * vxlan: restore previous VXLAN_ATTR flag values - * vxlan: don't store vxlan flags as ce_mask - * vxlan: refactor setting/getting vxlan flags - * vxlan: fix error code for missing attribute - - [ Jef Oliver ] - * lib/route: Export correct ipgre functionality - - [ Thomas Haller ] - * lib/route: preserve old ABI for rtnl_link_get_pmtudisc() - - [ Thomas Egerer ] - * xfrm: fix xfrm security context management - * xfrm: add capability reference to xfrmnl_sa_set_* - - [ Thomas Haller ] - * xfrm: remove unused struct xfrmnl_sec_ctx from header files - - [ Jef Oliver ] - * lib/route: SRIOV Parse and Read support - * lib/route: SRIOV Clone Support - * lib/route: SRIOV Utility Functions - * lib/route: SRIOV Info Dump Functions - * lib/route: SRIOV Set Functionality - - [ Thomas Haller ] - * route: remove symbols of internal API from ABI - - [ Tobias Klauser ] - * lib/route: keep link stats minlen compatible with kernel < 4.6 - - [ Thomas Haller ] - * utils: add internal _nl_offset_plus_sizeof() macro - * lib/route: use _nl_offset_plus_sizeof() macro for minlen field for rtln_link_policy - - [ Jonas Johansson ] - * Add PPP support - * ppp: update code after review - * ppp: rename local struct ppp_info* variables; pi -> info - * ppp: fix type of file descriptor; uint32_t -> int32_t - - [ Thomas Haller ] - * ppp: fix API in ppp.h header - - [ Sushma Sitaram ] - * route/cls: support setting of selector fields - - [ Tobias Klauser ] - * src: nl-link-stats: use correct rtnl link stats maximum - * lib/route: add rx_nohandler link stats field - - [ Thomas Haller ] - * nl-link-stats: prefer RTNL_LINK_STATS_MAX over __RTNL_LINK_STATS_MAX - * lib/route: pass sizeof() argument to nl_memcpy() - * link: set ifi_change flags for rtnl_link_build_add_request() - * lib: use MSG_PEEK by default for nl_recvmsgs() - - [ Tobias Jungel ] - * cache_mngr: add include callback v2 - - [ Tobias Klauser ] - * cache: fix GCC warning and avoid variable shadowing - - [ Sushma Sitaram ] - * route/act: add gact tc action - - [ Tobias Klauser ] - * link: add support for IFLA_CARRIER_CHANGES - * link: add support for IFLA_PHYS_PORT_NAME - * link: add support for IFLA_PHYS_SWITCH_ID - * link: add support for IFLA_GSO_MAX_SEGS and IFLA_GSO_MAX_SIZE - * link: fix documentation for rtnl_link_get_carrier_changes - - [ Thomas Haller ] - * libnl-3.2.29-rc1 release - * utils/trivial: rename internal _nl_offset_plus_sizeof() macro to _nl_offsetofend() - - [ Beniamino Galvani ] - * Revert "macsec: fix endianness of 'sci' parameter" - * macsec: document byte order for the SCI and port attributes - - [ Thomas Haller ] - * macsec: fix endianness of sci during dump() - * libnl-3.2.29 release - - [ Tobias Klauser ] - * route/tc: Remove unused function tca_set_kind() - - [ Laine Stump ] - * sriov: fix crash in rtnl_link_sriov_parse_vflist - - [ Thomas Haller ] - * sriov: avoid buffer overrun in rtnl_link_sriov_parse_vflist() - - [ Nick Kralevich ] - * lib/utils.c: lazy initialize user_hz and psched_hz - - [ Thomas Haller ] - * lib/utils.c: ensure calling get_psched_settings() for nl_us2ticks()/nl_ticks2us() - * lib/utils.c: add mutex to get_psched_settings() - - [ Nick Kralevich ] - * fopen: add O_CLOEXEC - - [ Thomas Haller ] - * lib/attr.c: check for valid length argument in nla_reserve() - - [ Tobias Klauser ] - * sit: Fix invalid function prototypes in public header - * sriov: Add missing prototype for rtnl_link_vf_vlan_free() - * qdisc/red: Add missing prototypes for rtnl_red_set_limit() and rtnl_red_get_limit() - * fib_lookup: Add missing prototypes to public header - * link/inet6: Include own public header for function prototypes - * link/ipip: Include own public header for function prototypes - * link/ipip: Add missing prototype for rtnl_link_is_ipip() - * link/ipvti: Include own public header for function prototypes - * link/ipvti: Fix and add function prototypes in public header - * link/macsec: Include own public header for function prototypes - * link/sit: Add missing prototype for rtnl_link_is_sit() - * link/ipgre: Add prototype for ABI-preserving wrapper rtnl_link_get_pmtudisc() - * netfilter/queue: Add missing prototype for nfnl_queue_msg_build_verdict_batch() - * netfilter/exp: Add missing function prototypes - * idiag/req: Add missing function prototype - * xfrm/ae: Include own public header for function prototypes - * xfrm/lifetime: Include own public header for function prototypes - * xfrm/sa: Include own public header for function prototypes - * xfrm/selector: Include own public header for function prototypes - * xfrm/template: Include own public header for function prototypes - * pktloc: Add missing function prototypes - * ematch: Add missing function prototypes - * build: Add -Wmissing-prototypes to CPPFLAGS - - [ Jeroen Roovers ] - * build: distribute in.h in6.h libc-compat.h - - [ Thomas Haller ] - * lib: fix comment for nl_recv() about return value for non-blocking read - * lib: check for integer-overflow in nlmsg_reserve() - * build: cleanup top-level Makefile.am - * build: merge include/Makefile.am into top-level makefile - * build: merge lib/Makefile.am into top-level makefile - * build: merge man/Makefile.am into top-level makefile - * build: merge python/Makefile.am into top-level makefile - * build: merge tests/Makefile.am into top-level makefile - * build: merge src/lib/Makefile.am into top-level makefile - * build: merge src/Makefile.am into top-level makefile - * build: enable building cli during tests - * build: move compiler warning flags to separate autoconf variable - * all: enable -Wmissing-prototype warning for all components - * build: enable more warnings - - [ Roopa Prabhu ] - * route: neigh: use NDA_MASTER for neigh->n_master if available - - [ Simon Buttgereit ] - * fix build_xfrm_sp_message index condition - * fix xfrmnl_sp_set_sec_ctx length attributes - * little style fixes. - * update sp_attr condition in build_xfrm_sp_message - * add possibity to delete policy without index - * update documentation of xfrmnl_sp_get_sec_ctx - * fix of boolean operators - - [ Thomas Haller ] - * xfrm: allow quering optional arguments from xfrmnl_sp_get_sec_ctx() - * xfrm: NUL terminate the ctx_str buffer in xfrmnl_sa_set_sec_ctx() - * build: ensure build directory for generated sources exist - * build: pass --disable-dependency-tracking to `make distcheck` - * build: fix creating directories for generated sources - * build: style cleanup in doc/Makefile.am - * build: reorder checks in configure.ac - * build: add tools/build_release.sh script - * include: don't include kernel headers in public libnl3 headers - * include: restore linux header includes in public headers - * libnl-3.3.0-rc1 release - - [ Alexey Brodkin ] - * lib: escape usage of strerror_l() if it doesn't exist in libc - - [ Thomas Haller ] - * all: don't use math.h or link with libm.so - * libnl-3.3.0 release - * tools: fix building doc in build_release.sh - - [ Markus Trapp ] - * route/link: add accessor API for IPv6 flags - - [ Santhosh Kumar ] - * Provide accessors for actions (rtnl_act). - * Do not increment refcount in rtnl_*_get_action APIs. - - [ Thomas Haller ] - * route: fix symbol versioning - - [ David Ahern ] - * route: Add support for netconf - * nl-monitor: All user to specify line format - * nl-monitor: Add support for netconf caches - * route: Add support for MPLS to netconf - * Update fib_rules.h to latest kernel - * rule: Add support for l3mdev in FIB rules - - [ Thomas Haller ] - * rule: change API for setting/getting l3mdev rule property - - [ Tobias Klauser ] - * addr: add AF_VSOCK to translation table - - [ Thomas Haller ] - * build: don't build cli libraries by default - * build: allow building cli without dynamic librarires support - - [ Tobias Klauser ] - * genl: drop usage of GENL_ID_GENERATE - - [ Rasmus Villemoes ] - * lib/cache_mngr.c: avoid memleak if realloc fails - * lib/cache_mgr.c: remove pointless goto - * lib/data.c: avoid memleak if realloc fails - * lib/route/cls/u32.c: remove pointless nl_data_append calls - * lib/route/cls/u32.c: avoid overflowing an unsigned char - * lib/route/cls/u32.c: let the compiler do pointer arithmetic - * lib/route/cls/u32.c: remove bogus comment - * lib/route/qdisc/netem.c: avoid memory leak if realloc fails - - [ Thomas Haller ] - * lib/route/cls/u32.c: use UCHAR_MAX define instead of numeric 255 - * lib/route/qdisc/netem.c/trivial: fix whitespace and indentation in netem_msg_fill_raw() - * lib/route/qdisc/netem.c/trivial: don't use braces for one-line blocks - - [ Rasmus Villemoes ] - * lib/xfrm/ae.c: fix memcpy(dst, dst) bug - * lib/genl/family.c: fix if (x) y; else y; - - [ Thomas Haller ] - * all: avoid compiler warnings -Wimplicit-fallthrough - * lib/route: add /usr/lib64/tc/ search path for netem dist file - - [ David Ahern ] - * Update rtnetlink.h from kernel tree - * Import mpls header from kernel tree - - [ Thomas Haller ] - * build: add include/linux-private/linux/mpls.h to Makefile.am - - [ David Ahern ] - * addr: Add implementations for mpls_ntop and mpls_pton - * addr: Add support for AF_MPLS - * route: Add support for MPLS address family - * route: Add support for ttl propagation in MPLS routes - * Add support for label stack in nl-route commands - * Import lwtunnel encap files from kernel - * route: Add support for lwtunnel encapsulations - * route: Add support for MPLS encap - - [ Thomas Haller ] - * build: add new include/netlink-private/route/*.h files to Makefile.am - - [ Amit Khatri ] - * Potential memory leak becaue of wrong variable check. - - [ Tobias Klauser ] - * cli: include sys/select.h for select(2) - - [ Thomas Haller ] - * libnl-3.4.0-rc1 release - - [ David Ahern ] - * netconf: Put nc reference in msg_parser - - [ Jeroen Roovers ] - * build: add missing headers for issue #152 - - [ Thomas Haller ] - * libnl-3.4.0 release - * nl: add "const" specifier for nla_policy argument of parse functions [ Roopa Prabhu ] - * route: link: add family to dump messages - * route: neigh: print family in neigh dumps - - [ Sebastian Bixl ] - * route/vlan: fix memory corruption in rtnl_link_vlan_set_egress_map - - [ Thomas Haller ] - * route/vlan: fix cloning vlan link in vlan_clone() - * route/vlan: grow buffer exponentially in rtnl_link_vlan_set_egress_map() - * route/vlan: add capability to indicate heap overflow fix in rtnl_link_vlan_set_egress_map() - * route: fix handling old_nh in rtnl_route_parse() and avoid leak - - [ Jef Oliver ] - * Change rtnl_link_af_ops.ao_override_rtm behavior - - [ Chris Grahn ] - * tests: fix bug in test-create-bridge.c - - [ Steffen Vogel ] - * route: add separate function to set netem qdisc delay distribution - - [ Thomas Haller ] - * all: declare all variables at the beginning of scope (-Wdeclaration-after-statement) - * route: add rtnl_netem_set_delay_distribution_data() to linker script - * route: mark data argument for rtnl_netem_set_delay_distribution_data() as const - * route: fix memleak in rtnl_netem_set_delay_distribution_data() - * route: free previous data in rtnl_netem_set_delay_distribution_data() - * travis: enable more warnings during build - - [ Marcos Paulo de Souza ] - * tests: Add test to {de}activate loopback interface - * lib/veth.c: Disassociate link name of peer name - - [ d0u9 ] - * Coding style format - * Add new function for setting ifindex and parent of a classifier cache. - - [ Thomas Haller ] - * route: rename rtnl_cls_cache_set_tcm_params() and fix symbol versioning - - [ d0u9 ] - * Fix for cgroup filter addition problem. - - [ Thomas Haller ] - * lib: merge implementations of nl_attr_end() and nl_attr_keep_empty() - - [ Wang Jian ] - * link: add Geneve support. - - [ Thomas Haller ] - * lib/rtnl: rename public define RTNL_GENEVE_ID_MAX - - [ Roopa Prabhu ] - * lib: route: rule: add rule_groups to cache ops - - [ Jonas Johansson ] - * route/vrf: initalize clone destination with NULL in vrf_clone() - - [ David Ahern ] - * Update fib_rules.h to latest kernel - * rule: Add support for protocol and port ranges - - [ Lukáš Karas ] - * add demo program for listen conntrack events - * nf-ct-add typo - - [ Thomas Haller ] - * build: sort entries in Makefile.am and .gitignore by name - * build: indent libnl-route-3.sym with tabs - - [ Tobias Jungel ] - * neigh: set correct AF for NDA_DST - * neigh: support bridge entries for vxlan interfaces - - [ Tuetuopay ] - * cache: make "result" output argument for nl_cache_mngr_add() optional - - [ Volodymyr Bendiuga ] - * include: copy entire pkt_cls.h from linux - * route:cls: add matchall classifier - - [ Thomas Haller ] - * route/mall: fix deep cloning mall - - [ Tuetuopay ] - * route/link: fix sequence number handling in rtnl_link_change() - - [ Thomas Haller ] - * route/link: assert in rtnl_link_change() that the sequence number is set as expected - * nl-msg: explicitly initialize nlmsg_seq and nlmsg_pid field in nlmsg_alloc_simple() - - [ d0u9 ] - * route/class: add new api rtnl_class_get_by_parent() - - [ Tobias Jungel ] - * neigh: correct symbol exposed - - [ Matthieu Baerts ] - * nl: fix function name in debug msg - - [ Tobias Jungel ] - * neigh: cache updates as well query AF_BRIDGE neigh - * whitespace cleanup - * nl-neigh-list: free allocated items - * neigh: add get/set functions for NEIGH_ATTR_MASTER - * neigh_dump_line: dump master as well - - [ d0u9 ] - * Add support for cloning cgroup filter object. - - [ Tuetuopay ] - * route/link/vxlan: Fix IPv4 set_local resetting ce_mask - - [ Tobias Jungel ] - * neigh: update neighbour.h and add missing flags - - [ Thomas Winter ] - * ipgre: Fix wrong array size initialization - * ipvti: Fix wrong array size initialization - * if_tunnel: Update IFLA defines up to FWMARK - - [ Thomas Haller ] - * include/linux: update copy of kernel headers - - [ Volodymyr Bendiuga ] - * include: import linux header pkt_sched.h - * route:qdisc: add MQPRIO Qdisc - - [ Thomas Haller ] - * build: cleanup Makefile.am - * lib/tc: ensure correct error code in rtnl_tc_msg_build() - * lib/qdisc: style fixes in "lib/route/qdisc/mqprio.c" - * lib/qdisc: avoid BUG() in "lib/route/qdisc/mqprio.c" - * build: sort entries in libnl-route-3.sym - * lib/tc: fix uninitalized err variable in rtnl_tc_msg_build() - - [ Volodymyr Bendiuga ] - * route:tc: allow to set chain index for tc objects - - [ Thomas Haller ] - * route/tc: return error code from rtnl_tc_get_chain() - - [ Volodymyr Bendiuga ] - * include: import tc_vlan.h - * route:act: add vlan action - - [ Thomas Haller ] - * route/act: style fixes in "lib/route/act/vlan.c" - * route/act: return error code from act-vlan getters - - [ Ilya Pronin ] - * route/cls: fix potential memory leak - - [ Patrick Havelange ] - * nla_ok: fix overrun in attribute iteration. - - [ Wang Jian ] - * link: macvlan fixes - - [ Thomas Haller ] - * route/macvlan: style fixes in "lib/route/link/macvlan.c" - - [ Tobias Jungel ] - * route/link: expose IFLA_INFO_SLAVE_KIND - - [ Thomas Haller ] - * route/link: avoid dangling pointer in rtnl_link_set_slave_type() - - [ Byeonggon Lee ] - * tests: use nl_send_auto() instead of deprecated nl_send_auto_complete() in test-genl.c - - [ Thomas Haller ] - * doc: fix typos in example in documentation - * attr: mark nested attributes as NLA_F_NESTED - - [ xinbao ] - * Add CTA_LABELS and CTA_LABELS_MASK to ctattr_type according to the new kernel - - [ Thomas Haller ] - * route: fix strncpy() warning from coverity about unterminated string - * link/sriov: fix memleak in rtnl_link_sriov_clone() - * utils: add internal helper macros for cleanup - * lib/genl: avoid VLA in cmd_msg_parser() - * travis: enable -Wvla compiler warning in tests - * travis: build tests with NL_MORE_ASSERTS enabled - * xfrm: fix memory corruption (dangling pointer) when when setting xfrmnl_sa - * route/inet6: fix strncpy() in inet6_dump_details() - * route/tc: ensure not string truncation in rtnl_tc_set_kind() - * genl: reject invalid group names in genl_family_add_grp() - - [ Yegor Yefremov ] - * Add SPDX identifiers - - [ Thomas Haller ] - * lib/genl: fix allocating buffer of too small size in cmd_msg_parser() - - [ Michael Forney ] - * dbg: Use __func__ instead of __PRETTY_FUNCTION__ - * all: Avoid pointer arithmetic on `void *` - * lib: Don't return expression in function returning void - * lib: Don't omit second operand to `?` operator - * all: Use __typeof__ instead of typeof - * route: Remove stray `;` at top-level - * Sync linux headers to 4.19.66 - - [ Thomas Haller ] - * idiag: workaround and add comment about idiagnl_send_simple() only handling 8 bit flags - * lib: accept %NULL arguments for nl_addr_cmp() - * lib: fix error code from nfnl_exp_build_message() - - [ Eyal Birger ] - * doc/route: fix example code comments - * xfrmi: introduce XFRM interfaces support - - [ Thomas Haller ] - * xfrmi: return error code from getters for XFRM links - * route/trivial: sort entries in "libnl-route-3.sym" asciibetically - - [ d0u9 ] - * Add 64bit rate/ceil support for htb class - - [ Thomas Haller ] - * route/qdisc: adjust API for 64 bit rate/ceil support for htb class - * libnl-3.5.0 release - - -- Tamer Ahmed Thu, 02 Jan 2020 10:25:18 -0800 - -libnl3 (3.2.27-2) unstable; urgency=low - - * Add upstream fix for CVE-2017-0553 (Closes: #859948) - - -- Heiko Stuebner Mon, 10 Apr 2017 11:48:23 +0200 - -libnl3 (3.2.27-1) unstable; urgency=low - - * New upstream release - Including fixes for unusable sockets after a failed portid - generation (Closes: #808213) - - -- Heiko Stuebner Sun, 24 Jan 2016 23:54:47 +0100 - -libnl3 (3.2.26-1) unstable; urgency=low - - * New upstream release - * Provide Multiarch:same dev packages - * Add new libnl-xfrm library handling packet transformations - * Update standards to 3.9.6 - - -- Heiko Stuebner Mon, 13 Jul 2015 14:16:22 +0200 - -libnl3 (3.2.24-2) unstable; urgency=low - - * Backport two upstream fixes to prevent issues with older kernels: - - dfd0a80ec845 (route: don't enforce minlen in inet6_parse_protinfo() - (IFLA_PROTINFO) and inet_parse_af() (IFLA_AF_SPEC) - - 5206c050504f (route/addr: only sent IFA_FLAGS when needed to workaround - picky older kernels) - - -- Heiko Stuebner Fri, 18 Apr 2014 17:19:37 +0200 - -libnl3 (3.2.24-1) unstable; urgency=low - - * New upstream release - * Add new libnl-idiag library handling inetdiag requests - - -- Heiko Stuebner Sun, 16 Feb 2014 14:23:26 +0100 - -libnl3 (3.2.21-1) unstable; urgency=low - - * New upstream release (Closes: #707081) - Including CAN support (Closes: #698954) - * Add symbols files (Closes: #654758) - * Provide static libraries (Closes: #693939, #693940) - * Update standards to 3.9.4 - * Removed doc package. Libnl3 documentation is released - separately now. - - -- Heiko Stuebner Tue, 21 May 2013 11:39:13 +0200 - -libnl3 (3.2.7-4) unstable; urgency=low - - * Add watch file (Closes: #679473) - * Use dh-autoreconf to update the build system (Closes: 679474) - - -- Heiko Stuebner Sat, 30 Jun 2012 15:54:25 +0200 - -libnl3 (3.2.7-3) unstable; urgency=low - - * Fix FTBFS due to failing gen-tags.sh (Closes: #674322) - * Convert to Multi-Arch (Closes: #676611) - * Update standards to 3.9.3 - no changes - * Switch to dpkg-source format 3.0 (quilt) - - -- Heiko Stuebner Mon, 18 Jun 2012 21:19:30 +0200 - -libnl3 (3.2.7-2) unstable; urgency=low - - * Force doxygen dot-threads to 1 to circumvent segfaults on armel - * Add missing build-dependency on ghostscript - - -- Heiko Stuebner Mon, 05 Mar 2012 23:29:10 +0100 - -libnl3 (3.2.7-1) unstable; urgency=low - - * New upstream release - * Build-depend on source-highlight (Closes: #657254) - - -- Heiko Stuebner Mon, 13 Feb 2012 18:59:30 +0100 - -libnl3 (3.2.3-2) unstable; urgency=low - - * Upload to unstable - * Split split udeb to be in line with regular packages - * Move libnl and libnl-genl to /lib for iw and wpa_supplicant. - - -- Heiko Stuebner Mon, 19 Dec 2011 20:43:21 +0100 - -libnl3 (3.2.3-1) experimental; urgency=low - - * Upload to experimental to not break debian-installer - * Split library and dev packages for the individual libraries - * Add utils package - - [Mathieu Trudel-Lapierre ] - * New upstream release (Closes: #648819) - * debian/patches/0001-fix-headers.patch, - debian/patches/0002-link-sub-libs.patch, - debian/patches/0003-fix-out-of-tree-build.patch: dropped. - * debian/patches/0004-more-out-of-tree-build-fixes.patch: new patch; adjust - Makefiles some more to properly deal with the out-of-tree build when - generating headers and documentation. - * debian/control: - - rename packages to follow upstream soname. - - add python-pygments, xmlstarlet, texlive-latex-base and asciidoc to - Build-Depends. - * debian/rules: update due to upstream soname changes. - * debian/*.install: rename and update due to upstream soname changes. - * debian/libnl-3-200.install: netlink config files should be installed to - /etc/libnl, not /etc/libnl3. - * debian/libnl-3-doc.install, - debian/libnl-3-doc.doc-base: update to take into account new paths. - - -- Heiko Stuebner Tue, 06 Nov 2011 21:23:12 +0200 - -libnl3 (3.0-2) unstable; urgency=low - - * Acknowledge NMU - * Install config-files to /etc/libnl3 (Closes: #632790) - - -- Heiko Stuebner Mon, 26 Sep 2011 20:27:45 +0200 - -libnl3 (3.0-1.1) unstable; urgency=low - - * Non-maintainer upload with agreement from Heiko Stuebner - * Add libnl3-udeb package with seperate build for - debian-installer (Closes: #635962). - - -- Gaudenz Steinlin Fri, 29 Jul 2011 23:25:48 +0200 - -libnl3 (3.0-1) unstable; urgency=low - - * New upstream release (Closes: #626098) - see README.Debian for version explanation. - * Update standards to 3.9.2 - - -- Heiko Stuebner Sat, 21 May 2011 19:25:13 +0200 - -libnl2 (2.0-1) unstable; urgency=low - - * New upstream release (Closes: #603765) - * Fix compilation with binutils-gold or ld --no-add-needed - (Closes: #615745) - * Update standards - * Update build dependencies - tetex-live is not necessary - anymore (Closes: #616260) - - -- Heiko Stuebner Sun, 06 Mar 2011 18:20:47 +0100 - -libnl2 (1.99+git20091216-2) unstable; urgency=low - - * add README.source describing the patches in use. - * remove libnl*-provides - libnl2 should stay sepparate - from libnl1 for now - - -- Heiko Stuebner Wed, 10 Mar 2010 18:03:35 +0100 - -libnl2 (1.99+git20091216-1) unstable; urgency=low - - * New upstream snapshot - * New source name to enable installing libnl and libnl2 side by side - * Set myself as new maintainer for libnl2 according to agreement - with Michael Biebl - * Add debug package - * README.Debian warns of possible breakage in this snapshot - * Add Patch 0001 which fixes some errors in the build system - * Add Patch 0002 which adds libnl-?? libs to linker statement - until I can resolve this with upstream - - -- Heiko Stuebner Mon, 15 Feb 2010 21:50:35 +0100 - -libnl (1.1-5) unstable; urgency=low - - * Add symbols file for libnl1. - - -- Michael Biebl Wed, 25 Feb 2009 00:26:05 +0100 - -libnl (1.1-4) unstable; urgency=low - - * debian/control - - Add ${misc:Depends} to all binary packages. - - Bump Build-Depends on debhelper to (>= 7). - * debian/compat - - Bump debhelper compat level to 7. - * debian/rules - - Include debhelper.mk before other files as recommended by the cdbs - documentation. - - -- Michael Biebl Wed, 18 Feb 2009 13:26:53 +0100 - -libnl (1.1-3) unstable; urgency=low - - * debian/control - - Bump Standards-Version to 3.8.0. - * Switch to quilt for patch management. - * Add README.source which refers to the quilt documentation. - * debian/patches/limits.patch - - Add missing include to limits.h. This is required when compiling against - glibc 2.8. Thanks to Kees Cook for the patch. Closes: #501485 - - -- Michael Biebl Wed, 08 Oct 2008 21:34:34 +0200 - -libnl (1.1-2) unstable; urgency=low - - * debian/libnl-doc.doc-base - - Register the API documentation with doc-base. - * debian/control - - Add Suggests: doc-base to libnl-doc. - - -- Michael Biebl Wed, 05 Mar 2008 00:42:54 +0100 - -libnl (1.1-1) unstable; urgency=low - - * New stable upstream release. - * debian/patches/01-ip_mg_alg_internal_only.patch - - Removed, merged upstream. - * debian/control - - Rename binary package libnl1-pre8 to libnl1. - - [libnl1] Add Conflicts/Replaces: libnl1-pre8. - - [libnl-dev] Change Depends to libnl1. - * Rename debian/libnl1-pre8.install to debian/libnl1.install - * debian/copyright - - Minor updates and additions. - - -- Michael Biebl Thu, 10 Jan 2008 16:58:12 +0100 - -libnl (1.0~pre8-1) unstable; urgency=low - - * New upstream release. Closes: #456175 - * debian/control - - Bump Standards-Version to 3.7.3. No further changes required. - - The Vcs-* fields are now officially supported, so remove the XS- prefix. - - Rename binary package libnl1-pre6 to libnl1-pre8. - - [libnl1-pre8] Add Conflicts/Replaces: libnl1-pre6. The two versions are - not coinstallable. - - [libnl-dev] Change Depends to libnl1-pre8. - * Rename debian/libnl1-pre6.install to debian/libnl1-pre8.install. - * debian/patches/10-amd64-linux-types.patch - - Removed, merged upstream. - * debian/patches/01-ip_mg_alg_internal_only.patch - - Pull a fix from upstream. The header linux/ip_mp_alg.h is no longer part - of the linux kernel headers (i.e. linux-libc-dev) so remove it from - netlink/netlink.h. - - -- Michael Biebl Thu, 20 Dec 2007 07:45:03 +0100 - -libnl (1.0~pre6-6) unstable; urgency=low - - * debian/control - - Use the new "Homepage:" field to specify the upstream URL. - - Replace deprecated ${Source-Version} substvar with ${binary:Version}. - - Change Build-Depends: gs-gpl | gs-esp to Build-Depends: ghostscript. - - -- Michael Biebl Mon, 22 Oct 2007 07:15:29 +0200 - -libnl (1.0~pre6-5) unstable; urgency=low - - * debian/control - - Add XS-Vcs-* fields. - - Replace Build-Depends: tetex-bin with texlive-latex-base. teTeX is now - gone, superseded by texlive. - - Add Build-Depends: graphviz, gs-gpl | gs-esp. - The "dot" program is needed for generating the diagram image and "gs" - for the ps to png conversion. - - -- Michael Biebl Sun, 15 Apr 2007 15:45:48 +0200 - -libnl (1.0~pre6-4) unstable; urgency=medium - - * Autobuilders do not distinguish between build-arch and build-indep, they - simply run build. So we have to move doxygen and tetex-bin from - Build-Depends-Indep to Build-Depends. Closes: #408719 - * Urgency medium, as it fixes a FTBFS bug. - - -- Michael Biebl Fri, 12 Jan 2007 11:23:52 +0100 - -libnl (1.0~pre6-3) unstable; urgency=low - - * Build and package the API documentation. Closes: #406497 - * debian/control - - Add Build-Depends-Indep on doxygen and tetex-bin (dvips). - - Add new package libnl-doc. - - Add a "Suggests: libnl-doc" to libnl-dev. - * debian/rules - - Call "make gendoc" to build the API documentation. - * debian/libnl-doc.install - - Added. List the files that should be installed. - - -- Michael Biebl Fri, 12 Jan 2007 10:30:40 +0100 - -libnl (1.0~pre6-2) unstable; urgency=low - - * Update maintainer email address to biebl@debian.org. - - -- Michael Biebl Thu, 19 Oct 2006 20:16:09 +0200 - -libnl (1.0~pre6-1) unstable; urgency=low - - * New upstream release. - * Removed 20-autoconf-dirs.patch, merged upstream. - * Updated debian/copyright, libnl is now licensed under the LGPL 2.1. - * Updated debian/watch. - - -- Michael Biebl Fri, 18 Aug 2006 00:40:34 +0200 - -libnl (1.0~pre6~svn30-1) unstable; urgency=low - - * Updated to svn revision 30. - * Bumped Standards-Version to 3.7.2, no further changes required. - * Now that dak officially supports ~ in the version number, let's make use - of it. - * Some install directories were not set correctly, 20-autoconf-dirs.patch - fixes that. - - -- Michael Biebl Thu, 10 Aug 2006 19:51:42 +0200 - -libnl (0.99+1.0.svn21-4) unstable; urgency=low - - * Do not create bogus /usr/lib/pkg-config directory. Closes: #364601 - - -- Michael Biebl Mon, 24 Apr 2006 15:40:23 +0200 - -libnl (0.99+1.0.svn21-3) unstable; urgency=low - - * Include simple-patchsys.mk in debian/rules. - * Merged debian/patches/10-amd64-linux-types.patch from Ubuntu which fixes - the FTBFS error on AMD64. Closes: #358887 - Thanks to Scott James Remnant for this patch. - - -- Michael Biebl Sat, 1 Apr 2006 04:52:13 +0200 - -libnl (0.99+1.0.svn21-2) unstable; urgency=low - - * Initial upload to unstable. - * Renamed libnl1 to libnl1-pre6 to match the currently used so-name. - Otherwise dependent packages like NM will break on upgrades of libnl. - - -- Michael Biebl Tue, 7 Mar 2006 21:22:09 +0100 - -libnl (0.99+1.0.svn21-1) experimental; urgency=low - - * Initial release. Closes: #286847 - - -- Michael Biebl Tue, 21 Feb 2006 18:36:35 +0100 diff --git a/src/libnl3/debian/compat b/src/libnl3/debian/compat deleted file mode 100644 index f599e28b8ab..00000000000 --- a/src/libnl3/debian/compat +++ /dev/null @@ -1 +0,0 @@ -10 diff --git a/src/libnl3/debian/control b/src/libnl3/debian/control deleted file mode 100644 index 2431ad85cf2..00000000000 --- a/src/libnl3/debian/control +++ /dev/null @@ -1,206 +0,0 @@ -Source: libnl3 -Section: net -Priority: optional -Maintainer: Heiko Stuebner -Build-Depends: debhelper (>= 9), dh-exec (>= 0.3), cdbs (>= 0.4.93~), bison, flex, - automake, autoconf, dh-autoreconf, linux-libc-dev (>= 3.2.41), pkg-config -Standards-Version: 3.9.6 -Homepage: http://www.infradead.org/~tgr/libnl/ -#Vcs-Git: https://github.com/thom311/libnl/ -#Vcs-Browser: https://github.com/thom311/libnl/ - -Package: libnl-3-200 -Architecture: linux-any -Section: libs -Pre-Depends: ${misc:Pre-Depends} -Depends: ${misc:Depends}, ${shlibs:Depends} -Multi-Arch: same -Description: library for dealing with netlink sockets - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - -Package: libnl-cli-3-200 -Architecture: linux-any -Section: libs -Pre-Depends: ${misc:Pre-Depends} -Depends: libnl-3-200 (= ${binary:Version}), libnl-genl-3-200 (= ${binary:Version}), libnl-nf-3-200 (= ${binary:Version}), libnl-route-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends} -Multi-Arch: same -Description: library for dealing with netlink sockets - cli helpers - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - Library for cli helpers in libnl-utils. - -Package: libnl-utils -Architecture: linux-any -Section: libs -Depends: libnl-cli-3-200 (= ${binary:Version}), libnl-idiag-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends} -Description: Utilities for dealing with netlink sockets - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - These utilities help dealing with netlink sockets. - -Package: libnl-genl-3-200 -Architecture: linux-any -Section: libs -Pre-Depends: ${misc:Pre-Depends} -Depends: libnl-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends} -Multi-Arch: same -Description: library for dealing with netlink sockets - generic netlink - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - API to the generic netlink protocol, an extended version of the netlink - protocol. - -Package: libnl-idiag-3-200 -Architecture: linux-any -Section: libs -Pre-Depends: ${misc:Pre-Depends} -Depends: libnl-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends} -Multi-Arch: same -Description: library for dealing with netlink sockets - inetdiag interface - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - API to the inetdiag netlink protocol, handling inetdiag requests - -Package: libnl-nf-3-200 -Architecture: linux-any -Section: libs -Pre-Depends: ${misc:Pre-Depends} -Depends: libnl-3-200 (= ${binary:Version}), libnl-route-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends} -Multi-Arch: same -Description: library for dealing with netlink sockets - netfilter interface - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - API to netlink based netfilter configuration and monitoring interfaces. - -Package: libnl-route-3-200 -Architecture: linux-any -Section: libs -Pre-Depends: ${misc:Pre-Depends} -Depends: libnl-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends} -Multi-Arch: same -Description: library for dealing with netlink sockets - route interface - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - API to the configuration interfaces of the NETLINK_ROUTE family. - -Package: libnl-xfrm-3-200 -Architecture: linux-any -Section: libs -Pre-Depends: ${misc:Pre-Depends} -Depends: libnl-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends} -Multi-Arch: same -Description: library for dealing with netlink sockets - package transformations - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - API to netlink based package transformations (such as encrypting - their payloads). - -Package: libnl-3-dev -Architecture: linux-any -Section: libdevel -Depends: libnl-3-200 (= ${binary:Version}), ${misc:Depends} -Conflicts: libnl-dev, libnl2-dev -Breaks: libnl3-dev -Replaces: libnl3-dev -Multi-Arch: same -Description: development library and headers for libnl-3 - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - This package contains the headers needed by all libraries and the files - that are needed to build applications using libnl3. - -Package: libnl-cli-3-dev -Architecture: linux-any -Section: libdevel -Depends: libnl-3-dev (= ${binary:Version}), libnl-genl-3-dev (= ${binary:Version}), libnl-nf-3-dev (= ${binary:Version}), libnl-route-3-dev (= ${binary:Version}), libnl-cli-3-200 (= ${binary:Version}), ${misc:Depends} -Multi-Arch: same -Description: development library and headers for libnl-cli-3 - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - This package contains the files that are needed to build applications using - libnl-cli-3. - -Package: libnl-genl-3-dev -Architecture: linux-any -Section: libdevel -Depends: libnl-3-dev (= ${binary:Version}), libnl-genl-3-200 (= ${binary:Version}), ${misc:Depends} -Multi-Arch: same -Description: development library and headers for libnl-genl-3 - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - This package contains the files that are needed to build applications using - libnl-genl-3. - -Package: libnl-idiag-3-dev -Architecture: linux-any -Section: libdevel -Depends: libnl-3-dev (= ${binary:Version}), libnl-idiag-3-200 (= ${binary:Version}), ${misc:Depends} -Multi-Arch: same -Description: development library and headers for libnl-genl-3 - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - This package contains the files that are needed to build applications using - libnl-idiag-3. - -Package: libnl-nf-3-dev -Architecture: linux-any -Section: libdevel -Depends: libnl-3-dev (= ${binary:Version}), libnl-route-3-dev (= ${binary:Version}), libnl-nf-3-200 (= ${binary:Version}), ${misc:Depends} -Multi-Arch: same -Description: development library and headers for libnl-nf-3 - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - This package contains the files that are needed to build applications using - libnl-nf-3. - -Package: libnl-route-3-dev -Architecture: linux-any -Section: libdevel -Depends: libnl-3-dev (= ${binary:Version}), libnl-route-3-200 (= ${binary:Version}), ${misc:Depends} -Multi-Arch: same -Description: development library and headers for libnl-route-3 - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - This package contains the files that are needed to build applications using - libnl-route-3. - -Package: libnl-xfrm-3-dev -Architecture: linux-any -Section: libdevel -Depends: libnl-3-dev (= ${binary:Version}), libnl-xfrm-3-200 (= ${binary:Version}), ${misc:Depends} -Multi-Arch: same -Description: development library and headers for libnl-xfrm-3 - This is a library for applications dealing with netlink sockets. - The library provides an interface for raw netlink messaging and various - netlink family specific interfaces. - . - This package contains the files that are needed to build applications using - libnl-xfrm-3. diff --git a/src/libnl3/debian/copyright b/src/libnl3/debian/copyright deleted file mode 100644 index a654869d809..00000000000 --- a/src/libnl3/debian/copyright +++ /dev/null @@ -1,160 +0,0 @@ -This package was debianized by Tamer Ahmed on -Tue, 31 Decn 2019 12:00:46 +0000. -The packaging is based on Heiko Stuebner's original packaging -of libnl1. - -It was downloaded from https://github.com/thom311/libnl/releases - -Upstream Author: - Thomas Graf - - -Copyright: - -lib/route/addr.c -include/netlink/route/addr.h - - Copyright (c) Thomas Graf - Baruch Even - - -lib/route/cls/u32.c -lib/route/cls/fw.c -lib/route/sch/htb.c -include/netlink/route/cls/fw.h -include/netlink/route/sch/htb.h - - Copyright (c) Thomas Graf - Copyright (c) Petr Gotthard - Copyright (c) Siemens AG Oesterreich - - - -lib/netfilter/log_msg.c -lib/netfilter/ct.c -include/netlink/netfilter/log_msg.h -include/netlink/netfilter/log.h -lib/netfilter/log_obj.c - - Copyright (c) Thomas Graf - Copyright (c) Philip Craig - Copyright (c) Patrick McHardy - Copyright (c) Secure Computing Corporation - - - -include/netlink/netfilter/queue_msg.h -lib/netfilter/queue_msg_obj.c -lib/netfilter/queue_msg.c -lib/netfilter/queue.c -lib/netfilter/netfilter.c -lib/netfilter/queue_obj.c -include/netlink/netfilter/netfilter.h -include/netlink/netfilter/queue.h -src/nf-queue.c - - Copyright (c) Patrick McHardy - - - -include/netlink/xfrm/selector.h -include/netlink/xfrm/sa.h -include/netlink/xfrm/ae.h -include/netlink/xfrm/sp.h -include/netlink/xfrm/template.h -include/netlink/xfrm/lifetime.h -lib/xfrm/sa.c -lib/xfrm/template.c -lib/xfrm/ae.c -lib/xfrm/sp.c -lib/xfrm/selector.c -lib/xfrm/lifetime.c - - Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ - - -All other *.c and *.h files not mentioned above are copyright of: - - Copyright (c) 2003-2006 Thomas Graf - - -License: - -src/nl-addr-add.c -src/nl-addr-list.c -src/nl-cls-add.c -src/cls/utils.c -src/cls/cgroup.c -src/cls/utils.h -src/cls/basic.c -src/nl-addr-delete.c: - - This library is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published - by the Free Software Foundation version 2 of the License. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. - -On Debian GNU/Linux systems, the complete text of the GNU General -Public License can be found in /usr/share/common-licenses/GPL-2 - - -include/netlink/xfrm/selector.h -include/netlink/xfrm/sa.h -include/netlink/xfrm/ae.h -include/netlink/xfrm/sp.h -include/netlink/xfrm/template.h -include/netlink/xfrm/lifetime.h -lib/xfrm/sa.c -lib/xfrm/template.c -lib/xfrm/ae.c -lib/xfrm/sp.c -lib/xfrm/selector.c -lib/xfrm/lifetime.c - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the - distribution. - - Neither the name of Texas Instruments Incorporated nor the names of - its contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - - -All other *.c and *.h files not mentioned above: - - This library is free software; you can redistribute it and/or modify - it under the terms of the GNU Lesser General Public License as published - by the Free Software Foundation version 2.1 of the License. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. - -On Debian GNU/Linux systems, the complete text of the GNU Lesser General -Public License can be found in /usr/share/common-licenses/LGPL-2.1 - diff --git a/src/libnl3/debian/gbp.conf b/src/libnl3/debian/gbp.conf deleted file mode 100644 index a504bacc774..00000000000 --- a/src/libnl3/debian/gbp.conf +++ /dev/null @@ -1,16 +0,0 @@ -# Configuration file for git-buildpackage and friends - -[DEFAULT] -# the default build command: -#builder = debuild -i -I -# the default clean command: -#cleaner = debuild clean -# the default branch for upstream sources: -upstream-branch = upstream-dist -# the default branch for the debian patch: -#debian-branch = master -# the default tag formats used: -#upstream-tag = upstream/%(version)s -#debian-tag = debian/%(version)s -# use pristine-tar: -pristine-tar = true diff --git a/src/libnl3/debian/libnl-3-200.install b/src/libnl3/debian/libnl-3-200.install deleted file mode 100755 index 0a6aa3850b2..00000000000 --- a/src/libnl3/debian/libnl-3-200.install +++ /dev/null @@ -1,3 +0,0 @@ -#!/usr/bin/dh-exec -debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-3*.so.* lib/${DEB_HOST_MULTIARCH}/ -debian/tmp/etc/libnl/* etc/libnl-3 diff --git a/src/libnl3/debian/libnl-3-200.symbols b/src/libnl3/debian/libnl-3-200.symbols deleted file mode 100644 index 119e0554920..00000000000 --- a/src/libnl3/debian/libnl-3-200.symbols +++ /dev/null @@ -1,661 +0,0 @@ -libnl-3.so.200 libnl-3-200 #MINVER# - __flags2str@Base 3.5.0-1 - __flags2str@libnl_3 3.5.0-1 - __list_str2type@Base 3.5.0-1 - __list_str2type@libnl_3 3.5.0-1 - __list_type2str@Base 3.5.0-1 - __list_type2str@libnl_3 3.5.0-1 - __nl_cache_mngt_require@Base 3.5.0-1 - __nl_cache_mngt_require@libnl_3 3.5.0-1 - __nl_cache_ops_lookup@Base 3.5.0-1 - __nl_read_num_str_file@Base 3.5.0-1 - __nl_read_num_str_file@libnl_3 3.5.0-1 - __str2flags@Base 3.5.0-1 - __str2flags@libnl_3 3.5.0-1 - __str2type@Base 3.5.0-1 - __str2type@libnl_3 3.5.0-1 - __trans_list_add@Base 3.5.0-1 - __trans_list_add@libnl_3 3.5.0-1 - __trans_list_clear@Base 3.5.0-1 - __trans_list_clear@libnl_3 3.5.0-1 - __type2str@Base 3.5.0-1 - __type2str@libnl_3 3.5.0-1 - _nl_socket_generate_local_port_no_release@Base 3.5.0-1 - _nl_socket_is_local_port_unspecified@Base 3.5.0-1 - _nl_socket_set_local_port_no_release@Base 3.5.0-1 - _nl_socket_used_ports_release_all@Base 3.5.0-1 - _nl_socket_used_ports_set@Base 3.5.0-1 - dump_from_ops@Base 3.5.0-1 - libnl_3@libnl_3 3.5.0-1 - libnl_3_2_26@libnl_3_2_26 3.5.0-1 - libnl_3_2_27@libnl_3_2_27 3.5.0-1 - libnl_3_2_28@libnl_3_2_28 3.5.0-1 - libnl_3_2_29@libnl_3_2_29 3.5.0-1 - libnl_3_5@libnl_3_5 3.5.0-1 - nl_addr2str@Base 3.5.0-1 - nl_addr2str@libnl_3 3.5.0-1 - nl_addr_alloc@Base 3.5.0-1 - nl_addr_alloc@libnl_3 3.5.0-1 - nl_addr_alloc_attr@Base 3.5.0-1 - nl_addr_alloc_attr@libnl_3 3.5.0-1 - nl_addr_build@Base 3.5.0-1 - nl_addr_build@libnl_3 3.5.0-1 - nl_addr_clone@Base 3.5.0-1 - nl_addr_clone@libnl_3 3.5.0-1 - nl_addr_cmp@Base 3.5.0-1 - nl_addr_cmp@libnl_3 3.5.0-1 - nl_addr_cmp_prefix@Base 3.5.0-1 - nl_addr_cmp_prefix@libnl_3 3.5.0-1 - nl_addr_fill_sockaddr@Base 3.5.0-1 - nl_addr_fill_sockaddr@libnl_3 3.5.0-1 - nl_addr_get@Base 3.5.0-1 - nl_addr_get@libnl_3 3.5.0-1 - nl_addr_get_binary_addr@Base 3.5.0-1 - nl_addr_get_binary_addr@libnl_3 3.5.0-1 - nl_addr_get_family@Base 3.5.0-1 - nl_addr_get_family@libnl_3 3.5.0-1 - nl_addr_get_len@Base 3.5.0-1 - nl_addr_get_len@libnl_3 3.5.0-1 - nl_addr_get_prefixlen@Base 3.5.0-1 - nl_addr_get_prefixlen@libnl_3 3.5.0-1 - nl_addr_guess_family@Base 3.5.0-1 - nl_addr_guess_family@libnl_3 3.5.0-1 - nl_addr_info@Base 3.5.0-1 - nl_addr_info@libnl_3 3.5.0-1 - nl_addr_iszero@Base 3.5.0-1 - nl_addr_iszero@libnl_3 3.5.0-1 - nl_addr_parse@Base 3.5.0-1 - nl_addr_parse@libnl_3 3.5.0-1 - nl_addr_put@Base 3.5.0-1 - nl_addr_put@libnl_3 3.5.0-1 - nl_addr_resolve@Base 3.5.0-1 - nl_addr_resolve@libnl_3 3.5.0-1 - nl_addr_set_binary_addr@Base 3.5.0-1 - nl_addr_set_binary_addr@libnl_3 3.5.0-1 - nl_addr_set_family@Base 3.5.0-1 - nl_addr_set_family@libnl_3 3.5.0-1 - nl_addr_set_prefixlen@Base 3.5.0-1 - nl_addr_set_prefixlen@libnl_3 3.5.0-1 - nl_addr_shared@Base 3.5.0-1 - nl_addr_shared@libnl_3 3.5.0-1 - nl_addr_valid@Base 3.5.0-1 - nl_addr_valid@libnl_3 3.5.0-1 - nl_af2str@Base 3.5.0-1 - nl_af2str@libnl_3 3.5.0-1 - nl_auto_complete@Base 3.5.0-1 - nl_auto_complete@libnl_3 3.5.0-1 - nl_cache_add@Base 3.5.0-1 - nl_cache_add@libnl_3 3.5.0-1 - nl_cache_alloc@Base 3.5.0-1 - nl_cache_alloc@libnl_3 3.5.0-1 - nl_cache_alloc_and_fill@Base 3.5.0-1 - nl_cache_alloc_and_fill@libnl_3 3.5.0-1 - nl_cache_alloc_name@Base 3.5.0-1 - nl_cache_alloc_name@libnl_3 3.5.0-1 - nl_cache_clear@Base 3.5.0-1 - nl_cache_clear@libnl_3 3.5.0-1 - nl_cache_clone@Base 3.5.0-1 - nl_cache_clone@libnl_3 3.5.0-1 - nl_cache_dump@Base 3.5.0-1 - nl_cache_dump@libnl_3 3.5.0-1 - nl_cache_dump_filter@Base 3.5.0-1 - nl_cache_dump_filter@libnl_3 3.5.0-1 - nl_cache_find@Base 3.5.0-1 - nl_cache_find@libnl_3 3.5.0-1 - nl_cache_foreach@Base 3.5.0-1 - nl_cache_foreach@libnl_3 3.5.0-1 - nl_cache_foreach_filter@Base 3.5.0-1 - nl_cache_foreach_filter@libnl_3 3.5.0-1 - nl_cache_free@Base 3.5.0-1 - nl_cache_free@libnl_3 3.5.0-1 - nl_cache_get@Base 3.5.0-1 - nl_cache_get@libnl_3 3.5.0-1 - nl_cache_get_first@Base 3.5.0-1 - nl_cache_get_first@libnl_3 3.5.0-1 - nl_cache_get_last@Base 3.5.0-1 - nl_cache_get_last@libnl_3 3.5.0-1 - nl_cache_get_next@Base 3.5.0-1 - nl_cache_get_next@libnl_3 3.5.0-1 - nl_cache_get_ops@Base 3.5.0-1 - nl_cache_get_ops@libnl_3 3.5.0-1 - nl_cache_get_prev@Base 3.5.0-1 - nl_cache_get_prev@libnl_3 3.5.0-1 - nl_cache_include@Base 3.5.0-1 - nl_cache_include@libnl_3 3.5.0-1 - nl_cache_include_v2@libnl_3_2_29 3.5.0-1 - nl_cache_is_empty@Base 3.5.0-1 - nl_cache_is_empty@libnl_3 3.5.0-1 - nl_cache_mark_all@Base 3.5.0-1 - nl_cache_mark_all@libnl_3 3.5.0-1 - nl_cache_mngr_add@Base 3.5.0-1 - nl_cache_mngr_add@libnl_3 3.5.0-1 - nl_cache_mngr_add_cache@Base 3.5.0-1 - nl_cache_mngr_add_cache@libnl_3 3.5.0-1 - nl_cache_mngr_add_cache_v2@libnl_3_2_29 3.5.0-1 - nl_cache_mngr_alloc@Base 3.5.0-1 - nl_cache_mngr_alloc@libnl_3 3.5.0-1 - nl_cache_mngr_data_ready@Base 3.5.0-1 - nl_cache_mngr_data_ready@libnl_3 3.5.0-1 - nl_cache_mngr_free@Base 3.5.0-1 - nl_cache_mngr_free@libnl_3 3.5.0-1 - nl_cache_mngr_get_fd@Base 3.5.0-1 - nl_cache_mngr_get_fd@libnl_3 3.5.0-1 - nl_cache_mngr_info@Base 3.5.0-1 - nl_cache_mngr_info@libnl_3 3.5.0-1 - nl_cache_mngr_poll@Base 3.5.0-1 - nl_cache_mngr_poll@libnl_3 3.5.0-1 - nl_cache_mngt_provide@Base 3.5.0-1 - nl_cache_mngt_provide@libnl_3 3.5.0-1 - nl_cache_mngt_register@Base 3.5.0-1 - nl_cache_mngt_register@libnl_3 3.5.0-1 - nl_cache_mngt_require@Base 3.5.0-1 - nl_cache_mngt_require@libnl_3 3.5.0-1 - nl_cache_mngt_require_safe@Base 3.5.0-1 - nl_cache_mngt_require_safe@libnl_3 3.5.0-1 - nl_cache_mngt_unprovide@Base 3.5.0-1 - nl_cache_mngt_unprovide@libnl_3 3.5.0-1 - nl_cache_mngt_unregister@Base 3.5.0-1 - nl_cache_mngt_unregister@libnl_3 3.5.0-1 - nl_cache_move@Base 3.5.0-1 - nl_cache_move@libnl_3 3.5.0-1 - nl_cache_nitems@Base 3.5.0-1 - nl_cache_nitems@libnl_3 3.5.0-1 - nl_cache_nitems_filter@Base 3.5.0-1 - nl_cache_nitems_filter@libnl_3 3.5.0-1 - nl_cache_ops_associate@Base 3.5.0-1 - nl_cache_ops_associate@libnl_3 3.5.0-1 - nl_cache_ops_associate_safe@Base 3.5.0-1 - nl_cache_ops_associate_safe@libnl_3 3.5.0-1 - nl_cache_ops_foreach@Base 3.5.0-1 - nl_cache_ops_foreach@libnl_3 3.5.0-1 - nl_cache_ops_get@Base 3.5.0-1 - nl_cache_ops_get@libnl_3 3.5.0-1 - nl_cache_ops_lookup@Base 3.5.0-1 - nl_cache_ops_lookup@libnl_3 3.5.0-1 - nl_cache_ops_lookup_safe@Base 3.5.0-1 - nl_cache_ops_lookup_safe@libnl_3 3.5.0-1 - nl_cache_ops_put@Base 3.5.0-1 - nl_cache_ops_put@libnl_3 3.5.0-1 - nl_cache_ops_set_flags@Base 3.5.0-1 - nl_cache_ops_set_flags@libnl_3 3.5.0-1 - nl_cache_parse@Base 3.5.0-1 - nl_cache_parse@libnl_3 3.5.0-1 - nl_cache_parse_and_add@Base 3.5.0-1 - nl_cache_parse_and_add@libnl_3 3.5.0-1 - nl_cache_pickup@Base 3.5.0-1 - nl_cache_pickup@libnl_3 3.5.0-1 - nl_cache_pickup_checkdup@Base 3.5.0-1 - nl_cache_pickup_checkdup@libnl_3 3.5.0-1 - nl_cache_put@Base 3.5.0-1 - nl_cache_put@libnl_3 3.5.0-1 - nl_cache_refill@Base 3.5.0-1 - nl_cache_refill@libnl_3 3.5.0-1 - nl_cache_remove@Base 3.5.0-1 - nl_cache_remove@libnl_3 3.5.0-1 - nl_cache_resync@Base 3.5.0-1 - nl_cache_resync@libnl_3 3.5.0-1 - nl_cache_search@Base 3.5.0-1 - nl_cache_search@libnl_3 3.5.0-1 - nl_cache_set_arg1@Base 3.5.0-1 - nl_cache_set_arg1@libnl_3 3.5.0-1 - nl_cache_set_arg2@Base 3.5.0-1 - nl_cache_set_arg2@libnl_3 3.5.0-1 - nl_cache_set_flags@Base 3.5.0-1 - nl_cache_set_flags@libnl_3 3.5.0-1 - nl_cache_subset@Base 3.5.0-1 - nl_cache_subset@libnl_3 3.5.0-1 - nl_cancel_down_bits@Base 3.5.0-1 - nl_cancel_down_bits@libnl_3 3.5.0-1 - nl_cancel_down_bytes@Base 3.5.0-1 - nl_cancel_down_bytes@libnl_3 3.5.0-1 - nl_cancel_down_us@Base 3.5.0-1 - nl_cancel_down_us@libnl_3 3.5.0-1 - nl_cb_active_type@Base 3.5.0-1 - nl_cb_active_type@libnl_3 3.5.0-1 - nl_cb_alloc@Base 3.5.0-1 - nl_cb_alloc@libnl_3 3.5.0-1 - nl_cb_clone@Base 3.5.0-1 - nl_cb_clone@libnl_3 3.5.0-1 - nl_cb_err@Base 3.5.0-1 - nl_cb_err@libnl_3 3.5.0-1 - nl_cb_get@Base 3.5.0-1 - nl_cb_get@libnl_3 3.5.0-1 - nl_cb_overwrite_recv@Base 3.5.0-1 - nl_cb_overwrite_recv@libnl_3 3.5.0-1 - nl_cb_overwrite_recvmsgs@Base 3.5.0-1 - nl_cb_overwrite_recvmsgs@libnl_3 3.5.0-1 - nl_cb_overwrite_send@Base 3.5.0-1 - nl_cb_overwrite_send@libnl_3 3.5.0-1 - nl_cb_put@Base 3.5.0-1 - nl_cb_put@libnl_3 3.5.0-1 - nl_cb_set@Base 3.5.0-1 - nl_cb_set@libnl_3 3.5.0-1 - nl_cb_set_all@Base 3.5.0-1 - nl_cb_set_all@libnl_3 3.5.0-1 - nl_close@Base 3.5.0-1 - nl_close@libnl_3 3.5.0-1 - nl_complete_msg@Base 3.5.0-1 - nl_complete_msg@libnl_3 3.5.0-1 - nl_connect@Base 3.5.0-1 - nl_connect@libnl_3 3.5.0-1 - nl_data_alloc@Base 3.5.0-1 - nl_data_alloc@libnl_3 3.5.0-1 - nl_data_alloc_attr@Base 3.5.0-1 - nl_data_alloc_attr@libnl_3 3.5.0-1 - nl_data_append@Base 3.5.0-1 - nl_data_append@libnl_3 3.5.0-1 - nl_data_clone@Base 3.5.0-1 - nl_data_clone@libnl_3 3.5.0-1 - nl_data_cmp@Base 3.5.0-1 - nl_data_cmp@libnl_3 3.5.0-1 - nl_data_free@Base 3.5.0-1 - nl_data_free@libnl_3 3.5.0-1 - nl_data_get@Base 3.5.0-1 - nl_data_get@libnl_3 3.5.0-1 - nl_data_get_size@Base 3.5.0-1 - nl_data_get_size@libnl_3 3.5.0-1 - nl_debug@Base 3.5.0-1 - nl_debug@libnl_3 3.5.0-1 - nl_debug_dp@Base 3.5.0-1 - nl_debug_dp@libnl_3 3.5.0-1 - nl_dump@Base 3.5.0-1 - nl_dump@libnl_3 3.5.0-1 - nl_dump_line@Base 3.5.0-1 - nl_dump_line@libnl_3 3.5.0-1 - nl_ether_proto2str@Base 3.5.0-1 - nl_ether_proto2str@libnl_3 3.5.0-1 - nl_get_psched_hz@Base 3.5.0-1 - nl_get_psched_hz@libnl_3 3.5.0-1 - nl_get_user_hz@Base 3.5.0-1 - nl_get_user_hz@libnl_3 3.5.0-1 - nl_geterror@Base 3.5.0-1 - nl_geterror@libnl_3 3.5.0-1 - nl_has_capability@Base 3.5.0-1 - nl_has_capability@libnl_3 3.5.0-1 - nl_hash@Base 3.5.0-1 - nl_hash@libnl_3 3.5.0-1 - nl_hash_any@Base 3.5.0-1 - nl_hash_any@libnl_3 3.5.0-1 - nl_hash_table_add@Base 3.5.0-1 - nl_hash_table_add@libnl_3 3.5.0-1 - nl_hash_table_alloc@Base 3.5.0-1 - nl_hash_table_alloc@libnl_3 3.5.0-1 - nl_hash_table_del@Base 3.5.0-1 - nl_hash_table_del@libnl_3 3.5.0-1 - nl_hash_table_free@Base 3.5.0-1 - nl_hash_table_free@libnl_3 3.5.0-1 - nl_hash_table_lookup@Base 3.5.0-1 - nl_hash_table_lookup@libnl_3 3.5.0-1 - nl_ip_proto2str@Base 3.5.0-1 - nl_ip_proto2str@libnl_3 3.5.0-1 - nl_join_groups@Base 3.5.0-1 - nl_join_groups@libnl_3 3.5.0-1 - nl_llproto2str@Base 3.5.0-1 - nl_llproto2str@libnl_3 3.5.0-1 - nl_msec2str@Base 3.5.0-1 - nl_msec2str@libnl_3 3.5.0-1 - nl_msg_dump@Base 3.5.0-1 - nl_msg_dump@libnl_3 3.5.0-1 - nl_msg_parse@Base 3.5.0-1 - nl_msg_parse@libnl_3 3.5.0-1 - nl_msgtype_lookup@Base 3.5.0-1 - nl_msgtype_lookup@libnl_3 3.5.0-1 - nl_new_line@Base 3.5.0-1 - nl_new_line@libnl_3 3.5.0-1 - nl_nlfamily2str@Base 3.5.0-1 - nl_nlfamily2str@libnl_3 3.5.0-1 - nl_nlmsg_flags2str@Base 3.5.0-1 - nl_nlmsg_flags2str@libnl_3 3.5.0-1 - nl_nlmsgtype2str@Base 3.5.0-1 - nl_nlmsgtype2str@libnl_3 3.5.0-1 - nl_object_alloc@Base 3.5.0-1 - nl_object_alloc@libnl_3 3.5.0-1 - nl_object_alloc_name@Base 3.5.0-1 - nl_object_alloc_name@libnl_3 3.5.0-1 - nl_object_attr_list@Base 3.5.0-1 - nl_object_attr_list@libnl_3 3.5.0-1 - nl_object_attrs2str@Base 3.5.0-1 - nl_object_attrs2str@libnl_3 3.5.0-1 - nl_object_clone@Base 3.5.0-1 - nl_object_clone@libnl_3 3.5.0-1 - nl_object_diff64@libnl_3_2_28 3.5.0-1 - nl_object_diff@Base 3.5.0-1 - nl_object_diff@libnl_3 3.5.0-1 - nl_object_dump@Base 3.5.0-1 - nl_object_dump@libnl_3 3.5.0-1 - nl_object_dump_buf@Base 3.5.0-1 - nl_object_dump_buf@libnl_3 3.5.0-1 - nl_object_free@Base 3.5.0-1 - nl_object_free@libnl_3 3.5.0-1 - nl_object_get@Base 3.5.0-1 - nl_object_get@libnl_3 3.5.0-1 - nl_object_get_cache@Base 3.5.0-1 - nl_object_get_cache@libnl_3 3.5.0-1 - nl_object_get_id_attrs@Base 3.5.0-1 - nl_object_get_id_attrs@libnl_3 3.5.0-1 - nl_object_get_msgtype@Base 3.5.0-1 - nl_object_get_msgtype@libnl_3 3.5.0-1 - nl_object_get_ops@Base 3.5.0-1 - nl_object_get_ops@libnl_3 3.5.0-1 - nl_object_get_refcnt@Base 3.5.0-1 - nl_object_get_refcnt@libnl_3 3.5.0-1 - nl_object_get_type@Base 3.5.0-1 - nl_object_get_type@libnl_3 3.5.0-1 - nl_object_identical@Base 3.5.0-1 - nl_object_identical@libnl_3 3.5.0-1 - nl_object_is_marked@Base 3.5.0-1 - nl_object_is_marked@libnl_3 3.5.0-1 - nl_object_keygen@Base 3.5.0-1 - nl_object_keygen@libnl_3 3.5.0-1 - nl_object_mark@Base 3.5.0-1 - nl_object_mark@libnl_3 3.5.0-1 - nl_object_match_filter@Base 3.5.0-1 - nl_object_match_filter@libnl_3 3.5.0-1 - nl_object_put@Base 3.5.0-1 - nl_object_put@libnl_3 3.5.0-1 - nl_object_shared@Base 3.5.0-1 - nl_object_shared@libnl_3 3.5.0-1 - nl_object_unmark@Base 3.5.0-1 - nl_object_unmark@libnl_3 3.5.0-1 - nl_object_update@Base 3.5.0-1 - nl_object_update@libnl_3 3.5.0-1 - nl_perror@Base 3.5.0-1 - nl_perror@libnl_3 3.5.0-1 - nl_pickup@Base 3.5.0-1 - nl_pickup@libnl_3 3.5.0-1 - nl_pickup_keep_syserr@Base 3.5.0-1 - nl_pickup_keep_syserr@libnl_3 3.5.0-1 - nl_prob2int@Base 3.5.0-1 - nl_prob2int@libnl_3 3.5.0-1 - nl_rate2str@Base 3.5.0-1 - nl_rate2str@libnl_3 3.5.0-1 - nl_recv@Base 3.5.0-1 - nl_recv@libnl_3 3.5.0-1 - nl_recvmsgs@Base 3.5.0-1 - nl_recvmsgs@libnl_3 3.5.0-1 - nl_recvmsgs_default@Base 3.5.0-1 - nl_recvmsgs_default@libnl_3 3.5.0-1 - nl_recvmsgs_report@Base 3.5.0-1 - nl_recvmsgs_report@libnl_3 3.5.0-1 - nl_send@Base 3.5.0-1 - nl_send@libnl_3 3.5.0-1 - nl_send_auto@Base 3.5.0-1 - nl_send_auto@libnl_3 3.5.0-1 - nl_send_auto_complete@Base 3.5.0-1 - nl_send_auto_complete@libnl_3 3.5.0-1 - nl_send_iovec@Base 3.5.0-1 - nl_send_iovec@libnl_3 3.5.0-1 - nl_send_simple@Base 3.5.0-1 - nl_send_simple@libnl_3 3.5.0-1 - nl_send_sync@Base 3.5.0-1 - nl_send_sync@libnl_3 3.5.0-1 - nl_sendmsg@Base 3.5.0-1 - nl_sendmsg@libnl_3 3.5.0-1 - nl_sendto@Base 3.5.0-1 - nl_sendto@libnl_3 3.5.0-1 - nl_size2int@Base 3.5.0-1 - nl_size2int@libnl_3 3.5.0-1 - nl_size2str@Base 3.5.0-1 - nl_size2str@libnl_3 3.5.0-1 - nl_socket_add_membership@Base 3.5.0-1 - nl_socket_add_membership@libnl_3 3.5.0-1 - nl_socket_add_memberships@Base 3.5.0-1 - nl_socket_add_memberships@libnl_3 3.5.0-1 - nl_socket_alloc@Base 3.5.0-1 - nl_socket_alloc@libnl_3 3.5.0-1 - nl_socket_alloc_cb@Base 3.5.0-1 - nl_socket_alloc_cb@libnl_3 3.5.0-1 - nl_socket_disable_auto_ack@Base 3.5.0-1 - nl_socket_disable_auto_ack@libnl_3 3.5.0-1 - nl_socket_disable_msg_peek@Base 3.5.0-1 - nl_socket_disable_msg_peek@libnl_3 3.5.0-1 - nl_socket_disable_seq_check@Base 3.5.0-1 - nl_socket_disable_seq_check@libnl_3 3.5.0-1 - nl_socket_drop_membership@Base 3.5.0-1 - nl_socket_drop_membership@libnl_3 3.5.0-1 - nl_socket_drop_memberships@Base 3.5.0-1 - nl_socket_drop_memberships@libnl_3 3.5.0-1 - nl_socket_enable_auto_ack@Base 3.5.0-1 - nl_socket_enable_auto_ack@libnl_3 3.5.0-1 - nl_socket_enable_msg_peek@Base 3.5.0-1 - nl_socket_enable_msg_peek@libnl_3 3.5.0-1 - nl_socket_free@Base 3.5.0-1 - nl_socket_free@libnl_3 3.5.0-1 - nl_socket_get_cb@Base 3.5.0-1 - nl_socket_get_cb@libnl_3 3.5.0-1 - nl_socket_get_fd@Base 3.5.0-1 - nl_socket_get_fd@libnl_3 3.5.0-1 - nl_socket_get_local_port@Base 3.5.0-1 - nl_socket_get_local_port@libnl_3 3.5.0-1 - nl_socket_get_msg_buf_size@Base 3.5.0-1 - nl_socket_get_msg_buf_size@libnl_3 3.5.0-1 - nl_socket_get_peer_groups@Base 3.5.0-1 - nl_socket_get_peer_groups@libnl_3 3.5.0-1 - nl_socket_get_peer_port@Base 3.5.0-1 - nl_socket_get_peer_port@libnl_3 3.5.0-1 - nl_socket_modify_cb@Base 3.5.0-1 - nl_socket_modify_cb@libnl_3 3.5.0-1 - nl_socket_modify_err_cb@Base 3.5.0-1 - nl_socket_modify_err_cb@libnl_3 3.5.0-1 - nl_socket_recv_pktinfo@Base 3.5.0-1 - nl_socket_recv_pktinfo@libnl_3 3.5.0-1 - nl_socket_set_buffer_size@Base 3.5.0-1 - nl_socket_set_buffer_size@libnl_3 3.5.0-1 - nl_socket_set_cb@Base 3.5.0-1 - nl_socket_set_cb@libnl_3 3.5.0-1 - nl_socket_set_fd@Base 3.5.0-1 - nl_socket_set_fd@libnl_3_2_26 3.5.0-1 - nl_socket_set_local_port@Base 3.5.0-1 - nl_socket_set_local_port@libnl_3 3.5.0-1 - nl_socket_set_msg_buf_size@Base 3.5.0-1 - nl_socket_set_msg_buf_size@libnl_3 3.5.0-1 - nl_socket_set_nonblocking@Base 3.5.0-1 - nl_socket_set_nonblocking@libnl_3 3.5.0-1 - nl_socket_set_passcred@Base 3.5.0-1 - nl_socket_set_passcred@libnl_3 3.5.0-1 - nl_socket_set_peer_groups@Base 3.5.0-1 - nl_socket_set_peer_groups@libnl_3 3.5.0-1 - nl_socket_set_peer_port@Base 3.5.0-1 - nl_socket_set_peer_port@libnl_3 3.5.0-1 - nl_socket_use_seq@Base 3.5.0-1 - nl_socket_use_seq@libnl_3 3.5.0-1 - nl_str2af@Base 3.5.0-1 - nl_str2af@libnl_3 3.5.0-1 - nl_str2ether_proto@Base 3.5.0-1 - nl_str2ether_proto@libnl_3 3.5.0-1 - nl_str2ip_proto@Base 3.5.0-1 - nl_str2ip_proto@libnl_3 3.5.0-1 - nl_str2llproto@Base 3.5.0-1 - nl_str2llproto@libnl_3 3.5.0-1 - nl_str2msec@Base 3.5.0-1 - nl_str2msec@libnl_3 3.5.0-1 - nl_str2nlfamily@Base 3.5.0-1 - nl_str2nlfamily@libnl_3 3.5.0-1 - nl_str2nlmsgtype@Base 3.5.0-1 - nl_str2nlmsgtype@libnl_3 3.5.0-1 - nl_strerror_l@libnl_3_2_29 3.5.0-1 - nl_syserr2nlerr@Base 3.5.0-1 - nl_syserr2nlerr@libnl_3 3.5.0-1 - nl_ticks2us@Base 3.5.0-1 - nl_ticks2us@libnl_3 3.5.0-1 - nl_us2ticks@Base 3.5.0-1 - nl_us2ticks@libnl_3 3.5.0-1 - nl_ver_maj@Base 3.5.0-1 - nl_ver_maj@libnl_3 3.5.0-1 - nl_ver_mic@Base 3.5.0-1 - nl_ver_mic@libnl_3 3.5.0-1 - nl_ver_min@Base 3.5.0-1 - nl_ver_min@libnl_3 3.5.0-1 - nl_ver_num@Base 3.5.0-1 - nl_ver_num@libnl_3 3.5.0-1 - nl_wait_for_ack@Base 3.5.0-1 - nl_wait_for_ack@libnl_3 3.5.0-1 - nla_attr_size@Base 3.5.0-1 - nla_attr_size@libnl_3 3.5.0-1 - nla_data@Base 3.5.0-1 - nla_data@libnl_3 3.5.0-1 - nla_find@Base 3.5.0-1 - nla_find@libnl_3 3.5.0-1 - nla_get_flag@Base 3.5.0-1 - nla_get_flag@libnl_3 3.5.0-1 - nla_get_msecs@Base 3.5.0-1 - nla_get_msecs@libnl_3 3.5.0-1 - nla_get_s16@Base 3.5.0-1 - nla_get_s16@libnl_3_2_27 3.5.0-1 - nla_get_s32@Base 3.5.0-1 - nla_get_s32@libnl_3_2_27 3.5.0-1 - nla_get_s64@Base 3.5.0-1 - nla_get_s64@libnl_3_2_27 3.5.0-1 - nla_get_s8@Base 3.5.0-1 - nla_get_s8@libnl_3_2_27 3.5.0-1 - nla_get_string@Base 3.5.0-1 - nla_get_string@libnl_3 3.5.0-1 - nla_get_u16@Base 3.5.0-1 - nla_get_u16@libnl_3 3.5.0-1 - nla_get_u32@Base 3.5.0-1 - nla_get_u32@libnl_3 3.5.0-1 - nla_get_u64@Base 3.5.0-1 - nla_get_u64@libnl_3 3.5.0-1 - nla_get_u8@Base 3.5.0-1 - nla_get_u8@libnl_3 3.5.0-1 - nla_is_nested@Base 3.5.0-1 - nla_is_nested@libnl_3 3.5.0-1 - nla_len@Base 3.5.0-1 - nla_len@libnl_3 3.5.0-1 - nla_memcmp@Base 3.5.0-1 - nla_memcmp@libnl_3 3.5.0-1 - nla_memcpy@Base 3.5.0-1 - nla_memcpy@libnl_3 3.5.0-1 - nla_nest_cancel@Base 3.5.0-1 - nla_nest_cancel@libnl_3 3.5.0-1 - nla_nest_end@Base 3.5.0-1 - nla_nest_end@libnl_3 3.5.0-1 - nla_nest_end_keep_empty@libnl_3_5 3.5.0-1 - nla_nest_start@Base 3.5.0-1 - nla_nest_start@libnl_3 3.5.0-1 - nla_next@Base 3.5.0-1 - nla_next@libnl_3 3.5.0-1 - nla_ok@Base 3.5.0-1 - nla_ok@libnl_3 3.5.0-1 - nla_padlen@Base 3.5.0-1 - nla_padlen@libnl_3 3.5.0-1 - nla_parse@Base 3.5.0-1 - nla_parse@libnl_3 3.5.0-1 - nla_parse_nested@Base 3.5.0-1 - nla_parse_nested@libnl_3 3.5.0-1 - nla_put@Base 3.5.0-1 - nla_put@libnl_3 3.5.0-1 - nla_put_addr@Base 3.5.0-1 - nla_put_addr@libnl_3 3.5.0-1 - nla_put_data@Base 3.5.0-1 - nla_put_data@libnl_3 3.5.0-1 - nla_put_flag@Base 3.5.0-1 - nla_put_flag@libnl_3 3.5.0-1 - nla_put_msecs@Base 3.5.0-1 - nla_put_msecs@libnl_3 3.5.0-1 - nla_put_nested@Base 3.5.0-1 - nla_put_nested@libnl_3 3.5.0-1 - nla_put_s16@Base 3.5.0-1 - nla_put_s16@libnl_3_2_27 3.5.0-1 - nla_put_s32@Base 3.5.0-1 - nla_put_s32@libnl_3_2_27 3.5.0-1 - nla_put_s64@Base 3.5.0-1 - nla_put_s64@libnl_3_2_27 3.5.0-1 - nla_put_s8@Base 3.5.0-1 - nla_put_s8@libnl_3_2_27 3.5.0-1 - nla_put_string@Base 3.5.0-1 - nla_put_string@libnl_3 3.5.0-1 - nla_put_u16@Base 3.5.0-1 - nla_put_u16@libnl_3 3.5.0-1 - nla_put_u32@Base 3.5.0-1 - nla_put_u32@libnl_3 3.5.0-1 - nla_put_u64@Base 3.5.0-1 - nla_put_u64@libnl_3 3.5.0-1 - nla_put_u8@Base 3.5.0-1 - nla_put_u8@libnl_3 3.5.0-1 - nla_reserve@Base 3.5.0-1 - nla_reserve@libnl_3 3.5.0-1 - nla_strcmp@Base 3.5.0-1 - nla_strcmp@libnl_3 3.5.0-1 - nla_strdup@Base 3.5.0-1 - nla_strdup@libnl_3 3.5.0-1 - nla_strlcpy@Base 3.5.0-1 - nla_strlcpy@libnl_3 3.5.0-1 - nla_total_size@Base 3.5.0-1 - nla_total_size@libnl_3 3.5.0-1 - nla_type@Base 3.5.0-1 - nla_type@libnl_3 3.5.0-1 - nla_validate@Base 3.5.0-1 - nla_validate@libnl_3 3.5.0-1 - nlmsg_alloc@Base 3.5.0-1 - nlmsg_alloc@libnl_3 3.5.0-1 - nlmsg_alloc_simple@Base 3.5.0-1 - nlmsg_alloc_simple@libnl_3 3.5.0-1 - nlmsg_alloc_size@Base 3.5.0-1 - nlmsg_alloc_size@libnl_3 3.5.0-1 - nlmsg_append@Base 3.5.0-1 - nlmsg_append@libnl_3 3.5.0-1 - nlmsg_attrdata@Base 3.5.0-1 - nlmsg_attrdata@libnl_3 3.5.0-1 - nlmsg_attrlen@Base 3.5.0-1 - nlmsg_attrlen@libnl_3 3.5.0-1 - nlmsg_convert@Base 3.5.0-1 - nlmsg_convert@libnl_3 3.5.0-1 - nlmsg_data@Base 3.5.0-1 - nlmsg_data@libnl_3 3.5.0-1 - nlmsg_datalen@Base 3.5.0-1 - nlmsg_datalen@libnl_3 3.5.0-1 - nlmsg_expand@Base 3.5.0-1 - nlmsg_expand@libnl_3 3.5.0-1 - nlmsg_find_attr@Base 3.5.0-1 - nlmsg_find_attr@libnl_3 3.5.0-1 - nlmsg_free@Base 3.5.0-1 - nlmsg_free@libnl_3 3.5.0-1 - nlmsg_get@Base 3.5.0-1 - nlmsg_get@libnl_3 3.5.0-1 - nlmsg_get_creds@Base 3.5.0-1 - nlmsg_get_creds@libnl_3 3.5.0-1 - nlmsg_get_dst@Base 3.5.0-1 - nlmsg_get_dst@libnl_3 3.5.0-1 - nlmsg_get_max_size@Base 3.5.0-1 - nlmsg_get_max_size@libnl_3 3.5.0-1 - nlmsg_get_proto@Base 3.5.0-1 - nlmsg_get_proto@libnl_3 3.5.0-1 - nlmsg_get_src@Base 3.5.0-1 - nlmsg_get_src@libnl_3 3.5.0-1 - nlmsg_hdr@Base 3.5.0-1 - nlmsg_hdr@libnl_3 3.5.0-1 - nlmsg_inherit@Base 3.5.0-1 - nlmsg_inherit@libnl_3 3.5.0-1 - nlmsg_next@Base 3.5.0-1 - nlmsg_next@libnl_3 3.5.0-1 - nlmsg_ok@Base 3.5.0-1 - nlmsg_ok@libnl_3 3.5.0-1 - nlmsg_padlen@Base 3.5.0-1 - nlmsg_padlen@libnl_3 3.5.0-1 - nlmsg_parse@Base 3.5.0-1 - nlmsg_parse@libnl_3 3.5.0-1 - nlmsg_put@Base 3.5.0-1 - nlmsg_put@libnl_3 3.5.0-1 - nlmsg_reserve@Base 3.5.0-1 - nlmsg_reserve@libnl_3 3.5.0-1 - nlmsg_set_creds@Base 3.5.0-1 - nlmsg_set_creds@libnl_3 3.5.0-1 - nlmsg_set_default_size@Base 3.5.0-1 - nlmsg_set_default_size@libnl_3 3.5.0-1 - nlmsg_set_dst@Base 3.5.0-1 - nlmsg_set_dst@libnl_3 3.5.0-1 - nlmsg_set_proto@Base 3.5.0-1 - nlmsg_set_proto@libnl_3 3.5.0-1 - nlmsg_set_src@Base 3.5.0-1 - nlmsg_set_src@libnl_3 3.5.0-1 - nlmsg_size@Base 3.5.0-1 - nlmsg_size@libnl_3 3.5.0-1 - nlmsg_tail@Base 3.5.0-1 - nlmsg_tail@libnl_3 3.5.0-1 - nlmsg_total_size@Base 3.5.0-1 - nlmsg_total_size@libnl_3 3.5.0-1 - nlmsg_valid_hdr@Base 3.5.0-1 - nlmsg_valid_hdr@libnl_3 3.5.0-1 - nlmsg_validate@Base 3.5.0-1 - nlmsg_validate@libnl_3 3.5.0-1 diff --git a/src/libnl3/debian/libnl-3-dev.install b/src/libnl3/debian/libnl-3-dev.install deleted file mode 100755 index 3715b8b22bb..00000000000 --- a/src/libnl3/debian/libnl-3-dev.install +++ /dev/null @@ -1,5 +0,0 @@ -#!/usr/bin/dh-exec -debian/tmp/usr/include/* -debian/tmp/usr/lib/*/pkgconfig/libnl-3* -debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-3.so lib/${DEB_HOST_MULTIARCH}/ -debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-3.a lib/${DEB_HOST_MULTIARCH}/ diff --git a/src/libnl3/debian/libnl-cli-3-200.install b/src/libnl3/debian/libnl-cli-3-200.install deleted file mode 100755 index 6735ec9d14b..00000000000 --- a/src/libnl3/debian/libnl-cli-3-200.install +++ /dev/null @@ -1,4 +0,0 @@ -#!/usr/bin/dh-exec -debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-cli-3*.so.* -debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/cls/*.so usr/lib/${DEB_HOST_MULTIARCH}/libnl-3/cli/cls -debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/qdisc/*.so usr/lib/${DEB_HOST_MULTIARCH}/libnl-3/cli/qdisc diff --git a/src/libnl3/debian/libnl-cli-3-200.symbols b/src/libnl3/debian/libnl-cli-3-200.symbols deleted file mode 100644 index 2d21c139623..00000000000 --- a/src/libnl3/debian/libnl-cli-3-200.symbols +++ /dev/null @@ -1,226 +0,0 @@ -basic.so libnl-cli-3-200 #MINVER# -bfifo.so libnl-cli-3-200 #MINVER# -blackhole.so libnl-cli-3-200 #MINVER# -cgroup.so libnl-cli-3-200 #MINVER# -fq_codel.so libnl-cli-3-200 #MINVER# -hfsc.so libnl-cli-3-200 #MINVER# -htb.so libnl-cli-3-200 #MINVER# -ingress.so libnl-cli-3-200 #MINVER# -libnl-cli-3.so.200 libnl-cli-3-200 #MINVER# - libnl_3@libnl_3 3.5.0-1 - libnl_3_2_28@libnl_3_2_28 3.5.0-1 - nl_cli_addr_alloc@Base 3.5.0-1 - nl_cli_addr_alloc@libnl_3 3.5.0-1 - nl_cli_addr_parse@Base 3.5.0-1 - nl_cli_addr_parse@libnl_3 3.5.0-1 - nl_cli_addr_parse_broadcast@Base 3.5.0-1 - nl_cli_addr_parse_broadcast@libnl_3 3.5.0-1 - nl_cli_addr_parse_dev@Base 3.5.0-1 - nl_cli_addr_parse_dev@libnl_3 3.5.0-1 - nl_cli_addr_parse_family@Base 3.5.0-1 - nl_cli_addr_parse_family@libnl_3 3.5.0-1 - nl_cli_addr_parse_label@Base 3.5.0-1 - nl_cli_addr_parse_label@libnl_3 3.5.0-1 - nl_cli_addr_parse_local@Base 3.5.0-1 - nl_cli_addr_parse_local@libnl_3 3.5.0-1 - nl_cli_addr_parse_peer@Base 3.5.0-1 - nl_cli_addr_parse_peer@libnl_3 3.5.0-1 - nl_cli_addr_parse_preferred@Base 3.5.0-1 - nl_cli_addr_parse_preferred@libnl_3 3.5.0-1 - nl_cli_addr_parse_scope@Base 3.5.0-1 - nl_cli_addr_parse_scope@libnl_3 3.5.0-1 - nl_cli_addr_parse_valid@Base 3.5.0-1 - nl_cli_addr_parse_valid@libnl_3 3.5.0-1 - nl_cli_alloc_cache@Base 3.5.0-1 - nl_cli_alloc_cache@libnl_3 3.5.0-1 - nl_cli_alloc_cache_flags@libnl_3_2_28 3.5.0-1 - nl_cli_alloc_socket@Base 3.5.0-1 - nl_cli_alloc_socket@libnl_3 3.5.0-1 - nl_cli_class_alloc@Base 3.5.0-1 - nl_cli_class_alloc@libnl_3 3.5.0-1 - nl_cli_class_alloc_cache@Base 3.5.0-1 - nl_cli_class_alloc_cache@libnl_3 3.5.0-1 - nl_cli_cls_alloc@Base 3.5.0-1 - nl_cli_cls_alloc@libnl_3 3.5.0-1 - nl_cli_cls_alloc_cache@Base 3.5.0-1 - nl_cli_cls_alloc_cache@libnl_3 3.5.0-1 - nl_cli_cls_parse_ematch@Base 3.5.0-1 - nl_cli_cls_parse_ematch@libnl_3 3.5.0-1 - nl_cli_cls_parse_proto@Base 3.5.0-1 - nl_cli_cls_parse_proto@libnl_3 3.5.0-1 - nl_cli_confirm@Base 3.5.0-1 - nl_cli_confirm@libnl_3 3.5.0-1 - nl_cli_connect@Base 3.5.0-1 - nl_cli_connect@libnl_3 3.5.0-1 - nl_cli_ct_alloc@Base 3.5.0-1 - nl_cli_ct_alloc@libnl_3 3.5.0-1 - nl_cli_ct_alloc_cache@Base 3.5.0-1 - nl_cli_ct_alloc_cache@libnl_3 3.5.0-1 - nl_cli_ct_parse_dst@Base 3.5.0-1 - nl_cli_ct_parse_dst@libnl_3 3.5.0-1 - nl_cli_ct_parse_dst_port@Base 3.5.0-1 - nl_cli_ct_parse_dst_port@libnl_3 3.5.0-1 - nl_cli_ct_parse_family@Base 3.5.0-1 - nl_cli_ct_parse_family@libnl_3 3.5.0-1 - nl_cli_ct_parse_id@Base 3.5.0-1 - nl_cli_ct_parse_id@libnl_3 3.5.0-1 - nl_cli_ct_parse_mark@Base 3.5.0-1 - nl_cli_ct_parse_mark@libnl_3 3.5.0-1 - nl_cli_ct_parse_protocol@Base 3.5.0-1 - nl_cli_ct_parse_protocol@libnl_3 3.5.0-1 - nl_cli_ct_parse_src@Base 3.5.0-1 - nl_cli_ct_parse_src@libnl_3 3.5.0-1 - nl_cli_ct_parse_src_port@Base 3.5.0-1 - nl_cli_ct_parse_src_port@libnl_3 3.5.0-1 - nl_cli_ct_parse_status@Base 3.5.0-1 - nl_cli_ct_parse_status@libnl_3 3.5.0-1 - nl_cli_ct_parse_tcp_state@Base 3.5.0-1 - nl_cli_ct_parse_tcp_state@libnl_3 3.5.0-1 - nl_cli_ct_parse_timeout@Base 3.5.0-1 - nl_cli_ct_parse_timeout@libnl_3 3.5.0-1 - nl_cli_ct_parse_use@Base 3.5.0-1 - nl_cli_ct_parse_use@libnl_3 3.5.0-1 - nl_cli_ct_parse_zone@Base 3.5.0-1 - nl_cli_ct_parse_zone@libnl_3 3.5.0-1 - nl_cli_exp_alloc@Base 3.5.0-1 - nl_cli_exp_alloc@libnl_3 3.5.0-1 - nl_cli_exp_alloc_cache@Base 3.5.0-1 - nl_cli_exp_alloc_cache@libnl_3 3.5.0-1 - nl_cli_exp_parse_class@Base 3.5.0-1 - nl_cli_exp_parse_class@libnl_3 3.5.0-1 - nl_cli_exp_parse_dst@Base 3.5.0-1 - nl_cli_exp_parse_dst@libnl_3 3.5.0-1 - nl_cli_exp_parse_dst_port@Base 3.5.0-1 - nl_cli_exp_parse_dst_port@libnl_3 3.5.0-1 - nl_cli_exp_parse_family@Base 3.5.0-1 - nl_cli_exp_parse_family@libnl_3 3.5.0-1 - nl_cli_exp_parse_flags@Base 3.5.0-1 - nl_cli_exp_parse_flags@libnl_3 3.5.0-1 - nl_cli_exp_parse_fn@Base 3.5.0-1 - nl_cli_exp_parse_fn@libnl_3 3.5.0-1 - nl_cli_exp_parse_helper_name@Base 3.5.0-1 - nl_cli_exp_parse_helper_name@libnl_3 3.5.0-1 - nl_cli_exp_parse_icmp_code@Base 3.5.0-1 - nl_cli_exp_parse_icmp_code@libnl_3 3.5.0-1 - nl_cli_exp_parse_icmp_id@Base 3.5.0-1 - nl_cli_exp_parse_icmp_id@libnl_3 3.5.0-1 - nl_cli_exp_parse_icmp_type@Base 3.5.0-1 - nl_cli_exp_parse_icmp_type@libnl_3 3.5.0-1 - nl_cli_exp_parse_id@Base 3.5.0-1 - nl_cli_exp_parse_id@libnl_3 3.5.0-1 - nl_cli_exp_parse_l4protonum@Base 3.5.0-1 - nl_cli_exp_parse_l4protonum@libnl_3 3.5.0-1 - nl_cli_exp_parse_nat_dir@Base 3.5.0-1 - nl_cli_exp_parse_nat_dir@libnl_3 3.5.0-1 - nl_cli_exp_parse_src@Base 3.5.0-1 - nl_cli_exp_parse_src@libnl_3 3.5.0-1 - nl_cli_exp_parse_src_port@Base 3.5.0-1 - nl_cli_exp_parse_src_port@libnl_3 3.5.0-1 - nl_cli_exp_parse_timeout@Base 3.5.0-1 - nl_cli_exp_parse_timeout@libnl_3 3.5.0-1 - nl_cli_exp_parse_zone@Base 3.5.0-1 - nl_cli_exp_parse_zone@libnl_3 3.5.0-1 - nl_cli_fatal@Base 3.5.0-1 - nl_cli_fatal@libnl_3 3.5.0-1 - nl_cli_link_alloc@Base 3.5.0-1 - nl_cli_link_alloc@libnl_3 3.5.0-1 - nl_cli_link_alloc_cache@Base 3.5.0-1 - nl_cli_link_alloc_cache@libnl_3 3.5.0-1 - nl_cli_link_alloc_cache_family@Base 3.5.0-1 - nl_cli_link_alloc_cache_family@libnl_3 3.5.0-1 - nl_cli_link_alloc_cache_family_flags@libnl_3_2_28 3.5.0-1 - nl_cli_link_alloc_cache_flags@libnl_3_2_28 3.5.0-1 - nl_cli_link_parse_family@Base 3.5.0-1 - nl_cli_link_parse_family@libnl_3 3.5.0-1 - nl_cli_link_parse_ifalias@Base 3.5.0-1 - nl_cli_link_parse_ifalias@libnl_3 3.5.0-1 - nl_cli_link_parse_ifindex@Base 3.5.0-1 - nl_cli_link_parse_ifindex@libnl_3 3.5.0-1 - nl_cli_link_parse_mtu@Base 3.5.0-1 - nl_cli_link_parse_mtu@libnl_3 3.5.0-1 - nl_cli_link_parse_name@Base 3.5.0-1 - nl_cli_link_parse_name@libnl_3 3.5.0-1 - nl_cli_link_parse_txqlen@Base 3.5.0-1 - nl_cli_link_parse_txqlen@libnl_3 3.5.0-1 - nl_cli_link_parse_weight@Base 3.5.0-1 - nl_cli_link_parse_weight@libnl_3 3.5.0-1 - nl_cli_load_module@Base 3.5.0-1 - nl_cli_load_module@libnl_3 3.5.0-1 - nl_cli_neigh_alloc@Base 3.5.0-1 - nl_cli_neigh_alloc@libnl_3 3.5.0-1 - nl_cli_neigh_parse_dev@Base 3.5.0-1 - nl_cli_neigh_parse_dev@libnl_3 3.5.0-1 - nl_cli_neigh_parse_dst@Base 3.5.0-1 - nl_cli_neigh_parse_dst@libnl_3 3.5.0-1 - nl_cli_neigh_parse_family@Base 3.5.0-1 - nl_cli_neigh_parse_family@libnl_3 3.5.0-1 - nl_cli_neigh_parse_lladdr@Base 3.5.0-1 - nl_cli_neigh_parse_lladdr@libnl_3 3.5.0-1 - nl_cli_neigh_parse_state@Base 3.5.0-1 - nl_cli_neigh_parse_state@libnl_3 3.5.0-1 - nl_cli_parse_dumptype@Base 3.5.0-1 - nl_cli_parse_dumptype@libnl_3 3.5.0-1 - nl_cli_parse_u32@Base 3.5.0-1 - nl_cli_parse_u32@libnl_3 3.5.0-1 - nl_cli_print_version@Base 3.5.0-1 - nl_cli_print_version@libnl_3 3.5.0-1 - nl_cli_qdisc_alloc@Base 3.5.0-1 - nl_cli_qdisc_alloc@libnl_3 3.5.0-1 - nl_cli_route_alloc@Base 3.5.0-1 - nl_cli_route_alloc@libnl_3 3.5.0-1 - nl_cli_route_alloc_cache@Base 3.5.0-1 - nl_cli_route_alloc_cache@libnl_3 3.5.0-1 - nl_cli_route_parse_dst@Base 3.5.0-1 - nl_cli_route_parse_dst@libnl_3 3.5.0-1 - nl_cli_route_parse_family@Base 3.5.0-1 - nl_cli_route_parse_family@libnl_3 3.5.0-1 - nl_cli_route_parse_iif@Base 3.5.0-1 - nl_cli_route_parse_iif@libnl_3 3.5.0-1 - nl_cli_route_parse_metric@Base 3.5.0-1 - nl_cli_route_parse_metric@libnl_3 3.5.0-1 - nl_cli_route_parse_nexthop@Base 3.5.0-1 - nl_cli_route_parse_nexthop@libnl_3 3.5.0-1 - nl_cli_route_parse_pref_src@Base 3.5.0-1 - nl_cli_route_parse_pref_src@libnl_3 3.5.0-1 - nl_cli_route_parse_prio@Base 3.5.0-1 - nl_cli_route_parse_prio@libnl_3 3.5.0-1 - nl_cli_route_parse_protocol@Base 3.5.0-1 - nl_cli_route_parse_protocol@libnl_3 3.5.0-1 - nl_cli_route_parse_scope@Base 3.5.0-1 - nl_cli_route_parse_scope@libnl_3 3.5.0-1 - nl_cli_route_parse_src@Base 3.5.0-1 - nl_cli_route_parse_src@libnl_3 3.5.0-1 - nl_cli_route_parse_table@Base 3.5.0-1 - nl_cli_route_parse_table@libnl_3 3.5.0-1 - nl_cli_route_parse_type@Base 3.5.0-1 - nl_cli_route_parse_type@libnl_3 3.5.0-1 - nl_cli_rule_alloc@Base 3.5.0-1 - nl_cli_rule_alloc@libnl_3 3.5.0-1 - nl_cli_rule_alloc_cache@Base 3.5.0-1 - nl_cli_rule_alloc_cache@libnl_3 3.5.0-1 - nl_cli_rule_parse_family@Base 3.5.0-1 - nl_cli_rule_parse_family@libnl_3 3.5.0-1 - nl_cli_tc_lookup@Base 3.5.0-1 - nl_cli_tc_lookup@libnl_3 3.5.0-1 - nl_cli_tc_parse_dev@Base 3.5.0-1 - nl_cli_tc_parse_dev@libnl_3 3.5.0-1 - nl_cli_tc_parse_handle@Base 3.5.0-1 - nl_cli_tc_parse_handle@libnl_3 3.5.0-1 - nl_cli_tc_parse_kind@Base 3.5.0-1 - nl_cli_tc_parse_kind@libnl_3 3.5.0-1 - nl_cli_tc_parse_linktype@Base 3.5.0-1 - nl_cli_tc_parse_linktype@libnl_3 3.5.0-1 - nl_cli_tc_parse_mpu@Base 3.5.0-1 - nl_cli_tc_parse_mpu@libnl_3 3.5.0-1 - nl_cli_tc_parse_mtu@Base 3.5.0-1 - nl_cli_tc_parse_mtu@libnl_3 3.5.0-1 - nl_cli_tc_parse_overhead@Base 3.5.0-1 - nl_cli_tc_parse_overhead@libnl_3 3.5.0-1 - nl_cli_tc_parse_parent@Base 3.5.0-1 - nl_cli_tc_parse_parent@libnl_3 3.5.0-1 - nl_cli_tc_register@Base 3.5.0-1 - nl_cli_tc_register@libnl_3 3.5.0-1 - nl_cli_tc_unregister@Base 3.5.0-1 - nl_cli_tc_unregister@libnl_3 3.5.0-1 -pfifo.so libnl-cli-3-200 #MINVER# -plug.so libnl-cli-3-200 #MINVER# diff --git a/src/libnl3/debian/libnl-cli-3-dev.install b/src/libnl3/debian/libnl-cli-3-dev.install deleted file mode 100644 index 66aa3b3d945..00000000000 --- a/src/libnl3/debian/libnl-cli-3-dev.install +++ /dev/null @@ -1,3 +0,0 @@ -debian/tmp/usr/lib/*/pkgconfig/libnl-cli-3* -debian/tmp/usr/lib/*/libnl-cli-3*.so -debian/tmp/usr/lib/*/libnl-cli-3*.a diff --git a/src/libnl3/debian/libnl-genl-3-200.install b/src/libnl3/debian/libnl-genl-3-200.install deleted file mode 100755 index d9d6fae40b2..00000000000 --- a/src/libnl3/debian/libnl-genl-3-200.install +++ /dev/null @@ -1,2 +0,0 @@ -#!/usr/bin/dh-exec -debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3*.so.* lib/${DEB_HOST_MULTIARCH}/ diff --git a/src/libnl3/debian/libnl-genl-3-200.symbols b/src/libnl3/debian/libnl-genl-3-200.symbols deleted file mode 100644 index 0eb2e3be446..00000000000 --- a/src/libnl3/debian/libnl-genl-3-200.symbols +++ /dev/null @@ -1,88 +0,0 @@ -libnl-genl-3.so.200 libnl-genl-3-200 #MINVER# - genl_connect@Base 3.5.0-1 - genl_connect@libnl_3 3.5.0-1 - genl_ctrl_alloc_cache@Base 3.5.0-1 - genl_ctrl_alloc_cache@libnl_3 3.5.0-1 - genl_ctrl_resolve@Base 3.5.0-1 - genl_ctrl_resolve@libnl_3 3.5.0-1 - genl_ctrl_resolve_grp@Base 3.5.0-1 - genl_ctrl_resolve_grp@libnl_3 3.5.0-1 - genl_ctrl_search@Base 3.5.0-1 - genl_ctrl_search@libnl_3 3.5.0-1 - genl_ctrl_search_by_name@Base 3.5.0-1 - genl_ctrl_search_by_name@libnl_3 3.5.0-1 - genl_family_add_grp@Base 3.5.0-1 - genl_family_add_grp@libnl_3 3.5.0-1 - genl_family_add_op@Base 3.5.0-1 - genl_family_add_op@libnl_3 3.5.0-1 - genl_family_alloc@Base 3.5.0-1 - genl_family_alloc@libnl_3 3.5.0-1 - genl_family_get_hdrsize@Base 3.5.0-1 - genl_family_get_hdrsize@libnl_3 3.5.0-1 - genl_family_get_id@Base 3.5.0-1 - genl_family_get_id@libnl_3 3.5.0-1 - genl_family_get_maxattr@Base 3.5.0-1 - genl_family_get_maxattr@libnl_3 3.5.0-1 - genl_family_get_name@Base 3.5.0-1 - genl_family_get_name@libnl_3 3.5.0-1 - genl_family_get_version@Base 3.5.0-1 - genl_family_get_version@libnl_3 3.5.0-1 - genl_family_ops@Base 3.5.0-1 - genl_family_ops@libnl_3 3.5.0-1 - genl_family_put@Base 3.5.0-1 - genl_family_put@libnl_3 3.5.0-1 - genl_family_set_hdrsize@Base 3.5.0-1 - genl_family_set_hdrsize@libnl_3 3.5.0-1 - genl_family_set_id@Base 3.5.0-1 - genl_family_set_id@libnl_3 3.5.0-1 - genl_family_set_maxattr@Base 3.5.0-1 - genl_family_set_maxattr@libnl_3 3.5.0-1 - genl_family_set_name@Base 3.5.0-1 - genl_family_set_name@libnl_3 3.5.0-1 - genl_family_set_version@Base 3.5.0-1 - genl_family_set_version@libnl_3 3.5.0-1 - genl_handle_msg@Base 3.5.0-1 - genl_handle_msg@libnl_3 3.5.0-1 - genl_mngt_resolve@Base 3.5.0-1 - genl_mngt_resolve@libnl_3 3.5.0-1 - genl_op2name@Base 3.5.0-1 - genl_op2name@libnl_3 3.5.0-1 - genl_ops_resolve@Base 3.5.0-1 - genl_ops_resolve@libnl_3 3.5.0-1 - genl_register@Base 3.5.0-1 - genl_register@libnl_3 3.5.0-1 - genl_register_family@Base 3.5.0-1 - genl_register_family@libnl_3 3.5.0-1 - genl_resolve_id@Base 3.5.0-1 - genl_resolve_id@libnl_3 3.5.0-1 - genl_send_simple@Base 3.5.0-1 - genl_send_simple@libnl_3 3.5.0-1 - genl_unregister@Base 3.5.0-1 - genl_unregister@libnl_3 3.5.0-1 - genl_unregister_family@Base 3.5.0-1 - genl_unregister_family@libnl_3 3.5.0-1 - genlmsg_attrdata@Base 3.5.0-1 - genlmsg_attrdata@libnl_3 3.5.0-1 - genlmsg_attrlen@Base 3.5.0-1 - genlmsg_attrlen@libnl_3 3.5.0-1 - genlmsg_data@Base 3.5.0-1 - genlmsg_data@libnl_3 3.5.0-1 - genlmsg_hdr@Base 3.5.0-1 - genlmsg_hdr@libnl_3 3.5.0-1 - genlmsg_len@Base 3.5.0-1 - genlmsg_len@libnl_3 3.5.0-1 - genlmsg_parse@Base 3.5.0-1 - genlmsg_parse@libnl_3 3.5.0-1 - genlmsg_put@Base 3.5.0-1 - genlmsg_put@libnl_3 3.5.0-1 - genlmsg_user_data@Base 3.5.0-1 - genlmsg_user_data@libnl_3 3.5.0-1 - genlmsg_user_datalen@Base 3.5.0-1 - genlmsg_user_datalen@libnl_3 3.5.0-1 - genlmsg_user_hdr@Base 3.5.0-1 - genlmsg_user_hdr@libnl_3 3.5.0-1 - genlmsg_valid_hdr@Base 3.5.0-1 - genlmsg_valid_hdr@libnl_3 3.5.0-1 - genlmsg_validate@Base 3.5.0-1 - genlmsg_validate@libnl_3 3.5.0-1 - libnl_3@libnl_3 3.5.0-1 diff --git a/src/libnl3/debian/libnl-genl-3-dev.install b/src/libnl3/debian/libnl-genl-3-dev.install deleted file mode 100755 index cbc6b51ef47..00000000000 --- a/src/libnl3/debian/libnl-genl-3-dev.install +++ /dev/null @@ -1,4 +0,0 @@ -#!/usr/bin/dh-exec -debian/tmp/usr/lib/*/pkgconfig/libnl-genl-3* -debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3*.so lib/${DEB_HOST_MULTIARCH}/ -debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3*.a lib/${DEB_HOST_MULTIARCH}/ diff --git a/src/libnl3/debian/libnl-idiag-3-200.install b/src/libnl3/debian/libnl-idiag-3-200.install deleted file mode 100644 index f6d6b8064e5..00000000000 --- a/src/libnl3/debian/libnl-idiag-3-200.install +++ /dev/null @@ -1 +0,0 @@ -debian/tmp/usr/lib/*/libnl-idiag-3*.so.* diff --git a/src/libnl3/debian/libnl-idiag-3-200.symbols b/src/libnl3/debian/libnl-idiag-3-200.symbols deleted file mode 100644 index 13cf27c7c8a..00000000000 --- a/src/libnl3/debian/libnl-idiag-3-200.symbols +++ /dev/null @@ -1,206 +0,0 @@ -libnl-idiag-3.so.200 libnl-idiag-3-200 #MINVER# - idiagnl_attrs2str@Base 3.5.0-1 - idiagnl_attrs2str@libnl_3 3.5.0-1 - idiagnl_connect@Base 3.5.0-1 - idiagnl_connect@libnl_3 3.5.0-1 - idiagnl_exts2str@Base 3.5.0-1 - idiagnl_exts2str@libnl_3 3.5.0-1 - idiagnl_meminfo_alloc@Base 3.5.0-1 - idiagnl_meminfo_alloc@libnl_3 3.5.0-1 - idiagnl_meminfo_get@Base 3.5.0-1 - idiagnl_meminfo_get@libnl_3 3.5.0-1 - idiagnl_meminfo_get_fmem@Base 3.5.0-1 - idiagnl_meminfo_get_fmem@libnl_3 3.5.0-1 - idiagnl_meminfo_get_rmem@Base 3.5.0-1 - idiagnl_meminfo_get_rmem@libnl_3 3.5.0-1 - idiagnl_meminfo_get_tmem@Base 3.5.0-1 - idiagnl_meminfo_get_tmem@libnl_3 3.5.0-1 - idiagnl_meminfo_get_wmem@Base 3.5.0-1 - idiagnl_meminfo_get_wmem@libnl_3 3.5.0-1 - idiagnl_meminfo_obj_ops@Base 3.5.0-1 - idiagnl_meminfo_obj_ops@libnl_3 3.5.0-1 - idiagnl_meminfo_put@Base 3.5.0-1 - idiagnl_meminfo_put@libnl_3 3.5.0-1 - idiagnl_meminfo_set_fmem@Base 3.5.0-1 - idiagnl_meminfo_set_fmem@libnl_3 3.5.0-1 - idiagnl_meminfo_set_rmem@Base 3.5.0-1 - idiagnl_meminfo_set_rmem@libnl_3 3.5.0-1 - idiagnl_meminfo_set_tmem@Base 3.5.0-1 - idiagnl_meminfo_set_tmem@libnl_3 3.5.0-1 - idiagnl_meminfo_set_wmem@Base 3.5.0-1 - idiagnl_meminfo_set_wmem@libnl_3 3.5.0-1 - idiagnl_msg_alloc@Base 3.5.0-1 - idiagnl_msg_alloc@libnl_3 3.5.0-1 - idiagnl_msg_alloc_cache@Base 3.5.0-1 - idiagnl_msg_alloc_cache@libnl_3 3.5.0-1 - idiagnl_msg_get@Base 3.5.0-1 - idiagnl_msg_get@libnl_3 3.5.0-1 - idiagnl_msg_get_cong@Base 3.5.0-1 - idiagnl_msg_get_cong@libnl_3 3.5.0-1 - idiagnl_msg_get_dport@Base 3.5.0-1 - idiagnl_msg_get_dport@libnl_3 3.5.0-1 - idiagnl_msg_get_dst@Base 3.5.0-1 - idiagnl_msg_get_dst@libnl_3 3.5.0-1 - idiagnl_msg_get_expires@Base 3.5.0-1 - idiagnl_msg_get_expires@libnl_3 3.5.0-1 - idiagnl_msg_get_family@Base 3.5.0-1 - idiagnl_msg_get_family@libnl_3 3.5.0-1 - idiagnl_msg_get_ifindex@Base 3.5.0-1 - idiagnl_msg_get_ifindex@libnl_3 3.5.0-1 - idiagnl_msg_get_inode@Base 3.5.0-1 - idiagnl_msg_get_inode@libnl_3 3.5.0-1 - idiagnl_msg_get_meminfo@Base 3.5.0-1 - idiagnl_msg_get_meminfo@libnl_3 3.5.0-1 - idiagnl_msg_get_retrans@Base 3.5.0-1 - idiagnl_msg_get_retrans@libnl_3 3.5.0-1 - idiagnl_msg_get_rqueue@Base 3.5.0-1 - idiagnl_msg_get_rqueue@libnl_3 3.5.0-1 - idiagnl_msg_get_shutdown@Base 3.5.0-1 - idiagnl_msg_get_shutdown@libnl_3 3.5.0-1 - idiagnl_msg_get_sport@Base 3.5.0-1 - idiagnl_msg_get_sport@libnl_3 3.5.0-1 - idiagnl_msg_get_src@Base 3.5.0-1 - idiagnl_msg_get_src@libnl_3 3.5.0-1 - idiagnl_msg_get_state@Base 3.5.0-1 - idiagnl_msg_get_state@libnl_3 3.5.0-1 - idiagnl_msg_get_tclass@Base 3.5.0-1 - idiagnl_msg_get_tclass@libnl_3 3.5.0-1 - idiagnl_msg_get_tcpinfo@Base 3.5.0-1 - idiagnl_msg_get_tcpinfo@libnl_3 3.5.0-1 - idiagnl_msg_get_timer@Base 3.5.0-1 - idiagnl_msg_get_timer@libnl_3 3.5.0-1 - idiagnl_msg_get_tos@Base 3.5.0-1 - idiagnl_msg_get_tos@libnl_3 3.5.0-1 - idiagnl_msg_get_uid@Base 3.5.0-1 - idiagnl_msg_get_uid@libnl_3 3.5.0-1 - idiagnl_msg_get_vegasinfo@Base 3.5.0-1 - idiagnl_msg_get_vegasinfo@libnl_3 3.5.0-1 - idiagnl_msg_get_wqueue@Base 3.5.0-1 - idiagnl_msg_get_wqueue@libnl_3 3.5.0-1 - idiagnl_msg_obj_ops@Base 3.5.0-1 - idiagnl_msg_obj_ops@libnl_3 3.5.0-1 - idiagnl_msg_parse@Base 3.5.0-1 - idiagnl_msg_parse@libnl_3 3.5.0-1 - idiagnl_msg_put@Base 3.5.0-1 - idiagnl_msg_put@libnl_3 3.5.0-1 - idiagnl_msg_set_cong@Base 3.5.0-1 - idiagnl_msg_set_cong@libnl_3 3.5.0-1 - idiagnl_msg_set_dport@Base 3.5.0-1 - idiagnl_msg_set_dport@libnl_3 3.5.0-1 - idiagnl_msg_set_dst@Base 3.5.0-1 - idiagnl_msg_set_dst@libnl_3 3.5.0-1 - idiagnl_msg_set_expires@Base 3.5.0-1 - idiagnl_msg_set_expires@libnl_3 3.5.0-1 - idiagnl_msg_set_family@Base 3.5.0-1 - idiagnl_msg_set_family@libnl_3 3.5.0-1 - idiagnl_msg_set_ifindex@Base 3.5.0-1 - idiagnl_msg_set_ifindex@libnl_3 3.5.0-1 - idiagnl_msg_set_inode@Base 3.5.0-1 - idiagnl_msg_set_inode@libnl_3 3.5.0-1 - idiagnl_msg_set_meminfo@Base 3.5.0-1 - idiagnl_msg_set_meminfo@libnl_3 3.5.0-1 - idiagnl_msg_set_retrans@Base 3.5.0-1 - idiagnl_msg_set_retrans@libnl_3 3.5.0-1 - idiagnl_msg_set_rqueue@Base 3.5.0-1 - idiagnl_msg_set_rqueue@libnl_3 3.5.0-1 - idiagnl_msg_set_shutdown@Base 3.5.0-1 - idiagnl_msg_set_shutdown@libnl_3 3.5.0-1 - idiagnl_msg_set_sport@Base 3.5.0-1 - idiagnl_msg_set_sport@libnl_3 3.5.0-1 - idiagnl_msg_set_src@Base 3.5.0-1 - idiagnl_msg_set_src@libnl_3 3.5.0-1 - idiagnl_msg_set_state@Base 3.5.0-1 - idiagnl_msg_set_state@libnl_3 3.5.0-1 - idiagnl_msg_set_tclass@Base 3.5.0-1 - idiagnl_msg_set_tclass@libnl_3 3.5.0-1 - idiagnl_msg_set_tcpinfo@Base 3.5.0-1 - idiagnl_msg_set_tcpinfo@libnl_3 3.5.0-1 - idiagnl_msg_set_timer@Base 3.5.0-1 - idiagnl_msg_set_timer@libnl_3 3.5.0-1 - idiagnl_msg_set_tos@Base 3.5.0-1 - idiagnl_msg_set_tos@libnl_3 3.5.0-1 - idiagnl_msg_set_uid@Base 3.5.0-1 - idiagnl_msg_set_uid@libnl_3 3.5.0-1 - idiagnl_msg_set_vegasinfo@Base 3.5.0-1 - idiagnl_msg_set_vegasinfo@libnl_3 3.5.0-1 - idiagnl_msg_set_wqueue@Base 3.5.0-1 - idiagnl_msg_set_wqueue@libnl_3 3.5.0-1 - idiagnl_req_alloc@Base 3.5.0-1 - idiagnl_req_alloc@libnl_3 3.5.0-1 - idiagnl_req_get@Base 3.5.0-1 - idiagnl_req_get@libnl_3 3.5.0-1 - idiagnl_req_get_dbs@Base 3.5.0-1 - idiagnl_req_get_dbs@libnl_3 3.5.0-1 - idiagnl_req_get_dst@Base 3.5.0-1 - idiagnl_req_get_dst@libnl_3 3.5.0-1 - idiagnl_req_get_ext@Base 3.5.0-1 - idiagnl_req_get_ext@libnl_3 3.5.0-1 - idiagnl_req_get_family@Base 3.5.0-1 - idiagnl_req_get_family@libnl_3 3.5.0-1 - idiagnl_req_get_ifindex@Base 3.5.0-1 - idiagnl_req_get_ifindex@libnl_3 3.5.0-1 - idiagnl_req_get_src@Base 3.5.0-1 - idiagnl_req_get_src@libnl_3 3.5.0-1 - idiagnl_req_get_states@Base 3.5.0-1 - idiagnl_req_get_states@libnl_3 3.5.0-1 - idiagnl_req_obj_ops@Base 3.5.0-1 - idiagnl_req_obj_ops@libnl_3 3.5.0-1 - idiagnl_req_parse@Base 3.5.0-1 - idiagnl_req_parse@libnl_3 3.5.0-1 - idiagnl_req_put@Base 3.5.0-1 - idiagnl_req_put@libnl_3 3.5.0-1 - idiagnl_req_set_dbs@Base 3.5.0-1 - idiagnl_req_set_dbs@libnl_3 3.5.0-1 - idiagnl_req_set_dst@Base 3.5.0-1 - idiagnl_req_set_dst@libnl_3 3.5.0-1 - idiagnl_req_set_ext@Base 3.5.0-1 - idiagnl_req_set_ext@libnl_3 3.5.0-1 - idiagnl_req_set_family@Base 3.5.0-1 - idiagnl_req_set_family@libnl_3 3.5.0-1 - idiagnl_req_set_ifindex@Base 3.5.0-1 - idiagnl_req_set_ifindex@libnl_3 3.5.0-1 - idiagnl_req_set_src@Base 3.5.0-1 - idiagnl_req_set_src@libnl_3 3.5.0-1 - idiagnl_req_set_states@Base 3.5.0-1 - idiagnl_req_set_states@libnl_3 3.5.0-1 - idiagnl_send_simple@Base 3.5.0-1 - idiagnl_send_simple@libnl_3 3.5.0-1 - idiagnl_shutdown2str@Base 3.5.0-1 - idiagnl_shutdown2str@libnl_3 3.5.0-1 - idiagnl_state2str@Base 3.5.0-1 - idiagnl_state2str@libnl_3 3.5.0-1 - idiagnl_str2state@Base 3.5.0-1 - idiagnl_str2state@libnl_3 3.5.0-1 - idiagnl_str2timer@Base 3.5.0-1 - idiagnl_str2timer@libnl_3 3.5.0-1 - idiagnl_tcpopts2str@Base 3.5.0-1 - idiagnl_tcpopts2str@libnl_3 3.5.0-1 - idiagnl_tcpstate2str@Base 3.5.0-1 - idiagnl_tcpstate2str@libnl_3 3.5.0-1 - idiagnl_timer2str@Base 3.5.0-1 - idiagnl_timer2str@libnl_3 3.5.0-1 - idiagnl_vegasinfo_alloc@Base 3.5.0-1 - idiagnl_vegasinfo_alloc@libnl_3 3.5.0-1 - idiagnl_vegasinfo_get@Base 3.5.0-1 - idiagnl_vegasinfo_get@libnl_3 3.5.0-1 - idiagnl_vegasinfo_get_enabled@Base 3.5.0-1 - idiagnl_vegasinfo_get_enabled@libnl_3 3.5.0-1 - idiagnl_vegasinfo_get_minrtt@Base 3.5.0-1 - idiagnl_vegasinfo_get_minrtt@libnl_3 3.5.0-1 - idiagnl_vegasinfo_get_rtt@Base 3.5.0-1 - idiagnl_vegasinfo_get_rtt@libnl_3 3.5.0-1 - idiagnl_vegasinfo_get_rttcnt@Base 3.5.0-1 - idiagnl_vegasinfo_get_rttcnt@libnl_3 3.5.0-1 - idiagnl_vegasinfo_obj_ops@Base 3.5.0-1 - idiagnl_vegasinfo_obj_ops@libnl_3 3.5.0-1 - idiagnl_vegasinfo_put@Base 3.5.0-1 - idiagnl_vegasinfo_put@libnl_3 3.5.0-1 - idiagnl_vegasinfo_set_enabled@Base 3.5.0-1 - idiagnl_vegasinfo_set_enabled@libnl_3 3.5.0-1 - idiagnl_vegasinfo_set_minrtt@Base 3.5.0-1 - idiagnl_vegasinfo_set_minrtt@libnl_3 3.5.0-1 - idiagnl_vegasinfo_set_rtt@Base 3.5.0-1 - idiagnl_vegasinfo_set_rtt@libnl_3 3.5.0-1 - idiagnl_vegasinfo_set_rttcnt@Base 3.5.0-1 - idiagnl_vegasinfo_set_rttcnt@libnl_3 3.5.0-1 - libnl_3@libnl_3 3.5.0-1 diff --git a/src/libnl3/debian/libnl-idiag-3-dev.install b/src/libnl3/debian/libnl-idiag-3-dev.install deleted file mode 100644 index 6f19a6e83d6..00000000000 --- a/src/libnl3/debian/libnl-idiag-3-dev.install +++ /dev/null @@ -1,3 +0,0 @@ -debian/tmp/usr/lib/*/pkgconfig/libnl-idiag-3* -debian/tmp/usr/lib/*/libnl-idiag-3*.so -debian/tmp/usr/lib/*/libnl-idiag-3*.a diff --git a/src/libnl3/debian/libnl-nf-3-200.install b/src/libnl3/debian/libnl-nf-3-200.install deleted file mode 100644 index 6d65611ed34..00000000000 --- a/src/libnl3/debian/libnl-nf-3-200.install +++ /dev/null @@ -1 +0,0 @@ -debian/tmp/usr/lib/*/libnl-nf-3*.so.* diff --git a/src/libnl3/debian/libnl-nf-3-200.symbols b/src/libnl3/debian/libnl-nf-3-200.symbols deleted file mode 100644 index 2ce4d2ad0ff..00000000000 --- a/src/libnl3/debian/libnl-nf-3-200.symbols +++ /dev/null @@ -1,620 +0,0 @@ -libnl-nf-3.so.200 libnl-nf-3-200 #MINVER# - ct_obj_ops@Base 3.5.0-1 - ct_obj_ops@libnl_3 3.5.0-1 - exp_obj_ops@Base 3.5.0-1 - exp_obj_ops@libnl_3 3.5.0-1 - libnl_3@libnl_3 3.5.0-1 - log_msg_obj_ops@Base 3.5.0-1 - log_msg_obj_ops@libnl_3 3.5.0-1 - log_obj_ops@Base 3.5.0-1 - log_obj_ops@libnl_3 3.5.0-1 - nfnl_connect@Base 3.5.0-1 - nfnl_connect@libnl_3 3.5.0-1 - nfnl_ct_add@Base 3.5.0-1 - nfnl_ct_add@libnl_3 3.5.0-1 - nfnl_ct_alloc@Base 3.5.0-1 - nfnl_ct_alloc@libnl_3 3.5.0-1 - nfnl_ct_alloc_cache@Base 3.5.0-1 - nfnl_ct_alloc_cache@libnl_3 3.5.0-1 - nfnl_ct_build_add_request@Base 3.5.0-1 - nfnl_ct_build_add_request@libnl_3 3.5.0-1 - nfnl_ct_build_delete_request@Base 3.5.0-1 - nfnl_ct_build_delete_request@libnl_3 3.5.0-1 - nfnl_ct_build_query_request@Base 3.5.0-1 - nfnl_ct_build_query_request@libnl_3 3.5.0-1 - nfnl_ct_del@Base 3.5.0-1 - nfnl_ct_del@libnl_3 3.5.0-1 - nfnl_ct_dump_request@Base 3.5.0-1 - nfnl_ct_dump_request@libnl_3 3.5.0-1 - nfnl_ct_get@Base 3.5.0-1 - nfnl_ct_get@libnl_3 3.5.0-1 - nfnl_ct_get_bytes@Base 3.5.0-1 - nfnl_ct_get_bytes@libnl_3 3.5.0-1 - nfnl_ct_get_dst@Base 3.5.0-1 - nfnl_ct_get_dst@libnl_3 3.5.0-1 - nfnl_ct_get_dst_port@Base 3.5.0-1 - nfnl_ct_get_dst_port@libnl_3 3.5.0-1 - nfnl_ct_get_family@Base 3.5.0-1 - nfnl_ct_get_family@libnl_3 3.5.0-1 - nfnl_ct_get_icmp_code@Base 3.5.0-1 - nfnl_ct_get_icmp_code@libnl_3 3.5.0-1 - nfnl_ct_get_icmp_id@Base 3.5.0-1 - nfnl_ct_get_icmp_id@libnl_3 3.5.0-1 - nfnl_ct_get_icmp_type@Base 3.5.0-1 - nfnl_ct_get_icmp_type@libnl_3 3.5.0-1 - nfnl_ct_get_id@Base 3.5.0-1 - nfnl_ct_get_id@libnl_3 3.5.0-1 - nfnl_ct_get_mark@Base 3.5.0-1 - nfnl_ct_get_mark@libnl_3 3.5.0-1 - nfnl_ct_get_packets@Base 3.5.0-1 - nfnl_ct_get_packets@libnl_3 3.5.0-1 - nfnl_ct_get_proto@Base 3.5.0-1 - nfnl_ct_get_proto@libnl_3 3.5.0-1 - nfnl_ct_get_src@Base 3.5.0-1 - nfnl_ct_get_src@libnl_3 3.5.0-1 - nfnl_ct_get_src_port@Base 3.5.0-1 - nfnl_ct_get_src_port@libnl_3 3.5.0-1 - nfnl_ct_get_status@Base 3.5.0-1 - nfnl_ct_get_status@libnl_3 3.5.0-1 - nfnl_ct_get_tcp_state@Base 3.5.0-1 - nfnl_ct_get_tcp_state@libnl_3 3.5.0-1 - nfnl_ct_get_timeout@Base 3.5.0-1 - nfnl_ct_get_timeout@libnl_3 3.5.0-1 - nfnl_ct_get_timestamp@Base 3.5.0-1 - nfnl_ct_get_timestamp@libnl_3 3.5.0-1 - nfnl_ct_get_use@Base 3.5.0-1 - nfnl_ct_get_use@libnl_3 3.5.0-1 - nfnl_ct_get_zone@Base 3.5.0-1 - nfnl_ct_get_zone@libnl_3 3.5.0-1 - nfnl_ct_put@Base 3.5.0-1 - nfnl_ct_put@libnl_3 3.5.0-1 - nfnl_ct_query@Base 3.5.0-1 - nfnl_ct_query@libnl_3 3.5.0-1 - nfnl_ct_set_bytes@Base 3.5.0-1 - nfnl_ct_set_bytes@libnl_3 3.5.0-1 - nfnl_ct_set_dst@Base 3.5.0-1 - nfnl_ct_set_dst@libnl_3 3.5.0-1 - nfnl_ct_set_dst_port@Base 3.5.0-1 - nfnl_ct_set_dst_port@libnl_3 3.5.0-1 - nfnl_ct_set_family@Base 3.5.0-1 - nfnl_ct_set_family@libnl_3 3.5.0-1 - nfnl_ct_set_icmp_code@Base 3.5.0-1 - nfnl_ct_set_icmp_code@libnl_3 3.5.0-1 - nfnl_ct_set_icmp_id@Base 3.5.0-1 - nfnl_ct_set_icmp_id@libnl_3 3.5.0-1 - nfnl_ct_set_icmp_type@Base 3.5.0-1 - nfnl_ct_set_icmp_type@libnl_3 3.5.0-1 - nfnl_ct_set_id@Base 3.5.0-1 - nfnl_ct_set_id@libnl_3 3.5.0-1 - nfnl_ct_set_mark@Base 3.5.0-1 - nfnl_ct_set_mark@libnl_3 3.5.0-1 - nfnl_ct_set_packets@Base 3.5.0-1 - nfnl_ct_set_packets@libnl_3 3.5.0-1 - nfnl_ct_set_proto@Base 3.5.0-1 - nfnl_ct_set_proto@libnl_3 3.5.0-1 - nfnl_ct_set_src@Base 3.5.0-1 - nfnl_ct_set_src@libnl_3 3.5.0-1 - nfnl_ct_set_src_port@Base 3.5.0-1 - nfnl_ct_set_src_port@libnl_3 3.5.0-1 - nfnl_ct_set_status@Base 3.5.0-1 - nfnl_ct_set_status@libnl_3 3.5.0-1 - nfnl_ct_set_tcp_state@Base 3.5.0-1 - nfnl_ct_set_tcp_state@libnl_3 3.5.0-1 - nfnl_ct_set_timeout@Base 3.5.0-1 - nfnl_ct_set_timeout@libnl_3 3.5.0-1 - nfnl_ct_set_timestamp@Base 3.5.0-1 - nfnl_ct_set_timestamp@libnl_3 3.5.0-1 - nfnl_ct_set_use@Base 3.5.0-1 - nfnl_ct_set_use@libnl_3 3.5.0-1 - nfnl_ct_set_zone@Base 3.5.0-1 - nfnl_ct_set_zone@libnl_3 3.5.0-1 - nfnl_ct_status2str@Base 3.5.0-1 - nfnl_ct_status2str@libnl_3 3.5.0-1 - nfnl_ct_str2status@Base 3.5.0-1 - nfnl_ct_str2status@libnl_3 3.5.0-1 - nfnl_ct_str2tcp_state@Base 3.5.0-1 - nfnl_ct_str2tcp_state@libnl_3 3.5.0-1 - nfnl_ct_tcp_state2str@Base 3.5.0-1 - nfnl_ct_tcp_state2str@libnl_3 3.5.0-1 - nfnl_ct_test_bytes@Base 3.5.0-1 - nfnl_ct_test_bytes@libnl_3 3.5.0-1 - nfnl_ct_test_dst_port@Base 3.5.0-1 - nfnl_ct_test_dst_port@libnl_3 3.5.0-1 - nfnl_ct_test_icmp_code@Base 3.5.0-1 - nfnl_ct_test_icmp_code@libnl_3 3.5.0-1 - nfnl_ct_test_icmp_id@Base 3.5.0-1 - nfnl_ct_test_icmp_id@libnl_3 3.5.0-1 - nfnl_ct_test_icmp_type@Base 3.5.0-1 - nfnl_ct_test_icmp_type@libnl_3 3.5.0-1 - nfnl_ct_test_id@Base 3.5.0-1 - nfnl_ct_test_id@libnl_3 3.5.0-1 - nfnl_ct_test_mark@Base 3.5.0-1 - nfnl_ct_test_mark@libnl_3 3.5.0-1 - nfnl_ct_test_packets@Base 3.5.0-1 - nfnl_ct_test_packets@libnl_3 3.5.0-1 - nfnl_ct_test_proto@Base 3.5.0-1 - nfnl_ct_test_proto@libnl_3 3.5.0-1 - nfnl_ct_test_src_port@Base 3.5.0-1 - nfnl_ct_test_src_port@libnl_3 3.5.0-1 - nfnl_ct_test_status@Base 3.5.0-1 - nfnl_ct_test_status@libnl_3 3.5.0-1 - nfnl_ct_test_tcp_state@Base 3.5.0-1 - nfnl_ct_test_tcp_state@libnl_3 3.5.0-1 - nfnl_ct_test_timeout@Base 3.5.0-1 - nfnl_ct_test_timeout@libnl_3 3.5.0-1 - nfnl_ct_test_timestamp@Base 3.5.0-1 - nfnl_ct_test_timestamp@libnl_3 3.5.0-1 - nfnl_ct_test_use@Base 3.5.0-1 - nfnl_ct_test_use@libnl_3 3.5.0-1 - nfnl_ct_test_zone@Base 3.5.0-1 - nfnl_ct_test_zone@libnl_3 3.5.0-1 - nfnl_ct_unset_status@Base 3.5.0-1 - nfnl_ct_unset_status@libnl_3 3.5.0-1 - nfnl_exp_add@Base 3.5.0-1 - nfnl_exp_add@libnl_3 3.5.0-1 - nfnl_exp_alloc@Base 3.5.0-1 - nfnl_exp_alloc@libnl_3 3.5.0-1 - nfnl_exp_alloc_cache@Base 3.5.0-1 - nfnl_exp_alloc_cache@libnl_3 3.5.0-1 - nfnl_exp_build_add_request@Base 3.5.0-1 - nfnl_exp_build_add_request@libnl_3 3.5.0-1 - nfnl_exp_build_delete_request@Base 3.5.0-1 - nfnl_exp_build_delete_request@libnl_3 3.5.0-1 - nfnl_exp_build_query_request@Base 3.5.0-1 - nfnl_exp_build_query_request@libnl_3 3.5.0-1 - nfnl_exp_del@Base 3.5.0-1 - nfnl_exp_del@libnl_3 3.5.0-1 - nfnl_exp_dump_request@Base 3.5.0-1 - nfnl_exp_dump_request@libnl_3 3.5.0-1 - nfnl_exp_flags2str@Base 3.5.0-1 - nfnl_exp_flags2str@libnl_3 3.5.0-1 - nfnl_exp_get@Base 3.5.0-1 - nfnl_exp_get@libnl_3 3.5.0-1 - nfnl_exp_get_class@Base 3.5.0-1 - nfnl_exp_get_class@libnl_3 3.5.0-1 - nfnl_exp_get_dst@Base 3.5.0-1 - nfnl_exp_get_dst@libnl_3 3.5.0-1 - nfnl_exp_get_dst_port@Base 3.5.0-1 - nfnl_exp_get_dst_port@libnl_3 3.5.0-1 - nfnl_exp_get_family@Base 3.5.0-1 - nfnl_exp_get_family@libnl_3 3.5.0-1 - nfnl_exp_get_flags@Base 3.5.0-1 - nfnl_exp_get_flags@libnl_3 3.5.0-1 - nfnl_exp_get_fn@Base 3.5.0-1 - nfnl_exp_get_fn@libnl_3 3.5.0-1 - nfnl_exp_get_helper_name@Base 3.5.0-1 - nfnl_exp_get_helper_name@libnl_3 3.5.0-1 - nfnl_exp_get_icmp_code@Base 3.5.0-1 - nfnl_exp_get_icmp_code@libnl_3 3.5.0-1 - nfnl_exp_get_icmp_id@Base 3.5.0-1 - nfnl_exp_get_icmp_id@libnl_3 3.5.0-1 - nfnl_exp_get_icmp_type@Base 3.5.0-1 - nfnl_exp_get_icmp_type@libnl_3 3.5.0-1 - nfnl_exp_get_id@Base 3.5.0-1 - nfnl_exp_get_id@libnl_3 3.5.0-1 - nfnl_exp_get_l4protonum@Base 3.5.0-1 - nfnl_exp_get_l4protonum@libnl_3 3.5.0-1 - nfnl_exp_get_nat_dir@Base 3.5.0-1 - nfnl_exp_get_nat_dir@libnl_3 3.5.0-1 - nfnl_exp_get_src@Base 3.5.0-1 - nfnl_exp_get_src@libnl_3 3.5.0-1 - nfnl_exp_get_src_port@Base 3.5.0-1 - nfnl_exp_get_src_port@libnl_3 3.5.0-1 - nfnl_exp_get_timeout@Base 3.5.0-1 - nfnl_exp_get_timeout@libnl_3 3.5.0-1 - nfnl_exp_get_zone@Base 3.5.0-1 - nfnl_exp_get_zone@libnl_3 3.5.0-1 - nfnl_exp_put@Base 3.5.0-1 - nfnl_exp_put@libnl_3 3.5.0-1 - nfnl_exp_query@Base 3.5.0-1 - nfnl_exp_query@libnl_3 3.5.0-1 - nfnl_exp_set_class@Base 3.5.0-1 - nfnl_exp_set_class@libnl_3 3.5.0-1 - nfnl_exp_set_dst@Base 3.5.0-1 - nfnl_exp_set_dst@libnl_3 3.5.0-1 - nfnl_exp_set_family@Base 3.5.0-1 - nfnl_exp_set_family@libnl_3 3.5.0-1 - nfnl_exp_set_flags@Base 3.5.0-1 - nfnl_exp_set_flags@libnl_3 3.5.0-1 - nfnl_exp_set_fn@Base 3.5.0-1 - nfnl_exp_set_fn@libnl_3 3.5.0-1 - nfnl_exp_set_helper_name@Base 3.5.0-1 - nfnl_exp_set_helper_name@libnl_3 3.5.0-1 - nfnl_exp_set_icmp@Base 3.5.0-1 - nfnl_exp_set_icmp@libnl_3 3.5.0-1 - nfnl_exp_set_id@Base 3.5.0-1 - nfnl_exp_set_id@libnl_3 3.5.0-1 - nfnl_exp_set_l4protonum@Base 3.5.0-1 - nfnl_exp_set_l4protonum@libnl_3 3.5.0-1 - nfnl_exp_set_nat_dir@Base 3.5.0-1 - nfnl_exp_set_nat_dir@libnl_3 3.5.0-1 - nfnl_exp_set_ports@Base 3.5.0-1 - nfnl_exp_set_ports@libnl_3 3.5.0-1 - nfnl_exp_set_src@Base 3.5.0-1 - nfnl_exp_set_src@libnl_3 3.5.0-1 - nfnl_exp_set_timeout@Base 3.5.0-1 - nfnl_exp_set_timeout@libnl_3 3.5.0-1 - nfnl_exp_set_zone@Base 3.5.0-1 - nfnl_exp_set_zone@libnl_3 3.5.0-1 - nfnl_exp_str2flags@Base 3.5.0-1 - nfnl_exp_str2flags@libnl_3 3.5.0-1 - nfnl_exp_test_class@Base 3.5.0-1 - nfnl_exp_test_class@libnl_3 3.5.0-1 - nfnl_exp_test_dst@Base 3.5.0-1 - nfnl_exp_test_dst@libnl_3 3.5.0-1 - nfnl_exp_test_flags@Base 3.5.0-1 - nfnl_exp_test_flags@libnl_3 3.5.0-1 - nfnl_exp_test_fn@Base 3.5.0-1 - nfnl_exp_test_fn@libnl_3 3.5.0-1 - nfnl_exp_test_helper_name@Base 3.5.0-1 - nfnl_exp_test_helper_name@libnl_3 3.5.0-1 - nfnl_exp_test_icmp@Base 3.5.0-1 - nfnl_exp_test_icmp@libnl_3 3.5.0-1 - nfnl_exp_test_id@Base 3.5.0-1 - nfnl_exp_test_id@libnl_3 3.5.0-1 - nfnl_exp_test_l4protonum@Base 3.5.0-1 - nfnl_exp_test_l4protonum@libnl_3 3.5.0-1 - nfnl_exp_test_nat_dir@Base 3.5.0-1 - nfnl_exp_test_nat_dir@libnl_3 3.5.0-1 - nfnl_exp_test_ports@Base 3.5.0-1 - nfnl_exp_test_ports@libnl_3 3.5.0-1 - nfnl_exp_test_src@Base 3.5.0-1 - nfnl_exp_test_src@libnl_3 3.5.0-1 - nfnl_exp_test_timeout@Base 3.5.0-1 - nfnl_exp_test_timeout@libnl_3 3.5.0-1 - nfnl_exp_test_zone@Base 3.5.0-1 - nfnl_exp_test_zone@libnl_3 3.5.0-1 - nfnl_exp_unset_flags@Base 3.5.0-1 - nfnl_exp_unset_flags@libnl_3 3.5.0-1 - nfnl_inet_hook2str@Base 3.5.0-1 - nfnl_inet_hook2str@libnl_3 3.5.0-1 - nfnl_log_alloc@Base 3.5.0-1 - nfnl_log_alloc@libnl_3 3.5.0-1 - nfnl_log_build_change_request@Base 3.5.0-1 - nfnl_log_build_change_request@libnl_3 3.5.0-1 - nfnl_log_build_create_request@Base 3.5.0-1 - nfnl_log_build_create_request@libnl_3 3.5.0-1 - nfnl_log_build_delete_request@Base 3.5.0-1 - nfnl_log_build_delete_request@libnl_3 3.5.0-1 - nfnl_log_build_pf_bind@Base 3.5.0-1 - nfnl_log_build_pf_bind@libnl_3 3.5.0-1 - nfnl_log_build_pf_unbind@Base 3.5.0-1 - nfnl_log_build_pf_unbind@libnl_3 3.5.0-1 - nfnl_log_change@Base 3.5.0-1 - nfnl_log_change@libnl_3 3.5.0-1 - nfnl_log_copy_mode2str@Base 3.5.0-1 - nfnl_log_copy_mode2str@libnl_3 3.5.0-1 - nfnl_log_create@Base 3.5.0-1 - nfnl_log_create@libnl_3 3.5.0-1 - nfnl_log_delete@Base 3.5.0-1 - nfnl_log_delete@libnl_3 3.5.0-1 - nfnl_log_flags2str@Base 3.5.0-1 - nfnl_log_flags2str@libnl_3 3.5.0-1 - nfnl_log_get@Base 3.5.0-1 - nfnl_log_get@libnl_3 3.5.0-1 - nfnl_log_get_alloc_size@Base 3.5.0-1 - nfnl_log_get_alloc_size@libnl_3 3.5.0-1 - nfnl_log_get_copy_mode@Base 3.5.0-1 - nfnl_log_get_copy_mode@libnl_3 3.5.0-1 - nfnl_log_get_copy_range@Base 3.5.0-1 - nfnl_log_get_copy_range@libnl_3 3.5.0-1 - nfnl_log_get_flush_timeout@Base 3.5.0-1 - nfnl_log_get_flush_timeout@libnl_3 3.5.0-1 - nfnl_log_get_group@Base 3.5.0-1 - nfnl_log_get_group@libnl_3 3.5.0-1 - nfnl_log_get_queue_threshold@Base 3.5.0-1 - nfnl_log_get_queue_threshold@libnl_3 3.5.0-1 - nfnl_log_msg_alloc@Base 3.5.0-1 - nfnl_log_msg_alloc@libnl_3 3.5.0-1 - nfnl_log_msg_get@Base 3.5.0-1 - nfnl_log_msg_get@libnl_3 3.5.0-1 - nfnl_log_msg_get_family@Base 3.5.0-1 - nfnl_log_msg_get_family@libnl_3 3.5.0-1 - nfnl_log_msg_get_gid@Base 3.5.0-1 - nfnl_log_msg_get_gid@libnl_3 3.5.0-1 - nfnl_log_msg_get_hook@Base 3.5.0-1 - nfnl_log_msg_get_hook@libnl_3 3.5.0-1 - nfnl_log_msg_get_hwaddr@Base 3.5.0-1 - nfnl_log_msg_get_hwaddr@libnl_3 3.5.0-1 - nfnl_log_msg_get_hwproto@Base 3.5.0-1 - nfnl_log_msg_get_hwproto@libnl_3 3.5.0-1 - nfnl_log_msg_get_indev@Base 3.5.0-1 - nfnl_log_msg_get_indev@libnl_3 3.5.0-1 - nfnl_log_msg_get_mark@Base 3.5.0-1 - nfnl_log_msg_get_mark@libnl_3 3.5.0-1 - nfnl_log_msg_get_outdev@Base 3.5.0-1 - nfnl_log_msg_get_outdev@libnl_3 3.5.0-1 - nfnl_log_msg_get_payload@Base 3.5.0-1 - nfnl_log_msg_get_payload@libnl_3 3.5.0-1 - nfnl_log_msg_get_physindev@Base 3.5.0-1 - nfnl_log_msg_get_physindev@libnl_3 3.5.0-1 - nfnl_log_msg_get_physoutdev@Base 3.5.0-1 - nfnl_log_msg_get_physoutdev@libnl_3 3.5.0-1 - nfnl_log_msg_get_prefix@Base 3.5.0-1 - nfnl_log_msg_get_prefix@libnl_3 3.5.0-1 - nfnl_log_msg_get_seq@Base 3.5.0-1 - nfnl_log_msg_get_seq@libnl_3 3.5.0-1 - nfnl_log_msg_get_seq_global@Base 3.5.0-1 - nfnl_log_msg_get_seq_global@libnl_3 3.5.0-1 - nfnl_log_msg_get_timestamp@Base 3.5.0-1 - nfnl_log_msg_get_timestamp@libnl_3 3.5.0-1 - nfnl_log_msg_get_uid@Base 3.5.0-1 - nfnl_log_msg_get_uid@libnl_3 3.5.0-1 - nfnl_log_msg_put@Base 3.5.0-1 - nfnl_log_msg_put@libnl_3 3.5.0-1 - nfnl_log_msg_set_family@Base 3.5.0-1 - nfnl_log_msg_set_family@libnl_3 3.5.0-1 - nfnl_log_msg_set_gid@Base 3.5.0-1 - nfnl_log_msg_set_gid@libnl_3 3.5.0-1 - nfnl_log_msg_set_hook@Base 3.5.0-1 - nfnl_log_msg_set_hook@libnl_3 3.5.0-1 - nfnl_log_msg_set_hwaddr@Base 3.5.0-1 - nfnl_log_msg_set_hwaddr@libnl_3 3.5.0-1 - nfnl_log_msg_set_hwproto@Base 3.5.0-1 - nfnl_log_msg_set_hwproto@libnl_3 3.5.0-1 - nfnl_log_msg_set_indev@Base 3.5.0-1 - nfnl_log_msg_set_indev@libnl_3 3.5.0-1 - nfnl_log_msg_set_mark@Base 3.5.0-1 - nfnl_log_msg_set_mark@libnl_3 3.5.0-1 - nfnl_log_msg_set_outdev@Base 3.5.0-1 - nfnl_log_msg_set_outdev@libnl_3 3.5.0-1 - nfnl_log_msg_set_payload@Base 3.5.0-1 - nfnl_log_msg_set_payload@libnl_3 3.5.0-1 - nfnl_log_msg_set_physindev@Base 3.5.0-1 - nfnl_log_msg_set_physindev@libnl_3 3.5.0-1 - nfnl_log_msg_set_physoutdev@Base 3.5.0-1 - nfnl_log_msg_set_physoutdev@libnl_3 3.5.0-1 - nfnl_log_msg_set_prefix@Base 3.5.0-1 - nfnl_log_msg_set_prefix@libnl_3 3.5.0-1 - nfnl_log_msg_set_seq@Base 3.5.0-1 - nfnl_log_msg_set_seq@libnl_3 3.5.0-1 - nfnl_log_msg_set_seq_global@Base 3.5.0-1 - nfnl_log_msg_set_seq_global@libnl_3 3.5.0-1 - nfnl_log_msg_set_timestamp@Base 3.5.0-1 - nfnl_log_msg_set_timestamp@libnl_3 3.5.0-1 - nfnl_log_msg_set_uid@Base 3.5.0-1 - nfnl_log_msg_set_uid@libnl_3 3.5.0-1 - nfnl_log_msg_test_gid@Base 3.5.0-1 - nfnl_log_msg_test_gid@libnl_3 3.5.0-1 - nfnl_log_msg_test_hook@Base 3.5.0-1 - nfnl_log_msg_test_hook@libnl_3 3.5.0-1 - nfnl_log_msg_test_hwproto@Base 3.5.0-1 - nfnl_log_msg_test_hwproto@libnl_3 3.5.0-1 - nfnl_log_msg_test_mark@Base 3.5.0-1 - nfnl_log_msg_test_mark@libnl_3 3.5.0-1 - nfnl_log_msg_test_seq@Base 3.5.0-1 - nfnl_log_msg_test_seq@libnl_3 3.5.0-1 - nfnl_log_msg_test_seq_global@Base 3.5.0-1 - nfnl_log_msg_test_seq_global@libnl_3 3.5.0-1 - nfnl_log_msg_test_uid@Base 3.5.0-1 - nfnl_log_msg_test_uid@libnl_3 3.5.0-1 - nfnl_log_pf_bind@Base 3.5.0-1 - nfnl_log_pf_bind@libnl_3 3.5.0-1 - nfnl_log_pf_unbind@Base 3.5.0-1 - nfnl_log_pf_unbind@libnl_3 3.5.0-1 - nfnl_log_put@Base 3.5.0-1 - nfnl_log_put@libnl_3 3.5.0-1 - nfnl_log_set_alloc_size@Base 3.5.0-1 - nfnl_log_set_alloc_size@libnl_3 3.5.0-1 - nfnl_log_set_copy_mode@Base 3.5.0-1 - nfnl_log_set_copy_mode@libnl_3 3.5.0-1 - nfnl_log_set_copy_range@Base 3.5.0-1 - nfnl_log_set_copy_range@libnl_3 3.5.0-1 - nfnl_log_set_flags@Base 3.5.0-1 - nfnl_log_set_flags@libnl_3 3.5.0-1 - nfnl_log_set_flush_timeout@Base 3.5.0-1 - nfnl_log_set_flush_timeout@libnl_3 3.5.0-1 - nfnl_log_set_group@Base 3.5.0-1 - nfnl_log_set_group@libnl_3 3.5.0-1 - nfnl_log_set_queue_threshold@Base 3.5.0-1 - nfnl_log_set_queue_threshold@libnl_3 3.5.0-1 - nfnl_log_str2copy_mode@Base 3.5.0-1 - nfnl_log_str2copy_mode@libnl_3 3.5.0-1 - nfnl_log_str2flags@Base 3.5.0-1 - nfnl_log_str2flags@libnl_3 3.5.0-1 - nfnl_log_test_alloc_size@Base 3.5.0-1 - nfnl_log_test_alloc_size@libnl_3 3.5.0-1 - nfnl_log_test_copy_mode@Base 3.5.0-1 - nfnl_log_test_copy_mode@libnl_3 3.5.0-1 - nfnl_log_test_copy_range@Base 3.5.0-1 - nfnl_log_test_copy_range@libnl_3 3.5.0-1 - nfnl_log_test_flush_timeout@Base 3.5.0-1 - nfnl_log_test_flush_timeout@libnl_3 3.5.0-1 - nfnl_log_test_group@Base 3.5.0-1 - nfnl_log_test_group@libnl_3 3.5.0-1 - nfnl_log_test_queue_threshold@Base 3.5.0-1 - nfnl_log_test_queue_threshold@libnl_3 3.5.0-1 - nfnl_log_unset_flags@Base 3.5.0-1 - nfnl_log_unset_flags@libnl_3 3.5.0-1 - nfnl_queue_alloc@Base 3.5.0-1 - nfnl_queue_alloc@libnl_3 3.5.0-1 - nfnl_queue_build_change_request@Base 3.5.0-1 - nfnl_queue_build_change_request@libnl_3 3.5.0-1 - nfnl_queue_build_create_request@Base 3.5.0-1 - nfnl_queue_build_create_request@libnl_3 3.5.0-1 - nfnl_queue_build_delete_request@Base 3.5.0-1 - nfnl_queue_build_delete_request@libnl_3 3.5.0-1 - nfnl_queue_build_pf_bind@Base 3.5.0-1 - nfnl_queue_build_pf_bind@libnl_3 3.5.0-1 - nfnl_queue_build_pf_unbind@Base 3.5.0-1 - nfnl_queue_build_pf_unbind@libnl_3 3.5.0-1 - nfnl_queue_change@Base 3.5.0-1 - nfnl_queue_change@libnl_3 3.5.0-1 - nfnl_queue_copy_mode2str@Base 3.5.0-1 - nfnl_queue_copy_mode2str@libnl_3 3.5.0-1 - nfnl_queue_create@Base 3.5.0-1 - nfnl_queue_create@libnl_3 3.5.0-1 - nfnl_queue_delete@Base 3.5.0-1 - nfnl_queue_delete@libnl_3 3.5.0-1 - nfnl_queue_get@Base 3.5.0-1 - nfnl_queue_get@libnl_3 3.5.0-1 - nfnl_queue_get_copy_mode@Base 3.5.0-1 - nfnl_queue_get_copy_mode@libnl_3 3.5.0-1 - nfnl_queue_get_copy_range@Base 3.5.0-1 - nfnl_queue_get_copy_range@libnl_3 3.5.0-1 - nfnl_queue_get_group@Base 3.5.0-1 - nfnl_queue_get_group@libnl_3 3.5.0-1 - nfnl_queue_get_maxlen@Base 3.5.0-1 - nfnl_queue_get_maxlen@libnl_3 3.5.0-1 - nfnl_queue_msg_alloc@Base 3.5.0-1 - nfnl_queue_msg_alloc@libnl_3 3.5.0-1 - nfnl_queue_msg_build_verdict@Base 3.5.0-1 - nfnl_queue_msg_build_verdict@libnl_3 3.5.0-1 - nfnl_queue_msg_build_verdict_batch@Base 3.5.0-1 - nfnl_queue_msg_build_verdict_batch@libnl_3 3.5.0-1 - nfnl_queue_msg_get@Base 3.5.0-1 - nfnl_queue_msg_get@libnl_3 3.5.0-1 - nfnl_queue_msg_get_family@Base 3.5.0-1 - nfnl_queue_msg_get_family@libnl_3 3.5.0-1 - nfnl_queue_msg_get_group@Base 3.5.0-1 - nfnl_queue_msg_get_group@libnl_3 3.5.0-1 - nfnl_queue_msg_get_hook@Base 3.5.0-1 - nfnl_queue_msg_get_hook@libnl_3 3.5.0-1 - nfnl_queue_msg_get_hwaddr@Base 3.5.0-1 - nfnl_queue_msg_get_hwaddr@libnl_3 3.5.0-1 - nfnl_queue_msg_get_hwproto@Base 3.5.0-1 - nfnl_queue_msg_get_hwproto@libnl_3 3.5.0-1 - nfnl_queue_msg_get_indev@Base 3.5.0-1 - nfnl_queue_msg_get_indev@libnl_3 3.5.0-1 - nfnl_queue_msg_get_mark@Base 3.5.0-1 - nfnl_queue_msg_get_mark@libnl_3 3.5.0-1 - nfnl_queue_msg_get_outdev@Base 3.5.0-1 - nfnl_queue_msg_get_outdev@libnl_3 3.5.0-1 - nfnl_queue_msg_get_packetid@Base 3.5.0-1 - nfnl_queue_msg_get_packetid@libnl_3 3.5.0-1 - nfnl_queue_msg_get_payload@Base 3.5.0-1 - nfnl_queue_msg_get_payload@libnl_3 3.5.0-1 - nfnl_queue_msg_get_physindev@Base 3.5.0-1 - nfnl_queue_msg_get_physindev@libnl_3 3.5.0-1 - nfnl_queue_msg_get_physoutdev@Base 3.5.0-1 - nfnl_queue_msg_get_physoutdev@libnl_3 3.5.0-1 - nfnl_queue_msg_get_timestamp@Base 3.5.0-1 - nfnl_queue_msg_get_timestamp@libnl_3 3.5.0-1 - nfnl_queue_msg_get_verdict@Base 3.5.0-1 - nfnl_queue_msg_get_verdict@libnl_3 3.5.0-1 - nfnl_queue_msg_put@Base 3.5.0-1 - nfnl_queue_msg_put@libnl_3 3.5.0-1 - nfnl_queue_msg_send_verdict@Base 3.5.0-1 - nfnl_queue_msg_send_verdict@libnl_3 3.5.0-1 - nfnl_queue_msg_send_verdict_batch@Base 3.5.0-1 - nfnl_queue_msg_send_verdict_batch@libnl_3 3.5.0-1 - nfnl_queue_msg_send_verdict_payload@Base 3.5.0-1 - nfnl_queue_msg_send_verdict_payload@libnl_3 3.5.0-1 - nfnl_queue_msg_set_family@Base 3.5.0-1 - nfnl_queue_msg_set_family@libnl_3 3.5.0-1 - nfnl_queue_msg_set_group@Base 3.5.0-1 - nfnl_queue_msg_set_group@libnl_3 3.5.0-1 - nfnl_queue_msg_set_hook@Base 3.5.0-1 - nfnl_queue_msg_set_hook@libnl_3 3.5.0-1 - nfnl_queue_msg_set_hwaddr@Base 3.5.0-1 - nfnl_queue_msg_set_hwaddr@libnl_3 3.5.0-1 - nfnl_queue_msg_set_hwproto@Base 3.5.0-1 - nfnl_queue_msg_set_hwproto@libnl_3 3.5.0-1 - nfnl_queue_msg_set_indev@Base 3.5.0-1 - nfnl_queue_msg_set_indev@libnl_3 3.5.0-1 - nfnl_queue_msg_set_mark@Base 3.5.0-1 - nfnl_queue_msg_set_mark@libnl_3 3.5.0-1 - nfnl_queue_msg_set_outdev@Base 3.5.0-1 - nfnl_queue_msg_set_outdev@libnl_3 3.5.0-1 - nfnl_queue_msg_set_packetid@Base 3.5.0-1 - nfnl_queue_msg_set_packetid@libnl_3 3.5.0-1 - nfnl_queue_msg_set_payload@Base 3.5.0-1 - nfnl_queue_msg_set_payload@libnl_3 3.5.0-1 - nfnl_queue_msg_set_physindev@Base 3.5.0-1 - nfnl_queue_msg_set_physindev@libnl_3 3.5.0-1 - nfnl_queue_msg_set_physoutdev@Base 3.5.0-1 - nfnl_queue_msg_set_physoutdev@libnl_3 3.5.0-1 - nfnl_queue_msg_set_timestamp@Base 3.5.0-1 - nfnl_queue_msg_set_timestamp@libnl_3 3.5.0-1 - nfnl_queue_msg_set_verdict@Base 3.5.0-1 - nfnl_queue_msg_set_verdict@libnl_3 3.5.0-1 - nfnl_queue_msg_test_family@Base 3.5.0-1 - nfnl_queue_msg_test_family@libnl_3 3.5.0-1 - nfnl_queue_msg_test_group@Base 3.5.0-1 - nfnl_queue_msg_test_group@libnl_3 3.5.0-1 - nfnl_queue_msg_test_hook@Base 3.5.0-1 - nfnl_queue_msg_test_hook@libnl_3 3.5.0-1 - nfnl_queue_msg_test_hwaddr@Base 3.5.0-1 - nfnl_queue_msg_test_hwaddr@libnl_3 3.5.0-1 - nfnl_queue_msg_test_hwproto@Base 3.5.0-1 - nfnl_queue_msg_test_hwproto@libnl_3 3.5.0-1 - nfnl_queue_msg_test_indev@Base 3.5.0-1 - nfnl_queue_msg_test_indev@libnl_3 3.5.0-1 - nfnl_queue_msg_test_mark@Base 3.5.0-1 - nfnl_queue_msg_test_mark@libnl_3 3.5.0-1 - nfnl_queue_msg_test_outdev@Base 3.5.0-1 - nfnl_queue_msg_test_outdev@libnl_3 3.5.0-1 - nfnl_queue_msg_test_packetid@Base 3.5.0-1 - nfnl_queue_msg_test_packetid@libnl_3 3.5.0-1 - nfnl_queue_msg_test_payload@Base 3.5.0-1 - nfnl_queue_msg_test_payload@libnl_3 3.5.0-1 - nfnl_queue_msg_test_physindev@Base 3.5.0-1 - nfnl_queue_msg_test_physindev@libnl_3 3.5.0-1 - nfnl_queue_msg_test_physoutdev@Base 3.5.0-1 - nfnl_queue_msg_test_physoutdev@libnl_3 3.5.0-1 - nfnl_queue_msg_test_timestamp@Base 3.5.0-1 - nfnl_queue_msg_test_timestamp@libnl_3 3.5.0-1 - nfnl_queue_msg_test_verdict@Base 3.5.0-1 - nfnl_queue_msg_test_verdict@libnl_3 3.5.0-1 - nfnl_queue_pf_bind@Base 3.5.0-1 - nfnl_queue_pf_bind@libnl_3 3.5.0-1 - nfnl_queue_pf_unbind@Base 3.5.0-1 - nfnl_queue_pf_unbind@libnl_3 3.5.0-1 - nfnl_queue_put@Base 3.5.0-1 - nfnl_queue_put@libnl_3 3.5.0-1 - nfnl_queue_set_copy_mode@Base 3.5.0-1 - nfnl_queue_set_copy_mode@libnl_3 3.5.0-1 - nfnl_queue_set_copy_range@Base 3.5.0-1 - nfnl_queue_set_copy_range@libnl_3 3.5.0-1 - nfnl_queue_set_group@Base 3.5.0-1 - nfnl_queue_set_group@libnl_3 3.5.0-1 - nfnl_queue_set_maxlen@Base 3.5.0-1 - nfnl_queue_set_maxlen@libnl_3 3.5.0-1 - nfnl_queue_socket_alloc@Base 3.5.0-1 - nfnl_queue_socket_alloc@libnl_3 3.5.0-1 - nfnl_queue_str2copy_mode@Base 3.5.0-1 - nfnl_queue_str2copy_mode@libnl_3 3.5.0-1 - nfnl_queue_test_copy_mode@Base 3.5.0-1 - nfnl_queue_test_copy_mode@libnl_3 3.5.0-1 - nfnl_queue_test_copy_range@Base 3.5.0-1 - nfnl_queue_test_copy_range@libnl_3 3.5.0-1 - nfnl_queue_test_group@Base 3.5.0-1 - nfnl_queue_test_group@libnl_3 3.5.0-1 - nfnl_queue_test_maxlen@Base 3.5.0-1 - nfnl_queue_test_maxlen@libnl_3 3.5.0-1 - nfnl_send_simple@Base 3.5.0-1 - nfnl_send_simple@libnl_3 3.5.0-1 - nfnl_str2inet_hook@Base 3.5.0-1 - nfnl_str2inet_hook@libnl_3 3.5.0-1 - nfnl_str2verdict@Base 3.5.0-1 - nfnl_str2verdict@libnl_3 3.5.0-1 - nfnl_verdict2str@Base 3.5.0-1 - nfnl_verdict2str@libnl_3 3.5.0-1 - nfnlmsg_alloc_simple@Base 3.5.0-1 - nfnlmsg_alloc_simple@libnl_3 3.5.0-1 - nfnlmsg_ct_group@Base 3.5.0-1 - nfnlmsg_ct_group@libnl_3 3.5.0-1 - nfnlmsg_ct_parse@Base 3.5.0-1 - nfnlmsg_ct_parse@libnl_3 3.5.0-1 - nfnlmsg_exp_group@Base 3.5.0-1 - nfnlmsg_exp_group@libnl_3 3.5.0-1 - nfnlmsg_exp_parse@Base 3.5.0-1 - nfnlmsg_exp_parse@libnl_3 3.5.0-1 - nfnlmsg_family@Base 3.5.0-1 - nfnlmsg_family@libnl_3 3.5.0-1 - nfnlmsg_log_msg_parse@Base 3.5.0-1 - nfnlmsg_log_msg_parse@libnl_3 3.5.0-1 - nfnlmsg_put@Base 3.5.0-1 - nfnlmsg_put@libnl_3 3.5.0-1 - nfnlmsg_queue_msg_parse@Base 3.5.0-1 - nfnlmsg_queue_msg_parse@libnl_3 3.5.0-1 - nfnlmsg_res_id@Base 3.5.0-1 - nfnlmsg_res_id@libnl_3 3.5.0-1 - nfnlmsg_subsys@Base 3.5.0-1 - nfnlmsg_subsys@libnl_3 3.5.0-1 - nfnlmsg_subtype@Base 3.5.0-1 - nfnlmsg_subtype@libnl_3 3.5.0-1 - queue_msg_obj_ops@Base 3.5.0-1 - queue_msg_obj_ops@libnl_3 3.5.0-1 - queue_obj_ops@Base 3.5.0-1 - queue_obj_ops@libnl_3 3.5.0-1 diff --git a/src/libnl3/debian/libnl-nf-3-dev.install b/src/libnl3/debian/libnl-nf-3-dev.install deleted file mode 100644 index d1307c751b8..00000000000 --- a/src/libnl3/debian/libnl-nf-3-dev.install +++ /dev/null @@ -1,3 +0,0 @@ -debian/tmp/usr/lib/*/pkgconfig/libnl-nf-3* -debian/tmp/usr/lib/*/libnl-nf-3*.so -debian/tmp/usr/lib/*/libnl-nf-3*.a diff --git a/src/libnl3/debian/libnl-route-3-200.install b/src/libnl3/debian/libnl-route-3-200.install deleted file mode 100644 index 44c7ec8cdfa..00000000000 --- a/src/libnl3/debian/libnl-route-3-200.install +++ /dev/null @@ -1 +0,0 @@ -debian/tmp/usr/lib/*/libnl-route-3*.so.* diff --git a/src/libnl3/debian/libnl-route-3-200.symbols b/src/libnl3/debian/libnl-route-3-200.symbols deleted file mode 100644 index e11157ba4e8..00000000000 --- a/src/libnl3/debian/libnl-route-3-200.symbols +++ /dev/null @@ -1,2051 +0,0 @@ -libnl-route-3.so.200 libnl-route-3-200 #MINVER# - ematch__create_buffer@Base 3.5.0-1 - ematch__delete_buffer@Base 3.5.0-1 - ematch__flush_buffer@Base 3.5.0-1 - ematch__scan_buffer@Base 3.5.0-1 - ematch__scan_bytes@Base 3.5.0-1 - ematch__scan_string@Base 3.5.0-1 - ematch__switch_to_buffer@Base 3.5.0-1 - ematch_alloc@Base 3.5.0-1 - ematch_free@Base 3.5.0-1 - ematch_get_column@Base 3.5.0-1 - ematch_get_debug@Base 3.5.0-1 - ematch_get_extra@Base 3.5.0-1 - ematch_get_in@Base 3.5.0-1 - ematch_get_leng@Base 3.5.0-1 - ematch_get_lineno@Base 3.5.0-1 - ematch_get_lval@Base 3.5.0-1 - ematch_get_out@Base 3.5.0-1 - ematch_get_text@Base 3.5.0-1 - ematch_lex@Base 3.5.0-1 - ematch_lex_destroy@Base 3.5.0-1 - ematch_lex_init@Base 3.5.0-1 - ematch_lex_init_extra@Base 3.5.0-1 - ematch_parse@Base 3.5.0-1 - ematch_pop_buffer_state@Base 3.5.0-1 - ematch_push_buffer_state@Base 3.5.0-1 - ematch_realloc@Base 3.5.0-1 - ematch_restart@Base 3.5.0-1 - ematch_set_column@Base 3.5.0-1 - ematch_set_debug@Base 3.5.0-1 - ematch_set_extra@Base 3.5.0-1 - ematch_set_in@Base 3.5.0-1 - ematch_set_lineno@Base 3.5.0-1 - ematch_set_lval@Base 3.5.0-1 - ematch_set_out@Base 3.5.0-1 - flnl_lookup@Base 3.5.0-1 - flnl_lookup@libnl_3 3.5.0-1 - flnl_lookup_build_request@Base 3.5.0-1 - flnl_lookup_build_request@libnl_3 3.5.0-1 - flnl_request_alloc@Base 3.5.0-1 - flnl_request_alloc@libnl_3 3.5.0-1 - flnl_request_get_addr@Base 3.5.0-1 - flnl_request_get_addr@libnl_3 3.5.0-1 - flnl_request_get_fwmark@Base 3.5.0-1 - flnl_request_get_fwmark@libnl_3 3.5.0-1 - flnl_request_get_scope@Base 3.5.0-1 - flnl_request_get_scope@libnl_3 3.5.0-1 - flnl_request_get_table@Base 3.5.0-1 - flnl_request_get_table@libnl_3 3.5.0-1 - flnl_request_get_tos@Base 3.5.0-1 - flnl_request_get_tos@libnl_3 3.5.0-1 - flnl_request_set_addr@Base 3.5.0-1 - flnl_request_set_addr@libnl_3 3.5.0-1 - flnl_request_set_fwmark@Base 3.5.0-1 - flnl_request_set_fwmark@libnl_3 3.5.0-1 - flnl_request_set_scope@Base 3.5.0-1 - flnl_request_set_scope@libnl_3 3.5.0-1 - flnl_request_set_table@Base 3.5.0-1 - flnl_request_set_table@libnl_3 3.5.0-1 - flnl_request_set_tos@Base 3.5.0-1 - flnl_request_set_tos@libnl_3 3.5.0-1 - flnl_result_alloc@Base 3.5.0-1 - flnl_result_alloc@libnl_3 3.5.0-1 - flnl_result_alloc_cache@Base 3.5.0-1 - flnl_result_alloc_cache@libnl_3 3.5.0-1 - flnl_result_get_error@Base 3.5.0-1 - flnl_result_get_error@libnl_3 3.5.0-1 - flnl_result_get_nexthop_sel@Base 3.5.0-1 - flnl_result_get_nexthop_sel@libnl_3 3.5.0-1 - flnl_result_get_prefixlen@Base 3.5.0-1 - flnl_result_get_prefixlen@libnl_3 3.5.0-1 - flnl_result_get_scope@Base 3.5.0-1 - flnl_result_get_scope@libnl_3 3.5.0-1 - flnl_result_get_table_id@Base 3.5.0-1 - flnl_result_get_table_id@libnl_3 3.5.0-1 - flnl_result_get_type@Base 3.5.0-1 - flnl_result_get_type@libnl_3 3.5.0-1 - flnl_result_put@Base 3.5.0-1 - flnl_result_put@libnl_3 3.5.0-1 - libnl_3@libnl_3 3.5.0-1 - libnl_3_2_26@libnl_3_2_26 3.5.0-1 - libnl_3_2_27@libnl_3_2_27 3.5.0-1 - libnl_3_2_28@libnl_3_2_28 3.5.0-1 - libnl_3_2_29@libnl_3_2_29 3.5.0-1 - libnl_3_4@libnl_3_4 3.5.0-1 - libnl_3_5@libnl_3_5 3.5.0-1 - nl_ovl_strategy2str@Base 3.5.0-1 - nl_ovl_strategy2str@libnl_3 3.5.0-1 - nl_police2str@Base 3.5.0-1 - nl_police2str@libnl_3 3.5.0-1 - nl_rtgen_request@Base 3.5.0-1 - nl_rtgen_request@libnl_3 3.5.0-1 - nl_rtntype2str@Base 3.5.0-1 - nl_rtntype2str@libnl_3 3.5.0-1 - nl_str2ovl_strategy@Base 3.5.0-1 - nl_str2ovl_strategy@libnl_3 3.5.0-1 - nl_str2police@Base 3.5.0-1 - nl_str2police@libnl_3 3.5.0-1 - nl_str2rtntype@Base 3.5.0-1 - nl_str2rtntype@libnl_3 3.5.0-1 - pktloc__create_buffer@Base 3.5.0-1 - pktloc__delete_buffer@Base 3.5.0-1 - pktloc__flush_buffer@Base 3.5.0-1 - pktloc__scan_buffer@Base 3.5.0-1 - pktloc__scan_bytes@Base 3.5.0-1 - pktloc__scan_string@Base 3.5.0-1 - pktloc__switch_to_buffer@Base 3.5.0-1 - pktloc_alloc@Base 3.5.0-1 - pktloc_free@Base 3.5.0-1 - pktloc_get_column@Base 3.5.0-1 - pktloc_get_debug@Base 3.5.0-1 - pktloc_get_extra@Base 3.5.0-1 - pktloc_get_in@Base 3.5.0-1 - pktloc_get_leng@Base 3.5.0-1 - pktloc_get_lineno@Base 3.5.0-1 - pktloc_get_lloc@Base 3.5.0-1 - pktloc_get_lval@Base 3.5.0-1 - pktloc_get_out@Base 3.5.0-1 - pktloc_get_text@Base 3.5.0-1 - pktloc_lex@Base 3.5.0-1 - pktloc_lex_destroy@Base 3.5.0-1 - pktloc_lex_init@Base 3.5.0-1 - pktloc_lex_init_extra@Base 3.5.0-1 - pktloc_parse@Base 3.5.0-1 - pktloc_pop_buffer_state@Base 3.5.0-1 - pktloc_push_buffer_state@Base 3.5.0-1 - pktloc_realloc@Base 3.5.0-1 - pktloc_restart@Base 3.5.0-1 - pktloc_set_column@Base 3.5.0-1 - pktloc_set_debug@Base 3.5.0-1 - pktloc_set_extra@Base 3.5.0-1 - pktloc_set_in@Base 3.5.0-1 - pktloc_set_lineno@Base 3.5.0-1 - pktloc_set_lloc@Base 3.5.0-1 - - pktloc_set_lval@Base 3.5.0-1 - pktloc_set_out@Base 3.5.0-1 - route_obj_ops@Base 3.5.0-1 - route_obj_ops@libnl_3 3.5.0-1 - rtln_link_policy@Base 3.5.0-1 - rtln_link_policy@libnl_3 3.5.0-1 - rtnl_act_add@Base 3.5.0-1 - rtnl_act_add@libnl_3 3.5.0-1 - rtnl_act_alloc@Base 3.5.0-1 - rtnl_act_alloc@libnl_3 3.5.0-1 - rtnl_act_append@Base 3.5.0-1 - rtnl_act_append@libnl_3 3.5.0-1 - rtnl_act_build_add_request@Base 3.5.0-1 - rtnl_act_build_add_request@libnl_3 3.5.0-1 - rtnl_act_build_change_request@Base 3.5.0-1 - rtnl_act_build_change_request@libnl_3 3.5.0-1 - rtnl_act_build_delete_request@Base 3.5.0-1 - rtnl_act_build_delete_request@libnl_3 3.5.0-1 - rtnl_act_change@Base 3.5.0-1 - rtnl_act_change@libnl_3 3.5.0-1 - rtnl_act_delete@Base 3.5.0-1 - rtnl_act_delete@libnl_3 3.5.0-1 - rtnl_act_fill@Base 3.5.0-1 - rtnl_act_fill@libnl_3 3.5.0-1 - rtnl_act_get@Base 3.5.0-1 - rtnl_act_get@libnl_3 3.5.0-1 - rtnl_act_next@libnl_3_4 3.5.0-1 - rtnl_act_parse@Base 3.5.0-1 - rtnl_act_parse@libnl_3 3.5.0-1 - rtnl_act_put@Base 3.5.0-1 - rtnl_act_put@libnl_3 3.5.0-1 - rtnl_act_put_all@Base 3.5.0-1 - rtnl_act_put_all@libnl_3 3.5.0-1 - rtnl_act_remove@Base 3.5.0-1 - rtnl_act_remove@libnl_3 3.5.0-1 - rtnl_addr_add@Base 3.5.0-1 - rtnl_addr_add@libnl_3 3.5.0-1 - rtnl_addr_alloc@Base 3.5.0-1 - rtnl_addr_alloc@libnl_3 3.5.0-1 - rtnl_addr_alloc_cache@Base 3.5.0-1 - rtnl_addr_alloc_cache@libnl_3 3.5.0-1 - rtnl_addr_build_add_request@Base 3.5.0-1 - rtnl_addr_build_add_request@libnl_3 3.5.0-1 - rtnl_addr_build_delete_request@Base 3.5.0-1 - rtnl_addr_build_delete_request@libnl_3 3.5.0-1 - rtnl_addr_delete@Base 3.5.0-1 - rtnl_addr_delete@libnl_3 3.5.0-1 - rtnl_addr_flags2str@Base 3.5.0-1 - rtnl_addr_flags2str@libnl_3 3.5.0-1 - rtnl_addr_get@Base 3.5.0-1 - rtnl_addr_get@libnl_3 3.5.0-1 - rtnl_addr_get_anycast@Base 3.5.0-1 - rtnl_addr_get_anycast@libnl_3 3.5.0-1 - rtnl_addr_get_broadcast@Base 3.5.0-1 - rtnl_addr_get_broadcast@libnl_3 3.5.0-1 - rtnl_addr_get_create_time@Base 3.5.0-1 - rtnl_addr_get_create_time@libnl_3 3.5.0-1 - rtnl_addr_get_family@Base 3.5.0-1 - rtnl_addr_get_family@libnl_3 3.5.0-1 - rtnl_addr_get_flags@Base 3.5.0-1 - rtnl_addr_get_flags@libnl_3 3.5.0-1 - rtnl_addr_get_ifindex@Base 3.5.0-1 - rtnl_addr_get_ifindex@libnl_3 3.5.0-1 - rtnl_addr_get_label@Base 3.5.0-1 - rtnl_addr_get_label@libnl_3 3.5.0-1 - rtnl_addr_get_last_update_time@Base 3.5.0-1 - rtnl_addr_get_last_update_time@libnl_3 3.5.0-1 - rtnl_addr_get_link@Base 3.5.0-1 - rtnl_addr_get_link@libnl_3 3.5.0-1 - rtnl_addr_get_local@Base 3.5.0-1 - rtnl_addr_get_local@libnl_3 3.5.0-1 - rtnl_addr_get_multicast@Base 3.5.0-1 - rtnl_addr_get_multicast@libnl_3 3.5.0-1 - rtnl_addr_get_peer@Base 3.5.0-1 - rtnl_addr_get_peer@libnl_3 3.5.0-1 - rtnl_addr_get_preferred_lifetime@Base 3.5.0-1 - rtnl_addr_get_preferred_lifetime@libnl_3 3.5.0-1 - rtnl_addr_get_prefixlen@Base 3.5.0-1 - rtnl_addr_get_prefixlen@libnl_3 3.5.0-1 - rtnl_addr_get_scope@Base 3.5.0-1 - rtnl_addr_get_scope@libnl_3 3.5.0-1 - rtnl_addr_get_valid_lifetime@Base 3.5.0-1 - rtnl_addr_get_valid_lifetime@libnl_3 3.5.0-1 - rtnl_addr_put@Base 3.5.0-1 - rtnl_addr_put@libnl_3 3.5.0-1 - rtnl_addr_set_anycast@Base 3.5.0-1 - rtnl_addr_set_anycast@libnl_3 3.5.0-1 - rtnl_addr_set_broadcast@Base 3.5.0-1 - rtnl_addr_set_broadcast@libnl_3 3.5.0-1 - rtnl_addr_set_family@Base 3.5.0-1 - rtnl_addr_set_family@libnl_3 3.5.0-1 - rtnl_addr_set_flags@Base 3.5.0-1 - rtnl_addr_set_flags@libnl_3 3.5.0-1 - rtnl_addr_set_ifindex@Base 3.5.0-1 - rtnl_addr_set_ifindex@libnl_3 3.5.0-1 - rtnl_addr_set_label@Base 3.5.0-1 - rtnl_addr_set_label@libnl_3 3.5.0-1 - rtnl_addr_set_link@Base 3.5.0-1 - rtnl_addr_set_link@libnl_3 3.5.0-1 - rtnl_addr_set_local@Base 3.5.0-1 - rtnl_addr_set_local@libnl_3 3.5.0-1 - rtnl_addr_set_multicast@Base 3.5.0-1 - rtnl_addr_set_multicast@libnl_3 3.5.0-1 - rtnl_addr_set_peer@Base 3.5.0-1 - rtnl_addr_set_peer@libnl_3 3.5.0-1 - rtnl_addr_set_preferred_lifetime@Base 3.5.0-1 - rtnl_addr_set_preferred_lifetime@libnl_3 3.5.0-1 - rtnl_addr_set_prefixlen@Base 3.5.0-1 - rtnl_addr_set_prefixlen@libnl_3 3.5.0-1 - rtnl_addr_set_scope@Base 3.5.0-1 - rtnl_addr_set_scope@libnl_3 3.5.0-1 - rtnl_addr_set_valid_lifetime@Base 3.5.0-1 - rtnl_addr_set_valid_lifetime@libnl_3 3.5.0-1 - rtnl_addr_str2flags@Base 3.5.0-1 - rtnl_addr_str2flags@libnl_3 3.5.0-1 - rtnl_addr_unset_flags@Base 3.5.0-1 - rtnl_addr_unset_flags@libnl_3 3.5.0-1 - rtnl_basic_add_action@Base 3.5.0-1 - rtnl_basic_add_action@libnl_3 3.5.0-1 - rtnl_basic_del_action@Base 3.5.0-1 - rtnl_basic_del_action@libnl_3 3.5.0-1 - rtnl_basic_get_action@libnl_3_4 3.5.0-1 - rtnl_basic_get_ematch@Base 3.5.0-1 - rtnl_basic_get_ematch@libnl_3 3.5.0-1 - rtnl_basic_get_target@Base 3.5.0-1 - rtnl_basic_get_target@libnl_3 3.5.0-1 - rtnl_basic_set_ematch@Base 3.5.0-1 - rtnl_basic_set_ematch@libnl_3 3.5.0-1 - rtnl_basic_set_target@Base 3.5.0-1 - rtnl_basic_set_target@libnl_3 3.5.0-1 - rtnl_cgroup_get_ematch@Base 3.5.0-1 - rtnl_cgroup_get_ematch@libnl_3 3.5.0-1 - rtnl_cgroup_set_ematch@Base 3.5.0-1 - rtnl_cgroup_set_ematch@libnl_3 3.5.0-1 - rtnl_class_add@Base 3.5.0-1 - rtnl_class_add@libnl_3 3.5.0-1 - rtnl_class_alloc@Base 3.5.0-1 - rtnl_class_alloc@libnl_3 3.5.0-1 - rtnl_class_alloc_cache@Base 3.5.0-1 - rtnl_class_alloc_cache@libnl_3 3.5.0-1 - rtnl_class_build_add_request@Base 3.5.0-1 - rtnl_class_build_add_request@libnl_3 3.5.0-1 - rtnl_class_build_delete_request@Base 3.5.0-1 - rtnl_class_build_delete_request@libnl_3 3.5.0-1 - rtnl_class_delete@Base 3.5.0-1 - rtnl_class_delete@libnl_3 3.5.0-1 - rtnl_class_dsmark_get_bitmask@Base 3.5.0-1 - rtnl_class_dsmark_get_bitmask@libnl_3 3.5.0-1 - rtnl_class_dsmark_get_value@Base 3.5.0-1 - rtnl_class_dsmark_get_value@libnl_3 3.5.0-1 - rtnl_class_dsmark_set_bitmask@Base 3.5.0-1 - rtnl_class_dsmark_set_bitmask@libnl_3 3.5.0-1 - rtnl_class_dsmark_set_value@Base 3.5.0-1 - rtnl_class_dsmark_set_value@libnl_3 3.5.0-1 - rtnl_class_foreach_child@Base 3.5.0-1 - rtnl_class_foreach_child@libnl_3 3.5.0-1 - rtnl_class_foreach_cls@Base 3.5.0-1 - rtnl_class_foreach_cls@libnl_3 3.5.0-1 - rtnl_class_get@Base 3.5.0-1 - rtnl_class_get@libnl_3 3.5.0-1 - rtnl_class_get_by_parent@libnl_3_5 3.5.0-1 - rtnl_class_hfsc_get_fsc@Base 3.5.0-1 - rtnl_class_hfsc_get_fsc@libnl_3 3.5.0-1 - rtnl_class_hfsc_get_rsc@Base 3.5.0-1 - rtnl_class_hfsc_get_rsc@libnl_3 3.5.0-1 - rtnl_class_hfsc_get_usc@Base 3.5.0-1 - rtnl_class_hfsc_get_usc@libnl_3 3.5.0-1 - rtnl_class_hfsc_set_fsc@Base 3.5.0-1 - rtnl_class_hfsc_set_fsc@libnl_3 3.5.0-1 - rtnl_class_hfsc_set_rsc@Base 3.5.0-1 - rtnl_class_hfsc_set_rsc@libnl_3 3.5.0-1 - rtnl_class_hfsc_set_usc@Base 3.5.0-1 - rtnl_class_hfsc_set_usc@libnl_3 3.5.0-1 - rtnl_class_leaf_qdisc@Base 3.5.0-1 - rtnl_class_leaf_qdisc@libnl_3 3.5.0-1 - rtnl_class_put@Base 3.5.0-1 - rtnl_class_put@libnl_3 3.5.0-1 - rtnl_classid_generate@Base 3.5.0-1 - rtnl_classid_generate@libnl_3 3.5.0-1 - rtnl_cls_add@Base 3.5.0-1 - rtnl_cls_add@libnl_3 3.5.0-1 - rtnl_cls_alloc@Base 3.5.0-1 - rtnl_cls_alloc@libnl_3 3.5.0-1 - rtnl_cls_alloc_cache@Base 3.5.0-1 - rtnl_cls_alloc_cache@libnl_3 3.5.0-1 - rtnl_cls_build_add_request@Base 3.5.0-1 - rtnl_cls_build_add_request@libnl_3 3.5.0-1 - rtnl_cls_build_change_request@Base 3.5.0-1 - rtnl_cls_build_change_request@libnl_3 3.5.0-1 - rtnl_cls_build_delete_request@Base 3.5.0-1 - rtnl_cls_build_delete_request@libnl_3 3.5.0-1 - rtnl_cls_cache_set_tc_params@libnl_3_5 3.5.0-1 - rtnl_cls_change@Base 3.5.0-1 - rtnl_cls_change@libnl_3 3.5.0-1 - rtnl_cls_delete@Base 3.5.0-1 - rtnl_cls_delete@libnl_3 3.5.0-1 - rtnl_cls_get_prio@Base 3.5.0-1 - rtnl_cls_get_prio@libnl_3 3.5.0-1 - rtnl_cls_get_protocol@Base 3.5.0-1 - rtnl_cls_get_protocol@libnl_3 3.5.0-1 - rtnl_cls_put@Base 3.5.0-1 - rtnl_cls_put@libnl_3 3.5.0-1 - rtnl_cls_set_prio@Base 3.5.0-1 - rtnl_cls_set_prio@libnl_3 3.5.0-1 - rtnl_cls_set_protocol@Base 3.5.0-1 - rtnl_cls_set_protocol@libnl_3 3.5.0-1 - rtnl_ematch_add_child@Base 3.5.0-1 - rtnl_ematch_add_child@libnl_3 3.5.0-1 - rtnl_ematch_alloc@Base 3.5.0-1 - rtnl_ematch_alloc@libnl_3 3.5.0-1 - rtnl_ematch_cmp_get@Base 3.5.0-1 - rtnl_ematch_cmp_get@libnl_3 3.5.0-1 - rtnl_ematch_cmp_set@Base 3.5.0-1 - rtnl_ematch_cmp_set@libnl_3 3.5.0-1 - rtnl_ematch_data@Base 3.5.0-1 - rtnl_ematch_data@libnl_3 3.5.0-1 - rtnl_ematch_fill_attr@Base 3.5.0-1 - rtnl_ematch_fill_attr@libnl_3 3.5.0-1 - rtnl_ematch_free@Base 3.5.0-1 - rtnl_ematch_free@libnl_3 3.5.0-1 - rtnl_ematch_get_flags@Base 3.5.0-1 - rtnl_ematch_get_flags@libnl_3 3.5.0-1 - rtnl_ematch_lookup_ops@Base 3.5.0-1 - rtnl_ematch_lookup_ops@libnl_3 3.5.0-1 - rtnl_ematch_lookup_ops_by_name@Base 3.5.0-1 - rtnl_ematch_lookup_ops_by_name@libnl_3 3.5.0-1 - rtnl_ematch_meta_set_lvalue@Base 3.5.0-1 - rtnl_ematch_meta_set_lvalue@libnl_3 3.5.0-1 - rtnl_ematch_meta_set_operand@Base 3.5.0-1 - rtnl_ematch_meta_set_operand@libnl_3 3.5.0-1 - rtnl_ematch_meta_set_rvalue@Base 3.5.0-1 - rtnl_ematch_meta_set_rvalue@libnl_3 3.5.0-1 - rtnl_ematch_nbyte_get_layer@Base 3.5.0-1 - rtnl_ematch_nbyte_get_layer@libnl_3 3.5.0-1 - rtnl_ematch_nbyte_get_len@Base 3.5.0-1 - rtnl_ematch_nbyte_get_len@libnl_3 3.5.0-1 - rtnl_ematch_nbyte_get_offset@Base 3.5.0-1 - rtnl_ematch_nbyte_get_offset@libnl_3 3.5.0-1 - rtnl_ematch_nbyte_get_pattern@Base 3.5.0-1 - rtnl_ematch_nbyte_get_pattern@libnl_3 3.5.0-1 - rtnl_ematch_nbyte_set_offset@Base 3.5.0-1 - rtnl_ematch_nbyte_set_offset@libnl_3 3.5.0-1 - rtnl_ematch_nbyte_set_pattern@Base 3.5.0-1 - rtnl_ematch_nbyte_set_pattern@libnl_3 3.5.0-1 - rtnl_ematch_offset2txt@Base 3.5.0-1 - rtnl_ematch_offset2txt@libnl_3 3.5.0-1 - rtnl_ematch_opnd2txt@Base 3.5.0-1 - rtnl_ematch_opnd2txt@libnl_3 3.5.0-1 - rtnl_ematch_parse_attr@Base 3.5.0-1 - rtnl_ematch_parse_attr@libnl_3 3.5.0-1 - rtnl_ematch_parse_expr@Base 3.5.0-1 - rtnl_ematch_parse_expr@libnl_3 3.5.0-1 - rtnl_ematch_register@Base 3.5.0-1 - rtnl_ematch_register@libnl_3 3.5.0-1 - rtnl_ematch_set_flags@Base 3.5.0-1 - rtnl_ematch_set_flags@libnl_3 3.5.0-1 - rtnl_ematch_set_kind@Base 3.5.0-1 - rtnl_ematch_set_kind@libnl_3 3.5.0-1 - rtnl_ematch_set_name@Base 3.5.0-1 - rtnl_ematch_set_name@libnl_3 3.5.0-1 - rtnl_ematch_set_ops@Base 3.5.0-1 - rtnl_ematch_set_ops@libnl_3 3.5.0-1 - rtnl_ematch_text_get_algo@Base 3.5.0-1 - rtnl_ematch_text_get_algo@libnl_3 3.5.0-1 - rtnl_ematch_text_get_from_layer@Base 3.5.0-1 - rtnl_ematch_text_get_from_layer@libnl_3 3.5.0-1 - rtnl_ematch_text_get_from_offset@Base 3.5.0-1 - rtnl_ematch_text_get_from_offset@libnl_3 3.5.0-1 - rtnl_ematch_text_get_len@Base 3.5.0-1 - rtnl_ematch_text_get_len@libnl_3 3.5.0-1 - rtnl_ematch_text_get_pattern@Base 3.5.0-1 - rtnl_ematch_text_get_pattern@libnl_3 3.5.0-1 - rtnl_ematch_text_get_to_layer@Base 3.5.0-1 - rtnl_ematch_text_get_to_layer@libnl_3 3.5.0-1 - rtnl_ematch_text_get_to_offset@Base 3.5.0-1 - rtnl_ematch_text_get_to_offset@libnl_3 3.5.0-1 - rtnl_ematch_text_set_algo@Base 3.5.0-1 - rtnl_ematch_text_set_algo@libnl_3 3.5.0-1 - rtnl_ematch_text_set_from@Base 3.5.0-1 - rtnl_ematch_text_set_from@libnl_3 3.5.0-1 - rtnl_ematch_text_set_pattern@Base 3.5.0-1 - rtnl_ematch_text_set_pattern@libnl_3 3.5.0-1 - rtnl_ematch_text_set_to@Base 3.5.0-1 - rtnl_ematch_text_set_to@libnl_3 3.5.0-1 - rtnl_ematch_tree_add@Base 3.5.0-1 - rtnl_ematch_tree_add@libnl_3 3.5.0-1 - rtnl_ematch_tree_alloc@Base 3.5.0-1 - rtnl_ematch_tree_alloc@libnl_3 3.5.0-1 - rtnl_ematch_tree_clone@libnl_3_5 3.5.0-1 - rtnl_ematch_tree_dump@Base 3.5.0-1 - rtnl_ematch_tree_dump@libnl_3 3.5.0-1 - rtnl_ematch_tree_free@Base 3.5.0-1 - rtnl_ematch_tree_free@libnl_3 3.5.0-1 - rtnl_ematch_unlink@Base 3.5.0-1 - rtnl_ematch_unlink@libnl_3 3.5.0-1 - rtnl_ematch_unset_flags@Base 3.5.0-1 - rtnl_ematch_unset_flags@libnl_3 3.5.0-1 - rtnl_fw_set_classid@Base 3.5.0-1 - rtnl_fw_set_classid@libnl_3 3.5.0-1 - rtnl_fw_set_mask@Base 3.5.0-1 - rtnl_fw_set_mask@libnl_3 3.5.0-1 - rtnl_gact_get_action@libnl_3_2_29 3.5.0-1 - rtnl_gact_set_action@libnl_3_2_29 3.5.0-1 - rtnl_htb_get_cbuffer@Base 3.5.0-1 - rtnl_htb_get_cbuffer@libnl_3 3.5.0-1 - rtnl_htb_get_ceil64@libnl_3_5 3.5.0-1 - rtnl_htb_get_ceil@Base 3.5.0-1 - rtnl_htb_get_ceil@libnl_3 3.5.0-1 - rtnl_htb_get_defcls@Base 3.5.0-1 - rtnl_htb_get_defcls@libnl_3 3.5.0-1 - rtnl_htb_get_level@Base 3.5.0-1 - rtnl_htb_get_level@libnl_3 3.5.0-1 - rtnl_htb_get_prio@Base 3.5.0-1 - rtnl_htb_get_prio@libnl_3 3.5.0-1 - rtnl_htb_get_quantum@Base 3.5.0-1 - rtnl_htb_get_quantum@libnl_3 3.5.0-1 - rtnl_htb_get_rate2quantum@Base 3.5.0-1 - rtnl_htb_get_rate2quantum@libnl_3 3.5.0-1 - rtnl_htb_get_rate64@libnl_3_5 3.5.0-1 - rtnl_htb_get_rate@Base 3.5.0-1 - rtnl_htb_get_rate@libnl_3 3.5.0-1 - rtnl_htb_get_rbuffer@Base 3.5.0-1 - rtnl_htb_get_rbuffer@libnl_3 3.5.0-1 - rtnl_htb_set_cbuffer@Base 3.5.0-1 - rtnl_htb_set_cbuffer@libnl_3 3.5.0-1 - rtnl_htb_set_ceil64@libnl_3_5 3.5.0-1 - rtnl_htb_set_ceil@Base 3.5.0-1 - rtnl_htb_set_ceil@libnl_3 3.5.0-1 - rtnl_htb_set_defcls@Base 3.5.0-1 - rtnl_htb_set_defcls@libnl_3 3.5.0-1 - rtnl_htb_set_level@Base 3.5.0-1 - rtnl_htb_set_level@libnl_3 3.5.0-1 - rtnl_htb_set_prio@Base 3.5.0-1 - rtnl_htb_set_prio@libnl_3 3.5.0-1 - rtnl_htb_set_quantum@Base 3.5.0-1 - rtnl_htb_set_quantum@libnl_3 3.5.0-1 - rtnl_htb_set_rate2quantum@Base 3.5.0-1 - rtnl_htb_set_rate2quantum@libnl_3 3.5.0-1 - rtnl_htb_set_rate64@libnl_3_5 3.5.0-1 - rtnl_htb_set_rate@Base 3.5.0-1 - rtnl_htb_set_rate@libnl_3 3.5.0-1 - rtnl_htb_set_rbuffer@Base 3.5.0-1 - rtnl_htb_set_rbuffer@libnl_3 3.5.0-1 - rtnl_link_add@Base 3.5.0-1 - rtnl_link_add@libnl_3 3.5.0-1 - rtnl_link_af_alloc@Base 3.5.0-1 - rtnl_link_af_alloc@libnl_3 3.5.0-1 - rtnl_link_af_data@Base 3.5.0-1 - rtnl_link_af_data@libnl_3 3.5.0-1 - rtnl_link_af_data_compare@Base 3.5.0-1 - rtnl_link_af_data_compare@libnl_3 3.5.0-1 - rtnl_link_af_ops_lookup@Base 3.5.0-1 - rtnl_link_af_ops_lookup@libnl_3 3.5.0-1 - rtnl_link_af_ops_put@Base 3.5.0-1 - rtnl_link_af_ops_put@libnl_3 3.5.0-1 - rtnl_link_af_register@Base 3.5.0-1 - rtnl_link_af_register@libnl_3 3.5.0-1 - rtnl_link_af_unregister@Base 3.5.0-1 - rtnl_link_af_unregister@libnl_3 3.5.0-1 - rtnl_link_alloc@Base 3.5.0-1 - rtnl_link_alloc@libnl_3 3.5.0-1 - rtnl_link_alloc_cache@Base 3.5.0-1 - rtnl_link_alloc_cache@libnl_3 3.5.0-1 - rtnl_link_alloc_cache_flags@libnl_3_2_28 3.5.0-1 - rtnl_link_bond_add@Base 3.5.0-1 - rtnl_link_bond_add@libnl_3 3.5.0-1 - rtnl_link_bond_alloc@Base 3.5.0-1 - rtnl_link_bond_alloc@libnl_3 3.5.0-1 - rtnl_link_bond_enslave@Base 3.5.0-1 - rtnl_link_bond_enslave@libnl_3 3.5.0-1 - rtnl_link_bond_enslave_ifindex@Base 3.5.0-1 - rtnl_link_bond_enslave_ifindex@libnl_3 3.5.0-1 - rtnl_link_bond_release@Base 3.5.0-1 - rtnl_link_bond_release@libnl_3 3.5.0-1 - rtnl_link_bond_release_ifindex@Base 3.5.0-1 - rtnl_link_bond_release_ifindex@libnl_3 3.5.0-1 - rtnl_link_bridge_add@Base 3.5.0-1 - rtnl_link_bridge_add@libnl_3 3.5.0-1 - rtnl_link_bridge_alloc@Base 3.5.0-1 - rtnl_link_bridge_alloc@libnl_3 3.5.0-1 - rtnl_link_bridge_flags2str@Base 3.5.0-1 - rtnl_link_bridge_flags2str@libnl_3 3.5.0-1 - rtnl_link_bridge_get_cost@Base 3.5.0-1 - rtnl_link_bridge_get_cost@libnl_3 3.5.0-1 - rtnl_link_bridge_get_flags@Base 3.5.0-1 - rtnl_link_bridge_get_flags@libnl_3 3.5.0-1 - rtnl_link_bridge_get_hwmode@libnl_3_2_29 3.5.0-1 - rtnl_link_bridge_get_port_state@Base 3.5.0-1 - rtnl_link_bridge_get_port_state@libnl_3 3.5.0-1 - rtnl_link_bridge_get_port_vlan@libnl_3_2_28 3.5.0-1 - rtnl_link_bridge_get_priority@Base 3.5.0-1 - rtnl_link_bridge_get_priority@libnl_3 3.5.0-1 - rtnl_link_bridge_has_ext_info@Base 3.5.0-1 - rtnl_link_bridge_has_ext_info@libnl_3 3.5.0-1 - rtnl_link_bridge_has_vlan@libnl_3_2_28 3.5.0-1 - rtnl_link_bridge_hwmode2str@libnl_3_2_29 3.5.0-1 - rtnl_link_bridge_portstate2str@libnl_3_2_29 3.5.0-1 - rtnl_link_bridge_pvid@libnl_3_2_28 3.5.0-1 - rtnl_link_bridge_set_cost@Base 3.5.0-1 - rtnl_link_bridge_set_cost@libnl_3 3.5.0-1 - rtnl_link_bridge_set_flags@Base 3.5.0-1 - rtnl_link_bridge_set_flags@libnl_3 3.5.0-1 - rtnl_link_bridge_set_hwmode@libnl_3_2_29 3.5.0-1 - rtnl_link_bridge_set_port_state@Base 3.5.0-1 - rtnl_link_bridge_set_port_state@libnl_3 3.5.0-1 - rtnl_link_bridge_set_priority@Base 3.5.0-1 - rtnl_link_bridge_set_priority@libnl_3 3.5.0-1 - rtnl_link_bridge_set_self@libnl_3_2_29 3.5.0-1 - rtnl_link_bridge_str2flags@Base 3.5.0-1 - rtnl_link_bridge_str2flags@libnl_3 3.5.0-1 - rtnl_link_bridge_str2hwmode@libnl_3_2_29 3.5.0-1 - rtnl_link_bridge_str2portstate@libnl_3_2_29 3.5.0-1 - rtnl_link_bridge_unset_flags@Base 3.5.0-1 - rtnl_link_bridge_unset_flags@libnl_3 3.5.0-1 - rtnl_link_build_add_request@Base 3.5.0-1 - rtnl_link_build_add_request@libnl_3 3.5.0-1 - rtnl_link_build_change_request@Base 3.5.0-1 - rtnl_link_build_change_request@libnl_3 3.5.0-1 - rtnl_link_build_delete_request@Base 3.5.0-1 - rtnl_link_build_delete_request@libnl_3 3.5.0-1 - rtnl_link_build_get_request@Base 3.5.0-1 - rtnl_link_build_get_request@libnl_3 3.5.0-1 - rtnl_link_can_berr@Base 3.5.0-1 - rtnl_link_can_berr@libnl_3 3.5.0-1 - rtnl_link_can_berr_rx@Base 3.5.0-1 - rtnl_link_can_berr_rx@libnl_3 3.5.0-1 - rtnl_link_can_berr_tx@Base 3.5.0-1 - rtnl_link_can_berr_tx@libnl_3 3.5.0-1 - rtnl_link_can_ctrlmode2str@Base 3.5.0-1 - rtnl_link_can_ctrlmode2str@libnl_3 3.5.0-1 - rtnl_link_can_freq@Base 3.5.0-1 - rtnl_link_can_freq@libnl_3 3.5.0-1 - rtnl_link_can_get_bitrate@Base 3.5.0-1 - rtnl_link_can_get_bitrate@libnl_3 3.5.0-1 - rtnl_link_can_get_bittiming@Base 3.5.0-1 - rtnl_link_can_get_bittiming@libnl_3 3.5.0-1 - rtnl_link_can_get_bt_const@Base 3.5.0-1 - rtnl_link_can_get_bt_const@libnl_3 3.5.0-1 - rtnl_link_can_get_ctrlmode@Base 3.5.0-1 - rtnl_link_can_get_ctrlmode@libnl_3 3.5.0-1 - rtnl_link_can_get_restart_ms@Base 3.5.0-1 - rtnl_link_can_get_restart_ms@libnl_3 3.5.0-1 - rtnl_link_can_get_sample_point@Base 3.5.0-1 - rtnl_link_can_get_sample_point@libnl_3 3.5.0-1 - rtnl_link_can_restart@Base 3.5.0-1 - rtnl_link_can_restart@libnl_3 3.5.0-1 - rtnl_link_can_set_bitrate@Base 3.5.0-1 - rtnl_link_can_set_bitrate@libnl_3 3.5.0-1 - rtnl_link_can_set_bittiming@Base 3.5.0-1 - rtnl_link_can_set_bittiming@libnl_3 3.5.0-1 - rtnl_link_can_set_ctrlmode@Base 3.5.0-1 - rtnl_link_can_set_ctrlmode@libnl_3 3.5.0-1 - rtnl_link_can_set_restart_ms@Base 3.5.0-1 - rtnl_link_can_set_restart_ms@libnl_3 3.5.0-1 - rtnl_link_can_set_sample_point@Base 3.5.0-1 - rtnl_link_can_set_sample_point@libnl_3 3.5.0-1 - rtnl_link_can_state@Base 3.5.0-1 - rtnl_link_can_state@libnl_3 3.5.0-1 - rtnl_link_can_str2ctrlmode@Base 3.5.0-1 - rtnl_link_can_str2ctrlmode@libnl_3 3.5.0-1 - rtnl_link_can_unset_ctrlmode@Base 3.5.0-1 - rtnl_link_can_unset_ctrlmode@libnl_3 3.5.0-1 - rtnl_link_carrier2str@Base 3.5.0-1 - rtnl_link_carrier2str@libnl_3 3.5.0-1 - rtnl_link_change@Base 3.5.0-1 - rtnl_link_change@libnl_3 3.5.0-1 - rtnl_link_delete@Base 3.5.0-1 - rtnl_link_delete@libnl_3 3.5.0-1 - rtnl_link_enslave@Base 3.5.0-1 - rtnl_link_enslave@libnl_3 3.5.0-1 - rtnl_link_enslave_ifindex@Base 3.5.0-1 - rtnl_link_enslave_ifindex@libnl_3 3.5.0-1 - rtnl_link_fill_info@Base 3.5.0-1 - rtnl_link_fill_info@libnl_3 3.5.0-1 - rtnl_link_flags2str@Base 3.5.0-1 - rtnl_link_flags2str@libnl_3 3.5.0-1 - rtnl_link_geneve_alloc@libnl_3_5 3.5.0-1 - rtnl_link_geneve_get_flags@libnl_3_5 3.5.0-1 - rtnl_link_geneve_get_id@libnl_3_5 3.5.0-1 - rtnl_link_geneve_get_label@libnl_3_5 3.5.0-1 - rtnl_link_geneve_get_port@libnl_3_5 3.5.0-1 - rtnl_link_geneve_get_remote@libnl_3_5 3.5.0-1 - rtnl_link_geneve_get_tos@libnl_3_5 3.5.0-1 - rtnl_link_geneve_get_ttl@libnl_3_5 3.5.0-1 - rtnl_link_geneve_get_udp_csum@libnl_3_5 3.5.0-1 - rtnl_link_geneve_get_udp_zero_csum6_rx@libnl_3_5 3.5.0-1 - rtnl_link_geneve_get_udp_zero_csum6_tx@libnl_3_5 3.5.0-1 - rtnl_link_geneve_set_flags@libnl_3_5 3.5.0-1 - rtnl_link_geneve_set_id@libnl_3_5 3.5.0-1 - rtnl_link_geneve_set_label@libnl_3_5 3.5.0-1 - rtnl_link_geneve_set_port@libnl_3_5 3.5.0-1 - rtnl_link_geneve_set_remote@libnl_3_5 3.5.0-1 - rtnl_link_geneve_set_tos@libnl_3_5 3.5.0-1 - rtnl_link_geneve_set_ttl@libnl_3_5 3.5.0-1 - rtnl_link_geneve_set_udp_csum@libnl_3_5 3.5.0-1 - rtnl_link_geneve_set_udp_zero_csum6_rx@libnl_3_5 3.5.0-1 - rtnl_link_geneve_set_udp_zero_csum6_tx@libnl_3_5 3.5.0-1 - rtnl_link_get@Base 3.5.0-1 - rtnl_link_get@libnl_3 3.5.0-1 - rtnl_link_get_addr@Base 3.5.0-1 - rtnl_link_get_addr@libnl_3 3.5.0-1 - rtnl_link_get_arptype@Base 3.5.0-1 - rtnl_link_get_arptype@libnl_3 3.5.0-1 - rtnl_link_get_broadcast@Base 3.5.0-1 - rtnl_link_get_broadcast@libnl_3 3.5.0-1 - rtnl_link_get_by_name@Base 3.5.0-1 - rtnl_link_get_by_name@libnl_3 3.5.0-1 - rtnl_link_get_carrier@Base 3.5.0-1 - rtnl_link_get_carrier@libnl_3 3.5.0-1 - rtnl_link_get_carrier_changes@libnl_3_2_29 3.5.0-1 - rtnl_link_get_family@Base 3.5.0-1 - rtnl_link_get_family@libnl_3 3.5.0-1 - rtnl_link_get_flags@Base 3.5.0-1 - rtnl_link_get_flags@libnl_3 3.5.0-1 - rtnl_link_get_group@Base 3.5.0-1 - rtnl_link_get_group@libnl_3 3.5.0-1 - rtnl_link_get_gso_max_segs@libnl_3_2_29 3.5.0-1 - rtnl_link_get_gso_max_size@libnl_3_2_29 3.5.0-1 - rtnl_link_get_ifalias@Base 3.5.0-1 - rtnl_link_get_ifalias@libnl_3 3.5.0-1 - rtnl_link_get_ifindex@Base 3.5.0-1 - rtnl_link_get_ifindex@libnl_3 3.5.0-1 - rtnl_link_get_info_type@Base 3.5.0-1 - rtnl_link_get_info_type@libnl_3 3.5.0-1 - rtnl_link_get_kernel@Base 3.5.0-1 - rtnl_link_get_kernel@libnl_3 3.5.0-1 - rtnl_link_get_link@Base 3.5.0-1 - rtnl_link_get_link@libnl_3 3.5.0-1 - rtnl_link_get_link_netnsid@Base 3.5.0-1 - rtnl_link_get_link_netnsid@libnl_3_2_27 3.5.0-1 - rtnl_link_get_linkmode@Base 3.5.0-1 - rtnl_link_get_linkmode@libnl_3 3.5.0-1 - rtnl_link_get_master@Base 3.5.0-1 - rtnl_link_get_master@libnl_3 3.5.0-1 - rtnl_link_get_mtu@Base 3.5.0-1 - rtnl_link_get_mtu@libnl_3 3.5.0-1 - rtnl_link_get_name@Base 3.5.0-1 - rtnl_link_get_name@libnl_3 3.5.0-1 - rtnl_link_get_ns_fd@Base 3.5.0-1 - rtnl_link_get_ns_fd@libnl_3 3.5.0-1 - rtnl_link_get_ns_pid@Base 3.5.0-1 - rtnl_link_get_ns_pid@libnl_3 3.5.0-1 - rtnl_link_get_num_rx_queues@Base 3.5.0-1 - rtnl_link_get_num_rx_queues@libnl_3 3.5.0-1 - rtnl_link_get_num_tx_queues@Base 3.5.0-1 - rtnl_link_get_num_tx_queues@libnl_3 3.5.0-1 - rtnl_link_get_num_vf@Base 3.5.0-1 - rtnl_link_get_num_vf@libnl_3 3.5.0-1 - rtnl_link_get_operstate@Base 3.5.0-1 - rtnl_link_get_operstate@libnl_3 3.5.0-1 - rtnl_link_get_phys_port_id@Base 3.5.0-1 - rtnl_link_get_phys_port_id@libnl_3 3.5.0-1 - rtnl_link_get_phys_port_name@libnl_3_2_29 3.5.0-1 - rtnl_link_get_phys_switch_id@libnl_3_2_29 3.5.0-1 - rtnl_link_get_pmtudisc@Base 3.5.0-1 - rtnl_link_get_pmtudisc@libnl_3 3.5.0-1 - rtnl_link_get_promiscuity@Base 3.5.0-1 - rtnl_link_get_promiscuity@libnl_3 3.5.0-1 - rtnl_link_get_qdisc@Base 3.5.0-1 - rtnl_link_get_qdisc@libnl_3 3.5.0-1 - rtnl_link_get_slave_type@libnl_3_5 3.5.0-1 - rtnl_link_get_stat@Base 3.5.0-1 - rtnl_link_get_stat@libnl_3 3.5.0-1 - rtnl_link_get_txqlen@Base 3.5.0-1 - rtnl_link_get_txqlen@libnl_3 3.5.0-1 - rtnl_link_get_type@Base 3.5.0-1 - rtnl_link_get_type@libnl_3 3.5.0-1 - rtnl_link_get_weight@Base 3.5.0-1 - rtnl_link_get_weight@libnl_3 3.5.0-1 - rtnl_link_has_vf_list@libnl_3_2_29 3.5.0-1 - rtnl_link_i2name@Base 3.5.0-1 - rtnl_link_i2name@libnl_3 3.5.0-1 - rtnl_link_inet6_addrgenmode2str@Base 3.5.0-1 - rtnl_link_inet6_addrgenmode2str@libnl_3 3.5.0-1 - rtnl_link_inet6_flags2str@libnl_3_4 3.5.0-1 - rtnl_link_inet6_get_addr_gen_mode@Base 3.5.0-1 - rtnl_link_inet6_get_addr_gen_mode@libnl_3 3.5.0-1 - rtnl_link_inet6_get_flags@libnl_3_4 3.5.0-1 - rtnl_link_inet6_get_token@Base 3.5.0-1 - rtnl_link_inet6_get_token@libnl_3 3.5.0-1 - rtnl_link_inet6_set_addr_gen_mode@Base 3.5.0-1 - rtnl_link_inet6_set_addr_gen_mode@libnl_3 3.5.0-1 - rtnl_link_inet6_set_flags@libnl_3_4 3.5.0-1 - rtnl_link_inet6_set_token@Base 3.5.0-1 - rtnl_link_inet6_set_token@libnl_3 3.5.0-1 - rtnl_link_inet6_str2addrgenmode@Base 3.5.0-1 - rtnl_link_inet6_str2addrgenmode@libnl_3 3.5.0-1 - rtnl_link_inet6_str2flags@libnl_3_4 3.5.0-1 - rtnl_link_inet_devconf2str@Base 3.5.0-1 - rtnl_link_inet_devconf2str@libnl_3 3.5.0-1 - rtnl_link_inet_get_conf@Base 3.5.0-1 - rtnl_link_inet_get_conf@libnl_3 3.5.0-1 - rtnl_link_inet_set_conf@Base 3.5.0-1 - rtnl_link_inet_set_conf@libnl_3 3.5.0-1 - rtnl_link_inet_str2devconf@Base 3.5.0-1 - rtnl_link_inet_str2devconf@libnl_3 3.5.0-1 - rtnl_link_info_ops_lookup@Base 3.5.0-1 - rtnl_link_info_ops_lookup@libnl_3 3.5.0-1 - rtnl_link_info_ops_put@Base 3.5.0-1 - rtnl_link_info_ops_put@libnl_3 3.5.0-1 - rtnl_link_info_parse@Base 3.5.0-1 - rtnl_link_info_parse@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_add@Base 3.5.0-1 - rtnl_link_ip6_tnl_add@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_alloc@Base 3.5.0-1 - rtnl_link_ip6_tnl_alloc@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_get_encaplimit@Base 3.5.0-1 - rtnl_link_ip6_tnl_get_encaplimit@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_get_flags@Base 3.5.0-1 - rtnl_link_ip6_tnl_get_flags@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_get_flowinfo@Base 3.5.0-1 - rtnl_link_ip6_tnl_get_flowinfo@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_get_link@Base 3.5.0-1 - rtnl_link_ip6_tnl_get_link@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_get_local@Base 3.5.0-1 - rtnl_link_ip6_tnl_get_local@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_get_proto@Base 3.5.0-1 - rtnl_link_ip6_tnl_get_proto@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_get_remote@Base 3.5.0-1 - rtnl_link_ip6_tnl_get_remote@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_get_tos@Base 3.5.0-1 - rtnl_link_ip6_tnl_get_tos@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_get_ttl@Base 3.5.0-1 - rtnl_link_ip6_tnl_get_ttl@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_set_encaplimit@Base 3.5.0-1 - rtnl_link_ip6_tnl_set_encaplimit@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_set_flags@Base 3.5.0-1 - rtnl_link_ip6_tnl_set_flags@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_set_flowinfo@Base 3.5.0-1 - rtnl_link_ip6_tnl_set_flowinfo@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_set_link@Base 3.5.0-1 - rtnl_link_ip6_tnl_set_link@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_set_local@Base 3.5.0-1 - rtnl_link_ip6_tnl_set_local@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_set_proto@Base 3.5.0-1 - rtnl_link_ip6_tnl_set_proto@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_set_remote@Base 3.5.0-1 - rtnl_link_ip6_tnl_set_remote@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_set_tos@Base 3.5.0-1 - rtnl_link_ip6_tnl_set_tos@libnl_3 3.5.0-1 - rtnl_link_ip6_tnl_set_ttl@Base 3.5.0-1 - rtnl_link_ip6_tnl_set_ttl@libnl_3 3.5.0-1 - rtnl_link_ipgre_add@Base 3.5.0-1 - rtnl_link_ipgre_add@libnl_3 3.5.0-1 - rtnl_link_ipgre_alloc@Base 3.5.0-1 - rtnl_link_ipgre_alloc@libnl_3 3.5.0-1 - rtnl_link_ipgre_get_iflags@Base 3.5.0-1 - rtnl_link_ipgre_get_iflags@libnl_3 3.5.0-1 - rtnl_link_ipgre_get_ikey@Base 3.5.0-1 - rtnl_link_ipgre_get_ikey@libnl_3 3.5.0-1 - rtnl_link_ipgre_get_link@Base 3.5.0-1 - rtnl_link_ipgre_get_link@libnl_3 3.5.0-1 - rtnl_link_ipgre_get_local@Base 3.5.0-1 - rtnl_link_ipgre_get_local@libnl_3 3.5.0-1 - rtnl_link_ipgre_get_oflags@Base 3.5.0-1 - rtnl_link_ipgre_get_oflags@libnl_3 3.5.0-1 - rtnl_link_ipgre_get_okey@Base 3.5.0-1 - rtnl_link_ipgre_get_okey@libnl_3 3.5.0-1 - rtnl_link_ipgre_get_pmtudisc@libnl_3_2_29 3.5.0-1 - rtnl_link_ipgre_get_remote@Base 3.5.0-1 - rtnl_link_ipgre_get_remote@libnl_3 3.5.0-1 - rtnl_link_ipgre_get_tos@Base 3.5.0-1 - rtnl_link_ipgre_get_tos@libnl_3 3.5.0-1 - rtnl_link_ipgre_get_ttl@Base 3.5.0-1 - rtnl_link_ipgre_get_ttl@libnl_3 3.5.0-1 - rtnl_link_ipgre_set_iflags@Base 3.5.0-1 - rtnl_link_ipgre_set_iflags@libnl_3 3.5.0-1 - rtnl_link_ipgre_set_ikey@Base 3.5.0-1 - rtnl_link_ipgre_set_ikey@libnl_3 3.5.0-1 - rtnl_link_ipgre_set_link@Base 3.5.0-1 - rtnl_link_ipgre_set_link@libnl_3 3.5.0-1 - rtnl_link_ipgre_set_local@Base 3.5.0-1 - rtnl_link_ipgre_set_local@libnl_3 3.5.0-1 - rtnl_link_ipgre_set_oflags@Base 3.5.0-1 - rtnl_link_ipgre_set_oflags@libnl_3 3.5.0-1 - rtnl_link_ipgre_set_okey@Base 3.5.0-1 - rtnl_link_ipgre_set_okey@libnl_3 3.5.0-1 - rtnl_link_ipgre_set_pmtudisc@Base 3.5.0-1 - rtnl_link_ipgre_set_pmtudisc@libnl_3 3.5.0-1 - rtnl_link_ipgre_set_remote@Base 3.5.0-1 - rtnl_link_ipgre_set_remote@libnl_3 3.5.0-1 - rtnl_link_ipgre_set_tos@Base 3.5.0-1 - rtnl_link_ipgre_set_tos@libnl_3 3.5.0-1 - rtnl_link_ipgre_set_ttl@Base 3.5.0-1 - rtnl_link_ipgre_set_ttl@libnl_3 3.5.0-1 - rtnl_link_ipgretap_add@libnl_3_2_28 3.5.0-1 - rtnl_link_ipgretap_alloc@libnl_3_2_28 3.5.0-1 - rtnl_link_ipip_add@Base 3.5.0-1 - rtnl_link_ipip_add@libnl_3 3.5.0-1 - rtnl_link_ipip_alloc@Base 3.5.0-1 - rtnl_link_ipip_alloc@libnl_3 3.5.0-1 - rtnl_link_ipip_get_link@Base 3.5.0-1 - rtnl_link_ipip_get_link@libnl_3 3.5.0-1 - rtnl_link_ipip_get_local@Base 3.5.0-1 - rtnl_link_ipip_get_local@libnl_3 3.5.0-1 - rtnl_link_ipip_get_pmtudisc@Base 3.5.0-1 - rtnl_link_ipip_get_pmtudisc@libnl_3 3.5.0-1 - rtnl_link_ipip_get_remote@Base 3.5.0-1 - rtnl_link_ipip_get_remote@libnl_3 3.5.0-1 - rtnl_link_ipip_get_tos@Base 3.5.0-1 - rtnl_link_ipip_get_tos@libnl_3 3.5.0-1 - rtnl_link_ipip_get_ttl@Base 3.5.0-1 - rtnl_link_ipip_get_ttl@libnl_3 3.5.0-1 - rtnl_link_ipip_set_link@Base 3.5.0-1 - rtnl_link_ipip_set_link@libnl_3 3.5.0-1 - rtnl_link_ipip_set_local@Base 3.5.0-1 - rtnl_link_ipip_set_local@libnl_3 3.5.0-1 - rtnl_link_ipip_set_pmtudisc@Base 3.5.0-1 - rtnl_link_ipip_set_pmtudisc@libnl_3 3.5.0-1 - rtnl_link_ipip_set_remote@Base 3.5.0-1 - rtnl_link_ipip_set_remote@libnl_3 3.5.0-1 - rtnl_link_ipip_set_tos@Base 3.5.0-1 - rtnl_link_ipip_set_tos@libnl_3 3.5.0-1 - rtnl_link_ipip_set_ttl@Base 3.5.0-1 - rtnl_link_ipip_set_ttl@libnl_3 3.5.0-1 - rtnl_link_ipvlan_alloc@Base 3.5.0-1 - rtnl_link_ipvlan_alloc@libnl_3_2_27 3.5.0-1 - rtnl_link_ipvlan_get_mode@Base 3.5.0-1 - rtnl_link_ipvlan_get_mode@libnl_3_2_27 3.5.0-1 - rtnl_link_ipvlan_mode2str@Base 3.5.0-1 - rtnl_link_ipvlan_mode2str@libnl_3_2_27 3.5.0-1 - rtnl_link_ipvlan_set_mode@Base 3.5.0-1 - rtnl_link_ipvlan_set_mode@libnl_3_2_27 3.5.0-1 - rtnl_link_ipvlan_str2mode@Base 3.5.0-1 - rtnl_link_ipvlan_str2mode@libnl_3_2_27 3.5.0-1 - rtnl_link_ipvti_add@Base 3.5.0-1 - rtnl_link_ipvti_add@libnl_3 3.5.0-1 - rtnl_link_ipvti_alloc@Base 3.5.0-1 - rtnl_link_ipvti_alloc@libnl_3 3.5.0-1 - rtnl_link_ipvti_get_ikey@Base 3.5.0-1 - rtnl_link_ipvti_get_ikey@libnl_3 3.5.0-1 - rtnl_link_ipvti_get_link@Base 3.5.0-1 - rtnl_link_ipvti_get_link@libnl_3 3.5.0-1 - rtnl_link_ipvti_get_local@Base 3.5.0-1 - rtnl_link_ipvti_get_local@libnl_3 3.5.0-1 - rtnl_link_ipvti_get_okey@Base 3.5.0-1 - rtnl_link_ipvti_get_okey@libnl_3 3.5.0-1 - rtnl_link_ipvti_get_remote@Base 3.5.0-1 - rtnl_link_ipvti_get_remote@libnl_3 3.5.0-1 - rtnl_link_ipvti_set_ikey@Base 3.5.0-1 - rtnl_link_ipvti_set_ikey@libnl_3 3.5.0-1 - rtnl_link_ipvti_set_link@Base 3.5.0-1 - rtnl_link_ipvti_set_link@libnl_3 3.5.0-1 - rtnl_link_ipvti_set_local@Base 3.5.0-1 - rtnl_link_ipvti_set_local@libnl_3 3.5.0-1 - rtnl_link_ipvti_set_okey@Base 3.5.0-1 - rtnl_link_ipvti_set_okey@libnl_3 3.5.0-1 - rtnl_link_ipvti_set_remote@Base 3.5.0-1 - rtnl_link_ipvti_set_remote@libnl_3 3.5.0-1 - rtnl_link_is_bridge@Base 3.5.0-1 - rtnl_link_is_bridge@libnl_3 3.5.0-1 - rtnl_link_is_can@Base 3.5.0-1 - rtnl_link_is_can@libnl_3 3.5.0-1 - rtnl_link_is_geneve@libnl_3_5 3.5.0-1 - rtnl_link_is_ip6_tnl@Base 3.5.0-1 - rtnl_link_is_ip6_tnl@libnl_3 3.5.0-1 - rtnl_link_is_ipgre@Base 3.5.0-1 - rtnl_link_is_ipgre@libnl_3 3.5.0-1 - rtnl_link_is_ipgretap@libnl_3_2_29 3.5.0-1 - rtnl_link_is_ipip@Base 3.5.0-1 - rtnl_link_is_ipip@libnl_3 3.5.0-1 - rtnl_link_is_ipvlan@Base 3.5.0-1 - rtnl_link_is_ipvlan@libnl_3_2_27 3.5.0-1 - rtnl_link_is_ipvti@Base 3.5.0-1 - rtnl_link_is_ipvti@libnl_3 3.5.0-1 - rtnl_link_is_macvlan@Base 3.5.0-1 - rtnl_link_is_macvlan@libnl_3 3.5.0-1 - rtnl_link_is_macvtap@libnl_3_2_28 3.5.0-1 - rtnl_link_is_sit@Base 3.5.0-1 - rtnl_link_is_sit@libnl_3 3.5.0-1 - rtnl_link_is_veth@Base 3.5.0-1 - rtnl_link_is_veth@libnl_3 3.5.0-1 - rtnl_link_is_vlan@Base 3.5.0-1 - rtnl_link_is_vlan@libnl_3 3.5.0-1 - rtnl_link_is_vrf@libnl_3_2_28 3.5.0-1 - rtnl_link_is_vxlan@Base 3.5.0-1 - rtnl_link_is_vxlan@libnl_3 3.5.0-1 - rtnl_link_is_xfrmi@libnl_3_5 3.5.0-1 - rtnl_link_macsec_alloc@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_get_cipher_suite@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_get_encoding_sa@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_get_encrypt@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_get_end_station@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_get_icv_len@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_get_port@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_get_protect@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_get_replay_protect@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_get_scb@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_get_sci@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_get_send_sci@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_get_validation_type@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_get_window@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_set_cipher_suite@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_set_encoding_sa@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_set_encrypt@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_set_end_station@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_set_icv_len@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_set_port@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_set_protect@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_set_replay_protect@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_set_scb@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_set_sci@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_set_send_sci@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_set_validation_type@libnl_3_2_28 3.5.0-1 - rtnl_link_macsec_set_window@libnl_3_2_28 3.5.0-1 - rtnl_link_macvlan_add_macaddr@libnl_3_2_29 3.5.0-1 - rtnl_link_macvlan_alloc@Base 3.5.0-1 - rtnl_link_macvlan_alloc@libnl_3 3.5.0-1 - rtnl_link_macvlan_count_macaddr@libnl_3_2_29 3.5.0-1 - rtnl_link_macvlan_del_macaddr@libnl_3_2_29 3.5.0-1 - rtnl_link_macvlan_flags2str@Base 3.5.0-1 - rtnl_link_macvlan_flags2str@libnl_3 3.5.0-1 - rtnl_link_macvlan_get_flags@Base 3.5.0-1 - rtnl_link_macvlan_get_flags@libnl_3 3.5.0-1 - rtnl_link_macvlan_get_macaddr@libnl_3_2_29 3.5.0-1 - rtnl_link_macvlan_get_macmode@libnl_3_2_29 3.5.0-1 - rtnl_link_macvlan_get_mode@Base 3.5.0-1 - rtnl_link_macvlan_get_mode@libnl_3 3.5.0-1 - rtnl_link_macvlan_macmode2str@libnl_3_2_29 3.5.0-1 - rtnl_link_macvlan_mode2str@Base 3.5.0-1 - rtnl_link_macvlan_mode2str@libnl_3 3.5.0-1 - rtnl_link_macvlan_set_flags@Base 3.5.0-1 - rtnl_link_macvlan_set_flags@libnl_3 3.5.0-1 - rtnl_link_macvlan_set_macmode@libnl_3_2_29 3.5.0-1 - rtnl_link_macvlan_set_mode@Base 3.5.0-1 - rtnl_link_macvlan_set_mode@libnl_3 3.5.0-1 - rtnl_link_macvlan_str2flags@Base 3.5.0-1 - rtnl_link_macvlan_str2flags@libnl_3 3.5.0-1 - rtnl_link_macvlan_str2macmode@libnl_3_2_29 3.5.0-1 - rtnl_link_macvlan_str2mode@Base 3.5.0-1 - rtnl_link_macvlan_str2mode@libnl_3 3.5.0-1 - rtnl_link_macvlan_unset_flags@Base 3.5.0-1 - rtnl_link_macvlan_unset_flags@libnl_3 3.5.0-1 - rtnl_link_macvtap_alloc@libnl_3_2_28 3.5.0-1 - rtnl_link_macvtap_flags2str@libnl_3_2_28 3.5.0-1 - rtnl_link_macvtap_get_flags@libnl_3_2_28 3.5.0-1 - rtnl_link_macvtap_get_mode@libnl_3_2_28 3.5.0-1 - rtnl_link_macvtap_mode2str@libnl_3_2_28 3.5.0-1 - rtnl_link_macvtap_set_flags@libnl_3_2_28 3.5.0-1 - rtnl_link_macvtap_set_mode@libnl_3_2_28 3.5.0-1 - rtnl_link_macvtap_str2flags@libnl_3_2_28 3.5.0-1 - rtnl_link_macvtap_str2mode@libnl_3_2_28 3.5.0-1 - rtnl_link_macvtap_unset_flags@libnl_3_2_28 3.5.0-1 - rtnl_link_mode2str@Base 3.5.0-1 - rtnl_link_mode2str@libnl_3 3.5.0-1 - rtnl_link_name2i@Base 3.5.0-1 - rtnl_link_name2i@libnl_3 3.5.0-1 - rtnl_link_operstate2str@Base 3.5.0-1 - rtnl_link_operstate2str@libnl_3 3.5.0-1 - rtnl_link_ppp_alloc@libnl_3_2_29 3.5.0-1 - rtnl_link_ppp_get_fd@libnl_3_2_29 3.5.0-1 - rtnl_link_ppp_set_fd@libnl_3_2_29 3.5.0-1 - rtnl_link_put@Base 3.5.0-1 - rtnl_link_put@libnl_3 3.5.0-1 - rtnl_link_register_info@Base 3.5.0-1 - rtnl_link_register_info@libnl_3 3.5.0-1 - rtnl_link_release@Base 3.5.0-1 - rtnl_link_release@libnl_3 3.5.0-1 - rtnl_link_release_ifindex@Base 3.5.0-1 - rtnl_link_release_ifindex@libnl_3 3.5.0-1 - rtnl_link_set_addr@Base 3.5.0-1 - rtnl_link_set_addr@libnl_3 3.5.0-1 - rtnl_link_set_arptype@Base 3.5.0-1 - rtnl_link_set_arptype@libnl_3 3.5.0-1 - rtnl_link_set_broadcast@Base 3.5.0-1 - rtnl_link_set_broadcast@libnl_3 3.5.0-1 - rtnl_link_set_carrier@Base 3.5.0-1 - rtnl_link_set_carrier@libnl_3 3.5.0-1 - rtnl_link_set_family@Base 3.5.0-1 - rtnl_link_set_family@libnl_3 3.5.0-1 - rtnl_link_set_flags@Base 3.5.0-1 - rtnl_link_set_flags@libnl_3 3.5.0-1 - rtnl_link_set_group@Base 3.5.0-1 - rtnl_link_set_group@libnl_3 3.5.0-1 - rtnl_link_set_ifalias@Base 3.5.0-1 - rtnl_link_set_ifalias@libnl_3 3.5.0-1 - rtnl_link_set_ifindex@Base 3.5.0-1 - rtnl_link_set_ifindex@libnl_3 3.5.0-1 - rtnl_link_set_info_type@Base 3.5.0-1 - rtnl_link_set_info_type@libnl_3 3.5.0-1 - rtnl_link_set_link@Base 3.5.0-1 - rtnl_link_set_link@libnl_3 3.5.0-1 - rtnl_link_set_link_netnsid@Base 3.5.0-1 - rtnl_link_set_link_netnsid@libnl_3_2_27 3.5.0-1 - rtnl_link_set_linkmode@Base 3.5.0-1 - rtnl_link_set_linkmode@libnl_3 3.5.0-1 - rtnl_link_set_master@Base 3.5.0-1 - rtnl_link_set_master@libnl_3 3.5.0-1 - rtnl_link_set_mtu@Base 3.5.0-1 - rtnl_link_set_mtu@libnl_3 3.5.0-1 - rtnl_link_set_name@Base 3.5.0-1 - rtnl_link_set_name@libnl_3 3.5.0-1 - rtnl_link_set_ns_fd@Base 3.5.0-1 - rtnl_link_set_ns_fd@libnl_3 3.5.0-1 - rtnl_link_set_ns_pid@Base 3.5.0-1 - rtnl_link_set_ns_pid@libnl_3 3.5.0-1 - rtnl_link_set_num_rx_queues@Base 3.5.0-1 - rtnl_link_set_num_rx_queues@libnl_3 3.5.0-1 - rtnl_link_set_num_tx_queues@Base 3.5.0-1 - rtnl_link_set_num_tx_queues@libnl_3 3.5.0-1 - rtnl_link_set_operstate@Base 3.5.0-1 - rtnl_link_set_operstate@libnl_3 3.5.0-1 - rtnl_link_set_promiscuity@Base 3.5.0-1 - rtnl_link_set_promiscuity@libnl_3 3.5.0-1 - rtnl_link_set_qdisc@Base 3.5.0-1 - rtnl_link_set_qdisc@libnl_3 3.5.0-1 - rtnl_link_set_slave_type@libnl_3_5 3.5.0-1 - rtnl_link_set_stat@Base 3.5.0-1 - rtnl_link_set_stat@libnl_3 3.5.0-1 - rtnl_link_set_txqlen@Base 3.5.0-1 - rtnl_link_set_txqlen@libnl_3 3.5.0-1 - rtnl_link_set_type@Base 3.5.0-1 - rtnl_link_set_type@libnl_3 3.5.0-1 - rtnl_link_set_vf_list@libnl_3_2_29 3.5.0-1 - rtnl_link_set_weight@Base 3.5.0-1 - rtnl_link_set_weight@libnl_3 3.5.0-1 - rtnl_link_sit_add@Base 3.5.0-1 - rtnl_link_sit_add@libnl_3 3.5.0-1 - rtnl_link_sit_alloc@Base 3.5.0-1 - rtnl_link_sit_alloc@libnl_3 3.5.0-1 - rtnl_link_sit_get_flags@Base 3.5.0-1 - rtnl_link_sit_get_flags@libnl_3 3.5.0-1 - rtnl_link_sit_get_ip6rd_prefix@libnl_3_2_28 3.5.0-1 - rtnl_link_sit_get_ip6rd_prefixlen@libnl_3_2_28 3.5.0-1 - rtnl_link_sit_get_ip6rd_relay_prefix@libnl_3_2_28 3.5.0-1 - rtnl_link_sit_get_ip6rd_relay_prefixlen@libnl_3_2_28 3.5.0-1 - rtnl_link_sit_get_link@Base 3.5.0-1 - rtnl_link_sit_get_link@libnl_3 3.5.0-1 - rtnl_link_sit_get_local@Base 3.5.0-1 - rtnl_link_sit_get_local@libnl_3 3.5.0-1 - rtnl_link_sit_get_pmtudisc@Base 3.5.0-1 - rtnl_link_sit_get_pmtudisc@libnl_3 3.5.0-1 - rtnl_link_sit_get_proto@Base 3.5.0-1 - rtnl_link_sit_get_proto@libnl_3 3.5.0-1 - rtnl_link_sit_get_remote@Base 3.5.0-1 - rtnl_link_sit_get_remote@libnl_3 3.5.0-1 - rtnl_link_sit_get_tos@Base 3.5.0-1 - rtnl_link_sit_get_tos@libnl_3 3.5.0-1 - rtnl_link_sit_get_ttl@Base 3.5.0-1 - rtnl_link_sit_get_ttl@libnl_3 3.5.0-1 - rtnl_link_sit_set_flags@Base 3.5.0-1 - rtnl_link_sit_set_flags@libnl_3 3.5.0-1 - rtnl_link_sit_set_ip6rd_prefix@libnl_3_2_28 3.5.0-1 - rtnl_link_sit_set_ip6rd_prefixlen@libnl_3_2_28 3.5.0-1 - rtnl_link_sit_set_ip6rd_relay_prefix@libnl_3_2_28 3.5.0-1 - rtnl_link_sit_set_ip6rd_relay_prefixlen@libnl_3_2_28 3.5.0-1 - rtnl_link_sit_set_link@Base 3.5.0-1 - rtnl_link_sit_set_link@libnl_3 3.5.0-1 - rtnl_link_sit_set_local@Base 3.5.0-1 - rtnl_link_sit_set_local@libnl_3 3.5.0-1 - rtnl_link_sit_set_pmtudisc@Base 3.5.0-1 - rtnl_link_sit_set_pmtudisc@libnl_3 3.5.0-1 - rtnl_link_sit_set_proto@Base 3.5.0-1 - rtnl_link_sit_set_proto@libnl_3 3.5.0-1 - rtnl_link_sit_set_remote@Base 3.5.0-1 - rtnl_link_sit_set_remote@libnl_3 3.5.0-1 - rtnl_link_sit_set_tos@Base 3.5.0-1 - rtnl_link_sit_set_tos@libnl_3 3.5.0-1 - rtnl_link_sit_set_ttl@Base 3.5.0-1 - rtnl_link_sit_set_ttl@libnl_3 3.5.0-1 - rtnl_link_stat2str@Base 3.5.0-1 - rtnl_link_stat2str@libnl_3 3.5.0-1 - rtnl_link_str2carrier@Base 3.5.0-1 - rtnl_link_str2carrier@libnl_3 3.5.0-1 - rtnl_link_str2flags@Base 3.5.0-1 - rtnl_link_str2flags@libnl_3 3.5.0-1 - rtnl_link_str2mode@Base 3.5.0-1 - rtnl_link_str2mode@libnl_3 3.5.0-1 - rtnl_link_str2operstate@Base 3.5.0-1 - rtnl_link_str2operstate@libnl_3 3.5.0-1 - rtnl_link_str2stat@Base 3.5.0-1 - rtnl_link_str2stat@libnl_3 3.5.0-1 - rtnl_link_unregister_info@Base 3.5.0-1 - rtnl_link_unregister_info@libnl_3 3.5.0-1 - rtnl_link_unset_flags@Base 3.5.0-1 - rtnl_link_unset_flags@libnl_3 3.5.0-1 - rtnl_link_unset_vf_list@libnl_3_2_29 3.5.0-1 - rtnl_link_veth_add@Base 3.5.0-1 - rtnl_link_veth_add@libnl_3 3.5.0-1 - rtnl_link_veth_alloc@Base 3.5.0-1 - rtnl_link_veth_alloc@libnl_3 3.5.0-1 - rtnl_link_veth_get_peer@Base 3.5.0-1 - rtnl_link_veth_get_peer@libnl_3 3.5.0-1 - rtnl_link_veth_release@Base 3.5.0-1 - rtnl_link_veth_release@libnl_3 3.5.0-1 - rtnl_link_vf_add@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_alloc@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_free@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_get@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_get_addr@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_get_index@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_get_linkstate@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_get_rate@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_get_rss_query_en@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_get_spoofchk@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_get_stat@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_get_trust@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_get_vlans@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_linkstate2str@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_put@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_set_addr@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_set_ib_node_guid@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_set_ib_port_guid@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_set_index@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_set_linkstate@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_set_rate@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_set_rss_query_en@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_set_spoofchk@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_set_trust@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_set_vlans@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_str2guid@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_str2linkstate@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_str2vlanproto@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_vlan_alloc@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_vlan_free@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_vlan_put@libnl_3_2_29 3.5.0-1 - rtnl_link_vf_vlanproto2str@libnl_3_2_29 3.5.0-1 - rtnl_link_vlan_alloc@Base 3.5.0-1 - rtnl_link_vlan_alloc@libnl_3 3.5.0-1 - rtnl_link_vlan_flags2str@Base 3.5.0-1 - rtnl_link_vlan_flags2str@libnl_3 3.5.0-1 - rtnl_link_vlan_get_egress_map@Base 3.5.0-1 - rtnl_link_vlan_get_egress_map@libnl_3 3.5.0-1 - rtnl_link_vlan_get_flags@Base 3.5.0-1 - rtnl_link_vlan_get_flags@libnl_3 3.5.0-1 - rtnl_link_vlan_get_id@Base 3.5.0-1 - rtnl_link_vlan_get_id@libnl_3 3.5.0-1 - rtnl_link_vlan_get_ingress_map@Base 3.5.0-1 - rtnl_link_vlan_get_ingress_map@libnl_3 3.5.0-1 - rtnl_link_vlan_get_protocol@Base 3.5.0-1 - rtnl_link_vlan_get_protocol@libnl_3 3.5.0-1 - rtnl_link_vlan_set_egress_map@Base 3.5.0-1 - rtnl_link_vlan_set_egress_map@libnl_3 3.5.0-1 - rtnl_link_vlan_set_flags@Base 3.5.0-1 - rtnl_link_vlan_set_flags@libnl_3 3.5.0-1 - rtnl_link_vlan_set_id@Base 3.5.0-1 - rtnl_link_vlan_set_id@libnl_3 3.5.0-1 - rtnl_link_vlan_set_ingress_map@Base 3.5.0-1 - rtnl_link_vlan_set_ingress_map@libnl_3 3.5.0-1 - rtnl_link_vlan_set_protocol@Base 3.5.0-1 - rtnl_link_vlan_set_protocol@libnl_3 3.5.0-1 - rtnl_link_vlan_str2flags@Base 3.5.0-1 - rtnl_link_vlan_str2flags@libnl_3 3.5.0-1 - rtnl_link_vlan_unset_flags@Base 3.5.0-1 - rtnl_link_vlan_unset_flags@libnl_3 3.5.0-1 - rtnl_link_vrf_alloc@libnl_3_2_28 3.5.0-1 - rtnl_link_vrf_get_tableid@libnl_3_2_28 3.5.0-1 - rtnl_link_vrf_set_tableid@libnl_3_2_28 3.5.0-1 - rtnl_link_vxlan_alloc@Base 3.5.0-1 - rtnl_link_vxlan_alloc@libnl_3 3.5.0-1 - rtnl_link_vxlan_disable_l2miss@Base 3.5.0-1 - rtnl_link_vxlan_disable_l2miss@libnl_3 3.5.0-1 - rtnl_link_vxlan_disable_l3miss@Base 3.5.0-1 - rtnl_link_vxlan_disable_l3miss@libnl_3 3.5.0-1 - rtnl_link_vxlan_disable_learning@Base 3.5.0-1 - rtnl_link_vxlan_disable_learning@libnl_3 3.5.0-1 - rtnl_link_vxlan_disable_proxy@Base 3.5.0-1 - rtnl_link_vxlan_disable_proxy@libnl_3 3.5.0-1 - rtnl_link_vxlan_disable_rsc@Base 3.5.0-1 - rtnl_link_vxlan_disable_rsc@libnl_3 3.5.0-1 - rtnl_link_vxlan_enable_l2miss@Base 3.5.0-1 - rtnl_link_vxlan_enable_l2miss@libnl_3 3.5.0-1 - rtnl_link_vxlan_enable_l3miss@Base 3.5.0-1 - rtnl_link_vxlan_enable_l3miss@libnl_3 3.5.0-1 - rtnl_link_vxlan_enable_learning@Base 3.5.0-1 - rtnl_link_vxlan_enable_learning@libnl_3 3.5.0-1 - rtnl_link_vxlan_enable_proxy@Base 3.5.0-1 - rtnl_link_vxlan_enable_proxy@libnl_3 3.5.0-1 - rtnl_link_vxlan_enable_rsc@Base 3.5.0-1 - rtnl_link_vxlan_enable_rsc@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_ageing@Base 3.5.0-1 - rtnl_link_vxlan_get_ageing@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_collect_metadata@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_get_flags@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_get_group@Base 3.5.0-1 - rtnl_link_vxlan_get_group@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_id@Base 3.5.0-1 - rtnl_link_vxlan_get_id@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_l2miss@Base 3.5.0-1 - rtnl_link_vxlan_get_l2miss@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_l3miss@Base 3.5.0-1 - rtnl_link_vxlan_get_l3miss@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_label@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_get_learning@Base 3.5.0-1 - rtnl_link_vxlan_get_learning@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_limit@Base 3.5.0-1 - rtnl_link_vxlan_get_limit@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_link@Base 3.5.0-1 - rtnl_link_vxlan_get_link@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_local@Base 3.5.0-1 - rtnl_link_vxlan_get_local@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_port@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_get_port_range@Base 3.5.0-1 - rtnl_link_vxlan_get_port_range@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_proxy@Base 3.5.0-1 - rtnl_link_vxlan_get_proxy@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_remcsum_rx@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_get_remcsum_tx@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_get_rsc@Base 3.5.0-1 - rtnl_link_vxlan_get_rsc@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_tos@Base 3.5.0-1 - rtnl_link_vxlan_get_tos@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_ttl@Base 3.5.0-1 - rtnl_link_vxlan_get_ttl@libnl_3 3.5.0-1 - rtnl_link_vxlan_get_udp_csum@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_get_udp_zero_csum6_rx@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_get_udp_zero_csum6_tx@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_set_ageing@Base 3.5.0-1 - rtnl_link_vxlan_set_ageing@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_collect_metadata@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_set_flags@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_set_group@Base 3.5.0-1 - rtnl_link_vxlan_set_group@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_id@Base 3.5.0-1 - rtnl_link_vxlan_set_id@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_l2miss@Base 3.5.0-1 - rtnl_link_vxlan_set_l2miss@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_l3miss@Base 3.5.0-1 - rtnl_link_vxlan_set_l3miss@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_label@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_set_learning@Base 3.5.0-1 - rtnl_link_vxlan_set_learning@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_limit@Base 3.5.0-1 - rtnl_link_vxlan_set_limit@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_link@Base 3.5.0-1 - rtnl_link_vxlan_set_link@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_local@Base 3.5.0-1 - rtnl_link_vxlan_set_local@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_port@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_set_port_range@Base 3.5.0-1 - rtnl_link_vxlan_set_port_range@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_proxy@Base 3.5.0-1 - rtnl_link_vxlan_set_proxy@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_remcsum_rx@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_set_remcsum_tx@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_set_rsc@Base 3.5.0-1 - rtnl_link_vxlan_set_rsc@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_tos@Base 3.5.0-1 - rtnl_link_vxlan_set_tos@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_ttl@Base 3.5.0-1 - rtnl_link_vxlan_set_ttl@libnl_3 3.5.0-1 - rtnl_link_vxlan_set_udp_csum@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_set_udp_zero_csum6_rx@libnl_3_2_29 3.5.0-1 - rtnl_link_vxlan_set_udp_zero_csum6_tx@libnl_3_2_29 3.5.0-1 - rtnl_link_xfrmi_alloc@libnl_3_5 3.5.0-1 - rtnl_link_xfrmi_get_if_id@libnl_3_5 3.5.0-1 - rtnl_link_xfrmi_get_link@libnl_3_5 3.5.0-1 - rtnl_link_xfrmi_set_if_id@libnl_3_5 3.5.0-1 - rtnl_link_xfrmi_set_link@libnl_3_5 3.5.0-1 - rtnl_mall_append_action@libnl_3_5 3.5.0-1 - rtnl_mall_del_action@libnl_3_5 3.5.0-1 - rtnl_mall_get_classid@libnl_3_5 3.5.0-1 - rtnl_mall_get_first_action@libnl_3_5 3.5.0-1 - rtnl_mall_get_flags@libnl_3_5 3.5.0-1 - rtnl_mall_set_classid@libnl_3_5 3.5.0-1 - rtnl_mall_set_flags@libnl_3_5 3.5.0-1 - rtnl_meta_value_alloc_id@Base 3.5.0-1 - rtnl_meta_value_alloc_id@libnl_3 3.5.0-1 - rtnl_meta_value_alloc_int@Base 3.5.0-1 - rtnl_meta_value_alloc_int@libnl_3 3.5.0-1 - rtnl_meta_value_alloc_var@Base 3.5.0-1 - rtnl_meta_value_alloc_var@libnl_3 3.5.0-1 - rtnl_meta_value_put@Base 3.5.0-1 - rtnl_meta_value_put@libnl_3 3.5.0-1 - rtnl_mirred_get_action@Base 3.5.0-1 - rtnl_mirred_get_action@libnl_3 3.5.0-1 - rtnl_mirred_get_ifindex@Base 3.5.0-1 - rtnl_mirred_get_ifindex@libnl_3 3.5.0-1 - rtnl_mirred_get_policy@Base 3.5.0-1 - rtnl_mirred_get_policy@libnl_3 3.5.0-1 - rtnl_mirred_set_action@Base 3.5.0-1 - rtnl_mirred_set_action@libnl_3 3.5.0-1 - rtnl_mirred_set_ifindex@Base 3.5.0-1 - rtnl_mirred_set_ifindex@libnl_3 3.5.0-1 - rtnl_mirred_set_policy@Base 3.5.0-1 - rtnl_mirred_set_policy@libnl_3 3.5.0-1 - rtnl_neigh_add@Base 3.5.0-1 - rtnl_neigh_add@libnl_3 3.5.0-1 - rtnl_neigh_alloc@Base 3.5.0-1 - rtnl_neigh_alloc@libnl_3 3.5.0-1 - rtnl_neigh_alloc_cache@Base 3.5.0-1 - rtnl_neigh_alloc_cache@libnl_3 3.5.0-1 - rtnl_neigh_alloc_cache_flags@libnl_3_2_28 3.5.0-1 - rtnl_neigh_build_add_request@Base 3.5.0-1 - rtnl_neigh_build_add_request@libnl_3 3.5.0-1 - rtnl_neigh_build_delete_request@Base 3.5.0-1 - rtnl_neigh_build_delete_request@libnl_3 3.5.0-1 - rtnl_neigh_delete@Base 3.5.0-1 - rtnl_neigh_delete@libnl_3 3.5.0-1 - rtnl_neigh_flags2str@Base 3.5.0-1 - rtnl_neigh_flags2str@libnl_3 3.5.0-1 - rtnl_neigh_get@Base 3.5.0-1 - rtnl_neigh_get@libnl_3 3.5.0-1 - rtnl_neigh_get_by_vlan@libnl_3_5 3.5.0-1 - rtnl_neigh_get_dst@Base 3.5.0-1 - rtnl_neigh_get_dst@libnl_3 3.5.0-1 - rtnl_neigh_get_family@Base 3.5.0-1 - rtnl_neigh_get_family@libnl_3 3.5.0-1 - rtnl_neigh_get_flags@Base 3.5.0-1 - rtnl_neigh_get_flags@libnl_3 3.5.0-1 - rtnl_neigh_get_ifindex@Base 3.5.0-1 - rtnl_neigh_get_ifindex@libnl_3 3.5.0-1 - rtnl_neigh_get_lladdr@Base 3.5.0-1 - rtnl_neigh_get_lladdr@libnl_3 3.5.0-1 - rtnl_neigh_get_master@libnl_3_5 3.5.0-1 - rtnl_neigh_get_state@Base 3.5.0-1 - rtnl_neigh_get_state@libnl_3 3.5.0-1 - rtnl_neigh_get_type@Base 3.5.0-1 - rtnl_neigh_get_type@libnl_3 3.5.0-1 - rtnl_neigh_get_vlan@Base 3.5.0-1 - rtnl_neigh_get_vlan@libnl_3_2_26 3.5.0-1 - rtnl_neigh_parse@Base 3.5.0-1 - rtnl_neigh_parse@libnl_3 3.5.0-1 - rtnl_neigh_put@Base 3.5.0-1 - rtnl_neigh_put@libnl_3 3.5.0-1 - rtnl_neigh_set_dst@Base 3.5.0-1 - rtnl_neigh_set_dst@libnl_3 3.5.0-1 - rtnl_neigh_set_family@Base 3.5.0-1 - rtnl_neigh_set_family@libnl_3 3.5.0-1 - rtnl_neigh_set_flags@Base 3.5.0-1 - rtnl_neigh_set_flags@libnl_3 3.5.0-1 - rtnl_neigh_set_ifindex@Base 3.5.0-1 - rtnl_neigh_set_ifindex@libnl_3 3.5.0-1 - rtnl_neigh_set_lladdr@Base 3.5.0-1 - rtnl_neigh_set_lladdr@libnl_3 3.5.0-1 - rtnl_neigh_set_master@libnl_3_5 3.5.0-1 - rtnl_neigh_set_state@Base 3.5.0-1 - rtnl_neigh_set_state@libnl_3 3.5.0-1 - rtnl_neigh_set_type@Base 3.5.0-1 - rtnl_neigh_set_type@libnl_3 3.5.0-1 - rtnl_neigh_set_vlan@Base 3.5.0-1 - rtnl_neigh_set_vlan@libnl_3_2_26 3.5.0-1 - rtnl_neigh_state2str@Base 3.5.0-1 - rtnl_neigh_state2str@libnl_3 3.5.0-1 - rtnl_neigh_str2flag@Base 3.5.0-1 - rtnl_neigh_str2flag@libnl_3 3.5.0-1 - rtnl_neigh_str2state@Base 3.5.0-1 - rtnl_neigh_str2state@libnl_3 3.5.0-1 - rtnl_neigh_unset_flags@Base 3.5.0-1 - rtnl_neigh_unset_flags@libnl_3 3.5.0-1 - rtnl_neigh_unset_state@Base 3.5.0-1 - rtnl_neigh_unset_state@libnl_3 3.5.0-1 - rtnl_neightbl_alloc@Base 3.5.0-1 - rtnl_neightbl_alloc@libnl_3 3.5.0-1 - rtnl_neightbl_alloc_cache@Base 3.5.0-1 - rtnl_neightbl_alloc_cache@libnl_3 3.5.0-1 - rtnl_neightbl_build_change_request@Base 3.5.0-1 - rtnl_neightbl_build_change_request@libnl_3 3.5.0-1 - rtnl_neightbl_change@Base 3.5.0-1 - rtnl_neightbl_change@libnl_3 3.5.0-1 - rtnl_neightbl_get@Base 3.5.0-1 - rtnl_neightbl_get@libnl_3 3.5.0-1 - rtnl_neightbl_put@Base 3.5.0-1 - rtnl_neightbl_put@libnl_3 3.5.0-1 - rtnl_neightbl_set_anycast_delay@Base 3.5.0-1 - rtnl_neightbl_set_anycast_delay@libnl_3 3.5.0-1 - rtnl_neightbl_set_app_probes@Base 3.5.0-1 - rtnl_neightbl_set_app_probes@libnl_3 3.5.0-1 - rtnl_neightbl_set_base_reachable_time@Base 3.5.0-1 - rtnl_neightbl_set_base_reachable_time@libnl_3 3.5.0-1 - rtnl_neightbl_set_delay_probe_time@Base 3.5.0-1 - rtnl_neightbl_set_delay_probe_time@libnl_3 3.5.0-1 - rtnl_neightbl_set_dev@Base 3.5.0-1 - rtnl_neightbl_set_dev@libnl_3 3.5.0-1 - rtnl_neightbl_set_family@Base 3.5.0-1 - rtnl_neightbl_set_family@libnl_3 3.5.0-1 - rtnl_neightbl_set_gc_interval@Base 3.5.0-1 - rtnl_neightbl_set_gc_interval@libnl_3 3.5.0-1 - rtnl_neightbl_set_gc_stale_time@Base 3.5.0-1 - rtnl_neightbl_set_gc_stale_time@libnl_3 3.5.0-1 - rtnl_neightbl_set_gc_tresh1@Base 3.5.0-1 - rtnl_neightbl_set_gc_tresh1@libnl_3 3.5.0-1 - rtnl_neightbl_set_gc_tresh2@Base 3.5.0-1 - rtnl_neightbl_set_gc_tresh2@libnl_3 3.5.0-1 - rtnl_neightbl_set_gc_tresh3@Base 3.5.0-1 - rtnl_neightbl_set_gc_tresh3@libnl_3 3.5.0-1 - rtnl_neightbl_set_locktime@Base 3.5.0-1 - rtnl_neightbl_set_locktime@libnl_3 3.5.0-1 - rtnl_neightbl_set_mcast_probes@Base 3.5.0-1 - rtnl_neightbl_set_mcast_probes@libnl_3 3.5.0-1 - rtnl_neightbl_set_name@Base 3.5.0-1 - rtnl_neightbl_set_name@libnl_3 3.5.0-1 - rtnl_neightbl_set_proxy_delay@Base 3.5.0-1 - rtnl_neightbl_set_proxy_delay@libnl_3 3.5.0-1 - rtnl_neightbl_set_proxy_queue_len@Base 3.5.0-1 - rtnl_neightbl_set_proxy_queue_len@libnl_3 3.5.0-1 - rtnl_neightbl_set_queue_len@Base 3.5.0-1 - rtnl_neightbl_set_queue_len@libnl_3 3.5.0-1 - rtnl_neightbl_set_retrans_time@Base 3.5.0-1 - rtnl_neightbl_set_retrans_time@libnl_3 3.5.0-1 - rtnl_neightbl_set_ucast_probes@Base 3.5.0-1 - rtnl_neightbl_set_ucast_probes@libnl_3 3.5.0-1 - rtnl_netconf_get_all@libnl_3_4 3.5.0-1 - rtnl_netconf_get_by_idx@libnl_3_4 3.5.0-1 - rtnl_netconf_get_default@libnl_3_4 3.5.0-1 - rtnl_netconf_get_family@libnl_3_4 3.5.0-1 - rtnl_netconf_get_forwarding@libnl_3_4 3.5.0-1 - rtnl_netconf_get_ifindex@libnl_3_4 3.5.0-1 - rtnl_netconf_get_input@libnl_3_4 3.5.0-1 - rtnl_netconf_get_mc_forwarding@libnl_3_4 3.5.0-1 - rtnl_netconf_get_rp_filter@libnl_3_4 3.5.0-1 - rtnl_netconf_put@libnl_3_4 3.5.0-1 - rtnl_netem_get_corruption_correlation@Base 3.5.0-1 - rtnl_netem_get_corruption_correlation@libnl_3 3.5.0-1 - rtnl_netem_get_corruption_probability@Base 3.5.0-1 - rtnl_netem_get_corruption_probability@libnl_3 3.5.0-1 - rtnl_netem_get_delay@Base 3.5.0-1 - rtnl_netem_get_delay@libnl_3 3.5.0-1 - rtnl_netem_get_delay_correlation@Base 3.5.0-1 - rtnl_netem_get_delay_correlation@libnl_3 3.5.0-1 - rtnl_netem_get_delay_distribution@Base 3.5.0-1 - rtnl_netem_get_delay_distribution@libnl_3 3.5.0-1 - rtnl_netem_get_delay_distribution_size@Base 3.5.0-1 - rtnl_netem_get_delay_distribution_size@libnl_3 3.5.0-1 - rtnl_netem_get_duplicate@Base 3.5.0-1 - rtnl_netem_get_duplicate@libnl_3 3.5.0-1 - rtnl_netem_get_duplicate_correlation@Base 3.5.0-1 - rtnl_netem_get_duplicate_correlation@libnl_3 3.5.0-1 - rtnl_netem_get_gap@Base 3.5.0-1 - rtnl_netem_get_gap@libnl_3 3.5.0-1 - rtnl_netem_get_jitter@Base 3.5.0-1 - rtnl_netem_get_jitter@libnl_3 3.5.0-1 - rtnl_netem_get_limit@Base 3.5.0-1 - rtnl_netem_get_limit@libnl_3 3.5.0-1 - rtnl_netem_get_loss@Base 3.5.0-1 - rtnl_netem_get_loss@libnl_3 3.5.0-1 - rtnl_netem_get_loss_correlation@Base 3.5.0-1 - rtnl_netem_get_loss_correlation@libnl_3 3.5.0-1 - rtnl_netem_get_reorder_correlation@Base 3.5.0-1 - rtnl_netem_get_reorder_correlation@libnl_3 3.5.0-1 - rtnl_netem_get_reorder_probability@Base 3.5.0-1 - rtnl_netem_get_reorder_probability@libnl_3 3.5.0-1 - rtnl_netem_set_corruption_correlation@Base 3.5.0-1 - rtnl_netem_set_corruption_correlation@libnl_3 3.5.0-1 - rtnl_netem_set_corruption_probability@Base 3.5.0-1 - rtnl_netem_set_corruption_probability@libnl_3 3.5.0-1 - rtnl_netem_set_delay@Base 3.5.0-1 - rtnl_netem_set_delay@libnl_3 3.5.0-1 - rtnl_netem_set_delay_correlation@Base 3.5.0-1 - rtnl_netem_set_delay_correlation@libnl_3 3.5.0-1 - rtnl_netem_set_delay_distribution@Base 3.5.0-1 - rtnl_netem_set_delay_distribution@libnl_3 3.5.0-1 - rtnl_netem_set_delay_distribution_data@libnl_3_5 3.5.0-1 - rtnl_netem_set_duplicate@Base 3.5.0-1 - rtnl_netem_set_duplicate@libnl_3 3.5.0-1 - rtnl_netem_set_duplicate_correlation@Base 3.5.0-1 - rtnl_netem_set_duplicate_correlation@libnl_3 3.5.0-1 - rtnl_netem_set_gap@Base 3.5.0-1 - rtnl_netem_set_gap@libnl_3 3.5.0-1 - rtnl_netem_set_jitter@Base 3.5.0-1 - rtnl_netem_set_jitter@libnl_3 3.5.0-1 - rtnl_netem_set_limit@Base 3.5.0-1 - rtnl_netem_set_limit@libnl_3 3.5.0-1 - rtnl_netem_set_loss@Base 3.5.0-1 - rtnl_netem_set_loss@libnl_3 3.5.0-1 - rtnl_netem_set_loss_correlation@Base 3.5.0-1 - rtnl_netem_set_loss_correlation@libnl_3 3.5.0-1 - rtnl_netem_set_reorder_correlation@Base 3.5.0-1 - rtnl_netem_set_reorder_correlation@libnl_3 3.5.0-1 - rtnl_netem_set_reorder_probability@Base 3.5.0-1 - rtnl_netem_set_reorder_probability@libnl_3 3.5.0-1 - rtnl_pktloc_add@Base 3.5.0-1 - rtnl_pktloc_add@libnl_3 3.5.0-1 - rtnl_pktloc_alloc@Base 3.5.0-1 - rtnl_pktloc_alloc@libnl_3 3.5.0-1 - rtnl_pktloc_foreach@Base 3.5.0-1 - rtnl_pktloc_foreach@libnl_3 3.5.0-1 - rtnl_pktloc_lookup@Base 3.5.0-1 - rtnl_pktloc_lookup@libnl_3 3.5.0-1 - rtnl_pktloc_put@Base 3.5.0-1 - rtnl_pktloc_put@libnl_3 3.5.0-1 - rtnl_prio2str@Base 3.5.0-1 - rtnl_prio2str@libnl_3 3.5.0-1 - rtnl_qdisc_add@Base 3.5.0-1 - rtnl_qdisc_add@libnl_3 3.5.0-1 - rtnl_qdisc_alloc@Base 3.5.0-1 - rtnl_qdisc_alloc@libnl_3 3.5.0-1 - rtnl_qdisc_alloc_cache@Base 3.5.0-1 - rtnl_qdisc_alloc_cache@libnl_3 3.5.0-1 - rtnl_qdisc_build_add_request@Base 3.5.0-1 - rtnl_qdisc_build_add_request@libnl_3 3.5.0-1 - rtnl_qdisc_build_change_request@Base 3.5.0-1 - rtnl_qdisc_build_change_request@libnl_3 3.5.0-1 - rtnl_qdisc_build_delete_request@Base 3.5.0-1 - rtnl_qdisc_build_delete_request@libnl_3 3.5.0-1 - rtnl_qdisc_build_update_request@Base 3.5.0-1 - rtnl_qdisc_build_update_request@libnl_3 3.5.0-1 - rtnl_qdisc_change@Base 3.5.0-1 - rtnl_qdisc_change@libnl_3 3.5.0-1 - rtnl_qdisc_delete@Base 3.5.0-1 - rtnl_qdisc_delete@libnl_3 3.5.0-1 - rtnl_qdisc_dsmark_get_default_index@Base 3.5.0-1 - rtnl_qdisc_dsmark_get_default_index@libnl_3 3.5.0-1 - rtnl_qdisc_dsmark_get_indices@Base 3.5.0-1 - rtnl_qdisc_dsmark_get_indices@libnl_3 3.5.0-1 - rtnl_qdisc_dsmark_get_set_tc_index@Base 3.5.0-1 - rtnl_qdisc_dsmark_get_set_tc_index@libnl_3 3.5.0-1 - rtnl_qdisc_dsmark_set_default_index@Base 3.5.0-1 - rtnl_qdisc_dsmark_set_default_index@libnl_3 3.5.0-1 - rtnl_qdisc_dsmark_set_indices@Base 3.5.0-1 - rtnl_qdisc_dsmark_set_indices@libnl_3 3.5.0-1 - rtnl_qdisc_dsmark_set_set_tc_index@Base 3.5.0-1 - rtnl_qdisc_dsmark_set_set_tc_index@libnl_3 3.5.0-1 - rtnl_qdisc_fifo_get_limit@Base 3.5.0-1 - rtnl_qdisc_fifo_get_limit@libnl_3 3.5.0-1 - rtnl_qdisc_fifo_set_limit@Base 3.5.0-1 - rtnl_qdisc_fifo_set_limit@libnl_3 3.5.0-1 - rtnl_qdisc_foreach_child@Base 3.5.0-1 - rtnl_qdisc_foreach_child@libnl_3 3.5.0-1 - rtnl_qdisc_foreach_cls@Base 3.5.0-1 - rtnl_qdisc_foreach_cls@libnl_3 3.5.0-1 - rtnl_qdisc_fq_codel_get_ecn@Base 3.5.0-1 - rtnl_qdisc_fq_codel_get_ecn@libnl_3 3.5.0-1 - rtnl_qdisc_fq_codel_get_flows@Base 3.5.0-1 - rtnl_qdisc_fq_codel_get_flows@libnl_3 3.5.0-1 - rtnl_qdisc_fq_codel_get_interval@Base 3.5.0-1 - rtnl_qdisc_fq_codel_get_interval@libnl_3 3.5.0-1 - rtnl_qdisc_fq_codel_get_limit@Base 3.5.0-1 - rtnl_qdisc_fq_codel_get_limit@libnl_3 3.5.0-1 - rtnl_qdisc_fq_codel_get_quantum@Base 3.5.0-1 - rtnl_qdisc_fq_codel_get_quantum@libnl_3 3.5.0-1 - rtnl_qdisc_fq_codel_get_target@Base 3.5.0-1 - rtnl_qdisc_fq_codel_get_target@libnl_3 3.5.0-1 - rtnl_qdisc_fq_codel_set_ecn@Base 3.5.0-1 - rtnl_qdisc_fq_codel_set_ecn@libnl_3 3.5.0-1 - rtnl_qdisc_fq_codel_set_flows@Base 3.5.0-1 - rtnl_qdisc_fq_codel_set_flows@libnl_3 3.5.0-1 - rtnl_qdisc_fq_codel_set_interval@Base 3.5.0-1 - rtnl_qdisc_fq_codel_set_interval@libnl_3 3.5.0-1 - rtnl_qdisc_fq_codel_set_limit@Base 3.5.0-1 - rtnl_qdisc_fq_codel_set_limit@libnl_3 3.5.0-1 - rtnl_qdisc_fq_codel_set_quantum@Base 3.5.0-1 - rtnl_qdisc_fq_codel_set_quantum@libnl_3 3.5.0-1 - rtnl_qdisc_fq_codel_set_target@Base 3.5.0-1 - rtnl_qdisc_fq_codel_set_target@libnl_3 3.5.0-1 - rtnl_qdisc_get@Base 3.5.0-1 - rtnl_qdisc_get@libnl_3 3.5.0-1 - rtnl_qdisc_get_by_parent@Base 3.5.0-1 - rtnl_qdisc_get_by_parent@libnl_3 3.5.0-1 - rtnl_qdisc_hfsc_get_defcls@Base 3.5.0-1 - rtnl_qdisc_hfsc_get_defcls@libnl_3 3.5.0-1 - rtnl_qdisc_hfsc_set_defcls@Base 3.5.0-1 - rtnl_qdisc_hfsc_set_defcls@libnl_3 3.5.0-1 - rtnl_qdisc_mqprio_get_hw_offload@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_get_max_rate@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_get_min_rate@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_get_mode@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_get_num_tc@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_get_priomap@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_get_queue@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_get_shaper@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_hw_offload@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_set_max_rate@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_set_min_rate@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_set_mode@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_set_num_tc@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_set_priomap@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_set_queue@libnl_3_5 3.5.0-1 - rtnl_qdisc_mqprio_set_shaper@libnl_3_5 3.5.0-1 - rtnl_qdisc_plug_buffer@Base 3.5.0-1 - rtnl_qdisc_plug_buffer@libnl_3 3.5.0-1 - rtnl_qdisc_plug_release_indefinite@Base 3.5.0-1 - rtnl_qdisc_plug_release_indefinite@libnl_3 3.5.0-1 - rtnl_qdisc_plug_release_one@Base 3.5.0-1 - rtnl_qdisc_plug_release_one@libnl_3 3.5.0-1 - rtnl_qdisc_plug_set_limit@Base 3.5.0-1 - rtnl_qdisc_plug_set_limit@libnl_3 3.5.0-1 - rtnl_qdisc_prio_get_bands@Base 3.5.0-1 - rtnl_qdisc_prio_get_bands@libnl_3 3.5.0-1 - rtnl_qdisc_prio_get_priomap@Base 3.5.0-1 - rtnl_qdisc_prio_get_priomap@libnl_3 3.5.0-1 - rtnl_qdisc_prio_set_bands@Base 3.5.0-1 - rtnl_qdisc_prio_set_bands@libnl_3 3.5.0-1 - rtnl_qdisc_prio_set_priomap@Base 3.5.0-1 - rtnl_qdisc_prio_set_priomap@libnl_3 3.5.0-1 - rtnl_qdisc_put@Base 3.5.0-1 - rtnl_qdisc_put@libnl_3 3.5.0-1 - rtnl_qdisc_tbf_get_limit@Base 3.5.0-1 - rtnl_qdisc_tbf_get_limit@libnl_3 3.5.0-1 - rtnl_qdisc_tbf_get_peakrate@Base 3.5.0-1 - rtnl_qdisc_tbf_get_peakrate@libnl_3 3.5.0-1 - rtnl_qdisc_tbf_get_peakrate_bucket@Base 3.5.0-1 - rtnl_qdisc_tbf_get_peakrate_bucket@libnl_3 3.5.0-1 - rtnl_qdisc_tbf_get_peakrate_cell@Base 3.5.0-1 - rtnl_qdisc_tbf_get_peakrate_cell@libnl_3 3.5.0-1 - rtnl_qdisc_tbf_get_rate@Base 3.5.0-1 - rtnl_qdisc_tbf_get_rate@libnl_3 3.5.0-1 - rtnl_qdisc_tbf_get_rate_bucket@Base 3.5.0-1 - rtnl_qdisc_tbf_get_rate_bucket@libnl_3 3.5.0-1 - rtnl_qdisc_tbf_get_rate_cell@Base 3.5.0-1 - rtnl_qdisc_tbf_get_rate_cell@libnl_3 3.5.0-1 - rtnl_qdisc_tbf_set_limit@Base 3.5.0-1 - rtnl_qdisc_tbf_set_limit@libnl_3 3.5.0-1 - rtnl_qdisc_tbf_set_limit_by_latency@Base 3.5.0-1 - rtnl_qdisc_tbf_set_limit_by_latency@libnl_3 3.5.0-1 - rtnl_qdisc_tbf_set_peakrate@Base 3.5.0-1 - rtnl_qdisc_tbf_set_peakrate@libnl_3 3.5.0-1 - rtnl_qdisc_tbf_set_rate@Base 3.5.0-1 - rtnl_qdisc_tbf_set_rate@libnl_3 3.5.0-1 - rtnl_qdisc_update@Base 3.5.0-1 - rtnl_qdisc_update@libnl_3 3.5.0-1 - rtnl_realms2str@Base 3.5.0-1 - rtnl_realms2str@libnl_3 3.5.0-1 - rtnl_red_get_limit@Base 3.5.0-1 - rtnl_red_get_limit@libnl_3 3.5.0-1 - rtnl_red_set_limit@Base 3.5.0-1 - rtnl_red_set_limit@libnl_3 3.5.0-1 - rtnl_route_add@Base 3.5.0-1 - rtnl_route_add@libnl_3 3.5.0-1 - rtnl_route_add_nexthop@Base 3.5.0-1 - rtnl_route_add_nexthop@libnl_3 3.5.0-1 - rtnl_route_alloc@Base 3.5.0-1 - rtnl_route_alloc@libnl_3 3.5.0-1 - rtnl_route_alloc_cache@Base 3.5.0-1 - rtnl_route_alloc_cache@libnl_3 3.5.0-1 - rtnl_route_build_add_request@Base 3.5.0-1 - rtnl_route_build_add_request@libnl_3 3.5.0-1 - rtnl_route_build_del_request@Base 3.5.0-1 - rtnl_route_build_del_request@libnl_3 3.5.0-1 - rtnl_route_build_msg@Base 3.5.0-1 - rtnl_route_build_msg@libnl_3 3.5.0-1 - rtnl_route_delete@Base 3.5.0-1 - rtnl_route_delete@libnl_3 3.5.0-1 - rtnl_route_foreach_nexthop@Base 3.5.0-1 - rtnl_route_foreach_nexthop@libnl_3 3.5.0-1 - rtnl_route_get@Base 3.5.0-1 - rtnl_route_get@libnl_3 3.5.0-1 - rtnl_route_get_dst@Base 3.5.0-1 - rtnl_route_get_dst@libnl_3 3.5.0-1 - rtnl_route_get_family@Base 3.5.0-1 - rtnl_route_get_family@libnl_3 3.5.0-1 - rtnl_route_get_flags@Base 3.5.0-1 - rtnl_route_get_flags@libnl_3 3.5.0-1 - rtnl_route_get_iif@Base 3.5.0-1 - rtnl_route_get_iif@libnl_3 3.5.0-1 - rtnl_route_get_metric@Base 3.5.0-1 - rtnl_route_get_metric@libnl_3 3.5.0-1 - rtnl_route_get_nexthops@Base 3.5.0-1 - rtnl_route_get_nexthops@libnl_3 3.5.0-1 - rtnl_route_get_nnexthops@Base 3.5.0-1 - rtnl_route_get_nnexthops@libnl_3 3.5.0-1 - rtnl_route_get_pref_src@Base 3.5.0-1 - rtnl_route_get_pref_src@libnl_3 3.5.0-1 - rtnl_route_get_priority@Base 3.5.0-1 - rtnl_route_get_priority@libnl_3 3.5.0-1 - rtnl_route_get_protocol@Base 3.5.0-1 - rtnl_route_get_protocol@libnl_3 3.5.0-1 - rtnl_route_get_scope@Base 3.5.0-1 - rtnl_route_get_scope@libnl_3 3.5.0-1 - rtnl_route_get_src@Base 3.5.0-1 - rtnl_route_get_src@libnl_3 3.5.0-1 - rtnl_route_get_table@Base 3.5.0-1 - rtnl_route_get_table@libnl_3 3.5.0-1 - rtnl_route_get_tos@Base 3.5.0-1 - rtnl_route_get_tos@libnl_3 3.5.0-1 - rtnl_route_get_ttl_propagate@libnl_3_4 3.5.0-1 - rtnl_route_get_type@Base 3.5.0-1 - rtnl_route_get_type@libnl_3 3.5.0-1 - rtnl_route_guess_scope@Base 3.5.0-1 - rtnl_route_guess_scope@libnl_3 3.5.0-1 - rtnl_route_metric2str@Base 3.5.0-1 - rtnl_route_metric2str@libnl_3 3.5.0-1 - rtnl_route_nexthop_n@Base 3.5.0-1 - rtnl_route_nexthop_n@libnl_3 3.5.0-1 - rtnl_route_nh_alloc@Base 3.5.0-1 - rtnl_route_nh_alloc@libnl_3 3.5.0-1 - rtnl_route_nh_clone@Base 3.5.0-1 - rtnl_route_nh_clone@libnl_3 3.5.0-1 - rtnl_route_nh_compare@Base 3.5.0-1 - rtnl_route_nh_compare@libnl_3 3.5.0-1 - rtnl_route_nh_dump@Base 3.5.0-1 - rtnl_route_nh_dump@libnl_3 3.5.0-1 - rtnl_route_nh_encap_mpls@libnl_3_4 3.5.0-1 - rtnl_route_nh_flags2str@Base 3.5.0-1 - rtnl_route_nh_flags2str@libnl_3 3.5.0-1 - rtnl_route_nh_free@Base 3.5.0-1 - rtnl_route_nh_free@libnl_3 3.5.0-1 - rtnl_route_nh_get_flags@Base 3.5.0-1 - rtnl_route_nh_get_flags@libnl_3 3.5.0-1 - rtnl_route_nh_get_gateway@Base 3.5.0-1 - rtnl_route_nh_get_gateway@libnl_3 3.5.0-1 - rtnl_route_nh_get_ifindex@Base 3.5.0-1 - rtnl_route_nh_get_ifindex@libnl_3 3.5.0-1 - rtnl_route_nh_get_newdst@libnl_3_4 3.5.0-1 - rtnl_route_nh_get_realms@Base 3.5.0-1 - rtnl_route_nh_get_realms@libnl_3 3.5.0-1 - rtnl_route_nh_get_via@libnl_3_4 3.5.0-1 - rtnl_route_nh_get_weight@Base 3.5.0-1 - rtnl_route_nh_get_weight@libnl_3 3.5.0-1 - rtnl_route_nh_set_flags@Base 3.5.0-1 - rtnl_route_nh_set_flags@libnl_3 3.5.0-1 - rtnl_route_nh_set_gateway@Base 3.5.0-1 - rtnl_route_nh_set_gateway@libnl_3 3.5.0-1 - rtnl_route_nh_set_ifindex@Base 3.5.0-1 - rtnl_route_nh_set_ifindex@libnl_3 3.5.0-1 - rtnl_route_nh_set_newdst@libnl_3_4 3.5.0-1 - rtnl_route_nh_set_realms@Base 3.5.0-1 - rtnl_route_nh_set_realms@libnl_3 3.5.0-1 - rtnl_route_nh_set_via@libnl_3_4 3.5.0-1 - rtnl_route_nh_set_weight@Base 3.5.0-1 - rtnl_route_nh_set_weight@libnl_3 3.5.0-1 - rtnl_route_nh_str2flags@Base 3.5.0-1 - rtnl_route_nh_str2flags@libnl_3 3.5.0-1 - rtnl_route_nh_unset_flags@Base 3.5.0-1 - rtnl_route_nh_unset_flags@libnl_3 3.5.0-1 - rtnl_route_parse@Base 3.5.0-1 - rtnl_route_parse@libnl_3 3.5.0-1 - rtnl_route_proto2str@Base 3.5.0-1 - rtnl_route_proto2str@libnl_3 3.5.0-1 - rtnl_route_put@Base 3.5.0-1 - rtnl_route_put@libnl_3 3.5.0-1 - rtnl_route_read_protocol_names@Base 3.5.0-1 - rtnl_route_read_protocol_names@libnl_3 3.5.0-1 - rtnl_route_read_table_names@Base 3.5.0-1 - rtnl_route_read_table_names@libnl_3 3.5.0-1 - rtnl_route_remove_nexthop@Base 3.5.0-1 - rtnl_route_remove_nexthop@libnl_3 3.5.0-1 - rtnl_route_set_dst@Base 3.5.0-1 - rtnl_route_set_dst@libnl_3 3.5.0-1 - rtnl_route_set_family@Base 3.5.0-1 - rtnl_route_set_family@libnl_3 3.5.0-1 - rtnl_route_set_flags@Base 3.5.0-1 - rtnl_route_set_flags@libnl_3 3.5.0-1 - rtnl_route_set_iif@Base 3.5.0-1 - rtnl_route_set_iif@libnl_3 3.5.0-1 - rtnl_route_set_metric@Base 3.5.0-1 - rtnl_route_set_metric@libnl_3 3.5.0-1 - rtnl_route_set_pref_src@Base 3.5.0-1 - rtnl_route_set_pref_src@libnl_3 3.5.0-1 - rtnl_route_set_priority@Base 3.5.0-1 - rtnl_route_set_priority@libnl_3 3.5.0-1 - rtnl_route_set_protocol@Base 3.5.0-1 - rtnl_route_set_protocol@libnl_3 3.5.0-1 - rtnl_route_set_scope@Base 3.5.0-1 - rtnl_route_set_scope@libnl_3 3.5.0-1 - rtnl_route_set_src@Base 3.5.0-1 - rtnl_route_set_src@libnl_3 3.5.0-1 - rtnl_route_set_table@Base 3.5.0-1 - rtnl_route_set_table@libnl_3 3.5.0-1 - rtnl_route_set_tos@Base 3.5.0-1 - rtnl_route_set_tos@libnl_3 3.5.0-1 - rtnl_route_set_ttl_propagate@libnl_3_4 3.5.0-1 - rtnl_route_set_type@Base 3.5.0-1 - rtnl_route_set_type@libnl_3 3.5.0-1 - rtnl_route_str2metric@Base 3.5.0-1 - rtnl_route_str2metric@libnl_3 3.5.0-1 - rtnl_route_str2proto@Base 3.5.0-1 - rtnl_route_str2proto@libnl_3 3.5.0-1 - rtnl_route_str2table@Base 3.5.0-1 - rtnl_route_str2table@libnl_3 3.5.0-1 - rtnl_route_table2str@Base 3.5.0-1 - rtnl_route_table2str@libnl_3 3.5.0-1 - rtnl_route_unset_flags@Base 3.5.0-1 - rtnl_route_unset_flags@libnl_3 3.5.0-1 - rtnl_route_unset_metric@Base 3.5.0-1 - rtnl_route_unset_metric@libnl_3 3.5.0-1 - rtnl_rule_add@Base 3.5.0-1 - rtnl_rule_add@libnl_3 3.5.0-1 - rtnl_rule_alloc@Base 3.5.0-1 - rtnl_rule_alloc@libnl_3 3.5.0-1 - rtnl_rule_alloc_cache@Base 3.5.0-1 - rtnl_rule_alloc_cache@libnl_3 3.5.0-1 - rtnl_rule_build_add_request@Base 3.5.0-1 - rtnl_rule_build_add_request@libnl_3 3.5.0-1 - rtnl_rule_build_delete_request@Base 3.5.0-1 - rtnl_rule_build_delete_request@libnl_3 3.5.0-1 - rtnl_rule_delete@Base 3.5.0-1 - rtnl_rule_delete@libnl_3 3.5.0-1 - rtnl_rule_get_action@Base 3.5.0-1 - rtnl_rule_get_action@libnl_3 3.5.0-1 - rtnl_rule_get_dport@libnl_3_5 3.5.0-1 - rtnl_rule_get_dsfield@Base 3.5.0-1 - rtnl_rule_get_dsfield@libnl_3 3.5.0-1 - rtnl_rule_get_dst@Base 3.5.0-1 - rtnl_rule_get_dst@libnl_3 3.5.0-1 - rtnl_rule_get_family@Base 3.5.0-1 - rtnl_rule_get_family@libnl_3 3.5.0-1 - rtnl_rule_get_goto@Base 3.5.0-1 - rtnl_rule_get_goto@libnl_3 3.5.0-1 - rtnl_rule_get_iif@Base 3.5.0-1 - rtnl_rule_get_iif@libnl_3 3.5.0-1 - rtnl_rule_get_ipproto@libnl_3_5 3.5.0-1 - rtnl_rule_get_l3mdev@libnl_3_4 3.5.0-1 - rtnl_rule_get_mark@Base 3.5.0-1 - rtnl_rule_get_mark@libnl_3 3.5.0-1 - rtnl_rule_get_mask@Base 3.5.0-1 - rtnl_rule_get_mask@libnl_3 3.5.0-1 - rtnl_rule_get_oif@Base 3.5.0-1 - rtnl_rule_get_oif@libnl_3 3.5.0-1 - rtnl_rule_get_prio@Base 3.5.0-1 - rtnl_rule_get_prio@libnl_3 3.5.0-1 - rtnl_rule_get_protocol@libnl_3_5 3.5.0-1 - rtnl_rule_get_realms@Base 3.5.0-1 - rtnl_rule_get_realms@libnl_3 3.5.0-1 - rtnl_rule_get_sport@libnl_3_5 3.5.0-1 - rtnl_rule_get_src@Base 3.5.0-1 - rtnl_rule_get_src@libnl_3 3.5.0-1 - rtnl_rule_get_table@Base 3.5.0-1 - rtnl_rule_get_table@libnl_3 3.5.0-1 - rtnl_rule_put@Base 3.5.0-1 - rtnl_rule_put@libnl_3 3.5.0-1 - rtnl_rule_set_action@Base 3.5.0-1 - rtnl_rule_set_action@libnl_3 3.5.0-1 - rtnl_rule_set_dport@libnl_3_5 3.5.0-1 - rtnl_rule_set_dport_range@libnl_3_5 3.5.0-1 - rtnl_rule_set_dsfield@Base 3.5.0-1 - rtnl_rule_set_dsfield@libnl_3 3.5.0-1 - rtnl_rule_set_dst@Base 3.5.0-1 - rtnl_rule_set_dst@libnl_3 3.5.0-1 - rtnl_rule_set_family@Base 3.5.0-1 - rtnl_rule_set_family@libnl_3 3.5.0-1 - rtnl_rule_set_goto@Base 3.5.0-1 - rtnl_rule_set_goto@libnl_3 3.5.0-1 - rtnl_rule_set_iif@Base 3.5.0-1 - rtnl_rule_set_iif@libnl_3 3.5.0-1 - rtnl_rule_set_ipproto@libnl_3_5 3.5.0-1 - rtnl_rule_set_l3mdev@libnl_3_4 3.5.0-1 - rtnl_rule_set_mark@Base 3.5.0-1 - rtnl_rule_set_mark@libnl_3 3.5.0-1 - rtnl_rule_set_mask@Base 3.5.0-1 - rtnl_rule_set_mask@libnl_3 3.5.0-1 - rtnl_rule_set_oif@Base 3.5.0-1 - rtnl_rule_set_oif@libnl_3 3.5.0-1 - rtnl_rule_set_prio@Base 3.5.0-1 - rtnl_rule_set_prio@libnl_3 3.5.0-1 - rtnl_rule_set_protocol@libnl_3_5 3.5.0-1 - rtnl_rule_set_realms@Base 3.5.0-1 - rtnl_rule_set_realms@libnl_3 3.5.0-1 - rtnl_rule_set_sport@libnl_3_5 3.5.0-1 - rtnl_rule_set_sport_range@libnl_3_5 3.5.0-1 - rtnl_rule_set_src@Base 3.5.0-1 - rtnl_rule_set_src@libnl_3 3.5.0-1 - rtnl_rule_set_table@Base 3.5.0-1 - rtnl_rule_set_table@libnl_3 3.5.0-1 - rtnl_scope2str@Base 3.5.0-1 - rtnl_scope2str@libnl_3 3.5.0-1 - rtnl_sfq_get_divisor@Base 3.5.0-1 - rtnl_sfq_get_divisor@libnl_3 3.5.0-1 - rtnl_sfq_get_limit@Base 3.5.0-1 - rtnl_sfq_get_limit@libnl_3 3.5.0-1 - rtnl_sfq_get_perturb@Base 3.5.0-1 - rtnl_sfq_get_perturb@libnl_3 3.5.0-1 - rtnl_sfq_get_quantum@Base 3.5.0-1 - rtnl_sfq_get_quantum@libnl_3 3.5.0-1 - rtnl_sfq_set_limit@Base 3.5.0-1 - rtnl_sfq_set_limit@libnl_3 3.5.0-1 - rtnl_sfq_set_perturb@Base 3.5.0-1 - rtnl_sfq_set_perturb@libnl_3 3.5.0-1 - rtnl_sfq_set_quantum@Base 3.5.0-1 - rtnl_sfq_set_quantum@libnl_3 3.5.0-1 - rtnl_skbedit_get_action@Base 3.5.0-1 - rtnl_skbedit_get_action@libnl_3_2_26 3.5.0-1 - rtnl_skbedit_get_mark@Base 3.5.0-1 - rtnl_skbedit_get_mark@libnl_3_2_26 3.5.0-1 - rtnl_skbedit_get_priority@Base 3.5.0-1 - rtnl_skbedit_get_priority@libnl_3_2_26 3.5.0-1 - rtnl_skbedit_get_queue_mapping@Base 3.5.0-1 - rtnl_skbedit_get_queue_mapping@libnl_3_2_26 3.5.0-1 - rtnl_skbedit_set_action@Base 3.5.0-1 - rtnl_skbedit_set_action@libnl_3_2_26 3.5.0-1 - rtnl_skbedit_set_mark@Base 3.5.0-1 - rtnl_skbedit_set_mark@libnl_3_2_26 3.5.0-1 - rtnl_skbedit_set_priority@Base 3.5.0-1 - rtnl_skbedit_set_priority@libnl_3_2_26 3.5.0-1 - rtnl_skbedit_set_queue_mapping@Base 3.5.0-1 - rtnl_skbedit_set_queue_mapping@libnl_3_2_26 3.5.0-1 - rtnl_str2prio@Base 3.5.0-1 - rtnl_str2prio@libnl_3 3.5.0-1 - rtnl_str2scope@Base 3.5.0-1 - rtnl_str2scope@libnl_3 3.5.0-1 - rtnl_tc_build_rate_table@Base 3.5.0-1 - rtnl_tc_build_rate_table@libnl_3 3.5.0-1 - rtnl_tc_calc_bufsize@Base 3.5.0-1 - rtnl_tc_calc_bufsize@libnl_3 3.5.0-1 - rtnl_tc_calc_cell_log@Base 3.5.0-1 - rtnl_tc_calc_cell_log@libnl_3 3.5.0-1 - rtnl_tc_calc_txtime@Base 3.5.0-1 - rtnl_tc_calc_txtime@libnl_3 3.5.0-1 - rtnl_tc_clone@Base 3.5.0-1 - rtnl_tc_clone@libnl_3 3.5.0-1 - rtnl_tc_compare@Base 3.5.0-1 - rtnl_tc_compare@libnl_3 3.5.0-1 - rtnl_tc_data@Base 3.5.0-1 - rtnl_tc_data@libnl_3 3.5.0-1 - rtnl_tc_data_check@Base 3.5.0-1 - rtnl_tc_data_check@libnl_3 3.5.0-1 - rtnl_tc_data_peek@Base 3.5.0-1 - rtnl_tc_dump_details@Base 3.5.0-1 - rtnl_tc_dump_details@libnl_3 3.5.0-1 - rtnl_tc_dump_line@Base 3.5.0-1 - rtnl_tc_dump_line@libnl_3 3.5.0-1 - rtnl_tc_dump_stats@Base 3.5.0-1 - rtnl_tc_dump_stats@libnl_3 3.5.0-1 - rtnl_tc_free_data@Base 3.5.0-1 - rtnl_tc_free_data@libnl_3 3.5.0-1 - rtnl_tc_get_chain@libnl_3_5 3.5.0-1 - rtnl_tc_get_handle@Base 3.5.0-1 - rtnl_tc_get_handle@libnl_3 3.5.0-1 - rtnl_tc_get_ifindex@Base 3.5.0-1 - rtnl_tc_get_ifindex@libnl_3 3.5.0-1 - rtnl_tc_get_kind@Base 3.5.0-1 - rtnl_tc_get_kind@libnl_3 3.5.0-1 - rtnl_tc_get_link@Base 3.5.0-1 - rtnl_tc_get_link@libnl_3 3.5.0-1 - rtnl_tc_get_linktype@Base 3.5.0-1 - rtnl_tc_get_linktype@libnl_3 3.5.0-1 - rtnl_tc_get_mpu@Base 3.5.0-1 - rtnl_tc_get_mpu@libnl_3 3.5.0-1 - rtnl_tc_get_mtu@Base 3.5.0-1 - rtnl_tc_get_mtu@libnl_3 3.5.0-1 - rtnl_tc_get_ops@Base 3.5.0-1 - rtnl_tc_get_ops@libnl_3 3.5.0-1 - rtnl_tc_get_overhead@Base 3.5.0-1 - rtnl_tc_get_overhead@libnl_3 3.5.0-1 - rtnl_tc_get_parent@Base 3.5.0-1 - rtnl_tc_get_parent@libnl_3 3.5.0-1 - rtnl_tc_get_stat@Base 3.5.0-1 - rtnl_tc_get_stat@libnl_3 3.5.0-1 - rtnl_tc_handle2str@Base 3.5.0-1 - rtnl_tc_handle2str@libnl_3 3.5.0-1 - rtnl_tc_lookup_ops@Base 3.5.0-1 - rtnl_tc_lookup_ops@libnl_3 3.5.0-1 - rtnl_tc_msg_build@Base 3.5.0-1 - rtnl_tc_msg_build@libnl_3 3.5.0-1 - rtnl_tc_msg_parse@Base 3.5.0-1 - rtnl_tc_msg_parse@libnl_3 3.5.0-1 - rtnl_tc_read_classid_file@Base 3.5.0-1 - rtnl_tc_read_classid_file@libnl_3 3.5.0-1 - rtnl_tc_register@Base 3.5.0-1 - rtnl_tc_register@libnl_3 3.5.0-1 - rtnl_tc_set_chain@libnl_3_5 3.5.0-1 - rtnl_tc_set_handle@Base 3.5.0-1 - rtnl_tc_set_handle@libnl_3 3.5.0-1 - rtnl_tc_set_ifindex@Base 3.5.0-1 - rtnl_tc_set_ifindex@libnl_3 3.5.0-1 - rtnl_tc_set_kind@Base 3.5.0-1 - rtnl_tc_set_kind@libnl_3 3.5.0-1 - rtnl_tc_set_link@Base 3.5.0-1 - rtnl_tc_set_link@libnl_3 3.5.0-1 - rtnl_tc_set_linktype@Base 3.5.0-1 - rtnl_tc_set_linktype@libnl_3 3.5.0-1 - rtnl_tc_set_mpu@Base 3.5.0-1 - rtnl_tc_set_mpu@libnl_3 3.5.0-1 - rtnl_tc_set_mtu@Base 3.5.0-1 - rtnl_tc_set_mtu@libnl_3 3.5.0-1 - rtnl_tc_set_overhead@Base 3.5.0-1 - rtnl_tc_set_overhead@libnl_3 3.5.0-1 - rtnl_tc_set_parent@Base 3.5.0-1 - rtnl_tc_set_parent@libnl_3 3.5.0-1 - rtnl_tc_stat2str@Base 3.5.0-1 - rtnl_tc_stat2str@libnl_3_2_26 3.5.0-1 - rtnl_tc_str2handle@Base 3.5.0-1 - rtnl_tc_str2handle@libnl_3 3.5.0-1 - rtnl_tc_str2stat@Base 3.5.0-1 - rtnl_tc_str2stat@libnl_3_2_26 3.5.0-1 - rtnl_tc_type_register@Base 3.5.0-1 - rtnl_tc_type_register@libnl_3 3.5.0-1 - rtnl_tc_type_unregister@Base 3.5.0-1 - rtnl_tc_type_unregister@libnl_3 3.5.0-1 - rtnl_tc_unregister@Base 3.5.0-1 - rtnl_tc_unregister@libnl_3 3.5.0-1 - rtnl_u32_add_action@Base 3.5.0-1 - rtnl_u32_add_action@libnl_3 3.5.0-1 - rtnl_u32_add_key@Base 3.5.0-1 - rtnl_u32_add_key@libnl_3 3.5.0-1 - rtnl_u32_add_key_in6_addr@Base 3.5.0-1 - rtnl_u32_add_key_in6_addr@libnl_3 3.5.0-1 - rtnl_u32_add_key_in_addr@Base 3.5.0-1 - rtnl_u32_add_key_in_addr@libnl_3 3.5.0-1 - rtnl_u32_add_key_uint16@Base 3.5.0-1 - rtnl_u32_add_key_uint16@libnl_3 3.5.0-1 - rtnl_u32_add_key_uint32@Base 3.5.0-1 - rtnl_u32_add_key_uint32@libnl_3 3.5.0-1 - rtnl_u32_add_key_uint8@Base 3.5.0-1 - rtnl_u32_add_key_uint8@libnl_3 3.5.0-1 - rtnl_u32_add_mark@Base 3.5.0-1 - rtnl_u32_add_mark@libnl_3 3.5.0-1 - rtnl_u32_del_action@Base 3.5.0-1 - rtnl_u32_del_action@libnl_3 3.5.0-1 - rtnl_u32_del_mark@Base 3.5.0-1 - rtnl_u32_del_mark@libnl_3 3.5.0-1 - rtnl_u32_get_action@libnl_3_4 3.5.0-1 - rtnl_u32_get_classid@Base 3.5.0-1 - rtnl_u32_get_classid@libnl_3_2_26 3.5.0-1 - rtnl_u32_get_key@Base 3.5.0-1 - rtnl_u32_get_key@libnl_3 3.5.0-1 - rtnl_u32_set_classid@Base 3.5.0-1 - rtnl_u32_set_classid@libnl_3 3.5.0-1 - rtnl_u32_set_cls_terminal@Base 3.5.0-1 - rtnl_u32_set_cls_terminal@libnl_3 3.5.0-1 - rtnl_u32_set_divisor@Base 3.5.0-1 - rtnl_u32_set_divisor@libnl_3 3.5.0-1 - rtnl_u32_set_flags@Base 3.5.0-1 - rtnl_u32_set_flags@libnl_3 3.5.0-1 - rtnl_u32_set_handle@Base 3.5.0-1 - rtnl_u32_set_handle@libnl_3 3.5.0-1 - rtnl_u32_set_hashmask@Base 3.5.0-1 - rtnl_u32_set_hashmask@libnl_3 3.5.0-1 - rtnl_u32_set_hashtable@Base 3.5.0-1 - rtnl_u32_set_hashtable@libnl_3 3.5.0-1 - rtnl_u32_set_link@Base 3.5.0-1 - rtnl_u32_set_link@libnl_3 3.5.0-1 - rtnl_u32_set_selector@libnl_3_2_29 3.5.0-1 - rtnl_vlan_get_action@libnl_3_5 3.5.0-1 - rtnl_vlan_get_mode@libnl_3_5 3.5.0-1 - rtnl_vlan_get_protocol@libnl_3_5 3.5.0-1 - rtnl_vlan_get_vlan_id@libnl_3_5 3.5.0-1 - rtnl_vlan_get_vlan_prio@libnl_3_5 3.5.0-1 - rtnl_vlan_set_action@libnl_3_5 3.5.0-1 - rtnl_vlan_set_mode@libnl_3_5 3.5.0-1 - rtnl_vlan_set_protocol@libnl_3_5 3.5.0-1 - rtnl_vlan_set_vlan_id@libnl_3_5 3.5.0-1 - rtnl_vlan_set_vlan_prio@libnl_3_5 3.5.0-1 - tc_groups@Base 3.5.0-1 - tca_parse@Base 3.5.0-1 - tca_set_kind@Base 3.5.0-1 diff --git a/src/libnl3/debian/libnl-route-3-dev.install b/src/libnl3/debian/libnl-route-3-dev.install deleted file mode 100644 index 37e248c3ed5..00000000000 --- a/src/libnl3/debian/libnl-route-3-dev.install +++ /dev/null @@ -1,3 +0,0 @@ -debian/tmp/usr/lib/*/pkgconfig/libnl-route-3* -debian/tmp/usr/lib/*/libnl-route-3*.so -debian/tmp/usr/lib/*/libnl-route-3*.a diff --git a/src/libnl3/debian/libnl-utils.install b/src/libnl3/debian/libnl-utils.install deleted file mode 100644 index 8ffdce84e93..00000000000 --- a/src/libnl3/debian/libnl-utils.install +++ /dev/null @@ -1 +0,0 @@ -debian/tmp/usr/bin/* diff --git a/src/libnl3/debian/libnl-utils.manpages b/src/libnl3/debian/libnl-utils.manpages deleted file mode 100644 index 0b2dcacf5b8..00000000000 --- a/src/libnl3/debian/libnl-utils.manpages +++ /dev/null @@ -1 +0,0 @@ -debian/tmp/usr/share/man/man8/* diff --git a/src/libnl3/debian/libnl-xfrm-3-200.install b/src/libnl3/debian/libnl-xfrm-3-200.install deleted file mode 100644 index 89b2d4e0c9e..00000000000 --- a/src/libnl3/debian/libnl-xfrm-3-200.install +++ /dev/null @@ -1 +0,0 @@ -debian/tmp/usr/lib/*/libnl-xfrm-3*.so.* diff --git a/src/libnl3/debian/libnl-xfrm-3-200.symbols b/src/libnl3/debian/libnl-xfrm-3-200.symbols deleted file mode 100644 index 3704a7aa438..00000000000 --- a/src/libnl3/debian/libnl-xfrm-3-200.symbols +++ /dev/null @@ -1,484 +0,0 @@ -libnl-xfrm-3.so.200 libnl-xfrm-3-200 #MINVER# - libnl_3@libnl_3 3.5.0-1 - xfrmnl_ae_alloc@Base 3.5.0-1 - xfrmnl_ae_alloc@libnl_3 3.5.0-1 - xfrmnl_ae_build_get_request@Base 3.5.0-1 - xfrmnl_ae_build_get_request@libnl_3 3.5.0-1 - xfrmnl_ae_flags2str@Base 3.5.0-1 - xfrmnl_ae_flags2str@libnl_3 3.5.0-1 - xfrmnl_ae_get_curlifetime@Base 3.5.0-1 - xfrmnl_ae_get_curlifetime@libnl_3 3.5.0-1 - xfrmnl_ae_get_daddr@Base 3.5.0-1 - xfrmnl_ae_get_daddr@libnl_3 3.5.0-1 - xfrmnl_ae_get_family@Base 3.5.0-1 - xfrmnl_ae_get_family@libnl_3 3.5.0-1 - xfrmnl_ae_get_flags@Base 3.5.0-1 - xfrmnl_ae_get_flags@libnl_3 3.5.0-1 - xfrmnl_ae_get_kernel@Base 3.5.0-1 - xfrmnl_ae_get_kernel@libnl_3 3.5.0-1 - xfrmnl_ae_get_mark@Base 3.5.0-1 - xfrmnl_ae_get_mark@libnl_3 3.5.0-1 - xfrmnl_ae_get_proto@Base 3.5.0-1 - xfrmnl_ae_get_proto@libnl_3 3.5.0-1 - xfrmnl_ae_get_replay_maxage@Base 3.5.0-1 - xfrmnl_ae_get_replay_maxage@libnl_3 3.5.0-1 - xfrmnl_ae_get_replay_maxdiff@Base 3.5.0-1 - xfrmnl_ae_get_replay_maxdiff@libnl_3 3.5.0-1 - xfrmnl_ae_get_replay_state@Base 3.5.0-1 - xfrmnl_ae_get_replay_state@libnl_3 3.5.0-1 - xfrmnl_ae_get_replay_state_esn@Base 3.5.0-1 - xfrmnl_ae_get_replay_state_esn@libnl_3 3.5.0-1 - xfrmnl_ae_get_reqid@Base 3.5.0-1 - xfrmnl_ae_get_reqid@libnl_3 3.5.0-1 - xfrmnl_ae_get_saddr@Base 3.5.0-1 - xfrmnl_ae_get_saddr@libnl_3 3.5.0-1 - xfrmnl_ae_get_spi@Base 3.5.0-1 - xfrmnl_ae_get_spi@libnl_3 3.5.0-1 - xfrmnl_ae_parse@Base 3.5.0-1 - xfrmnl_ae_parse@libnl_3 3.5.0-1 - xfrmnl_ae_put@Base 3.5.0-1 - xfrmnl_ae_put@libnl_3 3.5.0-1 - xfrmnl_ae_set@Base 3.5.0-1 - xfrmnl_ae_set@libnl_3 3.5.0-1 - xfrmnl_ae_set_curlifetime@Base 3.5.0-1 - xfrmnl_ae_set_curlifetime@libnl_3 3.5.0-1 - xfrmnl_ae_set_daddr@Base 3.5.0-1 - xfrmnl_ae_set_daddr@libnl_3 3.5.0-1 - xfrmnl_ae_set_family@Base 3.5.0-1 - xfrmnl_ae_set_family@libnl_3 3.5.0-1 - xfrmnl_ae_set_flags@Base 3.5.0-1 - xfrmnl_ae_set_flags@libnl_3 3.5.0-1 - xfrmnl_ae_set_mark@Base 3.5.0-1 - xfrmnl_ae_set_mark@libnl_3 3.5.0-1 - xfrmnl_ae_set_proto@Base 3.5.0-1 - xfrmnl_ae_set_proto@libnl_3 3.5.0-1 - xfrmnl_ae_set_replay_maxage@Base 3.5.0-1 - xfrmnl_ae_set_replay_maxage@libnl_3 3.5.0-1 - xfrmnl_ae_set_replay_maxdiff@Base 3.5.0-1 - xfrmnl_ae_set_replay_maxdiff@libnl_3 3.5.0-1 - xfrmnl_ae_set_replay_state@Base 3.5.0-1 - xfrmnl_ae_set_replay_state@libnl_3 3.5.0-1 - xfrmnl_ae_set_replay_state_esn@Base 3.5.0-1 - xfrmnl_ae_set_replay_state_esn@libnl_3 3.5.0-1 - xfrmnl_ae_set_reqid@Base 3.5.0-1 - xfrmnl_ae_set_reqid@libnl_3 3.5.0-1 - xfrmnl_ae_set_saddr@Base 3.5.0-1 - xfrmnl_ae_set_saddr@libnl_3 3.5.0-1 - xfrmnl_ae_set_spi@Base 3.5.0-1 - xfrmnl_ae_set_spi@libnl_3 3.5.0-1 - xfrmnl_ae_str2flag@Base 3.5.0-1 - xfrmnl_ae_str2flag@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_alloc@Base 3.5.0-1 - xfrmnl_ltime_cfg_alloc@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_clone@Base 3.5.0-1 - xfrmnl_ltime_cfg_clone@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_cmp@Base 3.5.0-1 - xfrmnl_ltime_cfg_cmp@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_get@Base 3.5.0-1 - xfrmnl_ltime_cfg_get@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_get_hard_addexpires@Base 3.5.0-1 - xfrmnl_ltime_cfg_get_hard_addexpires@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_get_hard_bytelimit@Base 3.5.0-1 - xfrmnl_ltime_cfg_get_hard_bytelimit@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_get_hard_packetlimit@Base 3.5.0-1 - xfrmnl_ltime_cfg_get_hard_packetlimit@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_get_hard_useexpires@Base 3.5.0-1 - xfrmnl_ltime_cfg_get_hard_useexpires@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_get_soft_addexpires@Base 3.5.0-1 - xfrmnl_ltime_cfg_get_soft_addexpires@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_get_soft_bytelimit@Base 3.5.0-1 - xfrmnl_ltime_cfg_get_soft_bytelimit@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_get_soft_packetlimit@Base 3.5.0-1 - xfrmnl_ltime_cfg_get_soft_packetlimit@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_get_soft_useexpires@Base 3.5.0-1 - xfrmnl_ltime_cfg_get_soft_useexpires@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_put@Base 3.5.0-1 - xfrmnl_ltime_cfg_put@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_set_hard_addexpires@Base 3.5.0-1 - xfrmnl_ltime_cfg_set_hard_addexpires@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_set_hard_bytelimit@Base 3.5.0-1 - xfrmnl_ltime_cfg_set_hard_bytelimit@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_set_hard_packetlimit@Base 3.5.0-1 - xfrmnl_ltime_cfg_set_hard_packetlimit@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_set_hard_useexpires@Base 3.5.0-1 - xfrmnl_ltime_cfg_set_hard_useexpires@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_set_soft_addexpires@Base 3.5.0-1 - xfrmnl_ltime_cfg_set_soft_addexpires@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_set_soft_bytelimit@Base 3.5.0-1 - xfrmnl_ltime_cfg_set_soft_bytelimit@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_set_soft_packetlimit@Base 3.5.0-1 - xfrmnl_ltime_cfg_set_soft_packetlimit@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_set_soft_useexpires@Base 3.5.0-1 - xfrmnl_ltime_cfg_set_soft_useexpires@libnl_3 3.5.0-1 - xfrmnl_ltime_cfg_shared@Base 3.5.0-1 - xfrmnl_ltime_cfg_shared@libnl_3 3.5.0-1 - xfrmnl_sa_add@Base 3.5.0-1 - xfrmnl_sa_add@libnl_3 3.5.0-1 - xfrmnl_sa_alloc@Base 3.5.0-1 - xfrmnl_sa_alloc@libnl_3 3.5.0-1 - xfrmnl_sa_alloc_cache@Base 3.5.0-1 - xfrmnl_sa_alloc_cache@libnl_3 3.5.0-1 - xfrmnl_sa_build_add_request@Base 3.5.0-1 - xfrmnl_sa_build_add_request@libnl_3 3.5.0-1 - xfrmnl_sa_build_delete_request@Base 3.5.0-1 - xfrmnl_sa_build_delete_request@libnl_3 3.5.0-1 - xfrmnl_sa_build_get_request@Base 3.5.0-1 - xfrmnl_sa_build_get_request@libnl_3 3.5.0-1 - xfrmnl_sa_build_update_request@Base 3.5.0-1 - xfrmnl_sa_build_update_request@libnl_3 3.5.0-1 - xfrmnl_sa_delete@Base 3.5.0-1 - xfrmnl_sa_delete@libnl_3 3.5.0-1 - xfrmnl_sa_flags2str@Base 3.5.0-1 - xfrmnl_sa_flags2str@libnl_3 3.5.0-1 - xfrmnl_sa_get@Base 3.5.0-1 - xfrmnl_sa_get@libnl_3 3.5.0-1 - xfrmnl_sa_get_aead_params@Base 3.5.0-1 - xfrmnl_sa_get_aead_params@libnl_3 3.5.0-1 - xfrmnl_sa_get_auth_params@Base 3.5.0-1 - xfrmnl_sa_get_auth_params@libnl_3 3.5.0-1 - xfrmnl_sa_get_coaddr@Base 3.5.0-1 - xfrmnl_sa_get_coaddr@libnl_3 3.5.0-1 - xfrmnl_sa_get_comp_params@Base 3.5.0-1 - xfrmnl_sa_get_comp_params@libnl_3 3.5.0-1 - xfrmnl_sa_get_crypto_params@Base 3.5.0-1 - xfrmnl_sa_get_crypto_params@libnl_3 3.5.0-1 - xfrmnl_sa_get_curlifetime@Base 3.5.0-1 - xfrmnl_sa_get_curlifetime@libnl_3 3.5.0-1 - xfrmnl_sa_get_daddr@Base 3.5.0-1 - xfrmnl_sa_get_daddr@libnl_3 3.5.0-1 - xfrmnl_sa_get_encap_tmpl@Base 3.5.0-1 - xfrmnl_sa_get_encap_tmpl@libnl_3 3.5.0-1 - xfrmnl_sa_get_family@Base 3.5.0-1 - xfrmnl_sa_get_family@libnl_3 3.5.0-1 - xfrmnl_sa_get_flags@Base 3.5.0-1 - xfrmnl_sa_get_flags@libnl_3 3.5.0-1 - xfrmnl_sa_get_kernel@Base 3.5.0-1 - xfrmnl_sa_get_kernel@libnl_3 3.5.0-1 - xfrmnl_sa_get_lifetime_cfg@Base 3.5.0-1 - xfrmnl_sa_get_lifetime_cfg@libnl_3 3.5.0-1 - xfrmnl_sa_get_mark@Base 3.5.0-1 - xfrmnl_sa_get_mark@libnl_3 3.5.0-1 - xfrmnl_sa_get_mode@Base 3.5.0-1 - xfrmnl_sa_get_mode@libnl_3 3.5.0-1 - xfrmnl_sa_get_proto@Base 3.5.0-1 - xfrmnl_sa_get_proto@libnl_3 3.5.0-1 - xfrmnl_sa_get_replay_maxage@Base 3.5.0-1 - xfrmnl_sa_get_replay_maxage@libnl_3 3.5.0-1 - xfrmnl_sa_get_replay_maxdiff@Base 3.5.0-1 - xfrmnl_sa_get_replay_maxdiff@libnl_3 3.5.0-1 - xfrmnl_sa_get_replay_state@Base 3.5.0-1 - xfrmnl_sa_get_replay_state@libnl_3 3.5.0-1 - xfrmnl_sa_get_replay_state_esn@Base 3.5.0-1 - xfrmnl_sa_get_replay_state_esn@libnl_3 3.5.0-1 - xfrmnl_sa_get_replay_window@Base 3.5.0-1 - xfrmnl_sa_get_replay_window@libnl_3 3.5.0-1 - xfrmnl_sa_get_reqid@Base 3.5.0-1 - xfrmnl_sa_get_reqid@libnl_3 3.5.0-1 - xfrmnl_sa_get_saddr@Base 3.5.0-1 - xfrmnl_sa_get_saddr@libnl_3 3.5.0-1 - xfrmnl_sa_get_sec_ctx@Base 3.5.0-1 - xfrmnl_sa_get_sec_ctx@libnl_3 3.5.0-1 - xfrmnl_sa_get_sel@Base 3.5.0-1 - xfrmnl_sa_get_sel@libnl_3 3.5.0-1 - xfrmnl_sa_get_seq@Base 3.5.0-1 - xfrmnl_sa_get_seq@libnl_3 3.5.0-1 - xfrmnl_sa_get_spi@Base 3.5.0-1 - xfrmnl_sa_get_spi@libnl_3 3.5.0-1 - xfrmnl_sa_get_stats@Base 3.5.0-1 - xfrmnl_sa_get_stats@libnl_3 3.5.0-1 - xfrmnl_sa_get_tfcpad@Base 3.5.0-1 - xfrmnl_sa_get_tfcpad@libnl_3 3.5.0-1 - xfrmnl_sa_is_expiry_reached@Base 3.5.0-1 - xfrmnl_sa_is_expiry_reached@libnl_3 3.5.0-1 - xfrmnl_sa_is_hardexpiry_reached@Base 3.5.0-1 - xfrmnl_sa_is_hardexpiry_reached@libnl_3 3.5.0-1 - xfrmnl_sa_mode2str@Base 3.5.0-1 - xfrmnl_sa_mode2str@libnl_3 3.5.0-1 - xfrmnl_sa_parse@Base 3.5.0-1 - xfrmnl_sa_parse@libnl_3 3.5.0-1 - xfrmnl_sa_put@Base 3.5.0-1 - xfrmnl_sa_put@libnl_3 3.5.0-1 - xfrmnl_sa_set_aead_params@Base 3.5.0-1 - xfrmnl_sa_set_aead_params@libnl_3 3.5.0-1 - xfrmnl_sa_set_auth_params@Base 3.5.0-1 - xfrmnl_sa_set_auth_params@libnl_3 3.5.0-1 - xfrmnl_sa_set_coaddr@Base 3.5.0-1 - xfrmnl_sa_set_coaddr@libnl_3 3.5.0-1 - xfrmnl_sa_set_comp_params@Base 3.5.0-1 - xfrmnl_sa_set_comp_params@libnl_3 3.5.0-1 - xfrmnl_sa_set_crypto_params@Base 3.5.0-1 - xfrmnl_sa_set_crypto_params@libnl_3 3.5.0-1 - xfrmnl_sa_set_daddr@Base 3.5.0-1 - xfrmnl_sa_set_daddr@libnl_3 3.5.0-1 - xfrmnl_sa_set_encap_tmpl@Base 3.5.0-1 - xfrmnl_sa_set_encap_tmpl@libnl_3 3.5.0-1 - xfrmnl_sa_set_family@Base 3.5.0-1 - xfrmnl_sa_set_family@libnl_3 3.5.0-1 - xfrmnl_sa_set_flags@Base 3.5.0-1 - xfrmnl_sa_set_flags@libnl_3 3.5.0-1 - xfrmnl_sa_set_lifetime_cfg@Base 3.5.0-1 - xfrmnl_sa_set_lifetime_cfg@libnl_3 3.5.0-1 - xfrmnl_sa_set_mark@Base 3.5.0-1 - xfrmnl_sa_set_mark@libnl_3 3.5.0-1 - xfrmnl_sa_set_mode@Base 3.5.0-1 - xfrmnl_sa_set_mode@libnl_3 3.5.0-1 - xfrmnl_sa_set_proto@Base 3.5.0-1 - xfrmnl_sa_set_proto@libnl_3 3.5.0-1 - xfrmnl_sa_set_replay_maxage@Base 3.5.0-1 - xfrmnl_sa_set_replay_maxage@libnl_3 3.5.0-1 - xfrmnl_sa_set_replay_maxdiff@Base 3.5.0-1 - xfrmnl_sa_set_replay_maxdiff@libnl_3 3.5.0-1 - xfrmnl_sa_set_replay_state@Base 3.5.0-1 - xfrmnl_sa_set_replay_state@libnl_3 3.5.0-1 - xfrmnl_sa_set_replay_state_esn@Base 3.5.0-1 - xfrmnl_sa_set_replay_state_esn@libnl_3 3.5.0-1 - xfrmnl_sa_set_replay_window@Base 3.5.0-1 - xfrmnl_sa_set_replay_window@libnl_3 3.5.0-1 - xfrmnl_sa_set_reqid@Base 3.5.0-1 - xfrmnl_sa_set_reqid@libnl_3 3.5.0-1 - xfrmnl_sa_set_saddr@Base 3.5.0-1 - xfrmnl_sa_set_saddr@libnl_3 3.5.0-1 - xfrmnl_sa_set_sec_ctx@Base 3.5.0-1 - xfrmnl_sa_set_sec_ctx@libnl_3 3.5.0-1 - xfrmnl_sa_set_sel@Base 3.5.0-1 - xfrmnl_sa_set_sel@libnl_3 3.5.0-1 - xfrmnl_sa_set_spi@Base 3.5.0-1 - xfrmnl_sa_set_spi@libnl_3 3.5.0-1 - xfrmnl_sa_set_tfcpad@Base 3.5.0-1 - xfrmnl_sa_set_tfcpad@libnl_3 3.5.0-1 - xfrmnl_sa_str2flag@Base 3.5.0-1 - xfrmnl_sa_str2flag@libnl_3 3.5.0-1 - xfrmnl_sa_str2mode@Base 3.5.0-1 - xfrmnl_sa_str2mode@libnl_3 3.5.0-1 - xfrmnl_sa_update@Base 3.5.0-1 - xfrmnl_sa_update@libnl_3 3.5.0-1 - xfrmnl_sel_alloc@Base 3.5.0-1 - xfrmnl_sel_alloc@libnl_3 3.5.0-1 - xfrmnl_sel_clone@Base 3.5.0-1 - xfrmnl_sel_clone@libnl_3 3.5.0-1 - xfrmnl_sel_cmp@Base 3.5.0-1 - xfrmnl_sel_cmp@libnl_3 3.5.0-1 - xfrmnl_sel_dump@Base 3.5.0-1 - xfrmnl_sel_dump@libnl_3 3.5.0-1 - xfrmnl_sel_get@Base 3.5.0-1 - xfrmnl_sel_get@libnl_3 3.5.0-1 - xfrmnl_sel_get_daddr@Base 3.5.0-1 - xfrmnl_sel_get_daddr@libnl_3 3.5.0-1 - xfrmnl_sel_get_dport@Base 3.5.0-1 - xfrmnl_sel_get_dport@libnl_3 3.5.0-1 - xfrmnl_sel_get_dportmask@Base 3.5.0-1 - xfrmnl_sel_get_dportmask@libnl_3 3.5.0-1 - xfrmnl_sel_get_family@Base 3.5.0-1 - xfrmnl_sel_get_family@libnl_3 3.5.0-1 - xfrmnl_sel_get_ifindex@Base 3.5.0-1 - xfrmnl_sel_get_ifindex@libnl_3 3.5.0-1 - xfrmnl_sel_get_prefixlen_d@Base 3.5.0-1 - xfrmnl_sel_get_prefixlen_d@libnl_3 3.5.0-1 - xfrmnl_sel_get_prefixlen_s@Base 3.5.0-1 - xfrmnl_sel_get_prefixlen_s@libnl_3 3.5.0-1 - xfrmnl_sel_get_proto@Base 3.5.0-1 - xfrmnl_sel_get_proto@libnl_3 3.5.0-1 - xfrmnl_sel_get_saddr@Base 3.5.0-1 - xfrmnl_sel_get_saddr@libnl_3 3.5.0-1 - xfrmnl_sel_get_sport@Base 3.5.0-1 - xfrmnl_sel_get_sport@libnl_3 3.5.0-1 - xfrmnl_sel_get_sportmask@Base 3.5.0-1 - xfrmnl_sel_get_sportmask@libnl_3 3.5.0-1 - xfrmnl_sel_get_userid@Base 3.5.0-1 - xfrmnl_sel_get_userid@libnl_3 3.5.0-1 - xfrmnl_sel_put@Base 3.5.0-1 - xfrmnl_sel_put@libnl_3 3.5.0-1 - xfrmnl_sel_set_daddr@Base 3.5.0-1 - xfrmnl_sel_set_daddr@libnl_3 3.5.0-1 - xfrmnl_sel_set_dport@Base 3.5.0-1 - xfrmnl_sel_set_dport@libnl_3 3.5.0-1 - xfrmnl_sel_set_dportmask@Base 3.5.0-1 - xfrmnl_sel_set_dportmask@libnl_3 3.5.0-1 - xfrmnl_sel_set_family@Base 3.5.0-1 - xfrmnl_sel_set_family@libnl_3 3.5.0-1 - xfrmnl_sel_set_ifindex@Base 3.5.0-1 - xfrmnl_sel_set_ifindex@libnl_3 3.5.0-1 - xfrmnl_sel_set_prefixlen_d@Base 3.5.0-1 - xfrmnl_sel_set_prefixlen_d@libnl_3 3.5.0-1 - xfrmnl_sel_set_prefixlen_s@Base 3.5.0-1 - xfrmnl_sel_set_prefixlen_s@libnl_3 3.5.0-1 - xfrmnl_sel_set_proto@Base 3.5.0-1 - xfrmnl_sel_set_proto@libnl_3 3.5.0-1 - xfrmnl_sel_set_saddr@Base 3.5.0-1 - xfrmnl_sel_set_saddr@libnl_3 3.5.0-1 - xfrmnl_sel_set_sport@Base 3.5.0-1 - xfrmnl_sel_set_sport@libnl_3 3.5.0-1 - xfrmnl_sel_set_sportmask@Base 3.5.0-1 - xfrmnl_sel_set_sportmask@libnl_3 3.5.0-1 - xfrmnl_sel_set_userid@Base 3.5.0-1 - xfrmnl_sel_set_userid@libnl_3 3.5.0-1 - xfrmnl_sel_shared@Base 3.5.0-1 - xfrmnl_sel_shared@libnl_3 3.5.0-1 - xfrmnl_sp_action2str@Base 3.5.0-1 - xfrmnl_sp_action2str@libnl_3 3.5.0-1 - xfrmnl_sp_add@Base 3.5.0-1 - xfrmnl_sp_add@libnl_3 3.5.0-1 - xfrmnl_sp_add_usertemplate@Base 3.5.0-1 - xfrmnl_sp_add_usertemplate@libnl_3 3.5.0-1 - xfrmnl_sp_alloc@Base 3.5.0-1 - xfrmnl_sp_alloc@libnl_3 3.5.0-1 - xfrmnl_sp_alloc_cache@Base 3.5.0-1 - xfrmnl_sp_alloc_cache@libnl_3 3.5.0-1 - xfrmnl_sp_build_add_request@Base 3.5.0-1 - xfrmnl_sp_build_add_request@libnl_3 3.5.0-1 - xfrmnl_sp_build_delete_request@Base 3.5.0-1 - xfrmnl_sp_build_delete_request@libnl_3 3.5.0-1 - xfrmnl_sp_build_get_request@Base 3.5.0-1 - xfrmnl_sp_build_get_request@libnl_3 3.5.0-1 - xfrmnl_sp_build_update_request@Base 3.5.0-1 - xfrmnl_sp_build_update_request@libnl_3 3.5.0-1 - xfrmnl_sp_delete@Base 3.5.0-1 - xfrmnl_sp_delete@libnl_3 3.5.0-1 - xfrmnl_sp_dir2str@Base 3.5.0-1 - xfrmnl_sp_dir2str@libnl_3 3.5.0-1 - xfrmnl_sp_flags2str@Base 3.5.0-1 - xfrmnl_sp_flags2str@libnl_3 3.5.0-1 - xfrmnl_sp_foreach_usertemplate@Base 3.5.0-1 - xfrmnl_sp_foreach_usertemplate@libnl_3 3.5.0-1 - xfrmnl_sp_get@Base 3.5.0-1 - xfrmnl_sp_get@libnl_3 3.5.0-1 - xfrmnl_sp_get_action@Base 3.5.0-1 - xfrmnl_sp_get_action@libnl_3 3.5.0-1 - xfrmnl_sp_get_curlifetime@Base 3.5.0-1 - xfrmnl_sp_get_curlifetime@libnl_3 3.5.0-1 - xfrmnl_sp_get_dir@Base 3.5.0-1 - xfrmnl_sp_get_dir@libnl_3 3.5.0-1 - xfrmnl_sp_get_flags@Base 3.5.0-1 - xfrmnl_sp_get_flags@libnl_3 3.5.0-1 - xfrmnl_sp_get_index@Base 3.5.0-1 - xfrmnl_sp_get_index@libnl_3 3.5.0-1 - xfrmnl_sp_get_kernel@Base 3.5.0-1 - xfrmnl_sp_get_kernel@libnl_3 3.5.0-1 - xfrmnl_sp_get_lifetime_cfg@Base 3.5.0-1 - xfrmnl_sp_get_lifetime_cfg@libnl_3 3.5.0-1 - xfrmnl_sp_get_mark@Base 3.5.0-1 - xfrmnl_sp_get_mark@libnl_3 3.5.0-1 - xfrmnl_sp_get_nusertemplates@Base 3.5.0-1 - xfrmnl_sp_get_nusertemplates@libnl_3 3.5.0-1 - xfrmnl_sp_get_priority@Base 3.5.0-1 - xfrmnl_sp_get_priority@libnl_3 3.5.0-1 - xfrmnl_sp_get_sec_ctx@Base 3.5.0-1 - xfrmnl_sp_get_sec_ctx@libnl_3 3.5.0-1 - xfrmnl_sp_get_sel@Base 3.5.0-1 - xfrmnl_sp_get_sel@libnl_3 3.5.0-1 - xfrmnl_sp_get_share@Base 3.5.0-1 - xfrmnl_sp_get_share@libnl_3 3.5.0-1 - xfrmnl_sp_get_userpolicy_type@Base 3.5.0-1 - xfrmnl_sp_get_userpolicy_type@libnl_3 3.5.0-1 - xfrmnl_sp_get_usertemplates@Base 3.5.0-1 - xfrmnl_sp_get_usertemplates@libnl_3 3.5.0-1 - xfrmnl_sp_index2dir@Base 3.5.0-1 - xfrmnl_sp_index2dir@libnl_3 3.5.0-1 - xfrmnl_sp_parse@Base 3.5.0-1 - xfrmnl_sp_parse@libnl_3 3.5.0-1 - xfrmnl_sp_put@Base 3.5.0-1 - xfrmnl_sp_put@libnl_3 3.5.0-1 - xfrmnl_sp_remove_usertemplate@Base 3.5.0-1 - xfrmnl_sp_remove_usertemplate@libnl_3 3.5.0-1 - xfrmnl_sp_set_action@Base 3.5.0-1 - xfrmnl_sp_set_action@libnl_3 3.5.0-1 - xfrmnl_sp_set_dir@Base 3.5.0-1 - xfrmnl_sp_set_dir@libnl_3 3.5.0-1 - xfrmnl_sp_set_flags@Base 3.5.0-1 - xfrmnl_sp_set_flags@libnl_3 3.5.0-1 - xfrmnl_sp_set_index@Base 3.5.0-1 - xfrmnl_sp_set_index@libnl_3 3.5.0-1 - xfrmnl_sp_set_lifetime_cfg@Base 3.5.0-1 - xfrmnl_sp_set_lifetime_cfg@libnl_3 3.5.0-1 - xfrmnl_sp_set_mark@Base 3.5.0-1 - xfrmnl_sp_set_mark@libnl_3 3.5.0-1 - xfrmnl_sp_set_priority@Base 3.5.0-1 - xfrmnl_sp_set_priority@libnl_3 3.5.0-1 - xfrmnl_sp_set_sec_ctx@Base 3.5.0-1 - xfrmnl_sp_set_sec_ctx@libnl_3 3.5.0-1 - xfrmnl_sp_set_sel@Base 3.5.0-1 - xfrmnl_sp_set_sel@libnl_3 3.5.0-1 - xfrmnl_sp_set_share@Base 3.5.0-1 - xfrmnl_sp_set_share@libnl_3 3.5.0-1 - xfrmnl_sp_set_userpolicy_type@Base 3.5.0-1 - xfrmnl_sp_set_userpolicy_type@libnl_3 3.5.0-1 - xfrmnl_sp_share2str@Base 3.5.0-1 - xfrmnl_sp_share2str@libnl_3 3.5.0-1 - xfrmnl_sp_str2action@Base 3.5.0-1 - xfrmnl_sp_str2action@libnl_3 3.5.0-1 - xfrmnl_sp_str2dir@Base 3.5.0-1 - xfrmnl_sp_str2dir@libnl_3 3.5.0-1 - xfrmnl_sp_str2flag@Base 3.5.0-1 - xfrmnl_sp_str2flag@libnl_3 3.5.0-1 - xfrmnl_sp_str2share@Base 3.5.0-1 - xfrmnl_sp_str2share@libnl_3 3.5.0-1 - xfrmnl_sp_str2type@Base 3.5.0-1 - xfrmnl_sp_str2type@libnl_3 3.5.0-1 - xfrmnl_sp_type2str@Base 3.5.0-1 - xfrmnl_sp_type2str@libnl_3 3.5.0-1 - xfrmnl_sp_update@Base 3.5.0-1 - xfrmnl_sp_update@libnl_3 3.5.0-1 - xfrmnl_sp_usertemplate_n@Base 3.5.0-1 - xfrmnl_sp_usertemplate_n@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_alloc@Base 3.5.0-1 - xfrmnl_user_tmpl_alloc@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_clone@Base 3.5.0-1 - xfrmnl_user_tmpl_clone@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_cmp@Base 3.5.0-1 - xfrmnl_user_tmpl_cmp@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_dump@Base 3.5.0-1 - xfrmnl_user_tmpl_dump@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_free@Base 3.5.0-1 - xfrmnl_user_tmpl_free@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_get_aalgos@Base 3.5.0-1 - xfrmnl_user_tmpl_get_aalgos@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_get_calgos@Base 3.5.0-1 - xfrmnl_user_tmpl_get_calgos@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_get_daddr@Base 3.5.0-1 - xfrmnl_user_tmpl_get_daddr@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_get_ealgos@Base 3.5.0-1 - xfrmnl_user_tmpl_get_ealgos@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_get_family@Base 3.5.0-1 - xfrmnl_user_tmpl_get_family@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_get_mode@Base 3.5.0-1 - xfrmnl_user_tmpl_get_mode@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_get_optional@Base 3.5.0-1 - xfrmnl_user_tmpl_get_optional@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_get_proto@Base 3.5.0-1 - xfrmnl_user_tmpl_get_proto@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_get_reqid@Base 3.5.0-1 - xfrmnl_user_tmpl_get_reqid@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_get_saddr@Base 3.5.0-1 - xfrmnl_user_tmpl_get_saddr@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_get_share@Base 3.5.0-1 - xfrmnl_user_tmpl_get_share@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_get_spi@Base 3.5.0-1 - xfrmnl_user_tmpl_get_spi@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_mode2str@Base 3.5.0-1 - xfrmnl_user_tmpl_mode2str@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_set_aalgos@Base 3.5.0-1 - xfrmnl_user_tmpl_set_aalgos@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_set_calgos@Base 3.5.0-1 - xfrmnl_user_tmpl_set_calgos@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_set_daddr@Base 3.5.0-1 - xfrmnl_user_tmpl_set_daddr@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_set_ealgos@Base 3.5.0-1 - xfrmnl_user_tmpl_set_ealgos@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_set_family@Base 3.5.0-1 - xfrmnl_user_tmpl_set_family@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_set_mode@Base 3.5.0-1 - xfrmnl_user_tmpl_set_mode@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_set_optional@Base 3.5.0-1 - xfrmnl_user_tmpl_set_optional@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_set_proto@Base 3.5.0-1 - xfrmnl_user_tmpl_set_proto@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_set_reqid@Base 3.5.0-1 - xfrmnl_user_tmpl_set_reqid@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_set_saddr@Base 3.5.0-1 - xfrmnl_user_tmpl_set_saddr@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_set_share@Base 3.5.0-1 - xfrmnl_user_tmpl_set_share@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_set_spi@Base 3.5.0-1 - xfrmnl_user_tmpl_set_spi@libnl_3 3.5.0-1 - xfrmnl_user_tmpl_str2mode@Base 3.5.0-1 - xfrmnl_user_tmpl_str2mode@libnl_3 3.5.0-1 diff --git a/src/libnl3/debian/libnl-xfrm-3-dev.install b/src/libnl3/debian/libnl-xfrm-3-dev.install deleted file mode 100644 index f57e152c5aa..00000000000 --- a/src/libnl3/debian/libnl-xfrm-3-dev.install +++ /dev/null @@ -1,3 +0,0 @@ -debian/tmp/usr/lib/*/pkgconfig/libnl-xfrm-3* -debian/tmp/usr/lib/*/libnl-xfrm-3*.so -debian/tmp/usr/lib/*/libnl-xfrm-3*.a diff --git a/src/libnl3/debian/rules b/src/libnl3/debian/rules deleted file mode 100755 index 2d33f6ac899..00000000000 --- a/src/libnl3/debian/rules +++ /dev/null @@ -1,4 +0,0 @@ -#!/usr/bin/make -f - -%: - dh $@ diff --git a/src/libnl3/debian/source/format b/src/libnl3/debian/source/format deleted file mode 100644 index 163aaf8d82b..00000000000 --- a/src/libnl3/debian/source/format +++ /dev/null @@ -1 +0,0 @@ -3.0 (quilt) diff --git a/src/libnl3/debian/watch b/src/libnl3/debian/watch deleted file mode 100644 index 9939913ca0e..00000000000 --- a/src/libnl3/debian/watch +++ /dev/null @@ -1,2 +0,0 @@ -version=3 -https://github.com/thom311/libnl/releases/libnl-(.*)\.tar\.gz diff --git a/src/libnl3/patch/0001-mpls-encap-accessors.patch b/src/libnl3/patch/0001-mpls-encap-accessors.patch deleted file mode 100644 index 2fb6a19314e..00000000000 --- a/src/libnl3/patch/0001-mpls-encap-accessors.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 701122c539d6da3fbd3367be6e62141328ebeb07 Mon Sep 17 00:00:00 2001 -From: Ann Pokora -Date: Tue, 25 May 2021 18:07:37 -0700 -Subject: [PATCH 1/2] mpls encap accessors - -Signed-off-by: Ann Pokora ---- - include/netlink/route/nexthop.h | 2 ++ - lib/route/nh_encap_mpls.c | 28 ++++++++++++++++++++++++++++ - libnl-route-3.sym | 2 ++ - 3 files changed, 32 insertions(+) - -diff --git a/include/netlink/route/nexthop.h b/include/netlink/route/nexthop.h -index 5b422dd..a502005 100644 ---- a/include/netlink/route/nexthop.h -+++ b/include/netlink/route/nexthop.h -@@ -70,6 +70,8 @@ extern int rtnl_route_nh_str2flags(const char *); - extern int rtnl_route_nh_encap_mpls(struct rtnl_nexthop *nh, - struct nl_addr *addr, - uint8_t ttl); -+extern struct nl_addr * rtnl_route_nh_get_encap_mpls_dst(struct rtnl_nexthop *); -+extern uint8_t rtnl_route_nh_get_encap_mpls_ttl(struct rtnl_nexthop *); - #ifdef __cplusplus - } - #endif -diff --git a/lib/route/nh_encap_mpls.c b/lib/route/nh_encap_mpls.c -index 081661e..18336ac 100644 ---- a/lib/route/nh_encap_mpls.c -+++ b/lib/route/nh_encap_mpls.c -@@ -133,3 +133,31 @@ int rtnl_route_nh_encap_mpls(struct rtnl_nexthop *nh, - - return 0; - } -+ -+struct nl_addr *rtnl_route_nh_get_encap_mpls_dst(struct rtnl_nexthop *nh) -+{ -+ struct mpls_iptunnel_encap *mpls_encap; -+ -+ if (!nh->rtnh_encap || nh->rtnh_encap->ops->encap_type != LWTUNNEL_ENCAP_MPLS) -+ return NULL; -+ -+ mpls_encap = (struct mpls_iptunnel_encap *)nh->rtnh_encap->priv; -+ if (!mpls_encap) -+ return NULL; -+ -+ return mpls_encap->dst; -+} -+ -+uint8_t rtnl_route_nh_get_encap_mpls_ttl(struct rtnl_nexthop *nh) -+{ -+ struct mpls_iptunnel_encap *mpls_encap; -+ -+ if (!nh->rtnh_encap || nh->rtnh_encap->ops->encap_type != LWTUNNEL_ENCAP_MPLS) -+ return 0; -+ -+ mpls_encap = (struct mpls_iptunnel_encap *)nh->rtnh_encap->priv; -+ if (!mpls_encap) -+ return 0; -+ -+ return mpls_encap->ttl; -+} -diff --git a/libnl-route-3.sym b/libnl-route-3.sym -index 4a65503..ce6d714 100644 ---- a/libnl-route-3.sym -+++ b/libnl-route-3.sym -@@ -1127,6 +1127,8 @@ global: - rtnl_qdisc_mqprio_set_priomap; - rtnl_qdisc_mqprio_set_queue; - rtnl_qdisc_mqprio_set_shaper; -+ rtnl_route_nh_get_encap_mpls_dst; -+ rtnl_route_nh_get_encap_mpls_ttl; - rtnl_rule_get_dport; - rtnl_rule_get_ipproto; - rtnl_rule_get_protocol; --- -2.7.4 - diff --git a/src/libnl3/patch/0002-mpls-remove-nl_addr_valid.patch b/src/libnl3/patch/0002-mpls-remove-nl_addr_valid.patch deleted file mode 100644 index 9231aa2cd98..00000000000 --- a/src/libnl3/patch/0002-mpls-remove-nl_addr_valid.patch +++ /dev/null @@ -1,63 +0,0 @@ -From c89d1a129f71d3d2f76e6cbadb11ef41d8941a73 Mon Sep 17 00:00:00 2001 -From: Ann Pokora -Date: Tue, 25 May 2021 18:10:04 -0700 -Subject: [PATCH 2/2] mpls remove nl_addr_valid - -The removed calls to nl_addr_valid() are passing in a pointer to a binary address -and the length of the binary address, which does not match expected arguments for -nl_addr_valid(). -nl_addr_valid() expects a pointer to an ASCII string and the address family of -the string format. -The incorrect arguments cause unexpected failures and the expected arguments are -not available in the context. - -Signed-off-by: Ann Pokora ---- - lib/route/nexthop.c | 8 -------- - lib/route/nh_encap_mpls.c | 4 ---- - 2 files changed, 12 deletions(-) - -diff --git a/lib/route/nexthop.c b/lib/route/nexthop.c -index 7a9904c..ac0095e 100644 ---- a/lib/route/nexthop.c -+++ b/lib/route/nexthop.c -@@ -351,10 +351,6 @@ int rtnl_route_nh_set_newdst(struct rtnl_nexthop *nh, struct nl_addr *addr) - { - struct nl_addr *old = nh->rtnh_newdst; - -- if (!nl_addr_valid(nl_addr_get_binary_addr(addr), -- nl_addr_get_len(addr))) -- return -NLE_INVAL; -- - if (addr) { - nh->rtnh_newdst = nl_addr_get(addr); - nh->ce_mask |= NH_ATTR_NEWDST; -@@ -378,10 +374,6 @@ int rtnl_route_nh_set_via(struct rtnl_nexthop *nh, struct nl_addr *addr) - { - struct nl_addr *old = nh->rtnh_via; - -- if (!nl_addr_valid(nl_addr_get_binary_addr(addr), -- nl_addr_get_len(addr))) -- return -NLE_INVAL; -- - if (addr) { - nh->rtnh_via = nl_addr_get(addr); - nh->ce_mask |= NH_ATTR_VIA; -diff --git a/lib/route/nh_encap_mpls.c b/lib/route/nh_encap_mpls.c -index 18336ac..6c5a3c7 100644 ---- a/lib/route/nh_encap_mpls.c -+++ b/lib/route/nh_encap_mpls.c -@@ -109,10 +109,6 @@ int rtnl_route_nh_encap_mpls(struct rtnl_nexthop *nh, - if (!addr) - return -NLE_INVAL; - -- if (!nl_addr_valid(nl_addr_get_binary_addr(addr), -- nl_addr_get_len(addr))) -- return -NLE_INVAL; -- - rtnh_encap = calloc(1, sizeof(*rtnh_encap)); - if (!rtnh_encap) - return -NLE_NOMEM; --- -2.7.4 - diff --git a/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch b/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch index 80f94a2a02b..3c1fa22ccea 100644 --- a/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch +++ b/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch @@ -98,7 +98,7 @@ index bacabe8..5d9d4ce 100644 static int parse_multipath(struct rtnl_route *route, struct nlattr *attr) @@ -1201,6 +1218,9 @@ int rtnl_route_parse(struct nlmsghdr *nlh, struct rtnl_route **result) - nl_addr_put(addr); + rtnl_route_set_pref_src(route, addr); } + if (tb[RTA_NH_ID]) diff --git a/src/libnl3/patch/keep-symbol-versions-in-libraries.patch b/src/libnl3/patch/keep-symbol-versions-in-libraries.patch new file mode 100644 index 00000000000..d4cef01e45a --- /dev/null +++ b/src/libnl3/patch/keep-symbol-versions-in-libraries.patch @@ -0,0 +1,91 @@ +From 3f7655c4e4ff042f77c0bbab8b3afc11470456b6 Mon Sep 17 00:00:00 2001 +From: Saikrishna Arcot +Date: Wed, 6 Nov 2024 13:45:13 -0800 +Subject: [PATCH] Keep symbol versions in libraries + +Libraries/binaries that were compiled against the older libnl3 library +(or for other environments) have the symbol versions, and removing them +will cause breakage. For now, kepp the symbol versions. + +Signed-off-by: Saikrishna Arcot +--- + Makefile.am | 21 ++++++++++++++------- + 1 file changed, 14 insertions(+), 7 deletions(-) + +diff --git a/Makefile.am b/Makefile.am +index 7debff9..58e9e87 100644 +--- a/Makefile.am ++++ b/Makefile.am +@@ -370,7 +370,8 @@ EXTRA_lib_libnl_3_la_DEPENDENCIES = \ + lib_libnl_3_la_CPPFLAGS = \ + $(lib_cppflags) + lib_libnl_3_la_LDFLAGS = \ +- -version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) ++ -version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) \ ++ -Wl,--version-script=$(srcdir)/libnl-3.sym + + lib_LTLIBRARIES += lib/libnl-route-3.la + +@@ -466,7 +467,8 @@ EXTRA_lib_libnl_route_3_la_DEPENDENCIES = \ + lib_libnl_route_3_la_CPPFLAGS = \ + $(lib_cppflags) + lib_libnl_route_3_la_LDFLAGS = \ +- -version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) ++ -version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) \ ++ -Wl,--version-script=$(srcdir)/libnl-route-3.sym + lib_libnl_route_3_la_LIBADD = \ + lib/libnl-3.la + +@@ -486,7 +488,8 @@ EXTRA_lib_libnl_idiag_3_la_DEPENDENCIES = \ + lib_libnl_idiag_3_la_CPPFLAGS = \ + $(lib_cppflags) + lib_libnl_idiag_3_la_LDFLAGS = \ +- -version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) ++ -version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) \ ++ -Wl,--version-script=$(srcdir)/libnl-idiag-3.sym + lib_libnl_idiag_3_la_LIBADD = \ + lib/libnl-3.la + +@@ -503,7 +506,8 @@ EXTRA_lib_libnl_genl_3_la_DEPENDENCIES = \ + lib_libnl_genl_3_la_CPPFLAGS = \ + $(lib_cppflags) + lib_libnl_genl_3_la_LDFLAGS = \ +- -version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) ++ -version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) \ ++ -Wl,--version-script=$(srcdir)/libnl-genl-3.sym + lib_libnl_genl_3_la_LIBADD = \ + lib/libnl-3.la + +@@ -530,7 +534,8 @@ lib_libnl_nf_3_la_CPPFLAGS = \ + EXTRA_lib_libnl_nf_3_la_DEPENDENCIES = \ + libnl-nf-3.sym + lib_libnl_nf_3_la_LDFLAGS = \ +- -version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) ++ -version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) \ ++ -Wl,--version-script=$(srcdir)/libnl-nf-3.sym + lib_libnl_nf_3_la_LIBADD = \ + lib/libnl-3.la \ + lib/libnl-route-3.la +@@ -548,7 +553,8 @@ lib_libnl_xfrm_3_la_SOURCES = \ + lib_libnl_xfrm_3_la_CPPFLAGS = \ + $(lib_cppflags) + lib_libnl_xfrm_3_la_LDFLAGS = \ +- -version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) ++ -version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) \ ++ -Wl,--version-script=$(srcdir)/libnl-xfrm-3.sym + EXTRA_lib_libnl_xfrm_3_la_DEPENDENCIES = \ + libnl-xfrm-3.sym + lib_libnl_xfrm_3_la_LIBADD = \ +@@ -640,7 +646,8 @@ src_lib_libnl_cli_3_la_CPPFLAGS = \ + -I$(srcdir)/include \ + -I$(builddir)/include + src_lib_libnl_cli_3_la_LDFLAGS = \ +- $(src_lib_ldflags) ++ $(src_lib_ldflags) \ ++ -Wl,--version-script=$(srcdir)/libnl-cli-3.sym + src_lib_libnl_cli_3_la_LIBADD = \ + lib/libnl-3.la \ + lib/libnl-route-3.la \ +-- +2.34.1 + diff --git a/src/libnl3/patch/series b/src/libnl3/patch/series index 4c7c2d8e25a..92317908c4f 100644 --- a/src/libnl3/patch/series +++ b/src/libnl3/patch/series @@ -1,3 +1,4 @@ -0001-mpls-encap-accessors.patch -0002-mpls-remove-nl_addr_valid.patch 0003-Adding-support-for-RTA_NH_ID-attribute.patch +switch-to-debhelper.patch +keep-symbol-versions-in-libraries.patch +update-changelog.patch diff --git a/src/libnl3/patch/switch-to-debhelper.patch b/src/libnl3/patch/switch-to-debhelper.patch new file mode 100644 index 00000000000..4f6f1227f40 --- /dev/null +++ b/src/libnl3/patch/switch-to-debhelper.patch @@ -0,0 +1,263 @@ +From 051dc6f003bf57fd41f75317281ab3bab776e6f1 Mon Sep 17 00:00:00 2001 +From: Saikrishna Arcot +Date: Wed, 30 Oct 2024 09:16:47 -0700 +Subject: [PATCH] Switch to debhelper build infra + +This makes it easier to have it use the latest compat level when +building. + +Also remove the udeb packages, as SONiC doesn't need udeb packages here. +--- + debian/compat | 2 +- + debian/control | 40 +------------------------- + debian/libnl-3-200-udeb.install | 1 - + debian/libnl-3-200.install | 1 - + debian/libnl-3-dev.install | 3 +- + debian/libnl-cli-3-200.install | 1 - + debian/libnl-cli-3-dev.install | 8 ++++-- + debian/libnl-genl-3-200-udeb.install | 2 -- + debian/libnl-genl-3-200.install | 1 - + debian/libnl-genl-3-dev.install | 3 +- + debian/libnl-route-3-dev.install | 6 ++-- + debian/libnl-xfrm-3-dev.install | 6 ++-- + debian/not-installed | 3 ++ + debian/rules | 43 ++-------------------------- + 14 files changed, 20 insertions(+), 100 deletions(-) + delete mode 100644 debian/libnl-3-200-udeb.install + mode change 100755 => 100644 debian/libnl-3-200.install + mode change 100755 => 100644 debian/libnl-3-dev.install + mode change 100755 => 100644 debian/libnl-cli-3-200.install + delete mode 100755 debian/libnl-genl-3-200-udeb.install + mode change 100755 => 100644 debian/libnl-genl-3-200.install + mode change 100755 => 100644 debian/libnl-genl-3-dev.install + create mode 100644 debian/not-installed + +diff --git a/debian/compat b/debian/compat +index ec63514..b1bd38b 100644 +--- a/debian/compat ++++ b/debian/compat +@@ -1 +1 @@ +-9 ++13 +diff --git a/debian/control b/debian/control +index 7b22e69..c954b03 100644 +--- a/debian/control ++++ b/debian/control +@@ -2,7 +2,7 @@ Source: libnl3 + Section: net + Priority: optional + Maintainer: Heiko Stuebner +-Build-Depends: debhelper (>= 9), dh-exec (>= 0.3), cdbs (>= 0.4.93~), bison, flex, ++Build-Depends: debhelper (>= 13), bison, flex, + automake, autoconf, dh-autoreconf, linux-libc-dev (>= 3.2.41), pkg-config + Standards-Version: 4.1.4 + Homepage: http://www.infradead.org/~tgr/libnl/ +@@ -204,41 +204,3 @@ Description: development library and headers for libnl-xfrm-3 + . + This package contains the files that are needed to build applications using + libnl-xfrm-3. +- +-Package: libnl-3-200-dbg +-Architecture: linux-any +-Section: debug +-Depends: libnl-3-200 (= ${binary:Version}), ${misc:Depends} +-Description: debug symbols for libnl3 +- This is a library for applications dealing with netlink sockets. +- The library provides an interface for raw netlink messaging and various +- netlink family specific interfaces. +- . +- This package contains unstripped shared libraries. It is provided primarily +- to provide a backtrace with names in a debugger, this makes it somewhat easier +- to interpret core dumps. The libraries are installed in /usr/lib/debug and +- are automatically used by gdb. +- +-Package: libnl-3-200-udeb +-Architecture: linux-any +-XC-Package-Type: udeb +-Section: debian-installer +-Depends: ${misc:Depends}, ${shlibs:Depends} +-Description: library for dealing with netlink sockets +- This is a library for applications dealing with netlink sockets. +- The library provides an interface for raw netlink messaging and various +- netlink family specific interfaces. +- . +- This package is a udeb. It's only useful inside of debian-installer. +- +-Package: libnl-genl-3-200-udeb +-Architecture: linux-any +-XC-Package-Type: udeb +-Section: debian-installer +-Depends: libnl-3-200-udeb (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends} +-Description: library for dealing with netlink sockets - generic netlink +- This is a library for applications dealing with netlink sockets. +- The library provides an interface for raw netlink messaging and various +- netlink family specific interfaces. +- . +- This package is a udeb. It's only useful inside of debian-installer. +diff --git a/debian/libnl-3-200-udeb.install b/debian/libnl-3-200-udeb.install +deleted file mode 100644 +index 4b3a77c..0000000 +--- a/debian/libnl-3-200-udeb.install ++++ /dev/null +@@ -1 +0,0 @@ +-usr/lib/*/libnl-3.so.* lib +diff --git a/debian/libnl-3-200.install b/debian/libnl-3-200.install +old mode 100755 +new mode 100644 +index dab89da..4685c79 +--- a/debian/libnl-3-200.install ++++ b/debian/libnl-3-200.install +@@ -1,3 +1,2 @@ +-#!/usr/bin/dh-exec + debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-3*.so.* lib/${DEB_HOST_MULTIARCH}/ + debian/tmp/etc/libnl-3/* etc/libnl-3 +diff --git a/debian/libnl-3-dev.install b/debian/libnl-3-dev.install +old mode 100755 +new mode 100644 +index 3715b8b..5f56b4a +--- a/debian/libnl-3-dev.install ++++ b/debian/libnl-3-dev.install +@@ -1,5 +1,4 @@ +-#!/usr/bin/dh-exec + debian/tmp/usr/include/* +-debian/tmp/usr/lib/*/pkgconfig/libnl-3* ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/pkgconfig/libnl-3* + debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-3.so lib/${DEB_HOST_MULTIARCH}/ + debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-3.a lib/${DEB_HOST_MULTIARCH}/ +diff --git a/debian/libnl-cli-3-200.install b/debian/libnl-cli-3-200.install +old mode 100755 +new mode 100644 +index 6735ec9..4e21828 +--- a/debian/libnl-cli-3-200.install ++++ b/debian/libnl-cli-3-200.install +@@ -1,4 +1,3 @@ +-#!/usr/bin/dh-exec + debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-cli-3*.so.* + debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/cls/*.so usr/lib/${DEB_HOST_MULTIARCH}/libnl-3/cli/cls + debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/qdisc/*.so usr/lib/${DEB_HOST_MULTIARCH}/libnl-3/cli/qdisc +diff --git a/debian/libnl-cli-3-dev.install b/debian/libnl-cli-3-dev.install +index 66aa3b3..cfa7abe 100644 +--- a/debian/libnl-cli-3-dev.install ++++ b/debian/libnl-cli-3-dev.install +@@ -1,3 +1,5 @@ +-debian/tmp/usr/lib/*/pkgconfig/libnl-cli-3* +-debian/tmp/usr/lib/*/libnl-cli-3*.so +-debian/tmp/usr/lib/*/libnl-cli-3*.a ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/pkgconfig/libnl-cli-3* ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-cli-3*.so ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-cli-3*.a ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/cls/*.a ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/qdisc/*.a +diff --git a/debian/libnl-genl-3-200-udeb.install b/debian/libnl-genl-3-200-udeb.install +deleted file mode 100755 +index cb5597b..0000000 +--- a/debian/libnl-genl-3-200-udeb.install ++++ /dev/null +@@ -1,2 +0,0 @@ +-#!/usr/bin/dh-exec +-usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3.so.* lib/${DEB_HOST_MULTIARCH}/ +diff --git a/debian/libnl-genl-3-200.install b/debian/libnl-genl-3-200.install +old mode 100755 +new mode 100644 +index d9d6fae..e79fbf1 +--- a/debian/libnl-genl-3-200.install ++++ b/debian/libnl-genl-3-200.install +@@ -1,2 +1 @@ +-#!/usr/bin/dh-exec + debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3*.so.* lib/${DEB_HOST_MULTIARCH}/ +diff --git a/debian/libnl-genl-3-dev.install b/debian/libnl-genl-3-dev.install +old mode 100755 +new mode 100644 +index cbc6b51..68148a0 +--- a/debian/libnl-genl-3-dev.install ++++ b/debian/libnl-genl-3-dev.install +@@ -1,4 +1,3 @@ +-#!/usr/bin/dh-exec +-debian/tmp/usr/lib/*/pkgconfig/libnl-genl-3* ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/pkgconfig/libnl-genl-3* + debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3*.so lib/${DEB_HOST_MULTIARCH}/ + debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3*.a lib/${DEB_HOST_MULTIARCH}/ +diff --git a/debian/libnl-route-3-dev.install b/debian/libnl-route-3-dev.install +index 37e248c..c3f0e4e 100644 +--- a/debian/libnl-route-3-dev.install ++++ b/debian/libnl-route-3-dev.install +@@ -1,3 +1,3 @@ +-debian/tmp/usr/lib/*/pkgconfig/libnl-route-3* +-debian/tmp/usr/lib/*/libnl-route-3*.so +-debian/tmp/usr/lib/*/libnl-route-3*.a ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/pkgconfig/libnl-route-3* ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-route-3*.so ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-route-3*.a +diff --git a/debian/libnl-xfrm-3-dev.install b/debian/libnl-xfrm-3-dev.install +index f57e152..51d78d1 100644 +--- a/debian/libnl-xfrm-3-dev.install ++++ b/debian/libnl-xfrm-3-dev.install +@@ -1,3 +1,3 @@ +-debian/tmp/usr/lib/*/pkgconfig/libnl-xfrm-3* +-debian/tmp/usr/lib/*/libnl-xfrm-3*.so +-debian/tmp/usr/lib/*/libnl-xfrm-3*.a ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/pkgconfig/libnl-xfrm-3* ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-xfrm-3*.so ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-xfrm-3*.a +diff --git a/debian/not-installed b/debian/not-installed +new file mode 100644 +index 0000000..079a795 +--- /dev/null ++++ b/debian/not-installed +@@ -0,0 +1,3 @@ ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-*.la ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/cls/*.la ++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/qdisc/*.la +diff --git a/debian/rules b/debian/rules +index aafca20..2d33f6a 100755 +--- a/debian/rules ++++ b/debian/rules +@@ -1,43 +1,4 @@ + #!/usr/bin/make -f + +-DEB_BUILDDIR = debian/build +-DEB_MAKE_FLAVORS = main udeb +- +-udeb_libnl=libnl-3-200-udeb +-udeb_libnl_genl=libnl-genl-3-200-udeb +- +-TG_BRANCHES := debian/etc-libnl-3,debian/out-of-tree,debian/no-symvers +- +--include /usr/share/topgit/tg2quilt.mk +- +-# to export the patch series use +-# debian/rules tg-clean +-# debian/rules tg-export +- +- +-include /usr/share/cdbs/1/rules/debhelper.mk +-include /usr/share/cdbs/1/rules/autoreconf.mk +-include /usr/share/cdbs/1/class/autotools.mk +- +-# FIXME: not honoured +-#CFLAGS_udeb += $(CFLAGS) -Os +-CFLAGS += $(if $(findstring udeb,$(cdbs_make_curflavor)),-Os) +- +-DEB_DH_STRIP_ARGS := --dbg-package=libnl-3-200-dbg +-DEB_DH_MAKESHLIBS_ARGS_libnl-3-200 := --add-udeb=$(udeb_libnl) +-DEB_DH_MAKESHLIBS_ARGS_libnl-genl-3-200 := --add-udeb=$(udeb_libnl_genl) +- +-DEB_MAKE_DESTDIRSKEL = $(CURDIR)/debian/tmp +-DEB_MAKE_DESTDIRSKEL_udeb = $(CURDIR)/debian/tmp/udeb +- +-DEB_DH_INSTALL_ARGS_$(udeb) += --sourcedir=debian/tmp/udeb +- +-DEB_CONFIGURE_EXTRA_FLAGS += --libdir=\$${prefix}/lib/$(DEB_HOST_MULTIARCH) +- +-# Dodge debhelper's #1015263, pulling sgml-base for udebs: +-DEB_DH_GENCONTROL_ARGS_$(udeb_libnl) = -- -Vmisc:Depends= +-DEB_DH_GENCONTROL_ARGS_$(udeb_libnl_genl) = -- -Vmisc:Depends= +- +-clean:: +- # from some unknown reason CDBS does not remove the builddir +- rm -rf $(DEB_BUILDDIR) ++%: ++ dh $@ +-- +2.34.1 + diff --git a/src/libnl3/patch/update-changelog.patch b/src/libnl3/patch/update-changelog.patch new file mode 100644 index 00000000000..75a6b263b91 --- /dev/null +++ b/src/libnl3/patch/update-changelog.patch @@ -0,0 +1,30 @@ +From 62e7fbb3b7f47c686d918f67bbba17f77e1ed217 Mon Sep 17 00:00:00 2001 +From: Saikrishna Arcot +Date: Mon, 4 Nov 2024 16:26:03 -0800 +Subject: [PATCH] Update changelog + +Add changelog entry to force different timestamps, so that docker's +overlay2 diff code doesn't have issues. + +Signed-off-by: Saikrishna Arcot +--- + debian/changelog | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/debian/changelog b/debian/changelog +index b8b08d7..48e33f0 100644 +--- a/debian/changelog ++++ b/debian/changelog +@@ -1,3 +1,9 @@ ++libnl3 (3.7.0-0.2+b1sonic1) unstable; urgency=medium ++ ++ * Add support to get/set the nexthop ID ++ ++ -- SONiC Build Tue, 05 Nov 2024 00:20:23 +0000 ++ + libnl3 (3.7.0-0.2) unstable; urgency=medium + + * Non-maintainer upload. +-- +2.34.1 + diff --git a/src/libyang2/Makefile b/src/libyang2/Makefile index fab24590a34..16d80587573 100644 --- a/src/libyang2/Makefile +++ b/src/libyang2/Makefile @@ -5,7 +5,7 @@ SHELL = /bin/bash LIBYANG_URL = https://sonicstorage.blob.core.windows.net/debian/pool/main/liby/libyang DSC_FILE = libyang2_$(LIBYANG2_FULLVERSION).dsc -ORIG_FILE = libyang2_$(LIBYANG2_VERSION).orig.tar.gz +ORIG_FILE = libyang2_$(LIBYANG2_VERSION).orig.tar.xz DEBIAN_FILE = libyang2_$(LIBYANG2_FULLVERSION).debian.tar.xz DSC_FILE_URL = $(LIBYANG_URL)/$(DSC_FILE) @@ -26,6 +26,10 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : dpkg-source -x libyang2_$(LIBYANG2_FULLVERSION).dsc pushd libyang2-$(LIBYANG2_VERSION) + #The package libyang2.1.148 is taken from debian trixie, which only has dpkg-dev version 1.21.22 + #The bullseye package has dpkg-dev version 1.20.13 + #The VS package has dpkg-dev version 1.19.8 + sed -i 's/dpkg-dev (>= 1.22.5)/dpkg-dev (>= 1.19.8)/' debian/control #sed -i 's/set(LIBYANG_MAJOR_SOVERSION 1)/set(LIBYANG_MAJOR_SOVERSION 2)/' CMakeLists.txt #sed -i 's/libyang2/libyang2/' debian/libyang2.install # Enable large file support for 32-bit arch diff --git a/src/linkmgrd b/src/linkmgrd index f3fbf091ae6..ccd52d06acf 160000 --- a/src/linkmgrd +++ b/src/linkmgrd @@ -1 +1 @@ -Subproject commit f3fbf091ae644549675e68818f0dc8680483aff5 +Subproject commit ccd52d06acf802e960939bf7a29d819607985652 diff --git a/src/ptf-py3.patch/0004-Consider-only-expected-packets-for-timeout.patch b/src/ptf-py3.patch/0004-Consider-only-expected-packets-for-timeout.patch new file mode 100644 index 00000000000..4769b1a0753 --- /dev/null +++ b/src/ptf-py3.patch/0004-Consider-only-expected-packets-for-timeout.patch @@ -0,0 +1,40 @@ +From f961a46cd8b3736a7ac8534fad774433b2a8ce6b Mon Sep 17 00:00:00 2001 +From: Vinod Kumar +Date: Thu, 12 Dec 2024 11:04:21 +0000 +Subject: [PATCH] Consider only expected packets for timeout + +"count_matched_packets" method is getting stuck in a while loop as long +as ptf server port receives any packet (Ex: in dualtor case, we do see +continuous ICMP packets on ptf port). Fix is to consider only expected +packets w.r.t timeout (similar to "count_matched_packets_all_ports" logic). +--- + src/ptf/testutils.py | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/src/ptf/testutils.py b/src/ptf/testutils.py +index 46b926c..2402e8f 100755 +--- a/src/ptf/testutils.py ++++ b/src/ptf/testutils.py +@@ -3636,14 +3636,19 @@ def count_matched_packets(test, exp_packet, port, device_number=0, timeout=None) + "%s() requires positive timeout value." % sys._getframe().f_code.co_name + ) + ++ last_matched_packet_time = time.time() + total_rcv_pkt_cnt = 0 + while True: ++ if (time.time() - last_matched_packet_time) > timeout: ++ break ++ + result = dp_poll( + test, device_number=device_number, port_number=port, timeout=timeout + ) + if isinstance(result, test.dataplane.PollSuccess): + if ptf.dataplane.match_exp_pkt(exp_packet, result.packet): + total_rcv_pkt_cnt += 1 ++ last_matched_packet_time = time.time() + else: + break + +-- +2.43.5 + diff --git a/src/ptf-py3.patch/series b/src/ptf-py3.patch/series index 9bbcdfcbfda..21924596f8d 100644 --- a/src/ptf-py3.patch/series +++ b/src/ptf-py3.patch/series @@ -1,3 +1,4 @@ 0001-Remove-ord-in-get_mac-to-avoid-TypeError.patch 0002-Fill-byte-formatted-client-mac-address-in-DHCP-Disco.patch 0003-Avoid-local-version-scheme-by-setuptools-scm.patch +0004-Consider-only-expected-packets-for-timeout.patch diff --git a/src/sonic-bgpcfgd/bgpcfgd/main.py b/src/sonic-bgpcfgd/bgpcfgd/main.py index 4b41e6825f9..9baac35712e 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/main.py +++ b/src/sonic-bgpcfgd/bgpcfgd/main.py @@ -22,6 +22,7 @@ from .managers_rm import RouteMapMgr from .managers_device_global import DeviceGlobalCfgMgr from .managers_chassis_app_db import ChassisAppDbMgr +from .managers_srv6 import SRv6Mgr from .static_rt_timer import StaticRouteTimer from .runner import Runner, signal_handler from .template import TemplateFabric @@ -75,6 +76,9 @@ def do_work(): RouteMapMgr(common_objs, "APPL_DB", swsscommon.APP_BGP_PROFILE_TABLE_NAME), # Device Global Manager DeviceGlobalCfgMgr(common_objs, "CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME), + # SRv6 Manager + SRv6Mgr(common_objs, "CONFIG_DB", "SRV6_MY_SIDS"), + SRv6Mgr(common_objs, "CONFIG_DB", "SRV6_MY_LOCATORS") ] if device_info.is_chassis(): diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py index 0b07f9cbcda..19e478578c1 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py +++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py @@ -387,7 +387,7 @@ def load_peers(): Load peers from FRR. :return: set of peers, which are already installed in FRR """ - command = ["vtysh", "-c", "show bgp vrfs json"] + command = ["vtysh", "-H", "/dev/null", "-c", "show bgp vrfs json"] ret_code, out, err = run_command(command) if ret_code == 0: js_vrf = json.loads(out) diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_srv6.py b/src/sonic-bgpcfgd/bgpcfgd/managers_srv6.py new file mode 100644 index 00000000000..81e80eb6095 --- /dev/null +++ b/src/sonic-bgpcfgd/bgpcfgd/managers_srv6.py @@ -0,0 +1,136 @@ +from .log import log_err, log_debug, log_warn +from .manager import Manager +from ipaddress import IPv6Address +from swsscommon import swsscommon + +supported_SRv6_behaviors = { + 'uN', + 'uDT46', +} + +DEFAULT_VRF = "default" +SRV6_MY_SIDS_TABLE_NAME = "SRV6_MY_SIDS" + +class SRv6Mgr(Manager): + """ This class updates SRv6 configurations when SRV6_MY_SID_TABLE table is updated """ + def __init__(self, common_objs, db, table): + """ + Initialize the object + :param common_objs: common object dictionary + :param db: name of the db + :param table: name of the table in the db + """ + super(SRv6Mgr, self).__init__( + common_objs, + [], + db, + table, + ) + + def set_handler(self, key, data): + if self.table_name == SRV6_MY_SIDS_TABLE_NAME: + return self.sids_set_handler(key, data) + else: + return self.locators_set_handler(key, data) + + def locators_set_handler(self, key, data): + locator_name = key + + locator = Locator(locator_name, data) + cmd_list = ["segment-routing", "srv6"] + cmd_list += ['locators', + 'locator {}'.format(locator_name), + 'prefix {} block-len {} node-len {} func-bits {}'.format( + locator.prefix, + locator.block_len, locator.node_len, locator.func_len), + "behavior usid" + ] + + self.cfg_mgr.push_list(cmd_list) + log_debug("{} SRv6 static configuration {}|{} is scheduled for updates. {}".format(self.db_name, self.table_name, key, str(cmd_list))) + + self.directory.put(self.db_name, self.table_name, key, locator) + return True + + def sids_set_handler(self, key, data): + locator_name = key.split("|")[0] + ip_addr = key.split("|")[1].lower() + key = "{}|{}".format(locator_name, ip_addr) + + if not self.directory.path_exist(self.db_name, "SRV6_MY_LOCATORS", locator_name): + log_err("Found a SRv6 SID config entry with a locator that does not exist: {} | {}".format(key, data)) + return False + + locator = self.directory.get(self.db_name, "SRV6_MY_LOCATORS", locator_name) + + if 'action' not in data: + log_err("Found a SRv6 SID config entry that does not specify action: {} | {}".format(key, data)) + return False + + if data['action'] not in supported_SRv6_behaviors: + log_err("Found a SRv6 SID config entry associated with unsupported action: {} | {}".format(key, data)) + return False + + sid = SID(locator_name, ip_addr, data) # the information in data will be parsed into SID's attributes + + cmd_list = ['segment-routing', 'srv6', 'static-sids'] + sid_cmd = 'sid {}/{} locator {} behavior {}'.format(ip_addr, locator.block_len + locator.node_len + locator.func_len, locator_name, sid.action) + if sid.decap_vrf != DEFAULT_VRF: + sid_cmd += ' vrf {}'.format(sid.decap_vrf) + cmd_list.append(sid_cmd) + + self.cfg_mgr.push_list(cmd_list) + log_debug("{} SRv6 static configuration {}|{} is scheduled for updates. {}".format(self.db_name, self.table_name, key, str(cmd_list))) + + self.directory.put(self.db_name, self.table_name, key, (sid, sid_cmd)) + return True + + def del_handler(self, key): + if self.table_name == SRV6_MY_SIDS_TABLE_NAME: + self.sids_del_handler(key) + else: + self.locators_del_handler(key) + + def locators_del_handler(self, key): + locator_name = key + cmd_list = ['segment-routing', 'srv6', 'locators', 'no locator {}'.format(locator_name)] + + self.cfg_mgr.push_list(cmd_list) + log_debug("{} SRv6 static configuration {}|{} is scheduled for updates. {}".format(self.db_name, self.table_name, key, str(cmd_list))) + self.directory.remove(self.db_name, self.table_name, key) + + def sids_del_handler(self, key): + locator_name = key.split("|")[0] + ip_addr = key.split("|")[1].lower() + key = "{}|{}".format(locator_name, ip_addr) + + if not self.directory.path_exist(self.db_name, self.table_name, key): + log_warn("Encountered a config deletion with a SRv6 SID that does not exist: {}".format(key)) + return + + _, sid_cmd = self.directory.get(self.db_name, self.table_name, key) + cmd_list = ['segment-routing', 'srv6', "static-sids"] + no_sid_cmd = 'no ' + sid_cmd + cmd_list.append(no_sid_cmd) + + self.cfg_mgr.push_list(cmd_list) + log_debug("{} SRv6 static configuration {}|{} is scheduled for updates. {}".format(self.db_name, self.table_name, key, str(cmd_list))) + self.directory.remove(self.db_name, self.table_name, key) + +class Locator: + def __init__(self, name, data): + self.name = name + self.block_len = int(data['block_len'] if 'block_len' in data else 32) + self.node_len = int(data['node_len'] if 'node_len' in data else 16) + self.func_len = int(data['func_len'] if 'func_len' in data else 16) + self.arg_len = int(data['arg_len'] if 'arg_len' in data else 0) + self.prefix = data['prefix'].lower() + "/{}".format(self.block_len + self.node_len) + +class SID: + def __init__(self, locator, ip_addr, data): + self.locator_name = locator + self.ip_addr = ip_addr + + self.action = data['action'] + self.decap_vrf = data['decap_vrf'] if 'decap_vrf' in data else DEFAULT_VRF + self.adj = data['adj'].split(',') if 'adj' in data else [] \ No newline at end of file diff --git a/src/sonic-bgpcfgd/bgpcfgd/runner.py b/src/sonic-bgpcfgd/bgpcfgd/runner.py index 75df6f902e9..3ede4bbfe85 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/runner.py +++ b/src/sonic-bgpcfgd/bgpcfgd/runner.py @@ -40,7 +40,7 @@ def add_manager(self, manager): db = swsscommon.SonicDBConfig.getDbId(db_name) if db not in self.db_connectors: if db_name == "CHASSIS_APP_DB": - self.db_connectors[db] = swsscommon.DBConnector(db_name, 0, True, '') + self.db_connectors[db] = swsscommon.DBConnector(db_name, 0, False, '') else: self.db_connectors[db] = swsscommon.DBConnector(db_name, 0) diff --git a/src/sonic-bgpcfgd/bgpmon/bgpmon.py b/src/sonic-bgpcfgd/bgpmon/bgpmon.py index 26a5b245413..2623ec62482 100755 --- a/src/sonic-bgpcfgd/bgpmon/bgpmon.py +++ b/src/sonic-bgpcfgd/bgpmon/bgpmon.py @@ -77,7 +77,7 @@ def update_new_peer_states(self, peer_dict): # Get a new snapshot of BGP neighbors and store them in the "new" location def get_all_neigh_states(self): - cmd = ["vtysh", "-c", 'show bgp summary json'] + cmd = ["vtysh", "-H", "/dev/null", "-c", 'show bgp summary json'] retry_attempt = 0 while retry_attempt < self.MAX_RETRY_ATTEMPTS: diff --git a/src/sonic-bgpcfgd/staticroutebfd/main.py b/src/sonic-bgpcfgd/staticroutebfd/main.py index 89f10f2dca5..58005b97e66 100644 --- a/src/sonic-bgpcfgd/staticroutebfd/main.py +++ b/src/sonic-bgpcfgd/staticroutebfd/main.py @@ -111,9 +111,9 @@ def __init__(self): #assume only one ipv4 and/or one ipv6 for each interface self.local_db[LOCAL_INTERFACE_TABLE] = defaultdict(dict) - self.config_db = swsscommon.DBConnector(CONFIG_DB_NAME, 0, True) - self.appl_db = swsscommon.DBConnector(APPL_DB_NAME, 0, True) - self.state_db = swsscommon.DBConnector(STATE_DB_NAME, 0, True) + self.config_db = swsscommon.DBConnector(CONFIG_DB_NAME, 0, False) + self.appl_db = swsscommon.DBConnector(APPL_DB_NAME, 0, False) + self.state_db = swsscommon.DBConnector(STATE_DB_NAME, 0, False) self.bfd_appl_tbl = swsscommon.ProducerStateTable(self.appl_db, BFD_SESSION_TABLE_NAME) diff --git a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_back.conf b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_back.conf index da0e6b77339..c6acef329ef 100644 --- a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_back.conf +++ b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_back.conf @@ -10,7 +10,6 @@ neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out neighbor INTERNAL_PEER_V4 send-community - neighbor INTERNAL_PEER_V4 ttl-security hops 1 exit-address-family address-family ipv6 neighbor INTERNAL_PEER_V6 route-reflector-client @@ -19,7 +18,6 @@ neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out neighbor INTERNAL_PEER_V6 send-community - neighbor INTERNAL_PEER_V6 ttl-security hops 1 exit-address-family ! ! end of template: bgpd/templates/internal/peer-group.conf.j2 diff --git a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chasiss_packet.conf b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chasiss_packet.conf index 64b30e514d8..30d8ef576b3 100644 --- a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chasiss_packet.conf +++ b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chasiss_packet.conf @@ -3,23 +3,23 @@ ! neighbor INTERNAL_PEER_V4 peer-group neighbor INTERNAL_PEER_V6 peer-group - neighbor INTERNAL_PEER_V4 update-source Loopback4096 + neighbor INTERNAL_PEER_V4 update-source Loopback4096 + neighbor INTERNAL_PEER_V4 ttl-security hops 1 address-family ipv4 neighbor INTERNAL_PEER_V4 soft-reconfiguration inbound neighbor INTERNAL_PEER_V4 allowas-in 1 neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out neighbor INTERNAL_PEER_V4 send-community - neighbor INTERNAL_PEER_V4 ttl-security hops 1 exit-address-family - neighbor INTERNAL_PEER_V6 update-source Loopback4096 + neighbor INTERNAL_PEER_V6 update-source Loopback4096 + neighbor INTERNAL_PEER_V6 ttl-security hops 1 address-family ipv6 neighbor INTERNAL_PEER_V6 soft-reconfiguration inbound neighbor INTERNAL_PEER_V6 allowas-in 1 neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out neighbor INTERNAL_PEER_V6 send-community - neighbor INTERNAL_PEER_V6 ttl-security hops 1 exit-address-family ! ! end of template: bgpd/templates/internal/peer-group.conf.j2 diff --git a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_isolate.conf b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_isolate.conf index cfb47916e65..1fcf6fab2be 100644 --- a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_isolate.conf +++ b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_isolate.conf @@ -3,23 +3,23 @@ ! neighbor INTERNAL_PEER_V4 peer-group neighbor INTERNAL_PEER_V6 peer-group - neighbor INTERNAL_PEER_V4 update-source Loopback4096 + neighbor INTERNAL_PEER_V4 update-source Loopback4096 + neighbor INTERNAL_PEER_V4 ttl-security hops 1 address-family ipv4 neighbor INTERNAL_PEER_V4 soft-reconfiguration inbound neighbor INTERNAL_PEER_V4 allowas-in 1 neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out neighbor INTERNAL_PEER_V4 send-community - neighbor INTERNAL_PEER_V4 ttl-security hops 1 exit-address-family - neighbor INTERNAL_PEER_V6 update-source Loopback4096 + neighbor INTERNAL_PEER_V6 update-source Loopback4096 + neighbor INTERNAL_PEER_V6 ttl-security hops 1 address-family ipv6 neighbor INTERNAL_PEER_V6 soft-reconfiguration inbound neighbor INTERNAL_PEER_V6 allowas-in 1 neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out neighbor INTERNAL_PEER_V6 send-community - neighbor INTERNAL_PEER_V6 ttl-security hops 1 exit-address-family ! ! end of template: bgpd/templates/internal/peer-group.conf.j2 diff --git a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_unisolate.conf b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_unisolate.conf index 2711f46d567..6842ce66ea6 100644 --- a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_unisolate.conf +++ b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_unisolate.conf @@ -3,23 +3,23 @@ ! neighbor INTERNAL_PEER_V4 peer-group neighbor INTERNAL_PEER_V6 peer-group - neighbor INTERNAL_PEER_V4 update-source Loopback4096 + neighbor INTERNAL_PEER_V4 update-source Loopback4096 + neighbor INTERNAL_PEER_V4 ttl-security hops 1 address-family ipv4 neighbor INTERNAL_PEER_V4 soft-reconfiguration inbound neighbor INTERNAL_PEER_V4 allowas-in 1 neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out neighbor INTERNAL_PEER_V4 send-community - neighbor INTERNAL_PEER_V4 ttl-security hops 1 exit-address-family - neighbor INTERNAL_PEER_V6 update-source Loopback4096 + neighbor INTERNAL_PEER_V6 update-source Loopback4096 + neighbor INTERNAL_PEER_V6 ttl-security hops 1 address-family ipv6 neighbor INTERNAL_PEER_V6 soft-reconfiguration inbound neighbor INTERNAL_PEER_V6 allowas-in 1 neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out neighbor INTERNAL_PEER_V6 send-community - neighbor INTERNAL_PEER_V6 ttl-security hops 1 exit-address-family ! ! end of template: bgpd/templates/internal/peer-group.conf.j2 diff --git a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_front.conf b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_front.conf index 363040eb12f..7b6ee2667de 100644 --- a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_front.conf +++ b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_front.conf @@ -9,7 +9,6 @@ neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out neighbor INTERNAL_PEER_V4 send-community - neighbor INTERNAL_PEER_V4 ttl-security hops 1 exit-address-family address-family ipv6 neighbor INTERNAL_PEER_V6 soft-reconfiguration inbound @@ -17,7 +16,6 @@ neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out neighbor INTERNAL_PEER_V6 send-community - neighbor INTERNAL_PEER_V6 ttl-security hops 1 exit-address-family ! ! end of template: bgpd/templates/internal/peer-group.conf.j2 diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.spine_chassis_frontend_router.conf.j2/base.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.spine_chassis_frontend_router.conf.j2/base.conf index 581eb107ec2..b7e9e710160 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.spine_chassis_frontend_router.conf.j2/base.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.spine_chassis_frontend_router.conf.j2/base.conf @@ -13,7 +13,7 @@ router bgp 555 vrf First address-family ipv4 unicast neighbor 10.10.10.1 activate neighbor 10.10.10.1 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family address-family l2vpn evpn advertise ipv4 unicast @@ -31,7 +31,7 @@ router bgp 555 vrf Second address-family ipv4 unicast neighbor 20.20.20.1 activate neighbor 20.20.20.1 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family address-family l2vpn evpn advertise ipv4 unicast diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf index bd8afe7f915..c22fa8c7f93 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf @@ -8,6 +8,7 @@ no fpm use-next-hop-groups ! fpm address 127.0.0.1 +zebra nexthop-group keep 1 ! ! template: common/daemons.common.conf.j2 ! diff --git a/src/sonic-bgpcfgd/tests/test_bgp.py b/src/sonic-bgpcfgd/tests/test_bgp.py index 5b494af4d79..b9240cccb8e 100644 --- a/src/sonic-bgpcfgd/tests/test_bgp.py +++ b/src/sonic-bgpcfgd/tests/test_bgp.py @@ -32,7 +32,7 @@ def constructor(constants_path, bgp_router_id="", peer_type="general", with_lo0_ } return_value_map = { - "['vtysh', '-c', 'show bgp vrfs json']": (0, "{\"vrfs\": {\"default\": {}}}", ""), + "['vtysh', '-H', '/dev/null', '-c', 'show bgp vrfs json']": (0, "{\"vrfs\": {\"default\": {}}}", ""), "['vtysh', '-c', 'show bgp vrf default neighbors json']": (0, "{\"10.10.10.1\": {}, \"20.20.20.1\": {}, \"fc00:10::1\": {}}", "") } diff --git a/src/sonic-bgpcfgd/tests/test_srv6.py b/src/sonic-bgpcfgd/tests/test_srv6.py new file mode 100644 index 00000000000..b2d54effd1c --- /dev/null +++ b/src/sonic-bgpcfgd/tests/test_srv6.py @@ -0,0 +1,163 @@ +from unittest.mock import MagicMock, patch + +from bgpcfgd.directory import Directory +from bgpcfgd.template import TemplateFabric +from bgpcfgd.managers_srv6 import SRv6Mgr + +def constructor(): + cfg_mgr = MagicMock() + + common_objs = { + 'directory': Directory(), + 'cfg_mgr': cfg_mgr, + 'tf': TemplateFabric(), + 'constants': {}, + } + + loc_mgr = SRv6Mgr(common_objs, "CONFIG_DB", "SRV6_MY_LOCATORS") + sid_mgr = SRv6Mgr(common_objs, "CONFIG_DB", "SRV6_MY_SIDS") + + return loc_mgr, sid_mgr + +def op_test(mgr: SRv6Mgr, op, args, expected_ret, expected_cmds): + op_test.push_list_called = False + def push_list_checker(cmds): + op_test.push_list_called = True + assert len(cmds) == len(expected_cmds) + for i in range(len(expected_cmds)): + assert cmds[i].lower() == expected_cmds[i].lower() + return True + mgr.cfg_mgr.push_list = push_list_checker + + if op == 'SET': + ret = mgr.set_handler(*args) + mgr.cfg_mgr.push_list = MagicMock() + assert expected_ret == ret + elif op == 'DEL': + mgr.del_handler(*args) + mgr.cfg_mgr.push_list = MagicMock() + else: + mgr.cfg_mgr.push_list = MagicMock() + assert False, "Unexpected operation {}".format(op) + + if expected_ret and expected_cmds: + assert op_test.push_list_called, "cfg_mgr.push_list wasn't called" + else: + assert not op_test.push_list_called, "cfg_mgr.push_list was called" + +def test_locator_add(): + loc_mgr, _ = constructor() + + op_test(loc_mgr, 'SET', ("loc1", { + 'prefix': 'fcbb:bbbb:1::' + }), expected_ret=True, expected_cmds=[ + 'segment-routing', + 'srv6', + 'locators', + 'locator loc1', + 'prefix fcbb:bbbb:1::/48 block-len 32 node-len 16 func-bits 16', + 'behavior usid' + ]) + + assert loc_mgr.directory.path_exist(loc_mgr.db_name, loc_mgr.table_name, "loc1") + +def test_locator_del(): + loc_mgr, _ = constructor() + loc_mgr.set_handler("loc1", {'prefix': 'fcbb:bbbb:1::'}) + + op_test(loc_mgr, 'DEL', ("loc1",), expected_ret=True, expected_cmds=[ + 'segment-routing', + 'srv6', + 'locators', + 'no locator loc1' + ]) + + assert not loc_mgr.directory.path_exist(loc_mgr.db_name, loc_mgr.table_name, "loc1") + +def test_uN_add(): + loc_mgr, sid_mgr = constructor() + assert loc_mgr.set_handler("loc1", {'prefix': 'fcbb:bbbb:1::'}) + + op_test(sid_mgr, 'SET', ("loc1|FCBB:BBBB:1:F1::", { + 'action': 'uN' + }), expected_ret=True, expected_cmds=[ + 'segment-routing', + 'srv6', + 'static-sids', + 'sid fcbb:bbbb:1:f1::/64 locator loc1 behavior uN' + ]) + + assert sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc1|fcbb:bbbb:1:f1::") + +def test_uDT46_add_vrf1(): + loc_mgr, sid_mgr = constructor() + assert loc_mgr.set_handler("loc1", {'prefix': 'fcbb:bbbb:1::'}) + + op_test(sid_mgr, 'SET', ("loc1|FCBB:BBBB:1:F2::", { + 'action': 'uDT46', + 'decap_vrf': 'Vrf1' + }), expected_ret=True, expected_cmds=[ + 'segment-routing', + 'srv6', + 'static-sids', + 'sid fcbb:bbbb:1:f2::/64 locator loc1 behavior uDT46 vrf Vrf1' + ]) + + assert sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc1|fcbb:bbbb:1:f2::") + +def test_uN_del(): + loc_mgr, sid_mgr = constructor() + assert loc_mgr.set_handler("loc1", {'prefix': 'fcbb:bbbb:1::'}) + + # add uN function first + assert sid_mgr.set_handler("loc1|FCBB:BBBB:1:F1::", { + 'action': 'uN' + }) + + # test the deletion + op_test(sid_mgr, 'DEL', ("loc1|FCBB:BBBB:1:F1::",), + expected_ret=True, expected_cmds=[ + 'segment-routing', + 'srv6', + 'static-sids', + 'no sid fcbb:bbbb:1:f1::/64 locator loc1 behavior uN' + ]) + + assert not sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc1|fcbb:bbbb:1:f1::") + +def test_uDT46_del_vrf1(): + loc_mgr, sid_mgr = constructor() + assert loc_mgr.set_handler("loc1", {'prefix': 'fcbb:bbbb:1::'}) + + # add a uN action first to make the uDT46 action not the last function + assert sid_mgr.set_handler("loc1|FCBB:BBBB:1:F1::", { + 'action': 'uN' + }) + + # add the uDT46 action + assert sid_mgr.set_handler("loc1|FCBB:BBBB:1:F2::", { + 'action': 'uDT46', + "decap_vrf": "Vrf1" + }) + + # test the deletion of uDT46 + op_test(sid_mgr, 'DEL', ("loc1|FCBB:BBBB:1:F2::",), + expected_ret=True, expected_cmds=[ + 'segment-routing', + 'srv6', + 'static-sids', + 'no sid fcbb:bbbb:1:f2::/64 locator loc1 behavior uDT46 vrf Vrf1' + ]) + + assert sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc1|fcbb:bbbb:1:f1::") + assert not sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc1|fcbb:bbbb:1:f2::") + +def test_invalid_add(): + _, sid_mgr = constructor() + + # test the addition of a SID with a non-existent locator + op_test(sid_mgr, 'SET', ("loc2|FCBB:BBBB:21:F1::", { + 'action': 'uN' + }), expected_ret=False, expected_cmds=[]) + + assert not sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc2|fcbb:bbbb:21:f1::") \ No newline at end of file diff --git a/src/sonic-bmp b/src/sonic-bmp index bfbd47bdcc2..1971625cb2f 160000 --- a/src/sonic-bmp +++ b/src/sonic-bmp @@ -1 +1 @@ -Subproject commit bfbd47bdcc287b0bfbbad4b227e5d1b739185954 +Subproject commit 1971625cb2fa5a754af72f2d42e5731a173c2378 diff --git a/src/sonic-bmpcfgd/bmpcfgd/__init__.py b/src/sonic-bmpcfgd/bmpcfgd/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/src/sonic-bmpcfgd/scripts/bmpcfgd b/src/sonic-bmpcfgd/bmpcfgd/bmpcfgd.py similarity index 67% rename from src/sonic-bmpcfgd/scripts/bmpcfgd rename to src/sonic-bmpcfgd/bmpcfgd/bmpcfgd.py index 448ca5b2461..f8fa35fe253 100644 --- a/src/sonic-bmpcfgd/scripts/bmpcfgd +++ b/src/sonic-bmpcfgd/bmpcfgd/bmpcfgd.py @@ -11,7 +11,7 @@ import signal from shutil import copy2 from datetime import datetime -from sonic_py_common import device_info +from sonic_py_common import logger from sonic_py_common.general import check_output_pipe from swsscommon.swsscommon import ConfigDBConnector, DBConnector, Table from swsscommon import swsscommon @@ -21,6 +21,8 @@ BMP_STATE_DB = "BMP_STATE_DB" REDIS_HOSTIP = "127.0.0.1" BMP_TABLE = "BMP" +SYSLOG_IDENTIFIER = "bmpcfgd" +logger = logger.Logger(SYSLOG_IDENTIFIER) def is_true(val): return str(val).lower() == 'true' @@ -36,11 +38,10 @@ def __init__(self, state_db_conn): def load(self, data={}): common_config = data.get('table', {}) - self.bgp_neighbor_table = is_true(common_config.get('bgp_neighbor_table', 'false')) self.bgp_rib_in_table = is_true(common_config.get('bgp_rib_in_table', 'false')) self.bgp_rib_out_table = is_true(common_config.get('bgp_rib_out_table', 'false')) - self.log_info(f'BMPCfg: update : {self.bgp_neighbor_table}, {self.bgp_rib_in_table}, {self.bgp_rib_out_table}') + logger.log_notice(f'bmpcfgd: config update : {self.bgp_neighbor_table}, {self.bgp_rib_in_table}, {self.bgp_rib_out_table}') # reset bmp table state once config is changed. self.stop_bmp() @@ -53,20 +54,20 @@ def cfg_handler(self, data): def stop_bmp(self): - self.log_info('BMPCfg: stop bmp daemon') - subprocess.call(["service", "openbmpd", "stop"]) + logger.log_notice('bmpcfgd: stop bmp daemon') + subprocess.call(["supervisorctl", "stop", "sonic-bmp:openbmpd"]) def reset_bmp_table(self): - self.log_info('BMPCfg: Reset bmp table from state_db') + logger.log_notice('bmpcfgd: Reset bmp table from state_db') self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_NEIGHBOR*') self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_RIB_IN_TABLE*') self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_RIB_OUT_TABLE*') def start_bmp(self): - self.log_info('BMPCfg: start bmp daemon') - subprocess.call(["service", "openbmpd", "start"]) + logger.log_notice('bmpcfgd: start bmp daemon') + subprocess.call(["supervisorctl", "start", "sonic-bmp:openbmpd"]) class BMPCfgDaemon: @@ -77,32 +78,17 @@ def __init__(self): self.config_db.connect(wait_for_init=True, retry_on=True) self.bmpcfg = BMPCfg(self.state_db_conn) - def bmp_handler(self, key, op, data): + def bmp_handler(self, key, data): data = self.config_db.get_table(BMP_TABLE) self.bmpcfg.cfg_handler(data) def register_callbacks(self): self.config_db.subscribe(BMP_TABLE, lambda table, key, data: - self.bmp_handler(key, op, data)) - -def signal_handler(sig, frame): - if sig == signal.SIGHUP: - self.log_info("bmpcfgd: signal 'SIGHUP' is caught and ignoring..") - elif sig == signal.SIGINT: - self.log_info("bmpcfgd: signal 'SIGINT' is caught and exiting...") - sys.exit(128 + sig) - elif sig == signal.SIGTERM: - self.log_info("bmpcfgd: signal 'SIGTERM' is caught and exiting...") - sys.exit(128 + sig) - else: - self.log_info("bmpcfgd: invalid signal - ignoring..") - + self.bmp_handler(key, data)) + self.config_db.listen(init_data_handler=self.bmpcfg.load) def main(): - signal.signal(signal.SIGTERM, signal_handler) - signal.signal(signal.SIGINT, signal_handler) - signal.signal(signal.SIGHUP, signal_handler) daemon = BMPCfgDaemon() daemon.register_callbacks() diff --git a/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service b/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service deleted file mode 100644 index 0a16edf77fe..00000000000 --- a/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service +++ /dev/null @@ -1,14 +0,0 @@ -[Unit] -Description=Process which monitors config_db and manage openbmpd daemon -Requires=database.service config-setup.service -After=database.service config-setup.service -BindsTo=sonic.target -After=sonic.target - -[Service] -Type=simple -ExecStart=/usr/local/bin/bmpcfgd -Restart=always - -[Install] -WantedBy=sonic.target diff --git a/src/sonic-bmpcfgd/setup.py b/src/sonic-bmpcfgd/setup.py index 33c3fd9803e..193b2094722 100644 --- a/src/sonic-bmpcfgd/setup.py +++ b/src/sonic-bmpcfgd/setup.py @@ -1,25 +1,11 @@ -from __future__ import print_function -import sys -from setuptools import setup -import pkg_resources -from packaging import version +import setuptools -# sonic_dependencies, version requirement only supports '>=' -sonic_dependencies = ['sonic-py-common', 'sonic-utilities'] -for package in sonic_dependencies: - try: - package_dist = pkg_resources.get_distribution(package.split(">=")[0]) - except pkg_resources.DistributionNotFound: - print(package + " is not found!", file=sys.stderr) - print("Please build and install SONiC python wheels dependencies from sonic-buildimage", file=sys.stderr) - exit(1) - if ">=" in package: - if version.parse(package_dist.version) >= version.parse(package.split(">=")[1]): - continue - print(package + " version not match!", file=sys.stderr) - exit(1) -setup( +dependencies = [ + 'sonic_py_common', +] + +setuptools.setup( name = 'sonic-bmpcfgd-services', version = '1.0', description = 'Python services which run in the bmp container', @@ -29,16 +15,21 @@ url = 'https://github.com/Azure/sonic-buildimage', maintainer = 'Feng Pan', maintainer_email = 'fenpan@microsoft.com', - packages = setuptools.find_packages(), - scripts = [ - 'scripts/bmpcfgd' + packages=[ + 'bmpcfgd', + 'tests' ], install_requires = [ 'jinja2>=2.10', 'netaddr==0.8.0', 'pyyaml==6.0.1', 'ipaddress==1.0.23' - ] + sonic_dependencies, + ], + entry_points={ + 'console_scripts': [ + 'bmpcfgd = bmpcfgd.bmpcfgd:main', + ] + }, setup_requires = [ 'pytest-runner', 'wheel' @@ -50,26 +41,4 @@ 'sonic-py-common', 'pytest-cov' ], - extras_require = { - "testing": [ - 'parameterized', - 'pytest', - 'pyfakefs', - 'sonic-py-common' - ] - }, - classifiers = [ - 'Development Status :: 3 - Alpha', - 'Environment :: Console', - 'Intended Audience :: Developers', - 'Intended Audience :: Information Technology', - 'Intended Audience :: System Administrators', - 'License :: OSI Approved :: Apache Software License', - 'Natural Language :: English', - 'Operating System :: POSIX :: Linux', - 'Programming Language :: Python :: 3.7', - 'Topic :: System', - ], - keywords = 'sonic SONiC bmp services', - test_suite = 'setup.get_test_suite' ) diff --git a/src/sonic-bmpcfgd/tests/bmpcfgd_test.py b/src/sonic-bmpcfgd/tests/bmpcfgd_test.py index a6abc6c3b70..f43ba77cf78 100644 --- a/src/sonic-bmpcfgd/tests/bmpcfgd_test.py +++ b/src/sonic-bmpcfgd/tests/bmpcfgd_test.py @@ -19,16 +19,14 @@ test_path = os.path.dirname(os.path.abspath(__file__)) modules_path = os.path.dirname(test_path) -scripts_path = os.path.join(modules_path, "scripts") +scripts_path = os.path.join(modules_path, "bmpcfgd") sys.path.insert(0, modules_path) # Load the file under test -bmpcfgd_path = os.path.join(scripts_path, 'bmpcfgd') +bmpcfgd_path = os.path.join(scripts_path, 'bmpcfgd.py') bmpcfgd = load_module_from_source('bmpcfgd', bmpcfgd_path) -from bmpcfgd import signal_handler - original_syslog = bmpcfgd.syslog # Mock swsscommon classes @@ -46,71 +44,42 @@ def setUp(self): self.test_data['BMP'] = {} self.test_data['BMP']['table'] = {'bgp_neighbor_table': 'false', 'bgp_rib_in_table': 'false', 'bgp_rib_out_table': 'false'} - @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()]) - @mock.patch('syslog.syslog') @mock.patch('subprocess.call') - def test_bmpcfgd_neighbor_enable(self, mock_check_call, mock_syslog, mock_get_bootloader): + @mock.patch('bmpcfgd.BMPCfg.log_info') + def test_bmpcfgd_neighbor_enable(self, mock_call, mock_log_info): self.test_data['BMP']['table']['bgp_neighbor_table'] = 'true' MockConfigDb.set_config_db(self.test_data) bmp_config_daemon = bmpcfgd.BMPCfgDaemon() bmp_config_daemon.register_callbacks() - bmp_config_daemon.bmp_handler("BMP", '', self.test_data) + bmp_config_daemon.bmp_handler("BMP", self.test_data) expected_calls = [ - mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : True, False, False'), - mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'), - mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'), - mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'), + mock.call(["supervisorctl", "stop", "sonic-bmp:openbmpd"]), + mock.call(["supervisorctl", "start", "sonic-bmp:openbmpd"]) ] - mock_syslog.assert_has_calls(expected_calls) + mock_log_info.assert_has_calls(expected_calls) - @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()]) - @mock.patch('syslog.syslog') - @mock.patch('subprocess.check_call') - def test_bmpcfgd_bgp_rib_in_enable(self, mock_check_call, mock_syslog, mock_get_bootloader): + @mock.patch('subprocess.call') + @mock.patch('bmpcfgd.BMPCfg.log_info') + def test_bmpcfgd_bgp_rib_in_enable(self, mock_call, mock_log_info): self.test_data['BMP']['table']['bgp_rib_in_table'] = 'true' MockConfigDb.set_config_db(self.test_data) bmp_config_daemon = bmpcfgd.BMPCfgDaemon() - bmp_config_daemon.bmp_handler("BMP", '', self.test_data) + bmp_config_daemon.bmp_handler("BMP", self.test_data) expected_calls = [ - mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : False, True, False'), - mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'), - mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'), - mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'), + mock.call(["supervisorctl", "stop", "sonic-bmp:openbmpd"]), + mock.call(["supervisorctl", "start", "sonic-bmp:openbmpd"]) ] - mock_syslog.assert_has_calls(expected_calls) + mock_log_info.assert_has_calls(expected_calls) - @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()]) - @mock.patch('syslog.syslog') - @mock.patch('subprocess.check_call') - def test_bmpcfgd_bgp_rib_out_enable(self, mock_check_call, mock_syslog, mock_get_bootloader): + @mock.patch('subprocess.call') + @mock.patch('bmpcfgd.BMPCfg.log_info') + def test_bmpcfgd_bgp_rib_out_enable(self, mock_call, mock_log_info): self.test_data['BMP']['table']['bgp_rib_out_table'] = 'true' MockConfigDb.set_config_db(self.test_data) bmp_config_daemon = bmpcfgd.BMPCfgDaemon() - bmp_config_daemon.bmp_handler("BMP", '', self.test_data) + bmp_config_daemon.bmp_handler("BMP", self.test_data) expected_calls = [ - mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : False, False, True'), - mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'), - mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'), - mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'), + mock.call(["supervisorctl", "stop", "sonic-bmp:openbmpd"]), + mock.call(["supervisorctl", "start", "sonic-bmp:openbmpd"]) ] - mock_syslog.assert_has_calls(expected_calls) - - - @mock.patch('syslog.syslog') - @mock.patch.object(sys, 'exit') - def test_signal_handler(self, mock_exit, mock_syslog): - # Test SIGHUP signal - signal_handler(signal.SIGHUP, None) - mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGHUP' is caught and ignoring..") - mock_exit.assert_not_called() - # Test SIGINT signal - signal_handler(signal.SIGINT, None) - mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGINT' is caught and exiting...") - mock_exit.assert_called_once_with(128 + signal.SIGINT) - # Test SIGTERM signal - signal_handler(signal.SIGTERM, None) - mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGTERM' is caught and exiting...") - mock_exit.assert_called_with(128 + signal.SIGTERM) - # Test invalid signal - signal_handler(999, None) - mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: invalid signal - ignoring..") + mock_log_info.assert_has_calls(expected_calls) \ No newline at end of file diff --git a/src/sonic-bmpcfgd/tests/common/mock_bootloader.py b/src/sonic-bmpcfgd/tests/common/mock_bootloader.py new file mode 100644 index 00000000000..37781ad1483 --- /dev/null +++ b/src/sonic-bmpcfgd/tests/common/mock_bootloader.py @@ -0,0 +1,13 @@ +class MockBootloader(object): + + def __init__(self, enforce=False): + self.enforce = enforce + + def get_next_image(self): + return "" + + def set_fips(self, image, enable): + self.enforce = enable + + def get_fips(self, image): + return self.enforce diff --git a/src/sonic-build-hooks/scripts/buildinfo_base.sh b/src/sonic-build-hooks/scripts/buildinfo_base.sh index 9adcb1d3b50..1f4d0973b5e 100755 --- a/src/sonic-build-hooks/scripts/buildinfo_base.sh +++ b/src/sonic-build-hooks/scripts/buildinfo_base.sh @@ -124,10 +124,10 @@ set_reproducible_mirrors() expression3="/#SET_REPR_MIRRORS/d" fi if [[ "$1" != "-d" ]] && [ -f /etc/apt/sources.list.d/debian.sources ]; then - mv /etc/apt/sources.list.d/debian.sources /etc/apt/sources.list.d/debian.sources.back + $SUDO mv /etc/apt/sources.list.d/debian.sources /etc/apt/sources.list.d/debian.sources.back fi if [[ "$1" == "-d" ]] && [ -f /etc/apt/sources.list.d/debian.sources.back ]; then - mv /etc/apt/sources.list.d/debian.sources.back /etc/apt/sources.list.d/debian.sources + $SUDO mv /etc/apt/sources.list.d/debian.sources.back /etc/apt/sources.list.d/debian.sources fi local mirrors="/etc/apt/sources.list $(find /etc/apt/sources.list.d/ -type f)" diff --git a/src/sonic-config-engine/asic_sensors_config.py b/src/sonic-config-engine/asic_sensors_config.py new file mode 100644 index 00000000000..49ed513d0ff --- /dev/null +++ b/src/sonic-config-engine/asic_sensors_config.py @@ -0,0 +1,40 @@ +import os +import sys +import portconfig +from sonic_py_common import device_info + +try: + if os.environ["CFGGEN_UNIT_TESTING"] == "2": + modules_path = os.path.join(os.path.dirname(__file__), ".") + tests_path = os.path.join(modules_path, "tests") + sys.path.insert(0, modules_path) + sys.path.insert(0, tests_path) + import mock_tables.dbconnector + mock_tables.dbconnector.load_namespace_config() + +except KeyError: + pass + +ASIC_SENSORS_KEY = "asic_sensors" + + +def get_asic_sensors_config(): + config = {} + if os.environ.get("CFGGEN_UNIT_TESTING") == "2": + json_file = os.path.join(tests_path, "data", "asic_sensors", "platform.json") + else: + platform_path = device_info.get_path_to_platform_dir() + json_file = os.path.join(platform_path, device_info.PLATFORM_JSON_FILE) + + if not os.path.exists(json_file): + return config + + platform_json = portconfig.readJson(json_file) + if not platform_json: + return config + + if ASIC_SENSORS_KEY in platform_json: + config["ASIC_SENSORS"] = {"ASIC_SENSORS_POLLER_INTERVAL": {"interval": platform_json[ASIC_SENSORS_KEY]["poll_interval"]}, + "ASIC_SENSORS_POLLER_STATUS": {"admin_status": platform_json[ASIC_SENSORS_KEY]["poll_admin_status"]} + } + return config diff --git a/src/sonic-config-engine/config_samples.py b/src/sonic-config-engine/config_samples.py index d72925c843c..aef6969d713 100644 --- a/src/sonic-config-engine/config_samples.py +++ b/src/sonic-config-engine/config_samples.py @@ -16,7 +16,6 @@ def generate_common_config(data): data['FLEX_COUNTER_TABLE'] = { 'ACL': { 'FLEX_COUNTER_STATUS': 'disable', - 'FLEX_COUNTER_DELAY_STATUS': 'true', 'POLL_INTERVAL': '10000' } } @@ -51,7 +50,8 @@ def generate_t1_sample_config(data): data['DEVICE_METADATA']['localhost']['hostname'] = 'sonic' data['DEVICE_METADATA']['localhost']['type'] = 'LeafRouter' data['DEVICE_METADATA']['localhost']['bgp_asn'] = '65100' - data['LOOPBACK_INTERFACE'] = {"Loopback0|10.1.0.1/32": {}} + data['LOOPBACK_INTERFACE'] = {"Loopback0": {}, + "Loopback0|10.1.0.1/32": {}} data['BGP_NEIGHBOR'] = {} data['DEVICE_NEIGHBOR'] = {} data['INTERFACE'] = {} @@ -64,6 +64,7 @@ def generate_t1_sample_config(data): peer_addr = '10.0.{}.{}'.format(2 * port_count // 256, 2 * port_count % 256 + 1) peer_name='ARISTA{0:02d}{1}'.format(1+port_count%(total_port_amount // 2), 'T2' if port_count < (total_port_amount // 2) else 'T0') peer_asn = 65200 if port_count < (total_port_amount // 2) else 64001 + port_count - (total_port_amount // 2) + data['INTERFACE']['{}'.format(port)] = {} data['INTERFACE']['{}|{}/31'.format(port, local_addr)] = {} data['BGP_NEIGHBOR'][peer_addr] = { 'rrclient': 0, @@ -86,6 +87,12 @@ def generate_t1_smartswitch_switch_sample_config(data, ss_config): bridge_name = 'bridge-midplane' + data['MID_PLANE_BRIDGE'] = { + "GLOBAL": { + "bridge": bridge_name, + "ip_prefix": "169.254.200.254/24" + } + } dhcp_server_ports = {} for dpu_name in natsorted(ss_config.get('DPUS', {})): @@ -123,10 +130,6 @@ def generate_t1_smartswitch_switch_sample_config(data, ss_config): data['DHCP_SERVER_IPV4'] = { bridge_name: { - 'customized_options': [ - 'option60', - 'option223' - ], 'gateway': mpbr_address, 'lease_time': '3600', 'mode': 'PORT', @@ -184,7 +187,7 @@ def generate_global_dualtor_tables(): data = defaultdict(lambda: defaultdict(dict)) data['LOOPBACK_INTERFACE'] = { 'Loopback2': {}, - 'Loopback2|3.3.3.3': {} + 'Loopback2|3.3.3.3/32': {} } data['MUX_CABLE'] = {} data['PEER_SWITCH'] = { @@ -270,4 +273,3 @@ def get_available_config(): def generate_sample_config(data, setting_name): data = generate_common_config(data) return _sample_generators[setting_name.lower()](data) - diff --git a/src/sonic-config-engine/data/l1intf.j2 b/src/sonic-config-engine/data/l1intf.j2 index 68ffc3ee4ec..b2f218ea82c 100644 --- a/src/sonic-config-engine/data/l1intf.j2 +++ b/src/sonic-config-engine/data/l1intf.j2 @@ -7,7 +7,6 @@ "FLEX_COUNTER_TABLE": { "ACL": { "FLEX_COUNTER_STATUS": "disable", - "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" } }, @@ -30,4 +29,3 @@ } } - diff --git a/src/sonic-config-engine/data/l2switch.j2 b/src/sonic-config-engine/data/l2switch.j2 index 37c343867a1..359525763f7 100644 --- a/src/sonic-config-engine/data/l2switch.j2 +++ b/src/sonic-config-engine/data/l2switch.j2 @@ -3,7 +3,6 @@ "FLEX_COUNTER_TABLE": { "ACL": { "FLEX_COUNTER_STATUS": "disable", - "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" } }, diff --git a/src/sonic-config-engine/data/l3intf.j2 b/src/sonic-config-engine/data/l3intf.j2 index 45fba9f692e..06cc720bc1b 100644 --- a/src/sonic-config-engine/data/l3intf.j2 +++ b/src/sonic-config-engine/data/l3intf.j2 @@ -7,7 +7,6 @@ "FLEX_COUNTER_TABLE": { "ACL": { "FLEX_COUNTER_STATUS": "disable", - "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" } }, diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py index e4c513498ee..cd8cff3eec1 100644 --- a/src/sonic-config-engine/minigraph.py +++ b/src/sonic-config-engine/minigraph.py @@ -2623,7 +2623,7 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw if static_routes: # Enable static Route BFD by default for static route in chassis-packet - if switch_type == "chassis-packet": + if switch_type == "chassis-packet" or chassis_type == "chassis-packet": for pfx, data in static_routes.items(): data.update({"bfd":"true"}) results['STATIC_ROUTE'] = static_routes @@ -2903,9 +2903,12 @@ def parse_asic_sub_role(filename, asic_name): sub_role, _, _, _, _, _= parse_asic_meta(child, asic_name) return sub_role -def parse_asic_switch_type(filename, asic_name): +def parse_asic_switch_type(filename, asic_name, hostname): if os.path.isfile(filename): root = ET.parse(filename).getroot() + switch_type, _ = get_chassis_type_and_hostname(root, hostname) + if switch_type: + return switch_type for child in root: if child.tag == str(QName(ns, "MetadataDeclaration")): _, _, switch_type, _, _, _ = parse_asic_meta(child, asic_name) diff --git a/src/sonic-config-engine/portconfig.py b/src/sonic-config-engine/portconfig.py index 788774d3496..b2550b12125 100644 --- a/src/sonic-config-engine/portconfig.py +++ b/src/sonic-config-engine/portconfig.py @@ -430,7 +430,8 @@ def parse_platform_json_file(hwsku_json_file, platform_json_file): if child_port in hwsku_entry: for key, item in hwsku_entry[child_port].items(): if key in OPTIONAL_HWSKU_ATTRIBUTES: - child_ports.get(child_port)[key] = item + for child in child_ports: + child_ports.get(child)[key] = item ports.update(child_ports) diff --git a/src/sonic-config-engine/setup.py b/src/sonic-config-engine/setup.py index 263f4cea43c..71f928b9810 100644 --- a/src/sonic-config-engine/setup.py +++ b/src/sonic-config-engine/setup.py @@ -52,7 +52,8 @@ 'minigraph', 'openconfig_acl', 'portconfig', - 'smartswitch_config' + 'smartswitch_config', + 'asic_sensors_config' ] if sys.version_info.major == 3: # Python 3-only modules diff --git a/src/sonic-config-engine/sonic-cfggen b/src/sonic-config-engine/sonic-cfggen index 9151bfa20de..f892929c5ef 100755 --- a/src/sonic-config-engine/sonic-cfggen +++ b/src/sonic-config-engine/sonic-cfggen @@ -36,7 +36,7 @@ from portconfig import get_port_config, get_breakout_mode from sonic_py_common.multi_asic import get_asic_id_from_name, get_asic_device_id, is_multi_asic from sonic_py_common import device_info from swsscommon.swsscommon import ConfigDBConnector, SonicDBConfig, ConfigDBPipeConnector - +from asic_sensors_config import get_asic_sensors_config PY3x = sys.version_info >= (3, 0) @@ -433,7 +433,7 @@ def main(): if asic_name is not None: if args.minigraph is not None: asic_role = parse_asic_sub_role(args.minigraph, asic_name) - switch_type = parse_asic_switch_type(args.minigraph, asic_name) + switch_type = parse_asic_switch_type(args.minigraph, asic_name, hostname) if ((switch_type is not None and switch_type.lower() == "chassis-packet") or (asic_role is not None and asic_role.lower() == "backend") or (platform == device_info.VS_PLATFORM)) : @@ -459,6 +459,15 @@ def main(): deep_update(data, hardware_data) + asic_sensors = {} + if is_multi_asic(): + if asic_name is not None: + asic_sensors = get_asic_sensors_config() + else: + asic_sensors = get_asic_sensors_config() + if asic_sensors: + deep_update(data, asic_sensors) + paths = ['/', '/usr/share/sonic/templates'] if args.template_dir: paths.append(os.path.abspath(args.template_dir)) diff --git a/src/sonic-config-engine/tests/data/asic_sensors/platform.json b/src/sonic-config-engine/tests/data/asic_sensors/platform.json new file mode 100644 index 00000000000..bfdb92eedd2 --- /dev/null +++ b/src/sonic-config-engine/tests/data/asic_sensors/platform.json @@ -0,0 +1,6 @@ +{ + "asic_sensors": { + "poll_interval": "10", + "poll_admin_status": "enable" + } +} diff --git a/src/sonic-config-engine/tests/data/rsyslog/config_db.json b/src/sonic-config-engine/tests/data/rsyslog/config_db.json index 7cc58a13157..ede8d7f6600 100644 --- a/src/sonic-config-engine/tests/data/rsyslog/config_db.json +++ b/src/sonic-config-engine/tests/data/rsyslog/config_db.json @@ -393,7 +393,6 @@ }, "FLEX_COUNTER_TABLE": { "ACL": { - "FLEX_COUNTER_DELAY_STATUS": "false", "FLEX_COUNTER_STATUS": "enable", "POLL_INTERVAL": "10000" } @@ -911,4 +910,3 @@ } } } - diff --git a/src/sonic-config-engine/tests/minigraph-str2-temp-2-lc04.xml b/src/sonic-config-engine/tests/minigraph-str2-temp-2-lc04.xml new file mode 100644 index 00000000000..29cafe63ed5 --- /dev/null +++ b/src/sonic-config-engine/tests/minigraph-str2-temp-2-lc04.xml @@ -0,0 +1 @@ +BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC00192.0.0.1STR2-temp-2-lc04-ASIC00192.0.0.11100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC00192.0.0.1STR2-temp-2-lc04-ASIC01192.0.0.12100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC00192.0.0.1STR2-temp-2-lc04-ASIC02192.0.0.13100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC002603:10e2:400::1STR2-temp-2-lc04-ASIC002603:10e2:400::b100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC002603:10e2:400::1STR2-temp-2-lc04-ASIC012603:10e2:400::c100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC002603:10e2:400::1STR2-temp-2-lc04-ASIC022603:10e2:400::d100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC01192.0.0.2STR2-temp-2-lc04-ASIC00192.0.0.11100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC01192.0.0.2STR2-temp-2-lc04-ASIC01192.0.0.12100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC01192.0.0.2STR2-temp-2-lc04-ASIC02192.0.0.13100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC012603:10e2:400::2STR2-temp-2-lc04-ASIC002603:10e2:400::b100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC012603:10e2:400::2STR2-temp-2-lc04-ASIC012603:10e2:400::c100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC012603:10e2:400::2STR2-temp-2-lc04-ASIC022603:10e2:400::d100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC02192.0.0.3STR2-temp-2-lc04-ASIC00192.0.0.11100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC02192.0.0.3STR2-temp-2-lc04-ASIC01192.0.0.12100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC02192.0.0.3STR2-temp-2-lc04-ASIC02192.0.0.13100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC022603:10e2:400::3STR2-temp-2-lc04-ASIC002603:10e2:400::b100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC022603:10e2:400::3STR2-temp-2-lc04-ASIC012603:10e2:400::c100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc00-ASIC022603:10e2:400::3STR2-temp-2-lc04-ASIC022603:10e2:400::d100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc01-ASIC00192.0.0.4STR2-temp-2-lc04-ASIC00192.0.0.11100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc01-ASIC00192.0.0.4STR2-temp-2-lc04-ASIC01192.0.0.12100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc01-ASIC00192.0.0.4STR2-temp-2-lc04-ASIC02192.0.0.13100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc01-ASIC002603:10e2:400::4STR2-temp-2-lc04-ASIC002603:10e2:400::b100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc01-ASIC002603:10e2:400::4STR2-temp-2-lc04-ASIC012603:10e2:400::c100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc01-ASIC002603:10e2:400::4STR2-temp-2-lc04-ASIC022603:10e2:400::d100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc01-ASIC01192.0.0.5STR2-temp-2-lc04-ASIC00192.0.0.11100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc01-ASIC01192.0.0.5STR2-temp-2-lc04-ASIC01192.0.0.12100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc01-ASIC01192.0.0.5STR2-temp-2-lc04-ASIC02192.0.0.13100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc01-ASIC012603:10e2:400::5STR2-temp-2-lc04-ASIC002603:10e2:400::b100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc01-ASIC012603:10e2:400::5STR2-temp-2-lc04-ASIC012603:10e2:400::c100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc01-ASIC012603:10e2:400::5STR2-temp-2-lc04-ASIC022603:10e2:400::d100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc02-ASIC00192.0.0.6STR2-temp-2-lc04-ASIC00192.0.0.11100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc02-ASIC00192.0.0.6STR2-temp-2-lc04-ASIC01192.0.0.12100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc02-ASIC00192.0.0.6STR2-temp-2-lc04-ASIC02192.0.0.13100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc02-ASIC002603:10e2:400::6STR2-temp-2-lc04-ASIC002603:10e2:400::b100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc02-ASIC002603:10e2:400::6STR2-temp-2-lc04-ASIC012603:10e2:400::c100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc02-ASIC002603:10e2:400::6STR2-temp-2-lc04-ASIC022603:10e2:400::d100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc02-ASIC01192.0.0.7STR2-temp-2-lc04-ASIC00192.0.0.11100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc02-ASIC01192.0.0.7STR2-temp-2-lc04-ASIC01192.0.0.12100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc02-ASIC01192.0.0.7STR2-temp-2-lc04-ASIC02192.0.0.13100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc02-ASIC012603:10e2:400::7STR2-temp-2-lc04-ASIC002603:10e2:400::b100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc02-ASIC012603:10e2:400::7STR2-temp-2-lc04-ASIC012603:10e2:400::c100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc02-ASIC012603:10e2:400::7STR2-temp-2-lc04-ASIC022603:10e2:400::d100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC00192.0.0.8STR2-temp-2-lc04-ASIC00192.0.0.11100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC00192.0.0.8STR2-temp-2-lc04-ASIC01192.0.0.12100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC00192.0.0.8STR2-temp-2-lc04-ASIC02192.0.0.13100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC002603:10e2:400::8STR2-temp-2-lc04-ASIC002603:10e2:400::b100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC002603:10e2:400::8STR2-temp-2-lc04-ASIC012603:10e2:400::c100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC002603:10e2:400::8STR2-temp-2-lc04-ASIC022603:10e2:400::d100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC01192.0.0.9STR2-temp-2-lc04-ASIC00192.0.0.11100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC01192.0.0.9STR2-temp-2-lc04-ASIC01192.0.0.12100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC01192.0.0.9STR2-temp-2-lc04-ASIC02192.0.0.13100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC012603:10e2:400::9STR2-temp-2-lc04-ASIC002603:10e2:400::b100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC012603:10e2:400::9STR2-temp-2-lc04-ASIC012603:10e2:400::c100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC012603:10e2:400::9STR2-temp-2-lc04-ASIC022603:10e2:400::d100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC02192.0.0.10STR2-temp-2-lc04-ASIC00192.0.0.11100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC02192.0.0.10STR2-temp-2-lc04-ASIC01192.0.0.12100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC02192.0.0.10STR2-temp-2-lc04-ASIC02192.0.0.13100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC022603:10e2:400::aSTR2-temp-2-lc04-ASIC002603:10e2:400::b100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC022603:10e2:400::aSTR2-temp-2-lc04-ASIC012603:10e2:400::c100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc03-ASIC022603:10e2:400::aSTR2-temp-2-lc04-ASIC022603:10e2:400::d100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc04-ASIC00192.0.0.11STR2-temp-2-lc04-ASIC01192.0.0.12100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc04-ASIC00192.0.0.11STR2-temp-2-lc04-ASIC02192.0.0.13100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc04-ASIC002603:10e2:400::bSTR2-temp-2-lc04-ASIC012603:10e2:400::c100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc04-ASIC002603:10e2:400::bSTR2-temp-2-lc04-ASIC022603:10e2:400::d100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc04-ASIC01192.0.0.12STR2-temp-2-lc04-ASIC02192.0.0.13100BGPSessionchassis-packetchassis-packetfalseSTR2-temp-2-lc04-ASIC012603:10e2:400::cSTR2-temp-2-lc04-ASIC022603:10e2:400::d100BGPSessionchassis-packetfalseSTR2-temp-2-lc04-ASIC002603:10e2:400::bBGPMonitorfc00::d3018060BGPSessionchassis-packetfalseSTR2-temp-2-lc04-ASIC012603:10e2:400::cBGPMonitorfc00::d3018060BGPSessionfalseSTR2-temp-2-lc04-ASIC0210.3.0.5BGPMonitor25.71.53.2403018060BGPSessionchassis-packetfalseSTR2-temp-2-lc04-ASIC022603:10e2:400::dBGPMonitorfc00::d3018060BGPSessionfalseARISTA001T110.0.0.13STR2-temp-2-lc04-ASIC0010.0.0.121103BGPSessionfalseARISTA001T1fc00::1aSTR2-temp-2-lc04-ASIC00fc00::191103BGPSessionfalseARISTA004T110.0.0.19STR2-temp-2-lc04-ASIC0210.0.0.181103BGPSessionfalseARISTA004T1fc00::26STR2-temp-2-lc04-ASIC02fc00::2511030BGPMonitorBGPPeer
fc00::d
BGPPeer
25.71.53.240
65000ARISTA001T1BGPPeer
10.0.0.13
BGPPeer
fc00::1a
65002ARISTA004T1BGPPeer
10.0.0.19
BGPPeer
fc00::26
65100BGPGroup192.0.0.11;2603:10e2:400::beBGP0falsefalsechassis-packet000STR2-temp-2-lc04-ASIC00BGPPeer
10.0.0.12
BGPPeer
192.0.0.11
BGPPeer
2603:10e2:400::b
BGPPeer
fc00::19
65100BGPGroup192.0.0.12;2603:10e2:400::ceBGP0falsefalsechassis-packet000STR2-temp-2-lc04-ASIC01BGPPeer
192.0.0.12
BGPPeer
2603:10e2:400::c
65100BGPGroup192.0.0.13;2603:10e2:400::deBGP0falsefalsechassis-packet000STR2-temp-2-lc04-ASIC02BGPPeer
10.0.0.18
BGPPeer
10.3.0.5
BGPPeer
192.0.0.13
BGPPeer
2603:10e2:400::d
BGPPeer
fc00::25
65100BGPGroup192.0.0.1;2603:10e2:400::1eBGP0falsefalsechassis-packet000STR2-temp-2-lc00-ASIC00BGPPeer
10.0.0.0
BGPPeer
192.0.0.1
BGPPeer
2603:10e2:400::1
BGPPeer
fc00::1
65100BGPGroup192.0.0.2;2603:10e2:400::2eBGP0falsefalsechassis-packet000STR2-temp-2-lc00-ASIC01BGPPeer
192.0.0.2
BGPPeer
2603:10e2:400::2
65100BGPGroup192.0.0.3;2603:10e2:400::3eBGP0falsefalsechassis-packet000STR2-temp-2-lc00-ASIC02BGPPeer
10.0.0.6
BGPPeer
192.0.0.3
BGPPeer
2603:10e2:400::3
BGPPeer
fc00::d
65100BGPGroup192.0.0.4;2603:10e2:400::4eBGP0falsefalsechassis-packet000STR2-temp-2-lc01-ASIC00BGPPeer
192.0.0.4
BGPPeer
2603:10e2:400::4
65100BGPGroup192.0.0.5;2603:10e2:400::5eBGP0falsefalsechassis-packet000STR2-temp-2-lc01-ASIC01BGPPeer
192.0.0.5
BGPPeer
2603:10e2:400::5
65100BGPGroup192.0.0.6;2603:10e2:400::6eBGP0falsefalsechassis-packet000STR2-temp-2-lc02-ASIC00BGPPeer
192.0.0.6
BGPPeer
2603:10e2:400::6
65100BGPGroup192.0.0.7;2603:10e2:400::7eBGP0falsefalsechassis-packet000STR2-temp-2-lc02-ASIC01BGPPeer
192.0.0.7
BGPPeer
2603:10e2:400::7
65100BGPGroup192.0.0.8;2603:10e2:400::8eBGP0falsefalsechassis-packet000STR2-temp-2-lc03-ASIC00BGPPeer
192.0.0.8
BGPPeer
2603:10e2:400::8
65100BGPGroup192.0.0.9;2603:10e2:400::9eBGP0falsefalsechassis-packet000STR2-temp-2-lc03-ASIC01BGPPeer
192.0.0.9
BGPPeer
2603:10e2:400::9
65100BGPGroup192.0.0.10;2603:10e2:400::aeBGP0falsefalsechassis-packet000STR2-temp-2-lc03-ASIC02BGPPeer
192.0.0.10
BGPPeer
2603:10e2:400::a
-8808DeviceInterfacefalse1FourHundredGigE0/0/0/0falseEthernet0400000DeviceInterfacefalse2HundredGigE0/0/0/0falseEthernet0100000DeviceInterfacefalse3FourHundredGigE0/0/0/1falseEthernet8400000DeviceInterfacefalse4HundredGigE0/0/0/1falseEthernet8100000DeviceInterfacefalse5FourHundredGigE0/0/0/2falseEthernet16400000DeviceInterfacefalse6HundredGigE0/0/0/2falseEthernet16100000DeviceInterfacefalse7FourHundredGigE0/0/0/3falseEthernet24400000DeviceInterfacefalse8HundredGigE0/0/0/3falseEthernet24100000DeviceInterfacefalse9FourHundredGigE0/0/0/4falseEthernet32400000DeviceInterfacefalse10HundredGigE0/0/0/4falseEthernet32100000DeviceInterfacefalse11FourHundredGigE0/0/0/5falseEthernet40400000DeviceInterfacefalse12HundredGigE0/0/0/5falseEthernet40100000DeviceInterfacefalse13FourHundredGigE0/0/0/6falseEthernet48400000DeviceInterfacefalse14HundredGigE0/0/0/6falseEthernet48100000DeviceInterfacefalse15FourHundredGigE0/0/0/7falseEthernet56400000DeviceInterfacefalse16HundredGigE0/0/0/7falseEthernet56100000DeviceInterfacefalse17FourHundredGigE0/0/0/8falseEthernet64400000DeviceInterfacefalse18HundredGigE0/0/0/8falseEthernet64100000DeviceInterfacefalse19FourHundredGigE0/0/0/9falseEthernet72400000DeviceInterfacefalse20HundredGigE0/0/0/9falseEthernet72100000DeviceInterfacefalse21FourHundredGigE0/0/0/10falseEthernet80400000DeviceInterfacefalse22HundredGigE0/0/0/10falseEthernet80100000DeviceInterfacefalse23FourHundredGigE0/0/0/11falseEthernet88400000DeviceInterfacefalse24HundredGigE0/0/0/11falseEthernet88100000DeviceInterfacefalse25FourHundredGigE0/0/0/12falseEthernet96400000DeviceInterfacefalse26HundredGigE0/0/0/12falseEthernet96100000DeviceInterfacefalse27FourHundredGigE0/0/0/13falseEthernet104400000DeviceInterfacefalse28HundredGigE0/0/0/13falseEthernet104100000DeviceInterfacefalse29FourHundredGigE0/0/0/14falseEthernet112400000DeviceInterfacefalse30HundredGigE0/0/0/14falseEthernet112100000DeviceInterfacefalse31FourHundredGigE0/0/0/15falseEthernet120400000DeviceInterfacefalse32HundredGigE0/0/0/15falseEthernet120100000DeviceInterfacefalse33FourHundredGigE0/0/0/16falseEthernet128400000DeviceInterfacefalse34HundredGigE0/0/0/16falseEthernet128100000DeviceInterfacefalse35FourHundredGigE0/0/0/17falseEthernet136400000DeviceInterfacefalse36HundredGigE0/0/0/17falseEthernet136100000DeviceInterfacefalse37FourHundredGigE0/0/0/18falseEthernet144400000DeviceInterfacefalse38HundredGigE0/0/0/18falseEthernet144100000DeviceInterfacefalse39FourHundredGigE0/0/0/19falseEthernet152400000DeviceInterfacefalse40HundredGigE0/0/0/19falseEthernet152100000DeviceInterfacefalse41FourHundredGigE0/0/0/20falseEthernet160400000DeviceInterfacefalse42HundredGigE0/0/0/20falseEthernet160100000DeviceInterfacefalse43FourHundredGigE0/0/0/21falseEthernet168400000DeviceInterfacefalse44HundredGigE0/0/0/21falseEthernet168100000DeviceInterfacefalse45FourHundredGigE0/0/0/22falseEthernet176400000DeviceInterfacefalse46HundredGigE0/0/0/22falseEthernet176100000DeviceInterfacefalse47FourHundredGigE0/0/0/23falseEthernet184400000DeviceInterfacefalse48HundredGigE0/0/0/23falseEthernet184100000DeviceInterfacefalse49FourHundredGigE0/0/0/24falseEthernet192400000DeviceInterfacefalse50HundredGigE0/0/0/24falseEthernet192100000DeviceInterfacefalse51FourHundredGigE0/0/0/25falseEthernet200400000DeviceInterfacefalse52HundredGigE0/0/0/25falseEthernet200100000DeviceInterfacefalse53FourHundredGigE0/0/0/26falseEthernet208400000DeviceInterfacefalse54HundredGigE0/0/0/26falseEthernet208100000DeviceInterfacefalse55FourHundredGigE0/0/0/27falseEthernet216400000DeviceInterfacefalse56HundredGigE0/0/0/27falseEthernet216100000DeviceInterfacefalse57FourHundredGigE0/0/0/28falseEthernet224400000DeviceInterfacefalse58HundredGigE0/0/0/28falseEthernet224100000DeviceInterfacefalse59FourHundredGigE0/0/0/29falseEthernet232400000DeviceInterfacefalse60HundredGigE0/0/0/29falseEthernet232100000DeviceInterfacefalse61FourHundredGigE0/0/0/30falseEthernet240400000DeviceInterfacefalse62HundredGigE0/0/0/30falseEthernet240100000DeviceInterfacefalse63FourHundredGigE0/0/0/31falseEthernet248400000DeviceInterfacefalse64HundredGigE0/0/0/31falseEthernet248100000DeviceInterfacefalse65FourHundredGigE0/0/0/32falseEthernet256400000DeviceInterfacefalse66HundredGigE0/0/0/32falseEthernet256100000DeviceInterfacefalse67FourHundredGigE0/0/0/33falseEthernet264400000DeviceInterfacefalse68HundredGigE0/0/0/33falseEthernet264100000DeviceInterfacefalse69FourHundredGigE0/0/0/34falseEthernet272400000DeviceInterfacefalse70HundredGigE0/0/0/34falseEthernet272100000DeviceInterfacefalse71FourHundredGigE0/0/0/35falseEthernet280400000DeviceInterfacefalse72HundredGigE0/0/0/35falseEthernet280100000DeviceInterfacefalse73HundredGigE0/1/0/0falseEthernet0100000DeviceInterfacefalse74FortyGigE0/1/0/0falseEthernet040000DeviceInterfacefalse75HundredGigE0/1/0/1falseEthernet4100000DeviceInterfacefalse76FortyGigE0/1/0/1falseEthernet440000DeviceInterfacefalse77HundredGigE0/1/0/2falseEthernet8100000DeviceInterfacefalse78FortyGigE0/1/0/2falseEthernet840000DeviceInterfacefalse79HundredGigE0/1/0/3falseEthernet12100000DeviceInterfacefalse80FortyGigE0/1/0/3falseEthernet1240000DeviceInterfacefalse81HundredGigE0/1/0/4falseEthernet16100000DeviceInterfacefalse82FortyGigE0/1/0/4falseEthernet1640000DeviceInterfacefalse83HundredGigE0/1/0/5falseEthernet20100000DeviceInterfacefalse84FortyGigE0/1/0/5falseEthernet2040000DeviceInterfacefalse85HundredGigE0/1/0/6falseEthernet24100000DeviceInterfacefalse86FortyGigE0/1/0/6falseEthernet2440000DeviceInterfacefalse87HundredGigE0/1/0/7falseEthernet28100000DeviceInterfacefalse88FortyGigE0/1/0/7falseEthernet2840000DeviceInterfacefalse89HundredGigE0/1/0/8falseEthernet32100000DeviceInterfacefalse90FortyGigE0/1/0/8falseEthernet3240000DeviceInterfacefalse91HundredGigE0/1/0/9falseEthernet36100000DeviceInterfacefalse92FortyGigE0/1/0/9falseEthernet3640000DeviceInterfacefalse93HundredGigE0/1/0/10falseEthernet40100000DeviceInterfacefalse94FortyGigE0/1/0/10falseEthernet4040000DeviceInterfacefalse95HundredGigE0/1/0/11falseEthernet44100000DeviceInterfacefalse96FortyGigE0/1/0/11falseEthernet4440000DeviceInterfacefalse97HundredGigE0/1/0/12falseEthernet48100000DeviceInterfacefalse98FortyGigE0/1/0/12falseEthernet4840000DeviceInterfacefalse99HundredGigE0/1/0/13falseEthernet52100000DeviceInterfacefalse100FortyGigE0/1/0/13falseEthernet5240000DeviceInterfacefalse101HundredGigE0/1/0/14falseEthernet56100000DeviceInterfacefalse102FortyGigE0/1/0/14falseEthernet5640000DeviceInterfacefalse103HundredGigE0/1/0/15falseEthernet60100000DeviceInterfacefalse104FortyGigE0/1/0/15falseEthernet6040000DeviceInterfacefalse105HundredGigE0/1/0/16falseEthernet64100000DeviceInterfacefalse106FortyGigE0/1/0/16falseEthernet6440000DeviceInterfacefalse107HundredGigE0/1/0/17falseEthernet68100000DeviceInterfacefalse108FortyGigE0/1/0/17falseEthernet6840000DeviceInterfacefalse109HundredGigE0/1/0/18falseEthernet72100000DeviceInterfacefalse110FortyGigE0/1/0/18falseEthernet7240000DeviceInterfacefalse111HundredGigE0/1/0/19falseEthernet76100000DeviceInterfacefalse112FortyGigE0/1/0/19falseEthernet7640000DeviceInterfacefalse113HundredGigE0/1/0/20falseEthernet80100000DeviceInterfacefalse114FortyGigE0/1/0/20falseEthernet8040000DeviceInterfacefalse115HundredGigE0/1/0/21falseEthernet84100000DeviceInterfacefalse116FortyGigE0/1/0/21falseEthernet8440000DeviceInterfacefalse117HundredGigE0/1/0/22falseEthernet88100000DeviceInterfacefalse118FortyGigE0/1/0/22falseEthernet8840000DeviceInterfacefalse119HundredGigE0/1/0/23falseEthernet92100000DeviceInterfacefalse120FortyGigE0/1/0/23falseEthernet9240000DeviceInterfacefalse121HundredGigE0/1/0/24falseEthernet96100000DeviceInterfacefalse122FortyGigE0/1/0/24falseEthernet9640000DeviceInterfacefalse123HundredGigE0/1/0/25falseEthernet100100000DeviceInterfacefalse124FortyGigE0/1/0/25falseEthernet10040000DeviceInterfacefalse125HundredGigE0/1/0/26falseEthernet104100000DeviceInterfacefalse126FortyGigE0/1/0/26falseEthernet10440000DeviceInterfacefalse127HundredGigE0/1/0/27falseEthernet108100000DeviceInterfacefalse128FortyGigE0/1/0/27falseEthernet10840000DeviceInterfacefalse129HundredGigE0/1/0/28falseEthernet112100000DeviceInterfacefalse130FortyGigE0/1/0/28falseEthernet11240000DeviceInterfacefalse131HundredGigE0/1/0/29falseEthernet116100000DeviceInterfacefalse132FortyGigE0/1/0/29falseEthernet11640000DeviceInterfacefalse133HundredGigE0/1/0/30falseEthernet120100000DeviceInterfacefalse134FortyGigE0/1/0/30falseEthernet12040000DeviceInterfacefalse135HundredGigE0/1/0/31falseEthernet124100000DeviceInterfacefalse136FortyGigE0/1/0/31falseEthernet12440000DeviceInterfacefalse137HundredGigE0/1/0/32falseEthernet128100000DeviceInterfacefalse138FortyGigE0/1/0/32falseEthernet12840000DeviceInterfacefalse139HundredGigE0/1/0/33falseEthernet132100000DeviceInterfacefalse140FortyGigE0/1/0/33falseEthernet13240000DeviceInterfacefalse141HundredGigE0/1/0/34falseEthernet136100000DeviceInterfacefalse142FortyGigE0/1/0/34falseEthernet13640000DeviceInterfacefalse143HundredGigE0/1/0/35falseEthernet140100000DeviceInterfacefalse144FortyGigE0/1/0/35falseEthernet14040000DeviceInterfacefalse145HundredGigE0/1/0/36falseEthernet144100000DeviceInterfacefalse146FortyGigE0/1/0/36falseEthernet14440000DeviceInterfacefalse147HundredGigE0/1/0/37falseEthernet148100000DeviceInterfacefalse148FortyGigE0/1/0/37falseEthernet14840000DeviceInterfacefalse149HundredGigE0/1/0/38falseEthernet152100000DeviceInterfacefalse150FortyGigE0/1/0/38falseEthernet15240000DeviceInterfacefalse151HundredGigE0/1/0/39falseEthernet156100000DeviceInterfacefalse152FortyGigE0/1/0/39falseEthernet15640000DeviceInterfacefalse153HundredGigE0/1/0/40falseEthernet160100000DeviceInterfacefalse154FortyGigE0/1/0/40falseEthernet16040000DeviceInterfacefalse155HundredGigE0/1/0/41falseEthernet164100000DeviceInterfacefalse156FortyGigE0/1/0/41falseEthernet16440000DeviceInterfacefalse157HundredGigE0/1/0/42falseEthernet168100000DeviceInterfacefalse158FortyGigE0/1/0/42falseEthernet16840000DeviceInterfacefalse159HundredGigE0/1/0/43falseEthernet172100000DeviceInterfacefalse160FortyGigE0/1/0/43falseEthernet17240000DeviceInterfacefalse161HundredGigE0/1/0/44falseEthernet176100000DeviceInterfacefalse162FortyGigE0/1/0/44falseEthernet17640000DeviceInterfacefalse163HundredGigE0/1/0/45falseEthernet180100000DeviceInterfacefalse164FortyGigE0/1/0/45falseEthernet18040000DeviceInterfacefalse165HundredGigE0/1/0/46falseEthernet184100000DeviceInterfacefalse166FortyGigE0/1/0/46falseEthernet18440000DeviceInterfacefalse167HundredGigE0/1/0/47falseEthernet188100000DeviceInterfacefalse168FortyGigE0/1/0/47falseEthernet18840000DeviceInterfacefalse169HundredGigE0/2/0/0falseEthernet0100000DeviceInterfacefalse170FortyGigE0/2/0/0falseEthernet040000DeviceInterfacefalse171HundredGigE0/2/0/1falseEthernet4100000DeviceInterfacefalse172FortyGigE0/2/0/1falseEthernet440000DeviceInterfacefalse173HundredGigE0/2/0/2falseEthernet8100000DeviceInterfacefalse174FortyGigE0/2/0/2falseEthernet840000DeviceInterfacefalse175HundredGigE0/2/0/3falseEthernet12100000DeviceInterfacefalse176FortyGigE0/2/0/3falseEthernet1240000DeviceInterfacefalse177HundredGigE0/2/0/4falseEthernet16100000DeviceInterfacefalse178FortyGigE0/2/0/4falseEthernet1640000DeviceInterfacefalse179HundredGigE0/2/0/5falseEthernet20100000DeviceInterfacefalse180FortyGigE0/2/0/5falseEthernet2040000DeviceInterfacefalse181HundredGigE0/2/0/6falseEthernet24100000DeviceInterfacefalse182FortyGigE0/2/0/6falseEthernet2440000DeviceInterfacefalse183HundredGigE0/2/0/7falseEthernet28100000DeviceInterfacefalse184FortyGigE0/2/0/7falseEthernet2840000DeviceInterfacefalse185HundredGigE0/2/0/8falseEthernet32100000DeviceInterfacefalse186FortyGigE0/2/0/8falseEthernet3240000DeviceInterfacefalse187HundredGigE0/2/0/9falseEthernet36100000DeviceInterfacefalse188FortyGigE0/2/0/9falseEthernet3640000DeviceInterfacefalse189HundredGigE0/2/0/10falseEthernet40100000DeviceInterfacefalse190FortyGigE0/2/0/10falseEthernet4040000DeviceInterfacefalse191HundredGigE0/2/0/11falseEthernet44100000DeviceInterfacefalse192FortyGigE0/2/0/11falseEthernet4440000DeviceInterfacefalse193HundredGigE0/2/0/12falseEthernet48100000DeviceInterfacefalse194FortyGigE0/2/0/12falseEthernet4840000DeviceInterfacefalse195HundredGigE0/2/0/13falseEthernet52100000DeviceInterfacefalse196FortyGigE0/2/0/13falseEthernet5240000DeviceInterfacefalse197HundredGigE0/2/0/14falseEthernet56100000DeviceInterfacefalse198FortyGigE0/2/0/14falseEthernet5640000DeviceInterfacefalse199HundredGigE0/2/0/15falseEthernet60100000DeviceInterfacefalse200FortyGigE0/2/0/15falseEthernet6040000DeviceInterfacefalse201HundredGigE0/2/0/16falseEthernet64100000DeviceInterfacefalse202FortyGigE0/2/0/16falseEthernet6440000DeviceInterfacefalse203HundredGigE0/2/0/17falseEthernet68100000DeviceInterfacefalse204FortyGigE0/2/0/17falseEthernet6840000DeviceInterfacefalse205HundredGigE0/2/0/18falseEthernet72100000DeviceInterfacefalse206FortyGigE0/2/0/18falseEthernet7240000DeviceInterfacefalse207HundredGigE0/2/0/19falseEthernet76100000DeviceInterfacefalse208FortyGigE0/2/0/19falseEthernet7640000DeviceInterfacefalse209HundredGigE0/2/0/20falseEthernet80100000DeviceInterfacefalse210FortyGigE0/2/0/20falseEthernet8040000DeviceInterfacefalse211HundredGigE0/2/0/21falseEthernet84100000DeviceInterfacefalse212FortyGigE0/2/0/21falseEthernet8440000DeviceInterfacefalse213HundredGigE0/2/0/22falseEthernet88100000DeviceInterfacefalse214FortyGigE0/2/0/22falseEthernet8840000DeviceInterfacefalse215HundredGigE0/2/0/23falseEthernet92100000DeviceInterfacefalse216FortyGigE0/2/0/23falseEthernet9240000DeviceInterfacefalse217HundredGigE0/2/0/24falseEthernet96100000DeviceInterfacefalse218FortyGigE0/2/0/24falseEthernet9640000DeviceInterfacefalse219HundredGigE0/2/0/25falseEthernet100100000DeviceInterfacefalse220FortyGigE0/2/0/25falseEthernet10040000DeviceInterfacefalse221HundredGigE0/2/0/26falseEthernet104100000DeviceInterfacefalse222FortyGigE0/2/0/26falseEthernet10440000DeviceInterfacefalse223HundredGigE0/2/0/27falseEthernet108100000DeviceInterfacefalse224FortyGigE0/2/0/27falseEthernet10840000DeviceInterfacefalse225HundredGigE0/2/0/28falseEthernet112100000DeviceInterfacefalse226FortyGigE0/2/0/28falseEthernet11240000DeviceInterfacefalse227HundredGigE0/2/0/29falseEthernet116100000DeviceInterfacefalse228FortyGigE0/2/0/29falseEthernet11640000DeviceInterfacefalse229HundredGigE0/2/0/30falseEthernet120100000DeviceInterfacefalse230FortyGigE0/2/0/30falseEthernet12040000DeviceInterfacefalse231HundredGigE0/2/0/31falseEthernet124100000DeviceInterfacefalse232FortyGigE0/2/0/31falseEthernet12440000DeviceInterfacefalse233HundredGigE0/2/0/32falseEthernet128100000DeviceInterfacefalse234FortyGigE0/2/0/32falseEthernet12840000DeviceInterfacefalse235HundredGigE0/2/0/33falseEthernet132100000DeviceInterfacefalse236FortyGigE0/2/0/33falseEthernet13240000DeviceInterfacefalse237HundredGigE0/2/0/34falseEthernet136100000DeviceInterfacefalse238FortyGigE0/2/0/34falseEthernet13640000DeviceInterfacefalse239HundredGigE0/2/0/35falseEthernet140100000DeviceInterfacefalse240FortyGigE0/2/0/35falseEthernet14040000DeviceInterfacefalse241HundredGigE0/2/0/36falseEthernet144100000DeviceInterfacefalse242FortyGigE0/2/0/36falseEthernet14440000DeviceInterfacefalse243HundredGigE0/2/0/37falseEthernet148100000DeviceInterfacefalse244FortyGigE0/2/0/37falseEthernet14840000DeviceInterfacefalse245HundredGigE0/2/0/38falseEthernet152100000DeviceInterfacefalse246FortyGigE0/2/0/38falseEthernet15240000DeviceInterfacefalse247HundredGigE0/2/0/39falseEthernet156100000DeviceInterfacefalse248FortyGigE0/2/0/39falseEthernet15640000DeviceInterfacefalse249HundredGigE0/2/0/40falseEthernet160100000DeviceInterfacefalse250FortyGigE0/2/0/40falseEthernet16040000DeviceInterfacefalse251HundredGigE0/2/0/41falseEthernet164100000DeviceInterfacefalse252FortyGigE0/2/0/41falseEthernet16440000DeviceInterfacefalse253HundredGigE0/2/0/42falseEthernet168100000DeviceInterfacefalse254FortyGigE0/2/0/42falseEthernet16840000DeviceInterfacefalse255HundredGigE0/2/0/43falseEthernet172100000DeviceInterfacefalse256FortyGigE0/2/0/43falseEthernet17240000DeviceInterfacefalse257HundredGigE0/2/0/44falseEthernet176100000DeviceInterfacefalse258FortyGigE0/2/0/44falseEthernet17640000DeviceInterfacefalse259HundredGigE0/2/0/45falseEthernet180100000DeviceInterfacefalse260FortyGigE0/2/0/45falseEthernet18040000DeviceInterfacefalse261HundredGigE0/2/0/46falseEthernet184100000DeviceInterfacefalse262FortyGigE0/2/0/46falseEthernet18440000DeviceInterfacefalse263HundredGigE0/2/0/47falseEthernet188100000DeviceInterfacefalse264FortyGigE0/2/0/47falseEthernet18840000DeviceInterfacefalse265HundredGigE0/3/0/0falseEthernet0100000DeviceInterfacefalse266FortyGigE0/3/0/0falseEthernet040000DeviceInterfacefalse267FourHundredGigE0/3/0/0falseEthernet0400000DeviceInterfacefalse268HundredGigE0/3/0/1falseEthernet8100000DeviceInterfacefalse269FortyGigE0/3/0/1falseEthernet840000DeviceInterfacefalse270FourHundredGigE0/3/0/1falseEthernet8400000DeviceInterfacefalse271HundredGigE0/3/0/2falseEthernet16100000DeviceInterfacefalse272FortyGigE0/3/0/2falseEthernet1640000DeviceInterfacefalse273FourHundredGigE0/3/0/2falseEthernet16400000DeviceInterfacefalse274HundredGigE0/3/0/3falseEthernet24100000DeviceInterfacefalse275FortyGigE0/3/0/3falseEthernet2440000DeviceInterfacefalse276FourHundredGigE0/3/0/3falseEthernet24400000DeviceInterfacefalse277HundredGigE0/3/0/4falseEthernet32100000DeviceInterfacefalse278FortyGigE0/3/0/4falseEthernet3240000DeviceInterfacefalse279FourHundredGigE0/3/0/4falseEthernet32400000DeviceInterfacefalse280HundredGigE0/3/0/5falseEthernet40100000DeviceInterfacefalse281FortyGigE0/3/0/5falseEthernet4040000DeviceInterfacefalse282FourHundredGigE0/3/0/5falseEthernet40400000DeviceInterfacefalse283HundredGigE0/3/0/6falseEthernet48100000DeviceInterfacefalse284FortyGigE0/3/0/6falseEthernet4840000DeviceInterfacefalse285FourHundredGigE0/3/0/6falseEthernet48400000DeviceInterfacefalse286HundredGigE0/3/0/7falseEthernet56100000DeviceInterfacefalse287FortyGigE0/3/0/7falseEthernet5640000DeviceInterfacefalse288FourHundredGigE0/3/0/7falseEthernet56400000DeviceInterfacefalse289HundredGigE0/3/0/8falseEthernet64100000DeviceInterfacefalse290FortyGigE0/3/0/8falseEthernet6440000DeviceInterfacefalse291FourHundredGigE0/3/0/8falseEthernet64400000DeviceInterfacefalse292HundredGigE0/3/0/9falseEthernet72100000DeviceInterfacefalse293FortyGigE0/3/0/9falseEthernet7240000DeviceInterfacefalse294FourHundredGigE0/3/0/9falseEthernet72400000DeviceInterfacefalse295HundredGigE0/3/0/10falseEthernet80100000DeviceInterfacefalse296FortyGigE0/3/0/10falseEthernet8040000DeviceInterfacefalse297FourHundredGigE0/3/0/10falseEthernet80400000DeviceInterfacefalse298HundredGigE0/3/0/11falseEthernet88100000DeviceInterfacefalse299FortyGigE0/3/0/11falseEthernet8840000DeviceInterfacefalse300FourHundredGigE0/3/0/11falseEthernet88400000DeviceInterfacefalse301HundredGigE0/3/0/12falseEthernet96100000DeviceInterfacefalse302FortyGigE0/3/0/12falseEthernet9640000DeviceInterfacefalse303FourHundredGigE0/3/0/12falseEthernet96400000DeviceInterfacefalse304HundredGigE0/3/0/13falseEthernet104100000DeviceInterfacefalse305FortyGigE0/3/0/13falseEthernet10440000DeviceInterfacefalse306FourHundredGigE0/3/0/13falseEthernet104400000DeviceInterfacefalse307HundredGigE0/3/0/14falseEthernet112100000DeviceInterfacefalse308FortyGigE0/3/0/14falseEthernet11240000DeviceInterfacefalse309FourHundredGigE0/3/0/14falseEthernet112400000DeviceInterfacefalse310HundredGigE0/3/0/15falseEthernet120100000DeviceInterfacefalse311FortyGigE0/3/0/15falseEthernet12040000DeviceInterfacefalse312FourHundredGigE0/3/0/15falseEthernet120400000DeviceInterfacefalse313HundredGigE0/3/0/16falseEthernet128100000DeviceInterfacefalse314FortyGigE0/3/0/16falseEthernet12840000DeviceInterfacefalse315FourHundredGigE0/3/0/16falseEthernet128400000DeviceInterfacefalse316HundredGigE0/3/0/17falseEthernet136100000DeviceInterfacefalse317FortyGigE0/3/0/17falseEthernet13640000DeviceInterfacefalse318FourHundredGigE0/3/0/17falseEthernet136400000DeviceInterfacefalse319HundredGigE0/3/0/18falseEthernet144100000DeviceInterfacefalse320FortyGigE0/3/0/18falseEthernet14440000DeviceInterfacefalse321FourHundredGigE0/3/0/18falseEthernet144400000DeviceInterfacefalse322HundredGigE0/3/0/19falseEthernet152100000DeviceInterfacefalse323FortyGigE0/3/0/19falseEthernet15240000DeviceInterfacefalse324FourHundredGigE0/3/0/19falseEthernet152400000DeviceInterfacefalse325HundredGigE0/3/0/20falseEthernet160100000DeviceInterfacefalse326FortyGigE0/3/0/20falseEthernet16040000DeviceInterfacefalse327FourHundredGigE0/3/0/20falseEthernet160400000DeviceInterfacefalse328HundredGigE0/3/0/21falseEthernet168100000DeviceInterfacefalse329FortyGigE0/3/0/21falseEthernet16840000DeviceInterfacefalse330FourHundredGigE0/3/0/21falseEthernet168400000DeviceInterfacefalse331HundredGigE0/3/0/22falseEthernet176100000DeviceInterfacefalse332FortyGigE0/3/0/22falseEthernet17640000DeviceInterfacefalse333FourHundredGigE0/3/0/22falseEthernet176400000DeviceInterfacefalse334HundredGigE0/3/0/23falseEthernet184100000DeviceInterfacefalse335FortyGigE0/3/0/23falseEthernet18440000DeviceInterfacefalse336FourHundredGigE0/3/0/23falseEthernet184400000DeviceInterfacefalse337HundredGigE0/3/0/24falseEthernet192100000DeviceInterfacefalse338FortyGigE0/3/0/24falseEthernet19240000DeviceInterfacefalse339FourHundredGigE0/3/0/24falseEthernet192400000DeviceInterfacefalse340HundredGigE0/3/0/25falseEthernet200100000DeviceInterfacefalse341FortyGigE0/3/0/25falseEthernet20040000DeviceInterfacefalse342FourHundredGigE0/3/0/25falseEthernet200400000DeviceInterfacefalse343HundredGigE0/3/0/26falseEthernet208100000DeviceInterfacefalse344FortyGigE0/3/0/26falseEthernet20840000DeviceInterfacefalse345FourHundredGigE0/3/0/26falseEthernet208400000DeviceInterfacefalse346HundredGigE0/3/0/27falseEthernet216100000DeviceInterfacefalse347FortyGigE0/3/0/27falseEthernet21640000DeviceInterfacefalse348FourHundredGigE0/3/0/27falseEthernet216400000DeviceInterfacefalse349HundredGigE0/3/0/28falseEthernet224100000DeviceInterfacefalse350FortyGigE0/3/0/28falseEthernet22440000DeviceInterfacefalse351FourHundredGigE0/3/0/28falseEthernet224400000DeviceInterfacefalse352HundredGigE0/3/0/29falseEthernet232100000DeviceInterfacefalse353FortyGigE0/3/0/29falseEthernet23240000DeviceInterfacefalse354FourHundredGigE0/3/0/29falseEthernet232400000DeviceInterfacefalse355HundredGigE0/3/0/30falseEthernet240100000DeviceInterfacefalse356FortyGigE0/3/0/30falseEthernet24040000DeviceInterfacefalse357FourHundredGigE0/3/0/30falseEthernet240400000DeviceInterfacefalse358HundredGigE0/3/0/31falseEthernet248100000DeviceInterfacefalse359FortyGigE0/3/0/31falseEthernet24840000DeviceInterfacefalse360FourHundredGigE0/3/0/31falseEthernet248400000DeviceInterfacefalse361HundredGigE0/3/0/32falseEthernet256100000DeviceInterfacefalse362FortyGigE0/3/0/32falseEthernet25640000DeviceInterfacefalse363FourHundredGigE0/3/0/32falseEthernet256400000DeviceInterfacefalse364HundredGigE0/3/0/33falseEthernet264100000DeviceInterfacefalse365FortyGigE0/3/0/33falseEthernet26440000DeviceInterfacefalse366FourHundredGigE0/3/0/33falseEthernet264400000DeviceInterfacefalse367HundredGigE0/3/0/34falseEthernet272100000DeviceInterfacefalse368FortyGigE0/3/0/34falseEthernet27240000DeviceInterfacefalse369FourHundredGigE0/3/0/34falseEthernet272400000DeviceInterfacefalse370HundredGigE0/3/0/35falseEthernet280100000DeviceInterfacefalse371FortyGigE0/3/0/35falseEthernet28040000DeviceInterfacefalse372FourHundredGigE0/3/0/35falseEthernet280400000DeviceInterfacefalse373FourHundredGigE0/4/0/0falseEthernet0400000DeviceInterfacefalse374HundredGigE0/4/0/0falseEthernet0100000DeviceInterfacefalse375FourHundredGigE0/4/0/1falseEthernet8400000DeviceInterfacefalse376HundredGigE0/4/0/1falseEthernet8100000DeviceInterfacefalse377FourHundredGigE0/4/0/2falseEthernet16400000DeviceInterfacefalse378HundredGigE0/4/0/2falseEthernet16100000DeviceInterfacefalse379FourHundredGigE0/4/0/3falseEthernet24400000DeviceInterfacefalse380HundredGigE0/4/0/3falseEthernet24100000DeviceInterfacefalse381FourHundredGigE0/4/0/4falseEthernet32400000DeviceInterfacefalse382HundredGigE0/4/0/4falseEthernet32100000DeviceInterfacefalse383FourHundredGigE0/4/0/5falseEthernet40400000DeviceInterfacefalse384HundredGigE0/4/0/5falseEthernet40100000DeviceInterfacefalse385FourHundredGigE0/4/0/6falseEthernet48400000DeviceInterfacefalse386HundredGigE0/4/0/6falseEthernet48100000DeviceInterfacefalse387FourHundredGigE0/4/0/7falseEthernet56400000DeviceInterfacefalse388HundredGigE0/4/0/7falseEthernet56100000DeviceInterfacefalse389FourHundredGigE0/4/0/8falseEthernet64400000DeviceInterfacefalse390HundredGigE0/4/0/8falseEthernet64100000DeviceInterfacefalse391FourHundredGigE0/4/0/9falseEthernet72400000DeviceInterfacefalse392HundredGigE0/4/0/9falseEthernet72100000DeviceInterfacefalse393FourHundredGigE0/4/0/10falseEthernet80400000DeviceInterfacefalse394HundredGigE0/4/0/10falseEthernet80100000DeviceInterfacefalse395FourHundredGigE0/4/0/11falseEthernet88400000DeviceInterfacefalse396HundredGigE0/4/0/11falseEthernet88100000DeviceInterfacefalse397FourHundredGigE0/4/0/12falseEthernet96400000DeviceInterfacefalse398HundredGigE0/4/0/12falseEthernet96100000DeviceInterfacefalse399FourHundredGigE0/4/0/13falseEthernet104400000DeviceInterfacefalse400HundredGigE0/4/0/13falseEthernet104100000DeviceInterfacefalse401FourHundredGigE0/4/0/14falseEthernet112400000DeviceInterfacefalse402HundredGigE0/4/0/14falseEthernet112100000DeviceInterfacefalse403FourHundredGigE0/4/0/15falseEthernet120400000DeviceInterfacefalse404HundredGigE0/4/0/15falseEthernet120100000DeviceInterfacefalse405FourHundredGigE0/4/0/16falseEthernet128400000DeviceInterfacefalse406HundredGigE0/4/0/16falseEthernet128100000DeviceInterfacefalse407FourHundredGigE0/4/0/17falseEthernet136400000DeviceInterfacefalse408HundredGigE0/4/0/17falseEthernet136100000DeviceInterfacefalse409FourHundredGigE0/4/0/18falseEthernet144400000DeviceInterfacefalse410HundredGigE0/4/0/18falseEthernet144100000DeviceInterfacefalse411FourHundredGigE0/4/0/19falseEthernet152400000DeviceInterfacefalse412HundredGigE0/4/0/19falseEthernet152100000DeviceInterfacefalse413FourHundredGigE0/4/0/20falseEthernet160400000DeviceInterfacefalse414HundredGigE0/4/0/20falseEthernet160100000DeviceInterfacefalse415FourHundredGigE0/4/0/21falseEthernet168400000DeviceInterfacefalse416HundredGigE0/4/0/21falseEthernet168100000DeviceInterfacefalse417FourHundredGigE0/4/0/22falseEthernet176400000DeviceInterfacefalse418HundredGigE0/4/0/22falseEthernet176100000DeviceInterfacefalse419FourHundredGigE0/4/0/23falseEthernet184400000DeviceInterfacefalse420HundredGigE0/4/0/23falseEthernet184100000DeviceInterfacefalse421FourHundredGigE0/4/0/24falseEthernet192400000DeviceInterfacefalse422HundredGigE0/4/0/24falseEthernet192100000DeviceInterfacefalse423FourHundredGigE0/4/0/25falseEthernet200400000DeviceInterfacefalse424HundredGigE0/4/0/25falseEthernet200100000DeviceInterfacefalse425FourHundredGigE0/4/0/26falseEthernet208400000DeviceInterfacefalse426HundredGigE0/4/0/26falseEthernet208100000DeviceInterfacefalse427FourHundredGigE0/4/0/27falseEthernet216400000DeviceInterfacefalse428HundredGigE0/4/0/27falseEthernet216100000DeviceInterfacefalse429FourHundredGigE0/4/0/28falseEthernet224400000DeviceInterfacefalse430HundredGigE0/4/0/28falseEthernet224100000DeviceInterfacefalse431FourHundredGigE0/4/0/29falseEthernet232400000DeviceInterfacefalse432HundredGigE0/4/0/29falseEthernet232100000DeviceInterfacefalse433FourHundredGigE0/4/0/30falseEthernet240400000DeviceInterfacefalse434HundredGigE0/4/0/30falseEthernet240100000DeviceInterfacefalse435FourHundredGigE0/4/0/31falseEthernet248400000DeviceInterfacefalse436HundredGigE0/4/0/31falseEthernet248100000DeviceInterfacefalse437FourHundredGigE0/4/0/32falseEthernet256400000DeviceInterfacefalse438HundredGigE0/4/0/32falseEthernet256100000DeviceInterfacefalse439FourHundredGigE0/4/0/33falseEthernet264400000DeviceInterfacefalse440HundredGigE0/4/0/33falseEthernet264100000DeviceInterfacefalse441FourHundredGigE0/4/0/34falseEthernet272400000DeviceInterfacefalse442HundredGigE0/4/0/34falseEthernet272100000DeviceInterfacefalse443FourHundredGigE0/4/0/35falseEthernet280400000DeviceInterfacefalse444HundredGigE0/4/0/35falseEthernet280100000false08-Sonic-StarLabFourHundredGigE0/0/0/0AsicInterfaceIndex1ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:0InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex0ProviderChipNameASIC0SlotIndex0HundredGigE0/0/0/0AsicInterfaceIndex1ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:0InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex0ProviderChipNameASIC0SlotIndex0FourHundredGigE0/0/0/1AsicInterfaceIndex2ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:1InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex1ProviderChipNameASIC0SlotIndex0HundredGigE0/0/0/1AsicInterfaceIndex2ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:1InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex1ProviderChipNameASIC0SlotIndex0FourHundredGigE0/0/0/2AsicInterfaceIndex3ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:2InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex2ProviderChipNameASIC0SlotIndex0HundredGigE0/0/0/2AsicInterfaceIndex3ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:2InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex2ProviderChipNameASIC0SlotIndex0FourHundredGigE0/0/0/3AsicInterfaceIndex4ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:3InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex3ProviderChipNameASIC0SlotIndex0HundredGigE0/0/0/3AsicInterfaceIndex4ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:3InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex3ProviderChipNameASIC0SlotIndex0FourHundredGigE0/0/0/4AsicInterfaceIndex5ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:4InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex4ProviderChipNameASIC0SlotIndex0HundredGigE0/0/0/4AsicInterfaceIndex5ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:4InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex4ProviderChipNameASIC0SlotIndex0FourHundredGigE0/0/0/5AsicInterfaceIndex6ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:5InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex5ProviderChipNameASIC0SlotIndex0HundredGigE0/0/0/5AsicInterfaceIndex6ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:5InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex5ProviderChipNameASIC0SlotIndex0FourHundredGigE0/0/0/6AsicInterfaceIndex7ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:6InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex6ProviderChipNameASIC0SlotIndex0HundredGigE0/0/0/6AsicInterfaceIndex7ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:6InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex6ProviderChipNameASIC0SlotIndex0FourHundredGigE0/0/0/7AsicInterfaceIndex8ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:7InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex7ProviderChipNameASIC0SlotIndex0HundredGigE0/0/0/7AsicInterfaceIndex8ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:7InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex7ProviderChipNameASIC0SlotIndex0FourHundredGigE0/0/0/8AsicInterfaceIndex9ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:8InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex8ProviderChipNameASIC0SlotIndex0HundredGigE0/0/0/8AsicInterfaceIndex9ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:8InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex8ProviderChipNameASIC0SlotIndex0FourHundredGigE0/0/0/9AsicInterfaceIndex10ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:9InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex9ProviderChipNameASIC0SlotIndex0HundredGigE0/0/0/9AsicInterfaceIndex10ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:9InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex9ProviderChipNameASIC0SlotIndex0FourHundredGigE0/0/0/10AsicInterfaceIndex11ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:10InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex10ProviderChipNameASIC0SlotIndex0HundredGigE0/0/0/10AsicInterfaceIndex11ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:10InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex10ProviderChipNameASIC0SlotIndex0FourHundredGigE0/0/0/11AsicInterfaceIndex12ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:11InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex11ProviderChipNameASIC0SlotIndex0HundredGigE0/0/0/11AsicInterfaceIndex12ChassisIndex0CoreId0InterfaceGroupIndex0:0:0:11InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex11ProviderChipNameASIC0SlotIndex0FourHundredGigE0/0/0/12AsicInterfaceIndex1ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:12InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex12ProviderChipNameASIC1SlotIndex0HundredGigE0/0/0/12AsicInterfaceIndex1ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:12InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex12ProviderChipNameASIC1SlotIndex0FourHundredGigE0/0/0/13AsicInterfaceIndex2ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:13InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex13ProviderChipNameASIC1SlotIndex0HundredGigE0/0/0/13AsicInterfaceIndex2ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:13InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex13ProviderChipNameASIC1SlotIndex0FourHundredGigE0/0/0/14AsicInterfaceIndex3ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:14InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex14ProviderChipNameASIC1SlotIndex0HundredGigE0/0/0/14AsicInterfaceIndex3ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:14InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex14ProviderChipNameASIC1SlotIndex0FourHundredGigE0/0/0/15AsicInterfaceIndex4ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:15InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex15ProviderChipNameASIC1SlotIndex0HundredGigE0/0/0/15AsicInterfaceIndex4ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:15InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex15ProviderChipNameASIC1SlotIndex0FourHundredGigE0/0/0/16AsicInterfaceIndex5ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:16InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex16ProviderChipNameASIC1SlotIndex0HundredGigE0/0/0/16AsicInterfaceIndex5ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:16InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex16ProviderChipNameASIC1SlotIndex0FourHundredGigE0/0/0/17AsicInterfaceIndex6ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:17InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex17ProviderChipNameASIC1SlotIndex0HundredGigE0/0/0/17AsicInterfaceIndex6ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:17InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex17ProviderChipNameASIC1SlotIndex0FourHundredGigE0/0/0/18AsicInterfaceIndex7ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:18InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex18ProviderChipNameASIC1SlotIndex0HundredGigE0/0/0/18AsicInterfaceIndex7ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:18InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex18ProviderChipNameASIC1SlotIndex0FourHundredGigE0/0/0/19AsicInterfaceIndex8ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:19InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex19ProviderChipNameASIC1SlotIndex0HundredGigE0/0/0/19AsicInterfaceIndex8ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:19InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex19ProviderChipNameASIC1SlotIndex0FourHundredGigE0/0/0/20AsicInterfaceIndex9ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:20InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex20ProviderChipNameASIC1SlotIndex0HundredGigE0/0/0/20AsicInterfaceIndex9ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:20InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex20ProviderChipNameASIC1SlotIndex0FourHundredGigE0/0/0/21AsicInterfaceIndex10ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:21InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex21ProviderChipNameASIC1SlotIndex0HundredGigE0/0/0/21AsicInterfaceIndex10ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:21InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex21ProviderChipNameASIC1SlotIndex0FourHundredGigE0/0/0/22AsicInterfaceIndex11ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:22InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex22ProviderChipNameASIC1SlotIndex0HundredGigE0/0/0/22AsicInterfaceIndex11ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:22InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex22ProviderChipNameASIC1SlotIndex0FourHundredGigE0/0/0/23AsicInterfaceIndex12ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:23InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex23ProviderChipNameASIC1SlotIndex0HundredGigE0/0/0/23AsicInterfaceIndex12ChassisIndex0CoreId1InterfaceGroupIndex0:0:0:23InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex23ProviderChipNameASIC1SlotIndex0FourHundredGigE0/0/0/24AsicInterfaceIndex1ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:24InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex24ProviderChipNameASIC2SlotIndex0HundredGigE0/0/0/24AsicInterfaceIndex1ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:24InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex24ProviderChipNameASIC2SlotIndex0FourHundredGigE0/0/0/25AsicInterfaceIndex2ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:25InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex25ProviderChipNameASIC2SlotIndex0HundredGigE0/0/0/25AsicInterfaceIndex2ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:25InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex25ProviderChipNameASIC2SlotIndex0FourHundredGigE0/0/0/26AsicInterfaceIndex3ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:26InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex26ProviderChipNameASIC2SlotIndex0HundredGigE0/0/0/26AsicInterfaceIndex3ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:26InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex26ProviderChipNameASIC2SlotIndex0FourHundredGigE0/0/0/27AsicInterfaceIndex4ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:27InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex27ProviderChipNameASIC2SlotIndex0HundredGigE0/0/0/27AsicInterfaceIndex4ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:27InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex27ProviderChipNameASIC2SlotIndex0FourHundredGigE0/0/0/28AsicInterfaceIndex5ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:28InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex28ProviderChipNameASIC2SlotIndex0HundredGigE0/0/0/28AsicInterfaceIndex5ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:28InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex28ProviderChipNameASIC2SlotIndex0FourHundredGigE0/0/0/29AsicInterfaceIndex6ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:29InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex29ProviderChipNameASIC2SlotIndex0HundredGigE0/0/0/29AsicInterfaceIndex6ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:29InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex29ProviderChipNameASIC2SlotIndex0FourHundredGigE0/0/0/30AsicInterfaceIndex7ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:30InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex30ProviderChipNameASIC2SlotIndex0HundredGigE0/0/0/30AsicInterfaceIndex7ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:30InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex30ProviderChipNameASIC2SlotIndex0FourHundredGigE0/0/0/31AsicInterfaceIndex8ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:31InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex31ProviderChipNameASIC2SlotIndex0HundredGigE0/0/0/31AsicInterfaceIndex8ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:31InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex31ProviderChipNameASIC2SlotIndex0FourHundredGigE0/0/0/32AsicInterfaceIndex9ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:32InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex32ProviderChipNameASIC2SlotIndex0HundredGigE0/0/0/32AsicInterfaceIndex9ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:32InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex32ProviderChipNameASIC2SlotIndex0FourHundredGigE0/0/0/33AsicInterfaceIndex10ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:33InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex33ProviderChipNameASIC2SlotIndex0HundredGigE0/0/0/33AsicInterfaceIndex10ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:33InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex33ProviderChipNameASIC2SlotIndex0FourHundredGigE0/0/0/34AsicInterfaceIndex11ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:34InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex34ProviderChipNameASIC2SlotIndex0HundredGigE0/0/0/34AsicInterfaceIndex11ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:34InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex34ProviderChipNameASIC2SlotIndex0FourHundredGigE0/0/0/35AsicInterfaceIndex12ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:35InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex35ProviderChipNameASIC2SlotIndex0HundredGigE0/0/0/35AsicInterfaceIndex12ChassisIndex0CoreId2InterfaceGroupIndex0:0:0:35InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex35ProviderChipNameASIC2SlotIndex0HundredGigE0/1/0/0AsicInterfaceIndex1AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:0InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex0ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/0AsicInterfaceIndex1AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:0InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex0ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/1AsicInterfaceIndex2AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:1InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex1ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/1AsicInterfaceIndex2AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:1InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex1ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/2AsicInterfaceIndex3AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:2InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex2ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/2AsicInterfaceIndex3AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:2InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex2ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/3AsicInterfaceIndex4AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:3InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex3ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/3AsicInterfaceIndex4AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:3InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex3ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/4AsicInterfaceIndex5AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:4InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex4ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/4AsicInterfaceIndex5AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:4InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex4ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/5AsicInterfaceIndex6AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:5InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex5ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/5AsicInterfaceIndex6AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:5InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex5ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/6AsicInterfaceIndex7AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:6InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex6ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/6AsicInterfaceIndex7AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:6InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex6ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/7AsicInterfaceIndex8AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:7InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex7ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/7AsicInterfaceIndex8AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:7InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex7ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/8AsicInterfaceIndex9AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:8InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex8ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/8AsicInterfaceIndex9AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:8InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex8ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/9AsicInterfaceIndex10AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:9InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex9ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/9AsicInterfaceIndex10AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:9InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex9ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/10AsicInterfaceIndex11AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:10InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex10ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/10AsicInterfaceIndex11AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:10InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex10ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/11AsicInterfaceIndex12AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:11InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex11ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/11AsicInterfaceIndex12AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:11InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex11ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/12AsicInterfaceIndex13AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:12InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex12ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/12AsicInterfaceIndex13AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:12InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex12ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/13AsicInterfaceIndex1AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:13InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex13ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/13AsicInterfaceIndex1AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:13InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex13ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/14AsicInterfaceIndex2AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:14InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex14ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/14AsicInterfaceIndex2AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:14InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex14ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/15AsicInterfaceIndex14AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:15InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex15ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/15AsicInterfaceIndex14AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:15InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex15ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/16AsicInterfaceIndex3AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:16InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex16ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/16AsicInterfaceIndex3AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:16InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex16ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/17AsicInterfaceIndex4AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:17InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex17ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/17AsicInterfaceIndex4AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:17InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex17ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/18AsicInterfaceIndex15AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:18InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex18ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/18AsicInterfaceIndex15AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:18InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex18ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/19AsicInterfaceIndex5AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:19InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex19ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/19AsicInterfaceIndex5AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:19InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex19ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/20AsicInterfaceIndex6AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:20InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex20ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/20AsicInterfaceIndex6AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:20InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex20ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/21AsicInterfaceIndex16AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:21InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex21ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/21AsicInterfaceIndex16AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:21InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex21ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/22AsicInterfaceIndex7AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:22InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex22ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/22AsicInterfaceIndex7AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:22InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex22ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/23AsicInterfaceIndex8AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:23InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex23ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/23AsicInterfaceIndex8AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:23InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex23ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/24AsicInterfaceIndex17AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:24InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex24ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/24AsicInterfaceIndex17AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:24InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex24ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/25AsicInterfaceIndex9AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:25InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex25ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/25AsicInterfaceIndex9AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:25InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex25ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/26AsicInterfaceIndex10AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:26InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex26ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/26AsicInterfaceIndex10AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:26InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex26ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/27AsicInterfaceIndex18AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:27InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex27ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/27AsicInterfaceIndex18AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:27InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex27ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/28AsicInterfaceIndex11AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:28InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex28ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/28AsicInterfaceIndex11AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:28InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex28ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/29AsicInterfaceIndex12AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:29InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex29ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/29AsicInterfaceIndex12AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:29InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex29ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/30AsicInterfaceIndex19AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:30InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex30ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/30AsicInterfaceIndex19AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:30InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex30ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/31AsicInterfaceIndex13AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:31InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex31ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/31AsicInterfaceIndex13AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:31InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex31ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/32AsicInterfaceIndex14AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:32InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex32ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/32AsicInterfaceIndex14AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:32InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex32ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/33AsicInterfaceIndex20AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:33InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex33ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/33AsicInterfaceIndex20AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:33InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex33ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/34AsicInterfaceIndex15AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:34InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex34ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/34AsicInterfaceIndex15AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:34InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex34ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/35AsicInterfaceIndex16AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:35InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex35ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/35AsicInterfaceIndex16AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:35InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex35ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/36AsicInterfaceIndex21AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:36InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex36ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/36AsicInterfaceIndex21AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:36InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex36ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/37AsicInterfaceIndex17AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:37InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex37ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/37AsicInterfaceIndex17AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:37InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex37ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/38AsicInterfaceIndex18AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:38InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex38ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/38AsicInterfaceIndex18AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:38InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex38ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/39AsicInterfaceIndex22AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:39InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex39ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/39AsicInterfaceIndex22AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:39InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex39ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/40AsicInterfaceIndex19AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:40InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex40ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/40AsicInterfaceIndex19AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:40InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex40ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/41AsicInterfaceIndex20AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:41InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex41ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/41AsicInterfaceIndex20AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:41InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex41ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/42AsicInterfaceIndex23AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:42InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex42ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/42AsicInterfaceIndex23AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:42InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex42ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/43AsicInterfaceIndex21AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:43InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex43ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/43AsicInterfaceIndex21AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:43InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex43ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/44AsicInterfaceIndex22AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:44InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex44ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/44AsicInterfaceIndex22AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:44InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex44ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/45AsicInterfaceIndex24AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:45InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex45ProviderChipNameASIC0SlotIndex1FortyGigE0/1/0/45AsicInterfaceIndex24AsicSwitchId0ChassisIndex0CoreId0InterfaceGroupIndex0:1:0:45InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex45ProviderChipNameASIC0SlotIndex1HundredGigE0/1/0/46AsicInterfaceIndex23AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:46InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex46ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/46AsicInterfaceIndex23AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:46InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex46ProviderChipNameASIC1SlotIndex1HundredGigE0/1/0/47AsicInterfaceIndex24AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:47InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex47ProviderChipNameASIC1SlotIndex1FortyGigE0/1/0/47AsicInterfaceIndex24AsicSwitchId1ChassisIndex0CoreId1InterfaceGroupIndex0:1:0:47InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex47ProviderChipNameASIC1SlotIndex1HundredGigE0/2/0/0AsicInterfaceIndex1AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:0InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex0ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/0AsicInterfaceIndex1AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:0InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex0ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/1AsicInterfaceIndex2AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:1InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex1ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/1AsicInterfaceIndex2AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:1InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex1ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/2AsicInterfaceIndex3AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:2InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex2ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/2AsicInterfaceIndex3AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:2InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex2ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/3AsicInterfaceIndex4AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:3InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex3ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/3AsicInterfaceIndex4AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:3InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex3ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/4AsicInterfaceIndex5AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:4InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex4ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/4AsicInterfaceIndex5AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:4InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex4ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/5AsicInterfaceIndex6AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:5InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex5ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/5AsicInterfaceIndex6AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:5InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex5ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/6AsicInterfaceIndex7AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:6InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex6ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/6AsicInterfaceIndex7AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:6InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex6ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/7AsicInterfaceIndex8AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:7InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex7ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/7AsicInterfaceIndex8AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:7InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex7ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/8AsicInterfaceIndex9AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:8InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex8ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/8AsicInterfaceIndex9AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:8InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex8ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/9AsicInterfaceIndex10AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:9InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex9ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/9AsicInterfaceIndex10AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:9InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex9ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/10AsicInterfaceIndex11AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:10InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex10ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/10AsicInterfaceIndex11AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:10InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex10ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/11AsicInterfaceIndex12AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:11InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex11ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/11AsicInterfaceIndex12AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:11InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex11ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/12AsicInterfaceIndex13AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:12InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex12ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/12AsicInterfaceIndex13AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:12InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex12ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/13AsicInterfaceIndex1AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:13InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex13ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/13AsicInterfaceIndex1AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:13InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex13ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/14AsicInterfaceIndex2AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:14InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex14ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/14AsicInterfaceIndex2AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:14InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex14ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/15AsicInterfaceIndex14AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:15InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex15ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/15AsicInterfaceIndex14AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:15InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex15ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/16AsicInterfaceIndex3AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:16InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex16ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/16AsicInterfaceIndex3AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:16InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex16ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/17AsicInterfaceIndex4AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:17InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex17ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/17AsicInterfaceIndex4AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:17InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex17ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/18AsicInterfaceIndex15AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:18InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex18ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/18AsicInterfaceIndex15AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:18InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex18ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/19AsicInterfaceIndex5AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:19InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex19ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/19AsicInterfaceIndex5AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:19InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex19ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/20AsicInterfaceIndex6AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:20InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex20ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/20AsicInterfaceIndex6AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:20InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex20ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/21AsicInterfaceIndex16AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:21InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex21ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/21AsicInterfaceIndex16AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:21InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex21ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/22AsicInterfaceIndex7AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:22InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex22ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/22AsicInterfaceIndex7AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:22InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex22ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/23AsicInterfaceIndex8AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:23InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex23ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/23AsicInterfaceIndex8AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:23InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex23ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/24AsicInterfaceIndex17AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:24InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex24ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/24AsicInterfaceIndex17AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:24InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex24ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/25AsicInterfaceIndex9AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:25InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex25ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/25AsicInterfaceIndex9AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:25InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex25ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/26AsicInterfaceIndex10AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:26InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex26ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/26AsicInterfaceIndex10AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:26InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex26ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/27AsicInterfaceIndex18AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:27InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex27ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/27AsicInterfaceIndex18AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:27InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex27ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/28AsicInterfaceIndex11AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:28InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex28ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/28AsicInterfaceIndex11AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:28InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex28ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/29AsicInterfaceIndex12AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:29InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex29ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/29AsicInterfaceIndex12AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:29InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex29ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/30AsicInterfaceIndex19AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:30InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex30ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/30AsicInterfaceIndex19AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:30InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex30ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/31AsicInterfaceIndex13AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:31InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex31ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/31AsicInterfaceIndex13AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:31InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex31ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/32AsicInterfaceIndex14AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:32InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex32ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/32AsicInterfaceIndex14AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:32InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex32ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/33AsicInterfaceIndex20AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:33InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex33ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/33AsicInterfaceIndex20AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:33InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex33ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/34AsicInterfaceIndex15AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:34InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex34ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/34AsicInterfaceIndex15AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:34InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex34ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/35AsicInterfaceIndex16AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:35InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex35ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/35AsicInterfaceIndex16AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:35InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex35ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/36AsicInterfaceIndex21AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:36InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex36ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/36AsicInterfaceIndex21AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:36InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex36ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/37AsicInterfaceIndex17AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:37InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex37ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/37AsicInterfaceIndex17AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:37InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex37ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/38AsicInterfaceIndex18AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:38InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex38ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/38AsicInterfaceIndex18AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:38InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex38ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/39AsicInterfaceIndex22AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:39InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex39ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/39AsicInterfaceIndex22AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:39InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex39ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/40AsicInterfaceIndex19AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:40InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex40ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/40AsicInterfaceIndex19AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:40InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex40ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/41AsicInterfaceIndex20AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:41InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex41ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/41AsicInterfaceIndex20AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:41InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex41ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/42AsicInterfaceIndex23AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:42InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex42ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/42AsicInterfaceIndex23AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:42InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex42ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/43AsicInterfaceIndex21AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:43InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex43ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/43AsicInterfaceIndex21AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:43InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex43ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/44AsicInterfaceIndex22AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:44InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex44ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/44AsicInterfaceIndex22AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:44InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex44ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/45AsicInterfaceIndex24AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:45InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex45ProviderChipNameASIC0SlotIndex2FortyGigE0/2/0/45AsicInterfaceIndex24AsicSwitchId4ChassisIndex0CoreId0InterfaceGroupIndex0:2:0:45InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex45ProviderChipNameASIC0SlotIndex2HundredGigE0/2/0/46AsicInterfaceIndex23AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:46InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex46ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/46AsicInterfaceIndex23AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:46InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex46ProviderChipNameASIC1SlotIndex2HundredGigE0/2/0/47AsicInterfaceIndex24AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:47InterfaceSubGroupIndex1LineCardSkuCisco-temp-LC-48H-C48PortIndex47ProviderChipNameASIC1SlotIndex2FortyGigE0/2/0/47AsicInterfaceIndex24AsicSwitchId5ChassisIndex0CoreId1InterfaceGroupIndex0:2:0:47InterfaceSubGroupIndex2LineCardSkuCisco-temp-LC-48H-C48PortIndex47ProviderChipNameASIC1SlotIndex2HundredGigE0/3/0/0AsicInterfaceIndex1AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:0InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex0ProviderChipNameASIC0SlotIndex3FortyGigE0/3/0/0AsicInterfaceIndex1AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:0InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex0ProviderChipNameASIC0SlotIndex3FourHundredGigE0/3/0/0AsicInterfaceIndex1AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:0InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex0ProviderChipNameASIC0SlotIndex3HundredGigE0/3/0/1AsicInterfaceIndex2AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:1InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex1ProviderChipNameASIC0SlotIndex3FortyGigE0/3/0/1AsicInterfaceIndex2AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:1InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex1ProviderChipNameASIC0SlotIndex3FourHundredGigE0/3/0/1AsicInterfaceIndex2AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:1InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex1ProviderChipNameASIC0SlotIndex3HundredGigE0/3/0/2AsicInterfaceIndex3AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:2InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex2ProviderChipNameASIC0SlotIndex3FortyGigE0/3/0/2AsicInterfaceIndex3AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:2InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex2ProviderChipNameASIC0SlotIndex3FourHundredGigE0/3/0/2AsicInterfaceIndex3AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:2InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex2ProviderChipNameASIC0SlotIndex3HundredGigE0/3/0/3AsicInterfaceIndex4AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:3InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex3ProviderChipNameASIC0SlotIndex3FortyGigE0/3/0/3AsicInterfaceIndex4AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:3InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex3ProviderChipNameASIC0SlotIndex3FourHundredGigE0/3/0/3AsicInterfaceIndex4AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:3InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex3ProviderChipNameASIC0SlotIndex3HundredGigE0/3/0/4AsicInterfaceIndex5AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:4InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex4ProviderChipNameASIC0SlotIndex3FortyGigE0/3/0/4AsicInterfaceIndex5AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:4InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex4ProviderChipNameASIC0SlotIndex3FourHundredGigE0/3/0/4AsicInterfaceIndex5AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:4InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex4ProviderChipNameASIC0SlotIndex3HundredGigE0/3/0/5AsicInterfaceIndex6AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:5InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex5ProviderChipNameASIC0SlotIndex3FortyGigE0/3/0/5AsicInterfaceIndex6AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:5InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex5ProviderChipNameASIC0SlotIndex3FourHundredGigE0/3/0/5AsicInterfaceIndex6AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:5InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex5ProviderChipNameASIC0SlotIndex3HundredGigE0/3/0/6AsicInterfaceIndex7AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:6InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex6ProviderChipNameASIC0SlotIndex3FortyGigE0/3/0/6AsicInterfaceIndex7AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:6InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex6ProviderChipNameASIC0SlotIndex3FourHundredGigE0/3/0/6AsicInterfaceIndex7AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:6InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex6ProviderChipNameASIC0SlotIndex3HundredGigE0/3/0/7AsicInterfaceIndex8AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:7InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex7ProviderChipNameASIC0SlotIndex3FortyGigE0/3/0/7AsicInterfaceIndex8AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:7InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex7ProviderChipNameASIC0SlotIndex3FourHundredGigE0/3/0/7AsicInterfaceIndex8AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:7InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex7ProviderChipNameASIC0SlotIndex3HundredGigE0/3/0/8AsicInterfaceIndex9AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:8InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex8ProviderChipNameASIC0SlotIndex3FortyGigE0/3/0/8AsicInterfaceIndex9AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:8InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex8ProviderChipNameASIC0SlotIndex3FourHundredGigE0/3/0/8AsicInterfaceIndex9AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:8InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex8ProviderChipNameASIC0SlotIndex3HundredGigE0/3/0/9AsicInterfaceIndex10AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:9InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex9ProviderChipNameASIC0SlotIndex3FortyGigE0/3/0/9AsicInterfaceIndex10AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:9InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex9ProviderChipNameASIC0SlotIndex3FourHundredGigE0/3/0/9AsicInterfaceIndex10AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:9InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex9ProviderChipNameASIC0SlotIndex3HundredGigE0/3/0/10AsicInterfaceIndex11AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:10InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex10ProviderChipNameASIC0SlotIndex3FortyGigE0/3/0/10AsicInterfaceIndex11AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:10InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex10ProviderChipNameASIC0SlotIndex3FourHundredGigE0/3/0/10AsicInterfaceIndex11AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:10InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex10ProviderChipNameASIC0SlotIndex3HundredGigE0/3/0/11AsicInterfaceIndex12AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:11InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex11ProviderChipNameASIC0SlotIndex3FortyGigE0/3/0/11AsicInterfaceIndex12AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:11InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex11ProviderChipNameASIC0SlotIndex3FourHundredGigE0/3/0/11AsicInterfaceIndex12AsicSwitchId8ChassisIndex0CoreId0InterfaceGroupIndex0:3:0:11InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex11ProviderChipNameASIC0SlotIndex3HundredGigE0/3/0/12AsicInterfaceIndex1AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:12InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex12ProviderChipNameASIC1SlotIndex3FortyGigE0/3/0/12AsicInterfaceIndex1AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:12InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex12ProviderChipNameASIC1SlotIndex3FourHundredGigE0/3/0/12AsicInterfaceIndex1AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:12InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex12ProviderChipNameASIC1SlotIndex3HundredGigE0/3/0/13AsicInterfaceIndex2AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:13InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex13ProviderChipNameASIC1SlotIndex3FortyGigE0/3/0/13AsicInterfaceIndex2AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:13InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex13ProviderChipNameASIC1SlotIndex3FourHundredGigE0/3/0/13AsicInterfaceIndex2AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:13InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex13ProviderChipNameASIC1SlotIndex3HundredGigE0/3/0/14AsicInterfaceIndex3AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:14InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex14ProviderChipNameASIC1SlotIndex3FortyGigE0/3/0/14AsicInterfaceIndex3AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:14InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex14ProviderChipNameASIC1SlotIndex3FourHundredGigE0/3/0/14AsicInterfaceIndex3AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:14InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex14ProviderChipNameASIC1SlotIndex3HundredGigE0/3/0/15AsicInterfaceIndex4AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:15InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex15ProviderChipNameASIC1SlotIndex3FortyGigE0/3/0/15AsicInterfaceIndex4AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:15InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex15ProviderChipNameASIC1SlotIndex3FourHundredGigE0/3/0/15AsicInterfaceIndex4AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:15InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex15ProviderChipNameASIC1SlotIndex3HundredGigE0/3/0/16AsicInterfaceIndex5AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:16InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex16ProviderChipNameASIC1SlotIndex3FortyGigE0/3/0/16AsicInterfaceIndex5AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:16InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex16ProviderChipNameASIC1SlotIndex3FourHundredGigE0/3/0/16AsicInterfaceIndex5AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:16InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex16ProviderChipNameASIC1SlotIndex3HundredGigE0/3/0/17AsicInterfaceIndex6AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:17InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex17ProviderChipNameASIC1SlotIndex3FortyGigE0/3/0/17AsicInterfaceIndex6AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:17InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex17ProviderChipNameASIC1SlotIndex3FourHundredGigE0/3/0/17AsicInterfaceIndex6AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:17InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex17ProviderChipNameASIC1SlotIndex3HundredGigE0/3/0/18AsicInterfaceIndex7AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:18InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex18ProviderChipNameASIC1SlotIndex3FortyGigE0/3/0/18AsicInterfaceIndex7AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:18InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex18ProviderChipNameASIC1SlotIndex3FourHundredGigE0/3/0/18AsicInterfaceIndex7AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:18InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex18ProviderChipNameASIC1SlotIndex3HundredGigE0/3/0/19AsicInterfaceIndex8AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:19InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex19ProviderChipNameASIC1SlotIndex3FortyGigE0/3/0/19AsicInterfaceIndex8AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:19InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex19ProviderChipNameASIC1SlotIndex3FourHundredGigE0/3/0/19AsicInterfaceIndex8AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:19InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex19ProviderChipNameASIC1SlotIndex3HundredGigE0/3/0/20AsicInterfaceIndex9AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:20InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex20ProviderChipNameASIC1SlotIndex3FortyGigE0/3/0/20AsicInterfaceIndex9AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:20InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex20ProviderChipNameASIC1SlotIndex3FourHundredGigE0/3/0/20AsicInterfaceIndex9AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:20InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex20ProviderChipNameASIC1SlotIndex3HundredGigE0/3/0/21AsicInterfaceIndex10AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:21InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex21ProviderChipNameASIC1SlotIndex3FortyGigE0/3/0/21AsicInterfaceIndex10AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:21InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex21ProviderChipNameASIC1SlotIndex3FourHundredGigE0/3/0/21AsicInterfaceIndex10AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:21InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex21ProviderChipNameASIC1SlotIndex3HundredGigE0/3/0/22AsicInterfaceIndex11AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:22InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex22ProviderChipNameASIC1SlotIndex3FortyGigE0/3/0/22AsicInterfaceIndex11AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:22InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex22ProviderChipNameASIC1SlotIndex3FourHundredGigE0/3/0/22AsicInterfaceIndex11AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:22InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex22ProviderChipNameASIC1SlotIndex3HundredGigE0/3/0/23AsicInterfaceIndex12AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:23InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex23ProviderChipNameASIC1SlotIndex3FortyGigE0/3/0/23AsicInterfaceIndex12AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:23InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex23ProviderChipNameASIC1SlotIndex3FourHundredGigE0/3/0/23AsicInterfaceIndex12AsicSwitchId9ChassisIndex0CoreId1InterfaceGroupIndex0:3:0:23InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex23ProviderChipNameASIC1SlotIndex3HundredGigE0/3/0/24AsicInterfaceIndex1AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:24InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex24ProviderChipNameASIC2SlotIndex3FortyGigE0/3/0/24AsicInterfaceIndex1AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:24InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex24ProviderChipNameASIC2SlotIndex3FourHundredGigE0/3/0/24AsicInterfaceIndex1AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:24InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex24ProviderChipNameASIC2SlotIndex3HundredGigE0/3/0/25AsicInterfaceIndex2AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:25InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex25ProviderChipNameASIC2SlotIndex3FortyGigE0/3/0/25AsicInterfaceIndex2AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:25InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex25ProviderChipNameASIC2SlotIndex3FourHundredGigE0/3/0/25AsicInterfaceIndex2AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:25InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex25ProviderChipNameASIC2SlotIndex3HundredGigE0/3/0/26AsicInterfaceIndex3AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:26InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex26ProviderChipNameASIC2SlotIndex3FortyGigE0/3/0/26AsicInterfaceIndex3AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:26InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex26ProviderChipNameASIC2SlotIndex3FourHundredGigE0/3/0/26AsicInterfaceIndex3AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:26InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex26ProviderChipNameASIC2SlotIndex3HundredGigE0/3/0/27AsicInterfaceIndex4AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:27InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex27ProviderChipNameASIC2SlotIndex3FortyGigE0/3/0/27AsicInterfaceIndex4AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:27InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex27ProviderChipNameASIC2SlotIndex3FourHundredGigE0/3/0/27AsicInterfaceIndex4AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:27InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex27ProviderChipNameASIC2SlotIndex3HundredGigE0/3/0/28AsicInterfaceIndex5AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:28InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex28ProviderChipNameASIC2SlotIndex3FortyGigE0/3/0/28AsicInterfaceIndex5AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:28InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex28ProviderChipNameASIC2SlotIndex3FourHundredGigE0/3/0/28AsicInterfaceIndex5AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:28InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex28ProviderChipNameASIC2SlotIndex3HundredGigE0/3/0/29AsicInterfaceIndex6AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:29InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex29ProviderChipNameASIC2SlotIndex3FortyGigE0/3/0/29AsicInterfaceIndex6AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:29InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex29ProviderChipNameASIC2SlotIndex3FourHundredGigE0/3/0/29AsicInterfaceIndex6AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:29InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex29ProviderChipNameASIC2SlotIndex3HundredGigE0/3/0/30AsicInterfaceIndex7AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:30InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex30ProviderChipNameASIC2SlotIndex3FortyGigE0/3/0/30AsicInterfaceIndex7AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:30InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex30ProviderChipNameASIC2SlotIndex3FourHundredGigE0/3/0/30AsicInterfaceIndex7AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:30InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex30ProviderChipNameASIC2SlotIndex3HundredGigE0/3/0/31AsicInterfaceIndex8AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:31InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex31ProviderChipNameASIC2SlotIndex3FortyGigE0/3/0/31AsicInterfaceIndex8AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:31InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex31ProviderChipNameASIC2SlotIndex3FourHundredGigE0/3/0/31AsicInterfaceIndex8AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:31InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex31ProviderChipNameASIC2SlotIndex3HundredGigE0/3/0/32AsicInterfaceIndex9AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:32InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex32ProviderChipNameASIC2SlotIndex3FortyGigE0/3/0/32AsicInterfaceIndex9AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:32InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex32ProviderChipNameASIC2SlotIndex3FourHundredGigE0/3/0/32AsicInterfaceIndex9AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:32InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex32ProviderChipNameASIC2SlotIndex3HundredGigE0/3/0/33AsicInterfaceIndex10AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:33InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex33ProviderChipNameASIC2SlotIndex3FortyGigE0/3/0/33AsicInterfaceIndex10AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:33InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex33ProviderChipNameASIC2SlotIndex3FourHundredGigE0/3/0/33AsicInterfaceIndex10AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:33InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex33ProviderChipNameASIC2SlotIndex3HundredGigE0/3/0/34AsicInterfaceIndex11AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:34InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex34ProviderChipNameASIC2SlotIndex3FortyGigE0/3/0/34AsicInterfaceIndex11AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:34InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex34ProviderChipNameASIC2SlotIndex3FourHundredGigE0/3/0/34AsicInterfaceIndex11AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:34InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex34ProviderChipNameASIC2SlotIndex3HundredGigE0/3/0/35AsicInterfaceIndex12AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:35InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-O36PortIndex35ProviderChipNameASIC2SlotIndex3FortyGigE0/3/0/35AsicInterfaceIndex12AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:35InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-O36PortIndex35ProviderChipNameASIC2SlotIndex3FourHundredGigE0/3/0/35AsicInterfaceIndex12AsicSwitchId10ChassisIndex0CoreId2InterfaceGroupIndex0:3:0:35InterfaceSubGroupIndex3LineCardSkuCisco-88-LC0-36FH-O36PortIndex35ProviderChipNameASIC2SlotIndex3FourHundredGigE0/4/0/0AsicInterfaceIndex1AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:0InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex0ProviderChipNameASIC0SlotIndex4HundredGigE0/4/0/0AsicInterfaceIndex1AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:0InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex0ProviderChipNameASIC0SlotIndex4FourHundredGigE0/4/0/1AsicInterfaceIndex2AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:1InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex1ProviderChipNameASIC0SlotIndex4HundredGigE0/4/0/1AsicInterfaceIndex2AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:1InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex1ProviderChipNameASIC0SlotIndex4FourHundredGigE0/4/0/2AsicInterfaceIndex3AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:2InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex2ProviderChipNameASIC0SlotIndex4HundredGigE0/4/0/2AsicInterfaceIndex3AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:2InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex2ProviderChipNameASIC0SlotIndex4FourHundredGigE0/4/0/3AsicInterfaceIndex4AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:3InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex3ProviderChipNameASIC0SlotIndex4HundredGigE0/4/0/3AsicInterfaceIndex4AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:3InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex3ProviderChipNameASIC0SlotIndex4FourHundredGigE0/4/0/4AsicInterfaceIndex5AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:4InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex4ProviderChipNameASIC0SlotIndex4HundredGigE0/4/0/4AsicInterfaceIndex5AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:4InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex4ProviderChipNameASIC0SlotIndex4FourHundredGigE0/4/0/5AsicInterfaceIndex6AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:5InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex5ProviderChipNameASIC0SlotIndex4HundredGigE0/4/0/5AsicInterfaceIndex6AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:5InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex5ProviderChipNameASIC0SlotIndex4FourHundredGigE0/4/0/6AsicInterfaceIndex7AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:6InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex6ProviderChipNameASIC0SlotIndex4HundredGigE0/4/0/6AsicInterfaceIndex7AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:6InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex6ProviderChipNameASIC0SlotIndex4FourHundredGigE0/4/0/7AsicInterfaceIndex8AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:7InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex7ProviderChipNameASIC0SlotIndex4HundredGigE0/4/0/7AsicInterfaceIndex8AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:7InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex7ProviderChipNameASIC0SlotIndex4FourHundredGigE0/4/0/8AsicInterfaceIndex9AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:8InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex8ProviderChipNameASIC0SlotIndex4HundredGigE0/4/0/8AsicInterfaceIndex9AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:8InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex8ProviderChipNameASIC0SlotIndex4FourHundredGigE0/4/0/9AsicInterfaceIndex10AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:9InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex9ProviderChipNameASIC0SlotIndex4HundredGigE0/4/0/9AsicInterfaceIndex10AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:9InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex9ProviderChipNameASIC0SlotIndex4FourHundredGigE0/4/0/10AsicInterfaceIndex11AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:10InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex10ProviderChipNameASIC0SlotIndex4HundredGigE0/4/0/10AsicInterfaceIndex11AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:10InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex10ProviderChipNameASIC0SlotIndex4FourHundredGigE0/4/0/11AsicInterfaceIndex12AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:11InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex11ProviderChipNameASIC0SlotIndex4HundredGigE0/4/0/11AsicInterfaceIndex12AsicSwitchId12ChassisIndex0CoreId0InterfaceGroupIndex0:4:0:11InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex11ProviderChipNameASIC0SlotIndex4FourHundredGigE0/4/0/12AsicInterfaceIndex1AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:12InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex12ProviderChipNameASIC1SlotIndex4HundredGigE0/4/0/12AsicInterfaceIndex1AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:12InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex12ProviderChipNameASIC1SlotIndex4FourHundredGigE0/4/0/13AsicInterfaceIndex2AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:13InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex13ProviderChipNameASIC1SlotIndex4HundredGigE0/4/0/13AsicInterfaceIndex2AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:13InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex13ProviderChipNameASIC1SlotIndex4FourHundredGigE0/4/0/14AsicInterfaceIndex3AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:14InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex14ProviderChipNameASIC1SlotIndex4HundredGigE0/4/0/14AsicInterfaceIndex3AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:14InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex14ProviderChipNameASIC1SlotIndex4FourHundredGigE0/4/0/15AsicInterfaceIndex4AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:15InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex15ProviderChipNameASIC1SlotIndex4HundredGigE0/4/0/15AsicInterfaceIndex4AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:15InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex15ProviderChipNameASIC1SlotIndex4FourHundredGigE0/4/0/16AsicInterfaceIndex5AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:16InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex16ProviderChipNameASIC1SlotIndex4HundredGigE0/4/0/16AsicInterfaceIndex5AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:16InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex16ProviderChipNameASIC1SlotIndex4FourHundredGigE0/4/0/17AsicInterfaceIndex6AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:17InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex17ProviderChipNameASIC1SlotIndex4HundredGigE0/4/0/17AsicInterfaceIndex6AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:17InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex17ProviderChipNameASIC1SlotIndex4FourHundredGigE0/4/0/18AsicInterfaceIndex7AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:18InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex18ProviderChipNameASIC1SlotIndex4HundredGigE0/4/0/18AsicInterfaceIndex7AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:18InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex18ProviderChipNameASIC1SlotIndex4FourHundredGigE0/4/0/19AsicInterfaceIndex8AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:19InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex19ProviderChipNameASIC1SlotIndex4HundredGigE0/4/0/19AsicInterfaceIndex8AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:19InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex19ProviderChipNameASIC1SlotIndex4FourHundredGigE0/4/0/20AsicInterfaceIndex9AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:20InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex20ProviderChipNameASIC1SlotIndex4HundredGigE0/4/0/20AsicInterfaceIndex9AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:20InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex20ProviderChipNameASIC1SlotIndex4FourHundredGigE0/4/0/21AsicInterfaceIndex10AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:21InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex21ProviderChipNameASIC1SlotIndex4HundredGigE0/4/0/21AsicInterfaceIndex10AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:21InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex21ProviderChipNameASIC1SlotIndex4FourHundredGigE0/4/0/22AsicInterfaceIndex11AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:22InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex22ProviderChipNameASIC1SlotIndex4HundredGigE0/4/0/22AsicInterfaceIndex11AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:22InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex22ProviderChipNameASIC1SlotIndex4FourHundredGigE0/4/0/23AsicInterfaceIndex12AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:23InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex23ProviderChipNameASIC1SlotIndex4HundredGigE0/4/0/23AsicInterfaceIndex12AsicSwitchId13ChassisIndex0CoreId1InterfaceGroupIndex0:4:0:23InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex23ProviderChipNameASIC1SlotIndex4FourHundredGigE0/4/0/24AsicInterfaceIndex1AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:24InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex24ProviderChipNameASIC2SlotIndex4HundredGigE0/4/0/24AsicInterfaceIndex1AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:24InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex24ProviderChipNameASIC2SlotIndex4FourHundredGigE0/4/0/25AsicInterfaceIndex2AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:25InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex25ProviderChipNameASIC2SlotIndex4HundredGigE0/4/0/25AsicInterfaceIndex2AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:25InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex25ProviderChipNameASIC2SlotIndex4FourHundredGigE0/4/0/26AsicInterfaceIndex3AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:26InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex26ProviderChipNameASIC2SlotIndex4HundredGigE0/4/0/26AsicInterfaceIndex3AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:26InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex26ProviderChipNameASIC2SlotIndex4FourHundredGigE0/4/0/27AsicInterfaceIndex4AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:27InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex27ProviderChipNameASIC2SlotIndex4HundredGigE0/4/0/27AsicInterfaceIndex4AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:27InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex27ProviderChipNameASIC2SlotIndex4FourHundredGigE0/4/0/28AsicInterfaceIndex5AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:28InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex28ProviderChipNameASIC2SlotIndex4HundredGigE0/4/0/28AsicInterfaceIndex5AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:28InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex28ProviderChipNameASIC2SlotIndex4FourHundredGigE0/4/0/29AsicInterfaceIndex6AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:29InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex29ProviderChipNameASIC2SlotIndex4HundredGigE0/4/0/29AsicInterfaceIndex6AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:29InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex29ProviderChipNameASIC2SlotIndex4FourHundredGigE0/4/0/30AsicInterfaceIndex7AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:30InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex30ProviderChipNameASIC2SlotIndex4HundredGigE0/4/0/30AsicInterfaceIndex7AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:30InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex30ProviderChipNameASIC2SlotIndex4FourHundredGigE0/4/0/31AsicInterfaceIndex8AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:31InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex31ProviderChipNameASIC2SlotIndex4HundredGigE0/4/0/31AsicInterfaceIndex8AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:31InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex31ProviderChipNameASIC2SlotIndex4FourHundredGigE0/4/0/32AsicInterfaceIndex9AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:32InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex32ProviderChipNameASIC2SlotIndex4HundredGigE0/4/0/32AsicInterfaceIndex9AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:32InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex32ProviderChipNameASIC2SlotIndex4FourHundredGigE0/4/0/33AsicInterfaceIndex10AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:33InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex33ProviderChipNameASIC2SlotIndex4HundredGigE0/4/0/33AsicInterfaceIndex10AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:33InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex33ProviderChipNameASIC2SlotIndex4FourHundredGigE0/4/0/34AsicInterfaceIndex11AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:34InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex34ProviderChipNameASIC2SlotIndex4HundredGigE0/4/0/34AsicInterfaceIndex11AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:34InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex34ProviderChipNameASIC2SlotIndex4FourHundredGigE0/4/0/35AsicInterfaceIndex12AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:35InterfaceSubGroupIndex1LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex35ProviderChipNameASIC2SlotIndex4HundredGigE0/4/0/35AsicInterfaceIndex12AsicSwitchId14ChassisIndex0CoreId2InterfaceGroupIndex0:4:0:35InterfaceSubGroupIndex2LineCardSkuCisco-88-LC0-36FH-M-O36MacSecEnabledTruePortIndex35ProviderChipNameASIC2SlotIndex4DeviceInterfacefalse1MgmtEth0/RP0/CPU0/0false1000DeviceInterfacefalse1FourHundredGigE0/0/0/0false0egressnone00DeviceInterfacefalse2FourHundredGigE0/0/0/0false0ingressnone00DeviceInterfacefalse3FourHundredGigE0/0/0/0false0Bidirectionalnone00DeviceInterfacefalse4HundredGigE0/0/0/0false0egressnone00DeviceInterfacefalse5HundredGigE0/0/0/0false0ingressnone00DeviceInterfacefalse6HundredGigE0/0/0/0false0Bidirectionalnone00DeviceInterfacefalse7FourHundredGigE0/0/0/1false0egressnone00DeviceInterfacefalse8FourHundredGigE0/0/0/1false0ingressnone00DeviceInterfacefalse9FourHundredGigE0/0/0/1false0Bidirectionalnone00DeviceInterfacefalse10HundredGigE0/0/0/1false0egressnone00DeviceInterfacefalse11HundredGigE0/0/0/1false0ingressnone00DeviceInterfacefalse12HundredGigE0/0/0/1false0Bidirectionalnone00DeviceInterfacefalse13FourHundredGigE0/0/0/2false0egressnone00DeviceInterfacefalse14FourHundredGigE0/0/0/2false0ingressnone00DeviceInterfacefalse15FourHundredGigE0/0/0/2false0Bidirectionalnone00DeviceInterfacefalse16HundredGigE0/0/0/2false0egressnone00DeviceInterfacefalse17HundredGigE0/0/0/2false0ingressnone00DeviceInterfacefalse18HundredGigE0/0/0/2false0Bidirectionalnone00DeviceInterfacefalse19FourHundredGigE0/0/0/3false0egressnone00DeviceInterfacefalse20FourHundredGigE0/0/0/3false0ingressnone00DeviceInterfacefalse21FourHundredGigE0/0/0/3false0Bidirectionalnone00DeviceInterfacefalse22HundredGigE0/0/0/3false0egressnone00DeviceInterfacefalse23HundredGigE0/0/0/3false0ingressnone00DeviceInterfacefalse24HundredGigE0/0/0/3false0Bidirectionalnone00DeviceInterfacefalse25FourHundredGigE0/0/0/4false0egressnone00DeviceInterfacefalse26FourHundredGigE0/0/0/4false0ingressnone00DeviceInterfacefalse27FourHundredGigE0/0/0/4false0Bidirectionalnone00DeviceInterfacefalse28HundredGigE0/0/0/4false0egressnone00DeviceInterfacefalse29HundredGigE0/0/0/4false0ingressnone00DeviceInterfacefalse30HundredGigE0/0/0/4false0Bidirectionalnone00DeviceInterfacefalse31FourHundredGigE0/0/0/5false0egressnone00DeviceInterfacefalse32FourHundredGigE0/0/0/5false0ingressnone00DeviceInterfacefalse33FourHundredGigE0/0/0/5false0Bidirectionalnone00DeviceInterfacefalse34HundredGigE0/0/0/5false0egressnone00DeviceInterfacefalse35HundredGigE0/0/0/5false0ingressnone00DeviceInterfacefalse36HundredGigE0/0/0/5false0Bidirectionalnone00DeviceInterfacefalse37FourHundredGigE0/0/0/6false0egressnone00DeviceInterfacefalse38FourHundredGigE0/0/0/6false0ingressnone00DeviceInterfacefalse39FourHundredGigE0/0/0/6false0Bidirectionalnone00DeviceInterfacefalse40HundredGigE0/0/0/6false0egressnone00DeviceInterfacefalse41HundredGigE0/0/0/6false0ingressnone00DeviceInterfacefalse42HundredGigE0/0/0/6false0Bidirectionalnone00DeviceInterfacefalse43FourHundredGigE0/0/0/7false0egressnone00DeviceInterfacefalse44FourHundredGigE0/0/0/7false0ingressnone00DeviceInterfacefalse45FourHundredGigE0/0/0/7false0Bidirectionalnone00DeviceInterfacefalse46HundredGigE0/0/0/7false0egressnone00DeviceInterfacefalse47HundredGigE0/0/0/7false0ingressnone00DeviceInterfacefalse48HundredGigE0/0/0/7false0Bidirectionalnone00DeviceInterfacefalse49FourHundredGigE0/0/0/8false0egressnone00DeviceInterfacefalse50FourHundredGigE0/0/0/8false0ingressnone00DeviceInterfacefalse51FourHundredGigE0/0/0/8false0Bidirectionalnone00DeviceInterfacefalse52HundredGigE0/0/0/8false0egressnone00DeviceInterfacefalse53HundredGigE0/0/0/8false0ingressnone00DeviceInterfacefalse54HundredGigE0/0/0/8false0Bidirectionalnone00DeviceInterfacefalse55FourHundredGigE0/0/0/9false0egressnone00DeviceInterfacefalse56FourHundredGigE0/0/0/9false0ingressnone00DeviceInterfacefalse57FourHundredGigE0/0/0/9false0Bidirectionalnone00DeviceInterfacefalse58HundredGigE0/0/0/9false0egressnone00DeviceInterfacefalse59HundredGigE0/0/0/9false0ingressnone00DeviceInterfacefalse60HundredGigE0/0/0/9false0Bidirectionalnone00DeviceInterfacefalse61FourHundredGigE0/0/0/10false0egressnone00DeviceInterfacefalse62FourHundredGigE0/0/0/10false0ingressnone00DeviceInterfacefalse63FourHundredGigE0/0/0/10false0Bidirectionalnone00DeviceInterfacefalse64HundredGigE0/0/0/10false0egressnone00DeviceInterfacefalse65HundredGigE0/0/0/10false0ingressnone00DeviceInterfacefalse66HundredGigE0/0/0/10false0Bidirectionalnone00DeviceInterfacefalse67FourHundredGigE0/0/0/11false0egressnone00DeviceInterfacefalse68FourHundredGigE0/0/0/11false0ingressnone00DeviceInterfacefalse69FourHundredGigE0/0/0/11false0Bidirectionalnone00DeviceInterfacefalse70HundredGigE0/0/0/11false0egressnone00DeviceInterfacefalse71HundredGigE0/0/0/11false0ingressnone00DeviceInterfacefalse72HundredGigE0/0/0/11false0Bidirectionalnone00DeviceInterfacefalse73FourHundredGigE0/0/0/12false0egressnone00DeviceInterfacefalse74FourHundredGigE0/0/0/12false0ingressnone00DeviceInterfacefalse75FourHundredGigE0/0/0/12false0Bidirectionalnone00DeviceInterfacefalse76HundredGigE0/0/0/12false0egressnone00DeviceInterfacefalse77HundredGigE0/0/0/12false0ingressnone00DeviceInterfacefalse78HundredGigE0/0/0/12false0Bidirectionalnone00DeviceInterfacefalse79FourHundredGigE0/0/0/13false0egressnone00DeviceInterfacefalse80FourHundredGigE0/0/0/13false0ingressnone00DeviceInterfacefalse81FourHundredGigE0/0/0/13false0Bidirectionalnone00DeviceInterfacefalse82HundredGigE0/0/0/13false0egressnone00DeviceInterfacefalse83HundredGigE0/0/0/13false0ingressnone00DeviceInterfacefalse84HundredGigE0/0/0/13false0Bidirectionalnone00DeviceInterfacefalse85FourHundredGigE0/0/0/14false0egressnone00DeviceInterfacefalse86FourHundredGigE0/0/0/14false0ingressnone00DeviceInterfacefalse87FourHundredGigE0/0/0/14false0Bidirectionalnone00DeviceInterfacefalse88HundredGigE0/0/0/14false0egressnone00DeviceInterfacefalse89HundredGigE0/0/0/14false0ingressnone00DeviceInterfacefalse90HundredGigE0/0/0/14false0Bidirectionalnone00DeviceInterfacefalse91FourHundredGigE0/0/0/15false0egressnone00DeviceInterfacefalse92FourHundredGigE0/0/0/15false0ingressnone00DeviceInterfacefalse93FourHundredGigE0/0/0/15false0Bidirectionalnone00DeviceInterfacefalse94HundredGigE0/0/0/15false0egressnone00DeviceInterfacefalse95HundredGigE0/0/0/15false0ingressnone00DeviceInterfacefalse96HundredGigE0/0/0/15false0Bidirectionalnone00DeviceInterfacefalse97FourHundredGigE0/0/0/16false0egressnone00DeviceInterfacefalse98FourHundredGigE0/0/0/16false0ingressnone00DeviceInterfacefalse99FourHundredGigE0/0/0/16false0Bidirectionalnone00DeviceInterfacefalse100HundredGigE0/0/0/16false0egressnone00DeviceInterfacefalse101HundredGigE0/0/0/16false0ingressnone00DeviceInterfacefalse102HundredGigE0/0/0/16false0Bidirectionalnone00DeviceInterfacefalse103FourHundredGigE0/0/0/17false0egressnone00DeviceInterfacefalse104FourHundredGigE0/0/0/17false0ingressnone00DeviceInterfacefalse105FourHundredGigE0/0/0/17false0Bidirectionalnone00DeviceInterfacefalse106HundredGigE0/0/0/17false0egressnone00DeviceInterfacefalse107HundredGigE0/0/0/17false0ingressnone00DeviceInterfacefalse108HundredGigE0/0/0/17false0Bidirectionalnone00DeviceInterfacefalse109FourHundredGigE0/0/0/18false0egressnone00DeviceInterfacefalse110FourHundredGigE0/0/0/18false0ingressnone00DeviceInterfacefalse111FourHundredGigE0/0/0/18false0Bidirectionalnone00DeviceInterfacefalse112HundredGigE0/0/0/18false0egressnone00DeviceInterfacefalse113HundredGigE0/0/0/18false0ingressnone00DeviceInterfacefalse114HundredGigE0/0/0/18false0Bidirectionalnone00DeviceInterfacefalse115FourHundredGigE0/0/0/19false0egressnone00DeviceInterfacefalse116FourHundredGigE0/0/0/19false0ingressnone00DeviceInterfacefalse117FourHundredGigE0/0/0/19false0Bidirectionalnone00DeviceInterfacefalse118HundredGigE0/0/0/19false0egressnone00DeviceInterfacefalse119HundredGigE0/0/0/19false0ingressnone00DeviceInterfacefalse120HundredGigE0/0/0/19false0Bidirectionalnone00DeviceInterfacefalse121FourHundredGigE0/0/0/20false0egressnone00DeviceInterfacefalse122FourHundredGigE0/0/0/20false0ingressnone00DeviceInterfacefalse123FourHundredGigE0/0/0/20false0Bidirectionalnone00DeviceInterfacefalse124HundredGigE0/0/0/20false0egressnone00DeviceInterfacefalse125HundredGigE0/0/0/20false0ingressnone00DeviceInterfacefalse126HundredGigE0/0/0/20false0Bidirectionalnone00DeviceInterfacefalse127FourHundredGigE0/0/0/21false0egressnone00DeviceInterfacefalse128FourHundredGigE0/0/0/21false0ingressnone00DeviceInterfacefalse129FourHundredGigE0/0/0/21false0Bidirectionalnone00DeviceInterfacefalse130HundredGigE0/0/0/21false0egressnone00DeviceInterfacefalse131HundredGigE0/0/0/21false0ingressnone00DeviceInterfacefalse132HundredGigE0/0/0/21false0Bidirectionalnone00DeviceInterfacefalse133FourHundredGigE0/0/0/22false0egressnone00DeviceInterfacefalse134FourHundredGigE0/0/0/22false0ingressnone00DeviceInterfacefalse135FourHundredGigE0/0/0/22false0Bidirectionalnone00DeviceInterfacefalse136HundredGigE0/0/0/22false0egressnone00DeviceInterfacefalse137HundredGigE0/0/0/22false0ingressnone00DeviceInterfacefalse138HundredGigE0/0/0/22false0Bidirectionalnone00DeviceInterfacefalse139FourHundredGigE0/0/0/23false0egressnone00DeviceInterfacefalse140FourHundredGigE0/0/0/23false0ingressnone00DeviceInterfacefalse141FourHundredGigE0/0/0/23false0Bidirectionalnone00DeviceInterfacefalse142HundredGigE0/0/0/23false0egressnone00DeviceInterfacefalse143HundredGigE0/0/0/23false0ingressnone00DeviceInterfacefalse144HundredGigE0/0/0/23false0Bidirectionalnone00DeviceInterfacefalse145FourHundredGigE0/0/0/24false0egressnone00DeviceInterfacefalse146FourHundredGigE0/0/0/24false0ingressnone00DeviceInterfacefalse147FourHundredGigE0/0/0/24false0Bidirectionalnone00DeviceInterfacefalse148HundredGigE0/0/0/24false0egressnone00DeviceInterfacefalse149HundredGigE0/0/0/24false0ingressnone00DeviceInterfacefalse150HundredGigE0/0/0/24false0Bidirectionalnone00DeviceInterfacefalse151FourHundredGigE0/0/0/25false0egressnone00DeviceInterfacefalse152FourHundredGigE0/0/0/25false0ingressnone00DeviceInterfacefalse153FourHundredGigE0/0/0/25false0Bidirectionalnone00DeviceInterfacefalse154HundredGigE0/0/0/25false0egressnone00DeviceInterfacefalse155HundredGigE0/0/0/25false0ingressnone00DeviceInterfacefalse156HundredGigE0/0/0/25false0Bidirectionalnone00DeviceInterfacefalse157FourHundredGigE0/0/0/26false0egressnone00DeviceInterfacefalse158FourHundredGigE0/0/0/26false0ingressnone00DeviceInterfacefalse159FourHundredGigE0/0/0/26false0Bidirectionalnone00DeviceInterfacefalse160HundredGigE0/0/0/26false0egressnone00DeviceInterfacefalse161HundredGigE0/0/0/26false0ingressnone00DeviceInterfacefalse162HundredGigE0/0/0/26false0Bidirectionalnone00DeviceInterfacefalse163FourHundredGigE0/0/0/27false0egressnone00DeviceInterfacefalse164FourHundredGigE0/0/0/27false0ingressnone00DeviceInterfacefalse165FourHundredGigE0/0/0/27false0Bidirectionalnone00DeviceInterfacefalse166HundredGigE0/0/0/27false0egressnone00DeviceInterfacefalse167HundredGigE0/0/0/27false0ingressnone00DeviceInterfacefalse168HundredGigE0/0/0/27false0Bidirectionalnone00DeviceInterfacefalse169FourHundredGigE0/0/0/28false0egressnone00DeviceInterfacefalse170FourHundredGigE0/0/0/28false0ingressnone00DeviceInterfacefalse171FourHundredGigE0/0/0/28false0Bidirectionalnone00DeviceInterfacefalse172HundredGigE0/0/0/28false0egressnone00DeviceInterfacefalse173HundredGigE0/0/0/28false0ingressnone00DeviceInterfacefalse174HundredGigE0/0/0/28false0Bidirectionalnone00DeviceInterfacefalse175FourHundredGigE0/0/0/29false0egressnone00DeviceInterfacefalse176FourHundredGigE0/0/0/29false0ingressnone00DeviceInterfacefalse177FourHundredGigE0/0/0/29false0Bidirectionalnone00DeviceInterfacefalse178HundredGigE0/0/0/29false0egressnone00DeviceInterfacefalse179HundredGigE0/0/0/29false0ingressnone00DeviceInterfacefalse180HundredGigE0/0/0/29false0Bidirectionalnone00DeviceInterfacefalse181FourHundredGigE0/0/0/30false0egressnone00DeviceInterfacefalse182FourHundredGigE0/0/0/30false0ingressnone00DeviceInterfacefalse183FourHundredGigE0/0/0/30false0Bidirectionalnone00DeviceInterfacefalse184HundredGigE0/0/0/30false0egressnone00DeviceInterfacefalse185HundredGigE0/0/0/30false0ingressnone00DeviceInterfacefalse186HundredGigE0/0/0/30false0Bidirectionalnone00DeviceInterfacefalse187FourHundredGigE0/0/0/31false0egressnone00DeviceInterfacefalse188FourHundredGigE0/0/0/31false0ingressnone00DeviceInterfacefalse189FourHundredGigE0/0/0/31false0Bidirectionalnone00DeviceInterfacefalse190HundredGigE0/0/0/31false0egressnone00DeviceInterfacefalse191HundredGigE0/0/0/31false0ingressnone00DeviceInterfacefalse192HundredGigE0/0/0/31false0Bidirectionalnone00DeviceInterfacefalse193FourHundredGigE0/0/0/32false0egressnone00DeviceInterfacefalse194FourHundredGigE0/0/0/32false0ingressnone00DeviceInterfacefalse195FourHundredGigE0/0/0/32false0Bidirectionalnone00DeviceInterfacefalse196HundredGigE0/0/0/32false0egressnone00DeviceInterfacefalse197HundredGigE0/0/0/32false0ingressnone00DeviceInterfacefalse198HundredGigE0/0/0/32false0Bidirectionalnone00DeviceInterfacefalse199FourHundredGigE0/0/0/33false0egressnone00DeviceInterfacefalse200FourHundredGigE0/0/0/33false0ingressnone00DeviceInterfacefalse201FourHundredGigE0/0/0/33false0Bidirectionalnone00DeviceInterfacefalse202HundredGigE0/0/0/33false0egressnone00DeviceInterfacefalse203HundredGigE0/0/0/33false0ingressnone00DeviceInterfacefalse204HundredGigE0/0/0/33false0Bidirectionalnone00DeviceInterfacefalse205FourHundredGigE0/0/0/34false0egressnone00DeviceInterfacefalse206FourHundredGigE0/0/0/34false0ingressnone00DeviceInterfacefalse207FourHundredGigE0/0/0/34false0Bidirectionalnone00DeviceInterfacefalse208HundredGigE0/0/0/34false0egressnone00DeviceInterfacefalse209HundredGigE0/0/0/34false0ingressnone00DeviceInterfacefalse210HundredGigE0/0/0/34false0Bidirectionalnone00DeviceInterfacefalse211FourHundredGigE0/0/0/35false0egressnone00DeviceInterfacefalse212FourHundredGigE0/0/0/35false0ingressnone00DeviceInterfacefalse213FourHundredGigE0/0/0/35false0Bidirectionalnone00DeviceInterfacefalse214HundredGigE0/0/0/35false0egressnone00DeviceInterfacefalse215HundredGigE0/0/0/35false0ingressnone00DeviceInterfacefalse216HundredGigE0/0/0/35false0Bidirectionalnone00DeviceInterfacefalse217HundredGigE0/1/0/0false0egressnone00DeviceInterfacefalse218HundredGigE0/1/0/0false0ingressnone00DeviceInterfacefalse219HundredGigE0/1/0/0false0Bidirectionalnone00DeviceInterfacefalse220FortyGigE0/1/0/0false0egressnone00DeviceInterfacefalse221FortyGigE0/1/0/0false0ingressnone00DeviceInterfacefalse222FortyGigE0/1/0/0false0Bidirectionalnone00DeviceInterfacefalse223HundredGigE0/1/0/1false0egressnone00DeviceInterfacefalse224HundredGigE0/1/0/1false0ingressnone00DeviceInterfacefalse225HundredGigE0/1/0/1false0Bidirectionalnone00DeviceInterfacefalse226FortyGigE0/1/0/1false0egressnone00DeviceInterfacefalse227FortyGigE0/1/0/1false0ingressnone00DeviceInterfacefalse228FortyGigE0/1/0/1false0Bidirectionalnone00DeviceInterfacefalse229HundredGigE0/1/0/2false0egressnone00DeviceInterfacefalse230HundredGigE0/1/0/2false0ingressnone00DeviceInterfacefalse231HundredGigE0/1/0/2false0Bidirectionalnone00DeviceInterfacefalse232FortyGigE0/1/0/2false0egressnone00DeviceInterfacefalse233FortyGigE0/1/0/2false0ingressnone00DeviceInterfacefalse234FortyGigE0/1/0/2false0Bidirectionalnone00DeviceInterfacefalse235HundredGigE0/1/0/3false0egressnone00DeviceInterfacefalse236HundredGigE0/1/0/3false0ingressnone00DeviceInterfacefalse237HundredGigE0/1/0/3false0Bidirectionalnone00DeviceInterfacefalse238FortyGigE0/1/0/3false0egressnone00DeviceInterfacefalse239FortyGigE0/1/0/3false0ingressnone00DeviceInterfacefalse240FortyGigE0/1/0/3false0Bidirectionalnone00DeviceInterfacefalse241HundredGigE0/1/0/4false0egressnone00DeviceInterfacefalse242HundredGigE0/1/0/4false0ingressnone00DeviceInterfacefalse243HundredGigE0/1/0/4false0Bidirectionalnone00DeviceInterfacefalse244FortyGigE0/1/0/4false0egressnone00DeviceInterfacefalse245FortyGigE0/1/0/4false0ingressnone00DeviceInterfacefalse246FortyGigE0/1/0/4false0Bidirectionalnone00DeviceInterfacefalse247HundredGigE0/1/0/5false0egressnone00DeviceInterfacefalse248HundredGigE0/1/0/5false0ingressnone00DeviceInterfacefalse249HundredGigE0/1/0/5false0Bidirectionalnone00DeviceInterfacefalse250FortyGigE0/1/0/5false0egressnone00DeviceInterfacefalse251FortyGigE0/1/0/5false0ingressnone00DeviceInterfacefalse252FortyGigE0/1/0/5false0Bidirectionalnone00DeviceInterfacefalse253HundredGigE0/1/0/6false0egressnone00DeviceInterfacefalse254HundredGigE0/1/0/6false0ingressnone00DeviceInterfacefalse255HundredGigE0/1/0/6false0Bidirectionalnone00DeviceInterfacefalse256FortyGigE0/1/0/6false0egressnone00DeviceInterfacefalse257FortyGigE0/1/0/6false0ingressnone00DeviceInterfacefalse258FortyGigE0/1/0/6false0Bidirectionalnone00DeviceInterfacefalse259HundredGigE0/1/0/7false0egressnone00DeviceInterfacefalse260HundredGigE0/1/0/7false0ingressnone00DeviceInterfacefalse261HundredGigE0/1/0/7false0Bidirectionalnone00DeviceInterfacefalse262FortyGigE0/1/0/7false0egressnone00DeviceInterfacefalse263FortyGigE0/1/0/7false0ingressnone00DeviceInterfacefalse264FortyGigE0/1/0/7false0Bidirectionalnone00DeviceInterfacefalse265HundredGigE0/1/0/8false0egressnone00DeviceInterfacefalse266HundredGigE0/1/0/8false0ingressnone00DeviceInterfacefalse267HundredGigE0/1/0/8false0Bidirectionalnone00DeviceInterfacefalse268FortyGigE0/1/0/8false0egressnone00DeviceInterfacefalse269FortyGigE0/1/0/8false0ingressnone00DeviceInterfacefalse270FortyGigE0/1/0/8false0Bidirectionalnone00DeviceInterfacefalse271HundredGigE0/1/0/9false0egressnone00DeviceInterfacefalse272HundredGigE0/1/0/9false0ingressnone00DeviceInterfacefalse273HundredGigE0/1/0/9false0Bidirectionalnone00DeviceInterfacefalse274FortyGigE0/1/0/9false0egressnone00DeviceInterfacefalse275FortyGigE0/1/0/9false0ingressnone00DeviceInterfacefalse276FortyGigE0/1/0/9false0Bidirectionalnone00DeviceInterfacefalse277HundredGigE0/1/0/10false0egressnone00DeviceInterfacefalse278HundredGigE0/1/0/10false0ingressnone00DeviceInterfacefalse279HundredGigE0/1/0/10false0Bidirectionalnone00DeviceInterfacefalse280FortyGigE0/1/0/10false0egressnone00DeviceInterfacefalse281FortyGigE0/1/0/10false0ingressnone00DeviceInterfacefalse282FortyGigE0/1/0/10false0Bidirectionalnone00DeviceInterfacefalse283HundredGigE0/1/0/11false0egressnone00DeviceInterfacefalse284HundredGigE0/1/0/11false0ingressnone00DeviceInterfacefalse285HundredGigE0/1/0/11false0Bidirectionalnone00DeviceInterfacefalse286FortyGigE0/1/0/11false0egressnone00DeviceInterfacefalse287FortyGigE0/1/0/11false0ingressnone00DeviceInterfacefalse288FortyGigE0/1/0/11false0Bidirectionalnone00DeviceInterfacefalse289HundredGigE0/1/0/12false0egressnone00DeviceInterfacefalse290HundredGigE0/1/0/12false0ingressnone00DeviceInterfacefalse291HundredGigE0/1/0/12false0Bidirectionalnone00DeviceInterfacefalse292FortyGigE0/1/0/12false0egressnone00DeviceInterfacefalse293FortyGigE0/1/0/12false0ingressnone00DeviceInterfacefalse294FortyGigE0/1/0/12false0Bidirectionalnone00DeviceInterfacefalse295HundredGigE0/1/0/13false0egressnone00DeviceInterfacefalse296HundredGigE0/1/0/13false0ingressnone00DeviceInterfacefalse297HundredGigE0/1/0/13false0Bidirectionalnone00DeviceInterfacefalse298FortyGigE0/1/0/13false0egressnone00DeviceInterfacefalse299FortyGigE0/1/0/13false0ingressnone00DeviceInterfacefalse300FortyGigE0/1/0/13false0Bidirectionalnone00DeviceInterfacefalse301HundredGigE0/1/0/14false0egressnone00DeviceInterfacefalse302HundredGigE0/1/0/14false0ingressnone00DeviceInterfacefalse303HundredGigE0/1/0/14false0Bidirectionalnone00DeviceInterfacefalse304FortyGigE0/1/0/14false0egressnone00DeviceInterfacefalse305FortyGigE0/1/0/14false0ingressnone00DeviceInterfacefalse306FortyGigE0/1/0/14false0Bidirectionalnone00DeviceInterfacefalse307HundredGigE0/1/0/15false0egressnone00DeviceInterfacefalse308HundredGigE0/1/0/15false0ingressnone00DeviceInterfacefalse309HundredGigE0/1/0/15false0Bidirectionalnone00DeviceInterfacefalse310FortyGigE0/1/0/15false0egressnone00DeviceInterfacefalse311FortyGigE0/1/0/15false0ingressnone00DeviceInterfacefalse312FortyGigE0/1/0/15false0Bidirectionalnone00DeviceInterfacefalse313HundredGigE0/1/0/16false0egressnone00DeviceInterfacefalse314HundredGigE0/1/0/16false0ingressnone00DeviceInterfacefalse315HundredGigE0/1/0/16false0Bidirectionalnone00DeviceInterfacefalse316FortyGigE0/1/0/16false0egressnone00DeviceInterfacefalse317FortyGigE0/1/0/16false0ingressnone00DeviceInterfacefalse318FortyGigE0/1/0/16false0Bidirectionalnone00DeviceInterfacefalse319HundredGigE0/1/0/17false0egressnone00DeviceInterfacefalse320HundredGigE0/1/0/17false0ingressnone00DeviceInterfacefalse321HundredGigE0/1/0/17false0Bidirectionalnone00DeviceInterfacefalse322FortyGigE0/1/0/17false0egressnone00DeviceInterfacefalse323FortyGigE0/1/0/17false0ingressnone00DeviceInterfacefalse324FortyGigE0/1/0/17false0Bidirectionalnone00DeviceInterfacefalse325HundredGigE0/1/0/18false0egressnone00DeviceInterfacefalse326HundredGigE0/1/0/18false0ingressnone00DeviceInterfacefalse327HundredGigE0/1/0/18false0Bidirectionalnone00DeviceInterfacefalse328FortyGigE0/1/0/18false0egressnone00DeviceInterfacefalse329FortyGigE0/1/0/18false0ingressnone00DeviceInterfacefalse330FortyGigE0/1/0/18false0Bidirectionalnone00DeviceInterfacefalse331HundredGigE0/1/0/19false0egressnone00DeviceInterfacefalse332HundredGigE0/1/0/19false0ingressnone00DeviceInterfacefalse333HundredGigE0/1/0/19false0Bidirectionalnone00DeviceInterfacefalse334FortyGigE0/1/0/19false0egressnone00DeviceInterfacefalse335FortyGigE0/1/0/19false0ingressnone00DeviceInterfacefalse336FortyGigE0/1/0/19false0Bidirectionalnone00DeviceInterfacefalse337HundredGigE0/1/0/20false0egressnone00DeviceInterfacefalse338HundredGigE0/1/0/20false0ingressnone00DeviceInterfacefalse339HundredGigE0/1/0/20false0Bidirectionalnone00DeviceInterfacefalse340FortyGigE0/1/0/20false0egressnone00DeviceInterfacefalse341FortyGigE0/1/0/20false0ingressnone00DeviceInterfacefalse342FortyGigE0/1/0/20false0Bidirectionalnone00DeviceInterfacefalse343HundredGigE0/1/0/21false0egressnone00DeviceInterfacefalse344HundredGigE0/1/0/21false0ingressnone00DeviceInterfacefalse345HundredGigE0/1/0/21false0Bidirectionalnone00DeviceInterfacefalse346FortyGigE0/1/0/21false0egressnone00DeviceInterfacefalse347FortyGigE0/1/0/21false0ingressnone00DeviceInterfacefalse348FortyGigE0/1/0/21false0Bidirectionalnone00DeviceInterfacefalse349HundredGigE0/1/0/22false0egressnone00DeviceInterfacefalse350HundredGigE0/1/0/22false0ingressnone00DeviceInterfacefalse351HundredGigE0/1/0/22false0Bidirectionalnone00DeviceInterfacefalse352FortyGigE0/1/0/22false0egressnone00DeviceInterfacefalse353FortyGigE0/1/0/22false0ingressnone00DeviceInterfacefalse354FortyGigE0/1/0/22false0Bidirectionalnone00DeviceInterfacefalse355HundredGigE0/1/0/23false0egressnone00DeviceInterfacefalse356HundredGigE0/1/0/23false0ingressnone00DeviceInterfacefalse357HundredGigE0/1/0/23false0Bidirectionalnone00DeviceInterfacefalse358FortyGigE0/1/0/23false0egressnone00DeviceInterfacefalse359FortyGigE0/1/0/23false0ingressnone00DeviceInterfacefalse360FortyGigE0/1/0/23false0Bidirectionalnone00DeviceInterfacefalse361HundredGigE0/1/0/24false0egressnone00DeviceInterfacefalse362HundredGigE0/1/0/24false0ingressnone00DeviceInterfacefalse363HundredGigE0/1/0/24false0Bidirectionalnone00DeviceInterfacefalse364FortyGigE0/1/0/24false0egressnone00DeviceInterfacefalse365FortyGigE0/1/0/24false0ingressnone00DeviceInterfacefalse366FortyGigE0/1/0/24false0Bidirectionalnone00DeviceInterfacefalse367HundredGigE0/1/0/25false0egressnone00DeviceInterfacefalse368HundredGigE0/1/0/25false0ingressnone00DeviceInterfacefalse369HundredGigE0/1/0/25false0Bidirectionalnone00DeviceInterfacefalse370FortyGigE0/1/0/25false0egressnone00DeviceInterfacefalse371FortyGigE0/1/0/25false0ingressnone00DeviceInterfacefalse372FortyGigE0/1/0/25false0Bidirectionalnone00DeviceInterfacefalse373HundredGigE0/1/0/26false0egressnone00DeviceInterfacefalse374HundredGigE0/1/0/26false0ingressnone00DeviceInterfacefalse375HundredGigE0/1/0/26false0Bidirectionalnone00DeviceInterfacefalse376FortyGigE0/1/0/26false0egressnone00DeviceInterfacefalse377FortyGigE0/1/0/26false0ingressnone00DeviceInterfacefalse378FortyGigE0/1/0/26false0Bidirectionalnone00DeviceInterfacefalse379HundredGigE0/1/0/27false0egressnone00DeviceInterfacefalse380HundredGigE0/1/0/27false0ingressnone00DeviceInterfacefalse381HundredGigE0/1/0/27false0Bidirectionalnone00DeviceInterfacefalse382FortyGigE0/1/0/27false0egressnone00DeviceInterfacefalse383FortyGigE0/1/0/27false0ingressnone00DeviceInterfacefalse384FortyGigE0/1/0/27false0Bidirectionalnone00DeviceInterfacefalse385HundredGigE0/1/0/28false0egressnone00DeviceInterfacefalse386HundredGigE0/1/0/28false0ingressnone00DeviceInterfacefalse387HundredGigE0/1/0/28false0Bidirectionalnone00DeviceInterfacefalse388FortyGigE0/1/0/28false0egressnone00DeviceInterfacefalse389FortyGigE0/1/0/28false0ingressnone00DeviceInterfacefalse390FortyGigE0/1/0/28false0Bidirectionalnone00DeviceInterfacefalse391HundredGigE0/1/0/29false0egressnone00DeviceInterfacefalse392HundredGigE0/1/0/29false0ingressnone00DeviceInterfacefalse393HundredGigE0/1/0/29false0Bidirectionalnone00DeviceInterfacefalse394FortyGigE0/1/0/29false0egressnone00DeviceInterfacefalse395FortyGigE0/1/0/29false0ingressnone00DeviceInterfacefalse396FortyGigE0/1/0/29false0Bidirectionalnone00DeviceInterfacefalse397HundredGigE0/1/0/30false0egressnone00DeviceInterfacefalse398HundredGigE0/1/0/30false0ingressnone00DeviceInterfacefalse399HundredGigE0/1/0/30false0Bidirectionalnone00DeviceInterfacefalse400FortyGigE0/1/0/30false0egressnone00DeviceInterfacefalse401FortyGigE0/1/0/30false0ingressnone00DeviceInterfacefalse402FortyGigE0/1/0/30false0Bidirectionalnone00DeviceInterfacefalse403HundredGigE0/1/0/31false0egressnone00DeviceInterfacefalse404HundredGigE0/1/0/31false0ingressnone00DeviceInterfacefalse405HundredGigE0/1/0/31false0Bidirectionalnone00DeviceInterfacefalse406FortyGigE0/1/0/31false0egressnone00DeviceInterfacefalse407FortyGigE0/1/0/31false0ingressnone00DeviceInterfacefalse408FortyGigE0/1/0/31false0Bidirectionalnone00DeviceInterfacefalse409HundredGigE0/1/0/32false0egressnone00DeviceInterfacefalse410HundredGigE0/1/0/32false0ingressnone00DeviceInterfacefalse411HundredGigE0/1/0/32false0Bidirectionalnone00DeviceInterfacefalse412FortyGigE0/1/0/32false0egressnone00DeviceInterfacefalse413FortyGigE0/1/0/32false0ingressnone00DeviceInterfacefalse414FortyGigE0/1/0/32false0Bidirectionalnone00DeviceInterfacefalse415HundredGigE0/1/0/33false0egressnone00DeviceInterfacefalse416HundredGigE0/1/0/33false0ingressnone00DeviceInterfacefalse417HundredGigE0/1/0/33false0Bidirectionalnone00DeviceInterfacefalse418FortyGigE0/1/0/33false0egressnone00DeviceInterfacefalse419FortyGigE0/1/0/33false0ingressnone00DeviceInterfacefalse420FortyGigE0/1/0/33false0Bidirectionalnone00DeviceInterfacefalse421HundredGigE0/1/0/34false0egressnone00DeviceInterfacefalse422HundredGigE0/1/0/34false0ingressnone00DeviceInterfacefalse423HundredGigE0/1/0/34false0Bidirectionalnone00DeviceInterfacefalse424FortyGigE0/1/0/34false0egressnone00DeviceInterfacefalse425FortyGigE0/1/0/34false0ingressnone00DeviceInterfacefalse426FortyGigE0/1/0/34false0Bidirectionalnone00DeviceInterfacefalse427HundredGigE0/1/0/35false0egressnone00DeviceInterfacefalse428HundredGigE0/1/0/35false0ingressnone00DeviceInterfacefalse429HundredGigE0/1/0/35false0Bidirectionalnone00DeviceInterfacefalse430FortyGigE0/1/0/35false0egressnone00DeviceInterfacefalse431FortyGigE0/1/0/35false0ingressnone00DeviceInterfacefalse432FortyGigE0/1/0/35false0Bidirectionalnone00DeviceInterfacefalse433HundredGigE0/1/0/36false0egressnone00DeviceInterfacefalse434HundredGigE0/1/0/36false0ingressnone00DeviceInterfacefalse435HundredGigE0/1/0/36false0Bidirectionalnone00DeviceInterfacefalse436FortyGigE0/1/0/36false0egressnone00DeviceInterfacefalse437FortyGigE0/1/0/36false0ingressnone00DeviceInterfacefalse438FortyGigE0/1/0/36false0Bidirectionalnone00DeviceInterfacefalse439HundredGigE0/1/0/37false0egressnone00DeviceInterfacefalse440HundredGigE0/1/0/37false0ingressnone00DeviceInterfacefalse441HundredGigE0/1/0/37false0Bidirectionalnone00DeviceInterfacefalse442FortyGigE0/1/0/37false0egressnone00DeviceInterfacefalse443FortyGigE0/1/0/37false0ingressnone00DeviceInterfacefalse444FortyGigE0/1/0/37false0Bidirectionalnone00DeviceInterfacefalse445HundredGigE0/1/0/38false0egressnone00DeviceInterfacefalse446HundredGigE0/1/0/38false0ingressnone00DeviceInterfacefalse447HundredGigE0/1/0/38false0Bidirectionalnone00DeviceInterfacefalse448FortyGigE0/1/0/38false0egressnone00DeviceInterfacefalse449FortyGigE0/1/0/38false0ingressnone00DeviceInterfacefalse450FortyGigE0/1/0/38false0Bidirectionalnone00DeviceInterfacefalse451HundredGigE0/1/0/39false0egressnone00DeviceInterfacefalse452HundredGigE0/1/0/39false0ingressnone00DeviceInterfacefalse453HundredGigE0/1/0/39false0Bidirectionalnone00DeviceInterfacefalse454FortyGigE0/1/0/39false0egressnone00DeviceInterfacefalse455FortyGigE0/1/0/39false0ingressnone00DeviceInterfacefalse456FortyGigE0/1/0/39false0Bidirectionalnone00DeviceInterfacefalse457HundredGigE0/1/0/40false0egressnone00DeviceInterfacefalse458HundredGigE0/1/0/40false0ingressnone00DeviceInterfacefalse459HundredGigE0/1/0/40false0Bidirectionalnone00DeviceInterfacefalse460FortyGigE0/1/0/40false0egressnone00DeviceInterfacefalse461FortyGigE0/1/0/40false0ingressnone00DeviceInterfacefalse462FortyGigE0/1/0/40false0Bidirectionalnone00DeviceInterfacefalse463HundredGigE0/1/0/41false0egressnone00DeviceInterfacefalse464HundredGigE0/1/0/41false0ingressnone00DeviceInterfacefalse465HundredGigE0/1/0/41false0Bidirectionalnone00DeviceInterfacefalse466FortyGigE0/1/0/41false0egressnone00DeviceInterfacefalse467FortyGigE0/1/0/41false0ingressnone00DeviceInterfacefalse468FortyGigE0/1/0/41false0Bidirectionalnone00DeviceInterfacefalse469HundredGigE0/1/0/42false0egressnone00DeviceInterfacefalse470HundredGigE0/1/0/42false0ingressnone00DeviceInterfacefalse471HundredGigE0/1/0/42false0Bidirectionalnone00DeviceInterfacefalse472FortyGigE0/1/0/42false0egressnone00DeviceInterfacefalse473FortyGigE0/1/0/42false0ingressnone00DeviceInterfacefalse474FortyGigE0/1/0/42false0Bidirectionalnone00DeviceInterfacefalse475HundredGigE0/1/0/43false0egressnone00DeviceInterfacefalse476HundredGigE0/1/0/43false0ingressnone00DeviceInterfacefalse477HundredGigE0/1/0/43false0Bidirectionalnone00DeviceInterfacefalse478FortyGigE0/1/0/43false0egressnone00DeviceInterfacefalse479FortyGigE0/1/0/43false0ingressnone00DeviceInterfacefalse480FortyGigE0/1/0/43false0Bidirectionalnone00DeviceInterfacefalse481HundredGigE0/1/0/44false0egressnone00DeviceInterfacefalse482HundredGigE0/1/0/44false0ingressnone00DeviceInterfacefalse483HundredGigE0/1/0/44false0Bidirectionalnone00DeviceInterfacefalse484FortyGigE0/1/0/44false0egressnone00DeviceInterfacefalse485FortyGigE0/1/0/44false0ingressnone00DeviceInterfacefalse486FortyGigE0/1/0/44false0Bidirectionalnone00DeviceInterfacefalse487HundredGigE0/1/0/45false0egressnone00DeviceInterfacefalse488HundredGigE0/1/0/45false0ingressnone00DeviceInterfacefalse489HundredGigE0/1/0/45false0Bidirectionalnone00DeviceInterfacefalse490FortyGigE0/1/0/45false0egressnone00DeviceInterfacefalse491FortyGigE0/1/0/45false0ingressnone00DeviceInterfacefalse492FortyGigE0/1/0/45false0Bidirectionalnone00DeviceInterfacefalse493HundredGigE0/1/0/46false0egressnone00DeviceInterfacefalse494HundredGigE0/1/0/46false0ingressnone00DeviceInterfacefalse495HundredGigE0/1/0/46false0Bidirectionalnone00DeviceInterfacefalse496FortyGigE0/1/0/46false0egressnone00DeviceInterfacefalse497FortyGigE0/1/0/46false0ingressnone00DeviceInterfacefalse498FortyGigE0/1/0/46false0Bidirectionalnone00DeviceInterfacefalse499HundredGigE0/1/0/47false0egressnone00DeviceInterfacefalse500HundredGigE0/1/0/47false0ingressnone00DeviceInterfacefalse501HundredGigE0/1/0/47false0Bidirectionalnone00DeviceInterfacefalse502FortyGigE0/1/0/47false0egressnone00DeviceInterfacefalse503FortyGigE0/1/0/47false0ingressnone00DeviceInterfacefalse504FortyGigE0/1/0/47false0Bidirectionalnone00DeviceInterfacefalse505HundredGigE0/2/0/0false0egressnone00DeviceInterfacefalse506HundredGigE0/2/0/0false0ingressnone00DeviceInterfacefalse507HundredGigE0/2/0/0false0Bidirectionalnone00DeviceInterfacefalse508FortyGigE0/2/0/0false0egressnone00DeviceInterfacefalse509FortyGigE0/2/0/0false0ingressnone00DeviceInterfacefalse510FortyGigE0/2/0/0false0Bidirectionalnone00DeviceInterfacefalse511HundredGigE0/2/0/1false0egressnone00DeviceInterfacefalse512HundredGigE0/2/0/1false0ingressnone00DeviceInterfacefalse513HundredGigE0/2/0/1false0Bidirectionalnone00DeviceInterfacefalse514FortyGigE0/2/0/1false0egressnone00DeviceInterfacefalse515FortyGigE0/2/0/1false0ingressnone00DeviceInterfacefalse516FortyGigE0/2/0/1false0Bidirectionalnone00DeviceInterfacefalse517HundredGigE0/2/0/2false0egressnone00DeviceInterfacefalse518HundredGigE0/2/0/2false0ingressnone00DeviceInterfacefalse519HundredGigE0/2/0/2false0Bidirectionalnone00DeviceInterfacefalse520FortyGigE0/2/0/2false0egressnone00DeviceInterfacefalse521FortyGigE0/2/0/2false0ingressnone00DeviceInterfacefalse522FortyGigE0/2/0/2false0Bidirectionalnone00DeviceInterfacefalse523HundredGigE0/2/0/3false0egressnone00DeviceInterfacefalse524HundredGigE0/2/0/3false0ingressnone00DeviceInterfacefalse525HundredGigE0/2/0/3false0Bidirectionalnone00DeviceInterfacefalse526FortyGigE0/2/0/3false0egressnone00DeviceInterfacefalse527FortyGigE0/2/0/3false0ingressnone00DeviceInterfacefalse528FortyGigE0/2/0/3false0Bidirectionalnone00DeviceInterfacefalse529HundredGigE0/2/0/4false0egressnone00DeviceInterfacefalse530HundredGigE0/2/0/4false0ingressnone00DeviceInterfacefalse531HundredGigE0/2/0/4false0Bidirectionalnone00DeviceInterfacefalse532FortyGigE0/2/0/4false0egressnone00DeviceInterfacefalse533FortyGigE0/2/0/4false0ingressnone00DeviceInterfacefalse534FortyGigE0/2/0/4false0Bidirectionalnone00DeviceInterfacefalse535HundredGigE0/2/0/5false0egressnone00DeviceInterfacefalse536HundredGigE0/2/0/5false0ingressnone00DeviceInterfacefalse537HundredGigE0/2/0/5false0Bidirectionalnone00DeviceInterfacefalse538FortyGigE0/2/0/5false0egressnone00DeviceInterfacefalse539FortyGigE0/2/0/5false0ingressnone00DeviceInterfacefalse540FortyGigE0/2/0/5false0Bidirectionalnone00DeviceInterfacefalse541HundredGigE0/2/0/6false0egressnone00DeviceInterfacefalse542HundredGigE0/2/0/6false0ingressnone00DeviceInterfacefalse543HundredGigE0/2/0/6false0Bidirectionalnone00DeviceInterfacefalse544FortyGigE0/2/0/6false0egressnone00DeviceInterfacefalse545FortyGigE0/2/0/6false0ingressnone00DeviceInterfacefalse546FortyGigE0/2/0/6false0Bidirectionalnone00DeviceInterfacefalse547HundredGigE0/2/0/7false0egressnone00DeviceInterfacefalse548HundredGigE0/2/0/7false0ingressnone00DeviceInterfacefalse549HundredGigE0/2/0/7false0Bidirectionalnone00DeviceInterfacefalse550FortyGigE0/2/0/7false0egressnone00DeviceInterfacefalse551FortyGigE0/2/0/7false0ingressnone00DeviceInterfacefalse552FortyGigE0/2/0/7false0Bidirectionalnone00DeviceInterfacefalse553HundredGigE0/2/0/8false0egressnone00DeviceInterfacefalse554HundredGigE0/2/0/8false0ingressnone00DeviceInterfacefalse555HundredGigE0/2/0/8false0Bidirectionalnone00DeviceInterfacefalse556FortyGigE0/2/0/8false0egressnone00DeviceInterfacefalse557FortyGigE0/2/0/8false0ingressnone00DeviceInterfacefalse558FortyGigE0/2/0/8false0Bidirectionalnone00DeviceInterfacefalse559HundredGigE0/2/0/9false0egressnone00DeviceInterfacefalse560HundredGigE0/2/0/9false0ingressnone00DeviceInterfacefalse561HundredGigE0/2/0/9false0Bidirectionalnone00DeviceInterfacefalse562FortyGigE0/2/0/9false0egressnone00DeviceInterfacefalse563FortyGigE0/2/0/9false0ingressnone00DeviceInterfacefalse564FortyGigE0/2/0/9false0Bidirectionalnone00DeviceInterfacefalse565HundredGigE0/2/0/10false0egressnone00DeviceInterfacefalse566HundredGigE0/2/0/10false0ingressnone00DeviceInterfacefalse567HundredGigE0/2/0/10false0Bidirectionalnone00DeviceInterfacefalse568FortyGigE0/2/0/10false0egressnone00DeviceInterfacefalse569FortyGigE0/2/0/10false0ingressnone00DeviceInterfacefalse570FortyGigE0/2/0/10false0Bidirectionalnone00DeviceInterfacefalse571HundredGigE0/2/0/11false0egressnone00DeviceInterfacefalse572HundredGigE0/2/0/11false0ingressnone00DeviceInterfacefalse573HundredGigE0/2/0/11false0Bidirectionalnone00DeviceInterfacefalse574FortyGigE0/2/0/11false0egressnone00DeviceInterfacefalse575FortyGigE0/2/0/11false0ingressnone00DeviceInterfacefalse576FortyGigE0/2/0/11false0Bidirectionalnone00DeviceInterfacefalse577HundredGigE0/2/0/12false0egressnone00DeviceInterfacefalse578HundredGigE0/2/0/12false0ingressnone00DeviceInterfacefalse579HundredGigE0/2/0/12false0Bidirectionalnone00DeviceInterfacefalse580FortyGigE0/2/0/12false0egressnone00DeviceInterfacefalse581FortyGigE0/2/0/12false0ingressnone00DeviceInterfacefalse582FortyGigE0/2/0/12false0Bidirectionalnone00DeviceInterfacefalse583HundredGigE0/2/0/13false0egressnone00DeviceInterfacefalse584HundredGigE0/2/0/13false0ingressnone00DeviceInterfacefalse585HundredGigE0/2/0/13false0Bidirectionalnone00DeviceInterfacefalse586FortyGigE0/2/0/13false0egressnone00DeviceInterfacefalse587FortyGigE0/2/0/13false0ingressnone00DeviceInterfacefalse588FortyGigE0/2/0/13false0Bidirectionalnone00DeviceInterfacefalse589HundredGigE0/2/0/14false0egressnone00DeviceInterfacefalse590HundredGigE0/2/0/14false0ingressnone00DeviceInterfacefalse591HundredGigE0/2/0/14false0Bidirectionalnone00DeviceInterfacefalse592FortyGigE0/2/0/14false0egressnone00DeviceInterfacefalse593FortyGigE0/2/0/14false0ingressnone00DeviceInterfacefalse594FortyGigE0/2/0/14false0Bidirectionalnone00DeviceInterfacefalse595HundredGigE0/2/0/15false0egressnone00DeviceInterfacefalse596HundredGigE0/2/0/15false0ingressnone00DeviceInterfacefalse597HundredGigE0/2/0/15false0Bidirectionalnone00DeviceInterfacefalse598FortyGigE0/2/0/15false0egressnone00DeviceInterfacefalse599FortyGigE0/2/0/15false0ingressnone00DeviceInterfacefalse600FortyGigE0/2/0/15false0Bidirectionalnone00DeviceInterfacefalse601HundredGigE0/2/0/16false0egressnone00DeviceInterfacefalse602HundredGigE0/2/0/16false0ingressnone00DeviceInterfacefalse603HundredGigE0/2/0/16false0Bidirectionalnone00DeviceInterfacefalse604FortyGigE0/2/0/16false0egressnone00DeviceInterfacefalse605FortyGigE0/2/0/16false0ingressnone00DeviceInterfacefalse606FortyGigE0/2/0/16false0Bidirectionalnone00DeviceInterfacefalse607HundredGigE0/2/0/17false0egressnone00DeviceInterfacefalse608HundredGigE0/2/0/17false0ingressnone00DeviceInterfacefalse609HundredGigE0/2/0/17false0Bidirectionalnone00DeviceInterfacefalse610FortyGigE0/2/0/17false0egressnone00DeviceInterfacefalse611FortyGigE0/2/0/17false0ingressnone00DeviceInterfacefalse612FortyGigE0/2/0/17false0Bidirectionalnone00DeviceInterfacefalse613HundredGigE0/2/0/18false0egressnone00DeviceInterfacefalse614HundredGigE0/2/0/18false0ingressnone00DeviceInterfacefalse615HundredGigE0/2/0/18false0Bidirectionalnone00DeviceInterfacefalse616FortyGigE0/2/0/18false0egressnone00DeviceInterfacefalse617FortyGigE0/2/0/18false0ingressnone00DeviceInterfacefalse618FortyGigE0/2/0/18false0Bidirectionalnone00DeviceInterfacefalse619HundredGigE0/2/0/19false0egressnone00DeviceInterfacefalse620HundredGigE0/2/0/19false0ingressnone00DeviceInterfacefalse621HundredGigE0/2/0/19false0Bidirectionalnone00DeviceInterfacefalse622FortyGigE0/2/0/19false0egressnone00DeviceInterfacefalse623FortyGigE0/2/0/19false0ingressnone00DeviceInterfacefalse624FortyGigE0/2/0/19false0Bidirectionalnone00DeviceInterfacefalse625HundredGigE0/2/0/20false0egressnone00DeviceInterfacefalse626HundredGigE0/2/0/20false0ingressnone00DeviceInterfacefalse627HundredGigE0/2/0/20false0Bidirectionalnone00DeviceInterfacefalse628FortyGigE0/2/0/20false0egressnone00DeviceInterfacefalse629FortyGigE0/2/0/20false0ingressnone00DeviceInterfacefalse630FortyGigE0/2/0/20false0Bidirectionalnone00DeviceInterfacefalse631HundredGigE0/2/0/21false0egressnone00DeviceInterfacefalse632HundredGigE0/2/0/21false0ingressnone00DeviceInterfacefalse633HundredGigE0/2/0/21false0Bidirectionalnone00DeviceInterfacefalse634FortyGigE0/2/0/21false0egressnone00DeviceInterfacefalse635FortyGigE0/2/0/21false0ingressnone00DeviceInterfacefalse636FortyGigE0/2/0/21false0Bidirectionalnone00DeviceInterfacefalse637HundredGigE0/2/0/22false0egressnone00DeviceInterfacefalse638HundredGigE0/2/0/22false0ingressnone00DeviceInterfacefalse639HundredGigE0/2/0/22false0Bidirectionalnone00DeviceInterfacefalse640FortyGigE0/2/0/22false0egressnone00DeviceInterfacefalse641FortyGigE0/2/0/22false0ingressnone00DeviceInterfacefalse642FortyGigE0/2/0/22false0Bidirectionalnone00DeviceInterfacefalse643HundredGigE0/2/0/23false0egressnone00DeviceInterfacefalse644HundredGigE0/2/0/23false0ingressnone00DeviceInterfacefalse645HundredGigE0/2/0/23false0Bidirectionalnone00DeviceInterfacefalse646FortyGigE0/2/0/23false0egressnone00DeviceInterfacefalse647FortyGigE0/2/0/23false0ingressnone00DeviceInterfacefalse648FortyGigE0/2/0/23false0Bidirectionalnone00DeviceInterfacefalse649HundredGigE0/2/0/24false0egressnone00DeviceInterfacefalse650HundredGigE0/2/0/24false0ingressnone00DeviceInterfacefalse651HundredGigE0/2/0/24false0Bidirectionalnone00DeviceInterfacefalse652FortyGigE0/2/0/24false0egressnone00DeviceInterfacefalse653FortyGigE0/2/0/24false0ingressnone00DeviceInterfacefalse654FortyGigE0/2/0/24false0Bidirectionalnone00DeviceInterfacefalse655HundredGigE0/2/0/25false0egressnone00DeviceInterfacefalse656HundredGigE0/2/0/25false0ingressnone00DeviceInterfacefalse657HundredGigE0/2/0/25false0Bidirectionalnone00DeviceInterfacefalse658FortyGigE0/2/0/25false0egressnone00DeviceInterfacefalse659FortyGigE0/2/0/25false0ingressnone00DeviceInterfacefalse660FortyGigE0/2/0/25false0Bidirectionalnone00DeviceInterfacefalse661HundredGigE0/2/0/26false0egressnone00DeviceInterfacefalse662HundredGigE0/2/0/26false0ingressnone00DeviceInterfacefalse663HundredGigE0/2/0/26false0Bidirectionalnone00DeviceInterfacefalse664FortyGigE0/2/0/26false0egressnone00DeviceInterfacefalse665FortyGigE0/2/0/26false0ingressnone00DeviceInterfacefalse666FortyGigE0/2/0/26false0Bidirectionalnone00DeviceInterfacefalse667HundredGigE0/2/0/27false0egressnone00DeviceInterfacefalse668HundredGigE0/2/0/27false0ingressnone00DeviceInterfacefalse669HundredGigE0/2/0/27false0Bidirectionalnone00DeviceInterfacefalse670FortyGigE0/2/0/27false0egressnone00DeviceInterfacefalse671FortyGigE0/2/0/27false0ingressnone00DeviceInterfacefalse672FortyGigE0/2/0/27false0Bidirectionalnone00DeviceInterfacefalse673HundredGigE0/2/0/28false0egressnone00DeviceInterfacefalse674HundredGigE0/2/0/28false0ingressnone00DeviceInterfacefalse675HundredGigE0/2/0/28false0Bidirectionalnone00DeviceInterfacefalse676FortyGigE0/2/0/28false0egressnone00DeviceInterfacefalse677FortyGigE0/2/0/28false0ingressnone00DeviceInterfacefalse678FortyGigE0/2/0/28false0Bidirectionalnone00DeviceInterfacefalse679HundredGigE0/2/0/29false0egressnone00DeviceInterfacefalse680HundredGigE0/2/0/29false0ingressnone00DeviceInterfacefalse681HundredGigE0/2/0/29false0Bidirectionalnone00DeviceInterfacefalse682FortyGigE0/2/0/29false0egressnone00DeviceInterfacefalse683FortyGigE0/2/0/29false0ingressnone00DeviceInterfacefalse684FortyGigE0/2/0/29false0Bidirectionalnone00DeviceInterfacefalse685HundredGigE0/2/0/30false0egressnone00DeviceInterfacefalse686HundredGigE0/2/0/30false0ingressnone00DeviceInterfacefalse687HundredGigE0/2/0/30false0Bidirectionalnone00DeviceInterfacefalse688FortyGigE0/2/0/30false0egressnone00DeviceInterfacefalse689FortyGigE0/2/0/30false0ingressnone00DeviceInterfacefalse690FortyGigE0/2/0/30false0Bidirectionalnone00DeviceInterfacefalse691HundredGigE0/2/0/31false0egressnone00DeviceInterfacefalse692HundredGigE0/2/0/31false0ingressnone00DeviceInterfacefalse693HundredGigE0/2/0/31false0Bidirectionalnone00DeviceInterfacefalse694FortyGigE0/2/0/31false0egressnone00DeviceInterfacefalse695FortyGigE0/2/0/31false0ingressnone00DeviceInterfacefalse696FortyGigE0/2/0/31false0Bidirectionalnone00DeviceInterfacefalse697HundredGigE0/2/0/32false0egressnone00DeviceInterfacefalse698HundredGigE0/2/0/32false0ingressnone00DeviceInterfacefalse699HundredGigE0/2/0/32false0Bidirectionalnone00DeviceInterfacefalse700FortyGigE0/2/0/32false0egressnone00DeviceInterfacefalse701FortyGigE0/2/0/32false0ingressnone00DeviceInterfacefalse702FortyGigE0/2/0/32false0Bidirectionalnone00DeviceInterfacefalse703HundredGigE0/2/0/33false0egressnone00DeviceInterfacefalse704HundredGigE0/2/0/33false0ingressnone00DeviceInterfacefalse705HundredGigE0/2/0/33false0Bidirectionalnone00DeviceInterfacefalse706FortyGigE0/2/0/33false0egressnone00DeviceInterfacefalse707FortyGigE0/2/0/33false0ingressnone00DeviceInterfacefalse708FortyGigE0/2/0/33false0Bidirectionalnone00DeviceInterfacefalse709HundredGigE0/2/0/34false0egressnone00DeviceInterfacefalse710HundredGigE0/2/0/34false0ingressnone00DeviceInterfacefalse711HundredGigE0/2/0/34false0Bidirectionalnone00DeviceInterfacefalse712FortyGigE0/2/0/34false0egressnone00DeviceInterfacefalse713FortyGigE0/2/0/34false0ingressnone00DeviceInterfacefalse714FortyGigE0/2/0/34false0Bidirectionalnone00DeviceInterfacefalse715HundredGigE0/2/0/35false0egressnone00DeviceInterfacefalse716HundredGigE0/2/0/35false0ingressnone00DeviceInterfacefalse717HundredGigE0/2/0/35false0Bidirectionalnone00DeviceInterfacefalse718FortyGigE0/2/0/35false0egressnone00DeviceInterfacefalse719FortyGigE0/2/0/35false0ingressnone00DeviceInterfacefalse720FortyGigE0/2/0/35false0Bidirectionalnone00DeviceInterfacefalse721HundredGigE0/2/0/36false0egressnone00DeviceInterfacefalse722HundredGigE0/2/0/36false0ingressnone00DeviceInterfacefalse723HundredGigE0/2/0/36false0Bidirectionalnone00DeviceInterfacefalse724FortyGigE0/2/0/36false0egressnone00DeviceInterfacefalse725FortyGigE0/2/0/36false0ingressnone00DeviceInterfacefalse726FortyGigE0/2/0/36false0Bidirectionalnone00DeviceInterfacefalse727HundredGigE0/2/0/37false0egressnone00DeviceInterfacefalse728HundredGigE0/2/0/37false0ingressnone00DeviceInterfacefalse729HundredGigE0/2/0/37false0Bidirectionalnone00DeviceInterfacefalse730FortyGigE0/2/0/37false0egressnone00DeviceInterfacefalse731FortyGigE0/2/0/37false0ingressnone00DeviceInterfacefalse732FortyGigE0/2/0/37false0Bidirectionalnone00DeviceInterfacefalse733HundredGigE0/2/0/38false0egressnone00DeviceInterfacefalse734HundredGigE0/2/0/38false0ingressnone00DeviceInterfacefalse735HundredGigE0/2/0/38false0Bidirectionalnone00DeviceInterfacefalse736FortyGigE0/2/0/38false0egressnone00DeviceInterfacefalse737FortyGigE0/2/0/38false0ingressnone00DeviceInterfacefalse738FortyGigE0/2/0/38false0Bidirectionalnone00DeviceInterfacefalse739HundredGigE0/2/0/39false0egressnone00DeviceInterfacefalse740HundredGigE0/2/0/39false0ingressnone00DeviceInterfacefalse741HundredGigE0/2/0/39false0Bidirectionalnone00DeviceInterfacefalse742FortyGigE0/2/0/39false0egressnone00DeviceInterfacefalse743FortyGigE0/2/0/39false0ingressnone00DeviceInterfacefalse744FortyGigE0/2/0/39false0Bidirectionalnone00DeviceInterfacefalse745HundredGigE0/2/0/40false0egressnone00DeviceInterfacefalse746HundredGigE0/2/0/40false0ingressnone00DeviceInterfacefalse747HundredGigE0/2/0/40false0Bidirectionalnone00DeviceInterfacefalse748FortyGigE0/2/0/40false0egressnone00DeviceInterfacefalse749FortyGigE0/2/0/40false0ingressnone00DeviceInterfacefalse750FortyGigE0/2/0/40false0Bidirectionalnone00DeviceInterfacefalse751HundredGigE0/2/0/41false0egressnone00DeviceInterfacefalse752HundredGigE0/2/0/41false0ingressnone00DeviceInterfacefalse753HundredGigE0/2/0/41false0Bidirectionalnone00DeviceInterfacefalse754FortyGigE0/2/0/41false0egressnone00DeviceInterfacefalse755FortyGigE0/2/0/41false0ingressnone00DeviceInterfacefalse756FortyGigE0/2/0/41false0Bidirectionalnone00DeviceInterfacefalse757HundredGigE0/2/0/42false0egressnone00DeviceInterfacefalse758HundredGigE0/2/0/42false0ingressnone00DeviceInterfacefalse759HundredGigE0/2/0/42false0Bidirectionalnone00DeviceInterfacefalse760FortyGigE0/2/0/42false0egressnone00DeviceInterfacefalse761FortyGigE0/2/0/42false0ingressnone00DeviceInterfacefalse762FortyGigE0/2/0/42false0Bidirectionalnone00DeviceInterfacefalse763HundredGigE0/2/0/43false0egressnone00DeviceInterfacefalse764HundredGigE0/2/0/43false0ingressnone00DeviceInterfacefalse765HundredGigE0/2/0/43false0Bidirectionalnone00DeviceInterfacefalse766FortyGigE0/2/0/43false0egressnone00DeviceInterfacefalse767FortyGigE0/2/0/43false0ingressnone00DeviceInterfacefalse768FortyGigE0/2/0/43false0Bidirectionalnone00DeviceInterfacefalse769HundredGigE0/2/0/44false0egressnone00DeviceInterfacefalse770HundredGigE0/2/0/44false0ingressnone00DeviceInterfacefalse771HundredGigE0/2/0/44false0Bidirectionalnone00DeviceInterfacefalse772FortyGigE0/2/0/44false0egressnone00DeviceInterfacefalse773FortyGigE0/2/0/44false0ingressnone00DeviceInterfacefalse774FortyGigE0/2/0/44false0Bidirectionalnone00DeviceInterfacefalse775HundredGigE0/2/0/45false0egressnone00DeviceInterfacefalse776HundredGigE0/2/0/45false0ingressnone00DeviceInterfacefalse777HundredGigE0/2/0/45false0Bidirectionalnone00DeviceInterfacefalse778FortyGigE0/2/0/45false0egressnone00DeviceInterfacefalse779FortyGigE0/2/0/45false0ingressnone00DeviceInterfacefalse780FortyGigE0/2/0/45false0Bidirectionalnone00DeviceInterfacefalse781HundredGigE0/2/0/46false0egressnone00DeviceInterfacefalse782HundredGigE0/2/0/46false0ingressnone00DeviceInterfacefalse783HundredGigE0/2/0/46false0Bidirectionalnone00DeviceInterfacefalse784FortyGigE0/2/0/46false0egressnone00DeviceInterfacefalse785FortyGigE0/2/0/46false0ingressnone00DeviceInterfacefalse786FortyGigE0/2/0/46false0Bidirectionalnone00DeviceInterfacefalse787HundredGigE0/2/0/47false0egressnone00DeviceInterfacefalse788HundredGigE0/2/0/47false0ingressnone00DeviceInterfacefalse789HundredGigE0/2/0/47false0Bidirectionalnone00DeviceInterfacefalse790FortyGigE0/2/0/47false0egressnone00DeviceInterfacefalse791FortyGigE0/2/0/47false0ingressnone00DeviceInterfacefalse792FortyGigE0/2/0/47false0Bidirectionalnone00DeviceInterfacefalse793HundredGigE0/3/0/0false0egressnone00DeviceInterfacefalse794HundredGigE0/3/0/0false0ingressnone00DeviceInterfacefalse795HundredGigE0/3/0/0false0Bidirectionalnone00DeviceInterfacefalse796FortyGigE0/3/0/0false0egressnone00DeviceInterfacefalse797FortyGigE0/3/0/0false0ingressnone00DeviceInterfacefalse798FortyGigE0/3/0/0false0Bidirectionalnone00DeviceInterfacefalse799FourHundredGigE0/3/0/0false0egressnone00DeviceInterfacefalse800FourHundredGigE0/3/0/0false0ingressnone00DeviceInterfacefalse801FourHundredGigE0/3/0/0false0Bidirectionalnone00DeviceInterfacefalse802HundredGigE0/3/0/1false0egressnone00DeviceInterfacefalse803HundredGigE0/3/0/1false0ingressnone00DeviceInterfacefalse804HundredGigE0/3/0/1false0Bidirectionalnone00DeviceInterfacefalse805FortyGigE0/3/0/1false0egressnone00DeviceInterfacefalse806FortyGigE0/3/0/1false0ingressnone00DeviceInterfacefalse807FortyGigE0/3/0/1false0Bidirectionalnone00DeviceInterfacefalse808FourHundredGigE0/3/0/1false0egressnone00DeviceInterfacefalse809FourHundredGigE0/3/0/1false0ingressnone00DeviceInterfacefalse810FourHundredGigE0/3/0/1false0Bidirectionalnone00DeviceInterfacefalse811HundredGigE0/3/0/2false0egressnone00DeviceInterfacefalse812HundredGigE0/3/0/2false0ingressnone00DeviceInterfacefalse813HundredGigE0/3/0/2false0Bidirectionalnone00DeviceInterfacefalse814FortyGigE0/3/0/2false0egressnone00DeviceInterfacefalse815FortyGigE0/3/0/2false0ingressnone00DeviceInterfacefalse816FortyGigE0/3/0/2false0Bidirectionalnone00DeviceInterfacefalse817FourHundredGigE0/3/0/2false0egressnone00DeviceInterfacefalse818FourHundredGigE0/3/0/2false0ingressnone00DeviceInterfacefalse819FourHundredGigE0/3/0/2false0Bidirectionalnone00DeviceInterfacefalse820HundredGigE0/3/0/3false0egressnone00DeviceInterfacefalse821HundredGigE0/3/0/3false0ingressnone00DeviceInterfacefalse822HundredGigE0/3/0/3false0Bidirectionalnone00DeviceInterfacefalse823FortyGigE0/3/0/3false0egressnone00DeviceInterfacefalse824FortyGigE0/3/0/3false0ingressnone00DeviceInterfacefalse825FortyGigE0/3/0/3false0Bidirectionalnone00DeviceInterfacefalse826FourHundredGigE0/3/0/3false0egressnone00DeviceInterfacefalse827FourHundredGigE0/3/0/3false0ingressnone00DeviceInterfacefalse828FourHundredGigE0/3/0/3false0Bidirectionalnone00DeviceInterfacefalse829HundredGigE0/3/0/4false0egressnone00DeviceInterfacefalse830HundredGigE0/3/0/4false0ingressnone00DeviceInterfacefalse831HundredGigE0/3/0/4false0Bidirectionalnone00DeviceInterfacefalse832FortyGigE0/3/0/4false0egressnone00DeviceInterfacefalse833FortyGigE0/3/0/4false0ingressnone00DeviceInterfacefalse834FortyGigE0/3/0/4false0Bidirectionalnone00DeviceInterfacefalse835FourHundredGigE0/3/0/4false0egressnone00DeviceInterfacefalse836FourHundredGigE0/3/0/4false0ingressnone00DeviceInterfacefalse837FourHundredGigE0/3/0/4false0Bidirectionalnone00DeviceInterfacefalse838HundredGigE0/3/0/5false0egressnone00DeviceInterfacefalse839HundredGigE0/3/0/5false0ingressnone00DeviceInterfacefalse840HundredGigE0/3/0/5false0Bidirectionalnone00DeviceInterfacefalse841FortyGigE0/3/0/5false0egressnone00DeviceInterfacefalse842FortyGigE0/3/0/5false0ingressnone00DeviceInterfacefalse843FortyGigE0/3/0/5false0Bidirectionalnone00DeviceInterfacefalse844FourHundredGigE0/3/0/5false0egressnone00DeviceInterfacefalse845FourHundredGigE0/3/0/5false0ingressnone00DeviceInterfacefalse846FourHundredGigE0/3/0/5false0Bidirectionalnone00DeviceInterfacefalse847HundredGigE0/3/0/6false0egressnone00DeviceInterfacefalse848HundredGigE0/3/0/6false0ingressnone00DeviceInterfacefalse849HundredGigE0/3/0/6false0Bidirectionalnone00DeviceInterfacefalse850FortyGigE0/3/0/6false0egressnone00DeviceInterfacefalse851FortyGigE0/3/0/6false0ingressnone00DeviceInterfacefalse852FortyGigE0/3/0/6false0Bidirectionalnone00DeviceInterfacefalse853FourHundredGigE0/3/0/6false0egressnone00DeviceInterfacefalse854FourHundredGigE0/3/0/6false0ingressnone00DeviceInterfacefalse855FourHundredGigE0/3/0/6false0Bidirectionalnone00DeviceInterfacefalse856HundredGigE0/3/0/7false0egressnone00DeviceInterfacefalse857HundredGigE0/3/0/7false0ingressnone00DeviceInterfacefalse858HundredGigE0/3/0/7false0Bidirectionalnone00DeviceInterfacefalse859FortyGigE0/3/0/7false0egressnone00DeviceInterfacefalse860FortyGigE0/3/0/7false0ingressnone00DeviceInterfacefalse861FortyGigE0/3/0/7false0Bidirectionalnone00DeviceInterfacefalse862FourHundredGigE0/3/0/7false0egressnone00DeviceInterfacefalse863FourHundredGigE0/3/0/7false0ingressnone00DeviceInterfacefalse864FourHundredGigE0/3/0/7false0Bidirectionalnone00DeviceInterfacefalse865HundredGigE0/3/0/8false0egressnone00DeviceInterfacefalse866HundredGigE0/3/0/8false0ingressnone00DeviceInterfacefalse867HundredGigE0/3/0/8false0Bidirectionalnone00DeviceInterfacefalse868FortyGigE0/3/0/8false0egressnone00DeviceInterfacefalse869FortyGigE0/3/0/8false0ingressnone00DeviceInterfacefalse870FortyGigE0/3/0/8false0Bidirectionalnone00DeviceInterfacefalse871FourHundredGigE0/3/0/8false0egressnone00DeviceInterfacefalse872FourHundredGigE0/3/0/8false0ingressnone00DeviceInterfacefalse873FourHundredGigE0/3/0/8false0Bidirectionalnone00DeviceInterfacefalse874HundredGigE0/3/0/9false0egressnone00DeviceInterfacefalse875HundredGigE0/3/0/9false0ingressnone00DeviceInterfacefalse876HundredGigE0/3/0/9false0Bidirectionalnone00DeviceInterfacefalse877FortyGigE0/3/0/9false0egressnone00DeviceInterfacefalse878FortyGigE0/3/0/9false0ingressnone00DeviceInterfacefalse879FortyGigE0/3/0/9false0Bidirectionalnone00DeviceInterfacefalse880FourHundredGigE0/3/0/9false0egressnone00DeviceInterfacefalse881FourHundredGigE0/3/0/9false0ingressnone00DeviceInterfacefalse882FourHundredGigE0/3/0/9false0Bidirectionalnone00DeviceInterfacefalse883HundredGigE0/3/0/10false0egressnone00DeviceInterfacefalse884HundredGigE0/3/0/10false0ingressnone00DeviceInterfacefalse885HundredGigE0/3/0/10false0Bidirectionalnone00DeviceInterfacefalse886FortyGigE0/3/0/10false0egressnone00DeviceInterfacefalse887FortyGigE0/3/0/10false0ingressnone00DeviceInterfacefalse888FortyGigE0/3/0/10false0Bidirectionalnone00DeviceInterfacefalse889FourHundredGigE0/3/0/10false0egressnone00DeviceInterfacefalse890FourHundredGigE0/3/0/10false0ingressnone00DeviceInterfacefalse891FourHundredGigE0/3/0/10false0Bidirectionalnone00DeviceInterfacefalse892HundredGigE0/3/0/11false0egressnone00DeviceInterfacefalse893HundredGigE0/3/0/11false0ingressnone00DeviceInterfacefalse894HundredGigE0/3/0/11false0Bidirectionalnone00DeviceInterfacefalse895FortyGigE0/3/0/11false0egressnone00DeviceInterfacefalse896FortyGigE0/3/0/11false0ingressnone00DeviceInterfacefalse897FortyGigE0/3/0/11false0Bidirectionalnone00DeviceInterfacefalse898FourHundredGigE0/3/0/11false0egressnone00DeviceInterfacefalse899FourHundredGigE0/3/0/11false0ingressnone00DeviceInterfacefalse900FourHundredGigE0/3/0/11false0Bidirectionalnone00DeviceInterfacefalse901HundredGigE0/3/0/12false0egressnone00DeviceInterfacefalse902HundredGigE0/3/0/12false0ingressnone00DeviceInterfacefalse903HundredGigE0/3/0/12false0Bidirectionalnone00DeviceInterfacefalse904FortyGigE0/3/0/12false0egressnone00DeviceInterfacefalse905FortyGigE0/3/0/12false0ingressnone00DeviceInterfacefalse906FortyGigE0/3/0/12false0Bidirectionalnone00DeviceInterfacefalse907FourHundredGigE0/3/0/12false0egressnone00DeviceInterfacefalse908FourHundredGigE0/3/0/12false0ingressnone00DeviceInterfacefalse909FourHundredGigE0/3/0/12false0Bidirectionalnone00DeviceInterfacefalse910HundredGigE0/3/0/13false0egressnone00DeviceInterfacefalse911HundredGigE0/3/0/13false0ingressnone00DeviceInterfacefalse912HundredGigE0/3/0/13false0Bidirectionalnone00DeviceInterfacefalse913FortyGigE0/3/0/13false0egressnone00DeviceInterfacefalse914FortyGigE0/3/0/13false0ingressnone00DeviceInterfacefalse915FortyGigE0/3/0/13false0Bidirectionalnone00DeviceInterfacefalse916FourHundredGigE0/3/0/13false0egressnone00DeviceInterfacefalse917FourHundredGigE0/3/0/13false0ingressnone00DeviceInterfacefalse918FourHundredGigE0/3/0/13false0Bidirectionalnone00DeviceInterfacefalse919HundredGigE0/3/0/14false0egressnone00DeviceInterfacefalse920HundredGigE0/3/0/14false0ingressnone00DeviceInterfacefalse921HundredGigE0/3/0/14false0Bidirectionalnone00DeviceInterfacefalse922FortyGigE0/3/0/14false0egressnone00DeviceInterfacefalse923FortyGigE0/3/0/14false0ingressnone00DeviceInterfacefalse924FortyGigE0/3/0/14false0Bidirectionalnone00DeviceInterfacefalse925FourHundredGigE0/3/0/14false0egressnone00DeviceInterfacefalse926FourHundredGigE0/3/0/14false0ingressnone00DeviceInterfacefalse927FourHundredGigE0/3/0/14false0Bidirectionalnone00DeviceInterfacefalse928HundredGigE0/3/0/15false0egressnone00DeviceInterfacefalse929HundredGigE0/3/0/15false0ingressnone00DeviceInterfacefalse930HundredGigE0/3/0/15false0Bidirectionalnone00DeviceInterfacefalse931FortyGigE0/3/0/15false0egressnone00DeviceInterfacefalse932FortyGigE0/3/0/15false0ingressnone00DeviceInterfacefalse933FortyGigE0/3/0/15false0Bidirectionalnone00DeviceInterfacefalse934FourHundredGigE0/3/0/15false0egressnone00DeviceInterfacefalse935FourHundredGigE0/3/0/15false0ingressnone00DeviceInterfacefalse936FourHundredGigE0/3/0/15false0Bidirectionalnone00DeviceInterfacefalse937HundredGigE0/3/0/16false0egressnone00DeviceInterfacefalse938HundredGigE0/3/0/16false0ingressnone00DeviceInterfacefalse939HundredGigE0/3/0/16false0Bidirectionalnone00DeviceInterfacefalse940FortyGigE0/3/0/16false0egressnone00DeviceInterfacefalse941FortyGigE0/3/0/16false0ingressnone00DeviceInterfacefalse942FortyGigE0/3/0/16false0Bidirectionalnone00DeviceInterfacefalse943FourHundredGigE0/3/0/16false0egressnone00DeviceInterfacefalse944FourHundredGigE0/3/0/16false0ingressnone00DeviceInterfacefalse945FourHundredGigE0/3/0/16false0Bidirectionalnone00DeviceInterfacefalse946HundredGigE0/3/0/17false0egressnone00DeviceInterfacefalse947HundredGigE0/3/0/17false0ingressnone00DeviceInterfacefalse948HundredGigE0/3/0/17false0Bidirectionalnone00DeviceInterfacefalse949FortyGigE0/3/0/17false0egressnone00DeviceInterfacefalse950FortyGigE0/3/0/17false0ingressnone00DeviceInterfacefalse951FortyGigE0/3/0/17false0Bidirectionalnone00DeviceInterfacefalse952FourHundredGigE0/3/0/17false0egressnone00DeviceInterfacefalse953FourHundredGigE0/3/0/17false0ingressnone00DeviceInterfacefalse954FourHundredGigE0/3/0/17false0Bidirectionalnone00DeviceInterfacefalse955HundredGigE0/3/0/18false0egressnone00DeviceInterfacefalse956HundredGigE0/3/0/18false0ingressnone00DeviceInterfacefalse957HundredGigE0/3/0/18false0Bidirectionalnone00DeviceInterfacefalse958FortyGigE0/3/0/18false0egressnone00DeviceInterfacefalse959FortyGigE0/3/0/18false0ingressnone00DeviceInterfacefalse960FortyGigE0/3/0/18false0Bidirectionalnone00DeviceInterfacefalse961FourHundredGigE0/3/0/18false0egressnone00DeviceInterfacefalse962FourHundredGigE0/3/0/18false0ingressnone00DeviceInterfacefalse963FourHundredGigE0/3/0/18false0Bidirectionalnone00DeviceInterfacefalse964HundredGigE0/3/0/19false0egressnone00DeviceInterfacefalse965HundredGigE0/3/0/19false0ingressnone00DeviceInterfacefalse966HundredGigE0/3/0/19false0Bidirectionalnone00DeviceInterfacefalse967FortyGigE0/3/0/19false0egressnone00DeviceInterfacefalse968FortyGigE0/3/0/19false0ingressnone00DeviceInterfacefalse969FortyGigE0/3/0/19false0Bidirectionalnone00DeviceInterfacefalse970FourHundredGigE0/3/0/19false0egressnone00DeviceInterfacefalse971FourHundredGigE0/3/0/19false0ingressnone00DeviceInterfacefalse972FourHundredGigE0/3/0/19false0Bidirectionalnone00DeviceInterfacefalse973HundredGigE0/3/0/20false0egressnone00DeviceInterfacefalse974HundredGigE0/3/0/20false0ingressnone00DeviceInterfacefalse975HundredGigE0/3/0/20false0Bidirectionalnone00DeviceInterfacefalse976FortyGigE0/3/0/20false0egressnone00DeviceInterfacefalse977FortyGigE0/3/0/20false0ingressnone00DeviceInterfacefalse978FortyGigE0/3/0/20false0Bidirectionalnone00DeviceInterfacefalse979FourHundredGigE0/3/0/20false0egressnone00DeviceInterfacefalse980FourHundredGigE0/3/0/20false0ingressnone00DeviceInterfacefalse981FourHundredGigE0/3/0/20false0Bidirectionalnone00DeviceInterfacefalse982HundredGigE0/3/0/21false0egressnone00DeviceInterfacefalse983HundredGigE0/3/0/21false0ingressnone00DeviceInterfacefalse984HundredGigE0/3/0/21false0Bidirectionalnone00DeviceInterfacefalse985FortyGigE0/3/0/21false0egressnone00DeviceInterfacefalse986FortyGigE0/3/0/21false0ingressnone00DeviceInterfacefalse987FortyGigE0/3/0/21false0Bidirectionalnone00DeviceInterfacefalse988FourHundredGigE0/3/0/21false0egressnone00DeviceInterfacefalse989FourHundredGigE0/3/0/21false0ingressnone00DeviceInterfacefalse990FourHundredGigE0/3/0/21false0Bidirectionalnone00DeviceInterfacefalse991HundredGigE0/3/0/22false0egressnone00DeviceInterfacefalse992HundredGigE0/3/0/22false0ingressnone00DeviceInterfacefalse993HundredGigE0/3/0/22false0Bidirectionalnone00DeviceInterfacefalse994FortyGigE0/3/0/22false0egressnone00DeviceInterfacefalse995FortyGigE0/3/0/22false0ingressnone00DeviceInterfacefalse996FortyGigE0/3/0/22false0Bidirectionalnone00DeviceInterfacefalse997FourHundredGigE0/3/0/22false0egressnone00DeviceInterfacefalse998FourHundredGigE0/3/0/22false0ingressnone00DeviceInterfacefalse999FourHundredGigE0/3/0/22false0Bidirectionalnone00DeviceInterfacefalse1000HundredGigE0/3/0/23false0egressnone00DeviceInterfacefalse1001HundredGigE0/3/0/23false0ingressnone00DeviceInterfacefalse1002HundredGigE0/3/0/23false0Bidirectionalnone00DeviceInterfacefalse1003FortyGigE0/3/0/23false0egressnone00DeviceInterfacefalse1004FortyGigE0/3/0/23false0ingressnone00DeviceInterfacefalse1005FortyGigE0/3/0/23false0Bidirectionalnone00DeviceInterfacefalse1006FourHundredGigE0/3/0/23false0egressnone00DeviceInterfacefalse1007FourHundredGigE0/3/0/23false0ingressnone00DeviceInterfacefalse1008FourHundredGigE0/3/0/23false0Bidirectionalnone00DeviceInterfacefalse1009HundredGigE0/3/0/24false0egressnone00DeviceInterfacefalse1010HundredGigE0/3/0/24false0ingressnone00DeviceInterfacefalse1011HundredGigE0/3/0/24false0Bidirectionalnone00DeviceInterfacefalse1012FortyGigE0/3/0/24false0egressnone00DeviceInterfacefalse1013FortyGigE0/3/0/24false0ingressnone00DeviceInterfacefalse1014FortyGigE0/3/0/24false0Bidirectionalnone00DeviceInterfacefalse1015FourHundredGigE0/3/0/24false0egressnone00DeviceInterfacefalse1016FourHundredGigE0/3/0/24false0ingressnone00DeviceInterfacefalse1017FourHundredGigE0/3/0/24false0Bidirectionalnone00DeviceInterfacefalse1018HundredGigE0/3/0/25false0egressnone00DeviceInterfacefalse1019HundredGigE0/3/0/25false0ingressnone00DeviceInterfacefalse1020HundredGigE0/3/0/25false0Bidirectionalnone00DeviceInterfacefalse1021FortyGigE0/3/0/25false0egressnone00DeviceInterfacefalse1022FortyGigE0/3/0/25false0ingressnone00DeviceInterfacefalse1023FortyGigE0/3/0/25false0Bidirectionalnone00DeviceInterfacefalse1024FourHundredGigE0/3/0/25false0egressnone00DeviceInterfacefalse1025FourHundredGigE0/3/0/25false0ingressnone00DeviceInterfacefalse1026FourHundredGigE0/3/0/25false0Bidirectionalnone00DeviceInterfacefalse1027HundredGigE0/3/0/26false0egressnone00DeviceInterfacefalse1028HundredGigE0/3/0/26false0ingressnone00DeviceInterfacefalse1029HundredGigE0/3/0/26false0Bidirectionalnone00DeviceInterfacefalse1030FortyGigE0/3/0/26false0egressnone00DeviceInterfacefalse1031FortyGigE0/3/0/26false0ingressnone00DeviceInterfacefalse1032FortyGigE0/3/0/26false0Bidirectionalnone00DeviceInterfacefalse1033FourHundredGigE0/3/0/26false0egressnone00DeviceInterfacefalse1034FourHundredGigE0/3/0/26false0ingressnone00DeviceInterfacefalse1035FourHundredGigE0/3/0/26false0Bidirectionalnone00DeviceInterfacefalse1036HundredGigE0/3/0/27false0egressnone00DeviceInterfacefalse1037HundredGigE0/3/0/27false0ingressnone00DeviceInterfacefalse1038HundredGigE0/3/0/27false0Bidirectionalnone00DeviceInterfacefalse1039FortyGigE0/3/0/27false0egressnone00DeviceInterfacefalse1040FortyGigE0/3/0/27false0ingressnone00DeviceInterfacefalse1041FortyGigE0/3/0/27false0Bidirectionalnone00DeviceInterfacefalse1042FourHundredGigE0/3/0/27false0egressnone00DeviceInterfacefalse1043FourHundredGigE0/3/0/27false0ingressnone00DeviceInterfacefalse1044FourHundredGigE0/3/0/27false0Bidirectionalnone00DeviceInterfacefalse1045HundredGigE0/3/0/28false0egressnone00DeviceInterfacefalse1046HundredGigE0/3/0/28false0ingressnone00DeviceInterfacefalse1047HundredGigE0/3/0/28false0Bidirectionalnone00DeviceInterfacefalse1048FortyGigE0/3/0/28false0egressnone00DeviceInterfacefalse1049FortyGigE0/3/0/28false0ingressnone00DeviceInterfacefalse1050FortyGigE0/3/0/28false0Bidirectionalnone00DeviceInterfacefalse1051FourHundredGigE0/3/0/28false0egressnone00DeviceInterfacefalse1052FourHundredGigE0/3/0/28false0ingressnone00DeviceInterfacefalse1053FourHundredGigE0/3/0/28false0Bidirectionalnone00DeviceInterfacefalse1054HundredGigE0/3/0/29false0egressnone00DeviceInterfacefalse1055HundredGigE0/3/0/29false0ingressnone00DeviceInterfacefalse1056HundredGigE0/3/0/29false0Bidirectionalnone00DeviceInterfacefalse1057FortyGigE0/3/0/29false0egressnone00DeviceInterfacefalse1058FortyGigE0/3/0/29false0ingressnone00DeviceInterfacefalse1059FortyGigE0/3/0/29false0Bidirectionalnone00DeviceInterfacefalse1060FourHundredGigE0/3/0/29false0egressnone00DeviceInterfacefalse1061FourHundredGigE0/3/0/29false0ingressnone00DeviceInterfacefalse1062FourHundredGigE0/3/0/29false0Bidirectionalnone00DeviceInterfacefalse1063HundredGigE0/3/0/30false0egressnone00DeviceInterfacefalse1064HundredGigE0/3/0/30false0ingressnone00DeviceInterfacefalse1065HundredGigE0/3/0/30false0Bidirectionalnone00DeviceInterfacefalse1066FortyGigE0/3/0/30false0egressnone00DeviceInterfacefalse1067FortyGigE0/3/0/30false0ingressnone00DeviceInterfacefalse1068FortyGigE0/3/0/30false0Bidirectionalnone00DeviceInterfacefalse1069FourHundredGigE0/3/0/30false0egressnone00DeviceInterfacefalse1070FourHundredGigE0/3/0/30false0ingressnone00DeviceInterfacefalse1071FourHundredGigE0/3/0/30false0Bidirectionalnone00DeviceInterfacefalse1072HundredGigE0/3/0/31false0egressnone00DeviceInterfacefalse1073HundredGigE0/3/0/31false0ingressnone00DeviceInterfacefalse1074HundredGigE0/3/0/31false0Bidirectionalnone00DeviceInterfacefalse1075FortyGigE0/3/0/31false0egressnone00DeviceInterfacefalse1076FortyGigE0/3/0/31false0ingressnone00DeviceInterfacefalse1077FortyGigE0/3/0/31false0Bidirectionalnone00DeviceInterfacefalse1078FourHundredGigE0/3/0/31false0egressnone00DeviceInterfacefalse1079FourHundredGigE0/3/0/31false0ingressnone00DeviceInterfacefalse1080FourHundredGigE0/3/0/31false0Bidirectionalnone00DeviceInterfacefalse1081HundredGigE0/3/0/32false0egressnone00DeviceInterfacefalse1082HundredGigE0/3/0/32false0ingressnone00DeviceInterfacefalse1083HundredGigE0/3/0/32false0Bidirectionalnone00DeviceInterfacefalse1084FortyGigE0/3/0/32false0egressnone00DeviceInterfacefalse1085FortyGigE0/3/0/32false0ingressnone00DeviceInterfacefalse1086FortyGigE0/3/0/32false0Bidirectionalnone00DeviceInterfacefalse1087FourHundredGigE0/3/0/32false0egressnone00DeviceInterfacefalse1088FourHundredGigE0/3/0/32false0ingressnone00DeviceInterfacefalse1089FourHundredGigE0/3/0/32false0Bidirectionalnone00DeviceInterfacefalse1090HundredGigE0/3/0/33false0egressnone00DeviceInterfacefalse1091HundredGigE0/3/0/33false0ingressnone00DeviceInterfacefalse1092HundredGigE0/3/0/33false0Bidirectionalnone00DeviceInterfacefalse1093FortyGigE0/3/0/33false0egressnone00DeviceInterfacefalse1094FortyGigE0/3/0/33false0ingressnone00DeviceInterfacefalse1095FortyGigE0/3/0/33false0Bidirectionalnone00DeviceInterfacefalse1096FourHundredGigE0/3/0/33false0egressnone00DeviceInterfacefalse1097FourHundredGigE0/3/0/33false0ingressnone00DeviceInterfacefalse1098FourHundredGigE0/3/0/33false0Bidirectionalnone00DeviceInterfacefalse1099HundredGigE0/3/0/34false0egressnone00DeviceInterfacefalse1100HundredGigE0/3/0/34false0ingressnone00DeviceInterfacefalse1101HundredGigE0/3/0/34false0Bidirectionalnone00DeviceInterfacefalse1102FortyGigE0/3/0/34false0egressnone00DeviceInterfacefalse1103FortyGigE0/3/0/34false0ingressnone00DeviceInterfacefalse1104FortyGigE0/3/0/34false0Bidirectionalnone00DeviceInterfacefalse1105FourHundredGigE0/3/0/34false0egressnone00DeviceInterfacefalse1106FourHundredGigE0/3/0/34false0ingressnone00DeviceInterfacefalse1107FourHundredGigE0/3/0/34false0Bidirectionalnone00DeviceInterfacefalse1108HundredGigE0/3/0/35false0egressnone00DeviceInterfacefalse1109HundredGigE0/3/0/35false0ingressnone00DeviceInterfacefalse1110HundredGigE0/3/0/35false0Bidirectionalnone00DeviceInterfacefalse1111FortyGigE0/3/0/35false0egressnone00DeviceInterfacefalse1112FortyGigE0/3/0/35false0ingressnone00DeviceInterfacefalse1113FortyGigE0/3/0/35false0Bidirectionalnone00DeviceInterfacefalse1114FourHundredGigE0/3/0/35false0egressnone00DeviceInterfacefalse1115FourHundredGigE0/3/0/35false0ingressnone00DeviceInterfacefalse1116FourHundredGigE0/3/0/35false0Bidirectionalnone00DeviceInterfacefalse1117FourHundredGigE0/4/0/0false0egressnone00DeviceInterfacefalse1118FourHundredGigE0/4/0/0false0ingressnone00DeviceInterfacefalse1119FourHundredGigE0/4/0/0false0Bidirectionalnone00DeviceInterfacefalse1120HundredGigE0/4/0/0false0egressnone00DeviceInterfacefalse1121HundredGigE0/4/0/0false0ingressnone00DeviceInterfacefalse1122HundredGigE0/4/0/0false0Bidirectionalnone00DeviceInterfacefalse1123FourHundredGigE0/4/0/1false0egressnone00DeviceInterfacefalse1124FourHundredGigE0/4/0/1false0ingressnone00DeviceInterfacefalse1125FourHundredGigE0/4/0/1false0Bidirectionalnone00DeviceInterfacefalse1126HundredGigE0/4/0/1false0egressnone00DeviceInterfacefalse1127HundredGigE0/4/0/1false0ingressnone00DeviceInterfacefalse1128HundredGigE0/4/0/1false0Bidirectionalnone00DeviceInterfacefalse1129FourHundredGigE0/4/0/2false0egressnone00DeviceInterfacefalse1130FourHundredGigE0/4/0/2false0ingressnone00DeviceInterfacefalse1131FourHundredGigE0/4/0/2false0Bidirectionalnone00DeviceInterfacefalse1132HundredGigE0/4/0/2false0egressnone00DeviceInterfacefalse1133HundredGigE0/4/0/2false0ingressnone00DeviceInterfacefalse1134HundredGigE0/4/0/2false0Bidirectionalnone00DeviceInterfacefalse1135FourHundredGigE0/4/0/3false0egressnone00DeviceInterfacefalse1136FourHundredGigE0/4/0/3false0ingressnone00DeviceInterfacefalse1137FourHundredGigE0/4/0/3false0Bidirectionalnone00DeviceInterfacefalse1138HundredGigE0/4/0/3false0egressnone00DeviceInterfacefalse1139HundredGigE0/4/0/3false0ingressnone00DeviceInterfacefalse1140HundredGigE0/4/0/3false0Bidirectionalnone00DeviceInterfacefalse1141FourHundredGigE0/4/0/4false0egressnone00DeviceInterfacefalse1142FourHundredGigE0/4/0/4false0ingressnone00DeviceInterfacefalse1143FourHundredGigE0/4/0/4false0Bidirectionalnone00DeviceInterfacefalse1144HundredGigE0/4/0/4false0egressnone00DeviceInterfacefalse1145HundredGigE0/4/0/4false0ingressnone00DeviceInterfacefalse1146HundredGigE0/4/0/4false0Bidirectionalnone00DeviceInterfacefalse1147FourHundredGigE0/4/0/5false0egressnone00DeviceInterfacefalse1148FourHundredGigE0/4/0/5false0ingressnone00DeviceInterfacefalse1149FourHundredGigE0/4/0/5false0Bidirectionalnone00DeviceInterfacefalse1150HundredGigE0/4/0/5false0egressnone00DeviceInterfacefalse1151HundredGigE0/4/0/5false0ingressnone00DeviceInterfacefalse1152HundredGigE0/4/0/5false0Bidirectionalnone00DeviceInterfacefalse1153FourHundredGigE0/4/0/6false0egressnone00DeviceInterfacefalse1154FourHundredGigE0/4/0/6false0ingressnone00DeviceInterfacefalse1155FourHundredGigE0/4/0/6false0Bidirectionalnone00DeviceInterfacefalse1156HundredGigE0/4/0/6false0egressnone00DeviceInterfacefalse1157HundredGigE0/4/0/6false0ingressnone00DeviceInterfacefalse1158HundredGigE0/4/0/6false0Bidirectionalnone00DeviceInterfacefalse1159FourHundredGigE0/4/0/7false0egressnone00DeviceInterfacefalse1160FourHundredGigE0/4/0/7false0ingressnone00DeviceInterfacefalse1161FourHundredGigE0/4/0/7false0Bidirectionalnone00DeviceInterfacefalse1162HundredGigE0/4/0/7false0egressnone00DeviceInterfacefalse1163HundredGigE0/4/0/7false0ingressnone00DeviceInterfacefalse1164HundredGigE0/4/0/7false0Bidirectionalnone00DeviceInterfacefalse1165FourHundredGigE0/4/0/8false0egressnone00DeviceInterfacefalse1166FourHundredGigE0/4/0/8false0ingressnone00DeviceInterfacefalse1167FourHundredGigE0/4/0/8false0Bidirectionalnone00DeviceInterfacefalse1168HundredGigE0/4/0/8false0egressnone00DeviceInterfacefalse1169HundredGigE0/4/0/8false0ingressnone00DeviceInterfacefalse1170HundredGigE0/4/0/8false0Bidirectionalnone00DeviceInterfacefalse1171FourHundredGigE0/4/0/9false0egressnone00DeviceInterfacefalse1172FourHundredGigE0/4/0/9false0ingressnone00DeviceInterfacefalse1173FourHundredGigE0/4/0/9false0Bidirectionalnone00DeviceInterfacefalse1174HundredGigE0/4/0/9false0egressnone00DeviceInterfacefalse1175HundredGigE0/4/0/9false0ingressnone00DeviceInterfacefalse1176HundredGigE0/4/0/9false0Bidirectionalnone00DeviceInterfacefalse1177FourHundredGigE0/4/0/10false0egressnone00DeviceInterfacefalse1178FourHundredGigE0/4/0/10false0ingressnone00DeviceInterfacefalse1179FourHundredGigE0/4/0/10false0Bidirectionalnone00DeviceInterfacefalse1180HundredGigE0/4/0/10false0egressnone00DeviceInterfacefalse1181HundredGigE0/4/0/10false0ingressnone00DeviceInterfacefalse1182HundredGigE0/4/0/10false0Bidirectionalnone00DeviceInterfacefalse1183FourHundredGigE0/4/0/11false0egressnone00DeviceInterfacefalse1184FourHundredGigE0/4/0/11false0ingressnone00DeviceInterfacefalse1185FourHundredGigE0/4/0/11false0Bidirectionalnone00DeviceInterfacefalse1186HundredGigE0/4/0/11false0egressnone00DeviceInterfacefalse1187HundredGigE0/4/0/11false0ingressnone00DeviceInterfacefalse1188HundredGigE0/4/0/11false0Bidirectionalnone00DeviceInterfacefalse1189FourHundredGigE0/4/0/12false0egressnone00DeviceInterfacefalse1190FourHundredGigE0/4/0/12false0ingressnone00DeviceInterfacefalse1191FourHundredGigE0/4/0/12false0Bidirectionalnone00DeviceInterfacefalse1192HundredGigE0/4/0/12false0egressnone00DeviceInterfacefalse1193HundredGigE0/4/0/12false0ingressnone00DeviceInterfacefalse1194HundredGigE0/4/0/12false0Bidirectionalnone00DeviceInterfacefalse1195FourHundredGigE0/4/0/13false0egressnone00DeviceInterfacefalse1196FourHundredGigE0/4/0/13false0ingressnone00DeviceInterfacefalse1197FourHundredGigE0/4/0/13false0Bidirectionalnone00DeviceInterfacefalse1198HundredGigE0/4/0/13false0egressnone00DeviceInterfacefalse1199HundredGigE0/4/0/13false0ingressnone00DeviceInterfacefalse1200HundredGigE0/4/0/13false0Bidirectionalnone00DeviceInterfacefalse1201FourHundredGigE0/4/0/14false0egressnone00DeviceInterfacefalse1202FourHundredGigE0/4/0/14false0ingressnone00DeviceInterfacefalse1203FourHundredGigE0/4/0/14false0Bidirectionalnone00DeviceInterfacefalse1204HundredGigE0/4/0/14false0egressnone00DeviceInterfacefalse1205HundredGigE0/4/0/14false0ingressnone00DeviceInterfacefalse1206HundredGigE0/4/0/14false0Bidirectionalnone00DeviceInterfacefalse1207FourHundredGigE0/4/0/15false0egressnone00DeviceInterfacefalse1208FourHundredGigE0/4/0/15false0ingressnone00DeviceInterfacefalse1209FourHundredGigE0/4/0/15false0Bidirectionalnone00DeviceInterfacefalse1210HundredGigE0/4/0/15false0egressnone00DeviceInterfacefalse1211HundredGigE0/4/0/15false0ingressnone00DeviceInterfacefalse1212HundredGigE0/4/0/15false0Bidirectionalnone00DeviceInterfacefalse1213FourHundredGigE0/4/0/16false0egressnone00DeviceInterfacefalse1214FourHundredGigE0/4/0/16false0ingressnone00DeviceInterfacefalse1215FourHundredGigE0/4/0/16false0Bidirectionalnone00DeviceInterfacefalse1216HundredGigE0/4/0/16false0egressnone00DeviceInterfacefalse1217HundredGigE0/4/0/16false0ingressnone00DeviceInterfacefalse1218HundredGigE0/4/0/16false0Bidirectionalnone00DeviceInterfacefalse1219FourHundredGigE0/4/0/17false0egressnone00DeviceInterfacefalse1220FourHundredGigE0/4/0/17false0ingressnone00DeviceInterfacefalse1221FourHundredGigE0/4/0/17false0Bidirectionalnone00DeviceInterfacefalse1222HundredGigE0/4/0/17false0egressnone00DeviceInterfacefalse1223HundredGigE0/4/0/17false0ingressnone00DeviceInterfacefalse1224HundredGigE0/4/0/17false0Bidirectionalnone00DeviceInterfacefalse1225FourHundredGigE0/4/0/18false0egressnone00DeviceInterfacefalse1226FourHundredGigE0/4/0/18false0ingressnone00DeviceInterfacefalse1227FourHundredGigE0/4/0/18false0Bidirectionalnone00DeviceInterfacefalse1228HundredGigE0/4/0/18false0egressnone00DeviceInterfacefalse1229HundredGigE0/4/0/18false0ingressnone00DeviceInterfacefalse1230HundredGigE0/4/0/18false0Bidirectionalnone00DeviceInterfacefalse1231FourHundredGigE0/4/0/19false0egressnone00DeviceInterfacefalse1232FourHundredGigE0/4/0/19false0ingressnone00DeviceInterfacefalse1233FourHundredGigE0/4/0/19false0Bidirectionalnone00DeviceInterfacefalse1234HundredGigE0/4/0/19false0egressnone00DeviceInterfacefalse1235HundredGigE0/4/0/19false0ingressnone00DeviceInterfacefalse1236HundredGigE0/4/0/19false0Bidirectionalnone00DeviceInterfacefalse1237FourHundredGigE0/4/0/20false0egressnone00DeviceInterfacefalse1238FourHundredGigE0/4/0/20false0ingressnone00DeviceInterfacefalse1239FourHundredGigE0/4/0/20false0Bidirectionalnone00DeviceInterfacefalse1240HundredGigE0/4/0/20false0egressnone00DeviceInterfacefalse1241HundredGigE0/4/0/20false0ingressnone00DeviceInterfacefalse1242HundredGigE0/4/0/20false0Bidirectionalnone00DeviceInterfacefalse1243FourHundredGigE0/4/0/21false0egressnone00DeviceInterfacefalse1244FourHundredGigE0/4/0/21false0ingressnone00DeviceInterfacefalse1245FourHundredGigE0/4/0/21false0Bidirectionalnone00DeviceInterfacefalse1246HundredGigE0/4/0/21false0egressnone00DeviceInterfacefalse1247HundredGigE0/4/0/21false0ingressnone00DeviceInterfacefalse1248HundredGigE0/4/0/21false0Bidirectionalnone00DeviceInterfacefalse1249FourHundredGigE0/4/0/22false0egressnone00DeviceInterfacefalse1250FourHundredGigE0/4/0/22false0ingressnone00DeviceInterfacefalse1251FourHundredGigE0/4/0/22false0Bidirectionalnone00DeviceInterfacefalse1252HundredGigE0/4/0/22false0egressnone00DeviceInterfacefalse1253HundredGigE0/4/0/22false0ingressnone00DeviceInterfacefalse1254HundredGigE0/4/0/22false0Bidirectionalnone00DeviceInterfacefalse1255FourHundredGigE0/4/0/23false0egressnone00DeviceInterfacefalse1256FourHundredGigE0/4/0/23false0ingressnone00DeviceInterfacefalse1257FourHundredGigE0/4/0/23false0Bidirectionalnone00DeviceInterfacefalse1258HundredGigE0/4/0/23false0egressnone00DeviceInterfacefalse1259HundredGigE0/4/0/23false0ingressnone00DeviceInterfacefalse1260HundredGigE0/4/0/23false0Bidirectionalnone00DeviceInterfacefalse1261FourHundredGigE0/4/0/24false0egressnone00DeviceInterfacefalse1262FourHundredGigE0/4/0/24false0ingressnone00DeviceInterfacefalse1263FourHundredGigE0/4/0/24false0Bidirectionalnone00DeviceInterfacefalse1264HundredGigE0/4/0/24false0egressnone00DeviceInterfacefalse1265HundredGigE0/4/0/24false0ingressnone00DeviceInterfacefalse1266HundredGigE0/4/0/24false0Bidirectionalnone00DeviceInterfacefalse1267FourHundredGigE0/4/0/25false0egressnone00DeviceInterfacefalse1268FourHundredGigE0/4/0/25false0ingressnone00DeviceInterfacefalse1269FourHundredGigE0/4/0/25false0Bidirectionalnone00DeviceInterfacefalse1270HundredGigE0/4/0/25false0egressnone00DeviceInterfacefalse1271HundredGigE0/4/0/25false0ingressnone00DeviceInterfacefalse1272HundredGigE0/4/0/25false0Bidirectionalnone00DeviceInterfacefalse1273FourHundredGigE0/4/0/26false0egressnone00DeviceInterfacefalse1274FourHundredGigE0/4/0/26false0ingressnone00DeviceInterfacefalse1275FourHundredGigE0/4/0/26false0Bidirectionalnone00DeviceInterfacefalse1276HundredGigE0/4/0/26false0egressnone00DeviceInterfacefalse1277HundredGigE0/4/0/26false0ingressnone00DeviceInterfacefalse1278HundredGigE0/4/0/26false0Bidirectionalnone00DeviceInterfacefalse1279FourHundredGigE0/4/0/27false0egressnone00DeviceInterfacefalse1280FourHundredGigE0/4/0/27false0ingressnone00DeviceInterfacefalse1281FourHundredGigE0/4/0/27false0Bidirectionalnone00DeviceInterfacefalse1282HundredGigE0/4/0/27false0egressnone00DeviceInterfacefalse1283HundredGigE0/4/0/27false0ingressnone00DeviceInterfacefalse1284HundredGigE0/4/0/27false0Bidirectionalnone00DeviceInterfacefalse1285FourHundredGigE0/4/0/28false0egressnone00DeviceInterfacefalse1286FourHundredGigE0/4/0/28false0ingressnone00DeviceInterfacefalse1287FourHundredGigE0/4/0/28false0Bidirectionalnone00DeviceInterfacefalse1288HundredGigE0/4/0/28false0egressnone00DeviceInterfacefalse1289HundredGigE0/4/0/28false0ingressnone00DeviceInterfacefalse1290HundredGigE0/4/0/28false0Bidirectionalnone00DeviceInterfacefalse1291FourHundredGigE0/4/0/29false0egressnone00DeviceInterfacefalse1292FourHundredGigE0/4/0/29false0ingressnone00DeviceInterfacefalse1293FourHundredGigE0/4/0/29false0Bidirectionalnone00DeviceInterfacefalse1294HundredGigE0/4/0/29false0egressnone00DeviceInterfacefalse1295HundredGigE0/4/0/29false0ingressnone00DeviceInterfacefalse1296HundredGigE0/4/0/29false0Bidirectionalnone00DeviceInterfacefalse1297FourHundredGigE0/4/0/30false0egressnone00DeviceInterfacefalse1298FourHundredGigE0/4/0/30false0ingressnone00DeviceInterfacefalse1299FourHundredGigE0/4/0/30false0Bidirectionalnone00DeviceInterfacefalse1300HundredGigE0/4/0/30false0egressnone00DeviceInterfacefalse1301HundredGigE0/4/0/30false0ingressnone00DeviceInterfacefalse1302HundredGigE0/4/0/30false0Bidirectionalnone00DeviceInterfacefalse1303FourHundredGigE0/4/0/31false0egressnone00DeviceInterfacefalse1304FourHundredGigE0/4/0/31false0ingressnone00DeviceInterfacefalse1305FourHundredGigE0/4/0/31false0Bidirectionalnone00DeviceInterfacefalse1306HundredGigE0/4/0/31false0egressnone00DeviceInterfacefalse1307HundredGigE0/4/0/31false0ingressnone00DeviceInterfacefalse1308HundredGigE0/4/0/31false0Bidirectionalnone00DeviceInterfacefalse1309FourHundredGigE0/4/0/32false0egressnone00DeviceInterfacefalse1310FourHundredGigE0/4/0/32false0ingressnone00DeviceInterfacefalse1311FourHundredGigE0/4/0/32false0Bidirectionalnone00DeviceInterfacefalse1312HundredGigE0/4/0/32false0egressnone00DeviceInterfacefalse1313HundredGigE0/4/0/32false0ingressnone00DeviceInterfacefalse1314HundredGigE0/4/0/32false0Bidirectionalnone00DeviceInterfacefalse1315FourHundredGigE0/4/0/33false0egressnone00DeviceInterfacefalse1316FourHundredGigE0/4/0/33false0ingressnone00DeviceInterfacefalse1317FourHundredGigE0/4/0/33false0Bidirectionalnone00DeviceInterfacefalse1318HundredGigE0/4/0/33false0egressnone00DeviceInterfacefalse1319HundredGigE0/4/0/33false0ingressnone00DeviceInterfacefalse1320HundredGigE0/4/0/33false0Bidirectionalnone00DeviceInterfacefalse1321FourHundredGigE0/4/0/34false0egressnone00DeviceInterfacefalse1322FourHundredGigE0/4/0/34false0ingressnone00DeviceInterfacefalse1323FourHundredGigE0/4/0/34false0Bidirectionalnone00DeviceInterfacefalse1324HundredGigE0/4/0/34false0egressnone00DeviceInterfacefalse1325HundredGigE0/4/0/34false0ingressnone00DeviceInterfacefalse1326HundredGigE0/4/0/34false0Bidirectionalnone00DeviceInterfacefalse1327FourHundredGigE0/4/0/35false0egressnone00DeviceInterfacefalse1328FourHundredGigE0/4/0/35false0ingressnone00DeviceInterfacefalse1329FourHundredGigE0/4/0/35false0Bidirectionalnone00DeviceInterfacefalse1330HundredGigE0/4/0/35false0egressnone00DeviceInterfacefalse1331HundredGigE0/4/0/35false0ingressnone00DeviceInterfacefalse1332HundredGigE0/4/0/35false0Bidirectionalnone00DeviceInterfacefalse1power0false0C19C19trueDeviceInterfacefalse2power1false0C19C19trueDeviceInterfacefalse3power0false0C19C19trueDeviceInterfacefalse4power1false0C19C19trueDeviceInterfacefalse5power0false0C19C19trueDeviceInterfacefalse6power1false0C19C19trueDeviceInterfacefalse7power0false0C19C19trueDeviceInterfacefalse8power1false0C19C19trueDeviceInterfacefalse9power0false0C19C19trueDeviceInterfacefalse10power1false0C19C19trueDeviceInterfacefalse11power0false0C19C19trueDeviceInterfacefalse12power1false0C19C19trueDeviceInterfacefalse1rp0-console0falseconsole115200falseDeviceInterfacefalse2logical0falselogical0115200true0DeviceInterfacefalse3logical1falselogical1115200true1DeviceInterfacefalse4logical2falselogical2115200true2DeviceInterfacefalse5logical3falselogical3115200true3DeviceInterfacefalse6logical4falselogical4115200true4DeviceInterfacefalse7logical5falselogical5115200true5DeviceInterfacefalse8logical6falselogical6115200true6DeviceInterfacefalse9logical7falselogical7115200true7DeviceInterfacefalse10logical8falselogical8115200true8DeviceInterfacefalse11logical9falselogical9115200true9DeviceInterfacefalse12logical10falselogical10115200true10DeviceInterfacefalse13logical11falselogical11115200true11DeviceInterfacefalse14logical12falselogical12115200true12CiscoLoopbackInterfaceHostIPLoopback010.3.0.5/3210.3.0.5/32LoopbackInterfaceHostIP1Loopback0fc00:34::1/128fc00:34::1/128ManagementInterfaceManagementIPManagement1/110.3.146.214/2410.3.146.214/24ManagementInterfacev6ManagementIPManagement1/12a01:111:e210:3000::a03:92d6/642a01:111:e210:3000::a03:92d6/64STR2-temp-2-lc04LoopbackInterfaceHostIPLoopback010.3.0.5/3210.3.0.5/32LoopbackInterfaceHostIP1Loopback0fc00:34::1/128fc00:34::1/128LoopbackInterfaceLoopback4096Loopback4096192.0.0.11/32192.0.0.11/32LoopbackInterfacev6Loopback4096Loopback40962603:10e2:400::b/1282603:10e2:400::b/128STR2-temp-2-lc04-ASIC00PortChannelInterfacePortChannel101Eth16;Eth24PortChannelInterfacePortChannel4001Eth396;Eth392PortChannelInterfacePortChannel4014Eth404;Eth400PortChannelInterfacePortChannel4027Eth380;Eth376PortChannelInterfacePortChannel4040Eth388;Eth384PortChannelInterfacePortChannel4053Eth364;Eth360PortChannelInterfacePortChannel4066Eth328;Eth332PortChannelInterfacePortChannel4079Eth336;Eth340PortChannelInterfacePortChannel4092Eth316;Eth312PortChannelInterfacePortChannel4105Eth320;Eth324PortChannelInterfacePortChannel4118Eth292;Eth288IPInterfacePortChannel10110.0.0.12/31IPInterfacePortChannel410510.235.100.1/25IPInterfacePortChannel411810.235.100.129/25IPInterfacePortChannel400110.235.96.1/25IPInterfacePortChannel401410.235.96.129/25IPInterfacePortChannel402710.235.97.1/25IPInterfacePortChannel404010.235.97.129/25IPInterfacePortChannel405310.235.98.1/25IPInterfacePortChannel406610.235.98.129/25IPInterfacePortChannel407910.235.99.1/25IPInterfacePortChannel409210.235.99.129/25IPInterfacePortChannel4001fc00:34::a:eb60:101/113IPInterfacePortChannel4014fc00:34::a:eb60:8101/113IPInterfacePortChannel4027fc00:34::a:eb61:101/113IPInterfacePortChannel4040fc00:34::a:eb61:8101/113IPInterfacePortChannel4053fc00:34::a:eb62:101/113IPInterfacePortChannel4066fc00:34::a:eb62:8101/113IPInterfacePortChannel4079fc00:34::a:eb63:101/113IPInterfacePortChannel4092fc00:34::a:eb63:8101/113IPInterfacePortChannel4105fc00:34::a:eb64:101/113IPInterfacePortChannel4118fc00:34::a:eb64:8101/113IPInterfacePortChannel101fc00::19/126IPNextHoplc00-ASIC00-V4PortChannel4001,10.235.96.11;PortChannel4014,10.235.96.136;PortChannel4027,10.235.97.11;PortChannel4040,10.235.97.136;PortChannel4053,10.235.98.11;PortChannel4066,10.235.98.136;PortChannel4079,10.235.99.11;PortChannel4092,10.235.99.136;PortChannel4105,10.235.100.11;PortChannel4118,10.235.100.136
192.0.0.1
StaticRouteIPNextHoplc00-ASIC00-V6PortChannel4001,fc00:34::a:eb60:b01;PortChannel4014,fc00:34::a:eb60:8801;PortChannel4027,fc00:34::a:eb61:b01;PortChannel4040,fc00:34::a:eb61:8801;PortChannel4053,fc00:34::a:eb62:b01;PortChannel4066,fc00:34::a:eb62:8801;PortChannel4079,fc00:34::a:eb63:b01;PortChannel4092,fc00:34::a:eb63:8801;PortChannel4105,fc00:34::a:eb64:b01;PortChannel4118,fc00:34::a:eb64:8801
2603:10e2:400::1
StaticRouteIPNextHoplc00-ASIC01-V4PortChannel4001,10.235.96.12;PortChannel4014,10.235.96.137;PortChannel4027,10.235.97.12;PortChannel4040,10.235.97.137;PortChannel4053,10.235.98.12;PortChannel4066,10.235.98.137;PortChannel4079,10.235.99.12;PortChannel4092,10.235.99.137;PortChannel4105,10.235.100.12;PortChannel4118,10.235.100.137
192.0.0.2
StaticRouteIPNextHoplc00-ASIC01-V6PortChannel4001,fc00:34::a:eb60:c01;PortChannel4014,fc00:34::a:eb60:8901;PortChannel4027,fc00:34::a:eb61:c01;PortChannel4040,fc00:34::a:eb61:8901;PortChannel4053,fc00:34::a:eb62:c01;PortChannel4066,fc00:34::a:eb62:8901;PortChannel4079,fc00:34::a:eb63:c01;PortChannel4092,fc00:34::a:eb63:8901;PortChannel4105,fc00:34::a:eb64:c01;PortChannel4118,fc00:34::a:eb64:8901
2603:10e2:400::2
StaticRouteIPNextHoplc00-ASIC02-V4PortChannel4001,10.235.96.13;PortChannel4014,10.235.96.134;PortChannel4027,10.235.97.13;PortChannel4040,10.235.97.134;PortChannel4053,10.235.98.13;PortChannel4066,10.235.98.134;PortChannel4079,10.235.99.13;PortChannel4092,10.235.99.134;PortChannel4105,10.235.100.13;PortChannel4118,10.235.100.134
192.0.0.3
StaticRouteIPNextHoplc00-ASIC02-V6PortChannel4001,fc00:34::a:eb60:d01;PortChannel4014,fc00:34::a:eb60:8601;PortChannel4027,fc00:34::a:eb61:d01;PortChannel4040,fc00:34::a:eb61:8601;PortChannel4053,fc00:34::a:eb62:d01;PortChannel4066,fc00:34::a:eb62:8601;PortChannel4079,fc00:34::a:eb63:d01;PortChannel4092,fc00:34::a:eb63:8601;PortChannel4105,fc00:34::a:eb64:d01;PortChannel4118,fc00:34::a:eb64:8601
2603:10e2:400::3
StaticRouteIPNextHoplc01-ASIC00-V4PortChannel4001,10.235.96.9;PortChannel4014,10.235.96.140;PortChannel4027,10.235.97.9;PortChannel4040,10.235.97.140;PortChannel4053,10.235.98.9;PortChannel4066,10.235.98.140;PortChannel4079,10.235.99.9;PortChannel4092,10.235.99.140;PortChannel4105,10.235.100.9;PortChannel4118,10.235.100.140
192.0.0.4
StaticRouteIPNextHoplc01-ASIC00-V6PortChannel4001,fc00:34::a:eb60:901;PortChannel4014,fc00:34::a:eb60:8c01;PortChannel4027,fc00:34::a:eb61:901;PortChannel4040,fc00:34::a:eb61:8c01;PortChannel4053,fc00:34::a:eb62:901;PortChannel4066,fc00:34::a:eb62:8c01;PortChannel4079,fc00:34::a:eb63:901;PortChannel4092,fc00:34::a:eb63:8c01;PortChannel4105,fc00:34::a:eb64:901;PortChannel4118,fc00:34::a:eb64:8c01
2603:10e2:400::4
StaticRouteIPNextHoplc01-ASIC01-V4PortChannel4001,10.235.96.10;PortChannel4014,10.235.96.141;PortChannel4027,10.235.97.10;PortChannel4040,10.235.97.141;PortChannel4053,10.235.98.10;PortChannel4066,10.235.98.141;PortChannel4079,10.235.99.10;PortChannel4092,10.235.99.141;PortChannel4105,10.235.100.10;PortChannel4118,10.235.100.141
192.0.0.5
StaticRouteIPNextHoplc01-ASIC01-V6PortChannel4001,fc00:34::a:eb60:a01;PortChannel4014,fc00:34::a:eb60:8d01;PortChannel4027,fc00:34::a:eb61:a01;PortChannel4040,fc00:34::a:eb61:8d01;PortChannel4053,fc00:34::a:eb62:a01;PortChannel4066,fc00:34::a:eb62:8d01;PortChannel4079,fc00:34::a:eb63:a01;PortChannel4092,fc00:34::a:eb63:8d01;PortChannel4105,fc00:34::a:eb64:a01;PortChannel4118,fc00:34::a:eb64:8d01
2603:10e2:400::5
StaticRouteIPNextHoplc02-ASIC00-V4PortChannel4001,10.235.96.7;PortChannel4014,10.235.96.138;PortChannel4027,10.235.97.7;PortChannel4040,10.235.97.138;PortChannel4053,10.235.98.7;PortChannel4066,10.235.98.138;PortChannel4079,10.235.99.7;PortChannel4092,10.235.99.138;PortChannel4105,10.235.100.7;PortChannel4118,10.235.100.138
192.0.0.6
StaticRouteIPNextHoplc02-ASIC00-V6PortChannel4001,fc00:34::a:eb60:701;PortChannel4014,fc00:34::a:eb60:8a01;PortChannel4027,fc00:34::a:eb61:701;PortChannel4040,fc00:34::a:eb61:8a01;PortChannel4053,fc00:34::a:eb62:701;PortChannel4066,fc00:34::a:eb62:8a01;PortChannel4079,fc00:34::a:eb63:701;PortChannel4092,fc00:34::a:eb63:8a01;PortChannel4105,fc00:34::a:eb64:701;PortChannel4118,fc00:34::a:eb64:8a01
2603:10e2:400::6
StaticRouteIPNextHoplc02-ASIC01-V4PortChannel4001,10.235.96.6;PortChannel4014,10.235.96.139;PortChannel4027,10.235.97.6;PortChannel4040,10.235.97.139;PortChannel4053,10.235.98.6;PortChannel4066,10.235.98.139;PortChannel4079,10.235.99.6;PortChannel4092,10.235.99.139;PortChannel4105,10.235.100.6;PortChannel4118,10.235.100.139
192.0.0.7
StaticRouteIPNextHoplc02-ASIC01-V6PortChannel4001,fc00:34::a:eb60:601;PortChannel4014,fc00:34::a:eb60:8b01;PortChannel4027,fc00:34::a:eb61:601;PortChannel4040,fc00:34::a:eb61:8b01;PortChannel4053,fc00:34::a:eb62:601;PortChannel4066,fc00:34::a:eb62:8b01;PortChannel4079,fc00:34::a:eb63:601;PortChannel4092,fc00:34::a:eb63:8b01;PortChannel4105,fc00:34::a:eb64:601;PortChannel4118,fc00:34::a:eb64:8b01
2603:10e2:400::7
StaticRouteIPNextHoplc03-ASIC00-V4PortChannel4001,10.235.96.4;PortChannel4014,10.235.96.132;PortChannel4027,10.235.97.4;PortChannel4040,10.235.97.132;PortChannel4053,10.235.98.4;PortChannel4066,10.235.98.132;PortChannel4079,10.235.99.4;PortChannel4092,10.235.99.132;PortChannel4105,10.235.100.4;PortChannel4118,10.235.100.132
192.0.0.8
StaticRouteIPNextHoplc03-ASIC00-V6PortChannel4001,fc00:34::a:eb60:401;PortChannel4014,fc00:34::a:eb60:8401;PortChannel4027,fc00:34::a:eb61:401;PortChannel4040,fc00:34::a:eb61:8401;PortChannel4053,fc00:34::a:eb62:401;PortChannel4066,fc00:34::a:eb62:8401;PortChannel4079,fc00:34::a:eb63:401;PortChannel4092,fc00:34::a:eb63:8401;PortChannel4105,fc00:34::a:eb64:401;PortChannel4118,fc00:34::a:eb64:8401
2603:10e2:400::8
StaticRouteIPNextHoplc03-ASIC01-V4PortChannel4001,10.235.96.5;PortChannel4014,10.235.96.133;PortChannel4027,10.235.97.5;PortChannel4040,10.235.97.133;PortChannel4053,10.235.98.5;PortChannel4066,10.235.98.133;PortChannel4079,10.235.99.5;PortChannel4092,10.235.99.133;PortChannel4105,10.235.100.5;PortChannel4118,10.235.100.133
192.0.0.9
StaticRouteIPNextHoplc03-ASIC01-V6PortChannel4001,fc00:34::a:eb60:501;PortChannel4014,fc00:34::a:eb60:8501;PortChannel4027,fc00:34::a:eb61:501;PortChannel4040,fc00:34::a:eb61:8501;PortChannel4053,fc00:34::a:eb62:501;PortChannel4066,fc00:34::a:eb62:8501;PortChannel4079,fc00:34::a:eb63:501;PortChannel4092,fc00:34::a:eb63:8501;PortChannel4105,fc00:34::a:eb64:501;PortChannel4118,fc00:34::a:eb64:8501
2603:10e2:400::9
StaticRouteIPNextHoplc03-ASIC02-V4PortChannel4001,10.235.96.8;PortChannel4014,10.235.96.135;PortChannel4027,10.235.97.8;PortChannel4040,10.235.97.135;PortChannel4053,10.235.98.8;PortChannel4066,10.235.98.135;PortChannel4079,10.235.99.8;PortChannel4092,10.235.99.135;PortChannel4105,10.235.100.8;PortChannel4118,10.235.100.135
192.0.0.10
StaticRouteIPNextHoplc03-ASIC02-V6PortChannel4001,fc00:34::a:eb60:801;PortChannel4014,fc00:34::a:eb60:8701;PortChannel4027,fc00:34::a:eb61:801;PortChannel4040,fc00:34::a:eb61:8701;PortChannel4053,fc00:34::a:eb62:801;PortChannel4066,fc00:34::a:eb62:8701;PortChannel4079,fc00:34::a:eb63:801;PortChannel4092,fc00:34::a:eb63:8701;PortChannel4105,fc00:34::a:eb64:801;PortChannel4118,fc00:34::a:eb64:8701
2603:10e2:400::a
StaticRouteIPNextHoplc04-ASIC01-V4PortChannel4001,10.235.96.2;PortChannel4014,10.235.96.130;PortChannel4027,10.235.97.2;PortChannel4040,10.235.97.130;PortChannel4053,10.235.98.2;PortChannel4066,10.235.98.130;PortChannel4079,10.235.99.2;PortChannel4092,10.235.99.130;PortChannel4105,10.235.100.2;PortChannel4118,10.235.100.130
192.0.0.12
StaticRouteIPNextHoplc04-ASIC01-V6PortChannel4001,fc00:34::a:eb60:201;PortChannel4014,fc00:34::a:eb60:8201;PortChannel4027,fc00:34::a:eb61:201;PortChannel4040,fc00:34::a:eb61:8201;PortChannel4053,fc00:34::a:eb62:201;PortChannel4066,fc00:34::a:eb62:8201;PortChannel4079,fc00:34::a:eb63:201;PortChannel4092,fc00:34::a:eb63:8201;PortChannel4105,fc00:34::a:eb64:201;PortChannel4118,fc00:34::a:eb64:8201
2603:10e2:400::c
StaticRouteIPNextHoplc04-ASIC02-V4PortChannel4001,10.235.96.3;PortChannel4014,10.235.96.131;PortChannel4027,10.235.97.3;PortChannel4040,10.235.97.131;PortChannel4053,10.235.98.3;PortChannel4066,10.235.98.131;PortChannel4079,10.235.99.3;PortChannel4092,10.235.99.131;PortChannel4105,10.235.100.3;PortChannel4118,10.235.100.131
192.0.0.13
StaticRouteIPNextHoplc04-ASIC02-V6PortChannel4001,fc00:34::a:eb60:301;PortChannel4014,fc00:34::a:eb60:8301;PortChannel4027,fc00:34::a:eb61:301;PortChannel4040,fc00:34::a:eb61:8301;PortChannel4053,fc00:34::a:eb62:301;PortChannel4066,fc00:34::a:eb62:8301;PortChannel4079,fc00:34::a:eb63:301;PortChannel4092,fc00:34::a:eb63:8301;PortChannel4105,fc00:34::a:eb64:301;PortChannel4118,fc00:34::a:eb64:8301
2603:10e2:400::d
StaticRouteLoopbackInterfaceHostIPLoopback010.3.0.5/3210.3.0.5/32LoopbackInterfaceHostIP1Loopback0fc00:34::1/128fc00:34::1/128LoopbackInterfaceLoopback4096Loopback4096192.0.0.12/32192.0.0.12/32LoopbackInterfacev6Loopback4096Loopback40962603:10e2:400::c/1282603:10e2:400::c/128STR2-temp-2-lc04-ASIC01PortChannelInterfacePortChannel4002Eth404;Eth400PortChannelInterfacePortChannel4015Eth396;Eth392PortChannelInterfacePortChannel4028Eth380;Eth376PortChannelInterfacePortChannel4041Eth388;Eth384PortChannelInterfacePortChannel4054Eth364;Eth360PortChannelInterfacePortChannel4067Eth328;Eth332PortChannelInterfacePortChannel4080Eth336;Eth340PortChannelInterfacePortChannel4093Eth316;Eth312PortChannelInterfacePortChannel4106Eth324;Eth320PortChannelInterfacePortChannel4119Eth292;Eth288IPInterfacePortChannel411910.235.100.130/25IPInterfacePortChannel410610.235.100.2/25IPInterfacePortChannel401510.235.96.130/25IPInterfacePortChannel400210.235.96.2/25IPInterfacePortChannel404110.235.97.130/25IPInterfacePortChannel402810.235.97.2/25IPInterfacePortChannel406710.235.98.130/25IPInterfacePortChannel405410.235.98.2/25IPInterfacePortChannel409310.235.99.130/25IPInterfacePortChannel408010.235.99.2/25IPInterfacePortChannel4002fc00:34::a:eb60:201/113IPInterfacePortChannel4015fc00:34::a:eb60:8201/113IPInterfacePortChannel4028fc00:34::a:eb61:201/113IPInterfacePortChannel4041fc00:34::a:eb61:8201/113IPInterfacePortChannel4054fc00:34::a:eb62:201/113IPInterfacePortChannel4067fc00:34::a:eb62:8201/113IPInterfacePortChannel4080fc00:34::a:eb63:201/113IPInterfacePortChannel4093fc00:34::a:eb63:8201/113IPInterfacePortChannel4106fc00:34::a:eb64:201/113IPInterfacePortChannel4119fc00:34::a:eb64:8201/113IPNextHoplc00-ASIC00-V4PortChannel4002,10.235.96.11;PortChannel4015,10.235.96.136;PortChannel4028,10.235.97.11;PortChannel4041,10.235.97.136;PortChannel4054,10.235.98.11;PortChannel4067,10.235.98.136;PortChannel4080,10.235.99.11;PortChannel4093,10.235.99.136;PortChannel4106,10.235.100.11;PortChannel4119,10.235.100.136
192.0.0.1
StaticRouteIPNextHoplc00-ASIC00-V6PortChannel4002,fc00:34::a:eb60:b01;PortChannel4015,fc00:34::a:eb60:8801;PortChannel4028,fc00:34::a:eb61:b01;PortChannel4041,fc00:34::a:eb61:8801;PortChannel4054,fc00:34::a:eb62:b01;PortChannel4067,fc00:34::a:eb62:8801;PortChannel4080,fc00:34::a:eb63:b01;PortChannel4093,fc00:34::a:eb63:8801;PortChannel4106,fc00:34::a:eb64:b01;PortChannel4119,fc00:34::a:eb64:8801
2603:10e2:400::1
StaticRouteIPNextHoplc00-ASIC01-V4PortChannel4002,10.235.96.12;PortChannel4015,10.235.96.137;PortChannel4028,10.235.97.12;PortChannel4041,10.235.97.137;PortChannel4054,10.235.98.12;PortChannel4067,10.235.98.137;PortChannel4080,10.235.99.12;PortChannel4093,10.235.99.137;PortChannel4106,10.235.100.12;PortChannel4119,10.235.100.137
192.0.0.2
StaticRouteIPNextHoplc00-ASIC01-V6PortChannel4002,fc00:34::a:eb60:c01;PortChannel4015,fc00:34::a:eb60:8901;PortChannel4028,fc00:34::a:eb61:c01;PortChannel4041,fc00:34::a:eb61:8901;PortChannel4054,fc00:34::a:eb62:c01;PortChannel4067,fc00:34::a:eb62:8901;PortChannel4080,fc00:34::a:eb63:c01;PortChannel4093,fc00:34::a:eb63:8901;PortChannel4106,fc00:34::a:eb64:c01;PortChannel4119,fc00:34::a:eb64:8901
2603:10e2:400::2
StaticRouteIPNextHoplc00-ASIC02-V4PortChannel4002,10.235.96.13;PortChannel4015,10.235.96.134;PortChannel4028,10.235.97.13;PortChannel4041,10.235.97.134;PortChannel4054,10.235.98.13;PortChannel4067,10.235.98.134;PortChannel4080,10.235.99.13;PortChannel4093,10.235.99.134;PortChannel4106,10.235.100.13;PortChannel4119,10.235.100.134
192.0.0.3
StaticRouteIPNextHoplc00-ASIC02-V6PortChannel4002,fc00:34::a:eb60:d01;PortChannel4015,fc00:34::a:eb60:8601;PortChannel4028,fc00:34::a:eb61:d01;PortChannel4041,fc00:34::a:eb61:8601;PortChannel4054,fc00:34::a:eb62:d01;PortChannel4067,fc00:34::a:eb62:8601;PortChannel4080,fc00:34::a:eb63:d01;PortChannel4093,fc00:34::a:eb63:8601;PortChannel4106,fc00:34::a:eb64:d01;PortChannel4119,fc00:34::a:eb64:8601
2603:10e2:400::3
StaticRouteIPNextHoplc01-ASIC00-V4PortChannel4002,10.235.96.9;PortChannel4015,10.235.96.140;PortChannel4028,10.235.97.9;PortChannel4041,10.235.97.140;PortChannel4054,10.235.98.9;PortChannel4067,10.235.98.140;PortChannel4080,10.235.99.9;PortChannel4093,10.235.99.140;PortChannel4106,10.235.100.9;PortChannel4119,10.235.100.140
192.0.0.4
StaticRouteIPNextHoplc01-ASIC00-V6PortChannel4002,fc00:34::a:eb60:901;PortChannel4015,fc00:34::a:eb60:8c01;PortChannel4028,fc00:34::a:eb61:901;PortChannel4041,fc00:34::a:eb61:8c01;PortChannel4054,fc00:34::a:eb62:901;PortChannel4067,fc00:34::a:eb62:8c01;PortChannel4080,fc00:34::a:eb63:901;PortChannel4093,fc00:34::a:eb63:8c01;PortChannel4106,fc00:34::a:eb64:901;PortChannel4119,fc00:34::a:eb64:8c01
2603:10e2:400::4
StaticRouteIPNextHoplc01-ASIC01-V4PortChannel4002,10.235.96.10;PortChannel4015,10.235.96.141;PortChannel4028,10.235.97.10;PortChannel4041,10.235.97.141;PortChannel4054,10.235.98.10;PortChannel4067,10.235.98.141;PortChannel4080,10.235.99.10;PortChannel4093,10.235.99.141;PortChannel4106,10.235.100.10;PortChannel4119,10.235.100.141
192.0.0.5
StaticRouteIPNextHoplc01-ASIC01-V6PortChannel4002,fc00:34::a:eb60:a01;PortChannel4015,fc00:34::a:eb60:8d01;PortChannel4028,fc00:34::a:eb61:a01;PortChannel4041,fc00:34::a:eb61:8d01;PortChannel4054,fc00:34::a:eb62:a01;PortChannel4067,fc00:34::a:eb62:8d01;PortChannel4080,fc00:34::a:eb63:a01;PortChannel4093,fc00:34::a:eb63:8d01;PortChannel4106,fc00:34::a:eb64:a01;PortChannel4119,fc00:34::a:eb64:8d01
2603:10e2:400::5
StaticRouteIPNextHoplc02-ASIC00-V4PortChannel4002,10.235.96.7;PortChannel4015,10.235.96.138;PortChannel4028,10.235.97.7;PortChannel4041,10.235.97.138;PortChannel4054,10.235.98.7;PortChannel4067,10.235.98.138;PortChannel4080,10.235.99.7;PortChannel4093,10.235.99.138;PortChannel4106,10.235.100.7;PortChannel4119,10.235.100.138
192.0.0.6
StaticRouteIPNextHoplc02-ASIC00-V6PortChannel4002,fc00:34::a:eb60:701;PortChannel4015,fc00:34::a:eb60:8a01;PortChannel4028,fc00:34::a:eb61:701;PortChannel4041,fc00:34::a:eb61:8a01;PortChannel4054,fc00:34::a:eb62:701;PortChannel4067,fc00:34::a:eb62:8a01;PortChannel4080,fc00:34::a:eb63:701;PortChannel4093,fc00:34::a:eb63:8a01;PortChannel4106,fc00:34::a:eb64:701;PortChannel4119,fc00:34::a:eb64:8a01
2603:10e2:400::6
StaticRouteIPNextHoplc02-ASIC01-V4PortChannel4002,10.235.96.6;PortChannel4015,10.235.96.139;PortChannel4028,10.235.97.6;PortChannel4041,10.235.97.139;PortChannel4054,10.235.98.6;PortChannel4067,10.235.98.139;PortChannel4080,10.235.99.6;PortChannel4093,10.235.99.139;PortChannel4106,10.235.100.6;PortChannel4119,10.235.100.139
192.0.0.7
StaticRouteIPNextHoplc02-ASIC01-V6PortChannel4002,fc00:34::a:eb60:601;PortChannel4015,fc00:34::a:eb60:8b01;PortChannel4028,fc00:34::a:eb61:601;PortChannel4041,fc00:34::a:eb61:8b01;PortChannel4054,fc00:34::a:eb62:601;PortChannel4067,fc00:34::a:eb62:8b01;PortChannel4080,fc00:34::a:eb63:601;PortChannel4093,fc00:34::a:eb63:8b01;PortChannel4106,fc00:34::a:eb64:601;PortChannel4119,fc00:34::a:eb64:8b01
2603:10e2:400::7
StaticRouteIPNextHoplc03-ASIC00-V4PortChannel4002,10.235.96.4;PortChannel4015,10.235.96.132;PortChannel4028,10.235.97.4;PortChannel4041,10.235.97.132;PortChannel4054,10.235.98.4;PortChannel4067,10.235.98.132;PortChannel4080,10.235.99.4;PortChannel4093,10.235.99.132;PortChannel4106,10.235.100.4;PortChannel4119,10.235.100.132
192.0.0.8
StaticRouteIPNextHoplc03-ASIC00-V6PortChannel4002,fc00:34::a:eb60:401;PortChannel4015,fc00:34::a:eb60:8401;PortChannel4028,fc00:34::a:eb61:401;PortChannel4041,fc00:34::a:eb61:8401;PortChannel4054,fc00:34::a:eb62:401;PortChannel4067,fc00:34::a:eb62:8401;PortChannel4080,fc00:34::a:eb63:401;PortChannel4093,fc00:34::a:eb63:8401;PortChannel4106,fc00:34::a:eb64:401;PortChannel4119,fc00:34::a:eb64:8401
2603:10e2:400::8
StaticRouteIPNextHoplc03-ASIC01-V4PortChannel4002,10.235.96.5;PortChannel4015,10.235.96.133;PortChannel4028,10.235.97.5;PortChannel4041,10.235.97.133;PortChannel4054,10.235.98.5;PortChannel4067,10.235.98.133;PortChannel4080,10.235.99.5;PortChannel4093,10.235.99.133;PortChannel4106,10.235.100.5;PortChannel4119,10.235.100.133
192.0.0.9
StaticRouteIPNextHoplc03-ASIC01-V6PortChannel4002,fc00:34::a:eb60:501;PortChannel4015,fc00:34::a:eb60:8501;PortChannel4028,fc00:34::a:eb61:501;PortChannel4041,fc00:34::a:eb61:8501;PortChannel4054,fc00:34::a:eb62:501;PortChannel4067,fc00:34::a:eb62:8501;PortChannel4080,fc00:34::a:eb63:501;PortChannel4093,fc00:34::a:eb63:8501;PortChannel4106,fc00:34::a:eb64:501;PortChannel4119,fc00:34::a:eb64:8501
2603:10e2:400::9
StaticRouteIPNextHoplc03-ASIC02-V4PortChannel4002,10.235.96.8;PortChannel4015,10.235.96.135;PortChannel4028,10.235.97.8;PortChannel4041,10.235.97.135;PortChannel4054,10.235.98.8;PortChannel4067,10.235.98.135;PortChannel4080,10.235.99.8;PortChannel4093,10.235.99.135;PortChannel4106,10.235.100.8;PortChannel4119,10.235.100.135
192.0.0.10
StaticRouteIPNextHoplc03-ASIC02-V6PortChannel4002,fc00:34::a:eb60:801;PortChannel4015,fc00:34::a:eb60:8701;PortChannel4028,fc00:34::a:eb61:801;PortChannel4041,fc00:34::a:eb61:8701;PortChannel4054,fc00:34::a:eb62:801;PortChannel4067,fc00:34::a:eb62:8701;PortChannel4080,fc00:34::a:eb63:801;PortChannel4093,fc00:34::a:eb63:8701;PortChannel4106,fc00:34::a:eb64:801;PortChannel4119,fc00:34::a:eb64:8701
2603:10e2:400::a
StaticRouteIPNextHoplc04-ASIC00-V4PortChannel4002,10.235.96.1;PortChannel4015,10.235.96.129;PortChannel4028,10.235.97.1;PortChannel4041,10.235.97.129;PortChannel4054,10.235.98.1;PortChannel4067,10.235.98.129;PortChannel4080,10.235.99.1;PortChannel4093,10.235.99.129;PortChannel4106,10.235.100.1;PortChannel4119,10.235.100.129
192.0.0.11
StaticRouteIPNextHoplc04-ASIC00-V6PortChannel4002,fc00:34::a:eb60:101;PortChannel4015,fc00:34::a:eb60:8101;PortChannel4028,fc00:34::a:eb61:101;PortChannel4041,fc00:34::a:eb61:8101;PortChannel4054,fc00:34::a:eb62:101;PortChannel4067,fc00:34::a:eb62:8101;PortChannel4080,fc00:34::a:eb63:101;PortChannel4093,fc00:34::a:eb63:8101;PortChannel4106,fc00:34::a:eb64:101;PortChannel4119,fc00:34::a:eb64:8101
2603:10e2:400::b
StaticRouteIPNextHoplc04-ASIC02-V4PortChannel4002,10.235.96.3;PortChannel4015,10.235.96.131;PortChannel4028,10.235.97.3;PortChannel4041,10.235.97.131;PortChannel4054,10.235.98.3;PortChannel4067,10.235.98.131;PortChannel4080,10.235.99.3;PortChannel4093,10.235.99.131;PortChannel4106,10.235.100.3;PortChannel4119,10.235.100.131
192.0.0.13
StaticRouteIPNextHoplc04-ASIC02-V6PortChannel4002,fc00:34::a:eb60:301;PortChannel4015,fc00:34::a:eb60:8301;PortChannel4028,fc00:34::a:eb61:301;PortChannel4041,fc00:34::a:eb61:8301;PortChannel4054,fc00:34::a:eb62:301;PortChannel4067,fc00:34::a:eb62:8301;PortChannel4080,fc00:34::a:eb63:301;PortChannel4093,fc00:34::a:eb63:8301;PortChannel4106,fc00:34::a:eb64:301;PortChannel4119,fc00:34::a:eb64:8301
2603:10e2:400::d
StaticRouteLoopbackInterfaceHostIPLoopback010.3.0.5/3210.3.0.5/32LoopbackInterfaceHostIP1Loopback0fc00:34::1/128fc00:34::1/128LoopbackInterfaceLoopback4096Loopback4096192.0.0.13/32192.0.0.13/32LoopbackInterfacev6Loopback4096Loopback40962603:10e2:400::d/1282603:10e2:400::d/128STR2-temp-2-lc04-ASIC02PortChannelInterfacePortChannel105Eth0;Eth8PortChannelInterfacePortChannel4003Eth392;Eth396PortChannelInterfacePortChannel4016Eth400;Eth404PortChannelInterfacePortChannel4029Eth376;Eth380PortChannelInterfacePortChannel4042Eth384;Eth388PortChannelInterfacePortChannel4055Eth360;Eth364PortChannelInterfacePortChannel4068Eth328;Eth332PortChannelInterfacePortChannel4081Eth336;Eth340PortChannelInterfacePortChannel4094Eth312;Eth316PortChannelInterfacePortChannel4107Eth320;Eth324PortChannelInterfacePortChannel4120Eth288;Eth292IPInterfacePortChannel10510.0.0.18/31IPInterfacePortChannel412010.235.100.131/25IPInterfacePortChannel410710.235.100.3/25IPInterfacePortChannel401610.235.96.131/25IPInterfacePortChannel400310.235.96.3/25IPInterfacePortChannel404210.235.97.131/25IPInterfacePortChannel402910.235.97.3/25IPInterfacePortChannel406810.235.98.131/25IPInterfacePortChannel405510.235.98.3/25IPInterfacePortChannel409410.235.99.131/25IPInterfacePortChannel408110.235.99.3/25IPInterfacePortChannel4003fc00:34::a:eb60:301/113IPInterfacePortChannel4016fc00:34::a:eb60:8301/113IPInterfacePortChannel4029fc00:34::a:eb61:301/113IPInterfacePortChannel4042fc00:34::a:eb61:8301/113IPInterfacePortChannel4055fc00:34::a:eb62:301/113IPInterfacePortChannel4068fc00:34::a:eb62:8301/113IPInterfacePortChannel4081fc00:34::a:eb63:301/113IPInterfacePortChannel4094fc00:34::a:eb63:8301/113IPInterfacePortChannel4107fc00:34::a:eb64:301/113IPInterfacePortChannel4120fc00:34::a:eb64:8301/113IPInterfacePortChannel105fc00::25/126IPNextHoplc00-ASIC00-V4PortChannel4003,10.235.96.11;PortChannel4016,10.235.96.136;PortChannel4029,10.235.97.11;PortChannel4042,10.235.97.136;PortChannel4055,10.235.98.11;PortChannel4068,10.235.98.136;PortChannel4081,10.235.99.11;PortChannel4094,10.235.99.136;PortChannel4107,10.235.100.11;PortChannel4120,10.235.100.136
192.0.0.1
StaticRouteIPNextHoplc00-ASIC00-V6PortChannel4003,fc00:34::a:eb60:b01;PortChannel4016,fc00:34::a:eb60:8801;PortChannel4029,fc00:34::a:eb61:b01;PortChannel4042,fc00:34::a:eb61:8801;PortChannel4055,fc00:34::a:eb62:b01;PortChannel4068,fc00:34::a:eb62:8801;PortChannel4081,fc00:34::a:eb63:b01;PortChannel4094,fc00:34::a:eb63:8801;PortChannel4107,fc00:34::a:eb64:b01;PortChannel4120,fc00:34::a:eb64:8801
2603:10e2:400::1
StaticRouteIPNextHoplc00-ASIC01-V4PortChannel4003,10.235.96.12;PortChannel4016,10.235.96.137;PortChannel4029,10.235.97.12;PortChannel4042,10.235.97.137;PortChannel4055,10.235.98.12;PortChannel4068,10.235.98.137;PortChannel4081,10.235.99.12;PortChannel4094,10.235.99.137;PortChannel4107,10.235.100.12;PortChannel4120,10.235.100.137
192.0.0.2
StaticRouteIPNextHoplc00-ASIC01-V6PortChannel4003,fc00:34::a:eb60:c01;PortChannel4016,fc00:34::a:eb60:8901;PortChannel4029,fc00:34::a:eb61:c01;PortChannel4042,fc00:34::a:eb61:8901;PortChannel4055,fc00:34::a:eb62:c01;PortChannel4068,fc00:34::a:eb62:8901;PortChannel4081,fc00:34::a:eb63:c01;PortChannel4094,fc00:34::a:eb63:8901;PortChannel4107,fc00:34::a:eb64:c01;PortChannel4120,fc00:34::a:eb64:8901
2603:10e2:400::2
StaticRouteIPNextHoplc00-ASIC02-V4PortChannel4003,10.235.96.13;PortChannel4016,10.235.96.134;PortChannel4029,10.235.97.13;PortChannel4042,10.235.97.134;PortChannel4055,10.235.98.13;PortChannel4068,10.235.98.134;PortChannel4081,10.235.99.13;PortChannel4094,10.235.99.134;PortChannel4107,10.235.100.13;PortChannel4120,10.235.100.134
192.0.0.3
StaticRouteIPNextHoplc00-ASIC02-V6PortChannel4003,fc00:34::a:eb60:d01;PortChannel4016,fc00:34::a:eb60:8601;PortChannel4029,fc00:34::a:eb61:d01;PortChannel4042,fc00:34::a:eb61:8601;PortChannel4055,fc00:34::a:eb62:d01;PortChannel4068,fc00:34::a:eb62:8601;PortChannel4081,fc00:34::a:eb63:d01;PortChannel4094,fc00:34::a:eb63:8601;PortChannel4107,fc00:34::a:eb64:d01;PortChannel4120,fc00:34::a:eb64:8601
2603:10e2:400::3
StaticRouteIPNextHoplc01-ASIC00-V4PortChannel4003,10.235.96.9;PortChannel4016,10.235.96.140;PortChannel4029,10.235.97.9;PortChannel4042,10.235.97.140;PortChannel4055,10.235.98.9;PortChannel4068,10.235.98.140;PortChannel4081,10.235.99.9;PortChannel4094,10.235.99.140;PortChannel4107,10.235.100.9;PortChannel4120,10.235.100.140
192.0.0.4
StaticRouteIPNextHoplc01-ASIC00-V6PortChannel4003,fc00:34::a:eb60:901;PortChannel4016,fc00:34::a:eb60:8c01;PortChannel4029,fc00:34::a:eb61:901;PortChannel4042,fc00:34::a:eb61:8c01;PortChannel4055,fc00:34::a:eb62:901;PortChannel4068,fc00:34::a:eb62:8c01;PortChannel4081,fc00:34::a:eb63:901;PortChannel4094,fc00:34::a:eb63:8c01;PortChannel4107,fc00:34::a:eb64:901;PortChannel4120,fc00:34::a:eb64:8c01
2603:10e2:400::4
StaticRouteIPNextHoplc01-ASIC01-V4PortChannel4003,10.235.96.10;PortChannel4016,10.235.96.141;PortChannel4029,10.235.97.10;PortChannel4042,10.235.97.141;PortChannel4055,10.235.98.10;PortChannel4068,10.235.98.141;PortChannel4081,10.235.99.10;PortChannel4094,10.235.99.141;PortChannel4107,10.235.100.10;PortChannel4120,10.235.100.141
192.0.0.5
StaticRouteIPNextHoplc01-ASIC01-V6PortChannel4003,fc00:34::a:eb60:a01;PortChannel4016,fc00:34::a:eb60:8d01;PortChannel4029,fc00:34::a:eb61:a01;PortChannel4042,fc00:34::a:eb61:8d01;PortChannel4055,fc00:34::a:eb62:a01;PortChannel4068,fc00:34::a:eb62:8d01;PortChannel4081,fc00:34::a:eb63:a01;PortChannel4094,fc00:34::a:eb63:8d01;PortChannel4107,fc00:34::a:eb64:a01;PortChannel4120,fc00:34::a:eb64:8d01
2603:10e2:400::5
StaticRouteIPNextHoplc02-ASIC00-V4PortChannel4003,10.235.96.7;PortChannel4016,10.235.96.138;PortChannel4029,10.235.97.7;PortChannel4042,10.235.97.138;PortChannel4055,10.235.98.7;PortChannel4068,10.235.98.138;PortChannel4081,10.235.99.7;PortChannel4094,10.235.99.138;PortChannel4107,10.235.100.7;PortChannel4120,10.235.100.138
192.0.0.6
StaticRouteIPNextHoplc02-ASIC00-V6PortChannel4003,fc00:34::a:eb60:701;PortChannel4016,fc00:34::a:eb60:8a01;PortChannel4029,fc00:34::a:eb61:701;PortChannel4042,fc00:34::a:eb61:8a01;PortChannel4055,fc00:34::a:eb62:701;PortChannel4068,fc00:34::a:eb62:8a01;PortChannel4081,fc00:34::a:eb63:701;PortChannel4094,fc00:34::a:eb63:8a01;PortChannel4107,fc00:34::a:eb64:701;PortChannel4120,fc00:34::a:eb64:8a01
2603:10e2:400::6
StaticRouteIPNextHoplc02-ASIC01-V4PortChannel4003,10.235.96.6;PortChannel4016,10.235.96.139;PortChannel4029,10.235.97.6;PortChannel4042,10.235.97.139;PortChannel4055,10.235.98.6;PortChannel4068,10.235.98.139;PortChannel4081,10.235.99.6;PortChannel4094,10.235.99.139;PortChannel4107,10.235.100.6;PortChannel4120,10.235.100.139
192.0.0.7
StaticRouteIPNextHoplc02-ASIC01-V6PortChannel4003,fc00:34::a:eb60:601;PortChannel4016,fc00:34::a:eb60:8b01;PortChannel4029,fc00:34::a:eb61:601;PortChannel4042,fc00:34::a:eb61:8b01;PortChannel4055,fc00:34::a:eb62:601;PortChannel4068,fc00:34::a:eb62:8b01;PortChannel4081,fc00:34::a:eb63:601;PortChannel4094,fc00:34::a:eb63:8b01;PortChannel4107,fc00:34::a:eb64:601;PortChannel4120,fc00:34::a:eb64:8b01
2603:10e2:400::7
StaticRouteIPNextHoplc03-ASIC00-V4PortChannel4003,10.235.96.4;PortChannel4016,10.235.96.132;PortChannel4029,10.235.97.4;PortChannel4042,10.235.97.132;PortChannel4055,10.235.98.4;PortChannel4068,10.235.98.132;PortChannel4081,10.235.99.4;PortChannel4094,10.235.99.132;PortChannel4107,10.235.100.4;PortChannel4120,10.235.100.132
192.0.0.8
StaticRouteIPNextHoplc03-ASIC00-V6PortChannel4003,fc00:34::a:eb60:401;PortChannel4016,fc00:34::a:eb60:8401;PortChannel4029,fc00:34::a:eb61:401;PortChannel4042,fc00:34::a:eb61:8401;PortChannel4055,fc00:34::a:eb62:401;PortChannel4068,fc00:34::a:eb62:8401;PortChannel4081,fc00:34::a:eb63:401;PortChannel4094,fc00:34::a:eb63:8401;PortChannel4107,fc00:34::a:eb64:401;PortChannel4120,fc00:34::a:eb64:8401
2603:10e2:400::8
StaticRouteIPNextHoplc03-ASIC01-V4PortChannel4003,10.235.96.5;PortChannel4016,10.235.96.133;PortChannel4029,10.235.97.5;PortChannel4042,10.235.97.133;PortChannel4055,10.235.98.5;PortChannel4068,10.235.98.133;PortChannel4081,10.235.99.5;PortChannel4094,10.235.99.133;PortChannel4107,10.235.100.5;PortChannel4120,10.235.100.133
192.0.0.9
StaticRouteIPNextHoplc03-ASIC01-V6PortChannel4003,fc00:34::a:eb60:501;PortChannel4016,fc00:34::a:eb60:8501;PortChannel4029,fc00:34::a:eb61:501;PortChannel4042,fc00:34::a:eb61:8501;PortChannel4055,fc00:34::a:eb62:501;PortChannel4068,fc00:34::a:eb62:8501;PortChannel4081,fc00:34::a:eb63:501;PortChannel4094,fc00:34::a:eb63:8501;PortChannel4107,fc00:34::a:eb64:501;PortChannel4120,fc00:34::a:eb64:8501
2603:10e2:400::9
StaticRouteIPNextHoplc03-ASIC02-V4PortChannel4003,10.235.96.8;PortChannel4016,10.235.96.135;PortChannel4029,10.235.97.8;PortChannel4042,10.235.97.135;PortChannel4055,10.235.98.8;PortChannel4068,10.235.98.135;PortChannel4081,10.235.99.8;PortChannel4094,10.235.99.135;PortChannel4107,10.235.100.8;PortChannel4120,10.235.100.135
192.0.0.10
StaticRouteIPNextHoplc03-ASIC02-V6PortChannel4003,fc00:34::a:eb60:801;PortChannel4016,fc00:34::a:eb60:8701;PortChannel4029,fc00:34::a:eb61:801;PortChannel4042,fc00:34::a:eb61:8701;PortChannel4055,fc00:34::a:eb62:801;PortChannel4068,fc00:34::a:eb62:8701;PortChannel4081,fc00:34::a:eb63:801;PortChannel4094,fc00:34::a:eb63:8701;PortChannel4107,fc00:34::a:eb64:801;PortChannel4120,fc00:34::a:eb64:8701
2603:10e2:400::a
StaticRouteIPNextHoplc04-ASIC00-V4PortChannel4003,10.235.96.1;PortChannel4016,10.235.96.129;PortChannel4029,10.235.97.1;PortChannel4042,10.235.97.129;PortChannel4055,10.235.98.1;PortChannel4068,10.235.98.129;PortChannel4081,10.235.99.1;PortChannel4094,10.235.99.129;PortChannel4107,10.235.100.1;PortChannel4120,10.235.100.129
192.0.0.11
StaticRouteIPNextHoplc04-ASIC00-V6PortChannel4003,fc00:34::a:eb60:101;PortChannel4016,fc00:34::a:eb60:8101;PortChannel4029,fc00:34::a:eb61:101;PortChannel4042,fc00:34::a:eb61:8101;PortChannel4055,fc00:34::a:eb62:101;PortChannel4068,fc00:34::a:eb62:8101;PortChannel4081,fc00:34::a:eb63:101;PortChannel4094,fc00:34::a:eb63:8101;PortChannel4107,fc00:34::a:eb64:101;PortChannel4120,fc00:34::a:eb64:8101
2603:10e2:400::b
StaticRouteIPNextHoplc04-ASIC01-V4PortChannel4003,10.235.96.2;PortChannel4016,10.235.96.130;PortChannel4029,10.235.97.2;PortChannel4042,10.235.97.130;PortChannel4055,10.235.98.2;PortChannel4068,10.235.98.130;PortChannel4081,10.235.99.2;PortChannel4094,10.235.99.130;PortChannel4107,10.235.100.2;PortChannel4120,10.235.100.130
192.0.0.12
StaticRouteIPNextHoplc04-ASIC01-V6PortChannel4003,fc00:34::a:eb60:201;PortChannel4016,fc00:34::a:eb60:8201;PortChannel4029,fc00:34::a:eb61:201;PortChannel4042,fc00:34::a:eb61:8201;PortChannel4055,fc00:34::a:eb62:201;PortChannel4068,fc00:34::a:eb62:8201;PortChannel4081,fc00:34::a:eb63:201;PortChannel4094,fc00:34::a:eb63:8201;PortChannel4107,fc00:34::a:eb64:201;PortChannel4120,fc00:34::a:eb64:8201
2603:10e2:400::c
StaticRouteARISTA001T1:Ethernet1;STR2-temp-2-lc04-ASIC00:Eth16ChassisInternalTrueEndItfKeyHundredGigE0/4/0/2#0:4:0:2#2EndChassisPortNameHundredGigE0/4/0/2EndChassisIdSTR2-temp-2ARISTA001T1:Ethernet1;STR2-temp-2:HundredGigE0/4/0/2ARISTA001T1:Ethernet2;STR2-temp-2-lc04-ASIC00:Eth24ChassisInternalTrueEndItfKeyHundredGigE0/4/0/3#0:4:0:3#2EndChassisPortNameHundredGigE0/4/0/3EndChassisIdSTR2-temp-2ARISTA001T1:Ethernet2;STR2-temp-2:HundredGigE0/4/0/3ARISTA003T1:Ethernet1;STR2-temp-2-lc04-ASIC00:Eth48ChassisInternalTrueEndItfKeyHundredGigE0/4/0/6#0:4:0:6#2EndChassisPortNameHundredGigE0/4/0/6EndChassisIdSTR2-temp-2ARISTA003T1:Ethernet1;STR2-temp-2:HundredGigE0/4/0/6ARISTA004T1:Ethernet1;STR2-temp-2-lc04-ASIC02:Eth0ChassisInternalTrueEndItfKeyHundredGigE0/4/0/24#0:4:0:24#2EndChassisPortNameHundredGigE0/4/0/24EndChassisIdSTR2-temp-2ARISTA004T1:Ethernet1;STR2-temp-2:HundredGigE0/4/0/24ARISTA004T1:Ethernet2;STR2-temp-2-lc04-ASIC02:Eth8ChassisInternalTrueEndItfKeyHundredGigE0/4/0/25#0:4:0:25#2EndChassisPortNameHundredGigE0/4/0/25EndChassisIdSTR2-temp-2ARISTA004T1:Ethernet2;STR2-temp-2:HundredGigE0/4/0/25ARISTA006T1:Ethernet1;STR2-temp-2-lc04-ASIC02:Eth16ChassisInternalTrueEndItfKeyHundredGigE0/4/0/26#0:4:0:26#2EndChassisPortNameHundredGigE0/4/0/26EndChassisIdSTR2-temp-2ARISTA006T1:Ethernet1;STR2-temp-2:HundredGigE0/4/0/26ChassisInternalTruestr2-temp-2-lc04:console;str2-temp-2-sup00:logical4STR2-temp-2-lc04SubDevicesstr2-temp-2-lc04-ASIC00;str2-temp-2-lc04-ASIC01;str2-temp-2-lc04-ASIC02ParentRouterstr2-temp-2ForwardingMethodchassis-packetSlotIndex4SiblingLineCardsstr2-temp-2-lc00;str2-temp-2-lc01;str2-temp-2-lc02;str2-temp-2-lc03MacSecEnabledTrueServiceTreeFabric Network DevicesServiceTreeId1f135dd2-c080-47d3-9191-54b25fc26650HomeSTARLABCloudTypePublicFunctionLabTestOsVersionSONiC.20220532.45FirmwareProfileSONiC-Cisco-88-LC0-36FH-M-O36-lcGroupstr2-temp-2RegiontestDcCodeSTRLocationTBDDeploymentId3SonicEnabledTrueSTR2-temp-2-lc04-ASIC00AsicSwitchId12HomeSTARLABCloudTypePublicForwardingMethodchassis-packetFunctionLabTestGroupstr2-temp-2ProviderLineCardstr2-temp-2-lc04RegiontestSubRoleFrontEndDcCodeSTRLocationTBDDeploymentId3SonicEnabledTrueSTR2-temp-2-lc04-ASIC01AsicSwitchId13HomeSTARLABCloudTypePublicForwardingMethodchassis-packetFunctionLabTestGroupstr2-temp-2ProviderLineCardstr2-temp-2-lc04RegiontestSubRoleFrontEndDcCodeSTRLocationTBDDeploymentId3SonicEnabledTrueSTR2-temp-2-lc04-ASIC02AsicSwitchId14HomeSTARLABCloudTypePublicForwardingMethodchassis-packetFunctionLabTestGroupstr2-temp-2ProviderLineCardstr2-temp-2-lc04RegiontestSubRoleFrontEndDcCodeSTRLocationTBDDeploymentId3SonicEnabledTruestr2-temp-2HomeSTARLABCloudTypePublicConfigDbAclFileSonicNativeAcl.liquidConfigTemplateFileSonic.xmlDNSServers10.64.5.5;10.64.6.6;10.64.6.7ErspanDestinationIpv410.20.6.4FirmwareProfileSONiC-temp-RP-supFunctionLabTestGroupstr:-1848794319InitConfigTemplateFileSonic.init.xmlLoopback0Ipv410.3.0.1/32;10.3.0.2/32;10.3.0.3/32;10.3.0.4/32;10.3.0.5/32Loopback0Ipv6fc00:30::1/128;fc00:31::1/128;fc00:32::1/128;fc00:33::1/128;fc00:34::1/128Loopback4096Ipv4192.0.0.1/32;192.0.0.2/32;192.0.0.3/32;192.0.0.4/32;192.0.0.5/32;192.0.0.6/32;192.0.0.7/32;192.0.0.8/32;192.0.0.9/32;192.0.0.10/32;192.0.0.11/32;192.0.0.12/32;192.0.0.13/32Loopback4096Ipv62603:10e2:400::1/128;2603:10e2:400::2/128;2603:10e2:400::3/128;2603:10e2:400::4/128;2603:10e2:400::5/128;2603:10e2:400::6/128;2603:10e2:400::7/128;2603:10e2:400::8/128;2603:10e2:400::9/128;2603:10e2:400::a/128;2603:10e2:400::b/128;2603:10e2:400::c/128;2603:10e2:400::d/128MacSecEnabledTrueMacSecProfilePrimaryKey="macsec-profile-two" FallbackKey="macsec-profile" MacsecPolicy=""ManagementIpv410.3.146.199/24;10.3.146.200/24;10.3.146.201/24;10.3.146.205/24;10.3.146.214/24ManagementIpv62a01:111:e210:3000::a03:92c7/64;2a01:111:e210:3000::a03:92c8/64;2a01:111:e210:3000::a03:92c9/64;2a01:111:e210:3000::a03:92cd/64;2a01:111:e210:3000::a03:92d6/64MaxCountOfCores64NtpResources25.66.230.0;25.66.230.1;25.66.230.2;25.66.230.3;25.66.230.4;25.66.230.5OsVersionSONiC.20220532.45QosProfileVerlaineLongHaulRegiontestRemoteAuthenticationProtocolTacacsServiceTreeFabric Network DevicesServiceTreeId1f135dd2-c080-47d3-9191-54b25fc26650SnmpResources10.52.180.161;10.3.157.12SonicConfigTemplateFileSonic.xmlSyslogResources10.52.180.161;10.3.157.12SyslogServer10.20.4.167;10.20.7.33;10.20.6.16;10.20.6.84TacacsKey$Secrets.TacacsKeyTacacsSecurityLevel7TacacsServer10.3.145.14;10.3.145.15DcCodeSTRLocationTBDDeploymentId3SonicEnabledTrueChassisEnabledTrueSTR2-temp-2-lc00HomeSTARLABCloudTypePublicFirmwareProfileSONiC-Cisco-88-LC0-36FH-M-O36-lcForwardingMethodchassis-packetFunctionLabTestGroupstr2-temp-2MacSecEnabledTrueOsVersionSONiC.20220532.45ParentRouterstr2-temp-2RegiontestServiceTreeFabric Network DevicesServiceTreeId1f135dd2-c080-47d3-9191-54b25fc26650SiblingLineCardsstr2-temp-2-lc01;str2-temp-2-lc02;str2-temp-2-lc03;str2-temp-2-lc04SlotIndex0SubDevicesstr2-temp-2-lc00-ASIC00;str2-temp-2-lc00-ASIC01;str2-temp-2-lc00-ASIC02DcCodeSTRLocationTBDDeploymentId3SonicEnabledTrueSTR2-temp-2-lc01HomeSTARLABCloudTypePublicFirmwareProfileSONiC-Cisco-temp-LC-48H-C48-lcForwardingMethodchassis-packetFunctionLabTestGroupstr2-temp-2MacSecEnabledFalseOsVersionSONiC.20220532.45ParentRouterstr2-temp-2RegiontestServiceTreeFabric Network DevicesServiceTreeId1f135dd2-c080-47d3-9191-54b25fc26650SiblingLineCardsstr2-temp-2-lc00;str2-temp-2-lc02;str2-temp-2-lc03;str2-temp-2-lc04SlotIndex1SubDevicesstr2-temp-2-lc01-ASIC00;str2-temp-2-lc01-ASIC01DcCodeSTRLocationTBDDeploymentId3SonicEnabledTrueSTR2-temp-2-lc02HomeSTARLABCloudTypePublicFirmwareProfileSONiC-Cisco-temp-LC-48H-C48-lcForwardingMethodchassis-packetFunctionLabTestGroupstr2-temp-2MacSecEnabledFalseOsVersionSONiC.20220532.45ParentRouterstr2-temp-2RegiontestServiceTreeFabric Network DevicesServiceTreeId1f135dd2-c080-47d3-9191-54b25fc26650SiblingLineCardsstr2-temp-2-lc00;str2-temp-2-lc01;str2-temp-2-lc03;str2-temp-2-lc04SlotIndex2SubDevicesstr2-temp-2-lc02-ASIC00;str2-temp-2-lc02-ASIC01DcCodeSTRLocationTBDDeploymentId3SonicEnabledTrueSTR2-temp-2-lc03HomeSTARLABCloudTypePublicFirmwareProfileSONiC-Cisco-88-LC0-36FH-O36-lcForwardingMethodchassis-packetFunctionLabTestGroupstr2-temp-2MacSecEnabledFalseOsVersionSONiC.20220532.45ParentRouterstr2-temp-2RegiontestServiceTreeFabric Network DevicesServiceTreeId1f135dd2-c080-47d3-9191-54b25fc26650SiblingLineCardsstr2-temp-2-lc00;str2-temp-2-lc01;str2-temp-2-lc02;str2-temp-2-lc04SlotIndex3SubDevicesstr2-temp-2-lc03-ASIC00;str2-temp-2-lc03-ASIC01;str2-temp-2-lc03-ASIC02DcCodeSTRLocationTBDDeploymentId3SonicEnabledTrueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC13Eth100truestr2-temp-2-lc04-ASIC00Eth288trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC13Eth96truestr2-temp-2-lc04-ASIC00Eth292trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC11Eth100truestr2-temp-2-lc04-ASIC00Eth312trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC11Eth96truestr2-temp-2-lc04-ASIC00Eth316trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC12Eth96truestr2-temp-2-lc04-ASIC00Eth320trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC12Eth100truestr2-temp-2-lc04-ASIC00Eth324trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC09Eth96truestr2-temp-2-lc04-ASIC00Eth328trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC09Eth100truestr2-temp-2-lc04-ASIC00Eth332trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC10Eth96truestr2-temp-2-lc04-ASIC00Eth336trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC10Eth100truestr2-temp-2-lc04-ASIC00Eth340trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC08Eth100truestr2-temp-2-lc04-ASIC00Eth360trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC08Eth96truestr2-temp-2-lc04-ASIC00Eth364trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC04Eth100truestr2-temp-2-lc04-ASIC00Eth376trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC04Eth96truestr2-temp-2-lc04-ASIC00Eth380trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC05Eth100truestr2-temp-2-lc04-ASIC00Eth384trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC05Eth96truestr2-temp-2-lc04-ASIC00Eth388trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC00Eth100truestr2-temp-2-lc04-ASIC00Eth392trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC00Eth96truestr2-temp-2-lc04-ASIC00Eth396trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC01Eth100truestr2-temp-2-lc04-ASIC00Eth400trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC01Eth96truestr2-temp-2-lc04-ASIC00Eth404trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC13Eth108truestr2-temp-2-lc04-ASIC01Eth288trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC13Eth104truestr2-temp-2-lc04-ASIC01Eth292trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC11Eth108truestr2-temp-2-lc04-ASIC01Eth312trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC11Eth104truestr2-temp-2-lc04-ASIC01Eth316trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC12Eth108truestr2-temp-2-lc04-ASIC01Eth320trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC12Eth104truestr2-temp-2-lc04-ASIC01Eth324trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC09Eth104truestr2-temp-2-lc04-ASIC01Eth328trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC09Eth108truestr2-temp-2-lc04-ASIC01Eth332trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC10Eth104truestr2-temp-2-lc04-ASIC01Eth336trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC10Eth108truestr2-temp-2-lc04-ASIC01Eth340trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC08Eth108truestr2-temp-2-lc04-ASIC01Eth360trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC08Eth104truestr2-temp-2-lc04-ASIC01Eth364trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC04Eth108truestr2-temp-2-lc04-ASIC01Eth376trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC04Eth104truestr2-temp-2-lc04-ASIC01Eth380trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC05Eth108truestr2-temp-2-lc04-ASIC01Eth384trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC05Eth104truestr2-temp-2-lc04-ASIC01Eth388trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC01Eth108truestr2-temp-2-lc04-ASIC01Eth392trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC01Eth104truestr2-temp-2-lc04-ASIC01Eth396trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC00Eth108truestr2-temp-2-lc04-ASIC01Eth400trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC00Eth104truestr2-temp-2-lc04-ASIC01Eth404trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC13Eth112truestr2-temp-2-lc04-ASIC02Eth288trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC13Eth116truestr2-temp-2-lc04-ASIC02Eth292trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC11Eth112truestr2-temp-2-lc04-ASIC02Eth312trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC11Eth116truestr2-temp-2-lc04-ASIC02Eth316trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC12Eth112truestr2-temp-2-lc04-ASIC02Eth320trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC12Eth116truestr2-temp-2-lc04-ASIC02Eth324trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC09Eth112truestr2-temp-2-lc04-ASIC02Eth328trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC09Eth116truestr2-temp-2-lc04-ASIC02Eth332trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC10Eth112truestr2-temp-2-lc04-ASIC02Eth336trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC10Eth116truestr2-temp-2-lc04-ASIC02Eth340trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC08Eth112truestr2-temp-2-lc04-ASIC02Eth360trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC08Eth116truestr2-temp-2-lc04-ASIC02Eth364trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC04Eth112truestr2-temp-2-lc04-ASIC02Eth376trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC04Eth116truestr2-temp-2-lc04-ASIC02Eth380trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC05Eth112truestr2-temp-2-lc04-ASIC02Eth384trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC05Eth116truestr2-temp-2-lc04-ASIC02Eth388trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC00Eth112truestr2-temp-2-lc04-ASIC02Eth392trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC00Eth116truestr2-temp-2-lc04-ASIC02Eth396trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC01Eth112truestr2-temp-2-lc04-ASIC02Eth400trueBackendFabricLink200000falsestr2-temp-2-sup00-ASIC01Eth116truestr2-temp-2-lc04-ASIC02Eth404trueDeviceInterfaceLink100000trueSTR2-temp-2-lc04-ASIC00Eth16trueARISTA001T1Ethernet1trueDeviceInterfaceLink100000trueSTR2-temp-2-lc04-ASIC00Eth24trueARISTA001T1Ethernet2trueDeviceInterfaceLink100000trueSTR2-temp-2-lc04-ASIC00Eth48trueARISTA003T1Ethernet1trueDeviceInterfaceLink100000trueSTR2-temp-2-lc04-ASIC02Eth0trueARISTA004T1Ethernet1trueDeviceInterfaceLink100000trueSTR2-temp-2-lc04-ASIC02Eth8trueARISTA004T1Ethernet2trueDeviceInterfaceLink100000trueSTR2-temp-2-lc04-ASIC02Eth16trueARISTA006T1Ethernet1trueDeviceSerialLink115200truestr2-temp-2-sup00logical4truestr2-temp-2-lc04consoletrue4Linecard
10.3.0.5/32
fc00:34::1/128TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB10.3.146.214/242a01:111:e210:3000::a03:92d6/64STR2-temp-2-lc04Cisco-88-LC0-36FH-M-O36LeafRouter
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB172.16.148.116/17::/0ARISTA001T1Arista-7260QX-64LeafRouter
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB172.16.148.117/17::/0ARISTA003T1Arista-7260QX-64LeafRouter
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB172.16.148.118/17::/0ARISTA004T1Arista-7260QX-64LeafRouter
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB172.16.148.119/17::/0ARISTA006T1Arista-7260QX-64LinecardAsic
10.3.0.5/32
fc00:34::1/128TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB0.0.0.0/0::/0STR2-temp-2-lc04-ASIC00Cisco-Q200LinecardAsic
10.3.0.5/32
fc00:34::1/128TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB0.0.0.0/0::/0STR2-temp-2-lc04-ASIC01Cisco-Q200LinecardAsic
10.3.0.5/32
fc00:34::1/128TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB0.0.0.0/0::/0STR2-temp-2-lc04-ASIC02Cisco-Q200SpineRouter
10.3.0.5/32
fc00:34::1/128TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB10.3.146.198/242a01:111:e210:3000::a03:92c6/64str2-temp-2Test-Sonic-StarLab0FabricAsic
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB0.0.0.0/0::/0STR2-temp-2-sup00-ASIC00Cisco-FC200FabricAsic
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB0.0.0.0/0::/0STR2-temp-2-sup00-ASIC01Cisco-FC200FabricAsic
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB0.0.0.0/0::/0STR2-temp-2-sup00-ASIC04Cisco-FC200FabricAsic
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB0.0.0.0/0::/0STR2-temp-2-sup00-ASIC05Cisco-FC200FabricAsic
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB0.0.0.0/0::/0STR2-temp-2-sup00-ASIC08Cisco-FC200FabricAsic
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB0.0.0.0/0::/0STR2-temp-2-sup00-ASIC09Cisco-FC200FabricAsic
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB0.0.0.0/0::/0STR2-temp-2-sup00-ASIC10Cisco-FC200FabricAsic
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB0.0.0.0/0::/0STR2-temp-2-sup00-ASIC11Cisco-FC200FabricAsic
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB0.0.0.0/0::/0STR2-temp-2-sup00-ASIC12Cisco-FC200FabricAsic
0.0.0.0/0
::/0TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB0.0.0.0/0::/0STR2-temp-2-sup00-ASIC13Cisco-FC200Supervisor
10.3.0.5/32
fc00:34::1/128TestbedForStr2-temp-2TestbedForStr2-temp-2NoneTestbedForStr2-temp-23TBDSTARLAB10.3.146.198/242a01:111:e210:3000::a03:92c6/64STR2-temp-2-sup00temp-RPSTR2-temp-2-lc04Cisco-88-LC0-36FH-M-O36de6e10706a2ba45106d3f664a89b39403bb3b9f0 diff --git a/src/sonic-config-engine/tests/sample_output/platform_output.json b/src/sonic-config-engine/tests/sample_output/platform_output.json index 51c26754e98..b820717499a 100644 --- a/src/sonic-config-engine/tests/sample_output/platform_output.json +++ b/src/sonic-config-engine/tests/sample_output/platform_output.json @@ -976,7 +976,8 @@ "alias": "Eth36/1", "pfc_asym": "off", "subport": "1", - "speed": "25000" + "speed": "25000", + "role": "Dpc" }, "Ethernet141": { "index": "36", @@ -987,7 +988,8 @@ "alias": "Eth36/2", "pfc_asym": "off", "speed": "25000", - "subport": "2" + "subport": "2", + "role": "Dpc" }, "Ethernet142": { "index": "36", diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf index 3828af13fd7..11272757855 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf @@ -67,10 +67,10 @@ router bgp 65100 ! ! address-family ipv4 - maximum-paths 64 + maximum-paths 514 exit-address-family address-family ipv6 - maximum-paths 64 + maximum-paths 514 exit-address-family ! ! end of template: bgpd/bgpd.main.conf.j2 diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf index 45cd03a540a..ab7f99d43cd 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf @@ -76,10 +76,10 @@ router bgp 65100 ! ! address-family ipv4 - maximum-paths 64 + maximum-paths 514 exit-address-family address-family ipv6 - maximum-paths 64 + maximum-paths 514 exit-address-family ! ! end of template: bgpd/bgpd.main.conf.j2 diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf new file mode 100644 index 00000000000..827b287e57f --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf @@ -0,0 +1,89 @@ +! +! template: bgpd/bgpd.conf.j2 +! +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/bgpd.conf.j2 with config DB data +! file: bgpd.conf +! +! +! template: common/daemons.common.conf.j2 +! +hostname switch-t0 +password zebra +enable password zebra +! +log syslog informational +log facility local4 +! +! end of template: common/daemons.common.conf.j2! +agentx +! +! +! +! template: bgpd/bgpd.main.conf.j2 +! +! bgp multiple-instance +! +! BGP configuration +! +! TSA configuration +! +ip prefix-list PL_LoopbackV4 permit 10.1.0.32/32 +! +ipv6 prefix-list PL_LoopbackV6 permit fc00:1::/64 +! +ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 5 permit 192.168.0.0/27 +! +ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27 +! +! +! +router bgp 65100 +! + bgp log-neighbor-changes + bgp suppress-fib-pending + no bgp default ipv4-unicast + no bgp ebgp-requires-policy +! + bgp bestpath as-path multipath-relax +! + bgp graceful-restart restart-time 240 + bgp graceful-restart + bgp graceful-restart preserve-fw-state + bgp graceful-restart select-defer-time 45 +! +! + bmp mirror buffer-limit 4294967214 +! + bmp targets sonic-bmp + bmp stats interval 1000 + bmp monitor ipv4 unicast pre-policy + bmp monitor ipv6 unicast pre-policy + bmp connect 127.0.0.1 port 5000 min-retry 1000 max-retry 2000 +! +! + bgp router-id 10.1.0.32 +! + network 10.1.0.32/32 +! + address-family ipv6 + network fc00:1::32/64 + exit-address-family +! + network 192.168.0.1/27 + network 192.168.200.1/27 +! +! +! + address-family ipv4 + maximum-paths 514 + exit-address-family + address-family ipv6 + maximum-paths 514 + exit-address-family +! +! end of template: bgpd/bgpd.main.conf.j2 +!! +! end of template: bgpd/bgpd.conf.j2 +! diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf index eda11ab9f28..fb1af604c40 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf @@ -68,10 +68,10 @@ router bgp 65100 ! ! address-family ipv4 - maximum-paths 64 + maximum-paths 514 exit-address-family address-family ipv6 - maximum-paths 64 + maximum-paths 514 exit-address-family ! ! end of template: bgpd/bgpd.main.conf.j2 diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf index 8daeff2a61e..b84ff10f590 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf @@ -82,10 +82,10 @@ router bgp 65100 exit-address-family ! address-family ipv4 - maximum-paths 64 + maximum-paths 514 exit-address-family address-family ipv6 - maximum-paths 64 + maximum-paths 514 exit-address-family ! ! end of template: bgpd/bgpd.main.conf.j2 diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_quagga.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_quagga.conf index 43e8ade6a30..fb8bd1d9d9d 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_quagga.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_quagga.conf @@ -35,7 +35,7 @@ router bgp 65100 neighbor 10.0.0.59 allowas-in 1 neighbor 10.0.0.59 activate neighbor 10.0.0.59 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor 10.0.0.61 remote-as 64600 neighbor 10.0.0.61 description ARISTA03T1 @@ -43,7 +43,7 @@ router bgp 65100 neighbor 10.0.0.61 allowas-in 1 neighbor 10.0.0.61 activate neighbor 10.0.0.61 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor 10.0.0.63 remote-as 64600 neighbor 10.0.0.63 description ARISTA04T1 @@ -51,7 +51,7 @@ router bgp 65100 neighbor 10.0.0.63 allowas-in 1 neighbor 10.0.0.63 activate neighbor 10.0.0.63 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor fc00::7e remote-as 64600 neighbor fc00::7e description ARISTA04T1 @@ -59,7 +59,7 @@ router bgp 65100 neighbor fc00::7e allowas-in 1 neighbor fc00::7e activate neighbor fc00::7e soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor fc00::7a remote-as 64600 neighbor fc00::7a description ARISTA03T1 @@ -67,7 +67,7 @@ router bgp 65100 neighbor fc00::7a allowas-in 1 neighbor fc00::7a activate neighbor fc00::7a soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor 10.0.0.57 remote-as 64600 neighbor 10.0.0.57 description ARISTA01T1 @@ -75,7 +75,7 @@ router bgp 65100 neighbor 10.0.0.57 allowas-in 1 neighbor 10.0.0.57 activate neighbor 10.0.0.57 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor fc00::76 remote-as 64600 neighbor fc00::76 description ARISTA02T1 @@ -83,7 +83,7 @@ router bgp 65100 neighbor fc00::76 allowas-in 1 neighbor fc00::76 activate neighbor fc00::76 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor fc00::72 remote-as 64600 neighbor fc00::72 description ARISTA01T1 @@ -91,10 +91,10 @@ router bgp 65100 neighbor fc00::72 allowas-in 1 neighbor fc00::72 activate neighbor fc00::72 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family ! -maximum-paths 64 +maximum-paths 514 ! route-map ISOLATE permit 10 set as-path prepend 65100 diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json index 661fd8cc28c..8a1163f95f7 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json @@ -57,7 +57,7 @@ "size": "6441610000", "type": "both", "mode": "dynamic", - "xoff": "20761804" + "xoff": "1056256819" } }, "BUFFER_PROFILE": { diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffers-mellanox2410-dynamic.json b/src/sonic-config-engine/tests/sample_output/py2/buffers-mellanox2410-dynamic.json index 1cb60747fc3..2f6fa6584cb 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffers-mellanox2410-dynamic.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffers-mellanox2410-dynamic.json @@ -1302,7 +1302,7 @@ "LOSSLESS_TRAFFIC_PATTERN": { "AZURE": { "mtu": "1024", - "small_packet_percentage": "100" + "small_packet_percentage": "50" } } } diff --git a/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-no-ip-helper.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-no-ip-helper.supervisord.conf index c5882ad148c..3e77a6db982 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-no-ip-helper.supervisord.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-no-ip-helper.supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -47,8 +51,10 @@ command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /t priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -58,8 +64,10 @@ command=/usr/sbin/dhcp6relay priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -71,8 +79,10 @@ command=/usr/sbin/dhcpmon -id Vlan1000 -iu Vlan2000 -iu PortChannel02 -iu PortCh priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running @@ -81,7 +91,9 @@ command=/usr/local/bin/dhcprelayd priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-secondary-subnets.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-secondary-subnets.supervisord.conf index 4f28edaa4aa..83911f477d7 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-secondary-subnets.supervisord.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-secondary-subnets.supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -47,8 +51,10 @@ command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /t priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -57,8 +63,10 @@ command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /t priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -68,8 +76,10 @@ command=/usr/sbin/dhcp6relay priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -81,8 +91,10 @@ command=/usr/sbin/dhcpmon -id Vlan1000 -iu Vlan2000 -iu PortChannel02 -iu PortCh priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running @@ -91,8 +103,10 @@ command=/usr/sbin/dhcpmon -id Vlan2000 -iu Vlan1000 -iu Vlan1000 -iu PortChannel priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running @@ -101,7 +115,9 @@ command=/usr/local/bin/dhcprelayd priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay.supervisord.conf index d2b6e4a5637..f88edb3e6c9 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay.supervisord.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay.supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -47,8 +51,10 @@ command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /t priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -57,8 +63,10 @@ command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /t priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -68,8 +76,10 @@ command=/usr/sbin/dhcp6relay priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -81,8 +91,10 @@ command=/usr/sbin/dhcpmon -id Vlan1000 -iu Vlan2000 -iu PortChannel02 -iu PortCh priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running @@ -91,8 +103,10 @@ command=/usr/sbin/dhcpmon -id Vlan2000 -iu Vlan1000 -iu PortChannel02 -iu PortCh priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running @@ -101,7 +115,9 @@ command=/usr/local/bin/dhcprelayd priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/src/sonic-config-engine/tests/sample_output/py2/frr.conf b/src/sonic-config-engine/tests/sample_output/py2/frr.conf index 032adb8c510..679871f68a2 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/frr.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/frr.conf @@ -87,10 +87,10 @@ router bgp 65100 ! ! address-family ipv4 - maximum-paths 64 + maximum-paths 514 exit-address-family address-family ipv6 - maximum-paths 64 + maximum-paths 514 exit-address-family ! ! end of template: bgpd/bgpd.main.conf.j2 diff --git a/src/sonic-config-engine/tests/sample_output/py2/l1_intfs.json b/src/sonic-config-engine/tests/sample_output/py2/l1_intfs.json index 634b936fede..b789c792069 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/l1_intfs.json +++ b/src/sonic-config-engine/tests/sample_output/py2/l1_intfs.json @@ -261,7 +261,6 @@ "FLEX_COUNTER_TABLE": { "ACL": { "FLEX_COUNTER_STATUS": "disable", - "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" } } diff --git a/src/sonic-config-engine/tests/sample_output/py2/l2switch.json b/src/sonic-config-engine/tests/sample_output/py2/l2switch.json index 5c38ba7201f..de774b0ae58 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/l2switch.json +++ b/src/sonic-config-engine/tests/sample_output/py2/l2switch.json @@ -268,7 +268,6 @@ "FLEX_COUNTER_TABLE": { "ACL": { "FLEX_COUNTER_STATUS": "disable", - "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" } } diff --git a/src/sonic-config-engine/tests/sample_output/py2/l2switch_dualtor.json b/src/sonic-config-engine/tests/sample_output/py2/l2switch_dualtor.json index 606a30672d9..5aa60f22c48 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/l2switch_dualtor.json +++ b/src/sonic-config-engine/tests/sample_output/py2/l2switch_dualtor.json @@ -520,7 +520,7 @@ }, "LOOPBACK_INTERFACE": { "Loopback2": {}, - "Loopback2|3.3.3.3": {} + "Loopback2|3.3.3.3/32": {} }, "MUX_CABLE": { "Ethernet0": { @@ -647,7 +647,6 @@ "FLEX_COUNTER_TABLE": { "ACL": { "FLEX_COUNTER_STATUS": "disable", - "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" } } diff --git a/src/sonic-config-engine/tests/sample_output/py2/l3_intfs.json b/src/sonic-config-engine/tests/sample_output/py2/l3_intfs.json index 7357c28fbef..81dd3afeab3 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/l3_intfs.json +++ b/src/sonic-config-engine/tests/sample_output/py2/l3_intfs.json @@ -301,7 +301,6 @@ "FLEX_COUNTER_TABLE": { "ACL": { "FLEX_COUNTER_STATUS": "disable", - "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" } } diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf index 32a9abf88ba..0b0446aad9e 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf @@ -35,7 +35,7 @@ router bgp 4000 vrf VnetFE address-family ipv4 unicast neighbor 192.168.0.1 activate neighbor 192.168.0.1 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family address-family l2vpn evpn advertise ipv4 unicast @@ -74,10 +74,10 @@ router bgp 4000 ! ! address-family ipv4 - maximum-paths 64 + maximum-paths 514 exit-address-family address-family ipv6 - maximum-paths 64 + maximum-paths 514 exit-address-family ! ! end of template: bgpd/bgpd.main.conf.j2 diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf index 4cdb8bceaba..0761e4b2049 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf @@ -8,6 +8,7 @@ no fpm use-next-hop-groups ! fpm address 127.0.0.1 +zebra nexthop-group keep 1 ! ! template: common/daemons.common.conf.j2 ! diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf index ca56e9ca0fd..ad04eacbc8c 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf @@ -8,6 +8,7 @@ no fpm use-next-hop-groups ! fpm address 127.0.0.1 +zebra nexthop-group keep 1 ! ! template: common/daemons.common.conf.j2 ! diff --git a/src/sonic-config-engine/tests/sample_output/py2/wait_for_intf.sh b/src/sonic-config-engine/tests/sample_output/py2/wait_for_intf.sh index 1d58bc956bd..724e0487725 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/wait_for_intf.sh +++ b/src/sonic-config-engine/tests/sample_output/py2/wait_for_intf.sh @@ -21,32 +21,12 @@ function wait_until_iface_ready echo "Interface ${IFACE_NAME} is ready!" } -function check_for_ipv6_link_local -{ - IFACE_NAME=$1 - echo "Waiting until interface ${IFACE_NAME} has a link-local ipv6 address configured...." - - # Status of link local address is not populated in STATE_DB - while true; do - HAS_LL=$(ip -6 addr show ${IFACE_NAME} scope link 2> /dev/null) - RC=$? - if [[ ${RC} == "0" ]] && [[ ! -z ${HAS_LL} ]]; then - break - fi - - sleep 1 - done - - echo "Link-Local address is configured on ${IFACE_NAME}" -} - # Wait for all interfaces with IPv4 addresses to be up and ready # dhcp6relay binds to ipv6 addresses configured on these vlan ifaces # Thus check if they are ready before launching dhcp6relay wait_until_iface_ready Vlan2000 192.168.200.1/27 wait_until_iface_ready Vlan1000 192.168.0.1/27 wait_until_iface_ready Vlan1000 fc02:2000::2/24 -check_for_ipv6_link_local Vlan1000 wait_until_iface_ready PortChannel02 10.0.0.58/31 wait_until_iface_ready PortChannel03 10.0.0.60/31 wait_until_iface_ready PortChannel04 10.0.0.62/31 diff --git a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf index 9d0ab16ee38..129a98e3c23 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf @@ -8,6 +8,7 @@ no fpm use-next-hop-groups ! fpm address 127.0.0.1 +zebra nexthop-group keep 1 ! ! template: common/daemons.common.conf.j2 ! diff --git a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf index 4a23467ce21..a6cf1c42b07 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf @@ -8,6 +8,7 @@ no fpm use-next-hop-groups ! fpm address 127.0.0.1 +zebra nexthop-group keep 1 ! ! template: common/daemons.common.conf.j2 ! diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf index e5ad8964454..5db248ab852 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf @@ -67,10 +67,10 @@ router bgp 65100 ! ! address-family ipv4 - maximum-paths 64 + maximum-paths 514 exit-address-family address-family ipv6 - maximum-paths 64 + maximum-paths 514 exit-address-family ! ! end of template: bgpd/bgpd.main.conf.j2 diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf index 45cd03a540a..ab7f99d43cd 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf @@ -76,10 +76,10 @@ router bgp 65100 ! ! address-family ipv4 - maximum-paths 64 + maximum-paths 514 exit-address-family address-family ipv6 - maximum-paths 64 + maximum-paths 514 exit-address-family ! ! end of template: bgpd/bgpd.main.conf.j2 diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf new file mode 100644 index 00000000000..827b287e57f --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf @@ -0,0 +1,89 @@ +! +! template: bgpd/bgpd.conf.j2 +! +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/bgpd.conf.j2 with config DB data +! file: bgpd.conf +! +! +! template: common/daemons.common.conf.j2 +! +hostname switch-t0 +password zebra +enable password zebra +! +log syslog informational +log facility local4 +! +! end of template: common/daemons.common.conf.j2! +agentx +! +! +! +! template: bgpd/bgpd.main.conf.j2 +! +! bgp multiple-instance +! +! BGP configuration +! +! TSA configuration +! +ip prefix-list PL_LoopbackV4 permit 10.1.0.32/32 +! +ipv6 prefix-list PL_LoopbackV6 permit fc00:1::/64 +! +ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 5 permit 192.168.0.0/27 +! +ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27 +! +! +! +router bgp 65100 +! + bgp log-neighbor-changes + bgp suppress-fib-pending + no bgp default ipv4-unicast + no bgp ebgp-requires-policy +! + bgp bestpath as-path multipath-relax +! + bgp graceful-restart restart-time 240 + bgp graceful-restart + bgp graceful-restart preserve-fw-state + bgp graceful-restart select-defer-time 45 +! +! + bmp mirror buffer-limit 4294967214 +! + bmp targets sonic-bmp + bmp stats interval 1000 + bmp monitor ipv4 unicast pre-policy + bmp monitor ipv6 unicast pre-policy + bmp connect 127.0.0.1 port 5000 min-retry 1000 max-retry 2000 +! +! + bgp router-id 10.1.0.32 +! + network 10.1.0.32/32 +! + address-family ipv6 + network fc00:1::32/64 + exit-address-family +! + network 192.168.0.1/27 + network 192.168.200.1/27 +! +! +! + address-family ipv4 + maximum-paths 514 + exit-address-family + address-family ipv6 + maximum-paths 514 + exit-address-family +! +! end of template: bgpd/bgpd.main.conf.j2 +!! +! end of template: bgpd/bgpd.conf.j2 +! diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf index 0ada9a4f8d6..2d769fc05dd 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf @@ -68,10 +68,10 @@ router bgp 65100 ! ! address-family ipv4 - maximum-paths 64 + maximum-paths 514 exit-address-family address-family ipv6 - maximum-paths 64 + maximum-paths 514 exit-address-family ! ! end of template: bgpd/bgpd.main.conf.j2 diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf index 8daeff2a61e..b84ff10f590 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf @@ -82,10 +82,10 @@ router bgp 65100 exit-address-family ! address-family ipv4 - maximum-paths 64 + maximum-paths 514 exit-address-family address-family ipv6 - maximum-paths 64 + maximum-paths 514 exit-address-family ! ! end of template: bgpd/bgpd.main.conf.j2 diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_quagga.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_quagga.conf index 72988e55526..6c273447393 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_quagga.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_quagga.conf @@ -35,7 +35,7 @@ router bgp 65100 neighbor 10.0.0.57 allowas-in 1 neighbor 10.0.0.57 activate neighbor 10.0.0.57 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor fc00::72 remote-as 64600 neighbor fc00::72 description ARISTA01T1 @@ -43,7 +43,7 @@ router bgp 65100 neighbor fc00::72 allowas-in 1 neighbor fc00::72 activate neighbor fc00::72 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor 10.0.0.59 remote-as 64600 neighbor 10.0.0.59 description ARISTA02T1 @@ -51,7 +51,7 @@ router bgp 65100 neighbor 10.0.0.59 allowas-in 1 neighbor 10.0.0.59 activate neighbor 10.0.0.59 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor fc00::76 remote-as 64600 neighbor fc00::76 description ARISTA02T1 @@ -59,7 +59,7 @@ router bgp 65100 neighbor fc00::76 allowas-in 1 neighbor fc00::76 activate neighbor fc00::76 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor 10.0.0.61 remote-as 64600 neighbor 10.0.0.61 description ARISTA03T1 @@ -67,7 +67,7 @@ router bgp 65100 neighbor 10.0.0.61 allowas-in 1 neighbor 10.0.0.61 activate neighbor 10.0.0.61 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor fc00::7a remote-as 64600 neighbor fc00::7a description ARISTA03T1 @@ -75,7 +75,7 @@ router bgp 65100 neighbor fc00::7a allowas-in 1 neighbor fc00::7a activate neighbor fc00::7a soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor 10.0.0.63 remote-as 64600 neighbor 10.0.0.63 description ARISTA04T1 @@ -83,7 +83,7 @@ router bgp 65100 neighbor 10.0.0.63 allowas-in 1 neighbor 10.0.0.63 activate neighbor 10.0.0.63 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family neighbor fc00::7e remote-as 64600 neighbor fc00::7e description ARISTA04T1 @@ -91,10 +91,10 @@ router bgp 65100 neighbor fc00::7e allowas-in 1 neighbor fc00::7e activate neighbor fc00::7e soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family ! -maximum-paths 64 +maximum-paths 514 ! route-map ISOLATE permit 10 set as-path prepend 65100 diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7050cx3-dualtor-remap-disabled.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7050cx3-dualtor-remap-disabled.json index 54e7e8167b4..9989890914e 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7050cx3-dualtor-remap-disabled.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7050cx3-dualtor-remap-disabled.json @@ -62,7 +62,7 @@ "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "32689152", + "size": "32441856", "type": "ingress", "mode": "dynamic", "xoff": "2058240" @@ -73,7 +73,7 @@ "mode": "dynamic" }, "egress_lossless_pool": { - "size": "32340992", + "size": "32441856", "type": "egress", "mode": "static" } @@ -82,12 +82,12 @@ "ingress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"32689152" + "static_th":"32441856" }, "egress_lossless_profile": { "pool":"egress_lossless_pool", "size":"0", - "static_th":"32340992" + "static_th":"32441856" }, "egress_lossy_profile": { "pool":"egress_lossy_pool", diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7050cx3-dualtor.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7050cx3-dualtor.json index 4b55f2bbe82..994e276ce11 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7050cx3-dualtor.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7050cx3-dualtor.json @@ -62,7 +62,7 @@ "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "32689152", + "size": "32441856", "type": "ingress", "mode": "dynamic", "xoff": "2058240" @@ -73,7 +73,7 @@ "mode": "dynamic" }, "egress_lossless_pool": { - "size": "32340992", + "size": "32441856", "type": "egress", "mode": "static" } @@ -82,12 +82,12 @@ "ingress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"32689152" + "static_th":"32441856" }, "egress_lossless_profile": { "pool":"egress_lossless_pool", "size":"0", - "static_th":"32340992" + "static_th":"32441856" }, "egress_lossy_profile": { "pool":"egress_lossy_pool", diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json index 661fd8cc28c..8a1163f95f7 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json @@ -57,7 +57,7 @@ "size": "6441610000", "type": "both", "mode": "dynamic", - "xoff": "20761804" + "xoff": "1056256819" } }, "BUFFER_PROFILE": { diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox2410-dynamic.json b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox2410-dynamic.json index 109389c9504..40e57b993e3 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox2410-dynamic.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox2410-dynamic.json @@ -1302,7 +1302,7 @@ "LOSSLESS_TRAFFIC_PATTERN": { "AZURE": { "mtu": "1024", - "small_packet_percentage": "100" + "small_packet_percentage": "50" } } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic-remap-disabled.json b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic-remap-disabled.json index c70d257b3a8..44dce591281 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic-remap-disabled.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic-remap-disabled.json @@ -2002,7 +2002,7 @@ "LOSSLESS_TRAFFIC_PATTERN": { "AZURE": { "mtu": "1024", - "small_packet_percentage": "100" + "small_packet_percentage": "50" } } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic.json b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic.json index a784d0e0cff..d653ef10eac 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic.json @@ -2038,7 +2038,7 @@ "LOSSLESS_TRAFFIC_PATTERN": { "AZURE": { "mtu": "1024", - "small_packet_percentage": "100" + "small_packet_percentage": "50" } } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic-remap-disabled.json b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic-remap-disabled.json index 4adfa363eed..5d34084e44d 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic-remap-disabled.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic-remap-disabled.json @@ -1475,7 +1475,7 @@ "LOSSLESS_TRAFFIC_PATTERN": { "AZURE": { "mtu": "1024", - "small_packet_percentage": "100" + "small_packet_percentage": "50" } } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic.json b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic.json index d036b2d723b..670cb7cd156 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic.json @@ -1654,7 +1654,7 @@ "LOSSLESS_TRAFFIC_PATTERN": { "AZURE": { "mtu": "1024", - "small_packet_percentage": "100" + "small_packet_percentage": "50" } } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-no-ip-helper.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-no-ip-helper.supervisord.conf index 80a26d8e660..5455e6fef31 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-no-ip-helper.supervisord.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-no-ip-helper.supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -47,8 +51,10 @@ command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /t priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -58,8 +64,10 @@ command=/usr/sbin/dhcp6relay priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -71,8 +79,10 @@ command=/usr/sbin/dhcpmon -id Vlan1000 -iu Vlan2000 -iu PortChannel01 -iu PortCh priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running @@ -81,7 +91,9 @@ command=/usr/local/bin/dhcprelayd priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-secondary-subnets.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-secondary-subnets.supervisord.conf index 80a172ef25a..60c173b35e4 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-secondary-subnets.supervisord.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-secondary-subnets.supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -47,8 +51,10 @@ command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /t priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -57,8 +63,10 @@ command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /t priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -68,8 +76,10 @@ command=/usr/sbin/dhcp6relay priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -81,8 +91,10 @@ command=/usr/sbin/dhcpmon -id Vlan1000 -iu Vlan2000 -iu PortChannel01 -iu PortCh priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running @@ -91,8 +103,10 @@ command=/usr/sbin/dhcpmon -id Vlan2000 -iu Vlan1000 -iu Vlan1000 -iu PortChannel priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running @@ -101,7 +115,9 @@ command=/usr/local/bin/dhcprelayd priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay.supervisord.conf index dd8371b5944..3a1c79da998 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay.supervisord.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay.supervisord.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -47,8 +51,10 @@ command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /t priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -57,8 +63,10 @@ command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /t priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -68,8 +76,10 @@ command=/usr/sbin/dhcp6relay priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -81,8 +91,10 @@ command=/usr/sbin/dhcpmon -id Vlan1000 -iu Vlan2000 -iu PortChannel01 -iu PortCh priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running @@ -91,8 +103,10 @@ command=/usr/sbin/dhcpmon -id Vlan2000 -iu Vlan1000 -iu PortChannel01 -iu PortCh priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running @@ -101,7 +115,9 @@ command=/usr/local/bin/dhcprelayd priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited diff --git a/src/sonic-config-engine/tests/sample_output/py3/frr.conf b/src/sonic-config-engine/tests/sample_output/py3/frr.conf index d0821f1b11c..17d7f561db0 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/frr.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/frr.conf @@ -87,10 +87,10 @@ router bgp 65100 ! ! address-family ipv4 - maximum-paths 64 + maximum-paths 514 exit-address-family address-family ipv6 - maximum-paths 64 + maximum-paths 514 exit-address-family ! ! end of template: bgpd/bgpd.main.conf.j2 diff --git a/src/sonic-config-engine/tests/sample_output/py3/l1_intfs.json b/src/sonic-config-engine/tests/sample_output/py3/l1_intfs.json index 634b936fede..b789c792069 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/l1_intfs.json +++ b/src/sonic-config-engine/tests/sample_output/py3/l1_intfs.json @@ -261,7 +261,6 @@ "FLEX_COUNTER_TABLE": { "ACL": { "FLEX_COUNTER_STATUS": "disable", - "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/l2switch.json b/src/sonic-config-engine/tests/sample_output/py3/l2switch.json index fa3363ab749..0ed50c624b2 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/l2switch.json +++ b/src/sonic-config-engine/tests/sample_output/py3/l2switch.json @@ -268,7 +268,6 @@ "FLEX_COUNTER_TABLE": { "ACL": { "FLEX_COUNTER_STATUS": "disable", - "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/l2switch_dualtor.json b/src/sonic-config-engine/tests/sample_output/py3/l2switch_dualtor.json index 606a30672d9..5aa60f22c48 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/l2switch_dualtor.json +++ b/src/sonic-config-engine/tests/sample_output/py3/l2switch_dualtor.json @@ -520,7 +520,7 @@ }, "LOOPBACK_INTERFACE": { "Loopback2": {}, - "Loopback2|3.3.3.3": {} + "Loopback2|3.3.3.3/32": {} }, "MUX_CABLE": { "Ethernet0": { @@ -647,7 +647,6 @@ "FLEX_COUNTER_TABLE": { "ACL": { "FLEX_COUNTER_STATUS": "disable", - "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/l3_intfs.json b/src/sonic-config-engine/tests/sample_output/py3/l3_intfs.json index 7357c28fbef..81dd3afeab3 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/l3_intfs.json +++ b/src/sonic-config-engine/tests/sample_output/py3/l3_intfs.json @@ -301,7 +301,6 @@ "FLEX_COUNTER_TABLE": { "ACL": { "FLEX_COUNTER_STATUS": "disable", - "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf index 32a9abf88ba..0b0446aad9e 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf @@ -35,7 +35,7 @@ router bgp 4000 vrf VnetFE address-family ipv4 unicast neighbor 192.168.0.1 activate neighbor 192.168.0.1 soft-reconfiguration inbound - maximum-paths 64 + maximum-paths 514 exit-address-family address-family l2vpn evpn advertise ipv4 unicast @@ -74,10 +74,10 @@ router bgp 4000 ! ! address-family ipv4 - maximum-paths 64 + maximum-paths 514 exit-address-family address-family ipv6 - maximum-paths 64 + maximum-paths 514 exit-address-family ! ! end of template: bgpd/bgpd.main.conf.j2 diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf index 67f4f030de0..a238f3362ad 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf @@ -8,6 +8,7 @@ no fpm use-next-hop-groups ! fpm address 127.0.0.1 +zebra nexthop-group keep 1 ! ! template: common/daemons.common.conf.j2 ! diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf index 3b7b1f727a2..55576c57349 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf @@ -8,6 +8,7 @@ no fpm use-next-hop-groups ! fpm address 127.0.0.1 +zebra nexthop-group keep 1 ! ! template: common/daemons.common.conf.j2 ! diff --git a/src/sonic-config-engine/tests/sample_output/py3/wait_for_intf.sh b/src/sonic-config-engine/tests/sample_output/py3/wait_for_intf.sh index 5f0f46a5914..3e0e303e71d 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/wait_for_intf.sh +++ b/src/sonic-config-engine/tests/sample_output/py3/wait_for_intf.sh @@ -21,30 +21,10 @@ function wait_until_iface_ready echo "Interface ${IFACE_NAME} is ready!" } -function check_for_ipv6_link_local -{ - IFACE_NAME=$1 - echo "Waiting until interface ${IFACE_NAME} has a link-local ipv6 address configured...." - - # Status of link local address is not populated in STATE_DB - while true; do - HAS_LL=$(ip -6 addr show ${IFACE_NAME} scope link 2> /dev/null) - RC=$? - if [[ ${RC} == "0" ]] && [[ ! -z ${HAS_LL} ]]; then - break - fi - - sleep 1 - done - - echo "Link-Local address is configured on ${IFACE_NAME}" -} - # Wait for all interfaces with IPv4 addresses to be up and ready # dhcp6relay binds to ipv6 addresses configured on these vlan ifaces # Thus check if they are ready before launching dhcp6relay wait_until_iface_ready Vlan1000 fc02:2000::2/24 -check_for_ipv6_link_local Vlan1000 wait_until_iface_ready Vlan1000 192.168.0.1/27 wait_until_iface_ready Vlan2000 192.168.200.1/27 wait_until_iface_ready PortChannel01 10.0.0.56/31 diff --git a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf index a5fb8b1ca10..dadb8972345 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf @@ -8,6 +8,7 @@ no fpm use-next-hop-groups ! fpm address 127.0.0.1 +zebra nexthop-group keep 1 ! ! template: common/daemons.common.conf.j2 ! diff --git a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf index 5fdf0ced397..3bdb18fbc56 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf @@ -8,6 +8,7 @@ no fpm use-next-hop-groups ! fpm address 127.0.0.1 +zebra nexthop-group keep 1 ! ! template: common/daemons.common.conf.j2 ! diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json index 9421f40c349..400d36127a7 100644 --- a/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json +++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json @@ -20,7 +20,6 @@ "FLEX_COUNTER_TABLE": { "ACL": { "FLEX_COUNTER_STATUS": "disable", - "FLEX_COUNTER_DELAY_STATUS": "true", "POLL_INTERVAL": "10000" } }, diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json index fc305243fb0..d49ed7feb22 100644 --- a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json +++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json @@ -301,10 +301,6 @@ "DEVICE_NEIGHBOR": {}, "DHCP_SERVER_IPV4": { "bridge-midplane": { - "customized_options": [ - "option60", - "option223" - ], "gateway": "169.254.200.254", "lease_time": "3600", "mode": "PORT", @@ -374,12 +370,43 @@ }, "FLEX_COUNTER_TABLE": { "ACL": { - "FLEX_COUNTER_DELAY_STATUS": "true", "FLEX_COUNTER_STATUS": "disable", "POLL_INTERVAL": "10000" } }, "INTERFACE": { + "Ethernet0":{}, + "Ethernet104": {}, + "Ethernet112": {}, + "Ethernet120": {}, + "Ethernet128": {}, + "Ethernet136": {}, + "Ethernet144": {}, + "Ethernet152": {}, + "Ethernet160": {}, + "Ethernet168": {}, + "Ethernet16": {}, + "Ethernet176": {}, + "Ethernet184": {}, + "Ethernet192": {}, + "Ethernet200": {}, + "Ethernet208": {}, + "Ethernet216": {}, + "Ethernet224": {}, + "Ethernet232": {}, + "Ethernet240": {}, + "Ethernet248": {}, + "Ethernet24": {}, + "Ethernet32": {}, + "Ethernet40": {}, + "Ethernet48": {}, + "Ethernet56": {}, + "Ethernet64": {}, + "Ethernet72": {}, + "Ethernet80": {}, + "Ethernet88": {}, + "Ethernet8": {}, + "Ethernet96": {}, "Ethernet0|10.0.0.0/31": {}, "Ethernet104|10.0.0.26/31": {}, "Ethernet112|10.0.0.28/31": {}, @@ -414,8 +441,15 @@ "Ethernet96|10.0.0.24/31": {} }, "LOOPBACK_INTERFACE": { + "Loopback0": {}, "Loopback0|10.1.0.1/32": {} }, + "MID_PLANE_BRIDGE": { + "GLOBAL": { + "bridge": "bridge-midplane", + "ip_prefix": "169.254.200.254/24" + } + }, "PORT": { "Ethernet0": { "admin_status": "up", @@ -610,4 +644,4 @@ "mtu": "9100" } } -} \ No newline at end of file +} diff --git a/src/sonic-config-engine/tests/test_cfggen.py b/src/sonic-config-engine/tests/test_cfggen.py index 1ef66030244..6991df40f09 100644 --- a/src/sonic-config-engine/tests/test_cfggen.py +++ b/src/sonic-config-engine/tests/test_cfggen.py @@ -35,6 +35,7 @@ def setUp(self): self.sample_resource_graph = os.path.join(self.test_dir, 'sample-graph-resource-type.xml') self.sample_subintf_graph = os.path.join(self.test_dir, 'sample-graph-subintf.xml') self.voq_port_config = os.path.join(self.test_dir, 'voq-sample-port-config.ini') + self.packet_chassis_graph0 = os.path.join(self.test_dir, 'minigraph-str2-temp-2-lc04.xml') self.packet_chassis_graph = os.path.join(self.test_dir, 'sample-chassis-packet-lc-graph.xml') self.packet_chassis_port_ini = os.path.join(self.test_dir, 'sample-chassis-packet-lc-port-config.ini') self.macsec_profile = os.path.join(self.test_dir, 'macsec_profile.json') @@ -1056,6 +1057,11 @@ def test_minigraph_bgp_packet_chassis_peer(self): ) def test_minigraph_bgp_packet_chassis_static_route(self): + argument = ['-m', self.packet_chassis_graph0, '-p', self.packet_chassis_port_ini, '-n', "asic1", '-v', "STATIC_ROUTE"] + output = self.run_script(argument) + self.assertEqual( + utils.to_dict(output.strip()), + utils.to_dict("{'192.0.0.1/32': {'nexthop': '10.235.96.11,10.235.96.136,10.235.97.11,10.235.97.136,10.235.98.11,10.235.98.136,10.235.99.11,10.235.99.136,10.235.100.11,10.235.100.136', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '2603:10e2:400::1/128': {'nexthop': 'fc00:34::a:eb60:b01,fc00:34::a:eb60:8801,fc00:34::a:eb61:b01,fc00:34::a:eb61:8801,fc00:34::a:eb62:b01,fc00:34::a:eb62:8801,fc00:34::a:eb63:b01,fc00:34::a:eb63:8801,fc00:34::a:eb64:b01,fc00:34::a:eb64:8801', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '192.0.0.2/32': {'nexthop': '10.235.96.12,10.235.96.137,10.235.97.12,10.235.97.137,10.235.98.12,10.235.98.137,10.235.99.12,10.235.99.137,10.235.100.12,10.235.100.137', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '2603:10e2:400::2/128': {'nexthop': 'fc00:34::a:eb60:c01,fc00:34::a:eb60:8901,fc00:34::a:eb61:c01,fc00:34::a:eb61:8901,fc00:34::a:eb62:c01,fc00:34::a:eb62:8901,fc00:34::a:eb63:c01,fc00:34::a:eb63:8901,fc00:34::a:eb64:c01,fc00:34::a:eb64:8901', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '192.0.0.3/32': {'nexthop': '10.235.96.13,10.235.96.134,10.235.97.13,10.235.97.134,10.235.98.13,10.235.98.134,10.235.99.13,10.235.99.134,10.235.100.13,10.235.100.134', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '2603:10e2:400::3/128': {'nexthop': 'fc00:34::a:eb60:d01,fc00:34::a:eb60:8601,fc00:34::a:eb61:d01,fc00:34::a:eb61:8601,fc00:34::a:eb62:d01,fc00:34::a:eb62:8601,fc00:34::a:eb63:d01,fc00:34::a:eb63:8601,fc00:34::a:eb64:d01,fc00:34::a:eb64:8601', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '192.0.0.4/32': {'nexthop': '10.235.96.9,10.235.96.140,10.235.97.9,10.235.97.140,10.235.98.9,10.235.98.140,10.235.99.9,10.235.99.140,10.235.100.9,10.235.100.140', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '2603:10e2:400::4/128': {'nexthop': 'fc00:34::a:eb60:901,fc00:34::a:eb60:8c01,fc00:34::a:eb61:901,fc00:34::a:eb61:8c01,fc00:34::a:eb62:901,fc00:34::a:eb62:8c01,fc00:34::a:eb63:901,fc00:34::a:eb63:8c01,fc00:34::a:eb64:901,fc00:34::a:eb64:8c01', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '192.0.0.5/32': {'nexthop': '10.235.96.10,10.235.96.141,10.235.97.10,10.235.97.141,10.235.98.10,10.235.98.141,10.235.99.10,10.235.99.141,10.235.100.10,10.235.100.141', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '2603:10e2:400::5/128': {'nexthop': 'fc00:34::a:eb60:a01,fc00:34::a:eb60:8d01,fc00:34::a:eb61:a01,fc00:34::a:eb61:8d01,fc00:34::a:eb62:a01,fc00:34::a:eb62:8d01,fc00:34::a:eb63:a01,fc00:34::a:eb63:8d01,fc00:34::a:eb64:a01,fc00:34::a:eb64:8d01', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '192.0.0.6/32': {'nexthop': '10.235.96.7,10.235.96.138,10.235.97.7,10.235.97.138,10.235.98.7,10.235.98.138,10.235.99.7,10.235.99.138,10.235.100.7,10.235.100.138', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '2603:10e2:400::6/128': {'nexthop': 'fc00:34::a:eb60:701,fc00:34::a:eb60:8a01,fc00:34::a:eb61:701,fc00:34::a:eb61:8a01,fc00:34::a:eb62:701,fc00:34::a:eb62:8a01,fc00:34::a:eb63:701,fc00:34::a:eb63:8a01,fc00:34::a:eb64:701,fc00:34::a:eb64:8a01', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '192.0.0.7/32': {'nexthop': '10.235.96.6,10.235.96.139,10.235.97.6,10.235.97.139,10.235.98.6,10.235.98.139,10.235.99.6,10.235.99.139,10.235.100.6,10.235.100.139', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '2603:10e2:400::7/128': {'nexthop': 'fc00:34::a:eb60:601,fc00:34::a:eb60:8b01,fc00:34::a:eb61:601,fc00:34::a:eb61:8b01,fc00:34::a:eb62:601,fc00:34::a:eb62:8b01,fc00:34::a:eb63:601,fc00:34::a:eb63:8b01,fc00:34::a:eb64:601,fc00:34::a:eb64:8b01', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '192.0.0.8/32': {'nexthop': '10.235.96.4,10.235.96.132,10.235.97.4,10.235.97.132,10.235.98.4,10.235.98.132,10.235.99.4,10.235.99.132,10.235.100.4,10.235.100.132', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '2603:10e2:400::8/128': {'nexthop': 'fc00:34::a:eb60:401,fc00:34::a:eb60:8401,fc00:34::a:eb61:401,fc00:34::a:eb61:8401,fc00:34::a:eb62:401,fc00:34::a:eb62:8401,fc00:34::a:eb63:401,fc00:34::a:eb63:8401,fc00:34::a:eb64:401,fc00:34::a:eb64:8401', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '192.0.0.9/32': {'nexthop': '10.235.96.5,10.235.96.133,10.235.97.5,10.235.97.133,10.235.98.5,10.235.98.133,10.235.99.5,10.235.99.133,10.235.100.5,10.235.100.133', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '2603:10e2:400::9/128': {'nexthop': 'fc00:34::a:eb60:501,fc00:34::a:eb60:8501,fc00:34::a:eb61:501,fc00:34::a:eb61:8501,fc00:34::a:eb62:501,fc00:34::a:eb62:8501,fc00:34::a:eb63:501,fc00:34::a:eb63:8501,fc00:34::a:eb64:501,fc00:34::a:eb64:8501', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '192.0.0.10/32': {'nexthop': '10.235.96.8,10.235.96.135,10.235.97.8,10.235.97.135,10.235.98.8,10.235.98.135,10.235.99.8,10.235.99.135,10.235.100.8,10.235.100.135', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '2603:10e2:400::a/128': {'nexthop': 'fc00:34::a:eb60:801,fc00:34::a:eb60:8701,fc00:34::a:eb61:801,fc00:34::a:eb61:8701,fc00:34::a:eb62:801,fc00:34::a:eb62:8701,fc00:34::a:eb63:801,fc00:34::a:eb63:8701,fc00:34::a:eb64:801,fc00:34::a:eb64:8701', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '192.0.0.12/32': {'nexthop': '10.235.96.2,10.235.96.130,10.235.97.2,10.235.97.130,10.235.98.2,10.235.98.130,10.235.99.2,10.235.99.130,10.235.100.2,10.235.100.130', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '2603:10e2:400::c/128': {'nexthop': 'fc00:34::a:eb60:201,fc00:34::a:eb60:8201,fc00:34::a:eb61:201,fc00:34::a:eb61:8201,fc00:34::a:eb62:201,fc00:34::a:eb62:8201,fc00:34::a:eb63:201,fc00:34::a:eb63:8201,fc00:34::a:eb64:201,fc00:34::a:eb64:8201', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '192.0.0.13/32': {'nexthop': '10.235.96.3,10.235.96.131,10.235.97.3,10.235.97.131,10.235.98.3,10.235.98.131,10.235.99.3,10.235.99.131,10.235.100.3,10.235.100.131', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}, '2603:10e2:400::d/128': {'nexthop': 'fc00:34::a:eb60:301,fc00:34::a:eb60:8301,fc00:34::a:eb61:301,fc00:34::a:eb61:8301,fc00:34::a:eb62:301,fc00:34::a:eb62:8301,fc00:34::a:eb63:301,fc00:34::a:eb63:8301,fc00:34::a:eb64:301,fc00:34::a:eb64:8301', 'ifname': 'PortChannel4001,PortChannel4014,PortChannel4027,PortChannel4040,PortChannel4053,PortChannel4066,PortChannel4079,PortChannel4092,PortChannel4105,PortChannel4118', 'advertise': 'false', 'bfd': 'true'}}")) argument = ['-m', self.packet_chassis_graph, '-p', self.packet_chassis_port_ini, '-n', "asic1", '-v', "STATIC_ROUTE"] output = self.run_script(argument) self.assertEqual( @@ -1155,3 +1161,13 @@ def testsnmp_agent_address_config(self): self.assertEqual( utils.liststr_to_dict(output.strip()), utils.liststr_to_dict("['192.168.200.15|161|', '100.0.0.6|161|', '100.0.0.7|161|', 'fe80::1%Management0|161|']")) + + def test_platform_asic_sensors_config(self): + os.environ["PLATFORM"] = "x86_64-kvm_x86_64-r0" + argument = ["-H","--print-data"] + output = self.run_script(argument, check_stderr=False) + config_json = utils.to_dict(output.strip()) + os.environ["PLATFORM"] = "" + self.assertEqual(config_json['ASIC_SENSORS'], utils.to_dict("{'ASIC_SENSORS_POLLER_INTERVAL': {'interval': '10'}, 'ASIC_SENSORS_POLLER_STATUS': {'admin_status': 'enable'}}")) + + diff --git a/src/sonic-config-engine/tests/test_frr.py b/src/sonic-config-engine/tests/test_frr.py index 92deef92275..5a7ca109b30 100644 --- a/src/sonic-config-engine/tests/test_frr.py +++ b/src/sonic-config-engine/tests/test_frr.py @@ -78,3 +78,7 @@ def test_bgpd_frr_dualtor(self): def test_zebra_frr_dualtor(self): extra_data = {"DEVICE_METADATA": {"localhost": {"subtype": "DualToR"}}} self.assertTrue(*self.run_case('zebra/zebra.conf.j2', 'zebra_frr_dualtor.conf', extra_data=extra_data)) + + def test_bgpd_frr_bmp(self): + extra_data = {"FEATURE": {"bmp": {"state": "enabled"}}} + self.assertTrue(*self.run_case('bgpd/bgpd.conf.j2', 'bgpd_frr_bmp.conf', extra_data=extra_data)) \ No newline at end of file diff --git a/src/sonic-dbsyncd b/src/sonic-dbsyncd index d5fa7937a4e..b0ea01fb70a 160000 --- a/src/sonic-dbsyncd +++ b/src/sonic-dbsyncd @@ -1 +1 @@ -Subproject commit d5fa7937a4e38ce0356368977ab4ba89090b2209 +Subproject commit b0ea01fb70a668b6d828f98a320a271dc76dc300 diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list index a4c904a3e12..ff0f433b091 100644 --- a/src/sonic-device-data/tests/permitted_list +++ b/src/sonic-device-data/tests/permitted_list @@ -351,3 +351,5 @@ cache_coherency_check core_clock_to_pm_clock_factor flowtracker_ipfix_observation_domain_id flowtracker_num_unique_user_entry_keys +sai_mmu_tc_to_pg_config +sai_hostif_netif_iff_up_set diff --git a/src/sonic-dhcp-utilities/tests/test_data/supervisor.conf b/src/sonic-dhcp-utilities/tests/test_data/supervisor.conf index e958fa35fb5..5584dc2b2f3 100644 --- a/src/sonic-dhcp-utilities/tests/test_data/supervisor.conf +++ b/src/sonic-dhcp-utilities/tests/test_data/supervisor.conf @@ -24,8 +24,10 @@ command=/usr/sbin/rsyslogd -n -iNONE priority=1 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true [program:start] @@ -34,8 +36,10 @@ priority=2 autostart=false autorestart=false startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running @@ -45,8 +49,10 @@ command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /t priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -55,8 +61,10 @@ command=/usr/local/bin/dhcprelayd priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running @@ -65,8 +73,10 @@ command=/usr/sbin/dhcp6relay priority=3 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited @@ -82,7 +92,9 @@ command=/usr/sbin/dhcpmon -id Vlan1000 -iu PortChannel101 -iu PortChannel102 -iu priority=4 autostart=false autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true dependent_startup=true dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running diff --git a/src/sonic-eventd/src/eventd.cpp b/src/sonic-eventd/src/eventd.cpp index d4da44f3252..67ee09ce1d2 100644 --- a/src/sonic-eventd/src/eventd.cpp +++ b/src/sonic-eventd/src/eventd.cpp @@ -146,7 +146,7 @@ stats_collector::start() if (!s_unit_testing) { try { - m_counters_db = make_shared("COUNTERS_DB", 0, true); + m_counters_db = make_shared("COUNTERS_DB", 0, false); } catch (exception &e) { diff --git a/src/sonic-eventd/tests/eventd_ut.cpp b/src/sonic-eventd/tests/eventd_ut.cpp index a499bb67a95..6c2ddb11604 100644 --- a/src/sonic-eventd/tests/eventd_ut.cpp +++ b/src/sonic-eventd/tests/eventd_ut.cpp @@ -164,16 +164,12 @@ void run_cap(void *zctx, bool &term, string &read_source, EXPECT_EQ(0, zmq_setsockopt(mock_cap, ZMQ_SUBSCRIBE, "", 0)); EXPECT_EQ(0, zmq_setsockopt(mock_cap, ZMQ_RCVTIMEO, &block_ms, sizeof (block_ms))); - zmq_msg_t msg; - zmq_msg_init(&msg); - int rc = zmq_msg_recv(&msg, mock_cap, 0); - EXPECT_EQ(1, rc); // read control character while(!term) { string source; internal_event_t ev_int; - - if (0 == zmq_message_read(mock_cap, 0, source, ev_int)) { + int rc = zmq_message_read(mock_cap, 0, source, ev_int); + if (0 == rc && !ev_int.empty()) { // ignore control character empty event cnt = ++i; } } diff --git a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py index bca00581737..ef74754ceda 100755 --- a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py +++ b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py @@ -2078,7 +2078,7 @@ class BGPConfigDaemon: ('icmo_ttl', 'ttl {}', handle_ip_sla_common), ('icmp_tos', 'tos {}', handle_ip_sla_common), ] - srv6_locator_key_map = [(['opcode_prefix', 'opcode_act', 'opcode_vrf'], '{no:no-prefix}opcode {} {} vrf {}', hdl_srv6_locator)] + srv6_locator_key_map = [(['opcode_prefix', 'opcode_act', 'opcode_data'], '{no:no-prefix}opcode {} {} {}', hdl_srv6_locator)] tbl_to_key_map = {'BGP_GLOBALS': global_key_map, diff --git a/src/sonic-frr/Makefile b/src/sonic-frr/Makefile index 307089d91ea..6462af5ac6e 100644 --- a/src/sonic-frr/Makefile +++ b/src/sonic-frr/Makefile @@ -36,6 +36,7 @@ endif ifeq ($(CROSS_BUILD_ENVIRON), y) git reset --hard endif + git branch -f master origin/$(FRR_BRANCH) git checkout master git branch -D $(FRR_BRANCH) popd diff --git a/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c index f01c647d4a6..343cc1f3262 100644 --- a/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c +++ b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c @@ -32,6 +32,7 @@ #include #include "lib/zebra.h" +#include #include "lib/json.h" #include "lib/libfrr.h" #include "lib/frratomic.h" @@ -45,8 +46,6 @@ #include "zebra/zebra_dplane.h" #include "zebra/zebra_mpls.h" #include "zebra/zebra_router.h" -#include "zebra/zebra_evpn.h" -#include "zebra/zebra_evpn_mac.h" #include "zebra/zebra_vxlan_private.h" #include "zebra/kernel_netlink.h" #include "zebra/rt_netlink.h" @@ -165,22 +164,22 @@ struct fpm_nl_ctx { /* data plane events. */ struct zebra_dplane_provider *prov; struct frr_pthread *fthread; - struct thread *t_connect; - struct thread *t_read; - struct thread *t_write; - struct thread *t_event; - struct thread *t_nhg; - struct thread *t_dequeue; + struct event *t_connect; + struct event *t_read; + struct event *t_write; + struct event *t_event; + struct event *t_nhg; + struct event *t_dequeue; /* zebra events. */ - struct thread *t_lspreset; - struct thread *t_lspwalk; - struct thread *t_nhgreset; - struct thread *t_nhgwalk; - struct thread *t_ribreset; - struct thread *t_ribwalk; - struct thread *t_rmacreset; - struct thread *t_rmacwalk; + struct event *t_lspreset; + struct event *t_lspwalk; + struct event *t_nhgreset; + struct event *t_nhgwalk; + struct event *t_ribreset; + struct event *t_ribwalk; + struct event *t_rmacreset; + struct event *t_rmacwalk; /* Statistic counters. */ struct { @@ -205,8 +204,6 @@ struct fpm_nl_ctx { /* Amount of data plane context processed. */ _Atomic uint32_t dplane_contexts; - /* Amount of data plane contexts enqueued. */ - _Atomic uint32_t ctxqueue_len; /* Peak amount of data plane contexts enqueued. */ _Atomic uint32_t ctxqueue_len_peak; @@ -238,26 +235,26 @@ enum fpm_nl_events { }; #define FPM_RECONNECT(fnc) \ - thread_add_event((fnc)->fthread->master, fpm_process_event, (fnc), \ + event_add_event((fnc)->fthread->master, fpm_process_event, (fnc), \ FNE_INTERNAL_RECONNECT, &(fnc)->t_event) #define WALK_FINISH(fnc, ev) \ - thread_add_event((fnc)->fthread->master, fpm_process_event, (fnc), \ + event_add_event((fnc)->fthread->master, fpm_process_event, (fnc), \ (ev), NULL) /* * Prototypes. */ -static void fpm_process_event(struct thread *t); +static void fpm_process_event(struct event *t); static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx); -static void fpm_lsp_send(struct thread *t); -static void fpm_lsp_reset(struct thread *t); -static void fpm_nhg_send(struct thread *t); -static void fpm_nhg_reset(struct thread *t); -static void fpm_rib_send(struct thread *t); -static void fpm_rib_reset(struct thread *t); -static void fpm_rmac_send(struct thread *t); -static void fpm_rmac_reset(struct thread *t); +static void fpm_lsp_send(struct event *t); +static void fpm_lsp_reset(struct event *t); +static void fpm_nhg_send(struct event *t); +static void fpm_nhg_reset(struct event *t); +static void fpm_rib_send(struct event *t); +static void fpm_rib_reset(struct event *t); +static void fpm_rmac_send(struct event *t); +static void fpm_rmac_reset(struct event *t); /* * CLI. @@ -313,7 +310,7 @@ DEFUN(fpm_set_address, fpm_set_address_cmd, memcpy(&sin6->sin6_addr, naddr, sizeof(sin6->sin6_addr)); ask_reconnect: - thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc, + event_add_event(gfnc->fthread->master, fpm_process_event, gfnc, FNE_RECONNECT, &gfnc->t_event); return CMD_SUCCESS; } @@ -328,7 +325,7 @@ DEFUN(no_fpm_set_address, no_fpm_set_address_cmd, "FPM remote listening server port\n" "Remote FPM server port\n") { - thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc, + event_add_event(gfnc->fthread->master, fpm_process_event, gfnc, FNE_DISABLE, &gfnc->t_event); return CMD_SUCCESS; } @@ -342,7 +339,7 @@ DEFUN(fpm_use_nhg, fpm_use_nhg_cmd, if (gfnc->use_nhg) return CMD_SUCCESS; - thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc, + event_add_event(gfnc->fthread->master, fpm_process_event, gfnc, FNE_TOGGLE_NHG, &gfnc->t_nhg); return CMD_SUCCESS; @@ -358,7 +355,7 @@ DEFUN(no_fpm_use_nhg, no_fpm_use_nhg_cmd, if (!gfnc->use_nhg) return CMD_SUCCESS; - thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc, + event_add_event(gfnc->fthread->master, fpm_process_event, gfnc, FNE_TOGGLE_NHG, &gfnc->t_nhg); return CMD_SUCCESS; @@ -370,7 +367,7 @@ DEFUN(fpm_reset_counters, fpm_reset_counters_cmd, FPM_STR "FPM statistic counters\n") { - thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc, + event_add_event(gfnc->fthread->master, fpm_process_event, gfnc, FNE_RESET_COUNTERS, &gfnc->t_event); return CMD_SUCCESS; } @@ -381,6 +378,12 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd, FPM_STR "FPM statistic counters\n") { + uint32_t curr_queue_len; + + frr_with_mutex (&gfnc->ctxqueue_mutex) { + curr_queue_len = dplane_ctx_queue_count(&gfnc->ctxqueue); + } + vty_out(vty, "%30s\n%30s\n", "FPM counters", "============"); #define SHOW_COUNTER(label, counter) \ @@ -394,8 +397,7 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd, SHOW_COUNTER("Connection errors", gfnc->counters.connection_errors); SHOW_COUNTER("Data plane items processed", gfnc->counters.dplane_contexts); - SHOW_COUNTER("Data plane items enqueued", - gfnc->counters.ctxqueue_len); + SHOW_COUNTER("Data plane items enqueued", curr_queue_len); SHOW_COUNTER("Data plane items queue peak", gfnc->counters.ctxqueue_len_peak); SHOW_COUNTER("Buffer full hits", gfnc->counters.buffer_full); @@ -414,6 +416,12 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd, "FPM statistic counters\n" JSON_STR) { + uint32_t curr_queue_len; + + frr_with_mutex (&gfnc->ctxqueue_mutex) { + curr_queue_len = dplane_ctx_queue_count(&gfnc->ctxqueue); + } + struct json_object *jo; jo = json_object_new_object(); @@ -427,8 +435,7 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd, gfnc->counters.connection_errors); json_object_int_add(jo, "data-plane-contexts", gfnc->counters.dplane_contexts); - json_object_int_add(jo, "data-plane-contexts-queue", - gfnc->counters.ctxqueue_len); + json_object_int_add(jo, "data-plane-contexts-queue", curr_queue_len); json_object_int_add(jo, "data-plane-contexts-queue-peak", gfnc->counters.ctxqueue_len_peak); json_object_int_add(jo, "buffer-full-hits", gfnc->counters.buffer_full); @@ -491,19 +498,19 @@ static struct cmd_node fpm_node = { /* * FPM functions. */ -static void fpm_connect(struct thread *t); +static void fpm_connect(struct event *t); static void fpm_reconnect(struct fpm_nl_ctx *fnc) { /* Cancel all zebra threads first. */ - thread_cancel_async(zrouter.master, &fnc->t_lspreset, NULL); - thread_cancel_async(zrouter.master, &fnc->t_lspwalk, NULL); - thread_cancel_async(zrouter.master, &fnc->t_nhgreset, NULL); - thread_cancel_async(zrouter.master, &fnc->t_nhgwalk, NULL); - thread_cancel_async(zrouter.master, &fnc->t_ribreset, NULL); - thread_cancel_async(zrouter.master, &fnc->t_ribwalk, NULL); - thread_cancel_async(zrouter.master, &fnc->t_rmacreset, NULL); - thread_cancel_async(zrouter.master, &fnc->t_rmacwalk, NULL); + event_cancel_async(zrouter.master, &fnc->t_lspreset, NULL); + event_cancel_async(zrouter.master, &fnc->t_lspwalk, NULL); + event_cancel_async(zrouter.master, &fnc->t_nhgreset, NULL); + event_cancel_async(zrouter.master, &fnc->t_nhgwalk, NULL); + event_cancel_async(zrouter.master, &fnc->t_ribreset, NULL); + event_cancel_async(zrouter.master, &fnc->t_ribwalk, NULL); + event_cancel_async(zrouter.master, &fnc->t_rmacreset, NULL); + event_cancel_async(zrouter.master, &fnc->t_rmacwalk, NULL); /* * Grab the lock to empty the streams (data plane might try to @@ -519,20 +526,20 @@ static void fpm_reconnect(struct fpm_nl_ctx *fnc) stream_reset(fnc->ibuf); stream_reset(fnc->obuf); - THREAD_OFF(fnc->t_read); - THREAD_OFF(fnc->t_write); + EVENT_OFF(fnc->t_read); + EVENT_OFF(fnc->t_write); /* FPM is disabled, don't attempt to connect. */ if (fnc->disabled) return; - thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3, + event_add_timer(fnc->fthread->master, fpm_connect, fnc, 3, &fnc->t_connect); } -static void fpm_read(struct thread *t) +static void fpm_read(struct event *t) { - struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct fpm_nl_ctx *fnc = EVENT_ARG(t); fpm_msg_hdr_t fpm; ssize_t rv; char buf[65535]; @@ -564,7 +571,7 @@ static void fpm_read(struct thread *t) } /* Schedule the next read */ - thread_add_read(fnc->fthread->master, fpm_read, fnc, fnc->socket, + event_add_read(fnc->fthread->master, fpm_read, fnc, fnc->socket, &fnc->t_read); /* We've got an interruption. */ @@ -693,9 +700,9 @@ static void fpm_read(struct thread *t) stream_reset(fnc->ibuf); } -static void fpm_write(struct thread *t) +static void fpm_write(struct event *t) { - struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct fpm_nl_ctx *fnc = EVENT_ARG(t); socklen_t statuslen; ssize_t bwritten; int rv, status; @@ -729,11 +736,11 @@ static void fpm_write(struct thread *t) * Starting with LSPs walk all FPM objects, marking them * as unsent and then replaying them. */ - thread_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0, + event_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0, &fnc->t_lspreset); /* Permit receiving messages now. */ - thread_add_read(fnc->fthread->master, fpm_read, fnc, + event_add_read(fnc->fthread->master, fpm_read, fnc, fnc->socket, &fnc->t_read); } @@ -791,15 +798,15 @@ static void fpm_write(struct thread *t) /* Stream is not empty yet, we must schedule more writes. */ if (STREAM_READABLE(fnc->obuf)) { stream_pulldown(fnc->obuf); - thread_add_write(fnc->fthread->master, fpm_write, fnc, + event_add_write(fnc->fthread->master, fpm_write, fnc, fnc->socket, &fnc->t_write); return; } } -static void fpm_connect(struct thread *t) +static void fpm_connect(struct event *t) { - struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct fpm_nl_ctx *fnc = EVENT_ARG(t); struct sockaddr_in *sin = (struct sockaddr_in *)&fnc->addr; struct sockaddr_in6 *sin6 = (struct sockaddr_in6 *)&fnc->addr; socklen_t slen; @@ -810,7 +817,7 @@ static void fpm_connect(struct thread *t) if (sock == -1) { zlog_err("%s: fpm socket failed: %s", __func__, strerror(errno)); - thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3, + event_add_timer(fnc->fthread->master, fpm_connect, fnc, 3, &fnc->t_connect); return; } @@ -836,7 +843,7 @@ static void fpm_connect(struct thread *t) close(sock); zlog_warn("%s: fpm connection failed: %s", __func__, strerror(errno)); - thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3, + event_add_timer(fnc->fthread->master, fpm_connect, fnc, 3, &fnc->t_connect); return; } @@ -844,9 +851,9 @@ static void fpm_connect(struct thread *t) fnc->connecting = (errno == EINPROGRESS); fnc->socket = sock; if (!fnc->connecting) - thread_add_read(fnc->fthread->master, fpm_read, fnc, sock, + event_add_read(fnc->fthread->master, fpm_read, fnc, sock, &fnc->t_read); - thread_add_write(fnc->fthread->master, fpm_write, fnc, sock, + event_add_write(fnc->fthread->master, fpm_write, fnc, sock, &fnc->t_write); /* @@ -856,7 +863,7 @@ static void fpm_connect(struct thread *t) * If we are not connected, then delay the objects reset/send. */ if (!fnc->connecting) - thread_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0, + event_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0, &fnc->t_lspreset); } @@ -886,9 +893,9 @@ static struct zebra_vrf *vrf_lookup_by_table_id(uint32_t table_id) /** * Resets the SRv6 routes FPM flags so we send all SRv6 routes again. */ -static void fpm_srv6_route_reset(struct thread *t) +static void fpm_srv6_route_reset(struct event *t) { - struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct fpm_nl_ctx *fnc = EVENT_ARG(t); rib_dest_t *dest; struct route_node *rn; struct route_entry *re; @@ -910,14 +917,14 @@ static void fpm_srv6_route_reset(struct thread *t) nexthop = re->nhe->nhg.nexthop; if (nexthop && nexthop->nh_srv6 && - !sid_zero(&nexthop->nh_srv6->seg6_segs)) + !sid_zero((const struct seg6_seg_stack *)nexthop->nh_srv6->seg6_segs)) /* Unset FPM installation flag so it gets installed again. */ UNSET_FLAG(dest->flags, RIB_DEST_UPDATE_FPM); } } /* Schedule next step: send RIB routes. */ - thread_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk); + event_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk); } /* @@ -975,7 +982,7 @@ static ssize_t netlink_srv6_localsid_msg_encode(int cmd, req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST; if ((cmd == RTM_NEWSRV6LOCALSID) && - (v6_rr_semantics)) + (zrouter.v6_rr_semantics)) req->n.nlmsg_flags |= NLM_F_REPLACE; req->n.nlmsg_type = cmd; @@ -1202,8 +1209,9 @@ static ssize_t netlink_srv6_vpn_route_msg_encode(int cmd, uint32_t table_id; struct interface *ifp; struct in6_addr encap_src_addr = {}; - struct listnode *node; struct connected *connected; + struct vrf *vrf; + struct prefix *cp; struct { struct nlmsghdr n; @@ -1212,7 +1220,7 @@ static ssize_t netlink_srv6_vpn_route_msg_encode(int cmd, } *req = (void *)data; nexthop = dplane_ctx_get_ng(ctx)->nexthop; - if (!nexthop || !nexthop->nh_srv6 || sid_zero(&nexthop->nh_srv6->seg6_segs)) + if (!nexthop || !nexthop->nh_srv6 || sid_zero((const struct seg6_seg_stack *)nexthop->nh_srv6->seg6_segs)) return -1; p = dplane_ctx_get_dest(ctx); @@ -1230,7 +1238,7 @@ static ssize_t netlink_srv6_vpn_route_msg_encode(int cmd, req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST; if ((cmd == RTM_NEWROUTE) && - ((p->family == AF_INET) || v6_rr_semantics)) + ((p->family == AF_INET) || zrouter.v6_rr_semantics)) req->n.nlmsg_flags |= NLM_F_REPLACE; req->n.nlmsg_type = cmd; @@ -1291,13 +1299,19 @@ static ssize_t netlink_srv6_vpn_route_msg_encode(int cmd, * if it is valid */ ifp = if_lookup_by_name("lo", VRF_DEFAULT); + vrf = vrf_lookup_by_name(VRF_DEFAULT_NAME); + if (!vrf) + return false; if (ifp) { - FOR_ALL_INTERFACES_ADDRESSES(ifp, connected, node) { - if (connected->address->family == AF_INET6 && - !IN6_IS_ADDR_LOOPBACK(&connected->address->u.prefix6) && - !IN6_IS_ADDR_LINKLOCAL(&connected->address->u.prefix6)) { - encap_src_addr = connected->address->u.prefix6; - break; + FOR_ALL_INTERFACES (vrf, ifp) { + frr_each (if_connected, ifp->connected, connected) { + cp = connected->address; + if (cp->family == AF_INET6 && + !IN6_IS_ADDR_LOOPBACK(&cp->u.prefix6) && + !IN6_IS_ADDR_LINKLOCAL(&cp->u.prefix6)) { + encap_src_addr = cp->u.prefix6; + break; + } } } } @@ -1307,7 +1321,7 @@ static ssize_t netlink_srv6_vpn_route_msg_encode(int cmd, &encap_src_addr, IPV6_MAX_BYTELEN)) return false; if (!nl_attr_put(&req->n, datalen, FPM_ROUTE_ENCAP_SRV6_VPN_SID, - &nexthop->nh_srv6->seg6_segs, + &nexthop->nh_srv6->seg6_segs->seg[0], IPV6_MAX_BYTELEN)) return false; nl_attr_nest_end(&req->n, nest); @@ -1348,7 +1362,7 @@ static ssize_t netlink_srv6_msg_encode(int cmd, if (!netlink_srv6_localsid_msg_encode( cmd, ctx, data, datalen, fpm, force_nhg)) return 0; - } else if (!sid_zero(&nexthop->nh_srv6->seg6_segs)) { + } else if (!sid_zero(nexthop->nh_srv6->seg6_segs)) { if (!netlink_srv6_vpn_route_msg_encode( cmd, ctx, data, datalen, fpm, force_nhg)) return 0; @@ -1417,7 +1431,7 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx) } else { rv = netlink_route_multipath_msg_encode(RTM_DELROUTE, ctx, nl_buf, sizeof(nl_buf), - true, fnc->use_nhg); + true, fnc->use_nhg, false); if (rv <= 0) { zlog_err( "%s: netlink_route_multipath_msg_encode failed", @@ -1448,7 +1462,7 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx) } else { rv = netlink_route_multipath_msg_encode( RTM_NEWROUTE, ctx, &nl_buf[nl_buf_len], - sizeof(nl_buf) - nl_buf_len, true, fnc->use_nhg); + sizeof(nl_buf) - nl_buf_len, true, fnc->use_nhg, false); if (rv <= 0) { zlog_err( "%s: netlink_route_multipath_msg_encode failed", @@ -1513,7 +1527,7 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx) case DPLANE_OP_ADDR_INSTALL: case DPLANE_OP_ADDR_UNINSTALL: if (strmatch(dplane_ctx_get_ifname(ctx), "lo")) - thread_add_timer(fnc->fthread->master, fpm_srv6_route_reset, + event_add_timer(fnc->fthread->master, fpm_srv6_route_reset, fnc, 0, &fnc->t_ribreset); break; @@ -1610,7 +1624,7 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx) memory_order_relaxed); /* Tell the thread to start writing. */ - thread_add_write(fnc->fthread->master, fpm_write, fnc, fnc->socket, + event_add_write(fnc->fthread->master, fpm_write, fnc, fnc->socket, &fnc->t_write); return 0; @@ -1647,9 +1661,9 @@ static int fpm_lsp_send_cb(struct hash_bucket *bucket, void *arg) return HASHWALK_CONTINUE; } -static void fpm_lsp_send(struct thread *t) +static void fpm_lsp_send(struct event *t) { - struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct fpm_nl_ctx *fnc = EVENT_ARG(t); struct zebra_vrf *zvrf = vrf_info_lookup(VRF_DEFAULT); struct fpm_lsp_arg fla; @@ -1665,11 +1679,11 @@ static void fpm_lsp_send(struct thread *t) WALK_FINISH(fnc, FNE_LSP_FINISHED); /* Now move onto routes */ - thread_add_timer(zrouter.master, fpm_nhg_reset, fnc, 0, + event_add_timer(zrouter.master, fpm_nhg_reset, fnc, 0, &fnc->t_nhgreset); } else { /* Didn't finish - reschedule LSP walk */ - thread_add_timer(zrouter.master, fpm_lsp_send, fnc, 0, + event_add_timer(zrouter.master, fpm_lsp_send, fnc, 0, &fnc->t_lspwalk); } } @@ -1707,9 +1721,9 @@ static int fpm_nhg_send_cb(struct hash_bucket *bucket, void *arg) return HASHWALK_CONTINUE; } -static void fpm_nhg_send(struct thread *t) +static void fpm_nhg_send(struct event *t) { - struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct fpm_nl_ctx *fnc = EVENT_ARG(t); struct fpm_nhg_arg fna; fna.fnc = fnc; @@ -1726,19 +1740,19 @@ static void fpm_nhg_send(struct thread *t) /* We are done sending next hops, lets install the routes now. */ if (fna.complete) { WALK_FINISH(fnc, FNE_NHG_FINISHED); - thread_add_timer(zrouter.master, fpm_rib_reset, fnc, 0, + event_add_timer(zrouter.master, fpm_rib_reset, fnc, 0, &fnc->t_ribreset); } else /* Otherwise reschedule next hop group again. */ - thread_add_timer(zrouter.master, fpm_nhg_send, fnc, 0, + event_add_timer(zrouter.master, fpm_nhg_send, fnc, 0, &fnc->t_nhgwalk); } /** * Send all RIB installed routes to the connected data plane. */ -static void fpm_rib_send(struct thread *t) +static void fpm_rib_send(struct event *t) { - struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct fpm_nl_ctx *fnc = EVENT_ARG(t); rib_dest_t *dest; struct route_node *rn; struct route_table *rt; @@ -1768,7 +1782,7 @@ static void fpm_rib_send(struct thread *t) /* Free the temporary allocated context. */ dplane_ctx_fini(&ctx); - thread_add_timer(zrouter.master, fpm_rib_send, + event_add_timer(zrouter.master, fpm_rib_send, fnc, 1, &fnc->t_ribwalk); return; } @@ -1785,7 +1799,7 @@ static void fpm_rib_send(struct thread *t) WALK_FINISH(fnc, FNE_RIB_FINISHED); /* Schedule next event: RMAC reset. */ - thread_add_event(zrouter.master, fpm_rmac_reset, fnc, 0, + event_add_event(zrouter.master, fpm_rmac_reset, fnc, 0, &fnc->t_rmacreset); } @@ -1805,6 +1819,7 @@ static void fpm_enqueue_rmac_table(struct hash_bucket *bucket, void *arg) struct zebra_mac *zrmac = bucket->data; struct zebra_if *zif = fra->zl3vni->vxlan_if->info; const struct zebra_l2info_vxlan *vxl = &zif->l2info.vxl; + struct zebra_vxlan_vni *vni; struct zebra_if *br_zif; vlanid_t vid; bool sticky; @@ -1816,16 +1831,17 @@ static void fpm_enqueue_rmac_table(struct hash_bucket *bucket, void *arg) sticky = !!CHECK_FLAG(zrmac->flags, (ZEBRA_MAC_STICKY | ZEBRA_MAC_REMOTE_DEF_GW)); br_zif = (struct zebra_if *)(zif->brslave_info.br_if->info); - vid = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(br_zif) ? vxl->access_vlan : 0; + vni = zebra_vxlan_if_vni_find(zif, fra->zl3vni->vni); + vid = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(br_zif) ? vxl->vni_info.vni.access_vlan : 0; dplane_ctx_reset(fra->ctx); dplane_ctx_set_op(fra->ctx, DPLANE_OP_MAC_INSTALL); dplane_mac_init(fra->ctx, fra->zl3vni->vxlan_if, zif->brslave_info.br_if, vid, - &zrmac->macaddr, zrmac->fwd_info.r_vtep_ip, sticky, + &zrmac->macaddr, vni->vni, zrmac->fwd_info.r_vtep_ip, sticky, 0 /*nhg*/, 0 /*update_flags*/); if (fpm_nl_enqueue(fra->fnc, fra->ctx) == -1) { - thread_add_timer(zrouter.master, fpm_rmac_send, + event_add_timer(zrouter.master, fpm_rmac_send, fra->fnc, 1, &fra->fnc->t_rmacwalk); fra->complete = false; } @@ -1840,11 +1856,11 @@ static void fpm_enqueue_l3vni_table(struct hash_bucket *bucket, void *arg) hash_iterate(zl3vni->rmac_table, fpm_enqueue_rmac_table, zl3vni); } -static void fpm_rmac_send(struct thread *t) +static void fpm_rmac_send(struct event *t) { struct fpm_rmac_arg fra; - fra.fnc = THREAD_ARG(t); + fra.fnc = EVENT_ARG(t); fra.ctx = dplane_ctx_alloc(); fra.complete = true; hash_iterate(zrouter.l3vni_table, fpm_enqueue_l3vni_table, &fra); @@ -1866,14 +1882,14 @@ static void fpm_nhg_reset_cb(struct hash_bucket *bucket, void *arg) UNSET_FLAG(nhe->flags, NEXTHOP_GROUP_FPM); } -static void fpm_nhg_reset(struct thread *t) +static void fpm_nhg_reset(struct event *t) { - struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct fpm_nl_ctx *fnc = EVENT_ARG(t); hash_iterate(zrouter.nhgs_id, fpm_nhg_reset_cb, NULL); /* Schedule next step: send next hop groups. */ - thread_add_event(zrouter.master, fpm_nhg_send, fnc, 0, &fnc->t_nhgwalk); + event_add_event(zrouter.master, fpm_nhg_send, fnc, 0, &fnc->t_nhgwalk); } /* @@ -1886,23 +1902,23 @@ static void fpm_lsp_reset_cb(struct hash_bucket *bucket, void *arg) UNSET_FLAG(lsp->flags, LSP_FLAG_FPM); } -static void fpm_lsp_reset(struct thread *t) +static void fpm_lsp_reset(struct event *t) { - struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct fpm_nl_ctx *fnc = EVENT_ARG(t); struct zebra_vrf *zvrf = vrf_info_lookup(VRF_DEFAULT); hash_iterate(zvrf->lsp_table, fpm_lsp_reset_cb, NULL); /* Schedule next step: send LSPs */ - thread_add_event(zrouter.master, fpm_lsp_send, fnc, 0, &fnc->t_lspwalk); + event_add_event(zrouter.master, fpm_lsp_send, fnc, 0, &fnc->t_lspwalk); } /** * Resets the RIB FPM flags so we send all routes again. */ -static void fpm_rib_reset(struct thread *t) +static void fpm_rib_reset(struct event *t) { - struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct fpm_nl_ctx *fnc = EVENT_ARG(t); rib_dest_t *dest; struct route_node *rn; struct route_table *rt; @@ -1921,7 +1937,7 @@ static void fpm_rib_reset(struct thread *t) } /* Schedule next step: send RIB routes. */ - thread_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk); + event_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk); } /* @@ -1941,20 +1957,20 @@ static void fpm_unset_l3vni_table(struct hash_bucket *bucket, void *arg) hash_iterate(zl3vni->rmac_table, fpm_unset_rmac_table, zl3vni); } -static void fpm_rmac_reset(struct thread *t) +static void fpm_rmac_reset(struct event *t) { - struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct fpm_nl_ctx *fnc = EVENT_ARG(t); hash_iterate(zrouter.l3vni_table, fpm_unset_l3vni_table, NULL); /* Schedule next event: send RMAC entries. */ - thread_add_event(zrouter.master, fpm_rmac_send, fnc, 0, + event_add_event(zrouter.master, fpm_rmac_send, fnc, 0, &fnc->t_rmacwalk); } -static void fpm_process_queue(struct thread *t) +static void fpm_process_queue(struct event *t) { - struct fpm_nl_ctx *fnc = THREAD_ARG(t); + struct fpm_nl_ctx *fnc = EVENT_ARG(t); struct zebra_dplane_ctx *ctx; bool no_bufs = false; uint64_t processed_contexts = 0; @@ -1984,8 +2000,6 @@ static void fpm_process_queue(struct thread *t) /* Account the processed entries. */ processed_contexts++; - atomic_fetch_sub_explicit(&fnc->counters.ctxqueue_len, 1, - memory_order_relaxed); dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_SUCCESS); dplane_provider_enqueue_out_ctx(fnc->prov, ctx); @@ -1997,7 +2011,7 @@ static void fpm_process_queue(struct thread *t) /* Re-schedule if we ran out of buffer space */ if (no_bufs) - thread_add_timer(fnc->fthread->master, fpm_process_queue, + event_add_timer(fnc->fthread->master, fpm_process_queue, fnc, 0, &fnc->t_dequeue); /* @@ -2013,10 +2027,10 @@ static void fpm_process_queue(struct thread *t) /** * Handles external (e.g. CLI, data plane or others) events. */ -static void fpm_process_event(struct thread *t) +static void fpm_process_event(struct event *t) { - struct fpm_nl_ctx *fnc = THREAD_ARG(t); - enum fpm_nl_events event = THREAD_VAL(t); + struct fpm_nl_ctx *fnc = EVENT_ARG(t); + enum fpm_nl_events event = EVENT_VAL(t); switch (event) { case FNE_DISABLE: @@ -2100,19 +2114,19 @@ static int fpm_nl_start(struct zebra_dplane_provider *prov) static int fpm_nl_finish_early(struct fpm_nl_ctx *fnc) { /* Disable all events and close socket. */ - THREAD_OFF(fnc->t_lspreset); - THREAD_OFF(fnc->t_lspwalk); - THREAD_OFF(fnc->t_nhgreset); - THREAD_OFF(fnc->t_nhgwalk); - THREAD_OFF(fnc->t_ribreset); - THREAD_OFF(fnc->t_ribwalk); - THREAD_OFF(fnc->t_rmacreset); - THREAD_OFF(fnc->t_rmacwalk); - THREAD_OFF(fnc->t_event); - THREAD_OFF(fnc->t_nhg); - thread_cancel_async(fnc->fthread->master, &fnc->t_read, NULL); - thread_cancel_async(fnc->fthread->master, &fnc->t_write, NULL); - thread_cancel_async(fnc->fthread->master, &fnc->t_connect, NULL); + EVENT_OFF(fnc->t_lspreset); + EVENT_OFF(fnc->t_lspwalk); + EVENT_OFF(fnc->t_nhgreset); + EVENT_OFF(fnc->t_nhgwalk); + EVENT_OFF(fnc->t_ribreset); + EVENT_OFF(fnc->t_ribwalk); + EVENT_OFF(fnc->t_rmacreset); + EVENT_OFF(fnc->t_rmacwalk); + EVENT_OFF(fnc->t_event); + EVENT_OFF(fnc->t_nhg); + event_cancel_async(fnc->fthread->master, &fnc->t_read, NULL); + event_cancel_async(fnc->fthread->master, &fnc->t_write, NULL); + event_cancel_async(fnc->fthread->master, &fnc->t_connect, NULL); if (fnc->socket != -1) { close(fnc->socket); @@ -2154,10 +2168,29 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) struct zebra_dplane_ctx *ctx; struct fpm_nl_ctx *fnc; int counter, limit; - uint64_t cur_queue, peak_queue = 0, stored_peak_queue; + uint64_t cur_queue = 0, peak_queue = 0, stored_peak_queue; fnc = dplane_provider_get_data(prov); limit = dplane_provider_get_work_limit(prov); + + frr_with_mutex (&fnc->ctxqueue_mutex) { + cur_queue = dplane_ctx_queue_count(&fnc->ctxqueue); + } + + if (cur_queue >= (uint64_t)limit) { + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug("%s: Already at a limit(%" PRIu64 + ") of internal work, hold off", + __func__, cur_queue); + limit = 0; + } else { + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug("%s: current queue is %" PRIu64 + ", limiting to lesser amount of %" PRIu64, + __func__, cur_queue, limit - cur_queue); + limit -= cur_queue; + } + for (counter = 0; counter < limit; counter++) { ctx = dplane_provider_dequeue_in_ctx(prov); if (ctx == NULL) @@ -2168,20 +2201,12 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) * anyway. */ if (fnc->socket != -1 && fnc->connecting == false) { - /* - * Update the number of queued contexts *before* - * enqueueing, to ensure counter consistency. - */ - atomic_fetch_add_explicit(&fnc->counters.ctxqueue_len, - 1, memory_order_relaxed); - frr_with_mutex (&fnc->ctxqueue_mutex) { dplane_ctx_enqueue_tail(&fnc->ctxqueue, ctx); + cur_queue = + dplane_ctx_queue_count(&fnc->ctxqueue); } - cur_queue = atomic_load_explicit( - &fnc->counters.ctxqueue_len, - memory_order_relaxed); if (peak_queue < cur_queue) peak_queue = cur_queue; continue; @@ -2198,10 +2223,8 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) atomic_store_explicit(&fnc->counters.ctxqueue_len_peak, peak_queue, memory_order_relaxed); - if (atomic_load_explicit(&fnc->counters.ctxqueue_len, - memory_order_relaxed) - > 0) - thread_add_timer(fnc->fthread->master, fpm_process_queue, + if (cur_queue > 0) + event_add_timer(fnc->fthread->master, fpm_process_queue, fnc, 0, &fnc->t_dequeue); /* Ensure dataplane thread is rescheduled if we hit the work limit */ @@ -2211,7 +2234,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) return 0; } -static int fpm_nl_new(struct thread_master *tm) +static int fpm_nl_new(struct event_loop *tm) { struct zebra_dplane_provider *prov = NULL; int rv; diff --git a/src/sonic-frr/frr b/src/sonic-frr/frr index de0e358b877..3fbd709d888 160000 --- a/src/sonic-frr/frr +++ b/src/sonic-frr/frr @@ -1 +1 @@ -Subproject commit de0e358b877ac9b595e7fb387a302c960a4c02d1 +Subproject commit 3fbd709d888ab94db178e44a5b9d67c3653e0b17 diff --git a/src/sonic-frr/patch/0008-Use-vrf_id-for-vrf-not-tabled_id.patch b/src/sonic-frr/patch/0008-Use-vrf_id-for-vrf-not-tabled_id.patch index ae8b05f06bd..bf5dce51c9a 100644 --- a/src/sonic-frr/patch/0008-Use-vrf_id-for-vrf-not-tabled_id.patch +++ b/src/sonic-frr/patch/0008-Use-vrf_id-for-vrf-not-tabled_id.patch @@ -5,15 +5,14 @@ Subject: [PATCH] From 349e3f758860be0077b69919c39764d3486ec44a Mon Sep 17 00:00:00 2001 Subject: [PATCH] use vrf id instead of table id Signed-off-by: Stepan Blyschak - diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c -index 325199eff..587045eac 100644 +index b8d097e58..b81a9db6d 100644 --- a/zebra/rt_netlink.c +++ b/zebra/rt_netlink.c -@@ -406,6 +406,30 @@ vrf_id_t vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id) - return VRF_DEFAULT; +@@ -385,6 +385,31 @@ static inline int proto2zebra(int proto, int family, bool is_nexthop) + return proto; } - + +static uint32_t table_lookup_by_vrf(vrf_id_t vrf_id, ns_id_t ns_id) +{ + struct vrf *vrf; @@ -37,14 +36,15 @@ index 325199eff..587045eac 100644 + + return RT_TABLE_UNSPEC; +} ++ + /** * @parse_encap_mpls() - Parses encapsulated mpls attributes * @tb: Pointer to rtattr to look for nested items in. -@@ -782,14 +806,26 @@ int netlink_route_change_read_unicast_internal(struct nlmsghdr *h, +@@ -817,14 +842,26 @@ int netlink_route_change_read_unicast_internal(struct nlmsghdr *h, if (rtm->rtm_family == AF_MPLS) return 0; - + - /* Table corresponding to route. */ - if (tb[RTA_TABLE]) - table = *(int *)RTA_DATA(tb[RTA_TABLE]); @@ -58,7 +58,7 @@ index 325199eff..587045eac 100644 + table = rtm->rtm_table; + + /* Map to VRF */ -+ vrf_id = vrf_lookup_by_table(table, ns_id); ++ vrf_id = zebra_vrf_lookup_by_table(table, ns_id); + } else { + /* With FPM, rtm_table contains vrf id, see netlink_route_multipath_msg_encode */ + if (tb[RTA_TABLE]) @@ -69,14 +69,14 @@ index 325199eff..587045eac 100644 + /* Map to table */ + table = table_lookup_by_vrf(vrf_id, ns_id); + } - + - /* Map to VRF */ -- vrf_id = vrf_lookup_by_table(table, ns_id); +- vrf_id = zebra_vrf_lookup_by_table(table, ns_id); if (vrf_id == VRF_DEFAULT) { if (!is_zebra_valid_kernel_table(table) && !is_zebra_main_routing_table(table)) -@@ -2102,12 +2138,24 @@ ssize_t netlink_route_multipath_msg_encode(int cmd, - +@@ -2283,13 +2320,25 @@ ssize_t netlink_route_multipath_msg_encode(int cmd, struct zebra_dplane_ctx *ctx + /* Table corresponding to this route. */ table_id = dplane_ctx_get_table(ctx); - if (table_id < 256) @@ -85,6 +85,7 @@ index 325199eff..587045eac 100644 - req->r.rtm_table = RT_TABLE_UNSPEC; - if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, table_id)) - return 0; +- } + if (!fpm) { + if (table_id < 256) + req->r.rtm_table = table_id; @@ -103,9 +104,7 @@ index 325199eff..587045eac 100644 + if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, vrf)) + return 0; + } - } - - if (IS_ZEBRA_DEBUG_KERNEL) --- -2.17.1 ++ } + if (IS_ZEBRA_DEBUG_KERNEL) + zlog_debug( diff --git a/src/sonic-frr/patch/0009-bgpd-Ensure-suppress-fib-pending-works-with-network-.patch b/src/sonic-frr/patch/0009-bgpd-Ensure-suppress-fib-pending-works-with-network-.patch deleted file mode 100644 index a276f9ba5b4..00000000000 --- a/src/sonic-frr/patch/0009-bgpd-Ensure-suppress-fib-pending-works-with-network-.patch +++ /dev/null @@ -1,132 +0,0 @@ -From c4a198c977168a6bd420197d19c8a4c0f4eacc8a Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Wed, 22 Mar 2023 11:35:28 -0400 -Subject: [PATCH] From 5a1d3c9e24791ebdb7e375a02afe9c5f6146c488 Mon Sep 17 - 00:00:00 2001 Subject: [PATCH] bgpd: Ensure suppress-fib-pending works with - network statements - -The flag for telling BGP that a route is expected to be installed -first before notifying a peer was always being set upon receipt -of a path that could be accepted as bestpath. This is not correct: -imagine that you have a peer sending you a route and you have a -network statement that covers the same route. Irrelevant if the -network statement would win the flag on the dest was being set -in bgp_update. Thus you could get into a situation where -the network statement path wins but since the flag is set on -the node, it will never be announced to a peer. - -Let's just move the setting of the flag into bgp_zebra_announce -and _withdraw. In _announce set the flag to TRUE when suppress-fib -is enabled. In _withdraw just always unset the flag as that a withdrawal -does not need to wait for rib removal before announcing. This will -cover the case when a network statement is added after the route has -been learned from a peer. - -Signed-off-by: Donald Sharp - -diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c -index f00c54c40..a7a5c9849 100644 ---- a/bgpd/bgp_route.c -+++ b/bgpd/bgp_route.c -@@ -3203,11 +3203,6 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, - if (bgp_fibupd_safi(safi) - && !bgp_option_check(BGP_OPT_NO_FIB)) { - -- if (BGP_SUPPRESS_FIB_ENABLED(bgp) -- && new_select->sub_type == BGP_ROUTE_NORMAL) -- SET_FLAG(dest->flags, -- BGP_NODE_FIB_INSTALL_PENDING); -- - if (new_select->type == ZEBRA_ROUTE_BGP - && (new_select->sub_type == BGP_ROUTE_NORMAL - || new_select->sub_type -@@ -3313,10 +3308,6 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, - || new_select->sub_type == BGP_ROUTE_AGGREGATE - || new_select->sub_type == BGP_ROUTE_IMPORTED)) { - -- if (BGP_SUPPRESS_FIB_ENABLED(bgp)) -- SET_FLAG(dest->flags, -- BGP_NODE_FIB_INSTALL_PENDING); -- - /* if this is an evpn imported type-5 prefix, - * we need to withdraw the route first to clear - * the nh neigh and the RMAC entry. -@@ -4261,18 +4252,6 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, - bgp_attr_flush(&new_attr); - goto filtered; - } -- /* The flag BGP_NODE_FIB_INSTALL_PENDING is for the following -- * condition : -- * Suppress fib is enabled -- * BGP_OPT_NO_FIB is not enabled -- * Route type is BGP_ROUTE_NORMAL (peer learnt routes) -- * Route is being installed first time (BGP_NODE_FIB_INSTALLED not set) -- */ -- if (bgp_fibupd_safi(safi) && BGP_SUPPRESS_FIB_ENABLED(bgp) -- && (sub_type == BGP_ROUTE_NORMAL) -- && (!bgp_option_check(BGP_OPT_NO_FIB)) -- && (!CHECK_FLAG(dest->flags, BGP_NODE_FIB_INSTALLED))) -- SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING); - - /* If neighbor soo is configured, tag all incoming routes with - * this SoO tag and then filter out advertisements in -diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c -index 95e80ba1b..efcf49785 100644 ---- a/bgpd/bgp_zebra.c -+++ b/bgpd/bgp_zebra.c -@@ -1322,6 +1322,14 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, - uint32_t bos = 0; - uint32_t exp = 0; - -+ /* -+ * BGP is installing this route and bgp has been configured -+ * to suppress announcements until the route has been installed -+ * let's set the fact that we expect this route to be installed -+ */ -+ if (BGP_SUPPRESS_FIB_ENABLED(bgp)) -+ SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING); -+ - /* Don't try to install if we're not connected to Zebra or Zebra doesn't - * know of this instance. - */ -@@ -1758,6 +1766,12 @@ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info, - struct zapi_route api; - struct peer *peer; - -+ /* -+ * If we are withdrawing the route, we don't need to have this -+ * flag set. So unset it. -+ */ -+ UNSET_FLAG(info->net->flags, BGP_NODE_FIB_INSTALL_PENDING); -+ - /* Don't try to install if we're not connected to Zebra or Zebra doesn't - * know of this instance. - */ -diff --git a/tests/topotests/bgp_suppress_fib/test_bgp_suppress_fib.py b/tests/topotests/bgp_suppress_fib/test_bgp_suppress_fib.py -index 6d2b65a61..7bcb28166 100644 ---- a/tests/topotests/bgp_suppress_fib/test_bgp_suppress_fib.py -+++ b/tests/topotests/bgp_suppress_fib/test_bgp_suppress_fib.py -@@ -230,6 +230,20 @@ def test_bgp_allow_as_in(): - assertmsg = '"r2" 192.168.1.1/32 route should be gone' - assert result is None, assertmsg - -+def test_local_vs_non_local(): -+ tgen = get_topogen() -+ -+ if tgen.routers_have_failure(): -+ pytest.skip(tgen.errors) -+ -+ r2 = tgen.gears["r2"] -+ -+ output = json.loads(r2.vtysh_cmd("show bgp ipv4 uni 60.0.0.0/24 json")) -+ paths = output["paths"] -+ for i in range(len(paths)): -+ if "fibPending" in paths[i]: -+ assert(False), "Route 60.0.0.0/24 should not have fibPending" -+ - - if __name__ == "__main__": - args = ["-s"] + sys.argv[1:] --- -2.17.1 - diff --git a/src/sonic-frr/patch/0010-bgpd-Change-log-level-for-graceful-restart-events.patch b/src/sonic-frr/patch/0010-bgpd-Change-log-level-for-graceful-restart-events.patch index 54fcc1575a7..be4bbb6a860 100644 --- a/src/sonic-frr/patch/0010-bgpd-Change-log-level-for-graceful-restart-events.patch +++ b/src/sonic-frr/patch/0010-bgpd-Change-log-level-for-graceful-restart-events.patch @@ -3,49 +3,43 @@ From: stormliang Date: Mon, 19 Jun 2023 13:57:01 +0000 Subject: [PATCH] From c423bce4db804c1d07d65ce3d06a9e62c4eceb2b Mon Sep 17 00:00:00 2001 Subject: [PATCH] change log level for graceful restart events - - diff --git a/bgpd/bgp_fsm.c b/bgpd/bgp_fsm.c -index 9624adfbe..74b4dfc4a 100644 +index 504343994..f58ab7c02 100644 --- a/bgpd/bgp_fsm.c +++ b/bgpd/bgp_fsm.c -@@ -778,10 +778,10 @@ static void bgp_graceful_restart_timer_expire(struct thread *thread) - - peer = THREAD_ARG(thread); - +@@ -739,9 +739,9 @@ static void bgp_graceful_restart_timer_expire(struct event *thread) + afi_t afi; + safi_t safi; + - if (bgp_debug_neighbor_events(peer)) { - zlog_debug("%pBP graceful restart timer expired", peer); - zlog_debug("%pBP graceful restart stalepath timer stopped", -- peer); + if (peer) { + zlog_info("%pBP graceful restart timer expired", peer); + zlog_info("%pBP graceful restart stalepath timer stopped", -+ peer); + peer); } - - FOREACH_AFI_SAFI (afi, safi) { -@@ -842,8 +842,8 @@ static void bgp_graceful_stale_timer_expire(struct thread *thread) - - peer = THREAD_ARG(thread); - + +@@ -801,8 +801,8 @@ static void bgp_graceful_stale_timer_expire(struct event *thread) + afi_t afi; + safi_t safi; + - if (bgp_debug_neighbor_events(peer)) - zlog_debug("%pBP graceful restart stalepath timer expired", + if (peer) + zlog_info("%pBP graceful restart stalepath timer expired", peer); - + /* NSF delete stale route */ -@@ -1412,20 +1412,17 @@ enum bgp_fsm_state_progress bgp_stop(struct peer *peer) +@@ -1380,20 +1380,17 @@ enum bgp_fsm_state_progress bgp_stop(struct peer_connection *connection) /* graceful restart */ - if (peer->t_gr_stale) { - THREAD_OFF(peer->t_gr_stale); + if (connection->t_gr_stale) { + EVENT_OFF(connection->t_gr_stale); - if (bgp_debug_neighbor_events(peer)) - zlog_debug( -- "%pBP graceful restart stalepath timer stopped", -- peer); -+ zlog_info( -+ "%pBP graceful restart stalepath timer stopped", -+ peer); ++ zlog_info( + "%pBP graceful restart stalepath timer stopped", + peer); } if (CHECK_FLAG(peer->sflags, PEER_STATUS_NSF_WAIT)) { - if (bgp_debug_neighbor_events(peer)) { @@ -62,55 +56,46 @@ index 9624adfbe..74b4dfc4a 100644 + zlog_info( + "%pBP graceful restart stalepath timer started for %d sec", + peer, peer->bgp->stalepath_time); - BGP_TIMER_ON(peer->t_gr_restart, + BGP_TIMER_ON(connection->t_gr_restart, bgp_graceful_restart_timer_expire, peer->v_gr_restart); -@@ -2225,17 +2222,15 @@ static enum bgp_fsm_state_progress bgp_establish(struct peer *peer) +@@ -2216,8 +2213,7 @@ bgp_establish(struct peer_connection *connection) UNSET_FLAG(peer->sflags, PEER_STATUS_NSF_MODE); - if (peer->t_gr_stale) { - THREAD_OFF(peer->t_gr_stale); + if (connection->t_gr_stale) { + EVENT_OFF(connection->t_gr_stale); - if (bgp_debug_neighbor_events(peer)) - zlog_debug( -- "%pBP graceful restart stalepath timer stopped", -- peer); + zlog_info( -+ "%pBP graceful restart stalepath timer stopped", -+ peer); + "%pBP graceful restart stalepath timer stopped", + peer); } - } - - if (peer->t_gr_restart) { - THREAD_OFF(peer->t_gr_restart); +@@ -2225,8 +2221,7 @@ bgp_establish(struct peer_connection *connection) + + if (connection->t_gr_restart) { + EVENT_OFF(connection->t_gr_restart); - if (bgp_debug_neighbor_events(peer)) - zlog_debug("%pBP graceful restart timer stopped", peer); + zlog_info("%pBP graceful restart timer stopped", peer); } - + /* Reset uptime, turn on keepalives, send current table. */ diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c -index 8b3a1e3dd..2f3b837a5 100644 +index d6d874be2..337879a2d 100644 --- a/bgpd/bgpd.c +++ b/bgpd/bgpd.c -@@ -2453,15 +2453,13 @@ void peer_nsf_stop(struct peer *peer) - - if (peer->t_gr_restart) { - THREAD_OFF(peer->t_gr_restart); +@@ -2629,13 +2629,11 @@ void peer_nsf_stop(struct peer *peer) + + if (peer->connection->t_gr_restart) { + EVENT_OFF(peer->connection->t_gr_restart); - if (bgp_debug_neighbor_events(peer)) - zlog_debug("%pBP graceful restart timer stopped", peer); + zlog_info("%pBP graceful restart timer stopped", peer); } - if (peer->t_gr_stale) { - THREAD_OFF(peer->t_gr_stale); + if (peer->connection->t_gr_stale) { + EVENT_OFF(peer->connection->t_gr_stale); - if (bgp_debug_neighbor_events(peer)) - zlog_debug( -- "%pBP graceful restart stalepath timer stopped", -- peer); + zlog_info( -+ "%pBP graceful restart stalepath timer stopped", -+ peer); + "%pBP graceful restart stalepath timer stopped", + peer); } - bgp_clear_route_all(peer); - } --- -2.17.1 - diff --git a/src/sonic-frr/patch/0011-zebra-Static-routes-async-notification-do-not-need-t.patch b/src/sonic-frr/patch/0011-zebra-Static-routes-async-notification-do-not-need-t.patch deleted file mode 100644 index 6b633badf97..00000000000 --- a/src/sonic-frr/patch/0011-zebra-Static-routes-async-notification-do-not-need-t.patch +++ /dev/null @@ -1,99 +0,0 @@ -From 56d349ef47ba24bcf838488b1e40474755655259 Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Thu, 29 Jun 2023 09:35:00 -0400 -Subject: [PATCH] zebra: Static routes async notification do not need this test - -When using asic_offload with an asynchronous notification the -rib_route_match_ctx function is testing for distance and tag -being correct against the re. - -Normal route notification for static routes is this(well really all routes): -a) zebra dplane generates a ctx to send to the dplane for route install -b) dplane installs it in the kernel -c) if the dplane_fpm_nl.c module is being used it installs it. -d) The context's success code is set to it worked and passes the context -back up to zebra for processing. -e) Zebra master receives this and checks the distance and tag are correct -for static routes and accepts the route and marks it installed. - -If the operator is using a wait for install mechansim where the dplane -is asynchronously sending the result back up at a future time *and* -it is using the dplane_fpm_nl.c code where it uses the rt_netlink.c -route parsing code, then there is no way to set distance as that we -do not pass distance to the kernel. - -As such static routes were never being properly handled since the re and -context would not match and the route would still be marked as queued. - -Modify the code such that the asynchronous path notification for static -routes ignores the distance and tag's as that there is no way to test -for this data from that path at this point in time. - -Signed-off-by: Donald Sharp - -diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c -index fd6df441c6..039c44cc09 100644 ---- a/zebra/zebra_rib.c -+++ b/zebra/zebra_rib.c -@@ -1465,7 +1465,7 @@ static void zebra_rib_evaluate_mpls(struct route_node *rn) - */ - static bool rib_route_match_ctx(const struct route_entry *re, - const struct zebra_dplane_ctx *ctx, -- bool is_update) -+ bool is_update, bool async) - { - bool result = false; - -@@ -1481,13 +1481,12 @@ static bool rib_route_match_ctx(const struct route_entry *re, - /* We use an extra test for statics, and another for - * kernel routes. - */ -- if (re->type == ZEBRA_ROUTE_STATIC && -+ if (re->type == ZEBRA_ROUTE_STATIC && !async && - (re->distance != dplane_ctx_get_old_distance(ctx) || - re->tag != dplane_ctx_get_old_tag(ctx))) { - result = false; - } else if (re->type == ZEBRA_ROUTE_KERNEL && -- re->metric != -- dplane_ctx_get_old_metric(ctx)) { -+ re->metric != dplane_ctx_get_old_metric(ctx)) { - result = false; - } - } -@@ -1509,7 +1508,7 @@ static bool rib_route_match_ctx(const struct route_entry *re, - /* We use an extra test for statics, and another for - * kernel routes. - */ -- if (re->type == ZEBRA_ROUTE_STATIC && -+ if (re->type == ZEBRA_ROUTE_STATIC && !async && - (re->distance != dplane_ctx_get_distance(ctx) || - re->tag != dplane_ctx_get_tag(ctx))) { - result = false; -@@ -1973,13 +1972,13 @@ static void rib_process_result(struct zebra_dplane_ctx *ctx) - RNODE_FOREACH_RE(rn, rib) { - - if (re == NULL) { -- if (rib_route_match_ctx(rib, ctx, false)) -+ if (rib_route_match_ctx(rib, ctx, false, false)) - re = rib; - } - - /* Check for old route match */ - if (is_update && (old_re == NULL)) { -- if (rib_route_match_ctx(rib, ctx, true /*is_update*/)) -+ if (rib_route_match_ctx(rib, ctx, true, false)) - old_re = rib; - } - -@@ -2247,7 +2246,7 @@ static void rib_process_dplane_notify(struct zebra_dplane_ctx *ctx) - * info. - */ - RNODE_FOREACH_RE(rn, re) { -- if (rib_route_match_ctx(re, ctx, false /*!update*/)) -+ if (rib_route_match_ctx(re, ctx, false, true)) - break; - } - --- -2.17.1 - diff --git a/src/sonic-frr/patch/0012-zebra-Rename-vrf_lookup_by_tableid-to-zebra_vrf_look.patch b/src/sonic-frr/patch/0012-zebra-Rename-vrf_lookup_by_tableid-to-zebra_vrf_look.patch deleted file mode 100644 index ca6517fbf65..00000000000 --- a/src/sonic-frr/patch/0012-zebra-Rename-vrf_lookup_by_tableid-to-zebra_vrf_look.patch +++ /dev/null @@ -1,147 +0,0 @@ -From 2b9c7592a9857ddccc77b9d3f178e0c5bd5f19ed Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Wed, 26 Apr 2023 23:25:27 -0400 -Subject: [PATCH] zebra: Rename vrf_lookup_by_tableid to zebra_vrf_lookup.. - -Rename the vrf_lookup_by_id function to zebra_vrf_lookup_by_id -and move to zebra_vrf.c where it nominally belongs, as that -we need zebra specific data to find this vrf_id and as such -it does not belong in vrf.c - -Signed-off-by: Donald Sharp - -diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c -index 81347b550a..4599121261 100644 ---- a/zebra/if_netlink.c -+++ b/zebra/if_netlink.c -@@ -342,7 +342,8 @@ static void netlink_vrf_change(struct nlmsghdr *h, struct rtattr *tb, - if (!vrf_lookup_by_id((vrf_id_t)ifi->ifi_index)) { - vrf_id_t exist_id; - -- exist_id = vrf_lookup_by_table(nl_table_id, ns_id); -+ exist_id = -+ zebra_vrf_lookup_by_table(nl_table_id, ns_id); - if (exist_id != VRF_DEFAULT) { - vrf = vrf_lookup_by_id(exist_id); - -diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c -index 587045eac2..6b9b047858 100644 ---- a/zebra/rt_netlink.c -+++ b/zebra/rt_netlink.c -@@ -379,33 +379,6 @@ static inline int proto2zebra(int proto, int family, bool is_nexthop) - return proto; - } - --/* --Pending: create an efficient table_id (in a tree/hash) based lookup) -- */ --vrf_id_t vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id) --{ -- struct vrf *vrf; -- struct zebra_vrf *zvrf; -- -- RB_FOREACH (vrf, vrf_id_head, &vrfs_by_id) { -- zvrf = vrf->info; -- if (zvrf == NULL) -- continue; -- /* case vrf with netns : match the netnsid */ -- if (vrf_is_backend_netns()) { -- if (ns_id == zvrf_id(zvrf)) -- return zvrf_id(zvrf); -- } else { -- /* VRF is VRF_BACKEND_VRF_LITE */ -- if (zvrf->table_id != table_id) -- continue; -- return zvrf_id(zvrf); -- } -- } -- -- return VRF_DEFAULT; --} -- - static uint32_t table_lookup_by_vrf(vrf_id_t vrf_id, ns_id_t ns_id) - { - struct vrf *vrf; -@@ -814,7 +787,7 @@ int netlink_route_change_read_unicast_internal(struct nlmsghdr *h, - table = rtm->rtm_table; - - /* Map to VRF */ -- vrf_id = vrf_lookup_by_table(table, ns_id); -+ vrf_id = zebra_vrf_lookup_by_table(table, ns_id); - } else { - /* With FPM, rtm_table contains vrf id, see netlink_route_multipath_msg_encode */ - if (tb[RTA_TABLE]) -@@ -1114,7 +1087,7 @@ static int netlink_route_change_read_multicast(struct nlmsghdr *h, - else - table = rtm->rtm_table; - -- vrf = vrf_lookup_by_table(table, ns_id); -+ vrf = zebra_vrf_lookup_by_table(table, ns_id); - - if (tb[RTA_IIF]) - iif = *(int *)RTA_DATA(tb[RTA_IIF]); -diff --git a/zebra/rt_netlink.h b/zebra/rt_netlink.h -index 8506367ae4..364aac0f6b 100644 ---- a/zebra/rt_netlink.h -+++ b/zebra/rt_netlink.h -@@ -102,7 +102,6 @@ extern int netlink_macfdb_read_specific_mac(struct zebra_ns *zns, - uint16_t vid); - extern int netlink_neigh_read_specific_ip(const struct ipaddr *ip, - struct interface *vlan_if); --extern vrf_id_t vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id); - - struct nl_batch; - extern enum netlink_msg_status -diff --git a/zebra/zebra_vrf.c b/zebra/zebra_vrf.c -index be5e91495f..c59cb7c0a7 100644 ---- a/zebra/zebra_vrf.c -+++ b/zebra/zebra_vrf.c -@@ -389,6 +389,33 @@ struct zebra_vrf *zebra_vrf_alloc(struct vrf *vrf) - return zvrf; - } - -+/* -+Pending: create an efficient table_id (in a tree/hash) based lookup) -+ */ -+vrf_id_t zebra_vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id) -+{ -+ struct vrf *vrf; -+ struct zebra_vrf *zvrf; -+ -+ RB_FOREACH (vrf, vrf_id_head, &vrfs_by_id) { -+ zvrf = vrf->info; -+ if (zvrf == NULL) -+ continue; -+ /* case vrf with netns : match the netnsid */ -+ if (vrf_is_backend_netns()) { -+ if (ns_id == zvrf_id(zvrf)) -+ return zvrf_id(zvrf); -+ } else { -+ /* VRF is VRF_BACKEND_VRF_LITE */ -+ if (zvrf->table_id != table_id) -+ continue; -+ return zvrf_id(zvrf); -+ } -+ } -+ -+ return VRF_DEFAULT; -+} -+ - /* Lookup VRF by identifier. */ - struct zebra_vrf *zebra_vrf_lookup_by_id(vrf_id_t vrf_id) - { -diff --git a/zebra/zebra_vrf.h b/zebra/zebra_vrf.h -index 02e3c197c9..937e7fb144 100644 ---- a/zebra/zebra_vrf.h -+++ b/zebra/zebra_vrf.h -@@ -252,6 +252,7 @@ extern struct route_table *zebra_vrf_get_table_with_table_id(afi_t afi, - extern void zebra_vrf_update_all(struct zserv *client); - extern struct zebra_vrf *zebra_vrf_lookup_by_id(vrf_id_t vrf_id); - extern struct zebra_vrf *zebra_vrf_lookup_by_name(const char *); -+extern vrf_id_t zebra_vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id); - extern struct zebra_vrf *zebra_vrf_alloc(struct vrf *vrf); - extern struct route_table *zebra_vrf_table(afi_t, safi_t, vrf_id_t); - --- -2.17.1 - diff --git a/src/sonic-frr/patch/0013-zebra-Move-protodown_r_bit-to-a-better-spot.patch b/src/sonic-frr/patch/0013-zebra-Move-protodown_r_bit-to-a-better-spot.patch deleted file mode 100644 index cd88419fcbd..00000000000 --- a/src/sonic-frr/patch/0013-zebra-Move-protodown_r_bit-to-a-better-spot.patch +++ /dev/null @@ -1,181 +0,0 @@ -From c43808ca6daa59d533e14790ffc7f2e11b508924 Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Thu, 27 Apr 2023 07:37:58 -0400 -Subject: [PATCH] zebra: Move protodown_r_bit to a better spot - -Since we are moving some code handling out of the dataplane -and into zebra proper, lets move the protodown r bit as well. - -Signed-off-by: Donald Sharp - -diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c -index 4599121261..95889e22fd 100644 ---- a/zebra/if_netlink.c -+++ b/zebra/if_netlink.c -@@ -78,7 +78,6 @@ - #include "zebra/zebra_trace.h" - - extern struct zebra_privs_t zserv_privs; --uint8_t frr_protodown_r_bit = FRR_PROTODOWN_REASON_DEFAULT_BIT; - - /* Note: on netlink systems, there should be a 1-to-1 mapping between interface - names and ifindex values. */ -@@ -819,9 +818,7 @@ static int netlink_bridge_interface(struct nlmsghdr *h, int len, ns_id_t ns_id, - - static bool is_if_protodown_reason_only_frr(uint32_t rc_bitfield) - { -- /* This shouldn't be possible */ -- assert(frr_protodown_r_bit < 32); -- return (rc_bitfield == (((uint32_t)1) << frr_protodown_r_bit)); -+ return (rc_bitfield == (((uint32_t)1) << if_netlink_get_frr_protodown_r_bit())); - } - - /* -@@ -2247,9 +2244,10 @@ ssize_t netlink_intf_msg_encode(uint16_t cmd, - return -1; - - nl_attr_put32(&req->n, buflen, IFLA_PROTO_DOWN_REASON_MASK, -- (1 << frr_protodown_r_bit)); -+ (1 << if_netlink_get_frr_protodown_r_bit())); - nl_attr_put32(&req->n, buflen, IFLA_PROTO_DOWN_REASON_VALUE, -- ((int)pd_reason_val) << frr_protodown_r_bit); -+ ((int)pd_reason_val) -+ << if_netlink_get_frr_protodown_r_bit()); - - nl_attr_nest_end(&req->n, nest_protodown_reason); - -@@ -2274,37 +2272,6 @@ void interface_list(struct zebra_ns *zns) - interface_addr_lookup_netlink(zns); - } - --void if_netlink_set_frr_protodown_r_bit(uint8_t bit) --{ -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "Protodown reason bit index changed: bit-index %u -> bit-index %u", -- frr_protodown_r_bit, bit); -- -- frr_protodown_r_bit = bit; --} -- --void if_netlink_unset_frr_protodown_r_bit(void) --{ -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "Protodown reason bit index changed: bit-index %u -> bit-index %u", -- frr_protodown_r_bit, FRR_PROTODOWN_REASON_DEFAULT_BIT); -- -- frr_protodown_r_bit = FRR_PROTODOWN_REASON_DEFAULT_BIT; --} -- -- --bool if_netlink_frr_protodown_r_bit_is_set(void) --{ -- return (frr_protodown_r_bit != FRR_PROTODOWN_REASON_DEFAULT_BIT); --} -- --uint8_t if_netlink_get_frr_protodown_r_bit(void) --{ -- return frr_protodown_r_bit; --} -- - /** - * netlink_request_tunneldump() - Request all tunnels from the linux kernel - * -diff --git a/zebra/if_netlink.h b/zebra/if_netlink.h -index 21ae1713be..f5a170a609 100644 ---- a/zebra/if_netlink.h -+++ b/zebra/if_netlink.h -@@ -54,17 +54,6 @@ extern int netlink_tunneldump_read(struct zebra_ns *zns); - extern enum netlink_msg_status - netlink_put_intf_update_msg(struct nl_batch *bth, struct zebra_dplane_ctx *ctx); - --#define FRR_PROTODOWN_REASON_DEFAULT_BIT 7 --/* Protodown bit setter/getter -- * -- * Allow users to change the bit if it conflicts with another -- * on their system. -- */ --extern void if_netlink_set_frr_protodown_r_bit(uint8_t bit); --extern void if_netlink_unset_frr_protodown_r_bit(void); --extern bool if_netlink_frr_protodown_r_bit_is_set(void); --extern uint8_t if_netlink_get_frr_protodown_r_bit(void); -- - #ifdef __cplusplus - } - #endif -diff --git a/zebra/zebra_router.c b/zebra/zebra_router.c -index a9a7b66ce7..12689804ea 100644 ---- a/zebra/zebra_router.c -+++ b/zebra/zebra_router.c -@@ -280,6 +280,8 @@ void zebra_router_init(bool asic_offload, bool notify_on_ack) - { - zrouter.sequence_num = 0; - -+ zrouter.protodown_r_bit = FRR_PROTODOWN_REASON_DEFAULT_BIT; -+ - zrouter.allow_delete = false; - - zrouter.packets_to_process = ZEBRA_ZAPI_PACKETS_TO_PROCESS; -diff --git a/zebra/zebra_router.h b/zebra/zebra_router.h -index e0ef86f082..61bde4ac2a 100644 ---- a/zebra/zebra_router.h -+++ b/zebra/zebra_router.h -@@ -244,6 +244,8 @@ struct zebra_router { - - /* Should we allow non FRR processes to delete our routes */ - bool allow_delete; -+ -+ uint8_t protodown_r_bit; - }; - - #define GRACEFUL_RESTART_TIME 60 -@@ -302,6 +304,32 @@ static inline bool zebra_router_in_shutdown(void) - return atomic_load_explicit(&zrouter.in_shutdown, memory_order_relaxed); - } - -+#define FRR_PROTODOWN_REASON_DEFAULT_BIT 7 -+/* Protodown bit setter/getter -+ * -+ * Allow users to change the bit if it conflicts with another -+ * on their system. -+ */ -+static inline void if_netlink_set_frr_protodown_r_bit(uint8_t bit) -+{ -+ zrouter.protodown_r_bit = bit; -+} -+ -+static inline void if_netlink_unset_frr_protodown_r_bit(void) -+{ -+ zrouter.protodown_r_bit = FRR_PROTODOWN_REASON_DEFAULT_BIT; -+} -+ -+static inline bool if_netlink_frr_protodown_r_bit_is_set(void) -+{ -+ return (zrouter.protodown_r_bit != FRR_PROTODOWN_REASON_DEFAULT_BIT); -+} -+ -+static inline uint8_t if_netlink_get_frr_protodown_r_bit(void) -+{ -+ return zrouter.protodown_r_bit; -+} -+ - /* zebra_northbound.c */ - extern const struct frr_yang_module_info frr_zebra_info; - -diff --git a/zebra/zebra_vrf.c b/zebra/zebra_vrf.c -index c59cb7c0a7..9c5b38b96b 100644 ---- a/zebra/zebra_vrf.c -+++ b/zebra/zebra_vrf.c -@@ -390,7 +390,7 @@ struct zebra_vrf *zebra_vrf_alloc(struct vrf *vrf) - } - - /* --Pending: create an efficient table_id (in a tree/hash) based lookup) -+ * Pending: create an efficient table_id (in a tree/hash) based lookup) - */ - vrf_id_t zebra_vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id) - { --- -2.17.1 - diff --git a/src/sonic-frr/patch/0014-zebra-Remove-unused-dplane_intf_delete.patch b/src/sonic-frr/patch/0014-zebra-Remove-unused-dplane_intf_delete.patch deleted file mode 100644 index 756e0cf9741..00000000000 --- a/src/sonic-frr/patch/0014-zebra-Remove-unused-dplane_intf_delete.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 88f7441f56bf61008a52adda97525ffb20f9543d Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Fri, 14 Apr 2023 07:43:19 -0400 -Subject: [PATCH] zebra: Remove unused dplane_intf_delete - -There is no need for this functionality and it is -not used. - -Signed-off-by: Donald Sharp - -diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c -index 4927af5625..a6c08f7371 100644 ---- a/zebra/zebra_dplane.c -+++ b/zebra/zebra_dplane.c -@@ -4648,18 +4648,6 @@ enum zebra_dplane_result dplane_intf_update(const struct interface *ifp) - return ret; - } - --/* -- * Enqueue a interface delete for the dataplane. -- */ --enum zebra_dplane_result dplane_intf_delete(const struct interface *ifp) --{ -- enum zebra_dplane_result ret = ZEBRA_DPLANE_REQUEST_FAILURE; -- -- if (ifp) -- ret = dplane_intf_update_internal(ifp, DPLANE_OP_INTF_DELETE); -- return ret; --} -- - /* - * Enqueue vxlan/evpn mac add (or update). - */ -diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h -index ae13243a16..9ef0afd3a8 100644 ---- a/zebra/zebra_dplane.h -+++ b/zebra/zebra_dplane.h -@@ -758,7 +758,6 @@ enum zebra_dplane_result dplane_intf_addr_unset(const struct interface *ifp, - */ - enum zebra_dplane_result dplane_intf_add(const struct interface *ifp); - enum zebra_dplane_result dplane_intf_update(const struct interface *ifp); --enum zebra_dplane_result dplane_intf_delete(const struct interface *ifp); - - /* - * Enqueue tc link changes for the dataplane. --- -2.17.1 - diff --git a/src/sonic-frr/patch/0015-zebra-Remove-unused-add-variable.patch b/src/sonic-frr/patch/0015-zebra-Remove-unused-add-variable.patch deleted file mode 100644 index dc263d3d94c..00000000000 --- a/src/sonic-frr/patch/0015-zebra-Remove-unused-add-variable.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 4cc6c7af6f7c72ddf18ab562f4e2c2b25e32f1b5 Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Sat, 15 Apr 2023 08:04:51 -0400 -Subject: [PATCH] zebra: Remove unused add variable - -Function was not using the add variable. Remove it. - -Signed-off-by: Donald Sharp - -diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c -index 95889e22fd..e54fb09022 100644 ---- a/zebra/if_netlink.c -+++ b/zebra/if_netlink.c -@@ -670,7 +670,7 @@ static void netlink_interface_update_l2info(struct interface *ifp, - struct zebra_l2info_bridge bridge_info; - - netlink_extract_bridge_info(link_data, &bridge_info); -- zebra_l2_bridge_add_update(ifp, &bridge_info, add); -+ zebra_l2_bridge_add_update(ifp, &bridge_info); - } else if (IS_ZEBRA_IF_VLAN(ifp)) { - struct zebra_l2info_vlan vlan_info; - -diff --git a/zebra/zebra_l2.c b/zebra/zebra_l2.c -index 8a9f3dffe3..07bbc6e3bc 100644 ---- a/zebra/zebra_l2.c -+++ b/zebra/zebra_l2.c -@@ -258,8 +258,7 @@ void zebra_l2if_update_bond(struct interface *ifp, bool add) - * map slaves (if any) to the bridge. - */ - void zebra_l2_bridge_add_update(struct interface *ifp, -- struct zebra_l2info_bridge *bridge_info, -- int add) -+ struct zebra_l2info_bridge *bridge_info) - { - struct zebra_if *zif; - -diff --git a/zebra/zebra_l2.h b/zebra/zebra_l2.h -index 1c3e98158d..8fef008f52 100644 ---- a/zebra/zebra_l2.h -+++ b/zebra/zebra_l2.h -@@ -109,8 +109,7 @@ extern void zebra_l2_map_slave_to_bridge(struct zebra_l2info_brslave *br_slave, - extern void - zebra_l2_unmap_slave_from_bridge(struct zebra_l2info_brslave *br_slave); - extern void zebra_l2_bridge_add_update(struct interface *ifp, -- struct zebra_l2info_bridge *bridge_info, -- int add); -+ struct zebra_l2info_bridge *bridge_info); - extern void zebra_l2_bridge_del(struct interface *ifp); - extern void zebra_l2_vlanif_update(struct interface *ifp, - struct zebra_l2info_vlan *vlan_info); --- -2.17.1 - diff --git a/src/sonic-frr/patch/0016-zebra-Remove-duplicate-function-for-netlink-interfac.patch b/src/sonic-frr/patch/0016-zebra-Remove-duplicate-function-for-netlink-interfac.patch deleted file mode 100644 index 8f13d20f005..00000000000 --- a/src/sonic-frr/patch/0016-zebra-Remove-duplicate-function-for-netlink-interfac.patch +++ /dev/null @@ -1,301 +0,0 @@ -From e12ffa6871d33712b03fc2ca28de278913e95bce Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Thu, 13 Apr 2023 16:43:27 -0400 -Subject: [PATCH] zebra: Remove duplicate function for netlink interface - changes - -Turns out FRR has 2 functions one specifically for startup -and one for normal day to day operations. There were only -a couple of minor differences from what I could tell, and -where they were different the after startup functionality should -have been updated too. I cannot figure out why we have 2. - -Non-startup handling of bonds appears to be incorrect -so let's fix that. Additionally the speed was not -properly being set in non-startup situations. - -Signed-off-by: Donald Sharp - -diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c -index e54fb09022..ed5b3c4a66 100644 ---- a/zebra/if_netlink.c -+++ b/zebra/if_netlink.c -@@ -938,178 +938,6 @@ static void if_sweep_protodown(struct zebra_if *zif) - dplane_intf_update(zif->ifp); - } - --/* -- * Called from interface_lookup_netlink(). This function is only used -- * during bootstrap. -- */ --static int netlink_interface(struct nlmsghdr *h, ns_id_t ns_id, int startup) --{ -- int len; -- struct ifinfomsg *ifi; -- struct rtattr *tb[IFLA_MAX + 1]; -- struct rtattr *linkinfo[IFLA_MAX + 1]; -- struct interface *ifp; -- char *name = NULL; -- char *kind = NULL; -- char *desc = NULL; -- char *slave_kind = NULL; -- struct zebra_ns *zns = NULL; -- vrf_id_t vrf_id = VRF_DEFAULT; -- enum zebra_iftype zif_type = ZEBRA_IF_OTHER; -- enum zebra_slave_iftype zif_slave_type = ZEBRA_IF_SLAVE_NONE; -- ifindex_t bridge_ifindex = IFINDEX_INTERNAL; -- ifindex_t link_ifindex = IFINDEX_INTERNAL; -- ifindex_t bond_ifindex = IFINDEX_INTERNAL; -- struct zebra_if *zif; -- ns_id_t link_nsid = ns_id; -- uint8_t bypass = 0; -- -- frrtrace(3, frr_zebra, netlink_interface, h, ns_id, startup); -- -- zns = zebra_ns_lookup(ns_id); -- ifi = NLMSG_DATA(h); -- -- if (h->nlmsg_type != RTM_NEWLINK) -- return 0; -- -- len = h->nlmsg_len - NLMSG_LENGTH(sizeof(struct ifinfomsg)); -- if (len < 0) { -- zlog_err( -- "%s: Message received from netlink is of a broken size: %d %zu", -- __func__, h->nlmsg_len, -- (size_t)NLMSG_LENGTH(sizeof(struct ifinfomsg))); -- return -1; -- } -- -- /* We are interested in some AF_BRIDGE notifications. */ -- if (ifi->ifi_family == AF_BRIDGE) -- return netlink_bridge_interface(h, len, ns_id, startup); -- -- /* Looking up interface name. */ -- memset(linkinfo, 0, sizeof(linkinfo)); -- netlink_parse_rtattr_flags(tb, IFLA_MAX, IFLA_RTA(ifi), len, -- NLA_F_NESTED); -- -- /* check for wireless messages to ignore */ -- if ((tb[IFLA_WIRELESS] != NULL) && (ifi->ifi_change == 0)) { -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug("%s: ignoring IFLA_WIRELESS message", -- __func__); -- return 0; -- } -- -- if (tb[IFLA_IFNAME] == NULL) -- return -1; -- name = (char *)RTA_DATA(tb[IFLA_IFNAME]); -- -- if (tb[IFLA_IFALIAS]) -- desc = (char *)RTA_DATA(tb[IFLA_IFALIAS]); -- -- if (tb[IFLA_LINKINFO]) { -- netlink_parse_rtattr_nested(linkinfo, IFLA_INFO_MAX, -- tb[IFLA_LINKINFO]); -- -- if (linkinfo[IFLA_INFO_KIND]) -- kind = RTA_DATA(linkinfo[IFLA_INFO_KIND]); -- -- if (linkinfo[IFLA_INFO_SLAVE_KIND]) -- slave_kind = RTA_DATA(linkinfo[IFLA_INFO_SLAVE_KIND]); -- -- if ((slave_kind != NULL) && strcmp(slave_kind, "bond") == 0) -- netlink_determine_zebra_iftype("bond_slave", &zif_type); -- else -- netlink_determine_zebra_iftype(kind, &zif_type); -- } -- -- /* If VRF, create the VRF structure itself. */ -- if (zif_type == ZEBRA_IF_VRF && !vrf_is_backend_netns()) { -- netlink_vrf_change(h, tb[IFLA_LINKINFO], ns_id, name); -- vrf_id = (vrf_id_t)ifi->ifi_index; -- } -- -- if (tb[IFLA_MASTER]) { -- if (slave_kind && (strcmp(slave_kind, "vrf") == 0) -- && !vrf_is_backend_netns()) { -- zif_slave_type = ZEBRA_IF_SLAVE_VRF; -- vrf_id = *(uint32_t *)RTA_DATA(tb[IFLA_MASTER]); -- } else if (slave_kind && (strcmp(slave_kind, "bridge") == 0)) { -- zif_slave_type = ZEBRA_IF_SLAVE_BRIDGE; -- bridge_ifindex = -- *(ifindex_t *)RTA_DATA(tb[IFLA_MASTER]); -- } else if (slave_kind && (strcmp(slave_kind, "bond") == 0)) { -- zif_slave_type = ZEBRA_IF_SLAVE_BOND; -- bond_ifindex = *(ifindex_t *)RTA_DATA(tb[IFLA_MASTER]); -- bypass = netlink_parse_lacp_bypass(linkinfo); -- } else -- zif_slave_type = ZEBRA_IF_SLAVE_OTHER; -- } -- if (vrf_is_backend_netns()) -- vrf_id = (vrf_id_t)ns_id; -- -- /* If linking to another interface, note it. */ -- if (tb[IFLA_LINK]) -- link_ifindex = *(ifindex_t *)RTA_DATA(tb[IFLA_LINK]); -- -- if (tb[IFLA_LINK_NETNSID]) { -- link_nsid = *(ns_id_t *)RTA_DATA(tb[IFLA_LINK_NETNSID]); -- link_nsid = ns_id_get_absolute(ns_id, link_nsid); -- } -- -- ifp = if_get_by_name(name, vrf_id, NULL); -- set_ifindex(ifp, ifi->ifi_index, zns); /* add it to ns struct */ -- -- ifp->flags = ifi->ifi_flags & 0x0000fffff; -- ifp->mtu6 = ifp->mtu = *(uint32_t *)RTA_DATA(tb[IFLA_MTU]); -- ifp->metric = 0; -- ifp->speed = get_iflink_speed(ifp, NULL); -- ifp->ptm_status = ZEBRA_PTM_STATUS_UNKNOWN; -- -- /* Set zebra interface type */ -- zebra_if_set_ziftype(ifp, zif_type, zif_slave_type); -- if (IS_ZEBRA_IF_VRF(ifp)) -- SET_FLAG(ifp->status, ZEBRA_INTERFACE_VRF_LOOPBACK); -- -- /* -- * Just set the @link/lower-device ifindex. During nldump interfaces are -- * not ordered in any fashion so we may end up getting upper devices -- * before lower devices. We will setup the real linkage once the dump -- * is complete. -- */ -- zif = (struct zebra_if *)ifp->info; -- zif->link_ifindex = link_ifindex; -- -- if (desc) { -- XFREE(MTYPE_ZIF_DESC, zif->desc); -- zif->desc = XSTRDUP(MTYPE_ZIF_DESC, desc); -- } -- -- /* Hardware type and address. */ -- ifp->ll_type = netlink_to_zebra_link_type(ifi->ifi_type); -- -- netlink_interface_update_hw_addr(tb, ifp); -- -- if_add_update(ifp); -- -- /* Extract and save L2 interface information, take additional actions. -- */ -- netlink_interface_update_l2info(ifp, linkinfo[IFLA_INFO_DATA], -- 1, link_nsid); -- if (IS_ZEBRA_IF_BOND(ifp)) -- zebra_l2if_update_bond(ifp, true); -- if (IS_ZEBRA_IF_BRIDGE_SLAVE(ifp)) -- zebra_l2if_update_bridge_slave(ifp, bridge_ifindex, ns_id, -- ZEBRA_BRIDGE_NO_ACTION); -- else if (IS_ZEBRA_IF_BOND_SLAVE(ifp)) -- zebra_l2if_update_bond_slave(ifp, bond_ifindex, !!bypass); -- -- if (tb[IFLA_PROTO_DOWN]) { -- netlink_proc_dplane_if_protodown(zif, tb); -- if_sweep_protodown(zif); -- } -- -- return 0; --} -- - /* Request for specific interface or address information from the kernel */ - static int netlink_request_intf_addr(struct nlsock *netlink_cmd, int family, - int type, uint32_t filter_mask) -@@ -1165,7 +993,7 @@ int interface_lookup_netlink(struct zebra_ns *zns) - ret = netlink_request_intf_addr(netlink_cmd, AF_PACKET, RTM_GETLINK, 0); - if (ret < 0) - return ret; -- ret = netlink_parse_info(netlink_interface, netlink_cmd, &dp_info, 0, -+ ret = netlink_parse_info(netlink_link_change, netlink_cmd, &dp_info, 0, - true); - if (ret < 0) - return ret; -@@ -1175,7 +1003,7 @@ int interface_lookup_netlink(struct zebra_ns *zns) - RTEXT_FILTER_BRVLAN); - if (ret < 0) - return ret; -- ret = netlink_parse_info(netlink_interface, netlink_cmd, &dp_info, 0, -+ ret = netlink_parse_info(netlink_link_change, netlink_cmd, &dp_info, 0, - true); - if (ret < 0) - return ret; -@@ -1816,6 +1644,8 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup) - ifindex_t master_infindex = IFINDEX_INTERNAL; - uint8_t bypass = 0; - -+ frrtrace(3, frr_zebra, netlink_interface, h, ns_id, startup); -+ - zns = zebra_ns_lookup(ns_id); - ifi = NLMSG_DATA(h); - -@@ -1884,7 +1714,10 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup) - if (linkinfo[IFLA_INFO_SLAVE_KIND]) - slave_kind = RTA_DATA(linkinfo[IFLA_INFO_SLAVE_KIND]); - -- netlink_determine_zebra_iftype(kind, &zif_type); -+ if ((slave_kind != NULL) && strcmp(slave_kind, "bond") == 0) -+ netlink_determine_zebra_iftype("bond_slave", &zif_type); -+ else -+ netlink_determine_zebra_iftype(kind, &zif_type); - } - - /* If linking to another interface, note it. */ -@@ -1961,6 +1794,7 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup) - } - ifp->mtu6 = ifp->mtu = *(int *)RTA_DATA(tb[IFLA_MTU]); - ifp->metric = 0; -+ ifp->speed = get_iflink_speed(ifp, NULL); - ifp->ptm_status = ZEBRA_PTM_STATUS_UNKNOWN; - - /* Set interface type */ -@@ -1972,6 +1806,16 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup) - /* Update link. */ - zebra_if_update_link(ifp, link_ifindex, link_nsid); - -+ /* -+ * Just set the @link/lower-device ifindex. During -+ * nldump interfaces are not ordered in any fashion so -+ * we may end up getting upper devices before lower -+ * devices. We will setup the real linkage once the dump -+ * is complete. -+ */ -+ zif = (struct zebra_if *)ifp->info; -+ zif->link_ifindex = link_ifindex; -+ - ifp->ll_type = - netlink_to_zebra_link_type(ifi->ifi_type); - netlink_interface_update_hw_addr(tb, ifp); -@@ -1984,6 +1828,8 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup) - netlink_interface_update_l2info( - ifp, linkinfo[IFLA_INFO_DATA], - 1, link_nsid); -+ if (IS_ZEBRA_IF_BOND(ifp)) -+ zebra_l2if_update_bond(ifp, true); - if (IS_ZEBRA_IF_BRIDGE_SLAVE(ifp)) - zebra_l2if_update_bridge_slave( - ifp, bridge_ifindex, ns_id, -@@ -1992,10 +1838,12 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup) - zebra_l2if_update_bond_slave(ifp, bond_ifindex, - !!bypass); - -- if (tb[IFLA_PROTO_DOWN]) -+ if (tb[IFLA_PROTO_DOWN]) { - netlink_proc_dplane_if_protodown(ifp->info, tb); -+ if (startup) -+ if_sweep_protodown(zif); -+ } - if (IS_ZEBRA_IF_BRIDGE(ifp)) { -- zif = ifp->info; - if (IS_ZEBRA_DEBUG_KERNEL) - zlog_debug( - "RTM_NEWLINK ADD for %s(%u), vlan-aware %d", -@@ -2329,7 +2177,7 @@ int netlink_tunneldump_read(struct zebra_ns *zns) - if (ret < 0) - return ret; - -- ret = netlink_parse_info(netlink_interface, netlink_cmd, -+ ret = netlink_parse_info(netlink_link_change, netlink_cmd, - &dp_info, 0, true); - - if (ret < 0) --- -2.17.1 - diff --git a/src/sonic-frr/patch/0017-zebra-Add-code-to-get-set-interface-to-pass-up-from-.patch b/src/sonic-frr/patch/0017-zebra-Add-code-to-get-set-interface-to-pass-up-from-.patch deleted file mode 100644 index c46c29737a0..00000000000 --- a/src/sonic-frr/patch/0017-zebra-Add-code-to-get-set-interface-to-pass-up-from-.patch +++ /dev/null @@ -1,809 +0,0 @@ -From 1b576b080613cd545ecd742b6a16146ab781695f Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Thu, 20 Apr 2023 08:51:42 -0400 -Subject: [PATCH] zebra: Add code to get/set interface to pass up from dplane - -1) Add a bunch of get/set functions and associated data -structure in zebra_dplane to allow the setting and retrieval -of interface netlink data up into the master pthread. - -2) Add a bit of code to breakup startup into stages. This is -because FRR currently has a mix of dplane and non dplane interactions -and the code needs to be paused before continuing on. - -Signed-off-by: Donald Sharp - -diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c -index 804eb43a44..0d629fe0b9 100644 ---- a/zebra/dplane_fpm_nl.c -+++ b/zebra/dplane_fpm_nl.c -@@ -955,6 +955,7 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx) - case DPLANE_OP_TC_FILTER_DELETE: - case DPLANE_OP_TC_FILTER_UPDATE: - case DPLANE_OP_NONE: -+ case DPLANE_OP_STARTUP_STAGE: - break; - - } -diff --git a/zebra/interface.c b/zebra/interface.c -index 84e52d4b43..a05b9690ef 100644 ---- a/zebra/interface.c -+++ b/zebra/interface.c -@@ -1590,6 +1590,7 @@ void zebra_if_dplane_result(struct zebra_dplane_ctx *ctx) - case DPLANE_OP_TC_FILTER_ADD: - case DPLANE_OP_TC_FILTER_DELETE: - case DPLANE_OP_TC_FILTER_UPDATE: -+ case DPLANE_OP_STARTUP_STAGE: - break; /* should never hit here */ - } - } -diff --git a/zebra/kernel_netlink.c b/zebra/kernel_netlink.c -index 42afe61469..4cd84cada2 100644 ---- a/zebra/kernel_netlink.c -+++ b/zebra/kernel_netlink.c -@@ -1632,6 +1632,7 @@ static enum netlink_msg_status nl_put_msg(struct nl_batch *bth, - case DPLANE_OP_IPSET_DELETE: - case DPLANE_OP_IPSET_ENTRY_ADD: - case DPLANE_OP_IPSET_ENTRY_DELETE: -+ case DPLANE_OP_STARTUP_STAGE: - return FRR_NETLINK_ERROR; - - case DPLANE_OP_GRE_SET: -diff --git a/zebra/kernel_socket.c b/zebra/kernel_socket.c -index 684ccc3ed5..f3462b9f22 100644 ---- a/zebra/kernel_socket.c -+++ b/zebra/kernel_socket.c -@@ -1631,6 +1631,7 @@ void kernel_update_multi(struct dplane_ctx_list_head *ctx_list) - case DPLANE_OP_GRE_SET: - case DPLANE_OP_INTF_ADDR_ADD: - case DPLANE_OP_INTF_ADDR_DEL: -+ case DPLANE_OP_STARTUP_STAGE: - zlog_err("Unhandled dplane data for %s", - dplane_op2str(dplane_ctx_get_op(ctx))); - res = ZEBRA_DPLANE_REQUEST_FAILURE; -diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c -index a6c08f7371..0b33a5189c 100644 ---- a/zebra/zebra_dplane.c -+++ b/zebra/zebra_dplane.c -@@ -193,10 +193,43 @@ struct dplane_br_port_info { - */ - struct dplane_intf_info { - -+ enum zebra_iftype zif_type; -+ ifindex_t bond_ifindex; -+ ifindex_t link_ifindex; -+ int32_t mtu; -+ vrf_id_t vrf_id; -+ enum zebra_slave_iftype zif_slave_type; -+ ifindex_t master_ifindex; -+ ifindex_t bridge_ifindex; -+ ns_id_t link_nsid; -+ enum zebra_slave_iftype zslave_type; -+ uint8_t bypass; -+ enum zebra_link_type zltype; -+ bool startup; -+ uint8_t family; -+ struct zebra_vxlan_vni_array *vniarray; -+ struct zebra_dplane_bridge_vlan_info bvinfo; -+ struct zebra_dplane_bridge_vlan_info_array *bvarray; -+ -+ char desc[128]; -+ -+ int32_t hw_addr_len; -+ uint8_t hw_addr[INTERFACE_HWADDR_MAX]; -+ -+ uint32_t table_id; -+ -+ struct zebra_l2info_bridge binfo; -+ struct zebra_l2info_vlan vinfo; -+ struct zebra_l2info_vxlan vxinfo; -+ struct zebra_l2info_gre grinfo; -+ -+ uint32_t rc_bitfield; -+ - uint32_t metric; - uint32_t flags; - - bool protodown; -+ bool protodown_set; - bool pd_reason_val; - - #define DPLANE_INTF_CONNECTED (1 << 0) /* Connected peer, p2p */ -@@ -408,6 +441,7 @@ struct zebra_dplane_ctx { - struct dplane_neigh_table neightable; - struct dplane_gre_ctx gre; - struct dplane_netconf_info netconf; -+ enum zebra_dplane_startup_notifications spot; - } u; - - /* Namespace info, used especially for netlink kernel communication */ -@@ -820,8 +854,14 @@ static void dplane_ctx_free_internal(struct zebra_dplane_ctx *ctx) - case DPLANE_OP_NONE: - case DPLANE_OP_IPSET_ADD: - case DPLANE_OP_IPSET_DELETE: -+ break; - case DPLANE_OP_INTF_INSTALL: - case DPLANE_OP_INTF_UPDATE: -+ if (ctx->u.intf.vniarray) -+ XFREE(MTYPE_TMP, ctx->u.intf.vniarray); -+ if (ctx->u.intf.bvarray) -+ XFREE(MTYPE_TMP, ctx->u.intf.bvarray); -+ break; - case DPLANE_OP_INTF_DELETE: - case DPLANE_OP_TC_QDISC_INSTALL: - case DPLANE_OP_TC_QDISC_UNINSTALL: -@@ -845,6 +885,7 @@ static void dplane_ctx_free_internal(struct zebra_dplane_ctx *ctx) - break; - case DPLANE_OP_GRE_SET: - case DPLANE_OP_INTF_NETCONFIG: -+ case DPLANE_OP_STARTUP_STAGE: - break; - } - } -@@ -1168,6 +1209,8 @@ const char *dplane_op2str(enum dplane_op_e op) - case DPLANE_OP_TC_FILTER_UPDATE: - ret = "TC__FILTER_UPDATE"; - break; -+ case DPLANE_OP_STARTUP_STAGE: -+ ret = "STARTUP_STAGE"; - } - - return ret; -@@ -1309,6 +1352,422 @@ const char *dplane_ctx_get_ifname(const struct zebra_dplane_ctx *ctx) - return ctx->zd_ifname; - } - -+void dplane_ctx_set_ifp_bridge_vlan_info_array( -+ struct zebra_dplane_ctx *ctx, -+ struct zebra_dplane_bridge_vlan_info_array *bvarray) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.bvarray = bvarray; -+} -+ -+const struct zebra_dplane_bridge_vlan_info_array * -+dplane_ctx_get_ifp_bridge_vlan_info_array(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.bvarray; -+} -+ -+void dplane_ctx_set_ifp_vxlan_vni_array(struct zebra_dplane_ctx *ctx, -+ struct zebra_vxlan_vni_array *vniarray) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.vniarray = vniarray; -+} -+ -+const struct zebra_vxlan_vni_array * -+dplane_ctx_get_ifp_vxlan_vni_array(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.vniarray; -+} -+ -+void dplane_ctx_set_ifp_bridge_vlan_info( -+ struct zebra_dplane_ctx *ctx, -+ struct zebra_dplane_bridge_vlan_info *bvinfo) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.bvinfo = *bvinfo; -+} -+ -+const struct zebra_dplane_bridge_vlan_info * -+dplane_ctx_get_ifp_bridge_vlan_info(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return &ctx->u.intf.bvinfo; -+} -+ -+void dplane_ctx_set_ifp_family(struct zebra_dplane_ctx *ctx, uint8_t family) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.family = family; -+} -+ -+uint8_t dplane_ctx_get_ifp_family(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.family; -+} -+ -+void dplane_ctx_set_ifp_zltype(struct zebra_dplane_ctx *ctx, -+ enum zebra_link_type zltype) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.zltype = zltype; -+} -+ -+enum zebra_link_type -+dplane_ctx_get_ifp_zltype(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.zltype; -+} -+ -+void dplane_ctx_set_ifp_link_ifindex(struct zebra_dplane_ctx *ctx, -+ ifindex_t link_ifindex) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.link_ifindex = link_ifindex; -+} -+ -+ifindex_t dplane_ctx_get_ifp_link_ifindex(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.link_ifindex; -+} -+ -+void dplane_ctx_set_ifp_desc(struct zebra_dplane_ctx *ctx, const char *desc) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ strlcpy(ctx->u.intf.desc, desc, sizeof(ctx->u.intf.desc)); -+} -+ -+char *dplane_ctx_get_ifp_desc(struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.desc; -+} -+ -+void dplane_ctx_set_ifp_flags(struct zebra_dplane_ctx *ctx, uint64_t flags) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.flags = flags; -+} -+ -+uint64_t dplane_ctx_get_ifp_flags(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.flags; -+} -+ -+void dplane_ctx_set_ifp_bypass(struct zebra_dplane_ctx *ctx, uint8_t bypass) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.bypass = bypass; -+} -+ -+uint8_t dplane_ctx_get_ifp_bypass(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.bypass; -+} -+ -+void dplane_ctx_set_ifp_bridge_ifindex(struct zebra_dplane_ctx *ctx, -+ ifindex_t bridge_ifindex) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.bridge_ifindex = bridge_ifindex; -+} -+ -+ifindex_t dplane_ctx_get_ifp_bridge_ifindex(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.bridge_ifindex; -+} -+ -+void dplane_ctx_set_ifp_zif_slave_type(struct zebra_dplane_ctx *ctx, -+ enum zebra_slave_iftype zslave_type) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.zslave_type = zslave_type; -+} -+ -+enum zebra_slave_iftype -+dplane_ctx_get_ifp_zif_slave_type(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.zslave_type; -+} -+ -+void dplane_ctx_set_ifp_master_ifindex(struct zebra_dplane_ctx *ctx, -+ ifindex_t master_ifindex) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.master_ifindex = master_ifindex; -+} -+ -+ifindex_t dplane_ctx_get_ifp_master_ifindex(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.master_ifindex; -+} -+ -+void dplane_ctx_set_ifp_mtu(struct zebra_dplane_ctx *ctx, uint32_t mtu) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.mtu = mtu; -+} -+ -+uint32_t dplane_ctx_get_ifp_mtu(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.mtu; -+} -+ -+void dplane_ctx_set_ifp_vrf_id(struct zebra_dplane_ctx *ctx, vrf_id_t vrf_id) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.vrf_id = vrf_id; -+} -+ -+vrf_id_t dplane_ctx_get_ifp_vrf_id(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.vrf_id; -+} -+ -+void dplane_ctx_set_ifp_link_nsid(struct zebra_dplane_ctx *ctx, -+ ns_id_t link_nsid) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.link_nsid = link_nsid; -+} -+ -+ns_id_t dplane_ctx_get_ifp_link_nsid(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.link_nsid; -+} -+ -+void dplane_ctx_set_ifp_startup(struct zebra_dplane_ctx *ctx, bool startup) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.startup = startup; -+} -+ -+bool dplane_ctx_get_ifp_startup(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.startup; -+} -+ -+void dplane_ctx_set_ifp_protodown_set(struct zebra_dplane_ctx *ctx, bool set) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.protodown_set = set; -+} -+ -+bool dplane_ctx_get_ifp_protodown_set(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.protodown_set; -+} -+ -+void dplane_ctx_set_ifp_protodown(struct zebra_dplane_ctx *ctx, bool protodown) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.protodown = protodown; -+} -+ -+bool dplane_ctx_get_ifp_protodown(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.protodown; -+} -+ -+ifindex_t dplane_ctx_get_ifp_bond_ifindex(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.bond_ifindex; -+} -+ -+void dplane_ctx_set_ifp_rc_bitfield(struct zebra_dplane_ctx *ctx, -+ uint32_t rc_bitfield) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.rc_bitfield = rc_bitfield; -+} -+ -+uint32_t dplane_ctx_get_ifp_rc_bitfield(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.rc_bitfield; -+} -+ -+void dplane_ctx_set_ifp_gre_info(struct zebra_dplane_ctx *ctx, -+ struct zebra_l2info_gre *grinfo) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.grinfo = *grinfo; -+} -+ -+const struct zebra_l2info_gre * -+dplane_ctx_get_ifp_gre_info(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return &ctx->u.intf.grinfo; -+} -+ -+void dplane_ctx_set_ifp_vxlan_info(struct zebra_dplane_ctx *ctx, -+ struct zebra_l2info_vxlan *vxinfo) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.vxinfo = *vxinfo; -+} -+ -+const struct zebra_l2info_vxlan * -+dplane_ctx_get_ifp_vxlan_info(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return &ctx->u.intf.vxinfo; -+} -+ -+void dplane_ctx_set_ifp_vlan_info(struct zebra_dplane_ctx *ctx, -+ struct zebra_l2info_vlan *vinfo) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.vinfo = *vinfo; -+} -+ -+const struct zebra_l2info_vlan * -+dplane_ctx_get_ifp_vlan_info(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return &ctx->u.intf.vinfo; -+} -+ -+void dplane_ctx_set_ifp_bridge_info(struct zebra_dplane_ctx *ctx, -+ struct zebra_l2info_bridge *binfo) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.binfo = *binfo; -+} -+ -+const struct zebra_l2info_bridge * -+dplane_ctx_get_ifp_bridge_info(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return &ctx->u.intf.binfo; -+} -+ -+void dplane_ctx_set_ifp_table_id(struct zebra_dplane_ctx *ctx, -+ uint32_t table_id) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.table_id = table_id; -+} -+ -+uint32_t dplane_ctx_get_ifp_table_id(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.table_id; -+} -+ -+void dplane_ctx_set_ifp_hw_addr(struct zebra_dplane_ctx *ctx, -+ int32_t hw_addr_len, uint8_t *hw_addr) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.hw_addr_len = hw_addr_len; -+ memcpy(ctx->u.intf.hw_addr, hw_addr, hw_addr_len); -+} -+ -+int32_t dplane_ctx_get_ifp_hw_addr_len(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.hw_addr_len; -+} -+ -+const uint8_t *dplane_ctx_get_ifp_hw_addr(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.hw_addr; -+} -+ -+void dplane_ctx_set_ifp_bond_ifindex(struct zebra_dplane_ctx *ctx, -+ ifindex_t bond_ifindex) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.bond_ifindex = bond_ifindex; -+} -+ -+enum zebra_iftype -+dplane_ctx_get_ifp_zif_type(const struct zebra_dplane_ctx *ctx) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ return ctx->u.intf.zif_type; -+} -+ -+void dplane_ctx_set_ifp_zif_type(struct zebra_dplane_ctx *ctx, -+ enum zebra_iftype zif_type) -+{ -+ DPLANE_CTX_VALID(ctx); -+ -+ ctx->u.intf.zif_type = zif_type; -+} -+ - void dplane_ctx_set_ifname(struct zebra_dplane_ctx *ctx, const char *ifname) - { - DPLANE_CTX_VALID(ctx); -@@ -6102,6 +6561,7 @@ static void kernel_dplane_log_detail(struct zebra_dplane_ctx *ctx) - case DPLANE_OP_TC_FILTER_ADD: - case DPLANE_OP_TC_FILTER_DELETE: - case DPLANE_OP_TC_FILTER_UPDATE: -+ case DPLANE_OP_STARTUP_STAGE: - break; - } - } -@@ -6274,6 +6734,7 @@ static void kernel_dplane_handle_result(struct zebra_dplane_ctx *ctx) - break; - - case DPLANE_OP_NONE: -+ case DPLANE_OP_STARTUP_STAGE: - if (res != ZEBRA_DPLANE_REQUEST_SUCCESS) - atomic_fetch_add_explicit(&zdplane_info.dg_other_errors, - 1, memory_order_relaxed); -@@ -6966,6 +7427,25 @@ void zebra_dplane_start(void) - frr_pthread_run(zdplane_info.dg_pthread, NULL); - } - -+enum zebra_dplane_startup_notifications -+dplane_ctx_get_startup_spot(struct zebra_dplane_ctx *ctx) -+{ -+ return ctx->u.spot; -+} -+ -+void zebra_dplane_startup_stage(struct zebra_ns *zns, -+ enum zebra_dplane_startup_notifications spot) -+{ -+ struct zebra_dplane_ctx *ctx = dplane_ctx_alloc(); -+ -+ ctx->zd_op = DPLANE_OP_STARTUP_STAGE; -+ ctx->zd_status = ZEBRA_DPLANE_REQUEST_QUEUED; -+ -+ ctx->u.spot = spot; -+ dplane_ctx_set_ns_id(ctx, zns->ns_id); -+ -+ dplane_provider_enqueue_to_zebra(ctx); -+} - /* - * Initialize the dataplane module at startup; called by zebra rib_init() - */ -diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h -index 9ef0afd3a8..c10482ed96 100644 ---- a/zebra/zebra_dplane.h -+++ b/zebra/zebra_dplane.h -@@ -100,6 +100,11 @@ enum zebra_dplane_result { - ZEBRA_DPLANE_REQUEST_FAILURE, - }; - -+enum zebra_dplane_startup_notifications { -+ ZEBRA_DPLANE_INTERFACES_READ, -+ ZEBRA_DPLANE_TUNNELS_READ, -+ ZEBRA_DPLANE_ADDRESSES_READ, -+}; - /* - * API between the zebra dataplane system and the main zebra processing - * context. -@@ -201,7 +206,10 @@ enum dplane_op_e { - DPLANE_OP_TC_CLASS_UPDATE, - DPLANE_OP_TC_FILTER_ADD, - DPLANE_OP_TC_FILTER_DELETE, -- DPLANE_OP_TC_FILTER_UPDATE -+ DPLANE_OP_TC_FILTER_UPDATE, -+ -+ /* Startup Control */ -+ DPLANE_OP_STARTUP_STAGE, - }; - - /* -@@ -336,6 +344,105 @@ const char *dplane_ctx_get_ifname(const struct zebra_dplane_ctx *ctx); - void dplane_ctx_set_ifname(struct zebra_dplane_ctx *ctx, const char *ifname); - ifindex_t dplane_ctx_get_ifindex(const struct zebra_dplane_ctx *ctx); - void dplane_ctx_set_ifindex(struct zebra_dplane_ctx *ctx, ifindex_t ifindex); -+void dplane_ctx_set_ifp_bond_ifindex(struct zebra_dplane_ctx *ctx, -+ ifindex_t ifindex); -+ifindex_t dplane_ctx_get_ifp_bond_ifindex(const struct zebra_dplane_ctx *ctx); -+enum zebra_iftype -+dplane_ctx_get_ifp_zif_type(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_zif_type(struct zebra_dplane_ctx *ctx, -+ enum zebra_iftype zif_type); -+void dplane_ctx_set_ifp_table_id(struct zebra_dplane_ctx *ctx, -+ uint32_t table_id); -+uint32_t dplane_ctx_get_ifp_table_id(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_hw_addr(struct zebra_dplane_ctx *ctx, -+ int32_t hw_addr_len, uint8_t *hw_addr); -+int32_t dplane_ctx_get_ifp_hw_addr_len(const struct zebra_dplane_ctx *ctx); -+const uint8_t *dplane_ctx_get_ifp_hw_addr(const struct zebra_dplane_ctx *ctx); -+struct zebra_l2info_bridge; -+void dplane_ctx_set_ifp_bridge_info(struct zebra_dplane_ctx *ctx, -+ struct zebra_l2info_bridge *binfo); -+const struct zebra_l2info_bridge * -+dplane_ctx_get_ifp_bridge_info(const struct zebra_dplane_ctx *ctx); -+struct zebra_l2info_vlan; -+void dplane_ctx_set_ifp_vlan_info(struct zebra_dplane_ctx *ctx, -+ struct zebra_l2info_vlan *vinfo); -+const struct zebra_l2info_vlan * -+dplane_ctx_get_ifp_vlan_info(const struct zebra_dplane_ctx *ctx); -+struct zebra_l2info_vxlan; -+void dplane_ctx_set_ifp_vxlan_info(struct zebra_dplane_ctx *ctx, -+ struct zebra_l2info_vxlan *vxinfo); -+const struct zebra_l2info_vxlan * -+dplane_ctx_get_ifp_vxlan_info(const struct zebra_dplane_ctx *ctx); -+struct zebra_l2info_gre; -+void dplane_ctx_set_ifp_gre_info(struct zebra_dplane_ctx *ctx, -+ struct zebra_l2info_gre *greinfo); -+const struct zebra_l2info_gre * -+dplane_ctx_get_ifp_gre_info(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_zltype(struct zebra_dplane_ctx *ctx, -+ enum zebra_link_type zlt); -+enum zebra_link_type -+dplane_ctx_get_ifp_zltype(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_link_nsid(struct zebra_dplane_ctx *ctx, ns_id_t ns_id); -+ns_id_t dplane_ctx_get_ifp_link_nsid(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_desc(struct zebra_dplane_ctx *ctx, const char *desc); -+char *dplane_ctx_get_ifp_desc(struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_mtu(struct zebra_dplane_ctx *ctx, uint32_t mtu); -+uint32_t dplane_ctx_get_ifp_mtu(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_vrf_id(struct zebra_dplane_ctx *ctx, vrf_id_t vrf_id); -+vrf_id_t dplane_ctx_get_ifp_vrf_id(const struct zebra_dplane_ctx *ctx); -+enum zebra_slave_iftype; -+void dplane_ctx_set_ifp_zif_slave_type(struct zebra_dplane_ctx *ctx, -+ enum zebra_slave_iftype zslave_type); -+enum zebra_slave_iftype -+dplane_ctx_get_ifp_zif_slave_type(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_master_ifindex(struct zebra_dplane_ctx *ctx, -+ ifindex_t master_ifindex); -+ifindex_t dplane_ctx_get_ifp_master_ifindex(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_bridge_ifindex(struct zebra_dplane_ctx *ctx, -+ ifindex_t bridge_ifindex); -+ifindex_t dplane_ctx_get_ifp_bridge_ifindex(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_bypass(struct zebra_dplane_ctx *ctx, uint8_t bypass); -+uint8_t dplane_ctx_get_ifp_bypass(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_flags(struct zebra_dplane_ctx *ctx, uint64_t flags); -+uint64_t dplane_ctx_get_ifp_flags(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_protodown(struct zebra_dplane_ctx *ctx, bool protodown); -+bool dplane_ctx_get_ifp_protodown(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_startup(struct zebra_dplane_ctx *ctx, bool startup); -+bool dplane_ctx_get_ifp_startup(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_protodown_set(struct zebra_dplane_ctx *ctx, bool set); -+bool dplane_ctx_get_ifp_protodown_set(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_rc_bitfield(struct zebra_dplane_ctx *ctx, -+ uint32_t rc_bitfield); -+uint32_t dplane_ctx_get_ifp_rc_bitfield(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_link_ifindex(struct zebra_dplane_ctx *ctx, -+ ifindex_t link_ifindex); -+ifindex_t dplane_ctx_get_ifp_link_ifindex(const struct zebra_dplane_ctx *ctx); -+void dplane_ctx_set_ifp_family(struct zebra_dplane_ctx *ctx, uint8_t family); -+uint8_t dplane_ctx_get_ifp_family(const struct zebra_dplane_ctx *ctx); -+struct zebra_vxlan_vni_array; -+void dplane_ctx_set_ifp_vxlan_vni_array(struct zebra_dplane_ctx *ctx, -+ struct zebra_vxlan_vni_array *vniarray); -+const struct zebra_vxlan_vni_array * -+dplane_ctx_get_ifp_vxlan_vni_array(const struct zebra_dplane_ctx *ctx); -+struct zebra_dplane_bridge_vlan_info { -+ uint16_t flags; -+ uint16_t vid; -+}; -+void dplane_ctx_set_ifp_bridge_vlan_info( -+ struct zebra_dplane_ctx *ctx, -+ struct zebra_dplane_bridge_vlan_info *bvinfo); -+const struct zebra_dplane_bridge_vlan_info * -+dplane_ctx_get_ifp_bridge_vlan_info(const struct zebra_dplane_ctx *ctx); -+ -+struct zebra_dplane_bridge_vlan_info_array { -+ int count; -+ struct zebra_dplane_bridge_vlan_info array[0]; -+}; -+void dplane_ctx_set_ifp_bridge_vlan_info_array( -+ struct zebra_dplane_ctx *ctx, -+ struct zebra_dplane_bridge_vlan_info_array *bvarray); -+const struct zebra_dplane_bridge_vlan_info_array * -+dplane_ctx_get_ifp_bridge_vlan_info_array(const struct zebra_dplane_ctx *ctx); - - /* Retrieve last/current provider id */ - uint32_t dplane_ctx_get_provider(const struct zebra_dplane_ctx *ctx); -@@ -1083,6 +1190,9 @@ void zebra_dplane_pre_finish(void); - void zebra_dplane_finish(void); - void zebra_dplane_shutdown(void); - -+void zebra_dplane_startup_stage(struct zebra_ns *zns, -+ enum zebra_dplane_startup_notifications spot); -+ - /* - * decision point for sending a routing update through the old - * straight to zebra master pthread or through the dplane to -@@ -1093,6 +1203,9 @@ void dplane_rib_add_multipath(afi_t afi, safi_t safi, struct prefix *p, - struct nexthop_group *ng, int startup, - struct zebra_dplane_ctx *ctx); - -+enum zebra_dplane_startup_notifications -+dplane_ctx_get_startup_spot(struct zebra_dplane_ctx *ctx); -+ - #ifdef __cplusplus - } - #endif -diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c -index 758fed7280..8f686eb5f8 100644 ---- a/zebra/zebra_nhg.c -+++ b/zebra/zebra_nhg.c -@@ -3177,6 +3177,7 @@ void zebra_nhg_dplane_result(struct zebra_dplane_ctx *ctx) - case DPLANE_OP_TC_FILTER_ADD: - case DPLANE_OP_TC_FILTER_DELETE: - case DPLANE_OP_TC_FILTER_UPDATE: -+ case DPLANE_OP_STARTUP_STAGE: - break; - } - } -diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c -index 5e50d720a6..201fc761ae 100644 ---- a/zebra/zebra_rib.c -+++ b/zebra/zebra_rib.c -@@ -4770,6 +4770,7 @@ static void rib_process_dplane_results(struct thread *thread) - case DPLANE_OP_NEIGH_TABLE_UPDATE: - case DPLANE_OP_GRE_SET: - case DPLANE_OP_NONE: -+ case DPLANE_OP_STARTUP_STAGE: - break; - - } /* Dispatch by op code */ -diff --git a/zebra/zebra_script.c b/zebra/zebra_script.c -index 5c67ad4f16..22c1824b5a 100644 ---- a/zebra/zebra_script.c -+++ b/zebra/zebra_script.c -@@ -428,6 +428,7 @@ void lua_pushzebra_dplane_ctx(lua_State *L, const struct zebra_dplane_ctx *ctx) - /* Not currently handled */ - case DPLANE_OP_INTF_NETCONFIG: /*NYI*/ - case DPLANE_OP_NONE: -+ case DPLANE_OP_STARTUP_STAGE: - break; - } /* Dispatch by op code */ - } --- -2.17.1 - diff --git a/src/sonic-frr/patch/0018-zebra-Use-zebra-dplane-for-RTM-link-and-addr.patch b/src/sonic-frr/patch/0018-zebra-Use-zebra-dplane-for-RTM-link-and-addr.patch deleted file mode 100644 index 98f3b224a75..00000000000 --- a/src/sonic-frr/patch/0018-zebra-Use-zebra-dplane-for-RTM-link-and-addr.patch +++ /dev/null @@ -1,2154 +0,0 @@ -From 2c33b9ab847a53d8006687e89c0cbd589fe7071f Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Wed, 26 Apr 2023 23:02:09 -0400 -Subject: [PATCH] zebra: Use zebra dplane for RTM link and addr - -a) Move the reads of link and address information -into the dplane -b) Move the startup read of data into the dplane -as well. -c) Break up startup reading of the linux kernel data -into multiple phases. As that we have implied ordering -of data that must be read first and if the dplane has -taken over some data reading then we must delay initial -read-in of other data. - -Fixes: #13288 -Signed-off-by: Donald Sharp - -diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c -index ed5b3c4a66..7613f5fcc4 100644 ---- a/zebra/if_netlink.c -+++ b/zebra/if_netlink.c -@@ -79,64 +79,21 @@ - - extern struct zebra_privs_t zserv_privs; - --/* Note: on netlink systems, there should be a 1-to-1 mapping between interface -- names and ifindex values. */ --static void set_ifindex(struct interface *ifp, ifindex_t ifi_index, -- struct zebra_ns *zns) --{ -- struct interface *oifp; -- -- if (((oifp = if_lookup_by_index_per_ns(zns, ifi_index)) != NULL) -- && (oifp != ifp)) { -- if (ifi_index == IFINDEX_INTERNAL) -- flog_err( -- EC_LIB_INTERFACE, -- "Netlink is setting interface %s ifindex to reserved internal value %u", -- ifp->name, ifi_index); -- else { -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "interface index %d was renamed from %s to %s", -- ifi_index, oifp->name, ifp->name); -- if (if_is_up(oifp)) -- flog_err( -- EC_LIB_INTERFACE, -- "interface rename detected on up interface: index %d was renamed from %s to %s, results are uncertain!", -- ifi_index, oifp->name, ifp->name); -- if_delete_update(&oifp); -- } -- } -- if_set_index(ifp, ifi_index); --} -- - /* Utility function to parse hardware link-layer address and update ifp */ - static void netlink_interface_update_hw_addr(struct rtattr **tb, -- struct interface *ifp) -+ struct zebra_dplane_ctx *ctx) - { -- int i; -- - if (tb[IFLA_ADDRESS]) { - int hw_addr_len; - - hw_addr_len = RTA_PAYLOAD(tb[IFLA_ADDRESS]); - - if (hw_addr_len > INTERFACE_HWADDR_MAX) -- zlog_debug("Hardware address is too large: %d", -- hw_addr_len); -- else { -- ifp->hw_addr_len = hw_addr_len; -- memcpy(ifp->hw_addr, RTA_DATA(tb[IFLA_ADDRESS]), -- hw_addr_len); -- -- for (i = 0; i < hw_addr_len; i++) -- if (ifp->hw_addr[i] != 0) -- break; -- -- if (i == hw_addr_len) -- ifp->hw_addr_len = 0; -- else -- ifp->hw_addr_len = hw_addr_len; -- } -+ zlog_warn("Hardware address is too large: %d", -+ hw_addr_len); -+ else -+ dplane_ctx_set_ifp_hw_addr(ctx, hw_addr_len, -+ RTA_DATA(tb[IFLA_ADDRESS])); - } - } - -@@ -251,26 +208,6 @@ static enum zebra_link_type netlink_to_zebra_link_type(unsigned int hwt) - } - } - --static inline void zebra_if_set_ziftype(struct interface *ifp, -- enum zebra_iftype zif_type, -- enum zebra_slave_iftype zif_slave_type) --{ -- struct zebra_if *zif; -- -- zif = (struct zebra_if *)ifp->info; -- zif->zif_slave_type = zif_slave_type; -- -- if (zif->zif_type != zif_type) { -- zif->zif_type = zif_type; -- /* If the if_type has been set to bond initialize ES info -- * against it. XXX - note that we don't handle the case where -- * a zif changes from bond to non-bond; it is really -- * an unexpected/error condition. -- */ -- zebra_evpn_if_init(zif); -- } --} -- - static void netlink_determine_zebra_iftype(const char *kind, - enum zebra_iftype *zif_type) - { -@@ -300,16 +237,11 @@ static void netlink_determine_zebra_iftype(const char *kind, - } - - static void netlink_vrf_change(struct nlmsghdr *h, struct rtattr *tb, -- uint32_t ns_id, const char *name) -+ uint32_t ns_id, const char *name, -+ struct zebra_dplane_ctx *ctx) - { -- struct ifinfomsg *ifi; - struct rtattr *linkinfo[IFLA_INFO_MAX + 1]; - struct rtattr *attr[IFLA_VRF_MAX + 1]; -- struct vrf *vrf = NULL; -- struct zebra_vrf *zvrf; -- uint32_t nl_table_id; -- -- ifi = NLMSG_DATA(h); - - netlink_parse_rtattr_nested(linkinfo, IFLA_INFO_MAX, tb); - -@@ -331,75 +263,8 @@ static void netlink_vrf_change(struct nlmsghdr *h, struct rtattr *tb, - return; - } - -- nl_table_id = *(uint32_t *)RTA_DATA(attr[IFLA_VRF_TABLE]); -- -- if (h->nlmsg_type == RTM_NEWLINK) { -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug("RTM_NEWLINK for VRF %s(%u) table %u", name, -- ifi->ifi_index, nl_table_id); -- -- if (!vrf_lookup_by_id((vrf_id_t)ifi->ifi_index)) { -- vrf_id_t exist_id; -- -- exist_id = -- zebra_vrf_lookup_by_table(nl_table_id, ns_id); -- if (exist_id != VRF_DEFAULT) { -- vrf = vrf_lookup_by_id(exist_id); -- -- flog_err( -- EC_ZEBRA_VRF_MISCONFIGURED, -- "VRF %s id %u table id overlaps existing vrf %s, misconfiguration exiting", -- name, ifi->ifi_index, vrf->name); -- exit(-1); -- } -- } -- -- vrf = vrf_update((vrf_id_t)ifi->ifi_index, name); -- if (!vrf) { -- flog_err(EC_LIB_INTERFACE, "VRF %s id %u not created", -- name, ifi->ifi_index); -- return; -- } -- -- /* -- * This is the only place that we get the actual kernel table_id -- * being used. We need it to set the table_id of the routes -- * we are passing to the kernel.... And to throw some totally -- * awesome parties. that too. -- * -- * At this point we *must* have a zvrf because the vrf_create -- * callback creates one. We *must* set the table id -- * before the vrf_enable because of( at the very least ) -- * static routes being delayed for installation until -- * during the vrf_enable callbacks. -- */ -- zvrf = (struct zebra_vrf *)vrf->info; -- zvrf->table_id = nl_table_id; -- -- /* Enable the created VRF. */ -- if (!vrf_enable(vrf)) { -- flog_err(EC_LIB_INTERFACE, -- "Failed to enable VRF %s id %u", name, -- ifi->ifi_index); -- return; -- } -- -- } else // h->nlmsg_type == RTM_DELLINK -- { -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug("RTM_DELLINK for VRF %s(%u)", name, -- ifi->ifi_index); -- -- vrf = vrf_lookup_by_id((vrf_id_t)ifi->ifi_index); -- -- if (!vrf) { -- flog_warn(EC_ZEBRA_VRF_NOT_FOUND, "%s: vrf not found", -- __func__); -- return; -- } -- -- vrf_delete(vrf); -- } -+ dplane_ctx_set_ifp_table_id( -+ ctx, *(uint32_t *)RTA_DATA(attr[IFLA_VRF_TABLE])); - } - - static uint32_t get_iflink_speed(struct interface *interface, int *error) -@@ -659,58 +524,120 @@ static int netlink_extract_vxlan_info(struct rtattr *link_data, - * bridge interface is added or updated, take further actions to map - * its members. Likewise, for VxLAN interface. - */ --static void netlink_interface_update_l2info(struct interface *ifp, -+static void netlink_interface_update_l2info(struct zebra_dplane_ctx *ctx, -+ enum zebra_iftype zif_type, - struct rtattr *link_data, int add, - ns_id_t link_nsid) - { -+ struct zebra_l2info_bridge bridge_info; -+ struct zebra_l2info_vlan vlan_info; -+ struct zebra_l2info_vxlan vxlan_info; -+ struct zebra_l2info_gre gre_info; -+ - if (!link_data) - return; - -- if (IS_ZEBRA_IF_BRIDGE(ifp)) { -- struct zebra_l2info_bridge bridge_info; -- -+ switch (zif_type) { -+ case ZEBRA_IF_BRIDGE: - netlink_extract_bridge_info(link_data, &bridge_info); -- zebra_l2_bridge_add_update(ifp, &bridge_info); -- } else if (IS_ZEBRA_IF_VLAN(ifp)) { -- struct zebra_l2info_vlan vlan_info; -- -+ dplane_ctx_set_ifp_bridge_info(ctx, &bridge_info); -+ break; -+ case ZEBRA_IF_VLAN: - netlink_extract_vlan_info(link_data, &vlan_info); -- zebra_l2_vlanif_update(ifp, &vlan_info); -- zebra_evpn_acc_bd_svi_set(ifp->info, NULL, -- !!if_is_operative(ifp)); -- } else if (IS_ZEBRA_IF_VXLAN(ifp)) { -- struct zebra_l2info_vxlan vxlan_info; -- -+ dplane_ctx_set_ifp_vlan_info(ctx, &vlan_info); -+ break; -+ case ZEBRA_IF_VXLAN: - netlink_extract_vxlan_info(link_data, &vxlan_info); - vxlan_info.link_nsid = link_nsid; -- zebra_l2_vxlanif_add_update(ifp, &vxlan_info, add); -- if (link_nsid != NS_UNKNOWN && -- vxlan_info.ifindex_link) -- zebra_if_update_link(ifp, vxlan_info.ifindex_link, -- link_nsid); -- } else if (IS_ZEBRA_IF_GRE(ifp)) { -- struct zebra_l2info_gre gre_info; -- -+ dplane_ctx_set_ifp_vxlan_info(ctx, &vxlan_info); -+ break; -+ case ZEBRA_IF_GRE: - netlink_extract_gre_info(link_data, &gre_info); - gre_info.link_nsid = link_nsid; -- zebra_l2_greif_add_update(ifp, &gre_info, add); -- if (link_nsid != NS_UNKNOWN && -- gre_info.ifindex_link) -- zebra_if_update_link(ifp, gre_info.ifindex_link, -- link_nsid); -+ dplane_ctx_set_ifp_gre_info(ctx, &gre_info); -+ break; -+ case ZEBRA_IF_OTHER: -+ case ZEBRA_IF_VRF: -+ case ZEBRA_IF_MACVLAN: -+ case ZEBRA_IF_VETH: -+ case ZEBRA_IF_BOND: -+ case ZEBRA_IF_BOND_SLAVE: -+ break; - } - } - --static int netlink_bridge_vxlan_update(struct interface *ifp, -- struct rtattr *af_spec) -+#if 0 -+static int -+netlink_bridge_vxlan_vlan_vni_map_update(struct zebra_dplane_ctx *ctx, -+ struct rtattr *af_spec) -+{ -+ int rem; -+ uint16_t flags; -+ struct rtattr *i; -+ struct zebra_vxlan_vni_array *vniarray = NULL; -+ struct zebra_vxlan_vni vni_end; -+ struct zebra_vxlan_vni vni_start; -+ struct rtattr *aftb[IFLA_BRIDGE_VLAN_TUNNEL_MAX + 1]; -+ int32_t count = 0; -+ -+ memset(&vni_start, 0, sizeof(vni_start)); -+ memset(&vni_end, 0, sizeof(vni_end)); -+ -+ for (i = RTA_DATA(af_spec), rem = RTA_PAYLOAD(af_spec); RTA_OK(i, rem); -+ i = RTA_NEXT(i, rem)) { -+ -+ if (i->rta_type != IFLA_BRIDGE_VLAN_TUNNEL_INFO) -+ continue; -+ -+ memset(aftb, 0, sizeof(aftb)); -+ netlink_parse_rtattr_nested(aftb, IFLA_BRIDGE_VLAN_TUNNEL_MAX, -+ i); -+ if (!aftb[IFLA_BRIDGE_VLAN_TUNNEL_ID] || -+ !aftb[IFLA_BRIDGE_VLAN_TUNNEL_VID]) -+ /* vlan-vni info missing */ -+ return 0; -+ -+ count++; -+ flags = 0; -+ vniarray = XREALLOC( -+ MTYPE_TMP, vniarray, -+ sizeof(struct zebra_vxlan_vni_array) + -+ count * sizeof(struct zebra_vxlan_vni)); -+ -+ memset(&vniarray->vnis[count - 1], 0, -+ sizeof(struct zebra_vxlan_vni)); -+ -+ vniarray->vnis[count - 1].vni = -+ *(vni_t *)RTA_DATA(aftb[IFLA_BRIDGE_VLAN_TUNNEL_ID]); -+ vniarray->vnis[count - 1].access_vlan = *(vlanid_t *)RTA_DATA( -+ aftb[IFLA_BRIDGE_VLAN_TUNNEL_VID]); -+ -+ if (aftb[IFLA_BRIDGE_VLAN_TUNNEL_FLAGS]) -+ flags = *(uint16_t *)RTA_DATA( -+ aftb[IFLA_BRIDGE_VLAN_TUNNEL_FLAGS]); -+ -+ vniarray->vnis[count - 1].flags = flags; -+ } -+ -+ if (count) { -+ vniarray->count = count; -+ dplane_ctx_set_ifp_vxlan_vni_array(ctx, vniarray); -+ } -+ return 0; -+} -+#endif -+static int netlink_bridge_vxlan_update(struct zebra_dplane_ctx *ctx, -+ struct rtattr *af_spec) - { - struct rtattr *aftb[IFLA_BRIDGE_MAX + 1]; - struct bridge_vlan_info *vinfo; -- vlanid_t access_vlan; -+ struct zebra_dplane_bridge_vlan_info bvinfo; - - if (!af_spec) - return 0; - -+ //netlink_bridge_vxlan_vlan_vni_map_update(ctx, af_spec); -+ - /* There is a 1-to-1 mapping of VLAN to VxLAN - hence - * only 1 access VLAN is accepted. - */ -@@ -719,119 +646,73 @@ static int netlink_bridge_vxlan_update(struct interface *ifp, - return 0; - - vinfo = RTA_DATA(aftb[IFLA_BRIDGE_VLAN_INFO]); -- if (!(vinfo->flags & BRIDGE_VLAN_INFO_PVID)) -- return 0; -+ bvinfo.flags = vinfo->flags; -+ bvinfo.vid = vinfo->vid; - -- access_vlan = (vlanid_t)vinfo->vid; -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug("Access VLAN %u for VxLAN IF %s(%u)", access_vlan, -- ifp->name, ifp->ifindex); -- zebra_l2_vxlanif_update_access_vlan(ifp, access_vlan); -+ dplane_ctx_set_ifp_bridge_vlan_info(ctx, &bvinfo); - return 0; - } - --static void netlink_bridge_vlan_update(struct interface *ifp, -- struct rtattr *af_spec) -+static void netlink_bridge_vlan_update(struct zebra_dplane_ctx *ctx, -+ struct rtattr *af_spec) - { - struct rtattr *i; - int rem; -- uint16_t vid_range_start = 0; -- struct zebra_if *zif; -- bitfield_t old_vlan_bitmap; - struct bridge_vlan_info *vinfo; -- -- zif = (struct zebra_if *)ifp->info; -- -- /* cache the old bitmap addrs */ -- old_vlan_bitmap = zif->vlan_bitmap; -- /* create a new bitmap space for re-eval */ -- bf_init(zif->vlan_bitmap, IF_VLAN_BITMAP_MAX); -+ struct zebra_dplane_bridge_vlan_info_array *bvarray = NULL; -+ int32_t count = 0; - - if (af_spec) { - for (i = RTA_DATA(af_spec), rem = RTA_PAYLOAD(af_spec); - RTA_OK(i, rem); i = RTA_NEXT(i, rem)) { -- - if (i->rta_type != IFLA_BRIDGE_VLAN_INFO) - continue; - -- vinfo = RTA_DATA(i); -- -- if (vinfo->flags & BRIDGE_VLAN_INFO_RANGE_BEGIN) { -- vid_range_start = vinfo->vid; -- continue; -- } -+ count++; -+ bvarray = XREALLOC( -+ MTYPE_TMP, bvarray, -+ sizeof(struct -+ zebra_dplane_bridge_vlan_info_array) + -+ count * sizeof(struct -+ zebra_dplane_bridge_vlan_info)); - -- if (!(vinfo->flags & BRIDGE_VLAN_INFO_RANGE_END)) -- vid_range_start = vinfo->vid; -- -- zebra_vlan_bitmap_compute(ifp, vid_range_start, -- vinfo->vid); -+ vinfo = RTA_DATA(i); -+ bvarray->array[count - 1].flags = vinfo->flags; -+ bvarray->array[count - 1].vid = vinfo->vid; - } - } - -- zebra_vlan_mbr_re_eval(ifp, old_vlan_bitmap); -- -- bf_free(old_vlan_bitmap); -+ if (count) { -+ bvarray->count = count; -+ dplane_ctx_set_ifp_bridge_vlan_info_array(ctx, bvarray); -+ } - } - --static int netlink_bridge_interface(struct nlmsghdr *h, int len, ns_id_t ns_id, -- int startup) -+static int netlink_bridge_interface(struct zebra_dplane_ctx *ctx, -+ struct rtattr *af_spec, int startup) - { -- char *name = NULL; -- struct ifinfomsg *ifi; -- struct rtattr *tb[IFLA_MAX + 1]; -- struct interface *ifp; -- struct zebra_if *zif; -- struct rtattr *af_spec; - -- /* Fetch name and ifindex */ -- ifi = NLMSG_DATA(h); -- netlink_parse_rtattr(tb, IFLA_MAX, IFLA_RTA(ifi), len); -- -- if (tb[IFLA_IFNAME] == NULL) -- return -1; -- name = (char *)RTA_DATA(tb[IFLA_IFNAME]); -- -- /* The interface should already be known, if not discard. */ -- ifp = if_lookup_by_index_per_ns(zebra_ns_lookup(ns_id), ifi->ifi_index); -- if (!ifp) { -- zlog_debug("Cannot find bridge IF %s(%u)", name, -- ifi->ifi_index); -- return 0; -- } -- -- /* We are only interested in the access VLAN i.e., AF_SPEC */ -- af_spec = tb[IFLA_AF_SPEC]; -- -- if (IS_ZEBRA_IF_VXLAN(ifp)) -- return netlink_bridge_vxlan_update(ifp, af_spec); -+ netlink_bridge_vxlan_update(ctx, af_spec); - - /* build vlan bitmap associated with this interface if that - * device type is interested in the vlans - */ -- zif = (struct zebra_if *)ifp->info; -- if (bf_is_inited(zif->vlan_bitmap)) -- netlink_bridge_vlan_update(ifp, af_spec); -+ netlink_bridge_vlan_update(ctx, af_spec); - -+ dplane_provider_enqueue_to_zebra(ctx); - return 0; - } - --static bool is_if_protodown_reason_only_frr(uint32_t rc_bitfield) --{ -- return (rc_bitfield == (((uint32_t)1) << if_netlink_get_frr_protodown_r_bit())); --} -- - /* - * Process interface protodown dplane update. - * - * If the interface is an es bond member then it must follow EVPN's - * protodown setting. - */ --static void netlink_proc_dplane_if_protodown(struct zebra_if *zif, -+static void netlink_proc_dplane_if_protodown(struct zebra_dplane_ctx *ctx, - struct rtattr **tb) - { - bool protodown; -- bool old_protodown; - uint32_t rc_bitfield = 0; - struct rtattr *pd_reason_info[IFLA_MAX + 1]; - -@@ -846,59 +727,9 @@ static void netlink_proc_dplane_if_protodown(struct zebra_if *zif, - pd_reason_info[IFLA_PROTO_DOWN_REASON_VALUE]); - } - -- /* -- * Set our reason code to note it wasn't us. -- * If the reason we got from the kernel is ONLY frr though, don't -- * set it. -- */ -- COND_FLAG(zif->protodown_rc, ZEBRA_PROTODOWN_EXTERNAL, -- protodown && rc_bitfield && -- !is_if_protodown_reason_only_frr(rc_bitfield)); -- -- -- old_protodown = !!ZEBRA_IF_IS_PROTODOWN(zif); -- if (protodown == old_protodown) -- return; -- -- if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug("interface %s dplane change, protdown %s", -- zif->ifp->name, protodown ? "on" : "off"); -- -- /* Set protodown, respectively */ -- COND_FLAG(zif->flags, ZIF_FLAG_PROTODOWN, protodown); -- -- if (zebra_evpn_is_es_bond_member(zif->ifp)) { -- /* Check it's not already being sent to the dplane first */ -- if (protodown && -- CHECK_FLAG(zif->flags, ZIF_FLAG_SET_PROTODOWN)) { -- if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "bond mbr %s protodown on recv'd but already sent protodown on to the dplane", -- zif->ifp->name); -- return; -- } -- -- if (!protodown && -- CHECK_FLAG(zif->flags, ZIF_FLAG_UNSET_PROTODOWN)) { -- if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "bond mbr %s protodown off recv'd but already sent protodown off to the dplane", -- zif->ifp->name); -- return; -- } -- -- if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "bond mbr %s reinstate protodown %s in the dplane", -- zif->ifp->name, old_protodown ? "on" : "off"); -- -- if (old_protodown) -- SET_FLAG(zif->flags, ZIF_FLAG_SET_PROTODOWN); -- else -- SET_FLAG(zif->flags, ZIF_FLAG_UNSET_PROTODOWN); -- -- dplane_intf_update(zif->ifp); -- } -+ dplane_ctx_set_ifp_rc_bitfield(ctx, rc_bitfield); -+ dplane_ctx_set_ifp_protodown(ctx, protodown); -+ dplane_ctx_set_ifp_protodown_set(ctx, true); - } - - static uint8_t netlink_parse_lacp_bypass(struct rtattr **linkinfo) -@@ -915,29 +746,6 @@ static uint8_t netlink_parse_lacp_bypass(struct rtattr **linkinfo) - return bypass; - } - --/* -- * Only called at startup to cleanup leftover protodown reasons we may -- * have not cleaned up. We leave protodown set though. -- */ --static void if_sweep_protodown(struct zebra_if *zif) --{ -- bool protodown; -- -- protodown = !!ZEBRA_IF_IS_PROTODOWN(zif); -- -- if (!protodown) -- return; -- -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug("interface %s sweeping protodown %s reason 0x%x", -- zif->ifp->name, protodown ? "on" : "off", -- zif->protodown_rc); -- -- /* Only clear our reason codes, leave external if it was set */ -- UNSET_FLAG(zif->protodown_rc, ZEBRA_PROTODOWN_ALL); -- dplane_intf_update(zif->ifp); --} -- - /* Request for specific interface or address information from the kernel */ - static int netlink_request_intf_addr(struct nlsock *netlink_cmd, int family, - int type, uint32_t filter_mask) -@@ -984,7 +792,7 @@ int interface_lookup_netlink(struct zebra_ns *zns) - { - int ret; - struct zebra_dplane_info dp_info; -- struct nlsock *netlink_cmd = &zns->netlink_cmd; -+ struct nlsock *netlink_cmd = &zns->netlink_dplane_out; - - /* Capture key info from ns struct */ - zebra_dplane_info_from_zns(&dp_info, zns, true /*is_cmd*/); -@@ -1008,6 +816,13 @@ int interface_lookup_netlink(struct zebra_ns *zns) - if (ret < 0) - return ret; - -+ return ret; -+} -+ -+void interface_list_tunneldump(struct zebra_ns *zns) -+{ -+ int ret; -+ - /* - * So netlink_tunneldump_read will initiate a request - * per tunnel to get data. If we are on a kernel that -@@ -1020,13 +835,12 @@ int interface_lookup_netlink(struct zebra_ns *zns) - */ - ret = netlink_tunneldump_read(zns); - if (ret < 0) -- return ret; -+ return; - -- /* fixup linkages */ -- zebra_if_update_all_links(zns); -- return 0; -+ zebra_dplane_startup_stage(zns, ZEBRA_DPLANE_TUNNELS_READ); - } - -+ - /** - * interface_addr_lookup_netlink() - Look up interface addresses - * -@@ -1046,8 +860,8 @@ static int interface_addr_lookup_netlink(struct zebra_ns *zns) - ret = netlink_request_intf_addr(netlink_cmd, AF_INET, RTM_GETADDR, 0); - if (ret < 0) - return ret; -- ret = netlink_parse_info(netlink_interface_addr, netlink_cmd, &dp_info, -- 0, true); -+ ret = netlink_parse_info(netlink_interface_addr_dplane, netlink_cmd, -+ &dp_info, 0, true); - if (ret < 0) - return ret; - -@@ -1055,8 +869,8 @@ static int interface_addr_lookup_netlink(struct zebra_ns *zns) - ret = netlink_request_intf_addr(netlink_cmd, AF_INET6, RTM_GETADDR, 0); - if (ret < 0) - return ret; -- ret = netlink_parse_info(netlink_interface_addr, netlink_cmd, &dp_info, -- 0, true); -+ ret = netlink_parse_info(netlink_interface_addr_dplane, netlink_cmd, -+ &dp_info, 0, true); - if (ret < 0) - return ret; - -@@ -1616,7 +1430,6 @@ int netlink_interface_addr_dplane(struct nlmsghdr *h, ns_id_t ns_id, - - /* Enqueue ctx for main pthread to process */ - dplane_provider_enqueue_to_zebra(ctx); -- - return 0; - } - -@@ -1626,27 +1439,21 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup) - struct ifinfomsg *ifi; - struct rtattr *tb[IFLA_MAX + 1]; - struct rtattr *linkinfo[IFLA_MAX + 1]; -- struct interface *ifp; - char *name = NULL; - char *kind = NULL; -- char *desc = NULL; - char *slave_kind = NULL; -- struct zebra_ns *zns; - vrf_id_t vrf_id = VRF_DEFAULT; - enum zebra_iftype zif_type = ZEBRA_IF_OTHER; - enum zebra_slave_iftype zif_slave_type = ZEBRA_IF_SLAVE_NONE; - ifindex_t bridge_ifindex = IFINDEX_INTERNAL; - ifindex_t bond_ifindex = IFINDEX_INTERNAL; - ifindex_t link_ifindex = IFINDEX_INTERNAL; -- uint8_t old_hw_addr[INTERFACE_HWADDR_MAX]; -- struct zebra_if *zif; - ns_id_t link_nsid = ns_id; - ifindex_t master_infindex = IFINDEX_INTERNAL; - uint8_t bypass = 0; - - frrtrace(3, frr_zebra, netlink_interface, h, ns_id, startup); - -- zns = zebra_ns_lookup(ns_id); - ifi = NLMSG_DATA(h); - - /* assume if not default zns, then new VRF */ -@@ -1675,10 +1482,6 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup) - return -1; - } - -- /* We are interested in some AF_BRIDGE notifications. */ -- if (ifi->ifi_family == AF_BRIDGE) -- return netlink_bridge_interface(h, len, ns_id, startup); -- - /* Looking up interface name. */ - memset(linkinfo, 0, sizeof(linkinfo)); - netlink_parse_rtattr_flags(tb, IFLA_MAX, IFLA_RTA(ifi), len, -@@ -1728,18 +1531,47 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup) - link_nsid = *(ns_id_t *)RTA_DATA(tb[IFLA_LINK_NETNSID]); - link_nsid = ns_id_get_absolute(ns_id, link_nsid); - } -- if (tb[IFLA_IFALIAS]) { -- desc = (char *)RTA_DATA(tb[IFLA_IFALIAS]); -- } - -- /* See if interface is present. */ -- ifp = if_lookup_by_name_per_ns(zns, name); -+ struct zebra_dplane_ctx *ctx = dplane_ctx_alloc(); -+ dplane_ctx_set_ns_id(ctx, ns_id); -+ dplane_ctx_set_ifp_link_nsid(ctx, link_nsid); -+ dplane_ctx_set_ifp_zif_type(ctx, zif_type); -+ dplane_ctx_set_ifindex(ctx, ifi->ifi_index); -+ dplane_ctx_set_ifname(ctx, name); -+ dplane_ctx_set_ifp_startup(ctx, startup); -+ dplane_ctx_set_ifp_family(ctx, ifi->ifi_family); -+ -+ /* We are interested in some AF_BRIDGE notifications. */ -+#ifndef AF_BRIDGE -+#define AF_BRIDGE 7 -+#endif -+ if (ifi->ifi_family == AF_BRIDGE) { -+ dplane_ctx_set_op(ctx, DPLANE_OP_INTF_INSTALL); -+ return netlink_bridge_interface(ctx, tb[IFLA_AF_SPEC], startup); -+ } - - if (h->nlmsg_type == RTM_NEWLINK) { -+ dplane_ctx_set_ifp_link_ifindex(ctx, link_ifindex); -+ dplane_ctx_set_op(ctx, DPLANE_OP_INTF_INSTALL); -+ dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_QUEUED); -+ if (tb[IFLA_IFALIAS]) { -+ dplane_ctx_set_ifp_desc(ctx, -+ RTA_DATA(tb[IFLA_IFALIAS])); -+ } -+ if (!tb[IFLA_MTU]) { -+ if (IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "RTM_NEWLINK for interface %s(%u) without MTU set", -+ name, ifi->ifi_index); -+ return 0; -+ } -+ dplane_ctx_set_ifp_mtu(ctx, *(int *)RTA_DATA(tb[IFLA_MTU])); -+ - /* If VRF, create or update the VRF structure itself. */ - if (zif_type == ZEBRA_IF_VRF && !vrf_is_backend_netns()) { -- netlink_vrf_change(h, tb[IFLA_LINKINFO], ns_id, name); -- vrf_id = (vrf_id_t)ifi->ifi_index; -+ netlink_vrf_change(h, tb[IFLA_LINKINFO], ns_id, name, -+ ctx); -+ vrf_id = ifi->ifi_index; - } - - if (tb[IFLA_MASTER]) { -@@ -1762,279 +1594,45 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup) - } else - zif_slave_type = ZEBRA_IF_SLAVE_OTHER; - } -+ dplane_ctx_set_ifp_zif_slave_type(ctx, zif_slave_type); -+ dplane_ctx_set_ifp_vrf_id(ctx, vrf_id); -+ dplane_ctx_set_ifp_master_ifindex(ctx, master_infindex); -+ dplane_ctx_set_ifp_bridge_ifindex(ctx, bridge_ifindex); -+ dplane_ctx_set_ifp_bond_ifindex(ctx, bond_ifindex); -+ dplane_ctx_set_ifp_bypass(ctx, bypass); -+ dplane_ctx_set_ifp_zltype( -+ ctx, netlink_to_zebra_link_type(ifi->ifi_type)); -+ - if (vrf_is_backend_netns()) -- vrf_id = (vrf_id_t)ns_id; -- if (ifp == NULL -- || !CHECK_FLAG(ifp->status, ZEBRA_INTERFACE_ACTIVE)) { -- /* Add interface notification from kernel */ -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "RTM_NEWLINK ADD for %s(%u) vrf_id %u type %d sl_type %d master %u flags 0x%x", -- name, ifi->ifi_index, vrf_id, zif_type, -- zif_slave_type, master_infindex, -- ifi->ifi_flags); -- -- if (ifp == NULL) { -- /* unknown interface */ -- ifp = if_get_by_name(name, vrf_id, NULL); -- } else { -- /* pre-configured interface, learnt now */ -- if (ifp->vrf->vrf_id != vrf_id) -- if_update_to_new_vrf(ifp, vrf_id); -- } -- -- /* Update interface information. */ -- set_ifindex(ifp, ifi->ifi_index, zns); -- ifp->flags = ifi->ifi_flags & 0x0000fffff; -- if (!tb[IFLA_MTU]) { -- zlog_debug( -- "RTM_NEWLINK for interface %s(%u) without MTU set", -- name, ifi->ifi_index); -- return 0; -- } -- ifp->mtu6 = ifp->mtu = *(int *)RTA_DATA(tb[IFLA_MTU]); -- ifp->metric = 0; -- ifp->speed = get_iflink_speed(ifp, NULL); -- ifp->ptm_status = ZEBRA_PTM_STATUS_UNKNOWN; -- -- /* Set interface type */ -- zebra_if_set_ziftype(ifp, zif_type, zif_slave_type); -- if (IS_ZEBRA_IF_VRF(ifp)) -- SET_FLAG(ifp->status, -- ZEBRA_INTERFACE_VRF_LOOPBACK); -- -- /* Update link. */ -- zebra_if_update_link(ifp, link_ifindex, link_nsid); -- -- /* -- * Just set the @link/lower-device ifindex. During -- * nldump interfaces are not ordered in any fashion so -- * we may end up getting upper devices before lower -- * devices. We will setup the real linkage once the dump -- * is complete. -- */ -- zif = (struct zebra_if *)ifp->info; -- zif->link_ifindex = link_ifindex; -- -- ifp->ll_type = -- netlink_to_zebra_link_type(ifi->ifi_type); -- netlink_interface_update_hw_addr(tb, ifp); -- -- /* Inform clients, install any configured addresses. */ -- if_add_update(ifp); -- -- /* Extract and save L2 interface information, take -- * additional actions. */ -- netlink_interface_update_l2info( -- ifp, linkinfo[IFLA_INFO_DATA], -- 1, link_nsid); -- if (IS_ZEBRA_IF_BOND(ifp)) -- zebra_l2if_update_bond(ifp, true); -- if (IS_ZEBRA_IF_BRIDGE_SLAVE(ifp)) -- zebra_l2if_update_bridge_slave( -- ifp, bridge_ifindex, ns_id, -- ZEBRA_BRIDGE_NO_ACTION); -- else if (IS_ZEBRA_IF_BOND_SLAVE(ifp)) -- zebra_l2if_update_bond_slave(ifp, bond_ifindex, -- !!bypass); -- -- if (tb[IFLA_PROTO_DOWN]) { -- netlink_proc_dplane_if_protodown(ifp->info, tb); -- if (startup) -- if_sweep_protodown(zif); -- } -- if (IS_ZEBRA_IF_BRIDGE(ifp)) { -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "RTM_NEWLINK ADD for %s(%u), vlan-aware %d", -- name, ifp->ifindex, -- IS_ZEBRA_IF_BRIDGE_VLAN_AWARE( -- zif)); -- } -- } else if (ifp->vrf->vrf_id != vrf_id) { -- /* VRF change for an interface. */ -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "RTM_NEWLINK vrf-change for %s(%u) vrf_id %u -> %u flags 0x%x", -- name, ifp->ifindex, ifp->vrf->vrf_id, -- vrf_id, ifi->ifi_flags); -+ dplane_ctx_set_ifp_vrf_id(ctx, ns_id); - -- if_handle_vrf_change(ifp, vrf_id); -- } else { -- bool was_bridge_slave, was_bond_slave; -- uint8_t chgflags = ZEBRA_BRIDGE_NO_ACTION; -- zif = ifp->info; -+ dplane_ctx_set_ifp_flags(ctx, ifi->ifi_flags & 0x0000fffff); - -- /* Interface update. */ -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "RTM_NEWLINK update for %s(%u) sl_type %d master %u flags 0x%x", -- name, ifp->ifindex, zif_slave_type, -- master_infindex, ifi->ifi_flags); -+ if (tb[IFLA_PROTO_DOWN]) { -+ dplane_ctx_set_ifp_protodown_set(ctx, true); -+ netlink_proc_dplane_if_protodown(ctx, tb); -+ } else -+ dplane_ctx_set_ifp_protodown_set(ctx, false); - -- set_ifindex(ifp, ifi->ifi_index, zns); -- if (!tb[IFLA_MTU]) { -- zlog_debug( -- "RTM_NEWLINK for interface %s(%u) without MTU set", -- name, ifi->ifi_index); -- return 0; -- } -- ifp->mtu6 = ifp->mtu = *(int *)RTA_DATA(tb[IFLA_MTU]); -- ifp->metric = 0; -- -- /* Update interface type - NOTE: Only slave_type can -- * change. */ -- was_bridge_slave = IS_ZEBRA_IF_BRIDGE_SLAVE(ifp); -- was_bond_slave = IS_ZEBRA_IF_BOND_SLAVE(ifp); -- zebra_if_set_ziftype(ifp, zif_type, zif_slave_type); -- -- memcpy(old_hw_addr, ifp->hw_addr, INTERFACE_HWADDR_MAX); -- -- /* Update link. */ -- zebra_if_update_link(ifp, link_ifindex, link_nsid); -- -- ifp->ll_type = -- netlink_to_zebra_link_type(ifi->ifi_type); -- netlink_interface_update_hw_addr(tb, ifp); -- -- if (tb[IFLA_PROTO_DOWN]) -- netlink_proc_dplane_if_protodown(ifp->info, tb); -- -- if (if_is_no_ptm_operative(ifp)) { -- bool is_up = if_is_operative(ifp); -- ifp->flags = ifi->ifi_flags & 0x0000fffff; -- if (!if_is_no_ptm_operative(ifp) || -- CHECK_FLAG(zif->flags, -- ZIF_FLAG_PROTODOWN)) { -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "Intf %s(%u) has gone DOWN", -- name, ifp->ifindex); -- if_down(ifp); -- rib_update(RIB_UPDATE_KERNEL); -- } else if (if_is_operative(ifp)) { -- bool mac_updated = false; -- -- /* Must notify client daemons of new -- * interface status. */ -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "Intf %s(%u) PTM up, notifying clients", -- name, ifp->ifindex); -- if_up(ifp, !is_up); -- -- /* Update EVPN VNI when SVI MAC change -- */ -- if (memcmp(old_hw_addr, ifp->hw_addr, -- INTERFACE_HWADDR_MAX)) -- mac_updated = true; -- if (IS_ZEBRA_IF_VLAN(ifp) -- && mac_updated) { -- struct interface *link_if; -- -- link_if = -- if_lookup_by_index_per_ns( -- zebra_ns_lookup(NS_DEFAULT), -- link_ifindex); -- if (link_if) -- zebra_vxlan_svi_up(ifp, -- link_if); -- } else if (mac_updated -- && IS_ZEBRA_IF_BRIDGE(ifp)) { -- zlog_debug( -- "Intf %s(%u) bridge changed MAC address", -- name, ifp->ifindex); -- chgflags = -- ZEBRA_BRIDGE_MASTER_MAC_CHANGE; -- } -- } -- } else { -- ifp->flags = ifi->ifi_flags & 0x0000fffff; -- if (if_is_operative(ifp) && -- !CHECK_FLAG(zif->flags, -- ZIF_FLAG_PROTODOWN)) { -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "Intf %s(%u) has come UP", -- name, ifp->ifindex); -- if_up(ifp, true); -- if (IS_ZEBRA_IF_BRIDGE(ifp)) -- chgflags = -- ZEBRA_BRIDGE_MASTER_UP; -- } else { -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "Intf %s(%u) has gone DOWN", -- name, ifp->ifindex); -- if_down(ifp); -- rib_update(RIB_UPDATE_KERNEL); -- } -- } -- -- /* Extract and save L2 interface information, take -- * additional actions. */ -- netlink_interface_update_l2info( -- ifp, linkinfo[IFLA_INFO_DATA], -- 0, link_nsid); -- if (IS_ZEBRA_IF_BRIDGE(ifp)) -- zebra_l2if_update_bridge(ifp, chgflags); -- if (IS_ZEBRA_IF_BOND(ifp)) -- zebra_l2if_update_bond(ifp, true); -- if (IS_ZEBRA_IF_BRIDGE_SLAVE(ifp) || was_bridge_slave) -- zebra_l2if_update_bridge_slave( -- ifp, bridge_ifindex, ns_id, chgflags); -- else if (IS_ZEBRA_IF_BOND_SLAVE(ifp) || was_bond_slave) -- zebra_l2if_update_bond_slave(ifp, bond_ifindex, -- !!bypass); -- if (IS_ZEBRA_IF_BRIDGE(ifp)) { -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "RTM_NEWLINK update for %s(%u), vlan-aware %d", -- name, ifp->ifindex, -- IS_ZEBRA_IF_BRIDGE_VLAN_AWARE( -- zif)); -- } -- } -+ netlink_interface_update_hw_addr(tb, ctx); - -- zif = ifp->info; -- if (zif) { -- XFREE(MTYPE_ZIF_DESC, zif->desc); -- if (desc) -- zif->desc = XSTRDUP(MTYPE_ZIF_DESC, desc); -- } -+ /* Extract and save L2 interface information, take -+ * additional actions. */ -+ netlink_interface_update_l2info( -+ ctx, zif_type, linkinfo[IFLA_INFO_DATA], 1, link_nsid); - } else { -- /* Delete interface notification from kernel */ -- if (ifp == NULL) { -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "RTM_DELLINK for unknown interface %s(%u)", -- name, ifi->ifi_index); -- return 0; -- } -- - if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug("RTM_DELLINK for %s(%u)", name, -- ifp->ifindex); -- -- UNSET_FLAG(ifp->status, ZEBRA_INTERFACE_VRF_LOOPBACK); -- -- if (IS_ZEBRA_IF_BOND(ifp)) -- zebra_l2if_update_bond(ifp, false); -- if (IS_ZEBRA_IF_BOND_SLAVE(ifp)) -- zebra_l2if_update_bond_slave(ifp, bond_ifindex, false); -- /* Special handling for bridge or VxLAN interfaces. */ -- if (IS_ZEBRA_IF_BRIDGE(ifp)) -- zebra_l2_bridge_del(ifp); -- else if (IS_ZEBRA_IF_VXLAN(ifp)) -- zebra_l2_vxlanif_del(ifp); -- -- if_delete_update(&ifp); -- -- /* If VRF, delete the VRF structure itself. */ -- if (zif_type == ZEBRA_IF_VRF && !vrf_is_backend_netns()) -- netlink_vrf_change(h, tb[IFLA_LINKINFO], ns_id, name); -+ zlog_debug("RTM_DELLINK for %s(%u), enqueuing to zebra", -+ name, ifi->ifi_index); -+ -+ dplane_ctx_set_op(ctx, DPLANE_OP_INTF_DELETE); -+ dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_QUEUED); -+ -+ dplane_ctx_set_ifp_bond_ifindex(ctx, bond_ifindex); - } - -+ dplane_provider_enqueue_to_zebra(ctx); -+ - return 0; - } - -@@ -2111,6 +1709,13 @@ ssize_t netlink_intf_msg_encode(uint16_t cmd, - void interface_list(struct zebra_ns *zns) - { - interface_lookup_netlink(zns); -+ -+ zebra_dplane_startup_stage(zns, ZEBRA_DPLANE_INTERFACES_READ); -+} -+ -+void interface_list_second(struct zebra_ns *zns) -+{ -+ zebra_if_update_all_links(zns); - /* We add routes for interface address, - * so we need to get the nexthop info - * from the kernel before we can do that -@@ -2118,6 +1723,8 @@ void interface_list(struct zebra_ns *zns) - netlink_nexthop_read(zns); - - interface_addr_lookup_netlink(zns); -+ -+ zebra_dplane_startup_stage(zns, ZEBRA_DPLANE_ADDRESSES_READ); - } - - /** -diff --git a/zebra/interface.c b/zebra/interface.c -index a05b9690ef..bfe7a06896 100644 ---- a/zebra/interface.c -+++ b/zebra/interface.c -@@ -1298,6 +1298,9 @@ static void zebra_if_addr_update_ctx(struct zebra_dplane_ctx *ctx, - const struct prefix *addr, *dest = NULL; - enum dplane_op_e op; - -+ if (!ifp) -+ return; -+ - op = dplane_ctx_get_op(ctx); - addr = dplane_ctx_get_intf_addr(ctx); - -@@ -1416,6 +1419,13 @@ static void zebra_if_netconf_update_ctx(struct zebra_dplane_ctx *ctx, - enum dplane_netconf_status_e mpls, mcast_on, linkdown; - bool *mcast_set, *linkdown_set; - -+ if (!ifp && ifindex != -1 && ifindex != -2) { -+ if (IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug("%s: Can't find ifp(%u)", __func__, ifindex); -+ -+ return; -+ } -+ - afi = dplane_ctx_get_afi(ctx); - mpls = dplane_ctx_get_netconf_mpls(ctx); - linkdown = dplane_ctx_get_netconf_linkdown(ctx); -@@ -1485,6 +1495,686 @@ static void zebra_if_netconf_update_ctx(struct zebra_dplane_ctx *ctx, - (*linkdown_set ? "ON" : "OFF")); - } - -+static void interface_vrf_change(enum dplane_op_e op, ifindex_t ifindex, -+ const char *name, uint32_t tableid, -+ ns_id_t ns_id) -+{ -+ struct vrf *vrf; -+ struct zebra_vrf *zvrf = NULL; -+ -+ if (op == DPLANE_OP_INTF_DELETE) { -+ if (IS_ZEBRA_DEBUG_DPLANE) -+ zlog_debug("DPLANE_OP_INTF_DELETE for VRF %s(%u)", name, -+ ifindex); -+ -+ vrf = vrf_lookup_by_id((vrf_id_t)ifindex); -+ if (!vrf) { -+ flog_warn(EC_ZEBRA_VRF_NOT_FOUND, -+ "%s(%u): vrf not found", name, ifindex); -+ return; -+ } -+ -+ vrf_delete(vrf); -+ } else { -+ if (IS_ZEBRA_DEBUG_DPLANE) -+ zlog_debug( -+ "DPLANE_OP_INTF_UPDATE for VRF %s(%u) table %u", -+ name, ifindex, tableid); -+ -+ if (!vrf_lookup_by_id((vrf_id_t)ifindex)) { -+ vrf_id_t exist_id; -+ -+ exist_id = zebra_vrf_lookup_by_table(tableid, ns_id); -+ if (exist_id != VRF_DEFAULT) { -+ vrf = vrf_lookup_by_id(exist_id); -+ -+ flog_err( -+ EC_ZEBRA_VRF_MISCONFIGURED, -+ "VRF %s id %u table id overlaps existing vrf %s(%d), misconfiguration exiting", -+ name, ifindex, vrf->name, vrf->vrf_id); -+ exit(-1); -+ } -+ } -+ -+ vrf = vrf_update((vrf_id_t)ifindex, name); -+ if (!vrf) { -+ flog_err(EC_LIB_INTERFACE, "VRF %s id %u not created", -+ name, ifindex); -+ return; -+ } -+ -+ /* -+ * This is the only place that we get the actual kernel table_id -+ * being used. We need it to set the table_id of the routes -+ * we are passing to the kernel.... And to throw some totally -+ * awesome parties. that too. -+ * -+ * At this point we *must* have a zvrf because the vrf_create -+ * callback creates one. We *must* set the table id -+ * before the vrf_enable because of( at the very least ) -+ * static routes being delayed for installation until -+ * during the vrf_enable callbacks. -+ */ -+ zvrf = (struct zebra_vrf *)vrf->info; -+ zvrf->table_id = tableid; -+ -+ /* Enable the created VRF. */ -+ if (!vrf_enable(vrf)) { -+ flog_err(EC_LIB_INTERFACE, -+ "Failed to enable VRF %s id %u", name, -+ ifindex); -+ return; -+ } -+ } -+} -+ -+/* -+ * Note: on netlink systems, there should be a 1-to-1 mapping -+ * between interface names and ifindex values. -+ */ -+static void set_ifindex(struct interface *ifp, ifindex_t ifi_index, -+ struct zebra_ns *zns) -+{ -+ struct interface *oifp; -+ -+ oifp = if_lookup_by_index_per_ns(zns, ifi_index); -+ if ((oifp != NULL) && (oifp != ifp)) { -+ if (ifi_index == IFINDEX_INTERNAL) -+ flog_err( -+ EC_LIB_INTERFACE, -+ "Netlink is setting interface %s ifindex to reserved internal value %u", -+ ifp->name, ifi_index); -+ else { -+ if (IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "interface index %d was renamed from %s to %s", -+ ifi_index, oifp->name, ifp->name); -+ if (if_is_up(oifp)) -+ flog_err( -+ EC_LIB_INTERFACE, -+ "interface rename detected on up interface: index %d was renamed from %s to %s, results are uncertain!", -+ ifi_index, oifp->name, ifp->name); -+ if_delete_update(&oifp); -+ } -+ } -+ if_set_index(ifp, ifi_index); -+} -+ -+static inline void zebra_if_set_ziftype(struct interface *ifp, -+ enum zebra_iftype zif_type, -+ enum zebra_slave_iftype zif_slave_type) -+{ -+ struct zebra_if *zif; -+ -+ zif = (struct zebra_if *)ifp->info; -+ zif->zif_slave_type = zif_slave_type; -+ -+ if (zif->zif_type != zif_type) { -+ zif->zif_type = zif_type; -+ /* If the if_type has been set to bond initialize ES info -+ * against it. XXX - note that we don't handle the case where -+ * a zif changes from bond to non-bond; it is really -+ * an unexpected/error condition. -+ */ -+ zebra_evpn_if_init(zif); -+ } -+} -+ -+static void interface_update_hw_addr(struct zebra_dplane_ctx *ctx, -+ struct interface *ifp) -+{ -+ int i; -+ -+ ifp->hw_addr_len = dplane_ctx_get_ifp_hw_addr_len(ctx); -+ memcpy(ifp->hw_addr, dplane_ctx_get_ifp_hw_addr(ctx), ifp->hw_addr_len); -+ -+ for (i = 0; i < ifp->hw_addr_len; i++) -+ if (ifp->hw_addr[i] != 0) -+ break; -+ -+ if (i == ifp->hw_addr_len) -+ ifp->hw_addr_len = 0; -+} -+ -+static void interface_update_l2info(struct zebra_dplane_ctx *ctx, -+ struct interface *ifp, -+ enum zebra_iftype zif_type, int add, -+ ns_id_t link_nsid) -+{ -+ const struct zebra_l2info_vxlan *vxlan_info; -+ const struct zebra_l2info_gre *gre_info; -+ -+ switch (zif_type) { -+ case ZEBRA_IF_BRIDGE: -+ zebra_l2_bridge_add_update(ifp, -+ dplane_ctx_get_ifp_bridge_info(ctx)); -+ break; -+ case ZEBRA_IF_VLAN: -+ zebra_l2_vlanif_update(ifp, dplane_ctx_get_ifp_vlan_info(ctx)); -+ zebra_evpn_acc_bd_svi_set(ifp->info, NULL, -+ !!if_is_operative(ifp)); -+ break; -+ case ZEBRA_IF_VXLAN: -+ vxlan_info = dplane_ctx_get_ifp_vxlan_info(ctx); -+ zebra_l2_vxlanif_add_update(ifp, vxlan_info, add); -+ if (link_nsid != NS_UNKNOWN && vxlan_info->ifindex_link) -+ zebra_if_update_link(ifp, vxlan_info->ifindex_link, -+ link_nsid); -+ break; -+ case ZEBRA_IF_GRE: -+ gre_info = dplane_ctx_get_ifp_gre_info(ctx); -+ zebra_l2_greif_add_update(ifp, gre_info, add); -+ if (link_nsid != NS_UNKNOWN && gre_info->ifindex_link) -+ zebra_if_update_link(ifp, gre_info->ifindex_link, -+ link_nsid); -+ break; -+ case ZEBRA_IF_OTHER: -+ case ZEBRA_IF_VRF: -+ case ZEBRA_IF_MACVLAN: -+ case ZEBRA_IF_VETH: -+ case ZEBRA_IF_BOND: -+ case ZEBRA_IF_BOND_SLAVE: -+ break; -+ } -+} -+ -+static bool is_if_protodown_reason_only_frr(uint32_t rc_bitfield) -+{ -+ uint8_t frr_protodown_r_bit = if_netlink_get_frr_protodown_r_bit(); -+ -+ return (rc_bitfield == (((uint32_t)1) << frr_protodown_r_bit)); -+} -+ -+static void interface_if_protodown(struct interface *ifp, bool protodown, -+ uint32_t rc_bitfield) -+{ -+ struct zebra_if *zif = ifp->info; -+ bool old_protodown; -+ -+ /* -+ * Set our reason code to note it wasn't us. -+ * If the reason we got from the kernel is ONLY frr though, don't -+ * set it. -+ */ -+ COND_FLAG(zif->protodown_rc, ZEBRA_PROTODOWN_EXTERNAL, -+ protodown && rc_bitfield && -+ !is_if_protodown_reason_only_frr(rc_bitfield)); -+ -+ -+ old_protodown = !!ZEBRA_IF_IS_PROTODOWN(zif); -+ if (protodown == old_protodown) -+ return; -+ -+ if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_DPLANE) -+ zlog_debug("interface %s dplane change, protodown %s", -+ ifp->name, protodown ? "on" : "off"); -+ -+ /* Set protodown, respectively */ -+ COND_FLAG(zif->flags, ZIF_FLAG_PROTODOWN, protodown); -+ -+ if (zebra_evpn_is_es_bond_member(ifp)) { -+ /* Check it's not already being sent to the dplane first */ -+ if (protodown && -+ CHECK_FLAG(zif->flags, ZIF_FLAG_SET_PROTODOWN)) { -+ if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "bond mbr %s protodown on recv'd but already sent protodown on to the dplane", -+ ifp->name); -+ return; -+ } -+ -+ if (!protodown && -+ CHECK_FLAG(zif->flags, ZIF_FLAG_UNSET_PROTODOWN)) { -+ if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "bond mbr %s protodown off recv'd but already sent protodown off to the dplane", -+ ifp->name); -+ return; -+ } -+ -+ if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "bond mbr %s reinstate protodown %s in the dplane", -+ ifp->name, old_protodown ? "on" : "off"); -+ -+ if (old_protodown) -+ SET_FLAG(zif->flags, ZIF_FLAG_SET_PROTODOWN); -+ else -+ SET_FLAG(zif->flags, ZIF_FLAG_UNSET_PROTODOWN); -+ -+ dplane_intf_update(zif->ifp); -+ } -+} -+ -+static void if_sweep_protodown(struct zebra_if *zif) -+{ -+ bool protodown; -+ -+ protodown = !!ZEBRA_IF_IS_PROTODOWN(zif); -+ -+ if (!protodown) -+ return; -+ -+ if (IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug("interface %s sweeping protodown %s reason 0x%x", -+ zif->ifp->name, protodown ? "on" : "off", -+ zif->protodown_rc); -+ -+ /* Only clear our reason codes, leave external if it was set */ -+ UNSET_FLAG(zif->protodown_rc, ZEBRA_PROTODOWN_ALL); -+ dplane_intf_update(zif->ifp); -+} -+ -+static void interface_bridge_vxlan_update(struct zebra_dplane_ctx *ctx, -+ struct interface *ifp) -+{ -+ const struct zebra_dplane_bridge_vlan_info *bvinfo; -+ -+ bvinfo = dplane_ctx_get_ifp_bridge_vlan_info(ctx); -+ -+ if (!(bvinfo->flags & DPLANE_BRIDGE_VLAN_INFO_PVID)) -+ return; -+ -+ if (IS_ZEBRA_DEBUG_DPLANE) -+ zlog_debug("Access VLAN %u for VxLAN IF %s(%u)", bvinfo->vid, -+ ifp->name, ifp->ifindex); -+ -+ zebra_l2_vxlanif_update_access_vlan(ifp, bvinfo->vid); -+} -+ -+static void interface_bridge_vlan_update(struct zebra_dplane_ctx *ctx, -+ struct interface *ifp) -+{ -+ struct zebra_if *zif = ifp->info; -+ const struct zebra_dplane_bridge_vlan_info_array *bvarray; -+ struct zebra_dplane_bridge_vlan_info bvinfo; -+ bitfield_t old_vlan_bitmap; -+ uint16_t vid_range_start = 0; -+ int32_t i; -+ -+ /* cache the old bitmap addrs */ -+ old_vlan_bitmap = zif->vlan_bitmap; -+ /* create a new bitmap space for re-eval */ -+ bf_init(zif->vlan_bitmap, IF_VLAN_BITMAP_MAX); -+ -+ /* Could we have multiple bridge vlan infos? */ -+ bvarray = dplane_ctx_get_ifp_bridge_vlan_info_array(ctx); -+ if (!bvarray) -+ return; -+ -+ for (i = 0; i < bvarray->count; i++) { -+ bvinfo = bvarray->array[i]; -+ -+ if (bvinfo.flags & DPLANE_BRIDGE_VLAN_INFO_RANGE_BEGIN) { -+ vid_range_start = bvinfo.vid; -+ continue; -+ } -+ -+ if (!(bvinfo.flags & DPLANE_BRIDGE_VLAN_INFO_RANGE_END)) -+ vid_range_start = bvinfo.vid; -+ -+ zebra_vlan_bitmap_compute(ifp, vid_range_start, bvinfo.vid); -+ } -+ -+ zebra_vlan_mbr_re_eval(ifp, old_vlan_bitmap); -+ bf_free(old_vlan_bitmap); -+} -+ -+static void interface_bridge_handling(struct zebra_dplane_ctx *ctx, -+ struct interface *ifp, -+ enum zebra_iftype zif_type) -+{ -+ struct zebra_if *zif; -+ -+ if (!ifp) { -+ zlog_warn("Cannot find bridge if %s(%u)", -+ dplane_ctx_get_ifname(ctx), -+ dplane_ctx_get_ifindex(ctx)); -+ return; -+ } -+ -+ if (IS_ZEBRA_IF_VXLAN(ifp)) -+ return interface_bridge_vxlan_update(ctx, ifp); -+ -+ /* -+ * build vlan bitmap associated with this interface if that -+ * device type is interested in the vlans -+ */ -+ zif = ifp->info; -+ if (bf_is_inited(zif->vlan_bitmap)) -+ interface_bridge_vlan_update(ctx, ifp); -+} -+ -+static void zebra_if_dplane_ifp_handling(struct zebra_dplane_ctx *ctx) -+{ -+ enum dplane_op_e op = dplane_ctx_get_op(ctx); -+ const char *name = dplane_ctx_get_ifname(ctx); -+ ns_id_t ns_id = dplane_ctx_get_ns_id(ctx); -+ ifindex_t ifindex = dplane_ctx_get_ifindex(ctx); -+ ifindex_t bond_ifindex = dplane_ctx_get_ifp_bond_ifindex(ctx); -+ uint32_t tableid = dplane_ctx_get_ifp_table_id(ctx); -+ enum zebra_iftype zif_type = dplane_ctx_get_ifp_zif_type(ctx); -+ struct interface *ifp; -+ struct zebra_ns *zns; -+ -+ zns = zebra_ns_lookup(ns_id); -+ if (!zns) { -+ zlog_err("Where is our namespace?"); -+ return; -+ } -+ -+ if (IS_ZEBRA_DEBUG_DPLANE) -+ zlog_debug("%s for %s(%u)", dplane_op2str(op), name, ifindex); -+ -+ ifp = if_lookup_by_name_per_ns(zns, name); -+ if (op == DPLANE_OP_INTF_DELETE) { -+ /* Delete interface notification from kernel */ -+ if (ifp == NULL) { -+ if (IS_ZEBRA_DEBUG_EVENT) -+ zlog_debug( -+ "Delete LINK received for unknown interface %s(%u)", -+ name, ifindex); -+ return; -+ } -+ -+ if (IS_ZEBRA_IF_BOND(ifp)) -+ zebra_l2if_update_bond(ifp, false); -+ if (IS_ZEBRA_IF_BOND_SLAVE(ifp)) -+ zebra_l2if_update_bond_slave(ifp, bond_ifindex, false); -+ /* Special handling for bridge or VxLAN interfaces. */ -+ if (IS_ZEBRA_IF_BRIDGE(ifp)) -+ zebra_l2_bridge_del(ifp); -+ else if (IS_ZEBRA_IF_VXLAN(ifp)) -+ zebra_l2_vxlanif_del(ifp); -+ -+ if_delete_update(&ifp); -+ -+ if (zif_type == ZEBRA_IF_VRF && !vrf_is_backend_netns()) -+ interface_vrf_change(op, ifindex, name, tableid, ns_id); -+ } else { -+ ifindex_t master_ifindex, bridge_ifindex, bond_ifindex, -+ link_ifindex; -+ enum zebra_slave_iftype zif_slave_type; -+ uint8_t bypass; -+ uint64_t flags; -+ vrf_id_t vrf_id; -+ uint32_t mtu; -+ ns_id_t link_nsid; -+ struct zebra_if *zif; -+ bool protodown, protodown_set, startup; -+ uint32_t rc_bitfield; -+ uint8_t old_hw_addr[INTERFACE_HWADDR_MAX]; -+ char *desc; -+ uint8_t family; -+ -+ /* If VRF, create or update the VRF structure itself. */ -+ if (zif_type == ZEBRA_IF_VRF && !vrf_is_backend_netns()) -+ interface_vrf_change(op, ifindex, name, tableid, ns_id); -+ -+ master_ifindex = dplane_ctx_get_ifp_master_ifindex(ctx); -+ zif_slave_type = dplane_ctx_get_ifp_zif_slave_type(ctx); -+ bridge_ifindex = dplane_ctx_get_ifp_bridge_ifindex(ctx); -+ bond_ifindex = dplane_ctx_get_ifp_bond_ifindex(ctx); -+ bypass = dplane_ctx_get_ifp_bypass(ctx); -+ flags = dplane_ctx_get_ifp_flags(ctx); -+ vrf_id = dplane_ctx_get_ifp_vrf_id(ctx); -+ mtu = dplane_ctx_get_ifp_mtu(ctx); -+ link_ifindex = dplane_ctx_get_ifp_link_ifindex(ctx); -+ link_nsid = dplane_ctx_get_ifp_link_nsid(ctx); -+ protodown_set = dplane_ctx_get_ifp_protodown_set(ctx); -+ protodown = dplane_ctx_get_ifp_protodown(ctx); -+ rc_bitfield = dplane_ctx_get_ifp_rc_bitfield(ctx); -+ startup = dplane_ctx_get_ifp_startup(ctx); -+ desc = dplane_ctx_get_ifp_desc(ctx); -+ family = dplane_ctx_get_ifp_family(ctx); -+ -+#ifndef AF_BRIDGE -+ /* -+ * Work around to make free bsd happy at the moment -+ */ -+#define AF_BRIDGE 7 -+#endif -+ if (family == AF_BRIDGE) -+ return interface_bridge_handling(ctx, ifp, zif_type); -+ -+ if (ifp == NULL || -+ !CHECK_FLAG(ifp->status, ZEBRA_INTERFACE_ACTIVE)) { -+ /* Add interface notification from kernel */ -+ if (IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "RTM_NEWLINK ADD for %s(%u) vrf_id %u type %d sl_type %d master %u", -+ name, ifindex, vrf_id, zif_type, -+ zif_slave_type, master_ifindex); -+ -+ if (ifp == NULL) { -+ /* unknown interface */ -+ ifp = if_get_by_name(name, vrf_id, NULL); -+ } else { -+ /* pre-configured interface, learnt now */ -+ if (ifp->vrf->vrf_id != vrf_id) -+ if_update_to_new_vrf(ifp, vrf_id); -+ } -+ -+ /* Update interface information. */ -+ set_ifindex(ifp, ifindex, zns); -+ ifp->flags = flags; -+ ifp->mtu6 = ifp->mtu = mtu; -+ ifp->metric = 0; -+ ifp->speed = kernel_get_speed(ifp, NULL); -+ ifp->ptm_status = ZEBRA_PTM_STATUS_UNKNOWN; -+ -+ /* Set interface type */ -+ zebra_if_set_ziftype(ifp, zif_type, zif_slave_type); -+ if (IS_ZEBRA_IF_VRF(ifp)) -+ SET_FLAG(ifp->status, -+ ZEBRA_INTERFACE_VRF_LOOPBACK); -+ -+ /* Update link. */ -+ zebra_if_update_link(ifp, link_ifindex, link_nsid); -+ -+ /* -+ * Just set the @link/lower-device ifindex. During -+ * nldump interfaces are not ordered in any fashion so -+ * we may end up getting upper devices before lower -+ * devices. We will setup the real linkage once the dump -+ * is complete. -+ */ -+ zif = (struct zebra_if *)ifp->info; -+ zif->link_ifindex = link_ifindex; -+ -+ ifp->ll_type = dplane_ctx_get_ifp_zltype(ctx); -+ interface_update_hw_addr(ctx, ifp); -+ -+ /* Inform clients, install any configured addresses. */ -+ if_add_update(ifp); -+ -+ /* -+ * Extract and save L2 interface information, take -+ * additional actions. -+ */ -+ interface_update_l2info(ctx, ifp, zif_type, 1, -+ link_nsid); -+ if (IS_ZEBRA_IF_BOND(ifp)) -+ zebra_l2if_update_bond(ifp, true); -+ if (IS_ZEBRA_IF_BRIDGE_SLAVE(ifp)) -+ zebra_l2if_update_bridge_slave( -+ ifp, bridge_ifindex, ns_id, -+ ZEBRA_BRIDGE_NO_ACTION); -+ else if (IS_ZEBRA_IF_BOND_SLAVE(ifp)) -+ zebra_l2if_update_bond_slave(ifp, bond_ifindex, -+ !!bypass); -+ -+ if (protodown_set) { -+ interface_if_protodown(ifp, protodown, -+ rc_bitfield); -+ if (startup) -+ if_sweep_protodown(zif); -+ } -+ -+ if (IS_ZEBRA_IF_BRIDGE(ifp)) { -+ if (IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "RTM_NEWLINK ADD for %s(%u), vlan-aware %d", -+ name, ifp->ifindex, -+ IS_ZEBRA_IF_BRIDGE_VLAN_AWARE( -+ zif)); -+ } -+ } else if (ifp->vrf->vrf_id != vrf_id) { -+ /* VRF change for an interface. */ -+ if (IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "RTM_NEWLINK vrf-change for %s(%u) vrf_id %u -> %u", -+ name, ifp->ifindex, ifp->vrf->vrf_id, -+ vrf_id); -+ -+ if_handle_vrf_change(ifp, vrf_id); -+ } else { -+ bool was_bridge_slave, was_bond_slave; -+ uint8_t chgflags = ZEBRA_BRIDGE_NO_ACTION; -+ -+ zif = ifp->info; -+ -+ /* Interface update. */ -+ if (IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "RTM_NEWLINK update for %s(%u) sl_type %d master %u", -+ name, ifp->ifindex, zif_slave_type, -+ master_ifindex); -+ -+ set_ifindex(ifp, ifindex, zns); -+ ifp->mtu6 = ifp->mtu = mtu; -+ ifp->metric = 0; -+ -+ /* -+ * Update interface type - NOTE: Only slave_type can -+ * change. -+ */ -+ was_bridge_slave = IS_ZEBRA_IF_BRIDGE_SLAVE(ifp); -+ was_bond_slave = IS_ZEBRA_IF_BOND_SLAVE(ifp); -+ zebra_if_set_ziftype(ifp, zif_type, zif_slave_type); -+ -+ memcpy(old_hw_addr, ifp->hw_addr, INTERFACE_HWADDR_MAX); -+ -+ /* Update link. */ -+ zebra_if_update_link(ifp, link_ifindex, link_nsid); -+ -+ ifp->ll_type = dplane_ctx_get_ifp_zltype(ctx); -+ interface_update_hw_addr(ctx, ifp); -+ -+ if (protodown_set) -+ interface_if_protodown(ifp, protodown, -+ rc_bitfield); -+ -+ if (if_is_no_ptm_operative(ifp)) { -+ bool is_up = if_is_operative(ifp); -+ -+ ifp->flags = flags; -+ if (!if_is_no_ptm_operative(ifp) || -+ CHECK_FLAG(zif->flags, -+ ZIF_FLAG_PROTODOWN)) { -+ if (IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "Intf %s(%u) has gone DOWN", -+ name, ifp->ifindex); -+ if_down(ifp); -+ rib_update(RIB_UPDATE_KERNEL); -+ } else if (if_is_operative(ifp)) { -+ bool mac_updated = false; -+ -+ /* -+ * Must notify client daemons of new -+ * interface status. -+ */ -+ if (IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "Intf %s(%u) PTM up, notifying clients", -+ name, ifp->ifindex); -+ if_up(ifp, !is_up); -+ -+ /* -+ * Update EVPN VNI when SVI MAC change -+ */ -+ if (memcmp(old_hw_addr, ifp->hw_addr, -+ INTERFACE_HWADDR_MAX)) -+ mac_updated = true; -+ if (IS_ZEBRA_IF_VLAN(ifp) && -+ mac_updated) { -+ struct interface *link_if; -+ -+ link_if = if_lookup_by_index_per_ns( -+ zebra_ns_lookup( -+ NS_DEFAULT), -+ link_ifindex); -+ if (link_if) -+ zebra_vxlan_svi_up( -+ ifp, link_if); -+ } else if (mac_updated && -+ IS_ZEBRA_IF_BRIDGE(ifp)) { -+ zlog_debug( -+ "Intf %s(%u) bridge changed MAC address", -+ name, ifp->ifindex); -+ chgflags = -+ ZEBRA_BRIDGE_MASTER_MAC_CHANGE; -+ } -+ } -+ } else { -+ ifp->flags = flags; -+ if (if_is_operative(ifp) && -+ !CHECK_FLAG(zif->flags, -+ ZIF_FLAG_PROTODOWN)) { -+ if (IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "Intf %s(%u) has come UP", -+ name, ifp->ifindex); -+ if_up(ifp, true); -+ if (IS_ZEBRA_IF_BRIDGE(ifp)) -+ chgflags = -+ ZEBRA_BRIDGE_MASTER_UP; -+ } else { -+ if (IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "Intf %s(%u) has gone DOWN", -+ name, ifp->ifindex); -+ if_down(ifp); -+ rib_update(RIB_UPDATE_KERNEL); -+ } -+ } -+ -+ /* -+ * Extract and save L2 interface information, take -+ * additional actions. -+ */ -+ interface_update_l2info(ctx, ifp, zif_type, 0, -+ link_nsid); -+ if (IS_ZEBRA_IF_BRIDGE(ifp)) -+ zebra_l2if_update_bridge(ifp, chgflags); -+ if (IS_ZEBRA_IF_BOND(ifp)) -+ zebra_l2if_update_bond(ifp, true); -+ if (IS_ZEBRA_IF_BRIDGE_SLAVE(ifp) || was_bridge_slave) -+ zebra_l2if_update_bridge_slave( -+ ifp, bridge_ifindex, ns_id, chgflags); -+ else if (IS_ZEBRA_IF_BOND_SLAVE(ifp) || was_bond_slave) -+ zebra_l2if_update_bond_slave(ifp, bond_ifindex, -+ !!bypass); -+ if (IS_ZEBRA_IF_BRIDGE(ifp)) { -+ if (IS_ZEBRA_DEBUG_KERNEL) -+ zlog_debug( -+ "RTM_NEWLINK update for %s(%u), vlan-aware %d", -+ name, ifp->ifindex, -+ IS_ZEBRA_IF_BRIDGE_VLAN_AWARE( -+ zif)); -+ } -+ } -+ -+ zif = ifp->info; -+ if (zif) { -+ XFREE(MTYPE_ZIF_DESC, zif->desc); -+ if (desc[0]) -+ zif->desc = XSTRDUP(MTYPE_ZIF_DESC, desc); -+ } -+ } -+} -+ - void zebra_if_dplane_result(struct zebra_dplane_ctx *ctx) - { - struct zebra_ns *zns; -@@ -1514,17 +2204,6 @@ void zebra_if_dplane_result(struct zebra_dplane_ctx *ctx) - } - - ifp = if_lookup_by_index_per_ns(zns, ifindex); -- if (ifp == NULL) { -- if (op != DPLANE_OP_INTF_NETCONFIG || -- (ifindex != -1 && ifindex != -2)) { -- if (IS_ZEBRA_DEBUG_KERNEL) -- zlog_debug( -- "%s: can't find ifp at nsid %u index %d", -- __func__, ns_id, ifindex); -- -- return; -- } -- } - - switch (op) { - case DPLANE_OP_INTF_ADDR_ADD: -@@ -1535,7 +2214,15 @@ void zebra_if_dplane_result(struct zebra_dplane_ctx *ctx) - case DPLANE_OP_INTF_INSTALL: - case DPLANE_OP_INTF_UPDATE: - case DPLANE_OP_INTF_DELETE: -- zebra_if_update_ctx(ctx, ifp); -+ /* -+ * Queued from the dplane means it is something -+ * that we need to handle( create/delete the -+ * interface as needed ) -+ */ -+ if (dp_res == ZEBRA_DPLANE_REQUEST_QUEUED) -+ zebra_if_dplane_ifp_handling(ctx); -+ else -+ zebra_if_update_ctx(ctx, ifp); - break; - - case DPLANE_OP_INTF_NETCONFIG: -diff --git a/zebra/kernel_netlink.c b/zebra/kernel_netlink.c -index 4cd84cada2..3756a4ab0c 100644 ---- a/zebra/kernel_netlink.c -+++ b/zebra/kernel_netlink.c -@@ -410,7 +410,7 @@ static int netlink_information_fetch(struct nlmsghdr *h, ns_id_t ns_id, - case RTM_NEWLINK: - return netlink_link_change(h, ns_id, startup); - case RTM_DELLINK: -- return netlink_link_change(h, ns_id, startup); -+ return 0; - case RTM_NEWNEIGH: - case RTM_DELNEIGH: - case RTM_GETNEIGH: -@@ -482,6 +482,7 @@ static int dplane_netlink_information_fetch(struct nlmsghdr *h, ns_id_t ns_id, - - case RTM_NEWLINK: - case RTM_DELLINK: -+ return netlink_link_change(h, ns_id, startup); - - default: - break; -@@ -1170,7 +1171,6 @@ int netlink_parse_info(int (*filter)(struct nlmsghdr *, ns_id_t, int), - h->nlmsg_type, h->nlmsg_len, - h->nlmsg_seq, h->nlmsg_pid); - -- - /* - * Ignore messages that maybe sent from - * other actors besides the kernel -@@ -1774,17 +1774,11 @@ void kernel_init(struct zebra_ns *zns) - * lead to confusion, so we need to convert the - * RTNLGRP_XXX to a bit position for ourself - */ -- groups = RTMGRP_LINK | -- RTMGRP_IPV4_ROUTE | -- RTMGRP_IPV4_IFADDR | -- RTMGRP_IPV6_ROUTE | -- RTMGRP_IPV6_IFADDR | -- RTMGRP_IPV4_MROUTE | -- RTMGRP_NEIGH | -- ((uint32_t) 1 << (RTNLGRP_IPV4_RULE - 1)) | -- ((uint32_t) 1 << (RTNLGRP_IPV6_RULE - 1)) | -- ((uint32_t) 1 << (RTNLGRP_NEXTHOP - 1)) | -- ((uint32_t) 1 << (RTNLGRP_TC - 1)); -+ groups = RTMGRP_IPV4_ROUTE | RTMGRP_IPV6_ROUTE | RTMGRP_IPV4_MROUTE | -+ RTMGRP_NEIGH | ((uint32_t)1 << (RTNLGRP_IPV4_RULE - 1)) | -+ ((uint32_t)1 << (RTNLGRP_IPV6_RULE - 1)) | -+ ((uint32_t)1 << (RTNLGRP_NEXTHOP - 1)) | -+ ((uint32_t)1 << (RTNLGRP_TC - 1)); - - dplane_groups = (RTMGRP_LINK | - RTMGRP_IPV4_IFADDR | -diff --git a/zebra/kernel_socket.c b/zebra/kernel_socket.c -index f3462b9f22..98553edae6 100644 ---- a/zebra/kernel_socket.c -+++ b/zebra/kernel_socket.c -@@ -1482,6 +1482,14 @@ static void routing_socket(struct zebra_ns *zns) - thread_add_read(zrouter.master, kernel_read, NULL, routing_sock, NULL); - } - -+void interface_list_second(struct zebra_ns *zns) -+{ -+} -+ -+void interface_list_tunneldump(struct zebra_ns *zns) -+{ -+} -+ - /* Exported interface function. This function simply calls - routing_socket (). */ - void kernel_init(struct zebra_ns *zns) -diff --git a/zebra/rt.h b/zebra/rt.h -index 6f4dd48a54..3e91cdfffa 100644 ---- a/zebra/rt.h -+++ b/zebra/rt.h -@@ -99,6 +99,8 @@ extern int kernel_get_ipmr_sg_stats(struct zebra_vrf *zvrf, void *mroute); - * state. - */ - extern void interface_list(struct zebra_ns *zns); -+extern void interface_list_tunneldump(struct zebra_ns *zns); -+extern void interface_list_second(struct zebra_ns *zns); - extern void kernel_init(struct zebra_ns *zns); - extern void kernel_terminate(struct zebra_ns *zns, bool complete); - extern void macfdb_read(struct zebra_ns *zns); -diff --git a/zebra/rule_netlink.c b/zebra/rule_netlink.c -index 135f065428..4cc4281c1e 100644 ---- a/zebra/rule_netlink.c -+++ b/zebra/rule_netlink.c -@@ -416,6 +416,7 @@ int netlink_rules_read(struct zebra_ns *zns) - - ret = netlink_parse_info(netlink_rule_change, &zns->netlink_cmd, - &dp_info, 0, true); -+ - return ret; - } - -diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h -index c10482ed96..9f9496c8f4 100644 ---- a/zebra/zebra_dplane.h -+++ b/zebra/zebra_dplane.h -@@ -422,6 +422,19 @@ uint8_t dplane_ctx_get_ifp_family(const struct zebra_dplane_ctx *ctx); - struct zebra_vxlan_vni_array; - void dplane_ctx_set_ifp_vxlan_vni_array(struct zebra_dplane_ctx *ctx, - struct zebra_vxlan_vni_array *vniarray); -+ -+/* -+ * These defines mirror the values for bridge values in linux -+ * at this point since we only have a linux implementation -+ * we don't need to do any type of translation. Let's just -+ * pass these through and use them -+ */ -+#define DPLANE_BRIDGE_VLAN_INFO_PVID \ -+ (1 << 1) /* VLAN is PVID, ingress untagged */ -+#define DPLANE_BRIDGE_VLAN_INFO_RANGE_BEGIN \ -+ (1 << 3) /* VLAN is start of vlan range */ -+#define DPLANE_BRIDGE_VLAN_INFO_RANGE_END \ -+ (1 << 4) /* VLAN is end of vlan range */ - const struct zebra_vxlan_vni_array * - dplane_ctx_get_ifp_vxlan_vni_array(const struct zebra_dplane_ctx *ctx); - struct zebra_dplane_bridge_vlan_info { -diff --git a/zebra/zebra_l2.c b/zebra/zebra_l2.c -index 07bbc6e3bc..4ad262a21d 100644 ---- a/zebra/zebra_l2.c -+++ b/zebra/zebra_l2.c -@@ -258,7 +258,7 @@ void zebra_l2if_update_bond(struct interface *ifp, bool add) - * map slaves (if any) to the bridge. - */ - void zebra_l2_bridge_add_update(struct interface *ifp, -- struct zebra_l2info_bridge *bridge_info) -+ const struct zebra_l2info_bridge *bridge_info) - { - struct zebra_if *zif; - -@@ -293,7 +293,7 @@ void zebra_l2if_update_bridge(struct interface *ifp, uint8_t chgflags) - * VLAN Id and this cannot change. - */ - void zebra_l2_vlanif_update(struct interface *ifp, -- struct zebra_l2info_vlan *vlan_info) -+ const struct zebra_l2info_vlan *vlan_info) - { - struct zebra_if *zif; - -@@ -310,7 +310,7 @@ void zebra_l2_vlanif_update(struct interface *ifp, - * clients about GRE information. - */ - void zebra_l2_greif_add_update(struct interface *ifp, -- struct zebra_l2info_gre *gre_info, int add) -+ const struct zebra_l2info_gre *gre_info, int add) - { - struct zebra_if *zif; - struct in_addr old_vtep_ip; -@@ -337,7 +337,8 @@ void zebra_l2_greif_add_update(struct interface *ifp, - * IP and VLAN mapping, but the latter is handled separately. - */ - void zebra_l2_vxlanif_add_update(struct interface *ifp, -- struct zebra_l2info_vxlan *vxlan_info, int add) -+ const struct zebra_l2info_vxlan *vxlan_info, -+ int add) - { - struct zebra_if *zif; - struct in_addr old_vtep_ip; -diff --git a/zebra/zebra_l2.h b/zebra/zebra_l2.h -index 8fef008f52..e3c5544f8f 100644 ---- a/zebra/zebra_l2.h -+++ b/zebra/zebra_l2.h -@@ -71,6 +71,18 @@ struct zebra_l2info_gre { - ns_id_t link_nsid; - }; - -+struct zebra_vxlan_vni { -+ vni_t vni; /* VNI */ -+ vlanid_t access_vlan; /* Access VLAN - for VLAN-aware bridge. */ -+ struct in_addr mcast_grp; -+ uint16_t flags; -+}; -+ -+struct zebra_vxlan_vni_array { -+ uint16_t count; -+ struct zebra_vxlan_vni vnis[0]; -+}; -+ - /* zebra L2 interface information - VXLAN interface */ - struct zebra_l2info_vxlan { - vni_t vni; /* VNI */ -@@ -108,17 +120,19 @@ extern void zebra_l2_map_slave_to_bridge(struct zebra_l2info_brslave *br_slave, - struct zebra_ns *zns); - extern void - zebra_l2_unmap_slave_from_bridge(struct zebra_l2info_brslave *br_slave); --extern void zebra_l2_bridge_add_update(struct interface *ifp, -- struct zebra_l2info_bridge *bridge_info); -+extern void -+zebra_l2_bridge_add_update(struct interface *ifp, -+ const struct zebra_l2info_bridge *bridge_info); - extern void zebra_l2_bridge_del(struct interface *ifp); - extern void zebra_l2_vlanif_update(struct interface *ifp, -- struct zebra_l2info_vlan *vlan_info); -+ const struct zebra_l2info_vlan *vlan_info); - extern void zebra_l2_greif_add_update(struct interface *ifp, -- struct zebra_l2info_gre *vxlan_info, -+ const struct zebra_l2info_gre *vxlan_info, - int add); --extern void zebra_l2_vxlanif_add_update(struct interface *ifp, -- struct zebra_l2info_vxlan *vxlan_info, -- int add); -+extern void -+zebra_l2_vxlanif_add_update(struct interface *ifp, -+ const struct zebra_l2info_vxlan *vxlan_info, -+ int add); - extern void zebra_l2_vxlanif_update_access_vlan(struct interface *ifp, - vlanid_t access_vlan); - extern void zebra_l2_greif_del(struct interface *ifp); -diff --git a/zebra/zebra_ns.c b/zebra/zebra_ns.c -index 7b076b8a4a..4714cdbff8 100644 ---- a/zebra/zebra_ns.c -+++ b/zebra/zebra_ns.c -@@ -38,6 +38,7 @@ - #include "rib.h" - #include "table_manager.h" - #include "zebra_errors.h" -+#include "zebra_dplane.h" - - extern struct zebra_privs_t zserv_privs; - -@@ -116,6 +117,35 @@ int zebra_ns_disabled(struct ns *ns) - return zebra_ns_disable_internal(zns, true); - } - -+void zebra_ns_startup_continue(struct zebra_dplane_ctx *ctx) -+{ -+ struct zebra_ns *zns = zebra_ns_lookup(dplane_ctx_get_ns_id(ctx)); -+ enum zebra_dplane_startup_notifications spot; -+ -+ if (!zns) { -+ zlog_err("%s: No Namespace associated with %u", __func__, -+ dplane_ctx_get_ns_id(ctx)); -+ return; -+ } -+ -+ spot = dplane_ctx_get_startup_spot(ctx); -+ -+ switch (spot) { -+ case ZEBRA_DPLANE_INTERFACES_READ: -+ interface_list_tunneldump(zns); -+ break; -+ case ZEBRA_DPLANE_TUNNELS_READ: -+ interface_list_second(zns); -+ break; -+ case ZEBRA_DPLANE_ADDRESSES_READ: -+ route_read(zns); -+ -+ kernel_read_pbr_rules(zns); -+ kernel_read_tc_qdisc(zns); -+ break; -+ } -+} -+ - /* Do global enable actions - open sockets, read kernel config etc. */ - int zebra_ns_enable(ns_id_t ns_id, void **info) - { -@@ -126,9 +156,6 @@ int zebra_ns_enable(ns_id_t ns_id, void **info) - kernel_init(zns); - zebra_dplane_ns_enable(zns, true); - interface_list(zns); -- route_read(zns); -- kernel_read_pbr_rules(zns); -- kernel_read_tc_qdisc(zns); - - return 0; - } -diff --git a/zebra/zebra_ns.h b/zebra/zebra_ns.h -index 7a0ffbc1ee..3d7d96c83f 100644 ---- a/zebra/zebra_ns.h -+++ b/zebra/zebra_ns.h -@@ -83,6 +83,8 @@ int zebra_ns_final_shutdown(struct ns *ns, - void **param_out __attribute__((unused))); - int zebra_ns_config_write(struct vty *vty, struct ns *ns); - -+void zebra_ns_startup_continue(struct zebra_dplane_ctx *ctx); -+ - #ifdef __cplusplus - } - #endif -diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c -index 201fc761ae..fd6df441c6 100644 ---- a/zebra/zebra_rib.c -+++ b/zebra/zebra_rib.c -@@ -4770,7 +4770,9 @@ static void rib_process_dplane_results(struct thread *thread) - case DPLANE_OP_NEIGH_TABLE_UPDATE: - case DPLANE_OP_GRE_SET: - case DPLANE_OP_NONE: -+ break; - case DPLANE_OP_STARTUP_STAGE: -+ zebra_ns_startup_continue(ctx); - break; - - } /* Dispatch by op code */ --- -2.17.1 - diff --git a/src/sonic-frr/patch/0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch b/src/sonic-frr/patch/0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch deleted file mode 100644 index 834ef899e72..00000000000 --- a/src/sonic-frr/patch/0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 4aa1aace3e32039b668c04cd682b01e0397144ea Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=E6=81=AD=E7=AE=80?= -Date: Wed, 26 Jul 2023 09:51:51 +0800 -Subject: [PATCH] zebra: remove duplicated nexthops when sending fpm msg -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -When zebra send msg to fpm client, it doesn't handle duplicated nexthops especially, which means if zebra has a route with NUM1 recursive nexthops, each resolved to the same NUM2 connected nexthops, it will send to fpm client a route with NUM1*NUM2 nexthops. But actually there are only NUM2 useful nexthops, the left NUM1*NUM2-NUM2 nexthops are all duplicated nexthops. By the way, zebra has duplicated nexthop remove logic when sending msg to kernel. -Add duplicated nexthop remove logic to zebra when sending msg to fpm client. - -Signed-off-by: 恭简 - ---- - zebra/zebra_fpm_netlink.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/zebra/zebra_fpm_netlink.c b/zebra/zebra_fpm_netlink.c -index 06c45578a..231047143 100644 ---- a/zebra/zebra_fpm_netlink.c -+++ b/zebra/zebra_fpm_netlink.c -@@ -305,6 +305,8 @@ static int netlink_route_info_fill(struct netlink_route_info *ri, int cmd, - - if (CHECK_FLAG(nexthop->flags, NEXTHOP_FLAG_RECURSIVE)) - continue; -+ if (CHECK_FLAG(nexthop->flags, NEXTHOP_FLAG_DUPLICATE)) -+ continue; - - if (nexthop->type == NEXTHOP_TYPE_BLACKHOLE) { - switch (nexthop->bh_type) { diff --git a/src/sonic-frr/patch/0020-zebra-Fix-non-notification-of-better-admin-won.patch b/src/sonic-frr/patch/0020-zebra-Fix-non-notification-of-better-admin-won.patch deleted file mode 100644 index 324242a4877..00000000000 --- a/src/sonic-frr/patch/0020-zebra-Fix-non-notification-of-better-admin-won.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 9513d3a158e493623a6bc1e5e3e44b6ed277ac28 Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Tue, 14 Nov 2023 10:15:42 -0500 -Subject: [PATCH] zebra: Fix non-notification of better admin won - -If there happens to be a entry in the zebra rib -that has a lower admin distance then a newly received -re, zebra would not notify the upper level protocol -about this happening. Imagine a case where there -is a connected route for say a /32 and bgp receives -a route from a peer that is the same route as the -connected. Since BGP has no network statement and -perceives the route as being `good` bgp will install -the route into zebra. Zebra will look at the new -bgp re and correctly identify that the re is not -something that it will use and do nothing. This -change notices this and sends up a BETTER_ADMIN_WON -route notification. - -Signed-off-by: Donald Sharp - -diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c -index 2c3bb28d6..d37fe98f8 100644 ---- a/zebra/zebra_rib.c -+++ b/zebra/zebra_rib.c -@@ -1227,6 +1227,7 @@ static void rib_process(struct route_node *rn) - rib_dest_t *dest; - struct zebra_vrf *zvrf = NULL; - struct vrf *vrf; -+ struct route_entry *proto_re_changed = NULL; - - vrf_id_t vrf_id = VRF_UNKNOWN; - -@@ -1296,6 +1297,7 @@ static void rib_process(struct route_node *rn) - * skip it. - */ - if (CHECK_FLAG(re->status, ROUTE_ENTRY_CHANGED)) { -+ proto_re_changed = re; - if (!nexthop_active_update(rn, re)) { - const struct prefix *p; - struct rib_table_info *info; -@@ -1381,6 +1383,8 @@ static void rib_process(struct route_node *rn) - * new_selected --- RE entry that is newly SELECTED - * old_fib --- RE entry currently in kernel FIB - * new_fib --- RE entry that is newly to be in kernel FIB -+ * proto_re_changed -- RE that is the last changed entry in the -+ * list of RE's. - * - * new_selected will get SELECTED flag, and is going to be redistributed - * the zclients. new_fib (which can be new_selected) will be installed -@@ -1435,6 +1439,22 @@ static void rib_process(struct route_node *rn) - } - } - -+ /* -+ * If zebra has a new_selected and a proto_re_changed -+ * entry that was not the old selected and the protocol -+ * is different, zebra should notify the upper level -+ * protocol that the sent down entry was not selected -+ */ -+ if (new_selected && proto_re_changed && -+ proto_re_changed != old_selected && -+ new_selected->type != proto_re_changed->type) { -+ struct rib_table_info *info = srcdest_rnode_table_info(rn); -+ -+ zsend_route_notify_owner(rn, proto_re_changed, -+ ZAPI_ROUTE_BETTER_ADMIN_WON, info->afi, -+ info->safi); -+ } -+ - /* Update fib according to selection results */ - if (new_fib && old_fib) - rib_process_update_fib(zvrf, rn, old_fib, new_fib); --- -2.17.1 - diff --git a/src/sonic-frr/patch/0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch b/src/sonic-frr/patch/0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch deleted file mode 100644 index 980f1d87cdf..00000000000 --- a/src/sonic-frr/patch/0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch +++ /dev/null @@ -1,58 +0,0 @@ -From bcb608d988b3de282ff832fd398e95080be8ad86 Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Mon, 11 Dec 2023 13:41:36 -0500 -Subject: [PATCH] zebra: The dplane_fpm_nl return path leaks memory - -The route entry created when using a ctx to pass route -entry data backup to the master pthread in zebra is -being leaked. Prevent this from happening. - -Signed-off-by: Donald Sharp -(cherry picked from commit 7f9c5c7fa2d927033549a806fd9025a9459f22bc) - -diff --git a/zebra/rib.h b/zebra/rib.h -index a02a461e8..2e62148ea 100644 ---- a/zebra/rib.h -+++ b/zebra/rib.h -@@ -352,6 +352,8 @@ extern void _route_entry_dump(const char *func, union prefixconstptr pp, - union prefixconstptr src_pp, - const struct route_entry *re); - -+void zebra_rib_route_entry_free(struct route_entry *re); -+ - struct route_entry * - zebra_rib_route_entry_new(vrf_id_t vrf_id, int type, uint8_t instance, - uint32_t flags, uint32_t nhe_id, uint32_t table_id, -diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c -index 6bdc15592..fc9e8c457 100644 ---- a/zebra/rt_netlink.c -+++ b/zebra/rt_netlink.c -@@ -1001,6 +1001,8 @@ int netlink_route_change_read_unicast_internal(struct nlmsghdr *h, - re, ng, startup, ctx); - if (ng) - nexthop_group_delete(&ng); -+ if (ctx) -+ zebra_rib_route_entry_free(re); - } else { - /* - * I really don't see how this is possible -diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c -index 2b47e229a..1ff3d9854 100644 ---- a/zebra/zebra_rib.c -+++ b/zebra/zebra_rib.c -@@ -4178,6 +4178,12 @@ struct route_entry *zebra_rib_route_entry_new(vrf_id_t vrf_id, int type, - - return re; - } -+ -+void zebra_rib_route_entry_free(struct route_entry *re) -+{ -+ XFREE(MTYPE_RE, re); -+} -+ - /* - * Internal route-add implementation; there are a couple of different public - * signatures. Callers in this path are responsible for the memory they --- -2.17.1 - diff --git a/src/sonic-frr/patch/0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch b/src/sonic-frr/patch/0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch deleted file mode 100644 index ad3da2a0ad2..00000000000 --- a/src/sonic-frr/patch/0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch +++ /dev/null @@ -1,143 +0,0 @@ -From 7e1857bf4315ae01e065fc8bc881338977c1ef87 Mon Sep 17 00:00:00 2001 -From: Edwin Brossette -Date: Fri, 8 Dec 2023 16:02:11 +0100 -Subject: [PATCH] lib: use snmp's large fd sets for agentx - -The maximum number of file descriptors in an fd set is limited by -FD_SETSIZE. This limitation is important because the libc macros -FD_SET(), FD_CLR() and FD_ISSET() will invoke a sigabort if the size of -the fd set given to them is above FD_SETSIZE. - -We ran into such a sigabort with bgpd because snmp can return an fd set -of size higher than FD_SETSIZE when calling snmp_select_info(). An -unfortunate FD_ISSET() call later causes the following abort: - -Received signal 6 at 1701115534 (si_addr 0xb94, PC 0x7ff289a16a7c); aborting... -/lib/x86_64-linux-gnu/libfrr.so.0(zlog_backtrace_sigsafe+0xb3) [0x7ff289d62bba] -/lib/x86_64-linux-gnu/libfrr.so.0(zlog_signal+0x1b4) [0x7ff289d62a1f] -/lib/x86_64-linux-gnu/libfrr.so.0(+0x102860) [0x7ff289da4860] -/lib/x86_64-linux-gnu/libc.so.6(+0x42520) [0x7ff2899c2520] -/lib/x86_64-linux-gnu/libc.so.6(pthread_kill+0x12c) [0x7ff289a16a7c] -/lib/x86_64-linux-gnu/libc.so.6(raise+0x16) [0x7ff2899c2476] -/lib/x86_64-linux-gnu/libc.so.6(abort+0xd3) [0x7ff2899a87f3] -/lib/x86_64-linux-gnu/libc.so.6(+0x896f6) [0x7ff289a096f6] -/lib/x86_64-linux-gnu/libc.so.6(__fortify_fail+0x2a) [0x7ff289ab676a] -/lib/x86_64-linux-gnu/libc.so.6(+0x1350c6) [0x7ff289ab50c6] -/lib/x86_64-linux-gnu/libc.so.6(+0x1366ab) [0x7ff289ab66ab] -/lib/x86_64-linux-gnu/libfrrsnmp.so.0(+0x36f5) [0x7ff2897736f5] -/lib/x86_64-linux-gnu/libfrrsnmp.so.0(+0x3c27) [0x7ff289773c27] -/lib/x86_64-linux-gnu/libfrr.so.0(thread_call+0x1c2) [0x7ff289dbe105] -/lib/x86_64-linux-gnu/libfrr.so.0(frr_run+0x257) [0x7ff289d56e69] -/usr/bin/bgpd(main+0x4f4) [0x560965c40488] -/lib/x86_64-linux-gnu/libc.so.6(+0x29d90) [0x7ff2899a9d90] -/lib/x86_64-linux-gnu/libc.so.6(__libc_start_main+0x80) [0x7ff2899a9e40] -/usr/bin/bgpd(_start+0x25) [0x560965c3e965] -in thread agentx_timeout scheduled from /build/make-pkg/output/_packages/cp-routing/src/lib/agentx.c:122 agentx_events_update() - -Also, the following error is logged by snmp just before the abort: -snmp[err]: Use snmp_sess_select_info2() for processing large file descriptors - -snmp uses a custom struct netsnmp_large_fd_set to work above the limit -imposed by FD_SETSIZE. It is noteworthy that, when calling -snmp_select_info() instead of snmp_select_info2(), snmp uses the same -code working with its custom, large structs, and copy/paste the result -to a regular, libc compatible fd_set. So there should be no downside -working with snmp_select_info2() instead of snmp_select_info(). - -Replace every use of the libc file descriptors sets by snmp's extended -file descriptors sets in agentx to acommodate for the high number of -file descriptors that can come out of snmp. This should prevent the -abort seen above. - -Signed-off-by: Edwin Brossette - -diff --git a/lib/agentx.c b/lib/agentx.c -index 5f6245980..be8277c53 100644 ---- a/lib/agentx.c -+++ b/lib/agentx.c -@@ -25,6 +25,7 @@ - #include - #include - #include -+#include - - #include "command.h" - #include "smux.h" -@@ -58,7 +59,7 @@ static void agentx_timeout(struct thread *t) - - static void agentx_read(struct thread *t) - { -- fd_set fds; -+ netsnmp_large_fd_set lfds; - int flags, new_flags = 0; - int nonblock = false; - struct listnode *ln = THREAD_ARG(t); -@@ -83,9 +84,9 @@ static void agentx_read(struct thread *t) - flog_err(EC_LIB_SYSTEM_CALL, "Failed to set snmp fd non blocking: %s(%d)", - strerror(errno), errno); - -- FD_ZERO(&fds); -- FD_SET(THREAD_FD(t), &fds); -- snmp_read(&fds); -+ netsnmp_large_fd_set_init(&lfds, FD_SETSIZE); -+ netsnmp_large_fd_setfd(t->u.fd, &lfds); -+ snmp_read2(&lfds); - - /* Reset the flag */ - if (!nonblock) { -@@ -100,6 +101,7 @@ static void agentx_read(struct thread *t) - - netsnmp_check_outstanding_agent_requests(); - agentx_events_update(); -+ netsnmp_large_fd_set_cleanup(&lfds); - } - - static void agentx_events_update(void) -@@ -107,15 +109,15 @@ static void agentx_events_update(void) - int maxfd = 0; - int block = 1; - struct timeval timeout = {.tv_sec = 0, .tv_usec = 0}; -- fd_set fds; -+ netsnmp_large_fd_set lfds; - struct listnode *ln; - struct thread **thr; - int fd, thr_fd; - - thread_cancel(&timeout_thr); - -- FD_ZERO(&fds); -- snmp_select_info(&maxfd, &fds, &timeout, &block); -+ netsnmp_large_fd_set_init(&lfds, FD_SETSIZE); -+ snmp_select_info2(&maxfd, &lfds, &timeout, &block); - - if (!block) { - thread_add_timer_tv(agentx_tm, agentx_timeout, NULL, &timeout, -@@ -133,7 +135,7 @@ static void agentx_events_update(void) - /* caught up */ - if (thr_fd == fd) { - struct listnode *nextln = listnextnode(ln); -- if (!FD_ISSET(fd, &fds)) { -+ if (!netsnmp_large_fd_is_set(fd, &lfds)) { - thread_cancel(thr); - XFREE(MTYPE_TMP, thr); - list_delete_node(events, ln); -@@ -143,7 +145,7 @@ static void agentx_events_update(void) - thr_fd = thr ? THREAD_FD(*thr) : -1; - } - /* need listener, but haven't hit one where it would be */ -- else if (FD_ISSET(fd, &fds)) { -+ else if (netsnmp_large_fd_is_set(fd, &lfds)) { - struct listnode *newln; - thr = XCALLOC(MTYPE_TMP, sizeof(struct thread *)); - -@@ -162,6 +164,7 @@ static void agentx_events_update(void) - list_delete_node(events, ln); - ln = nextln; - } -+ netsnmp_large_fd_set_cleanup(&lfds); - } - - /* AgentX node. */ --- -2.17.1 - diff --git a/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch b/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch index f8215e07f0f..99ce9c3e8ca 100644 --- a/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch +++ b/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch @@ -18,378 +18,16 @@ and the system will crash. Signed-off-by: Donald Sharp --- - bgpd/bgp_updgrp_adv.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/bgpd/bgp_updgrp_adv.c b/bgpd/bgp_updgrp_adv.c -index de2b3206b7..dcde4263da 100644 ---- a/bgpd/bgp_updgrp_adv.c -+++ b/bgpd/bgp_updgrp_adv.c -@@ -813,6 +813,7 @@ void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw) - struct bgp *bgp; - struct attr attr; - struct attr *new_attr = &attr; -+ struct aspath *aspath; - struct prefix p; - struct peer *from; - struct bgp_dest *dest; -@@ -850,6 +851,7 @@ void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw) - /* make coverity happy */ - assert(attr.aspath); - -+ aspath = attr.aspath; - attr.med = 0; - attr.flag |= ATTR_FLAG_BIT(BGP_ATTR_MULTI_EXIT_DISC); - -@@ -1005,7 +1007,7 @@ void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw) - } - } - -- aspath_unintern(&attr.aspath); -+ aspath_unintern(&aspath); - } - - /* --- -2.14.1 - - -From 07545c1879775f155f228c81393eed9697b699de Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Sat, 2 Mar 2024 09:42:30 -0500 -Subject: [PATCH 2/3] bgpd: Include unsuppress-map as a valid outgoing policy - -If unsuppress-map is setup for outgoing peers, consider that -policy is being applied as for RFC 8212. - -Signed-off-by: Donald Sharp ---- - bgpd/bgp_route.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c -index 473168d9be..fb14fc7f20 100644 ---- a/bgpd/bgp_route.c -+++ b/bgpd/bgp_route.c -@@ -5816,10 +5816,10 @@ bool bgp_outbound_policy_exists(struct peer *peer, struct bgp_filter *filter) - if (peer->sort == BGP_PEER_IBGP) - return true; - -- if (peer->sort == BGP_PEER_EBGP -- && (ROUTE_MAP_OUT_NAME(filter) || PREFIX_LIST_OUT_NAME(filter) -- || FILTER_LIST_OUT_NAME(filter) -- || DISTRIBUTE_OUT_NAME(filter))) -+ if (peer->sort == BGP_PEER_EBGP && -+ (ROUTE_MAP_OUT_NAME(filter) || PREFIX_LIST_OUT_NAME(filter) || -+ FILTER_LIST_OUT_NAME(filter) || DISTRIBUTE_OUT_NAME(filter) || -+ UNSUPPRESS_MAP_NAME(filter))) - return true; - return false; - } --- -2.14.1 - - -From e3493d5be0156fa9c8c522b818ae6448dbe371f2 Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Sat, 2 Mar 2024 09:50:38 -0500 -Subject: [PATCH 3/3] bgpd: Ensure community data is freed in some cases. - -Customer has this valgrind trace: - -Direct leak of 2829120 byte(s) in 70728 object(s) allocated from: - 0 in community_new ../bgpd/bgp_community.c:39 - 1 in community_uniq_sort ../bgpd/bgp_community.c:170 - 2 in route_set_community ../bgpd/bgp_routemap.c:2342 - 3 in route_map_apply_ext ../lib/routemap.c:2673 - 4 in subgroup_announce_check ../bgpd/bgp_route.c:2367 - 5 in subgroup_process_announce_selected ../bgpd/bgp_route.c:2914 - 6 in group_announce_route_walkcb ../bgpd/bgp_updgrp_adv.c:199 - 7 in hash_walk ../lib/hash.c:285 - 8 in update_group_af_walk ../bgpd/bgp_updgrp.c:2061 - 9 in group_announce_route ../bgpd/bgp_updgrp_adv.c:1059 - 10 in bgp_process_main_one ../bgpd/bgp_route.c:3221 - 11 in bgp_process_wq ../bgpd/bgp_route.c:3221 - 12 in work_queue_run ../lib/workqueue.c:282 - -The above leak detected by valgrind was from a screenshot so I copied it -by hand. Any mistakes in line numbers are purely from my transcription. -Additionally this is against a slightly modified 8.5.1 version of FRR. -Code inspection of 8.5.1 -vs- latest master shows the same problem -exists. Code should be able to be followed from there to here. - -What is happening: - -There is a route-map being applied that modifes the outgoing community -to a peer. This is saved in the attr copy created in -subgroup_process_announce_selected. This community pointer is not -interned. So the community->refcount is still 0. Normally when -a prefix is announced, the attr and the prefix are placed on a -adjency out structure where the attribute is interned. This will -cause the community to be saved in the community hash list as well. -In a non-normal operation when the decision to send is aborted after -the route-map application, the attribute is just dropped and the -pointer to the community is just dropped too, leading to situations -where the memory is leaked. The usage of bgp suppress-fib would -would be a case where the community is caused to be leaked. -Additionally the previous commit where an unsuppress-map is used -to modify the outgoing attribute but since unsuppress-map was -not considered part of outgoing policy the attribute would be dropped as -well. This pointer drop also extends to any dynamically allocated -memory saved by the attribute pointer that was not interned yet as well. - -So let's modify the return case where the decision is made to -not send the prefix to the peer to always just flush the attribute -to ensure memory is not leaked. - -Fixes: #15459 -Signed-off-by: Donald Sharp ---- - bgpd/bgp_conditional_adv.c | 5 ++-- - bgpd/bgp_route.c | 30 +++++++++++++----------- - bgpd/bgp_updgrp.h | 2 +- - bgpd/bgp_updgrp_adv.c | 58 +++++++++++++++++++++++++--------------------- - 4 files changed, 51 insertions(+), 44 deletions(-) - -diff --git a/bgpd/bgp_conditional_adv.c b/bgpd/bgp_conditional_adv.c -index 24d822a745..edb9bc8bb7 100644 ---- a/bgpd/bgp_conditional_adv.c -+++ b/bgpd/bgp_conditional_adv.c -@@ -135,8 +135,9 @@ static void bgp_conditional_adv_routes(struct peer *peer, afi_t afi, - if (update_type == UPDATE_TYPE_ADVERTISE && - subgroup_announce_check(dest, pi, subgrp, dest_p, - &attr, &advmap_attr)) { -- bgp_adj_out_set_subgroup(dest, subgrp, &attr, -- pi); -+ if (!bgp_adj_out_set_subgroup(dest, subgrp, -+ &attr, pi)) -+ bgp_attr_flush(&attr); - } else { - /* If default originate is enabled for - * the peer, do not send explicit diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c -index fb14fc7f20..2976042dda 100644 +index fc776a4fd..a0113c04e 100644 --- a/bgpd/bgp_route.c +++ b/bgpd/bgp_route.c -@@ -2879,7 +2879,7 @@ void subgroup_process_announce_selected(struct update_subgroup *subgrp, - { - const struct prefix *p; - struct peer *onlypeer; -- struct attr attr; -+ struct attr attr = {0}, *pattr = &attr; - afi_t afi; - safi_t safi; - struct bgp *bgp; -@@ -2900,7 +2900,7 @@ void subgroup_process_announce_selected(struct update_subgroup *subgrp, +@@ -3012,7 +3012,7 @@ void subgroup_process_announce_selected(struct update_subgroup *subgrp, PEER_STATUS_ORF_WAIT_REFRESH)) return; - + - memset(&attr, 0, sizeof(attr)); + memset(pattr, 0, sizeof(*pattr)); /* It's initialized in bgp_announce_check() */ - - /* Announcement to the subgroup. If the route is filtered withdraw it. -@@ -2911,32 +2911,34 @@ void subgroup_process_announce_selected(struct update_subgroup *subgrp, - advertise = bgp_check_advertise(bgp, dest); - - if (selected) { -- if (subgroup_announce_check(dest, selected, subgrp, p, &attr, -+ if (subgroup_announce_check(dest, selected, subgrp, p, pattr, - NULL)) { - /* Route is selected, if the route is already installed - * in FIB, then it is advertised - */ - if (advertise) { - if (!bgp_check_withdrawal(bgp, dest)) { -- struct attr *adv_attr = -- bgp_attr_intern(&attr); -- -- bgp_adj_out_set_subgroup(dest, subgrp, -- adv_attr, -- selected); -- } else -+ if (!bgp_adj_out_set_subgroup( -+ dest, subgrp, pattr, -+ selected)) -+ bgp_attr_flush(pattr); -+ } else { - bgp_adj_out_unset_subgroup( - dest, subgrp, 1, addpath_tx_id); -- } -- } else -+ bgp_attr_flush(pattr); -+ } -+ } else -+ bgp_attr_flush(pattr); -+ } else { - bgp_adj_out_unset_subgroup(dest, subgrp, 1, - addpath_tx_id); -+ bgp_attr_flush(pattr); -+ } - } - - /* If selected is NULL we must withdraw the path using addpath_tx_id */ -- else { -+ else - bgp_adj_out_unset_subgroup(dest, subgrp, 1, addpath_tx_id); -- } - } - - /* -diff --git a/bgpd/bgp_updgrp.h b/bgpd/bgp_updgrp.h -index e27c1e7b67..b7b6aa07e9 100644 ---- a/bgpd/bgp_updgrp.h -+++ b/bgpd/bgp_updgrp.h -@@ -458,7 +458,7 @@ extern struct bgp_adj_out *bgp_adj_out_alloc(struct update_subgroup *subgrp, - extern void bgp_adj_out_remove_subgroup(struct bgp_dest *dest, - struct bgp_adj_out *adj, - struct update_subgroup *subgrp); --extern void bgp_adj_out_set_subgroup(struct bgp_dest *dest, -+extern bool bgp_adj_out_set_subgroup(struct bgp_dest *dest, - struct update_subgroup *subgrp, - struct attr *attr, - struct bgp_path_info *path); -diff --git a/bgpd/bgp_updgrp_adv.c b/bgpd/bgp_updgrp_adv.c -index dcde4263da..7902d40bd9 100644 ---- a/bgpd/bgp_updgrp_adv.c -+++ b/bgpd/bgp_updgrp_adv.c -@@ -454,7 +454,7 @@ bgp_advertise_clean_subgroup(struct update_subgroup *subgrp, - return next; - } - --void bgp_adj_out_set_subgroup(struct bgp_dest *dest, -+bool bgp_adj_out_set_subgroup(struct bgp_dest *dest, - struct update_subgroup *subgrp, struct attr *attr, - struct bgp_path_info *path) - { -@@ -474,7 +474,7 @@ void bgp_adj_out_set_subgroup(struct bgp_dest *dest, - bgp = SUBGRP_INST(subgrp); - - if (DISABLE_BGP_ANNOUNCE) -- return; -+ return false; - - /* Look for adjacency information. */ - adj = adj_lookup( -@@ -490,7 +490,7 @@ void bgp_adj_out_set_subgroup(struct bgp_dest *dest, - bgp_addpath_id_for_peer(peer, afi, safi, - &path->tx_addpath)); - if (!adj) -- return; -+ return false; - - subgrp->pscount++; - } -@@ -529,7 +529,7 @@ void bgp_adj_out_set_subgroup(struct bgp_dest *dest, - * will never be able to coalesce the 3rd peer down - */ - subgrp->version = MAX(subgrp->version, dest->version); -- return; -+ return false; - } - - if (adj->adv) -@@ -576,6 +576,8 @@ void bgp_adj_out_set_subgroup(struct bgp_dest *dest, - bgp_adv_fifo_add_tail(&subgrp->sync->update, adv); - - subgrp->version = MAX(subgrp->version, dest->version); -+ -+ return true; - } - - /* The only time 'withdraw' will be false is if we are sending -@@ -668,7 +670,7 @@ void subgroup_announce_table(struct update_subgroup *subgrp, - { - struct bgp_dest *dest; - struct bgp_path_info *ri; -- struct attr attr; -+ struct attr attr = {0}, *pattr = &attr; - struct peer *peer; - afi_t afi; - safi_t safi; -@@ -712,24 +714,25 @@ void subgroup_announce_table(struct update_subgroup *subgrp, - continue; - - if (subgroup_announce_check(dest, ri, subgrp, dest_p, -- &attr, NULL)) { -+ pattr, NULL)) { - /* Check if route can be advertised */ - if (advertise) { - if (!bgp_check_withdrawal(bgp, dest)) { -- struct attr *adv_attr = -- bgp_attr_intern(&attr); -- -- bgp_adj_out_set_subgroup( -- dest, subgrp, adv_attr, -- ri); -- } else -+ if (!bgp_adj_out_set_subgroup( -+ dest, subgrp, pattr, -+ ri)) -+ bgp_attr_flush(pattr); -+ } else { - bgp_adj_out_unset_subgroup( - dest, subgrp, 1, - bgp_addpath_id_for_peer( - peer, afi, - safi_rib, - &ri->tx_addpath)); -- } -+ bgp_attr_flush(pattr); -+ } -+ } else -+ bgp_attr_flush(pattr); - } else { - /* If default originate is enabled for - * the peer, do not send explicit -@@ -748,6 +751,7 @@ void subgroup_announce_table(struct update_subgroup *subgrp, - bgp_addpath_id_for_peer( - peer, afi, safi_rib, - &ri->tx_addpath)); -+ bgp_attr_flush(pattr); - } - } - } -@@ -811,7 +815,7 @@ void subgroup_announce_route(struct update_subgroup *subgrp) - void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw) - { - struct bgp *bgp; -- struct attr attr; -+ struct attr attr = {0}; - struct attr *new_attr = &attr; - struct aspath *aspath; - struct prefix p; -@@ -952,18 +956,18 @@ void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw) - if (dest) { - for (pi = bgp_dest_get_bgp_path_info(dest); pi; - pi = pi->next) { -- if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)) -- if (subgroup_announce_check( -- dest, pi, subgrp, -- bgp_dest_get_prefix(dest), -- &attr, NULL)) { -- struct attr *default_attr = -- bgp_attr_intern(&attr); -- -- bgp_adj_out_set_subgroup( -- dest, subgrp, -- default_attr, pi); -- } -+ if (!CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)) -+ continue; -+ -+ if (subgroup_announce_check( -+ dest, pi, subgrp, -+ bgp_dest_get_prefix(dest), &attr, -+ NULL)) { -+ if (!bgp_adj_out_set_subgroup( -+ dest, subgrp, &attr, pi)) -+ bgp_attr_flush(&attr); -+ } else -+ bgp_attr_flush(&attr); - } - bgp_dest_unlock_node(dest); - } --- -2.14.1 + /* Announcement to the subgroup. If the route is filtered withdraw it. diff --git a/src/sonic-frr/patch/0026-bgp-fib-suppress-announce-fix.patch b/src/sonic-frr/patch/0026-bgp-fib-suppress-announce-fix.patch deleted file mode 100644 index a6e9d4d4633..00000000000 --- a/src/sonic-frr/patch/0026-bgp-fib-suppress-announce-fix.patch +++ /dev/null @@ -1,122 +0,0 @@ -From bf292bfd8b4e2d7ba181ce6efde4e43e066d1a88 Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Thu, 28 Mar 2024 12:25:05 -0400 -Subject: [PATCH 1/2] bgpd: Note when receiving but not understanding a route - notification - -When BGP has been asked to wait for FIB installation, on route -removal a return call is likely to not have the dest since BGP -will have cleaned up the node, entirely. Let's just note that -the prefix cannot be found if debugs are turned on and move on. - -Signed-off-by: Donald Sharp ---- - bgpd/bgp_zebra.c | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - -diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c -index efcf497850..ff79746b4c 100644 ---- a/bgpd/bgp_zebra.c -+++ b/bgpd/bgp_zebra.c -@@ -2610,8 +2610,12 @@ static int bgp_zebra_route_notify_owner(int command, struct zclient *zclient, - /* Find the bgp route node */ - dest = bgp_afi_node_lookup(bgp->rib[afi][safi], afi, safi, &p, - &bgp->vrf_prd); -- if (!dest) -+ if (!dest) { -+ if (BGP_DEBUG(zebra, ZEBRA)) -+ zlog_debug("%s: %pFX does not exist in the BGP table, nothing to do for %u", -+ __func__, &p, note); - return -1; -+ } - - switch (note) { - case ZAPI_ROUTE_INSTALLED: --- -2.17.1 - - -From ada2e1099373e69e0eb29f4b1f3ba79c0cacf75a Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Thu, 28 Mar 2024 12:27:38 -0400 -Subject: [PATCH 2/2] bgpd: Arrange peer notification to after zebra announce - -Currently BGP attempts to send route change information -to it's peers *before* the route is installed into zebra. -This creates a bug in suppress-fib-pending in the following -scenario: - -a) bgp suppress-fib-pending and bgp has a route with -2 way ecmp. -b) bgp receives a route withdraw from peer 1. BGP -will send the route to zebra and mark the route as -FIB_INSTALL_PENDING. -c) bgp receives a route withdraw from peer 2. BGP -will see the route has the FIB_INSTALL_PENDING and -not send the withdrawal of the route to the peer. -bgp will then send the route deletion to zebra and -clean up the bgp_path_info's. - -At this point BGP is stuck where it has not sent -a route withdrawal to downstream peers. - -Let's modify the code in bgp_process_main_one to -send the route notification to zebra first before -attempting to announce the route. The route withdrawal -will remove the FIB_INSTALL_PENDING flag from the dest -and this will allow group_announce_route to believe -it can send the route withdrawal. - -For the master branch this is ok because the recent -backpressure commits are in place and nothing is going -to change from an ordering perspective in that regards. -Ostensibly this fix is also for operators of Sonic and -will be backported to the 8.5 branch as well. This will -change the order of the send to peers to be after the -zebra installation but sonic users are using suppress-fib-pending -anyways so updates won't go out until rib ack has been -received anyways. - -Signed-off-by: Donald Sharp ---- - bgpd/bgp_route.c | 17 +++++++++-------- - 1 file changed, 9 insertions(+), 8 deletions(-) - -diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c -index 2976042dda..fbff57634a 100644 ---- a/bgpd/bgp_route.c -+++ b/bgpd/bgp_route.c -@@ -3297,14 +3297,6 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, - } - #endif - -- group_announce_route(bgp, afi, safi, dest, new_select); -- -- /* unicast routes must also be annouced to labeled-unicast update-groups -- */ -- if (safi == SAFI_UNICAST) -- group_announce_route(bgp, afi, SAFI_LABELED_UNICAST, dest, -- new_select); -- - /* FIB update. */ - if (bgp_fibupd_safi(safi) && (bgp->inst_type != BGP_INSTANCE_TYPE_VIEW) - && !bgp_option_check(BGP_OPT_NO_FIB)) { -@@ -3334,6 +3326,15 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, - } - } - -+ group_announce_route(bgp, afi, safi, dest, new_select); -+ -+ /* unicast routes must also be annouced to labeled-unicast update-groups -+ */ -+ if (safi == SAFI_UNICAST) -+ group_announce_route(bgp, afi, SAFI_LABELED_UNICAST, dest, -+ new_select); -+ -+ - bgp_process_evpn_route_injection(bgp, afi, safi, dest, new_select, - old_select); - --- -2.17.1 - diff --git a/src/sonic-frr/patch/0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch b/src/sonic-frr/patch/0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch deleted file mode 100644 index fd9ec4608df..00000000000 --- a/src/sonic-frr/patch/0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 37204cdc64999f8215deb99d4a5aa1a4222389af Mon Sep 17 00:00:00 2001 -From: Donatas Abraitis -Date: Thu, 15 Feb 2024 12:07:43 +0200 -Subject: [PATCH] lib: Do not convert EVPN prefixes into IPv4/IPv6 if not - needed - -Convert only when this is really needed, e.g. `match ip address prefix-list ...`. - -Otherwise, we can't have mixed match clauses, like: - -``` -match ip address prefix-list p1 -match evpn route-type prefix -``` - -This won't work, because the prefix is already converted, and we can't extract -route type, vni, etc. from the original EVPN prefix. - -Signed-off-by: Donatas Abraitis -(cherry picked from commit 439b739495e86912c8b9ec36b84e55311c549ba0) - -diff --git a/lib/routemap.c b/lib/routemap.c -index 683943eb6d..ed7c4ed72c 100644 ---- a/lib/routemap.c -+++ b/lib/routemap.c -@@ -2553,7 +2553,6 @@ route_map_result_t route_map_apply_ext(struct route_map *map, - struct route_map_index *index = NULL; - struct route_map_rule *set = NULL; - bool skip_match_clause = false; -- struct prefix conv; - - if (recursion > RMAP_RECURSION_LIMIT) { - flog_warn( -@@ -2571,27 +2570,14 @@ route_map_result_t route_map_apply_ext(struct route_map *map, - - map->applied++; - -- /* -- * Handling for matching evpn_routes in the prefix table. -- * -- * We convert type2/5 prefix to ipv4/6 prefix to do longest -- * prefix matching on. -- */ - if (prefix->family == AF_EVPN) { -- if (evpn_prefix2prefix(prefix, &conv) != 0) { -- zlog_debug( -- "Unable to convert EVPN prefix %pFX into IPv4/IPv6 prefix. Falling back to non-optimized route-map lookup", -- prefix); -- } else { -- zlog_debug( -- "Converted EVPN prefix %pFX into %pFX for optimized route-map lookup", -- prefix, &conv); -- -- prefix = &conv; -- } -+ index = map->head; -+ } else { -+ skip_match_clause = true; -+ index = route_map_get_index(map, prefix, match_object, -+ &match_ret); - } - -- index = route_map_get_index(map, prefix, match_object, &match_ret); - if (index) { - index->applied++; - if (rmap_debug) -@@ -2615,7 +2601,6 @@ route_map_result_t route_map_apply_ext(struct route_map *map, - ret = RMAP_DENYMATCH; - goto route_map_apply_end; - } -- skip_match_clause = true; - - for (; index; index = index->next) { - if (!skip_match_clause) { --- -2.17.1 - diff --git a/src/sonic-frr/patch/0029-zebra-nhg-fix-on-intf-up.patch b/src/sonic-frr/patch/0029-zebra-nhg-fix-on-intf-up.patch deleted file mode 100644 index 64e8ac5d571..00000000000 --- a/src/sonic-frr/patch/0029-zebra-nhg-fix-on-intf-up.patch +++ /dev/null @@ -1,338 +0,0 @@ -From 4a58bc9e856c4ca953474548d61f06aad2fdf45b Mon Sep 17 00:00:00 2001 -From: Ashwini Reddy -Date: Wed, 19 Apr 2023 11:35:25 -0700 -Subject: [PATCH 1/3] zebra: re-install nhg on interface up - -Intermittently zebra and kernel are out of sync -when interface flaps and the add's/dels are in -same processing queue and zebra assumes no change in nexthop. -Hence we need to bring in a reinstall to kernel -of the nexthops and routes to sync their states. - -Upon interface flap kernel would have deleted NHGs -associated to a interface (the one flapped), -zebra retains NHGs for 3 mins even though upper -layer protocol removes the nexthops (associated NHG). -As part of interface address add , -re-add singleton NHGs associated to interface. - -Ticket: #3173663 -Issue: 3173663 - -Signed-off-by: Ashwini Reddy -Signed-off-by: Chirag Shah ---- - lib/nexthop.c | 9 +++++++++ - lib/nexthop.h | 3 +++ - zebra/redistribute.c | 4 ++++ - zebra/zebra_nhg.c | 46 ++++++++++++++++++++++++++++++++++++++++++++ - zebra/zebra_nhg.h | 1 + - 5 files changed, 63 insertions(+) - -diff --git a/lib/nexthop.c b/lib/nexthop.c -index 52679388fd..e3bdbfb9e8 100644 ---- a/lib/nexthop.c -+++ b/lib/nexthop.c -@@ -1093,3 +1093,12 @@ static ssize_t printfrr_nh(struct fbuf *buf, struct printfrr_eargs *ea, - } - return -1; - } -+ -+bool nexthop_is_ifindex_type(const struct nexthop *nh) -+{ -+ if (nh->type == NEXTHOP_TYPE_IFINDEX || -+ nh->type == NEXTHOP_TYPE_IPV4_IFINDEX || -+ nh->type == NEXTHOP_TYPE_IPV6_IFINDEX) -+ return true; -+ return false; -+} -diff --git a/lib/nexthop.h b/lib/nexthop.h -index f6fb6ec2b7..a52ae02172 100644 ---- a/lib/nexthop.h -+++ b/lib/nexthop.h -@@ -260,6 +260,9 @@ extern struct nexthop *nexthop_dup(const struct nexthop *nexthop, - extern struct nexthop *nexthop_dup_no_recurse(const struct nexthop *nexthop, - struct nexthop *rparent); - -+/* Check nexthop of IFINDEX type */ -+extern bool nexthop_is_ifindex_type(const struct nexthop *nh); -+ - /* - * Parse one or more backup index values, as comma-separated numbers, - * into caller's array of uint8_ts. The array must be NEXTHOP_MAX_BACKUPS -diff --git a/zebra/redistribute.c b/zebra/redistribute.c -index 4a8fe938ed..fccbee7d85 100644 ---- a/zebra/redistribute.c -+++ b/zebra/redistribute.c -@@ -561,6 +561,10 @@ void zebra_interface_address_add_update(struct interface *ifp, - client, ifp, ifc); - } - } -+ /* interface associated NHGs may have been deleted, -+ * re-sync zebra -> dplane NHGs -+ */ -+ zebra_interface_nhg_reinstall(ifp); - } - - /* Interface address deletion. */ -diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c -index 54c66fbf18..753efef7f8 100644 ---- a/zebra/zebra_nhg.c -+++ b/zebra/zebra_nhg.c -@@ -3003,6 +3003,12 @@ void zebra_nhg_install_kernel(struct nhg_hash_entry *nhe) - /* Resolve it first */ - nhe = zebra_nhg_resolve(nhe); - -+ if (zebra_nhg_set_valid_if_active(nhe)) { -+ if (IS_ZEBRA_DEBUG_NHG_DETAIL) -+ zlog_debug("%s: valid flag set for nh %pNG", __func__, -+ nhe); -+ } -+ - /* Make sure all depends are installed/queued */ - frr_each(nhg_connected_tree, &nhe->nhg_depends, rb_node_dep) { - zebra_nhg_install_kernel(rb_node_dep->nhe); -@@ -3586,3 +3592,43 @@ static ssize_t printfrr_nhghe(struct fbuf *buf, struct printfrr_eargs *ea, - ret += bputs(buf, "]"); - return ret; - } -+ -+/* -+ * On interface add the nexthop that resolves to this intf needs -+ * a re-install. There are following scenarios when the nexthop group update -+ * gets skipped: -+ * 1. When upper level protocol sends removal of NHG, there is -+ * timer running to keep NHG for 180 seconds, during this interval, same route -+ * with same set of nexthops installation is given , the same NHG is used -+ * but since NHG is not reinstalled on interface address add, it is not aware -+ * in Dplan/Kernel. -+ * 2. Due to a quick port flap due to interface add and delete -+ * to be processed in same queue one after another. Zebra believes that -+ * there is no change in nhg in this case. Hence this re-install will -+ * make sure the nexthop group gets updated to Dplan/Kernel. -+ */ -+void zebra_interface_nhg_reinstall(struct interface *ifp) -+{ -+ struct nhg_connected *rb_node_dep = NULL; -+ struct zebra_if *zif = ifp->info; -+ struct nexthop *nh; -+ -+ if (IS_ZEBRA_DEBUG_NHG_DETAIL) -+ zlog_debug( -+ "%s: Installing interface %s associated NHGs into kernel", -+ __func__, ifp->name); -+ -+ frr_each (nhg_connected_tree, &zif->nhg_dependents, rb_node_dep) { -+ nh = rb_node_dep->nhe->nhg.nexthop; -+ if (zebra_nhg_set_valid_if_active(rb_node_dep->nhe)) { -+ if (IS_ZEBRA_DEBUG_NHG_DETAIL) -+ zlog_debug( -+ "%s: Setting the valid flag for nhe %pNG, interface: %s", -+ __func__, rb_node_dep->nhe, ifp->name); -+ } -+ /* Check for singleton NHG associated to interface */ -+ if (nexthop_is_ifindex_type(nh) && -+ zebra_nhg_depends_is_empty(rb_node_dep->nhe)) -+ zebra_nhg_install_kernel(rb_node_dep->nhe); -+ } -+} -diff --git a/zebra/zebra_nhg.h b/zebra/zebra_nhg.h -index 9b925bf10f..18914b7856 100644 ---- a/zebra/zebra_nhg.h -+++ b/zebra/zebra_nhg.h -@@ -374,6 +374,7 @@ extern uint8_t zebra_nhg_nhe2grp(struct nh_grp *grp, struct nhg_hash_entry *nhe, - /* Dataplane install/uninstall */ - extern void zebra_nhg_install_kernel(struct nhg_hash_entry *nhe); - extern void zebra_nhg_uninstall_kernel(struct nhg_hash_entry *nhe); -+extern void zebra_interface_nhg_reinstall(struct interface *ifp); - - /* Forward ref of dplane update context type */ - struct zebra_dplane_ctx; --- -2.17.1 - - -From 2b99f5ccf7768eff1393e07db2b77abc104dbbd7 Mon Sep 17 00:00:00 2001 -From: Chirag Shah -Date: Fri, 28 Apr 2023 19:09:55 -0700 -Subject: [PATCH 2/3] zebra:re-install dependent nhgs on interface up - -Upon interface up associated singleton NHG's -dependent NHGs needs to be reinstalled as -kernel would have deleted if there is no route -referencing it. - -Ticket:#3416477 -Issue:3416477 -Testing Done: -flap interfaces which are part of route NHG, -upon interfaces up event, NHGs are resynced -into dplane. - -Signed-off-by: Chirag Shah ---- - zebra/zebra_nhg.c | 43 ++++++++++++++++++++++++++++++++++++++----- - 1 file changed, 38 insertions(+), 5 deletions(-) - -diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c -index 753efef7f8..e5efbf8d5f 100644 ---- a/zebra/zebra_nhg.c -+++ b/zebra/zebra_nhg.c -@@ -1140,13 +1140,23 @@ static void zebra_nhg_handle_uninstall(struct nhg_hash_entry *nhe) - zebra_nhg_free(nhe); - } - --static void zebra_nhg_handle_install(struct nhg_hash_entry *nhe) -+static void zebra_nhg_handle_install(struct nhg_hash_entry *nhe, bool install) - { - /* Update validity of groups depending on it */ - struct nhg_connected *rb_node_dep; - -- frr_each_safe(nhg_connected_tree, &nhe->nhg_dependents, rb_node_dep) -+ frr_each_safe (nhg_connected_tree, &nhe->nhg_dependents, rb_node_dep) { - zebra_nhg_set_valid(rb_node_dep->nhe); -+ /* install dependent NHG into kernel */ -+ if (install) { -+ if (IS_ZEBRA_DEBUG_NHG_DETAIL) -+ zlog_debug( -+ "%s nh id %u (flags 0x%x) associated dependent NHG %pNG install", -+ __func__, nhe->id, nhe->flags, -+ rb_node_dep->nhe); -+ zebra_nhg_install_kernel(rb_node_dep->nhe); -+ } -+ } - } - - /* -@@ -3035,7 +3045,7 @@ void zebra_nhg_install_kernel(struct nhg_hash_entry *nhe) - break; - case ZEBRA_DPLANE_REQUEST_SUCCESS: - SET_FLAG(nhe->flags, NEXTHOP_GROUP_INSTALLED); -- zebra_nhg_handle_install(nhe); -+ zebra_nhg_handle_install(nhe, false); - break; - } - } -@@ -3109,7 +3119,7 @@ void zebra_nhg_dplane_result(struct zebra_dplane_ctx *ctx) - if (status == ZEBRA_DPLANE_REQUEST_SUCCESS) { - SET_FLAG(nhe->flags, NEXTHOP_GROUP_VALID); - SET_FLAG(nhe->flags, NEXTHOP_GROUP_INSTALLED); -- zebra_nhg_handle_install(nhe); -+ zebra_nhg_handle_install(nhe, true); - - /* If daemon nhg, send it an update */ - if (PROTO_OWNED(nhe)) -@@ -3628,7 +3638,30 @@ void zebra_interface_nhg_reinstall(struct interface *ifp) - } - /* Check for singleton NHG associated to interface */ - if (nexthop_is_ifindex_type(nh) && -- zebra_nhg_depends_is_empty(rb_node_dep->nhe)) -+ zebra_nhg_depends_is_empty(rb_node_dep->nhe)) { -+ struct nhg_connected *rb_node_dependent; -+ -+ if (IS_ZEBRA_DEBUG_NHG) -+ zlog_debug( -+ "%s install nhe %pNG nh type %u flags 0x%x", -+ __func__, rb_node_dep->nhe, nh->type, -+ rb_node_dep->nhe->flags); - zebra_nhg_install_kernel(rb_node_dep->nhe); -+ -+ /* mark depedent uninstall, when interface associated -+ * singleton is installed, install depedent -+ */ -+ frr_each_safe (nhg_connected_tree, -+ &rb_node_dep->nhe->nhg_dependents, -+ rb_node_dependent) { -+ if (IS_ZEBRA_DEBUG_NHG) -+ zlog_debug( -+ "%s dependent nhe %pNG unset installed flag", -+ __func__, -+ rb_node_dependent->nhe); -+ UNSET_FLAG(rb_node_dependent->nhe->flags, -+ NEXTHOP_GROUP_INSTALLED); -+ } -+ } - } - } --- -2.17.1 - - -From be767bd66143c2dcdd564a40a852400ae9e251e5 Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Fri, 19 Apr 2024 12:13:32 -0400 -Subject: [PATCH 3/3] lib, zebra: Check for not being a blackhole route - -In zebra_interface_nhg_reinstall zebra is checking that the -nhg is a singleton and not a blackhole nhg. This was originally -done with checking that the nexthop is a NEXTHOP_TYPE_IFINDEX, -NEXTHOP_TYPE_IPV4_IFINDEX and NEXTHOP_TYPE_IPV6_IFINDEX. This -was excluding NEXTHOP_TYPE_IPV4 and NEXTHOP_TYPE_IPV6. These -were both possible to be received and maintained from the upper -level protocol for when a route is being recursively resolved. -If we have gotten to this point in zebra_interface_nhg_reinstall -the nexthop group has already been installed at least once -and we *know* that it is actually a valid nexthop. What the -test is really trying to do is ensure that we are not reinstalling -a blackhole nexthop group( Which is not possible to even be -here by the way, but safety first! ). So let's change -to test for that instead. - -Signed-off-by: Donald Sharp ---- - lib/nexthop.c | 8 ++------ - lib/nexthop.h | 4 ++-- - zebra/zebra_nhg.c | 3 ++- - 3 files changed, 6 insertions(+), 9 deletions(-) - -diff --git a/lib/nexthop.c b/lib/nexthop.c -index e3bdbfb9e8..884255f158 100644 ---- a/lib/nexthop.c -+++ b/lib/nexthop.c -@@ -1094,11 +1094,7 @@ static ssize_t printfrr_nh(struct fbuf *buf, struct printfrr_eargs *ea, - return -1; - } - --bool nexthop_is_ifindex_type(const struct nexthop *nh) -+bool nexthop_is_blackhole(const struct nexthop *nh) - { -- if (nh->type == NEXTHOP_TYPE_IFINDEX || -- nh->type == NEXTHOP_TYPE_IPV4_IFINDEX || -- nh->type == NEXTHOP_TYPE_IPV6_IFINDEX) -- return true; -- return false; -+ return nh->type == NEXTHOP_TYPE_BLACKHOLE; - } -diff --git a/lib/nexthop.h b/lib/nexthop.h -index a52ae02172..bd1c0514fc 100644 ---- a/lib/nexthop.h -+++ b/lib/nexthop.h -@@ -260,8 +260,8 @@ extern struct nexthop *nexthop_dup(const struct nexthop *nexthop, - extern struct nexthop *nexthop_dup_no_recurse(const struct nexthop *nexthop, - struct nexthop *rparent); - --/* Check nexthop of IFINDEX type */ --extern bool nexthop_is_ifindex_type(const struct nexthop *nh); -+/* Is this nexthop a blackhole? */ -+extern bool nexthop_is_blackhole(const struct nexthop *nh); - - /* - * Parse one or more backup index values, as comma-separated numbers, -diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c -index e5efbf8d5f..33d2344f51 100644 ---- a/zebra/zebra_nhg.c -+++ b/zebra/zebra_nhg.c -@@ -3636,8 +3636,9 @@ void zebra_interface_nhg_reinstall(struct interface *ifp) - "%s: Setting the valid flag for nhe %pNG, interface: %s", - __func__, rb_node_dep->nhe, ifp->name); - } -+ - /* Check for singleton NHG associated to interface */ -- if (nexthop_is_ifindex_type(nh) && -+ if (!nexthop_is_blackhole(nh) && - zebra_nhg_depends_is_empty(rb_node_dep->nhe)) { - struct nhg_connected *rb_node_dependent; - --- -2.17.1 - diff --git a/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch b/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch index 0bebd1ea12b..f6de465595a 100644 --- a/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch +++ b/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch @@ -50,10 +50,10 @@ Signed-off-by: Donald Sharp Signed-off-by: Rajasekar Raja diff --git a/zebra/zserv.c b/zebra/zserv.c -index 2024f34534..de6e404fc4 100644 +index 6a64176d9..488712397 100644 --- a/zebra/zserv.c +++ b/zebra/zserv.c -@@ -318,6 +318,14 @@ zwrite_fail: +@@ -306,6 +306,14 @@ zwrite_fail: * this task reschedules itself. * * Any failure in any of these actions is handled by terminating the client. @@ -66,9 +66,9 @@ index 2024f34534..de6e404fc4 100644 + * The main thread processes the items in ibuf_fifo and always signals the + * client IO thread. */ - static void zserv_read(struct thread *thread) + static void zserv_read(struct event *thread) { -@@ -325,15 +333,25 @@ static void zserv_read(struct thread *thread) +@@ -313,16 +321,26 @@ static void zserv_read(struct event *thread) int sock; size_t already; struct stream_fifo *cache; @@ -80,7 +80,7 @@ index 2024f34534..de6e404fc4 100644 + int p2p_avail; /* How much space is available for p2p */ struct zmsghdr hdr; + size_t client_ibuf_fifo_cnt = stream_fifo_count_safe(client->ibuf_fifo); - + p2p_orig = atomic_load_explicit(&zrouter.packets_to_process, memory_order_relaxed); + p2p_avail = p2p_orig - client_ibuf_fifo_cnt; @@ -95,19 +95,21 @@ index 2024f34534..de6e404fc4 100644 + p2p = p2p_avail; cache = stream_fifo_new(); - p2p = p2p_orig; - sock = THREAD_FD(thread); - +- sock = EVENT_FD(thread); ++ sock = EVENT_FD(thread); + while (p2p) { -@@ -433,7 +451,7 @@ static void zserv_read(struct thread *thread) + ssize_t nb; +@@ -421,7 +439,7 @@ static void zserv_read(struct event *thread) p2p--; } - + - if (p2p < p2p_orig) { + if (p2p < (uint32_t)p2p_avail) { uint64_t time_now = monotime(NULL); - + /* update session statistics */ -@@ -447,19 +465,23 @@ static void zserv_read(struct thread *thread) +@@ -435,19 +453,23 @@ static void zserv_read(struct event *thread) while (cache->head) stream_fifo_push(client->ibuf_fifo, stream_fifo_pop(cache)); @@ -115,28 +117,28 @@ index 2024f34534..de6e404fc4 100644 + client_ibuf_fifo_cnt = + stream_fifo_count_safe(client->ibuf_fifo); } - + /* Schedule job to process those packets */ zserv_event(client, ZSERV_PROCESS_MESSAGES); - } - + if (IS_ZEBRA_DEBUG_PACKET) - zlog_debug("Read %d packets from client: %s", p2p_orig - p2p, - zebra_route_string(client->proto)); + zlog_debug("Read %d packets from client: %s. Current ibuf fifo count: %zu. Conf P2p %d", + p2p_avail - p2p, zebra_route_string(client->proto), + client_ibuf_fifo_cnt, p2p_orig); - + - /* Reschedule ourselves */ - zserv_client_event(client, ZSERV_CLIENT_READ); + /* Reschedule ourselves since we have space in ibuf_fifo */ + if (client_ibuf_fifo_cnt < p2p_orig) + zserv_client_event(client, ZSERV_CLIENT_READ); - + stream_fifo_free(cache); - -@@ -495,14 +517,20 @@ static void zserv_client_event(struct zserv *client, + +@@ -483,14 +505,20 @@ static void zserv_client_event(struct zserv *client, * as the task argument. * * Each message is popped off the client's input queue and the action associated @@ -157,9 +159,9 @@ index 2024f34534..de6e404fc4 100644 + * items to the ibuf_fifo (until max limit) + * - the hidden config change (zebra zapi-packets <>) is taken into account. */ - static void zserv_process_messages(struct thread *thread) + static void zserv_process_messages(struct event *thread) { -@@ -538,6 +566,9 @@ static void zserv_process_messages(struct thread *thread) +@@ -524,6 +552,9 @@ static void zserv_process_messages(struct event *thread) /* Reschedule ourselves if necessary */ if (need_resched) zserv_event(client, ZSERV_PROCESS_MESSAGES); @@ -167,8 +169,5 @@ index 2024f34534..de6e404fc4 100644 + /* Ensure to include the read socket in the select/poll/etc.. */ + zserv_client_event(client, ZSERV_CLIENT_READ); } - - int zserv_send_message(struct zserv *client, struct stream *msg) --- -2.17.1 + int zserv_send_message(struct zserv *client, struct stream *msg) diff --git a/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch b/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch index 21a2b90f44f..142ca6d0eff 100644 --- a/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch +++ b/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch @@ -15,12 +15,12 @@ Signed-off-by: Donald Sharp Signed-off-by: Rajasekar Raja diff --git a/bgpd/bgp_main.c b/bgpd/bgp_main.c -index 90ae580bab..e28dde5d16 100644 +index 851c4880c..44d5ee68c 100644 --- a/bgpd/bgp_main.c +++ b/bgpd/bgp_main.c -@@ -214,6 +214,8 @@ static __attribute__((__noreturn__)) void bgp_exit(int status) +@@ -207,6 +207,8 @@ static __attribute__((__noreturn__)) void bgp_exit(int status) bgp_evpn_mh_finish(); - bgp_l3nhg_finish(); + bgp_nhg_finish(); + zebra_announce_fini(&bm->zebra_announce_head); + @@ -28,19 +28,28 @@ index 90ae580bab..e28dde5d16 100644 bgp_dump_finish(); diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h -index 121afc481f..d43bf86eb9 100644 +index 5b4c3be21..67431ea4f 100644 --- a/bgpd/bgp_table.h +++ b/bgpd/bgp_table.h -@@ -101,6 +101,8 @@ struct bgp_node { +@@ -75,6 +75,9 @@ struct bgp_dest { + struct bgp_dest *pdest; STAILQ_ENTRY(bgp_dest) pq; - -+ struct zebra_announce_item zai; ++ struct bgp_path_info *za_bgp_pi; + ++ struct zebra_announce_item zai; + uint64_t version; - mpls_label_t local_label; -@@ -121,6 +123,8 @@ struct bgp_node { +@@ -91,12 +94,16 @@ struct bgp_dest { + #define BGP_NODE_LABEL_REQUESTED (1 << 7) + #define BGP_NODE_SOFT_RECONFIG (1 << 8) + #define BGP_NODE_PROCESS_CLEAR (1 << 9) ++#define BGP_NODE_SCHEDULE_FOR_INSTALL (1 << 10) ++#define BGP_NODE_SCHEDULE_FOR_DELETE (1 << 11) + + struct bgp_addpath_node_data tx_addpath; + enum bgp_path_selection_reason reason; }; @@ -50,10 +59,31 @@ index 121afc481f..d43bf86eb9 100644 /* * bgp_table_iter_t diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c -index 023047050b..392423e028 100644 +index 337879a2d..88d4201a9 100644 --- a/bgpd/bgpd.c +++ b/bgpd/bgpd.c -@@ -8017,6 +8017,8 @@ void bgp_master_init(struct thread_master *master, const int buffer_size, +@@ -3867,10 +3867,20 @@ int bgp_delete(struct bgp *bgp) + afi_t afi; + safi_t safi; + int i; ++ struct bgp_dest *dest = NULL; + struct graceful_restart_info *gr_info; + + assert(bgp); + ++ while (zebra_announce_count(&bm->zebra_announce_head)) { ++ dest = zebra_announce_pop(&bm->zebra_announce_head); ++ if (dest->za_bgp_pi->peer->bgp == bgp) { ++ bgp_path_info_unlock(dest->za_bgp_pi); ++ bgp_dest_unlock_node(dest); ++ } else ++ zebra_announce_add_tail(&bm->zebra_announce_head, dest); ++ } ++ + bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL); + + /* make sure we withdraw any exported routes */ +@@ -8296,6 +8306,8 @@ void bgp_master_init(struct event_loop *master, const int buffer_size, memset(&bgp_master, 0, sizeof(bgp_master)); bm = &bgp_master; @@ -62,23 +92,46 @@ index 023047050b..392423e028 100644 bm->bgp = list_new(); bm->listen_sockets = list_new(); bm->port = BGP_PORT_DEFAULT; +@@ -8314,6 +8326,7 @@ void bgp_master_init(struct event_loop *master, const int buffer_size, + bm->outq_limit = BM_DEFAULT_Q_LIMIT; + bm->t_bgp_sync_label_manager = NULL; + bm->t_bgp_start_label_manager = NULL; ++ bm->t_bgp_zebra_route = NULL; + + bgp_mac_init(); + /* init the rd id space. +@@ -8564,6 +8577,7 @@ void bgp_terminate(void) + EVENT_OFF(bm->t_rmap_update); + EVENT_OFF(bm->t_bgp_sync_label_manager); + EVENT_OFF(bm->t_bgp_start_label_manager); ++ EVENT_OFF(bm->t_bgp_zebra_route); + + bgp_mac_finish(); + } diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h -index 72b5b50fb4..55f53bf9d3 100644 +index 0f6909532..a6b398a44 100644 --- a/bgpd/bgpd.h +++ b/bgpd/bgpd.h -@@ -32,6 +32,8 @@ - #include "srv6.h" +@@ -18,6 +18,8 @@ #include "iana_afi.h" + #include "asn.h" +PREDECL_LIST(zebra_announce); + /* For union sockunion. */ #include "queue.h" #include "sockunion.h" -@@ -180,6 +182,9 @@ struct bgp_master { +@@ -170,11 +172,16 @@ struct bgp_master { uint32_t inq_limit; uint32_t outq_limit; ++ struct event *t_bgp_zebra_route; ++ + struct event *t_bgp_sync_label_manager; + struct event *t_bgp_start_label_manager; + + bool v6_with_v4_nexthops; + + /* To preserve ordering of installations into zebra across all Vrfs */ + struct zebra_announce_head zebra_announce_head; + diff --git a/src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch b/src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch deleted file mode 100644 index bfefccceff1..00000000000 --- a/src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch +++ /dev/null @@ -1,158 +0,0 @@ -From 69e38aa82f325129ebad4535be5d834c599b5c0b Mon Sep 17 00:00:00 2001 -From: Philippe Guibert -Date: Wed, 7 Feb 2024 22:34:34 +0100 -Subject: [PATCH 04/11] bgpd: fix flushing ipv6 flowspec entries when peering - stops - -When a BGP flowspec peering stops, the BGP RIB entries for IPv6 -flowspec entries are removed, but not the ZEBRA RIB IPv6 entries. - -Actually, when calling bgp_zebra_withdraw() function call, only -the AFI_IP parameter is passed to the bgp_pbr_update_entry() function -in charge of the Flowspec add/delete in zebra. Fix this by passing -the AFI parameter to the bgp_zebra_withdraw() function. - -Note that using topotest does not show up the problem as the -flowspec driver code is not present and was refused. Without that, -routes are not installed, and can not be uninstalled. - -Fixes: 529efa234655 ("bgpd: allow flowspec entries to be announced to zebra") -Link: https://github.com/FRRouting/frr/pull/2025 - -Signed-off-by: Philippe Guibert - -diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c -index fbff57634a..455cd6cdbb 100644 ---- a/bgpd/bgp_route.c -+++ b/bgpd/bgp_route.c -@@ -3312,7 +3312,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, - */ - if (old_select && - is_route_parent_evpn(old_select)) -- bgp_zebra_withdraw(p, old_select, bgp, safi); -+ bgp_zebra_withdraw(p, old_select, bgp, afi, -+ safi); - - bgp_zebra_announce(dest, p, new_select, bgp, afi, safi); - } else { -@@ -3322,7 +3323,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, - || old_select->sub_type == BGP_ROUTE_AGGREGATE - || old_select->sub_type == BGP_ROUTE_IMPORTED)) - -- bgp_zebra_withdraw(p, old_select, bgp, safi); -+ bgp_zebra_withdraw(p, old_select, bgp, afi, -+ safi); - } - } - -@@ -4201,7 +4203,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, - if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) { - if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)) - /* remove from RIB previous entry */ -- bgp_zebra_withdraw(p, pi, bgp, safi); -+ bgp_zebra_withdraw(p, pi, bgp, afi, safi); - } - - if (peer->sort == BGP_PEER_EBGP) { -@@ -5841,7 +5843,7 @@ bool bgp_inbound_policy_exists(struct peer *peer, struct bgp_filter *filter) - } - - static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table, -- safi_t safi) -+ afi_t afi, safi_t safi) - { - struct bgp_dest *dest; - struct bgp_path_info *pi; -@@ -5865,7 +5867,8 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table, - || pi->sub_type == BGP_ROUTE_IMPORTED)) { - - if (bgp_fibupd_safi(safi)) -- bgp_zebra_withdraw(p, pi, bgp, safi); -+ bgp_zebra_withdraw(p, pi, bgp, afi, -+ safi); - } - - bgp_path_info_reap(dest, pi); -@@ -5882,7 +5885,7 @@ void bgp_cleanup_routes(struct bgp *bgp) - for (afi = AFI_IP; afi < AFI_MAX; ++afi) { - if (afi == AFI_L2VPN) - continue; -- bgp_cleanup_table(bgp, bgp->rib[afi][SAFI_UNICAST], -+ bgp_cleanup_table(bgp, bgp->rib[afi][SAFI_UNICAST], afi, - SAFI_UNICAST); - /* - * VPN and ENCAP and EVPN tables are two-level (RD is top level) -@@ -5894,7 +5897,7 @@ void bgp_cleanup_routes(struct bgp *bgp) - dest = bgp_route_next(dest)) { - table = bgp_dest_get_bgp_table_info(dest); - if (table != NULL) { -- bgp_cleanup_table(bgp, table, safi); -+ bgp_cleanup_table(bgp, table, afi, safi); - bgp_table_finish(&table); - bgp_dest_set_bgp_table_info(dest, NULL); - bgp_dest_unlock_node(dest); -@@ -5905,7 +5908,7 @@ void bgp_cleanup_routes(struct bgp *bgp) - dest = bgp_route_next(dest)) { - table = bgp_dest_get_bgp_table_info(dest); - if (table != NULL) { -- bgp_cleanup_table(bgp, table, safi); -+ bgp_cleanup_table(bgp, table, afi, safi); - bgp_table_finish(&table); - bgp_dest_set_bgp_table_info(dest, NULL); - bgp_dest_unlock_node(dest); -@@ -5917,7 +5920,7 @@ void bgp_cleanup_routes(struct bgp *bgp) - dest = bgp_route_next(dest)) { - table = bgp_dest_get_bgp_table_info(dest); - if (table != NULL) { -- bgp_cleanup_table(bgp, table, SAFI_EVPN); -+ bgp_cleanup_table(bgp, table, afi, SAFI_EVPN); - bgp_table_finish(&table); - bgp_dest_set_bgp_table_info(dest, NULL); - bgp_dest_unlock_node(dest); -diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c -index ff79746b4c..69240a3b83 100644 ---- a/bgpd/bgp_zebra.c -+++ b/bgpd/bgp_zebra.c -@@ -1761,7 +1761,7 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, - } - - void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info, -- struct bgp *bgp, safi_t safi) -+ struct bgp *bgp, afi_t afi, safi_t safi) - { - struct zapi_route api; - struct peer *peer; -@@ -1780,7 +1780,7 @@ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info, - - if (safi == SAFI_FLOWSPEC) { - peer = info->peer; -- bgp_pbr_update_entry(peer->bgp, p, info, AFI_IP, safi, false); -+ bgp_pbr_update_entry(peer->bgp, p, info, afi, safi, false); - return; - } - -@@ -1821,7 +1821,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa - if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) - && (pi->type == ZEBRA_ROUTE_BGP)) - bgp_zebra_withdraw(bgp_dest_get_prefix(dest), -- pi, bgp, safi); -+ pi, bgp, afi, safi); - } - } - } -diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h -index 0a41069411..a5fe8d7ace 100644 ---- a/bgpd/bgp_zebra.h -+++ b/bgpd/bgp_zebra.h -@@ -49,7 +49,7 @@ extern void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, - extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi); - extern void bgp_zebra_withdraw(const struct prefix *p, - struct bgp_path_info *path, struct bgp *bgp, -- safi_t safi); -+ afi_t afi, safi_t safi); - - /* Announce routes of any bgp subtype of a table to zebra */ - extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, --- -2.17.1 - diff --git a/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch b/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch index 16383dc95ca..126d3d05d66 100644 --- a/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch +++ b/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch @@ -15,10 +15,10 @@ Signed-off-by: Donald Sharp Signed-off-by: Rajasekar Raja diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c -index 455cd6cdbb..d19f27110e 100644 +index a0113c04e..99fb021b1 100644 --- a/bgpd/bgp_route.c +++ b/bgpd/bgp_route.c -@@ -3214,8 +3214,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, +@@ -3419,8 +3419,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, || new_select->sub_type == BGP_ROUTE_IMPORTED)) @@ -29,7 +29,7 @@ index 455cd6cdbb..d19f27110e 100644 } } -@@ -3312,10 +3312,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, +@@ -3529,10 +3529,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, */ if (old_select && is_route_parent_evpn(old_select)) @@ -42,7 +42,7 @@ index 455cd6cdbb..d19f27110e 100644 } else { /* Withdraw the route from the kernel. */ if (old_select && old_select->type == ZEBRA_ROUTE_BGP -@@ -3323,8 +3322,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, +@@ -3540,8 +3539,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, || old_select->sub_type == BGP_ROUTE_AGGREGATE || old_select->sub_type == BGP_ROUTE_IMPORTED)) @@ -52,7 +52,7 @@ index 455cd6cdbb..d19f27110e 100644 } } -@@ -4203,7 +4201,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, +@@ -4446,7 +4444,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) { if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)) /* remove from RIB previous entry */ @@ -61,7 +61,7 @@ index 455cd6cdbb..d19f27110e 100644 } if (peer->sort == BGP_PEER_EBGP) { -@@ -5867,8 +5865,7 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table, +@@ -6072,8 +6070,7 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table, || pi->sub_type == BGP_ROUTE_IMPORTED)) { if (bgp_fibupd_safi(safi)) @@ -70,13 +70,13 @@ index 455cd6cdbb..d19f27110e 100644 + bgp_zebra_withdraw(dest, pi, bgp); } - bgp_path_info_reap(dest, pi); + dest = bgp_path_info_reap(dest, pi); diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c -index 69240a3b83..920df835a4 100644 +index fe29662e2..9b4b46b40 100644 --- a/bgpd/bgp_zebra.c +++ b/bgpd/bgp_zebra.c -@@ -1292,9 +1292,8 @@ static bool bgp_zebra_use_nhop_weighted(struct bgp *bgp, struct attr *attr, - return true; +@@ -1507,9 +1507,8 @@ static void bgp_debug_zebra_nh(struct zapi_route *api) + } } -void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, @@ -85,18 +85,18 @@ index 69240a3b83..920df835a4 100644 +void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info, + struct bgp *bgp) { + struct bgp_path_info *bpi_ultimate; struct zapi_route api = { 0 }; - struct zapi_nexthop *api_nh; -@@ -1321,6 +1320,8 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, - uint32_t ttl = 0; - uint32_t bos = 0; - uint32_t exp = 0; +@@ -1522,6 +1521,8 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, + bool is_add; + uint32_t nhg_id = 0; + uint32_t recursion_flag = 0; + struct bgp_table *table = bgp_dest_table(dest); + const struct prefix *p = bgp_dest_get_prefix(dest); /* * BGP is installing this route and bgp has been configured -@@ -1339,9 +1340,9 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, +@@ -1540,16 +1541,16 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, if (bgp->main_zebra_update_hold) return; @@ -105,11 +105,10 @@ index 69240a3b83..920df835a4 100644 - safi, true); + if (table->safi == SAFI_FLOWSPEC) { + bgp_pbr_update_entry(bgp, p, info, table->afi, table->safi, -+ true); ++ true); return; } -@@ -1354,7 +1355,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, /* Make Zebra API structure. */ api.vrf_id = bgp->vrf_id; api.type = ZEBRA_ROUTE_BGP; @@ -118,23 +117,16 @@ index 69240a3b83..920df835a4 100644 api.prefix = *p; SET_FLAG(api.message, ZAPI_MESSAGE_NEXTHOP); -@@ -1458,12 +1459,13 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, - } - } +@@ -1586,7 +1587,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, + metric = info->attr->med; -- if (bgp->table_map[afi][safi].name) { -+ if (bgp->table_map[table->afi][table->safi].name) { - /* Copy info and attributes, so the route-map - apply doesn't modify the BGP route info. */ - local_attr = *mpinfo->attr; - mpinfo_cp->attr = &local_attr; -- if (!bgp_table_map_apply(bgp->table_map[afi][safi].map, -+ if (!bgp_table_map_apply(bgp->table_map[table->afi] -+ [table->safi].map, - p, mpinfo_cp)) - continue; - -@@ -1619,7 +1621,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, + bgp_zebra_announce_parse_nexthop(info, p, bgp, &api, &valid_nh_count, +- afi, safi, &nhg_id, &metric, &tag, ++ table->afi, table->safi, &nhg_id, &metric, &tag, + &allow_recursion); + + is_add = (valid_nh_count || nhg_id) ? true : false; +@@ -1640,7 +1641,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, api.tag = tag; } @@ -143,7 +135,7 @@ index 69240a3b83..920df835a4 100644 if (distance) { SET_FLAG(api.message, ZAPI_MESSAGE_DISTANCE); api.distance = distance; -@@ -1731,9 +1733,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi) +@@ -1689,9 +1690,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi) && (pi->sub_type == BGP_ROUTE_NORMAL || pi->sub_type == BGP_ROUTE_IMPORTED))) @@ -154,7 +146,7 @@ index 69240a3b83..920df835a4 100644 } /* Announce routes of any bgp subtype of a table to zebra */ -@@ -1755,16 +1755,16 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, +@@ -1713,17 +1712,16 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) && pi->type == ZEBRA_ROUTE_BGP) @@ -171,12 +163,13 @@ index 69240a3b83..920df835a4 100644 { struct zapi_route api; struct peer *peer; +- + struct bgp_table *table = bgp_dest_table(dest); + const struct prefix *p = bgp_dest_get_prefix(dest); - /* * If we are withdrawing the route, we don't need to have this -@@ -1778,16 +1778,17 @@ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info, + * flag set. So unset it. +@@ -1736,16 +1734,16 @@ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info, if (!bgp_install_info_to_zebra(bgp)) return; @@ -184,8 +177,7 @@ index 69240a3b83..920df835a4 100644 + if (table->safi == SAFI_FLOWSPEC) { peer = info->peer; - bgp_pbr_update_entry(peer->bgp, p, info, afi, safi, false); -+ bgp_pbr_update_entry(peer->bgp, p, info, table->afi, -+ table->safi, false); ++ bgp_pbr_update_entry(peer->bgp, p, info, table->afi, table->safi, false); return; } @@ -197,7 +189,7 @@ index 69240a3b83..920df835a4 100644 api.prefix = *p; if (info->attr->rmap_table_id) { -@@ -1820,8 +1821,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa +@@ -1778,8 +1776,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) { if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) && (pi->type == ZEBRA_ROUTE_BGP)) @@ -208,11 +200,11 @@ index 69240a3b83..920df835a4 100644 } } diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h -index a5fe8d7ace..b77e423f8f 100644 +index 396c8335f..0facef5cc 100644 --- a/bgpd/bgp_zebra.h +++ b/bgpd/bgp_zebra.h -@@ -43,13 +43,11 @@ extern void bgp_zebra_destroy(void); - extern int bgp_zebra_get_table_range(uint32_t chunk_size, +@@ -28,13 +28,12 @@ extern void bgp_zebra_destroy(void); + extern int bgp_zebra_get_table_range(struct zclient *zc, uint32_t chunk_size, uint32_t *start, uint32_t *end); extern int bgp_if_update_all(void); -extern void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, @@ -220,6 +212,7 @@ index a5fe8d7ace..b77e423f8f 100644 - afi_t afi, safi_t safi); +extern void bgp_zebra_announce(struct bgp_dest *dest, + struct bgp_path_info *path, struct bgp *bgp); ++ extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi); -extern void bgp_zebra_withdraw(const struct prefix *p, - struct bgp_path_info *path, struct bgp *bgp, @@ -230,5 +223,5 @@ index a5fe8d7ace..b77e423f8f 100644 /* Announce routes of any bgp subtype of a table to zebra */ extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, -- -2.17.1 +2.39.4 diff --git a/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch b/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch index 724cf1297a5..ff1dc62228d 100644 --- a/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch +++ b/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch @@ -36,46 +36,45 @@ Ticket: #3390099 Signed-off-by: Donald Sharp Signed-off-by: Rajasekar Raja +--- diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c -index d19f27110e..c29442d96c 100644 +index 99fb021b1..e45d4b1ff 100644 --- a/bgpd/bgp_route.c +++ b/bgpd/bgp_route.c -@@ -3214,8 +3214,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, +@@ -3419,8 +3419,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, || new_select->sub_type == BGP_ROUTE_IMPORTED)) - bgp_zebra_announce(dest, old_select, - bgp); -+ bgp_zebra_route_install( -+ dest, old_select, bgp, true); ++ bgp_zebra_route_install(dest, old_select, ++ bgp, true); } } -@@ -3312,9 +3312,10 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, +@@ -3529,9 +3529,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, */ if (old_select && is_route_parent_evpn(old_select)) - bgp_zebra_withdraw(dest, old_select, bgp); -+ bgp_zebra_route_install(dest, old_select, bgp, -+ false); ++ bgp_zebra_route_install(dest, old_select, bgp, false); - bgp_zebra_announce(dest, new_select, bgp); + bgp_zebra_route_install(dest, new_select, bgp, true); } else { /* Withdraw the route from the kernel. */ if (old_select && old_select->type == ZEBRA_ROUTE_BGP -@@ -3322,7 +3323,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, +@@ -3539,7 +3539,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, || old_select->sub_type == BGP_ROUTE_AGGREGATE || old_select->sub_type == BGP_ROUTE_IMPORTED)) - bgp_zebra_withdraw(dest, old_select, bgp); -+ bgp_zebra_route_install(dest, old_select, bgp, -+ false); ++ bgp_zebra_route_install(dest, old_select, bgp, false); } } -@@ -4201,7 +4203,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, +@@ -4444,7 +4444,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) { if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)) /* remove from RIB previous entry */ @@ -84,43 +83,21 @@ index d19f27110e..c29442d96c 100644 } if (peer->sort == BGP_PEER_EBGP) { -@@ -5865,7 +5867,8 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table, +@@ -6070,7 +6070,7 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table, || pi->sub_type == BGP_ROUTE_IMPORTED)) { if (bgp_fibupd_safi(safi)) - bgp_zebra_withdraw(dest, pi, bgp); -+ bgp_zebra_withdraw_actual(dest, pi, -+ bgp); ++ bgp_zebra_withdraw_actual(dest, pi, bgp); } - bgp_path_info_reap(dest, pi); -diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h -index d43bf86eb9..45d61f8dfd 100644 ---- a/bgpd/bgp_table.h -+++ b/bgpd/bgp_table.h -@@ -102,6 +102,7 @@ struct bgp_node { - STAILQ_ENTRY(bgp_dest) pq; - - struct zebra_announce_item zai; -+ struct bgp_path_info *za_bgp_pi; - - uint64_t version; - -@@ -117,6 +118,8 @@ struct bgp_node { - #define BGP_NODE_FIB_INSTALLED (1 << 6) - #define BGP_NODE_LABEL_REQUESTED (1 << 7) - #define BGP_NODE_SOFT_RECONFIG (1 << 8) -+#define BGP_NODE_SCHEDULE_FOR_INSTALL (1 << 10) -+#define BGP_NODE_SCHEDULE_FOR_DELETE (1 << 11) - - struct bgp_addpath_node_data tx_addpath; - + dest = bgp_path_info_reap(dest, pi); diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c -index 920df835a4..1162941ef1 100644 +index 9b4b46b40..31d981191 100644 --- a/bgpd/bgp_zebra.c +++ b/bgpd/bgp_zebra.c -@@ -1292,8 +1292,9 @@ static bool bgp_zebra_use_nhop_weighted(struct bgp *bgp, struct attr *attr, - return true; +@@ -1507,8 +1507,9 @@ static void bgp_debug_zebra_nh(struct zapi_route *api) + } } -void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info, @@ -129,9 +106,9 @@ index 920df835a4..1162941ef1 100644 +bgp_zebra_announce_actual(struct bgp_dest *dest, struct bgp_path_info *info, + struct bgp *bgp) { + struct bgp_path_info *bpi_ultimate; struct zapi_route api = { 0 }; - struct zapi_nexthop *api_nh; -@@ -1323,27 +1324,10 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info, +@@ -1524,27 +1525,10 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info, struct bgp_table *table = bgp_dest_table(dest); const struct prefix *p = bgp_dest_get_prefix(dest); @@ -154,27 +131,22 @@ index 920df835a4..1162941ef1 100644 - if (table->safi == SAFI_FLOWSPEC) { bgp_pbr_update_entry(bgp, p, info, table->afi, table->safi, - true); + true); - return; + return ZCLIENT_SEND_SUCCESS; } - /* -@@ -1704,10 +1688,11 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info, + /* Make Zebra API structure. */ +@@ -1661,7 +1645,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info, zlog_debug("%s: %pFX: announcing to zebra (recursion %sset)", __func__, p, (recursion_flag ? "" : "NOT ")); } - zclient_route_send(is_add ? ZEBRA_ROUTE_ADD : ZEBRA_ROUTE_DELETE, -- zclient, &api); + return zclient_route_send(is_add ? ZEBRA_ROUTE_ADD : ZEBRA_ROUTE_DELETE, -+ zclient, &api); + zclient, &api); } -+ - /* Announce all routes of a table to zebra */ - void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi) - { -@@ -1733,7 +1718,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi) +@@ -1690,7 +1674,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi) && (pi->sub_type == BGP_ROUTE_NORMAL || pi->sub_type == BGP_ROUTE_IMPORTED))) @@ -183,7 +155,7 @@ index 920df835a4..1162941ef1 100644 } /* Announce routes of any bgp subtype of a table to zebra */ -@@ -1755,34 +1740,23 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, +@@ -1712,32 +1696,23 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) && pi->type == ZEBRA_ROUTE_BGP) @@ -193,6 +165,7 @@ index 920df835a4..1162941ef1 100644 -void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info, - struct bgp *bgp) ++ +enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest, + struct bgp_path_info *info, + struct bgp *bgp) @@ -201,7 +174,6 @@ index 920df835a4..1162941ef1 100644 struct peer *peer; struct bgp_table *table = bgp_dest_table(dest); const struct prefix *p = bgp_dest_get_prefix(dest); - - /* - * If we are withdrawing the route, we don't need to have this - * flag set. So unset it. @@ -213,17 +185,16 @@ index 920df835a4..1162941ef1 100644 - */ - if (!bgp_install_info_to_zebra(bgp)) - return; -- + if (table->safi == SAFI_FLOWSPEC) { peer = info->peer; - bgp_pbr_update_entry(peer->bgp, p, info, table->afi, - table->safi, false); + bgp_pbr_update_entry(peer->bgp, p, info, table->afi, table->safi, false); - return; + return ZCLIENT_SEND_SUCCESS; } memset(&api, 0, sizeof(api)); -@@ -1800,7 +1774,172 @@ void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info, +@@ -1755,7 +1730,172 @@ void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info, zlog_debug("Tx route delete VRF %u %pFX", bgp->vrf_id, &api.prefix); @@ -291,7 +262,7 @@ index 920df835a4..1162941ef1 100644 + + if (status != ZCLIENT_SEND_BUFFERED && + zebra_announce_count(&bm->zebra_announce_head)) -+ thread_add_event(bm->master, ++ event_add_event(bm->master, + bgp_handle_route_announcements_to_zebra, NULL, + 0, &bm->t_bgp_zebra_route); +} @@ -392,12 +363,12 @@ index 920df835a4..1162941ef1 100644 + SET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE); + } + -+ thread_add_event(bm->master, bgp_handle_route_announcements_to_zebra, ++ event_add_event(bm->master, bgp_handle_route_announcements_to_zebra, + NULL, 0, &bm->t_bgp_zebra_route); } /* Withdraw all entries in a BGP instances RIB table from Zebra */ -@@ -1821,7 +1960,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa +@@ -1776,7 +1916,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) { if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) && (pi->type == ZEBRA_ROUTE_BGP)) @@ -406,20 +377,20 @@ index 920df835a4..1162941ef1 100644 } } } -@@ -3470,6 +3609,7 @@ void bgp_zebra_init(struct thread_master *master, unsigned short instance) +@@ -3449,6 +3589,7 @@ void bgp_zebra_init(struct event_loop *master, unsigned short instance) zclient = zclient_new(master, &zclient_options_default, bgp_handlers, array_size(bgp_handlers)); zclient_init(zclient, ZEBRA_ROUTE_BGP, 0, &bgpd_privs); + zclient->zebra_buffer_write_ready = bgp_zebra_buffer_write_ready; zclient->zebra_connected = bgp_zebra_connected; - zclient->instance = instance; - } + zclient->zebra_capabilities = bgp_zebra_capabilities; + zclient->nexthop_update = bgp_nexthop_update; diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h -index b77e423f8f..45fcf7f514 100644 +index 0facef5cc..6bfa74f4c 100644 --- a/bgpd/bgp_zebra.h +++ b/bgpd/bgp_zebra.h -@@ -43,11 +43,10 @@ extern void bgp_zebra_destroy(void); - extern int bgp_zebra_get_table_range(uint32_t chunk_size, +@@ -28,12 +28,14 @@ extern void bgp_zebra_destroy(void); + extern int bgp_zebra_get_table_range(struct zclient *zc, uint32_t chunk_size, uint32_t *start, uint32_t *end); extern int bgp_if_update_all(void); -extern void bgp_zebra_announce(struct bgp_dest *dest, @@ -427,80 +398,22 @@ index b77e423f8f..45fcf7f514 100644 +extern void bgp_zebra_route_install(struct bgp_dest *dest, + struct bgp_path_info *path, struct bgp *bgp, + bool install); + extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi); -extern void bgp_zebra_withdraw(struct bgp_dest *dest, - struct bgp_path_info *path, struct bgp *bgp); - - /* Announce routes of any bgp subtype of a table to zebra */ - extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, -@@ -131,4 +130,7 @@ extern int bgp_zebra_update(afi_t afi, safi_t safi, vrf_id_t vrf_id, int type); - extern int bgp_zebra_stale_timer_update(struct bgp *bgp); - extern int bgp_zebra_srv6_manager_get_locator_chunk(const char *name); - extern int bgp_zebra_srv6_manager_release_locator_chunk(const char *name); +extern enum zclient_send_status +bgp_zebra_withdraw_actual(struct bgp_dest *dest, struct bgp_path_info *info, + struct bgp *bgp); - #endif /* _QUAGGA_BGP_ZEBRA_H */ -diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c -index 392423e028..da133d71c1 100644 ---- a/bgpd/bgpd.c -+++ b/bgpd/bgpd.c -@@ -3688,10 +3688,20 @@ int bgp_delete(struct bgp *bgp) - afi_t afi; - safi_t safi; - int i; -+ struct bgp_dest *dest = NULL; - struct graceful_restart_info *gr_info; - - assert(bgp); - -+ while (zebra_announce_count(&bm->zebra_announce_head)) { -+ dest = zebra_announce_pop(&bm->zebra_announce_head); -+ if (dest->za_bgp_pi->peer->bgp == bgp) { -+ bgp_path_info_unlock(dest->za_bgp_pi); -+ bgp_dest_unlock_node(dest); -+ } else -+ zebra_announce_add_tail(&bm->zebra_announce_head, dest); -+ } -+ - bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL); - - /* make sure we withdraw any exported routes */ -@@ -8035,6 +8045,7 @@ void bgp_master_init(struct thread_master *master, const int buffer_size, - bm->tcp_dscp = IPTOS_PREC_INTERNETCONTROL; - bm->inq_limit = BM_DEFAULT_Q_LIMIT; - bm->outq_limit = BM_DEFAULT_Q_LIMIT; -+ bm->t_bgp_zebra_route = NULL; - - bgp_mac_init(); - /* init the rd id space. -@@ -8278,6 +8289,7 @@ void bgp_terminate(void) - list_delete(&bm->listen_sockets); - - THREAD_OFF(bm->t_rmap_update); -+ THREAD_OFF(bm->t_bgp_zebra_route); - - bgp_mac_finish(); - } -diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h -index 55f53bf9d3..bdf31f5161 100644 ---- a/bgpd/bgpd.h -+++ b/bgpd/bgpd.h -@@ -182,6 +182,8 @@ struct bgp_master { - uint32_t inq_limit; - uint32_t outq_limit; - -+ struct thread *t_bgp_zebra_route; -+ - /* To preserve ordering of installations into zebra across all Vrfs */ - struct zebra_announce_head zebra_announce_head; + /* Announce routes of any bgp subtype of a table to zebra */ + extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, diff --git a/lib/zclient.c b/lib/zclient.c -index 0082b21485..c48c1c6ee4 100644 +index 6b35b569d..64515c754 100644 --- a/lib/zclient.c +++ b/lib/zclient.c -@@ -285,6 +285,7 @@ static void zclient_flush_data(struct thread *thread) - zclient->sock, &zclient->t_write); +@@ -282,6 +282,7 @@ static void zclient_flush_data(struct event *thread) + zclient->sock, &zclient->t_write); break; case BUFFER_EMPTY: + /* Currently only Sharpd and Bgpd has callbacks defined */ @@ -508,5 +421,5 @@ index 0082b21485..c48c1c6ee4 100644 (*zclient->zebra_buffer_write_ready)(); break; -- -2.17.1 +2.39.4 diff --git a/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch b/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch index e83526b6e8e..1ef5f9c849d 100644 --- a/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch +++ b/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch @@ -18,29 +18,315 @@ Ticket: #3390099 Signed-off-by: Rajasekar Raja diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c -index 2b2cfa0f4c..622fd6afd2 100644 +index a846484f0..79e16d8f9 100644 --- a/bgpd/bgp_evpn.c +++ b/bgpd/bgp_evpn.c -@@ -863,11 +863,10 @@ struct bgp_dest *bgp_evpn_vni_node_lookup(const struct bgpevpn *vpn, +@@ -55,27 +55,25 @@ DEFINE_MTYPE_STATIC(BGPD, VRF_ROUTE_TARGET, "L3 Route Target"); + /* + * Static function declarations + */ +-static void bgp_evpn_remote_ip_hash_init(struct bgpevpn *evpn); +-static void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *evpn); +-static void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn, ++void bgp_evpn_remote_ip_hash_init(struct bgpevpn *evpn); ++void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *evpn); ++void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn, + struct bgp_path_info *pi); +-static void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn, ++void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn, + struct bgp_path_info *pi); +-static void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn, +- void (*func)(struct hash_bucket *, +- void *), +- void *arg); +-static void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn); +-static void bgp_evpn_unlink_from_vni_svi_hash(struct bgp *bgp, ++void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn, ++ void (*func)(struct hash_bucket *,void *), void *arg); ++void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn); ++void bgp_evpn_unlink_from_vni_svi_hash(struct bgp *bgp, + struct bgpevpn *vpn); +-static unsigned int vni_svi_hash_key_make(const void *p); +-static bool vni_svi_hash_cmp(const void *p1, const void *p2); +-static void bgp_evpn_remote_ip_process_nexthops(struct bgpevpn *vpn, ++unsigned int vni_svi_hash_key_make(const void *p); ++bool vni_svi_hash_cmp(const void *p1, const void *p2); ++void bgp_evpn_remote_ip_process_nexthops(struct bgpevpn *vpn, + struct ipaddr *addr, + bool resolve); +-static void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket, ++void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket, + void *args); +-static void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket, ++void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket, + void *args); + static struct in_addr zero_vtep_ip; + +@@ -86,7 +84,7 @@ static struct in_addr zero_vtep_ip; + /* + * Make vni hash key. + */ +-static unsigned int vni_hash_key_make(const void *p) ++unsigned int vni_hash_key_make(const void *p) + { + const struct bgpevpn *vpn = p; + return (jhash_1word(vpn->vni, 0)); +@@ -95,7 +93,7 @@ static unsigned int vni_hash_key_make(const void *p) + /* + * Comparison function for vni hash + */ +-static bool vni_hash_cmp(const void *p1, const void *p2) ++bool vni_hash_cmp(const void *p1, const void *p2) + { + const struct bgpevpn *vpn1 = p1; + const struct bgpevpn *vpn2 = p2; +@@ -114,7 +112,7 @@ int vni_list_cmp(void *p1, void *p2) + /* + * Make vrf import route target hash key. + */ +-static unsigned int vrf_import_rt_hash_key_make(const void *p) ++unsigned int vrf_import_rt_hash_key_make(const void *p) + { + const struct vrf_irt_node *irt = p; + const char *pnt = irt->rt.val; +@@ -125,7 +123,7 @@ static unsigned int vrf_import_rt_hash_key_make(const void *p) + /* + * Comparison function for vrf import rt hash + */ +-static bool vrf_import_rt_hash_cmp(const void *p1, const void *p2) ++bool vrf_import_rt_hash_cmp(const void *p1, const void *p2) + { + const struct vrf_irt_node *irt1 = p1; + const struct vrf_irt_node *irt2 = p2; +@@ -136,7 +134,7 @@ static bool vrf_import_rt_hash_cmp(const void *p1, const void *p2) + /* + * Create a new vrf import_rt in evpn instance + */ +-static struct vrf_irt_node *vrf_import_rt_new(struct ecommunity_val *rt) ++struct vrf_irt_node *vrf_import_rt_new(struct ecommunity_val *rt) + { + struct bgp *bgp_evpn = NULL; + struct vrf_irt_node *irt; +@@ -163,7 +161,7 @@ static struct vrf_irt_node *vrf_import_rt_new(struct ecommunity_val *rt) + /* + * Free the vrf import rt node + */ +-static void vrf_import_rt_free(struct vrf_irt_node *irt) ++void vrf_import_rt_free(struct vrf_irt_node *irt) + { + struct bgp *bgp_evpn = NULL; + +@@ -179,7 +177,7 @@ static void vrf_import_rt_free(struct vrf_irt_node *irt) + XFREE(MTYPE_BGP_EVPN_VRF_IMPORT_RT, irt); + } + +-static void hash_vrf_import_rt_free(struct vrf_irt_node *irt) ++void hash_vrf_import_rt_free(struct vrf_irt_node *irt) + { + XFREE(MTYPE_BGP_EVPN_VRF_IMPORT_RT, irt); + } +@@ -188,7 +186,7 @@ static void hash_vrf_import_rt_free(struct vrf_irt_node *irt) + * Function to lookup Import RT node - used to map a RT to set of + * VNIs importing routes with that RT. + */ +-static struct vrf_irt_node *lookup_vrf_import_rt(struct ecommunity_val *rt) ++struct vrf_irt_node *lookup_vrf_import_rt(struct ecommunity_val *rt) + { + struct bgp *bgp_evpn = NULL; + struct vrf_irt_node *irt; +@@ -211,7 +209,7 @@ static struct vrf_irt_node *lookup_vrf_import_rt(struct ecommunity_val *rt) + /* + * Is specified VRF present on the RT's list of "importing" VRFs? + */ +-static int is_vrf_present_in_irt_vrfs(struct list *vrfs, struct bgp *bgp_vrf) ++int is_vrf_present_in_irt_vrfs(struct list *vrfs, struct bgp *bgp_vrf) + { + struct listnode *node = NULL, *nnode = NULL; + struct bgp *tmp_bgp_vrf = NULL; +@@ -226,7 +224,7 @@ static int is_vrf_present_in_irt_vrfs(struct list *vrfs, struct bgp *bgp_vrf) + /* + * Make import route target hash key. + */ +-static unsigned int import_rt_hash_key_make(const void *p) ++unsigned int import_rt_hash_key_make(const void *p) + { + const struct irt_node *irt = p; + const char *pnt = irt->rt.val; +@@ -237,7 +235,7 @@ static unsigned int import_rt_hash_key_make(const void *p) + /* + * Comparison function for import rt hash + */ +-static bool import_rt_hash_cmp(const void *p1, const void *p2) ++bool import_rt_hash_cmp(const void *p1, const void *p2) + { + const struct irt_node *irt1 = p1; + const struct irt_node *irt2 = p2; +@@ -248,7 +246,7 @@ static bool import_rt_hash_cmp(const void *p1, const void *p2) + /* + * Create a new import_rt + */ +-static struct irt_node *import_rt_new(struct bgp *bgp, ++struct irt_node *import_rt_new(struct bgp *bgp, + struct ecommunity_val *rt) + { + struct irt_node *irt; +@@ -267,14 +265,14 @@ static struct irt_node *import_rt_new(struct bgp *bgp, + /* + * Free the import rt node + */ +-static void import_rt_free(struct bgp *bgp, struct irt_node *irt) ++void import_rt_free(struct bgp *bgp, struct irt_node *irt) + { + hash_release(bgp->import_rt_hash, irt); + list_delete(&irt->vnis); + XFREE(MTYPE_BGP_EVPN_IMPORT_RT, irt); + } + +-static void hash_import_rt_free(struct irt_node *irt) ++void hash_import_rt_free(struct irt_node *irt) + { + XFREE(MTYPE_BGP_EVPN_IMPORT_RT, irt); + } +@@ -283,7 +281,7 @@ static void hash_import_rt_free(struct irt_node *irt) + * Function to lookup Import RT node - used to map a RT to set of + * VNIs importing routes with that RT. + */ +-static struct irt_node *lookup_import_rt(struct bgp *bgp, ++struct irt_node *lookup_import_rt(struct bgp *bgp, + struct ecommunity_val *rt) + { + struct irt_node *irt; +@@ -298,7 +296,7 @@ static struct irt_node *lookup_import_rt(struct bgp *bgp, + /* + * Is specified VNI present on the RT's list of "importing" VNIs? + */ +-static int is_vni_present_in_irt_vnis(struct list *vnis, struct bgpevpn *vpn) ++int is_vni_present_in_irt_vnis(struct list *vnis, struct bgpevpn *vpn) + { + struct listnode *node, *nnode; + struct bgpevpn *tmp_vpn; +@@ -384,7 +382,7 @@ int bgp_evpn_route_target_cmp(struct ecommunity *ecom1, + /* + * Compare L3 Route Targets. + */ +-static int evpn_vrf_route_target_cmp(struct vrf_route_target *rt1, ++int evpn_vrf_route_target_cmp(struct vrf_route_target *rt1, + struct vrf_route_target *rt2) + { + return bgp_evpn_route_target_cmp(rt1->ecom, rt2->ecom); +@@ -399,7 +397,7 @@ void bgp_evpn_xxport_delete_ecomm(void *val) + /* + * Delete l3 Route Target. + */ +-static void evpn_vrf_rt_del(void *val) ++void evpn_vrf_rt_del(void *val) + { + struct vrf_route_target *l3rt = val; + +@@ -411,7 +409,7 @@ static void evpn_vrf_rt_del(void *val) + /* + * Allocate a new l3 Route Target. + */ +-static struct vrf_route_target *evpn_vrf_rt_new(struct ecommunity *ecom) ++struct vrf_route_target *evpn_vrf_rt_new(struct ecommunity *ecom) + { + struct vrf_route_target *l3rt; + +@@ -446,7 +444,7 @@ static inline void mask_ecom_global_admin(struct ecommunity_val *dst, + * Converts the RT to Ecommunity Value and adjusts masking based + * on flags set for RT. + */ +-static void vrf_rt2ecom_val(struct ecommunity_val *to_eval, ++void vrf_rt2ecom_val(struct ecommunity_val *to_eval, + const struct vrf_route_target *l3rt, int iter) + { + const struct ecommunity_val *eval; +@@ -470,7 +468,7 @@ static void vrf_rt2ecom_val(struct ecommunity_val *to_eval, + * Map one RT to specified VRF. + * bgp_vrf = BGP vrf instance + */ +-static void map_vrf_to_rt(struct bgp *bgp_vrf, struct vrf_route_target *l3rt) ++void map_vrf_to_rt(struct bgp *bgp_vrf, struct vrf_route_target *l3rt) + { + uint32_t i = 0; + +@@ -499,7 +497,7 @@ static void map_vrf_to_rt(struct bgp *bgp_vrf, struct vrf_route_target *l3rt) + * VRFs for this RT, then the RT hash is deleted. + * bgp_vrf: BGP VRF specific instance + */ +-static void unmap_vrf_from_rt(struct bgp *bgp_vrf, ++void unmap_vrf_from_rt(struct bgp *bgp_vrf, + struct vrf_route_target *l3rt) + { + uint32_t i; +@@ -527,7 +525,7 @@ static void unmap_vrf_from_rt(struct bgp *bgp_vrf, + /* + * Map one RT to specified VNI. + */ +-static void map_vni_to_rt(struct bgp *bgp, struct bgpevpn *vpn, ++void map_vni_to_rt(struct bgp *bgp, struct bgpevpn *vpn, + struct ecommunity_val *eval) + { + struct irt_node *irt; +@@ -558,7 +556,7 @@ static void map_vni_to_rt(struct bgp *bgp, struct bgpevpn *vpn, + * Unmap specified VNI from specified RT. If there are no other + * VNIs for this RT, then the RT hash is deleted. + */ +-static void unmap_vni_from_rt(struct bgp *bgp, struct bgpevpn *vpn, ++void unmap_vni_from_rt(struct bgp *bgp, struct bgpevpn *vpn, + struct irt_node *irt) + { + /* Delete VNI from hash list for this RT. */ +@@ -568,7 +566,7 @@ static void unmap_vni_from_rt(struct bgp *bgp, struct bgpevpn *vpn, + } + } + +-static void bgp_evpn_get_rmac_nexthop(struct bgpevpn *vpn, ++void bgp_evpn_get_rmac_nexthop(struct bgpevpn *vpn, + const struct prefix_evpn *p, + struct attr *attr, uint8_t flags) + { +@@ -609,7 +607,7 @@ static void bgp_evpn_get_rmac_nexthop(struct bgpevpn *vpn, + * VNIs but the same across routers (in the same AS) for a particular + * VNI. + */ +-static void form_auto_rt(struct bgp *bgp, vni_t vni, struct list *rtl, ++void form_auto_rt(struct bgp *bgp, vni_t vni, struct list *rtl, + bool is_l3) + { + struct ecommunity_val eval; +@@ -657,7 +655,7 @@ static void form_auto_rt(struct bgp *bgp, vni_t vni, struct list *rtl, + * Derive RD and RT for a VNI automatically. Invoked at the time of + * creation of a VNI. + */ +-static void derive_rd_rt_for_vni(struct bgp *bgp, struct bgpevpn *vpn) ++void derive_rd_rt_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + { + bgp_evpn_derive_auto_rd(bgp, vpn); + bgp_evpn_derive_auto_rt_import(bgp, vpn); +@@ -667,7 +665,7 @@ static void derive_rd_rt_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + /* + * Convert nexthop (remote VTEP IP) into an IPv6 address. + */ +-static void evpn_convert_nexthop_to_ipv6(struct attr *attr) ++void evpn_convert_nexthop_to_ipv6(struct attr *attr) + { + if (BGP_ATTR_NEXTHOP_AFI_IP6(attr)) + return; +@@ -892,7 +890,7 @@ struct bgp_dest *bgp_evpn_vni_node_lookup(const struct bgpevpn *vpn, /* * Add (update) or delete MACIP from zebra. */ -static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn, -- const struct prefix_evpn *p, -- const struct ethaddr *mac, -- struct in_addr remote_vtep_ip, int add, -- uint8_t flags, uint32_t seq, esi_t *esi) -+static enum zclient_send_status bgp_zebra_send_remote_macip( -+ struct bgp *bgp, struct bgpevpn *vpn, const struct prefix_evpn *p, -+ const struct ethaddr *mac, struct in_addr remote_vtep_ip, int add, -+ uint8_t flags, uint32_t seq, esi_t *esi) - { - struct stream *s; - uint16_t ipa_len; -@@ -875,8 +874,12 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn, ++enum zclient_send_status bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn, + const struct prefix_evpn *p, + const struct ethaddr *mac, + struct in_addr remote_vtep_ip, int add, +@@ -903,9 +901,12 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn, + static struct in_addr zero_remote_vtep_ip; bool esi_valid; - - /* Check socket. */ + +- /* Check socket. */ - if (!zclient || zclient->sock < 0) - return 0; + if (!zclient || zclient->sock < 0) { @@ -49,33 +335,30 @@ index 2b2cfa0f4c..622fd6afd2 100644 + __func__); + return ZCLIENT_SEND_SUCCESS; + } - + /* Don't try to register if Zebra doesn't know of this instance. */ if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) { -@@ -884,7 +887,7 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn, +@@ -913,7 +914,7 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn, zlog_debug( "%s: No zebra instance to talk to, not installing remote macip", __func__); - return 0; + return ZCLIENT_SEND_SUCCESS; } - + if (!esi) -@@ -956,15 +959,20 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn, +@@ -988,15 +989,18 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn, /* * Add (update) or delete remote VTEP from zebra. */ -static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, -- const struct prefix_evpn *p, -- int flood_control, int add) -+static enum zclient_send_status -+bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, -+ const struct prefix_evpn *p, int flood_control, -+ int add) ++enum zclient_send_status bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, + const struct prefix_evpn *p, + int flood_control, int add) { struct stream *s; - - /* Check socket. */ + +- /* Check socket. */ - if (!zclient || zclient->sock < 0) - return 0; + if (!zclient || zclient->sock < 0) { @@ -84,83 +367,95 @@ index 2b2cfa0f4c..622fd6afd2 100644 + __func__); + return ZCLIENT_SEND_SUCCESS; + } - + /* Don't try to register if Zebra doesn't know of this instance. */ if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) { -@@ -972,7 +980,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, +@@ -1004,7 +1008,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, zlog_debug( "%s: No zebra instance to talk to, not installing remote vtep", __func__); - return 0; + return ZCLIENT_SEND_SUCCESS; } - + s = zclient->obuf; -@@ -989,7 +997,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, +@@ -1021,7 +1025,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, EC_BGP_VTEP_INVALID, "Bad remote IP when trying to %s remote VTEP for VNI %u", - add ? "ADD" : "DEL", vpn->vni); + add ? "ADD" : "DEL", (vpn ? vpn->vni : 0)); - return -1; + return ZCLIENT_SEND_FAILURE; } stream_putl(s, flood_control); - -@@ -1222,14 +1230,15 @@ static void add_mac_mobility_to_attr(uint32_t seq_num, struct attr *attr) + +@@ -1043,7 +1047,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, + /* + * Build extended communities for EVPN prefix route. + */ +-static void build_evpn_type5_route_extcomm(struct bgp *bgp_vrf, ++void build_evpn_type5_route_extcomm(struct bgp *bgp_vrf, + struct attr *attr) + { + struct ecommunity ecom_encap; +@@ -1100,7 +1104,7 @@ static void build_evpn_type5_route_extcomm(struct bgp *bgp_vrf, + * added, if present, based on passed settings - only for non-link-local + * type-2 routes. + */ +-static void build_evpn_route_extcomm(struct bgpevpn *vpn, struct attr *attr, ++void build_evpn_route_extcomm(struct bgpevpn *vpn, struct attr *attr, + int add_l3_ecomm, + struct ecommunity *macvrf_soo) + { +@@ -1209,7 +1213,7 @@ static void build_evpn_route_extcomm(struct bgpevpn *vpn, struct attr *attr, + /* + * Add MAC mobility extended community to attribute. + */ +-static void add_mac_mobility_to_attr(uint32_t seq_num, struct attr *attr) ++void add_mac_mobility_to_attr(uint32_t seq_num, struct attr *attr) + { + struct ecommunity ecom_tmp; + struct ecommunity_val eval; +@@ -1263,14 +1267,14 @@ static void add_mac_mobility_to_attr(uint32_t seq_num, struct attr *attr) } - + /* Install EVPN route into zebra. */ -static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn, -- const struct prefix_evpn *p, -- struct bgp_path_info *pi) -+enum zclient_send_status evpn_zebra_install(struct bgp *bgp, -+ struct bgpevpn *vpn, -+ const struct prefix_evpn *p, -+ struct bgp_path_info *pi) ++enum zclient_send_status evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn, + const struct prefix_evpn *p, + struct bgp_path_info *pi) { - int ret; uint8_t flags; - int flood_control; + int flood_control = VXLAN_FLOOD_DISABLED; uint32_t seq; + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; - + if (p->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE) { flags = 0; -@@ -1302,6 +1311,7 @@ static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn, - flood_control = VXLAN_FLOOD_DISABLED; - break; - } -+ - ret = bgp_zebra_send_remote_vtep(bgp, vpn, p, flood_control, 1); - } - -@@ -1309,11 +1319,13 @@ static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn, +@@ -1355,11 +1359,11 @@ static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn, } - + /* Uninstall EVPN route from zebra. */ -static int evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn, -- const struct prefix_evpn *p, -- struct bgp_path_info *pi, bool is_sync) -+enum zclient_send_status evpn_zebra_uninstall(struct bgp *bgp, -+ struct bgpevpn *vpn, -+ const struct prefix_evpn *p, -+ struct bgp_path_info *pi, -+ bool is_sync) ++enum zclient_send_status evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn, + const struct prefix_evpn *p, + struct bgp_path_info *pi, bool is_sync) { - int ret; + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; - + if (p->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE) ret = bgp_zebra_send_remote_macip( -@@ -1328,7 +1340,7 @@ static int evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn, - ret = bgp_evpn_remote_es_evi_del(bgp, vpn, p); - else - ret = bgp_zebra_send_remote_vtep(bgp, vpn, p, -- VXLAN_FLOOD_DISABLED, 0); -+ VXLAN_FLOOD_DISABLED, 0); - - return ret; - } -@@ -1419,12 +1431,18 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, +@@ -1384,7 +1388,7 @@ static int evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn, + * by a "remote" best route. The prior route has to be deleted and withdrawn + * from peers. + */ +-static void evpn_delete_old_local_route(struct bgp *bgp, struct bgpevpn *vpn, ++void evpn_delete_old_local_route(struct bgp *bgp, struct bgpevpn *vpn, + struct bgp_dest *dest, + struct bgp_path_info *old_local, + struct bgp_path_info *new_select) +@@ -1465,12 +1469,17 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, && !CHECK_FLAG(dest->flags, BGP_NODE_USER_CLEAR) && !CHECK_FLAG(old_select->flags, BGP_PATH_ATTR_CHANGED) && !bgp_addpath_is_addpath_used(&bgp->tx_addpath, afi, safi)) { @@ -181,11 +476,10 @@ index 2b2cfa0f4c..622fd6afd2 100644 + bgp_zebra_route_install(dest, old_select, bgp, + true, vpn, false); + } -+ UNSET_FLAG(old_select->flags, BGP_PATH_MULTIPATH_CHG); UNSET_FLAG(old_select->flags, BGP_PATH_LINK_BW_CHG); bgp_zebra_clear_route_change_flags(dest); -@@ -1456,10 +1474,14 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, +@@ -1502,10 +1511,14 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, if (new_select && new_select->type == ZEBRA_ROUTE_BGP && (new_select->sub_type == BGP_ROUTE_IMPORTED || bgp_evpn_attr_is_sync(new_select->attr))) { @@ -201,10 +495,10 @@ index 2b2cfa0f4c..622fd6afd2 100644 + else + bgp_zebra_route_install(dest, new_select, bgp, true, + vpn, false); - + /* If an old best existed and it was a "local" route, the only * reason -@@ -1476,13 +1498,20 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, +@@ -1522,13 +1535,20 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, evpn_delete_old_local_route(bgp, vpn, dest, old_select, new_select); } else { @@ -230,9 +524,72 @@ index 2b2cfa0f4c..622fd6afd2 100644 + false, vpn, false); + } } - + /* Clear any route change flags. */ -@@ -2012,9 +2041,19 @@ static void evpn_zebra_reinstall_best_route(struct bgp *bgp, +@@ -1541,7 +1561,7 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, + return ret; + } + +-static struct bgp_path_info *bgp_evpn_route_get_local_path( ++struct bgp_path_info *bgp_evpn_route_get_local_path( + struct bgp *bgp, struct bgp_dest *dest) + { + struct bgp_path_info *tmp_pi; +@@ -1558,7 +1578,7 @@ static struct bgp_path_info *bgp_evpn_route_get_local_path( + return local_pi; + } + +-static int update_evpn_type5_route_entry(struct bgp *bgp_evpn, ++int update_evpn_type5_route_entry(struct bgp *bgp_evpn, + struct bgp *bgp_vrf, afi_t afi, + safi_t safi, struct bgp_dest *dest, + struct attr *attr, int *route_changed) +@@ -1627,7 +1647,7 @@ static int update_evpn_type5_route_entry(struct bgp *bgp_evpn, + } + + /* update evpn type-5 route entry */ +-static int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp, ++int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp, + struct attr *src_attr, afi_t src_afi, + safi_t src_safi) + { +@@ -1732,7 +1752,7 @@ static int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp, + return 0; + } + +-static void bgp_evpn_get_sync_info(struct bgp *bgp, esi_t *esi, ++void bgp_evpn_get_sync_info(struct bgp *bgp, esi_t *esi, + struct bgp_dest *dest, uint32_t loc_seq, + uint32_t *max_sync_seq, bool *active_on_peer, + bool *peer_router, bool *proxy_from_peer, +@@ -1809,7 +1829,7 @@ static void bgp_evpn_get_sync_info(struct bgp *bgp, esi_t *esi, + * Note: The local path can only exist as a best path in the + * VPN route table. It will take precedence over all sync paths. + */ +-static void update_evpn_route_entry_sync_info(struct bgp *bgp, ++void update_evpn_route_entry_sync_info(struct bgp *bgp, + struct bgp_dest *dest, + struct attr *attr, + uint32_t loc_seq, bool setup_sync, +@@ -1879,7 +1899,7 @@ static void update_evpn_route_entry_sync_info(struct bgp *bgp, + * Create or update EVPN route entry. This could be in the VNI route tables + * or the global route table. + */ +-static int update_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn, ++int update_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn, + afi_t afi, safi_t safi, + struct bgp_dest *dest, struct attr *attr, + const struct ethaddr *mac, +@@ -2044,7 +2064,7 @@ static int update_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn, + return route_change; + } + +-static void evpn_zebra_reinstall_best_route(struct bgp *bgp, ++void evpn_zebra_reinstall_best_route(struct bgp *bgp, + struct bgpevpn *vpn, + struct bgp_dest *dest) + { +@@ -2062,9 +2082,19 @@ static void evpn_zebra_reinstall_best_route(struct bgp *bgp, if (curr_select && curr_select->type == ZEBRA_ROUTE_BGP && (curr_select->sub_type == BGP_ROUTE_IMPORTED || bgp_evpn_attr_is_sync(curr_select->attr))) @@ -253,9 +610,36 @@ index 2b2cfa0f4c..622fd6afd2 100644 + true, vpn, false); + } } - + /* -@@ -2189,8 +2228,16 @@ static int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, +@@ -2081,7 +2111,7 @@ static void evpn_zebra_reinstall_best_route(struct bgp *bgp, + * additional handling to prevent bgp from injecting and holding on to a + * non-best local path. + */ +-static struct bgp_dest * ++struct bgp_dest * + evpn_cleanup_local_non_best_route(struct bgp *bgp, struct bgpevpn *vpn, + struct bgp_dest *dest, + struct bgp_path_info *local_pi) +@@ -2099,7 +2129,7 @@ evpn_cleanup_local_non_best_route(struct bgp *bgp, struct bgpevpn *vpn, + return bgp_path_info_reap(dest, local_pi); + } + +-static inline bool bgp_evpn_route_add_l3_ecomm_ok(struct bgpevpn *vpn, ++inline bool bgp_evpn_route_add_l3_ecomm_ok(struct bgpevpn *vpn, + const struct prefix_evpn *p, + esi_t *esi) + { +@@ -2116,7 +2146,7 @@ static inline bool bgp_evpn_route_add_l3_ecomm_ok(struct bgpevpn *vpn, + * Create or update EVPN route (of type based on prefix) for specified VNI + * and schedule for processing. + */ +-static int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, ++int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, + struct prefix_evpn *p, uint8_t flags, + uint32_t seq, esi_t *esi) + { +@@ -2245,8 +2275,16 @@ static int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, * has been removed. */ new_is_sync = bgp_evpn_attr_is_sync(pi->attr); @@ -274,7 +658,33 @@ index 2b2cfa0f4c..622fd6afd2 100644 } } bgp_path_info_unlock(pi); -@@ -2444,8 +2491,16 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn, +@@ -2308,7 +2346,7 @@ void delete_evpn_route_entry(struct bgp *bgp, afi_t afi, safi_t safi, + } + + /* Delete EVPN type5 route */ +-static int delete_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp) ++int delete_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp) + { + afi_t afi = AFI_L2VPN; + safi_t safi = SAFI_EVPN; +@@ -2339,7 +2377,7 @@ static int delete_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp) + * Delete EVPN route (of type based on prefix) for specified VNI and + * schedule for processing. + */ +-static int delete_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, ++int delete_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, + struct prefix_evpn *p) + { + struct bgp_dest *dest, *global_dest; +@@ -2408,6 +2446,7 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn, + int route_change; + bool old_is_sync = false; + struct ecommunity *macvrf_soo = NULL; ++ struct prefix_evpn p; + + if (CHECK_FLAG(local_pi->flags, BGP_PATH_REMOVED)) + return; +@@ -2512,8 +2551,16 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn, * has been removed. */ new_is_sync = bgp_evpn_attr_is_sync(pi->attr); @@ -283,8 +693,8 @@ index 2b2cfa0f4c..622fd6afd2 100644 + if (!new_is_sync && old_is_sync) { + if (CHECK_FLAG(bgp->flags, + BGP_FLAG_DELETE_IN_PROGRESS)) -+ (void)evpn_zebra_uninstall( -+ bgp, vpn, &evp, pi, true); ++ evpn_zebra_uninstall(bgp, vpn, &p, pi, ++ true); + else + bgp_zebra_route_install(dest, pi, bgp, + false, vpn, @@ -292,10 +702,100 @@ index 2b2cfa0f4c..622fd6afd2 100644 + } } } - -@@ -2701,7 +2756,22 @@ static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + +@@ -2541,7 +2588,7 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn, + aspath_unintern(&attr.aspath); + } + +-static void update_type2_route(struct bgp *bgp, struct bgpevpn *vpn, ++void update_type2_route(struct bgp *bgp, struct bgpevpn *vpn, + struct bgp_dest *dest) + { + struct bgp_path_info *tmp_pi; +@@ -2571,7 +2618,7 @@ static void update_type2_route(struct bgp *bgp, struct bgpevpn *vpn, + * Update all type-2 (MACIP) local routes for this VNI - these should also + * be scheduled for advertise to peers. + */ +-static void update_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn) ++void update_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn) + { + struct bgp_dest *dest; + +@@ -2592,7 +2639,7 @@ static void update_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn) + * Delete all type-2 (MACIP) local routes for this VNI - only from the + * global routing table. These are also scheduled for withdraw from peers. + */ +-static void delete_global_type2_routes(struct bgp *bgp, struct bgpevpn *vpn) ++void delete_global_type2_routes(struct bgp *bgp, struct bgpevpn *vpn) + { + afi_t afi; + safi_t safi; +@@ -2626,7 +2673,7 @@ static void delete_global_type2_routes(struct bgp *bgp, struct bgpevpn *vpn) + } + } + +-static struct bgp_dest *delete_vni_type2_route(struct bgp *bgp, ++struct bgp_dest *delete_vni_type2_route(struct bgp *bgp, + struct bgp_dest *dest) + { + struct bgp_path_info *pi; +@@ -2648,7 +2695,7 @@ static struct bgp_dest *delete_vni_type2_route(struct bgp *bgp, + return dest; + } + +-static void delete_vni_type2_routes(struct bgp *bgp, struct bgpevpn *vpn) ++void delete_vni_type2_routes(struct bgp *bgp, struct bgpevpn *vpn) + { + struct bgp_dest *dest; + +@@ -2672,7 +2719,7 @@ static void delete_vni_type2_routes(struct bgp *bgp, struct bgpevpn *vpn) + * Delete all type-2 (MACIP) local routes for this VNI - from the global + * table as well as the per-VNI route table. + */ +-static void delete_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn) ++void delete_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn) + { + /* First, walk the global route table for this VNI's type-2 local + * routes. +@@ -2685,7 +2732,7 @@ static void delete_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn) + /* + * Delete all routes in the per-VNI route table. + */ +-static void delete_all_vni_routes(struct bgp *bgp, struct bgpevpn *vpn) ++void delete_all_vni_routes(struct bgp *bgp, struct bgpevpn *vpn) + { + struct bgp_dest *dest; + struct bgp_path_info *pi, *nextpi; +@@ -2716,7 +2763,7 @@ static void delete_all_vni_routes(struct bgp *bgp, struct bgpevpn *vpn) + } + + /* BUM traffic flood mode per-l2-vni */ +-static int bgp_evpn_vni_flood_mode_get(struct bgp *bgp, ++int bgp_evpn_vni_flood_mode_get(struct bgp *bgp, + struct bgpevpn *vpn) + { + /* if flooding has been globally disabled per-vni mode is +@@ -2766,7 +2813,7 @@ int update_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + /* Update Type-2/3 Routes for L2VNI. + * Called by hash_iterate() + */ +-static void update_routes_for_vni_hash(struct hash_bucket *bucket, ++void update_routes_for_vni_hash(struct hash_bucket *bucket, + struct bgp *bgp) + { + struct bgpevpn *vpn; +@@ -2784,7 +2831,7 @@ static void update_routes_for_vni_hash(struct hash_bucket *bucket, + * the per-VNI table. Invoked upon the VNI being deleted or EVPN + * (advertise-all-vni) being disabled. + */ +-static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) ++int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + { + int ret; + struct prefix_evpn p; +@@ -2795,7 +2842,22 @@ static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) delete_all_type2_routes(bgp, vpn); - + build_evpn_type3_prefix(&p, vpn->originator_ip); + + /* @@ -315,8 +815,519 @@ index 2b2cfa0f4c..622fd6afd2 100644 + UNSET_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN); if (ret) return ret; - -@@ -6028,6 +6098,17 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni, + +@@ -2809,7 +2871,7 @@ static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + * remove the type-3 route if any. A new type-3 route will be generated + * post tunnel_ip update if the new flood mode is head-end-replication. + */ +-static int bgp_evpn_mcast_grp_change(struct bgp *bgp, struct bgpevpn *vpn, ++int bgp_evpn_mcast_grp_change(struct bgp *bgp, struct bgpevpn *vpn, + struct in_addr mcast_grp) + { + struct prefix_evpn p; +@@ -2833,7 +2895,7 @@ static int bgp_evpn_mcast_grp_change(struct bgp *bgp, struct bgpevpn *vpn, + * Note: Route re-advertisement happens elsewhere after other processing + * other changes. + */ +-static void handle_tunnel_ip_change(struct bgp *bgp_vrf, struct bgp *bgp_evpn, ++void handle_tunnel_ip_change(struct bgp *bgp_vrf, struct bgp *bgp_evpn, + struct bgpevpn *vpn, + struct in_addr originator_ip) + { +@@ -2882,7 +2944,7 @@ static void handle_tunnel_ip_change(struct bgp *bgp_vrf, struct bgp *bgp_evpn, + return; + } + +-static struct bgp_path_info * ++struct bgp_path_info * + bgp_create_evpn_bgp_path_info(struct bgp_path_info *parent_pi, + struct bgp_dest *dest, struct attr *attr) + { +@@ -2918,7 +2980,7 @@ bgp_create_evpn_bgp_path_info(struct bgp_path_info *parent_pi, + /* + * Install route entry into the VRF routing table and invoke route selection. + */ +-static int install_evpn_route_entry_in_vrf(struct bgp *bgp_vrf, ++int install_evpn_route_entry_in_vrf(struct bgp *bgp_vrf, + const struct prefix_evpn *evp, + struct bgp_path_info *parent_pi) + { +@@ -3102,7 +3164,7 @@ static int install_evpn_route_entry_in_vrf(struct bgp *bgp_vrf, + /* + * Common handling for vni route tables install/selection. + */ +-static int install_evpn_route_entry_in_vni_common( ++int install_evpn_route_entry_in_vni_common( + struct bgp *bgp, struct bgpevpn *vpn, const struct prefix_evpn *p, + struct bgp_dest *dest, struct bgp_path_info *parent_pi) + { +@@ -3202,7 +3264,7 @@ static int install_evpn_route_entry_in_vni_common( + /* + * Common handling for vni route tables uninstall/selection. + */ +-static int uninstall_evpn_route_entry_in_vni_common( ++int uninstall_evpn_route_entry_in_vni_common( + struct bgp *bgp, struct bgpevpn *vpn, const struct prefix_evpn *p, + struct bgp_dest *dest, struct bgp_path_info *parent_pi) + { +@@ -3243,7 +3305,7 @@ static int uninstall_evpn_route_entry_in_vni_common( + /* + * Install route entry into VNI IP table and invoke route selection. + */ +-static int install_evpn_route_entry_in_vni_ip(struct bgp *bgp, ++int install_evpn_route_entry_in_vni_ip(struct bgp *bgp, + struct bgpevpn *vpn, + const struct prefix_evpn *p, + struct bgp_path_info *parent_pi) +@@ -3270,7 +3332,7 @@ static int install_evpn_route_entry_in_vni_ip(struct bgp *bgp, + /* + * Install route entry into VNI MAC table and invoke route selection. + */ +-static int install_evpn_route_entry_in_vni_mac(struct bgp *bgp, ++int install_evpn_route_entry_in_vni_mac(struct bgp *bgp, + struct bgpevpn *vpn, + const struct prefix_evpn *p, + struct bgp_path_info *parent_pi) +@@ -3296,7 +3358,7 @@ static int install_evpn_route_entry_in_vni_mac(struct bgp *bgp, + /* + * Uninstall route entry from VNI IP table and invoke route selection. + */ +-static int uninstall_evpn_route_entry_in_vni_ip(struct bgp *bgp, ++int uninstall_evpn_route_entry_in_vni_ip(struct bgp *bgp, + struct bgpevpn *vpn, + const struct prefix_evpn *p, + struct bgp_path_info *parent_pi) +@@ -3325,7 +3387,7 @@ static int uninstall_evpn_route_entry_in_vni_ip(struct bgp *bgp, + /* + * Uninstall route entry from VNI IP table and invoke route selection. + */ +-static int ++int + uninstall_evpn_route_entry_in_vni_mac(struct bgp *bgp, struct bgpevpn *vpn, + const struct prefix_evpn *p, + struct bgp_path_info *parent_pi) +@@ -3353,7 +3415,7 @@ uninstall_evpn_route_entry_in_vni_mac(struct bgp *bgp, struct bgpevpn *vpn, + * Uninstall route entry from the VRF routing table and send message + * to zebra, if appropriate. + */ +-static int uninstall_evpn_route_entry_in_vrf(struct bgp *bgp_vrf, ++int uninstall_evpn_route_entry_in_vrf(struct bgp *bgp_vrf, + const struct prefix_evpn *evp, + struct bgp_path_info *parent_pi) + { +@@ -3445,7 +3507,7 @@ static int uninstall_evpn_route_entry_in_vrf(struct bgp *bgp_vrf, + /* + * Install route entry into the VNI routing tables. + */ +-static int install_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn, ++int install_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn, + const struct prefix_evpn *p, + struct bgp_path_info *parent_pi) + { +@@ -3484,7 +3546,7 @@ static int install_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn, + /* + * Uninstall route entry from the VNI routing tables. + */ +-static int uninstall_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn, ++int uninstall_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn, + const struct prefix_evpn *p, + struct bgp_path_info *parent_pi) + { +@@ -3524,7 +3586,7 @@ static int uninstall_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn, + * Given a route entry and a VRF, see if this route entry should be + * imported into the VRF i.e., RTs match + Site-of-Origin check passes. + */ +-static int is_route_matching_for_vrf(struct bgp *bgp_vrf, ++int is_route_matching_for_vrf(struct bgp *bgp_vrf, + struct bgp_path_info *pi) + { + struct attr *attr = pi->attr; +@@ -3591,7 +3653,7 @@ static int is_route_matching_for_vrf(struct bgp *bgp_vrf, + * Given a route entry and a VNI, see if this route entry should be + * imported into the VNI i.e., RTs match. + */ +-static int is_route_matching_for_vni(struct bgp *bgp, struct bgpevpn *vpn, ++int is_route_matching_for_vni(struct bgp *bgp, struct bgpevpn *vpn, + struct bgp_path_info *pi) + { + struct attr *attr = pi->attr; +@@ -3654,7 +3716,7 @@ static int is_route_matching_for_vni(struct bgp *bgp, struct bgpevpn *vpn, + return 0; + } + +-static bool bgp_evpn_route_matches_macvrf_soo(struct bgp_path_info *pi, ++bool bgp_evpn_route_matches_macvrf_soo(struct bgp_path_info *pi, + const struct prefix_evpn *evp) + { + struct bgp *bgp_evpn = bgp_get_evpn(); +@@ -3693,7 +3755,7 @@ static bool bgp_evpn_route_matches_macvrf_soo(struct bgp_path_info *pi, + * macthes with bgp instance router mac. It avoid installing + * route into bgp vrf table and remote rmac in bridge table. + */ +-static int bgp_evpn_route_rmac_self_check(struct bgp *bgp_vrf, ++int bgp_evpn_route_rmac_self_check(struct bgp *bgp_vrf, + const struct prefix_evpn *evp, + struct bgp_path_info *pi) + { +@@ -3722,7 +3784,7 @@ static int bgp_evpn_route_rmac_self_check(struct bgp *bgp_vrf, + } + + /* don't import hosts that are locally attached */ +-static inline bool ++inline bool + bgp_evpn_skip_vrf_import_of_local_es(struct bgp *bgp_vrf, + const struct prefix_evpn *evp, + struct bgp_path_info *pi, int install) +@@ -3799,7 +3861,7 @@ int bgp_evpn_route_entry_install_if_vrf_match(struct bgp *bgp_vrf, + * Install or uninstall mac-ip routes are appropriate for this + * particular VRF. + */ +-static int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install) ++int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install) + { + afi_t afi; + safi_t safi; +@@ -3862,7 +3924,7 @@ static int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install) + * Install or uninstall routes of specified type that are appropriate for this + * particular VNI. + */ +-static int install_uninstall_routes_for_vni(struct bgp *bgp, ++int install_uninstall_routes_for_vni(struct bgp *bgp, + struct bgpevpn *vpn, + bgp_evpn_route_type rtype, + int install) +@@ -3948,7 +4010,7 @@ static int install_uninstall_routes_for_vni(struct bgp *bgp, + /* Install any existing remote routes applicable for this VRF into VRF RIB. This + * is invoked upon l3vni-add or l3vni import rt change + */ +-static int install_routes_for_vrf(struct bgp *bgp_vrf) ++int install_routes_for_vrf(struct bgp *bgp_vrf) + { + install_uninstall_routes_for_vrf(bgp_vrf, 1); + return 0; +@@ -3959,7 +4021,7 @@ static int install_routes_for_vrf(struct bgp *bgp_vrf) + * routing table. This is invoked when a VNI becomes "live" or its Import + * RT is changed. + */ +-static int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) ++int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + { + int ret; + +@@ -3981,7 +4043,7 @@ static int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + } + + /* uninstall routes from l3vni vrf. */ +-static int uninstall_routes_for_vrf(struct bgp *bgp_vrf) ++int uninstall_routes_for_vrf(struct bgp *bgp_vrf) + { + install_uninstall_routes_for_vrf(bgp_vrf, 0); + return 0; +@@ -3991,7 +4053,7 @@ static int uninstall_routes_for_vrf(struct bgp *bgp_vrf) + * Uninstall any existing remote routes for this VNI. One scenario in which + * this is invoked is upon an import RT change. + */ +-static int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) ++int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + { + int ret; + +@@ -4017,7 +4079,7 @@ static int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + /* + * Install or uninstall route in matching VRFs (list). + */ +-static int install_uninstall_route_in_vrfs(struct bgp *bgp_def, afi_t afi, ++int install_uninstall_route_in_vrfs(struct bgp *bgp_def, afi_t afi, + safi_t safi, struct prefix_evpn *evp, + struct bgp_path_info *pi, + struct list *vrfs, int install) +@@ -4066,7 +4128,7 @@ static int install_uninstall_route_in_vrfs(struct bgp *bgp_def, afi_t afi, + /* + * Install or uninstall route in matching VNIs (list). + */ +-static int install_uninstall_route_in_vnis(struct bgp *bgp, afi_t afi, ++int install_uninstall_route_in_vnis(struct bgp *bgp, afi_t afi, + safi_t safi, struct prefix_evpn *evp, + struct bgp_path_info *pi, + struct list *vnis, int install) +@@ -4103,7 +4165,7 @@ static int install_uninstall_route_in_vnis(struct bgp *bgp, afi_t afi, + /* + * Install or uninstall route for appropriate VNIs/ESIs. + */ +-static int bgp_evpn_install_uninstall_table(struct bgp *bgp, afi_t afi, ++int bgp_evpn_install_uninstall_table(struct bgp *bgp, afi_t afi, + safi_t safi, const struct prefix *p, + struct bgp_path_info *pi, + int import, bool in_vni_rt, +@@ -4246,7 +4308,7 @@ static int bgp_evpn_install_uninstall_table(struct bgp *bgp, afi_t afi, + /* + * Install or uninstall route for appropriate VNIs/ESIs. + */ +-static int install_uninstall_evpn_route(struct bgp *bgp, afi_t afi, safi_t safi, ++int install_uninstall_evpn_route(struct bgp *bgp, afi_t afi, safi_t safi, + const struct prefix *p, + struct bgp_path_info *pi, int import) + { +@@ -4270,7 +4332,7 @@ void bgp_evpn_import_type2_route(struct bgp_path_info *pi, int import) + * delete and withdraw all ipv4 and ipv6 routes in the vrf table as type-5 + * routes + */ +-static void delete_withdraw_vrf_routes(struct bgp *bgp_vrf) ++void delete_withdraw_vrf_routes(struct bgp *bgp_vrf) + { + /* Delete ipv4 default route and withdraw from peers */ + if (evpn_default_originate_set(bgp_vrf, AFI_IP, SAFI_UNICAST)) +@@ -4329,7 +4391,7 @@ void update_advertise_vrf_routes(struct bgp *bgp_vrf) + * done in the global route table using the routes which already exist in the + * VRF routing table + */ +-static void update_router_id_vrf(struct bgp *bgp_vrf) ++void update_router_id_vrf(struct bgp *bgp_vrf) + { + /* skip if the RD is configured */ + if (is_vrf_rd_configured(bgp_vrf)) +@@ -4347,7 +4409,7 @@ static void update_router_id_vrf(struct bgp *bgp_vrf) + * This is invoked upon VRF RD change. The processing is done only from global + * table. + */ +-static void withdraw_router_id_vrf(struct bgp *bgp_vrf) ++void withdraw_router_id_vrf(struct bgp *bgp_vrf) + { + /* skip if the RD is configured */ + if (is_vrf_rd_configured(bgp_vrf)) +@@ -4357,7 +4419,7 @@ static void withdraw_router_id_vrf(struct bgp *bgp_vrf) + delete_withdraw_vrf_routes(bgp_vrf); + } + +-static void update_advertise_vni_route(struct bgp *bgp, struct bgpevpn *vpn, ++void update_advertise_vni_route(struct bgp *bgp, struct bgpevpn *vpn, + struct bgp_dest *dest) + { + struct bgp_dest *global_dest; +@@ -4440,7 +4502,7 @@ static void update_advertise_vni_route(struct bgp *bgp, struct bgpevpn *vpn, + * change. Note that the processing is done only on the global route table + * using routes that already exist in the per-VNI table. + */ +-static void update_advertise_vni_routes(struct bgp *bgp, struct bgpevpn *vpn) ++void update_advertise_vni_routes(struct bgp *bgp, struct bgpevpn *vpn) + { + struct prefix_evpn p; + struct bgp_dest *dest, *global_dest; +@@ -4501,7 +4563,7 @@ static void update_advertise_vni_routes(struct bgp *bgp, struct bgpevpn *vpn) + * Delete (and withdraw) local routes for a VNI - only from the global + * table. Invoked upon router-id change. + */ +-static int delete_withdraw_vni_routes(struct bgp *bgp, struct bgpevpn *vpn) ++int delete_withdraw_vni_routes(struct bgp *bgp, struct bgpevpn *vpn) + { + struct prefix_evpn p; + struct bgp_dest *global_dest; +@@ -4541,7 +4603,7 @@ static int delete_withdraw_vni_routes(struct bgp *bgp, struct bgpevpn *vpn) + * router-id. The routes in the per-VNI table are used to create routes in + * the global table and schedule them. + */ +-static void update_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp) ++void update_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp) + { + struct bgpevpn *vpn = (struct bgpevpn *)bucket->data; + +@@ -4559,7 +4621,7 @@ static void update_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp) + * the router-id and is done only on the global route table, the routes + * are needed in the per-VNI table to re-advertise with new router id. + */ +-static void withdraw_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp) ++void withdraw_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp) + { + struct bgpevpn *vpn = (struct bgpevpn *)bucket->data; + +@@ -4574,7 +4636,7 @@ static void withdraw_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp) + * Create RT-3 for a VNI and schedule for processing and advertisement. + * This is invoked upon flooding mode changing to head-end replication. + */ +-static void create_advertise_type3(struct hash_bucket *bucket, void *data) ++void create_advertise_type3(struct hash_bucket *bucket, void *data) + { + struct bgpevpn *vpn = bucket->data; + struct bgp *bgp = data; +@@ -4595,7 +4657,7 @@ static void create_advertise_type3(struct hash_bucket *bucket, void *data) + * Delete RT-3 for a VNI and schedule for processing and withdrawal. + * This is invoked upon flooding mode changing to drop BUM packets. + */ +-static void delete_withdraw_type3(struct hash_bucket *bucket, void *data) ++void delete_withdraw_type3(struct hash_bucket *bucket, void *data) + { + struct bgpevpn *vpn = bucket->data; + struct bgp *bgp = data; +@@ -4611,7 +4673,7 @@ static void delete_withdraw_type3(struct hash_bucket *bucket, void *data) + /* + * Process received EVPN type-2 route (advertise or withdraw). + */ +-static int process_type2_route(struct peer *peer, afi_t afi, safi_t safi, ++int process_type2_route(struct peer *peer, afi_t afi, safi_t safi, + struct attr *attr, uint8_t *pfx, int psize, + uint32_t addpath_id) + { +@@ -4740,7 +4802,7 @@ done: + /* + * Process received EVPN type-3 route (advertise or withdraw). + */ +-static int process_type3_route(struct peer *peer, afi_t afi, safi_t safi, ++int process_type3_route(struct peer *peer, afi_t afi, safi_t safi, + struct attr *attr, uint8_t *pfx, int psize, + uint32_t addpath_id) + { +@@ -4821,7 +4883,7 @@ static int process_type3_route(struct peer *peer, afi_t afi, safi_t safi, + /* + * Process received EVPN type-5 route (advertise or withdraw). + */ +-static int process_type5_route(struct peer *peer, afi_t afi, safi_t safi, ++int process_type5_route(struct peer *peer, afi_t afi, safi_t safi, + struct attr *attr, uint8_t *pfx, int psize, + uint32_t addpath_id) + { +@@ -4963,7 +5025,7 @@ static int process_type5_route(struct peer *peer, afi_t afi, safi_t safi, + return 0; + } + +-static void evpn_mpattr_encode_type5(struct stream *s, const struct prefix *p, ++void evpn_mpattr_encode_type5(struct stream *s, const struct prefix *p, + const struct prefix_rd *prd, + mpls_label_t *label, uint32_t num_labels, + struct attr *attr) +@@ -5022,7 +5084,7 @@ static void evpn_mpattr_encode_type5(struct stream *s, const struct prefix *p, + /* + * Cleanup specific VNI upon EVPN (advertise-all-vni) being disabled. + */ +-static void cleanup_vni_on_disable(struct hash_bucket *bucket, struct bgp *bgp) ++void cleanup_vni_on_disable(struct hash_bucket *bucket, struct bgp *bgp) + { + struct bgpevpn *vpn = (struct bgpevpn *)bucket->data; + +@@ -5038,7 +5100,7 @@ static void cleanup_vni_on_disable(struct hash_bucket *bucket, struct bgp *bgp) + /* + * Free a VNI entry; iterator function called during cleanup. + */ +-static void free_vni_entry(struct hash_bucket *bucket, struct bgp *bgp) ++void free_vni_entry(struct hash_bucket *bucket, struct bgp *bgp) + { + struct bgpevpn *vpn = (struct bgpevpn *)bucket->data; + +@@ -5049,7 +5111,7 @@ static void free_vni_entry(struct hash_bucket *bucket, struct bgp *bgp) + /* + * Derive AUTO import RT for BGP VRF - L3VNI + */ +-static void evpn_auto_rt_import_add_for_vrf(struct bgp *bgp_vrf) ++void evpn_auto_rt_import_add_for_vrf(struct bgp *bgp_vrf) + { + struct bgp *bgp_evpn = NULL; + +@@ -5067,7 +5129,7 @@ static void evpn_auto_rt_import_add_for_vrf(struct bgp *bgp_vrf) + /* + * Delete AUTO import RT from BGP VRF - L3VNI + */ +-static void evpn_auto_rt_import_delete_for_vrf(struct bgp *bgp_vrf) ++void evpn_auto_rt_import_delete_for_vrf(struct bgp *bgp_vrf) + { + evpn_rt_delete_auto(bgp_vrf, bgp_vrf->l3vni, bgp_vrf->vrf_import_rtl, + true); +@@ -5076,7 +5138,7 @@ static void evpn_auto_rt_import_delete_for_vrf(struct bgp *bgp_vrf) + /* + * Derive AUTO export RT for BGP VRF - L3VNI + */ +-static void evpn_auto_rt_export_add_for_vrf(struct bgp *bgp_vrf) ++void evpn_auto_rt_export_add_for_vrf(struct bgp *bgp_vrf) + { + form_auto_rt(bgp_vrf, bgp_vrf->l3vni, bgp_vrf->vrf_export_rtl, true); + } +@@ -5084,13 +5146,13 @@ static void evpn_auto_rt_export_add_for_vrf(struct bgp *bgp_vrf) + /* + * Delete AUTO export RT from BGP VRF - L3VNI + */ +-static void evpn_auto_rt_export_delete_for_vrf(struct bgp *bgp_vrf) ++void evpn_auto_rt_export_delete_for_vrf(struct bgp *bgp_vrf) + { + evpn_rt_delete_auto(bgp_vrf, bgp_vrf->l3vni, bgp_vrf->vrf_export_rtl, + true); + } + +-static void bgp_evpn_handle_export_rt_change_for_vrf(struct bgp *bgp_vrf) ++void bgp_evpn_handle_export_rt_change_for_vrf(struct bgp *bgp_vrf) + { + struct bgp *bgp_evpn = NULL; + struct listnode *node = NULL; +@@ -5111,7 +5173,7 @@ static void bgp_evpn_handle_export_rt_change_for_vrf(struct bgp *bgp_vrf) + /* + * Handle autort change for a given VNI. + */ +-static void update_autort_vni(struct hash_bucket *bucket, struct bgp *bgp) ++void update_autort_vni(struct hash_bucket *bucket, struct bgp *bgp) + { + struct bgpevpn *vpn = bucket->data; + +@@ -5135,7 +5197,7 @@ static void update_autort_vni(struct hash_bucket *bucket, struct bgp *bgp) + /* + * Handle autort change for L3VNI. + */ +-static void update_autort_l3vni(struct bgp *bgp) ++void update_autort_l3vni(struct bgp *bgp) + { + if ((CHECK_FLAG(bgp->vrf_flags, BGP_VRF_IMPORT_RT_CFGD)) + && (CHECK_FLAG(bgp->vrf_flags, BGP_VRF_EXPORT_RT_CFGD))) +@@ -5330,7 +5392,7 @@ void bgp_evpn_advertise_type5_routes(struct bgp *bgp_vrf, afi_t afi, + } + } + +-static void rt_list_remove_node(struct list *rt_list, ++void rt_list_remove_node(struct list *rt_list, + struct ecommunity *ecomdel, bool is_l3) + { + struct listnode *node = NULL, *nnode = NULL, *node_to_del = NULL; +@@ -5379,7 +5441,7 @@ void evpn_rt_delete_auto(struct bgp *bgp, vni_t vni, struct list *rtl, + ecommunity_free(&ecom_auto); + } + +-static void evpn_vrf_rt_routes_map(struct bgp *bgp_vrf) ++void evpn_vrf_rt_routes_map(struct bgp *bgp_vrf) + { + /* map VRFs to its RTs and install routes matching this new RT */ + if (is_l3vni_live(bgp_vrf)) { +@@ -5388,7 +5450,7 @@ static void evpn_vrf_rt_routes_map(struct bgp *bgp_vrf) + } + } + +-static void evpn_vrf_rt_routes_unmap(struct bgp *bgp_vrf) ++void evpn_vrf_rt_routes_unmap(struct bgp *bgp_vrf) + { + /* uninstall routes from vrf */ + if (is_l3vni_live(bgp_vrf)) +@@ -5398,7 +5460,7 @@ static void evpn_vrf_rt_routes_unmap(struct bgp *bgp_vrf) + bgp_evpn_unmap_vrf_from_its_rts(bgp_vrf); + } + +-static bool rt_list_has_cfgd_rt(struct list *rt_list) ++bool rt_list_has_cfgd_rt(struct list *rt_list) + { + struct listnode *node = NULL, *nnode = NULL; + struct vrf_route_target *l3rt = NULL; +@@ -5411,7 +5473,7 @@ static bool rt_list_has_cfgd_rt(struct list *rt_list) + return false; + } + +-static void unconfigure_import_rt_for_vrf_fini(struct bgp *bgp_vrf) ++void unconfigure_import_rt_for_vrf_fini(struct bgp *bgp_vrf) + { + if (!bgp_vrf->vrf_import_rtl) + return; /* this should never fail */ +@@ -5424,7 +5486,7 @@ static void unconfigure_import_rt_for_vrf_fini(struct bgp *bgp_vrf) + evpn_auto_rt_import_add_for_vrf(bgp_vrf); + } + +-static void unconfigure_export_rt_for_vrf_fini(struct bgp *bgp_vrf) ++void unconfigure_export_rt_for_vrf_fini(struct bgp *bgp_vrf) + { + + if (!bgp_vrf->vrf_export_rtl) +@@ -6262,6 +6324,16 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni, */ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn) { @@ -330,52 +1341,240 @@ index 2b2cfa0f4c..622fd6afd2 100644 + } else + zebra_announce_add_tail(&bm->zebra_announce_head, dest); + } -+ bgp_evpn_remote_ip_hash_destroy(vpn); bgp_evpn_vni_es_cleanup(vpn); bgpevpn_unlink_from_l3vni(vpn); +@@ -6279,7 +6351,7 @@ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn) + XFREE(MTYPE_BGP_EVPN, vpn); + } + +-static void hash_evpn_free(struct bgpevpn *vpn) ++void hash_evpn_free(struct bgpevpn *vpn) + { + XFREE(MTYPE_BGP_EVPN, vpn); + } +@@ -6646,7 +6718,7 @@ int bgp_evpn_local_macip_add(struct bgp *bgp, vni_t vni, struct ethaddr *mac, + return 0; + } + +-static void link_l2vni_hash_to_l3vni(struct hash_bucket *bucket, ++void link_l2vni_hash_to_l3vni(struct hash_bucket *bucket, + struct bgp *bgp_vrf) + { + struct bgpevpn *vpn = (struct bgpevpn *)bucket->data; +@@ -7265,7 +7337,7 @@ bool bgp_evpn_is_prefix_nht_supported(const struct prefix *pfx) + return false; + } + +-static void *bgp_evpn_remote_ip_hash_alloc(void *p) ++void *bgp_evpn_remote_ip_hash_alloc(void *p) + { + const struct evpn_remote_ip *key = (const struct evpn_remote_ip *)p; + struct evpn_remote_ip *ip; +@@ -7277,7 +7349,7 @@ static void *bgp_evpn_remote_ip_hash_alloc(void *p) + return ip; + } + +-static unsigned int bgp_evpn_remote_ip_hash_key_make(const void *p) ++unsigned int bgp_evpn_remote_ip_hash_key_make(const void *p) + { + const struct evpn_remote_ip *ip = p; + const struct ipaddr *addr = &ip->addr; +@@ -7289,7 +7361,7 @@ static unsigned int bgp_evpn_remote_ip_hash_key_make(const void *p) + array_size(addr->ipaddr_v6.s6_addr32), 0); + } + +-static bool bgp_evpn_remote_ip_hash_cmp(const void *p1, const void *p2) ++bool bgp_evpn_remote_ip_hash_cmp(const void *p1, const void *p2) + { + const struct evpn_remote_ip *ip1 = p1; + const struct evpn_remote_ip *ip2 = p2; +@@ -7297,7 +7369,7 @@ static bool bgp_evpn_remote_ip_hash_cmp(const void *p1, const void *p2) + return !ipaddr_cmp(&ip1->addr, &ip2->addr); + } + +-static void bgp_evpn_remote_ip_hash_init(struct bgpevpn *vpn) ++void bgp_evpn_remote_ip_hash_init(struct bgpevpn *vpn) + { + if (!evpn_resolve_overlay_index()) + return; +@@ -7307,7 +7379,7 @@ static void bgp_evpn_remote_ip_hash_init(struct bgpevpn *vpn) + "BGP EVPN remote IP hash"); + } + +-static void bgp_evpn_remote_ip_hash_free(struct hash_bucket *bucket, void *args) ++void bgp_evpn_remote_ip_hash_free(struct hash_bucket *bucket, void *args) + { + struct evpn_remote_ip *ip = (struct evpn_remote_ip *)bucket->data; + struct bgpevpn *vpn = (struct bgpevpn *)args; +@@ -7320,7 +7392,7 @@ static void bgp_evpn_remote_ip_hash_free(struct hash_bucket *bucket, void *args) + XFREE(MTYPE_EVPN_REMOTE_IP, ip); + } + +-static void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *vpn) ++void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *vpn) + { + if (!evpn_resolve_overlay_index() || vpn->remote_ip_hash == NULL) + return; +@@ -7334,7 +7406,7 @@ static void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *vpn) + } + + /* Add a remote MAC/IP route to hash table */ +-static void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn, ++void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn, + struct bgp_path_info *pi) + { + struct evpn_remote_ip tmp; +@@ -7371,7 +7443,7 @@ static void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn, + } + + /* Delete a remote MAC/IP route from hash table */ +-static void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn, ++void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn, + struct bgp_path_info *pi) + { + struct evpn_remote_ip tmp; +@@ -7403,7 +7475,7 @@ static void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn, + } + } + +-static void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn, ++void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn, + void (*func)(struct hash_bucket *, + void *), + void *arg) +@@ -7414,7 +7486,7 @@ static void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn, + hash_iterate(vpn->remote_ip_hash, func, arg); + } + +-static void show_remote_ip_entry(struct hash_bucket *bucket, void *args) ++void show_remote_ip_entry(struct hash_bucket *bucket, void *args) + { + char buf[INET6_ADDRSTRLEN]; + struct listnode *node = NULL; +@@ -7442,7 +7514,7 @@ void bgp_evpn_show_remote_ip_hash(struct hash_bucket *bucket, void *args) + vty_out(vty, "\n"); + } + +-static void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket, ++void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket, + void *args) + { + struct evpn_remote_ip *ip = (struct evpn_remote_ip *)bucket->data; +@@ -7451,7 +7523,7 @@ static void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket, + bgp_evpn_remote_ip_process_nexthops(vpn, &ip->addr, true); + } + +-static void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket, ++void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket, + void *args) + { + struct evpn_remote_ip *ip = (struct evpn_remote_ip *)bucket->data; +@@ -7460,14 +7532,14 @@ static void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket, + bgp_evpn_remote_ip_process_nexthops(vpn, &ip->addr, false); + } + +-static unsigned int vni_svi_hash_key_make(const void *p) ++unsigned int vni_svi_hash_key_make(const void *p) + { + const struct bgpevpn *vpn = p; + + return jhash_1word(vpn->svi_ifindex, 0); + } + +-static bool vni_svi_hash_cmp(const void *p1, const void *p2) ++bool vni_svi_hash_cmp(const void *p1, const void *p2) + { + const struct bgpevpn *vpn1 = p1; + const struct bgpevpn *vpn2 = p2; +@@ -7475,7 +7547,7 @@ static bool vni_svi_hash_cmp(const void *p1, const void *p2) + return (vpn1->svi_ifindex == vpn2->svi_ifindex); + } + +-static struct bgpevpn *bgp_evpn_vni_svi_hash_lookup(struct bgp *bgp, ++struct bgpevpn *bgp_evpn_vni_svi_hash_lookup(struct bgp *bgp, + ifindex_t svi) + { + struct bgpevpn *vpn; +@@ -7487,7 +7559,7 @@ static struct bgpevpn *bgp_evpn_vni_svi_hash_lookup(struct bgp *bgp, + return vpn; + } + +-static void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn) ++void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn) + { + if (vpn->svi_ifindex == 0) + return; +@@ -7495,7 +7567,7 @@ static void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn) + (void)hash_get(bgp->vni_svi_hash, vpn, hash_alloc_intern); + } + +-static void bgp_evpn_unlink_from_vni_svi_hash(struct bgp *bgp, ++void bgp_evpn_unlink_from_vni_svi_hash(struct bgp *bgp, + struct bgpevpn *vpn) + { + if (vpn->svi_ifindex == 0) +@@ -7572,7 +7644,7 @@ bool bgp_evpn_is_gateway_ip_resolved(struct bgp_nexthop_cache *bnc) + } + + /* Resolve/Unresolve nexthops when a MAC/IP route is added/deleted */ +-static void bgp_evpn_remote_ip_process_nexthops(struct bgpevpn *vpn, ++void bgp_evpn_remote_ip_process_nexthops(struct bgpevpn *vpn, + struct ipaddr *addr, + bool resolve) + { +@@ -7695,7 +7767,7 @@ vni_t bgp_evpn_path_info_get_l3vni(const struct bgp_path_info *pi) + /* + * Returns true if the l3vni of any of this path doesn't match vrf's l3vni. + */ +-static bool bgp_evpn_path_is_dvni(const struct bgp *bgp_vrf, ++bool bgp_evpn_path_is_dvni(const struct bgp *bgp_vrf, + const struct bgp_path_info *pi) + { + vni_t vni = 0; +@@ -7781,4 +7853,5 @@ void bgp_aggr_supp_withdraw_from_evpn(struct bgp *bgp, afi_t afi, safi_t safi) + } + } + } +-} ++ return; ++} +\ No newline at end of file diff --git a/bgpd/bgp_evpn.h b/bgpd/bgp_evpn.h -index 3cbc5af5af..bf1943a2db 100644 +index c641a64f6..db05293a4 100644 --- a/bgpd/bgp_evpn.h +++ b/bgpd/bgp_evpn.h -@@ -230,4 +230,12 @@ extern void +@@ -176,6 +176,14 @@ bgp_evpn_handle_resolve_overlay_index_set(struct hash_bucket *bucket, + extern void bgp_evpn_handle_resolve_overlay_index_unset(struct hash_bucket *bucket, void *arg); - +extern enum zclient_send_status evpn_zebra_install(struct bgp *bgp, -+ struct bgpevpn *vpn, -+ const struct prefix_evpn *p, -+ struct bgp_path_info *pi); ++ struct bgpevpn *vpn, ++ const struct prefix_evpn *p, ++ struct bgp_path_info *pi); +extern enum zclient_send_status +evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn, + const struct prefix_evpn *p, struct bgp_path_info *pi, + bool is_sync); - #endif /* _QUAGGA_BGP_EVPN_H */ + extern mpls_label_t *bgp_evpn_path_info_labels_get_l3vni(mpls_label_t *labels, + uint32_t num_labels); + extern vni_t bgp_evpn_path_info_get_l3vni(const struct bgp_path_info *pi); diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c -index 552365959d..40687c558d 100644 +index d88c52d1f..f36d109b6 100644 --- a/bgpd/bgp_evpn_mh.c +++ b/bgpd/bgp_evpn_mh.c -@@ -56,13 +56,14 @@ static void bgp_evpn_local_es_down(struct bgp *bgp, - struct bgp_evpn_es *es); - static void bgp_evpn_local_type1_evi_route_del(struct bgp *bgp, - struct bgp_evpn_es *es); --static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp, -+static struct bgp_evpn_es_vtep * -+bgp_evpn_es_vtep_add(struct bgp *bgp, struct bgp_evpn_es *es, -+ struct in_addr vtep_ip, bool esr, uint8_t df_alg, -+ uint16_t df_pref, int *zret); -+static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp, +@@ -49,8 +49,8 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp, struct bgp_evpn_es *es, struct in_addr vtep_ip, -- bool esr, uint8_t df_alg, + bool esr, uint8_t df_alg, - uint16_t df_pref); -static void bgp_evpn_es_vtep_del(struct bgp *bgp, -- struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr); -+ bool esr); ++ uint16_t df_pref, int *zret); ++static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp, + struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr); static void bgp_evpn_es_cons_checks_pend_add(struct bgp_evpn_es *es); static void bgp_evpn_es_cons_checks_pend_del(struct bgp_evpn_es *es); - static struct bgp_evpn_es_evi * -@@ -105,6 +106,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp, +@@ -94,6 +94,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp, struct bgp_dest *dest) { int ret = 0; @@ -383,7 +1582,7 @@ index 552365959d..40687c558d 100644 afi_t afi = AFI_L2VPN; safi_t safi = SAFI_EVPN; struct bgp_path_info *old_select; /* old best */ -@@ -131,7 +133,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp, +@@ -120,7 +121,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp, bgp_evpn_es_vtep_add(bgp, es, old_select->attr->nexthop, true /*esr*/, old_select->attr->df_alg, @@ -392,7 +1591,7 @@ index 552365959d..40687c558d 100644 } UNSET_FLAG(old_select->flags, BGP_PATH_MULTIPATH_CHG); bgp_zebra_clear_route_change_flags(dest); -@@ -160,7 +162,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp, +@@ -149,7 +150,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp, && new_select->sub_type == BGP_ROUTE_IMPORTED) { bgp_evpn_es_vtep_add(bgp, es, new_select->attr->nexthop, true /*esr */, new_select->attr->df_alg, @@ -401,30 +1600,19 @@ index 552365959d..40687c558d 100644 } else { if (old_select && old_select->type == ZEBRA_ROUTE_BGP && old_select->sub_type == BGP_ROUTE_IMPORTED) -@@ -447,7 +449,7 @@ int bgp_evpn_mh_route_update(struct bgp *bgp, struct bgp_evpn_es *es, - &attr->mp_nexthop_global_in); - } - -- /* Return back the route entry. */ -+ /* Return back th*e route entry. */ - *ri = tmp_pi; - return 0; - } -@@ -1366,23 +1368,28 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_find(struct bgp_evpn_es *es, +@@ -1371,23 +1372,26 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_find(struct bgp_evpn_es *es, } - + /* Send the remote ES to zebra for NHG programming */ -static int bgp_zebra_send_remote_es_vtep(struct bgp *bgp, -- struct bgp_evpn_es_vtep *es_vtep, bool add) -+static enum zclient_send_status -+bgp_zebra_send_remote_es_vtep(struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep, -+ bool add) ++static enum zclient_send_status bgp_zebra_send_remote_es_vtep(struct bgp *bgp, + struct bgp_evpn_es_vtep *es_vtep, bool add) { struct bgp_evpn_es *es = es_vtep->es; struct stream *s; uint32_t flags = 0; - - /* Check socket. */ + +- /* Check socket. */ - if (!zclient || zclient->sock < 0) - return 0; + if (!zclient || zclient->sock < 0) { @@ -433,7 +1621,7 @@ index 552365959d..40687c558d 100644 + __func__); + return ZCLIENT_SEND_SUCCESS; + } - + /* Don't try to register if Zebra doesn't know of this instance. */ if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) { if (BGP_DEBUG(zebra, ZEBRA)) @@ -442,263 +1630,230 @@ index 552365959d..40687c558d 100644 - return 0; + return ZCLIENT_SEND_SUCCESS; } - + if (es_vtep->flags & BGP_EVPNES_VTEP_ESR) -@@ -1413,12 +1420,12 @@ static int bgp_zebra_send_remote_es_vtep(struct bgp *bgp, +@@ -1418,12 +1422,13 @@ static int bgp_zebra_send_remote_es_vtep(struct bgp *bgp, return zclient_send_message(zclient); } - + -static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp, -- struct bgp_evpn_es_vtep *es_vtep, -- bool param_change) -+static enum zclient_send_status bgp_evpn_es_vtep_re_eval_active( -+ struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep, bool param_change) ++static enum zclient_send_status bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp, + struct bgp_evpn_es_vtep *es_vtep, + bool param_change) { bool old_active; bool new_active; + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; - + old_active = CHECK_FLAG(es_vtep->flags, BGP_EVPNES_VTEP_ACTIVE); /* currently we need an active EVI reference to use the VTEP as -@@ -1440,7 +1447,7 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp, +@@ -1445,7 +1450,7 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp, es_vtep->df_alg, es_vtep->df_pref); - + /* send remote ES to zebra */ - bgp_zebra_send_remote_es_vtep(bgp, es_vtep, new_active); + ret = bgp_zebra_send_remote_es_vtep(bgp, es_vtep, new_active); - + /* The NHG is updated first for efficient failover handling. * Note the NHG can be de-activated while there are bgp -@@ -1452,13 +1459,14 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp, +@@ -1457,13 +1462,14 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp, /* queue up the es for background consistency checks */ bgp_evpn_es_cons_checks_pend_add(es_vtep->es); } -+ + return ret; } - --static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp, -- struct bgp_evpn_es *es, -- struct in_addr vtep_ip, -- bool esr, uint8_t df_alg, + + static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp, + struct bgp_evpn_es *es, + struct in_addr vtep_ip, + bool esr, uint8_t df_alg, - uint16_t df_pref) -+static struct bgp_evpn_es_vtep * -+bgp_evpn_es_vtep_add(struct bgp *bgp, struct bgp_evpn_es *es, -+ struct in_addr vtep_ip, bool esr, uint8_t df_alg, -+ uint16_t df_pref, int *zret) ++ uint16_t df_pref, int *zret) { struct bgp_evpn_es_vtep *es_vtep; bool param_change = false; -@@ -1485,15 +1493,17 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp, +@@ -1490,15 +1496,16 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp, ++es_vtep->evi_cnt; } - + - bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change); + *zret = bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change); - + return es_vtep; } - + -static void bgp_evpn_es_vtep_do_del(struct bgp *bgp, -- struct bgp_evpn_es_vtep *es_vtep, bool esr) -+static enum zclient_send_status -+bgp_evpn_es_vtep_do_del(struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep, -+ bool esr) ++static enum zclient_send_status bgp_evpn_es_vtep_do_del(struct bgp *bgp, + struct bgp_evpn_es_vtep *es_vtep, bool esr) { bool param_change = false; + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; - + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) zlog_debug("es %s vtep %pI4 del %s", es_vtep->es->esi_str, -@@ -1510,18 +1520,25 @@ static void bgp_evpn_es_vtep_do_del(struct bgp *bgp, +@@ -1515,18 +1522,21 @@ static void bgp_evpn_es_vtep_do_del(struct bgp *bgp, --es_vtep->evi_cnt; } - + - bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change); + ret = bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change); bgp_evpn_es_vtep_free(es_vtep); -+ + return ret; } - + -static void bgp_evpn_es_vtep_del(struct bgp *bgp, -- struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr) +static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp, -+ struct bgp_evpn_es *es, -+ struct in_addr vtep_ip, -+ bool esr) + struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr) { struct bgp_evpn_es_vtep *es_vtep; + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; - + es_vtep = bgp_evpn_es_vtep_find(es, vtep_ip); if (es_vtep) - bgp_evpn_es_vtep_do_del(bgp, es_vtep, esr); + ret = bgp_evpn_es_vtep_do_del(bgp, es_vtep, esr); -+ + return ret; } - + /********************** ES MAC-IP paths ************************************* -@@ -3382,12 +3399,14 @@ static struct bgp_evpn_es_evi_vtep *bgp_evpn_es_evi_vtep_find( +@@ -3399,12 +3409,13 @@ static struct bgp_evpn_es_evi_vtep *bgp_evpn_es_evi_vtep_find( /* A VTEP can be added as "active" attach to an ES if EAD-per-ES and * EAD-per-EVI routes are rxed from it. */ -static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp, -- struct bgp_evpn_es_evi_vtep *evi_vtep) -+static enum zclient_send_status -+bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp, -+ struct bgp_evpn_es_evi_vtep *evi_vtep) ++static enum zclient_send_status bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp, + struct bgp_evpn_es_evi_vtep *evi_vtep) { bool old_active; bool new_active; uint32_t ead_activity_flags; + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; - + old_active = CHECK_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_ACTIVE); - -@@ -3408,7 +3427,7 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp, + +@@ -3425,7 +3436,7 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp, new_active = CHECK_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_ACTIVE); - + if (old_active == new_active) - return; + return ret; - + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) zlog_debug("es %s evi %u vtep %pI4 %s", -@@ -3417,24 +3436,26 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp, - new_active ? "active" : "inactive"); - - /* add VTEP to parent es */ -- if (new_active) -+ if (new_active) { +@@ -3437,19 +3448,20 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp, + if (new_active) evi_vtep->es_vtep = bgp_evpn_es_vtep_add( bgp, evi_vtep->es_evi->es, evi_vtep->vtep_ip, - false /*esr*/, 0, 0); -- else { + false /*esr*/, 0, 0, &ret); -+ } else { + else { if (evi_vtep->es_vtep) { - bgp_evpn_es_vtep_do_del(bgp, evi_vtep->es_vtep, -- false /*esr*/); + ret = bgp_evpn_es_vtep_do_del(bgp, evi_vtep->es_vtep, -+ false /*esr*/); + false /*esr*/); evi_vtep->es_vtep = NULL; } } /* queue up the parent es for background consistency checks */ bgp_evpn_es_cons_checks_pend_add(evi_vtep->es_evi->es); -+ + return ret; } - + -static void bgp_evpn_es_evi_vtep_add(struct bgp *bgp, -- struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip, -- bool ead_es) -+static enum zclient_send_status -+bgp_evpn_es_evi_vtep_add(struct bgp *bgp, struct bgp_evpn_es_evi *es_evi, -+ struct in_addr vtep_ip, bool ead_es) ++static enum zclient_send_status bgp_evpn_es_evi_vtep_add(struct bgp *bgp, + struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip, + bool ead_es) { - struct bgp_evpn_es_evi_vtep *evi_vtep; - -@@ -3454,18 +3475,19 @@ static void bgp_evpn_es_evi_vtep_add(struct bgp *bgp, +@@ -3475,18 +3487,19 @@ static void bgp_evpn_es_evi_vtep_add(struct bgp *bgp, else SET_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_EAD_PER_EVI); - + - bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep); + return bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep); } - + -static void bgp_evpn_es_evi_vtep_del(struct bgp *bgp, -- struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip, -- bool ead_es) -+static enum zclient_send_status -+bgp_evpn_es_evi_vtep_del(struct bgp *bgp, struct bgp_evpn_es_evi *es_evi, -+ struct in_addr vtep_ip, bool ead_es) ++static enum zclient_send_status bgp_evpn_es_evi_vtep_del(struct bgp *bgp, + struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip, + bool ead_es) { struct bgp_evpn_es_evi_vtep *evi_vtep; + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; - + evi_vtep = bgp_evpn_es_evi_vtep_find(es_evi, vtep_ip); if (!evi_vtep) - return; + return ret; - + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) zlog_debug("del es %s evi %u vtep %pI4 %s", -@@ -3478,8 +3500,10 @@ static void bgp_evpn_es_evi_vtep_del(struct bgp *bgp, +@@ -3503,8 +3516,9 @@ static void bgp_evpn_es_evi_vtep_del(struct bgp *bgp, else UNSET_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_EAD_PER_EVI); - + - bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep); + ret = bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep); bgp_evpn_es_evi_vtep_free(evi_vtep); -+ + return ret; } - + /* compare ES-IDs for the ES-EVI RB tree maintained per-VNI */ -@@ -3755,18 +3779,20 @@ int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni) +@@ -3780,7 +3794,7 @@ int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni) /* Add remote ES-EVI entry. This is actually the remote VTEP add and the * ES-EVI is implicity created on first VTEP's reference. */ -int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn, -- const struct prefix_evpn *p) -+enum zclient_send_status bgp_evpn_remote_es_evi_add(struct bgp *bgp, -+ struct bgpevpn *vpn, -+ const struct prefix_evpn *p) ++enum zclient_send_status bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn, + const struct prefix_evpn *p) { char buf[ESI_STR_LEN]; - struct bgp_evpn_es *es; +@@ -3788,10 +3802,11 @@ int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn, struct bgp_evpn_es_evi *es_evi; bool ead_es; const esi_t *esi = &p->prefix.ead_addr.esi; + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; - + if (!vpn) /* local EAD-ES need not be sent back to zebra */ - return 0; + return ret; - + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) zlog_debug("add remote %s es %s evi %u vtep %pI4", -@@ -3783,27 +3809,29 @@ int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn, +@@ -3808,27 +3823,28 @@ int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn, es_evi = bgp_evpn_es_evi_new(es, vpn); - + ead_es = !!p->prefix.ead_addr.eth_tag; - bgp_evpn_es_evi_vtep_add(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4, -- ead_es); -+ ret = bgp_evpn_es_evi_vtep_add(bgp, es_evi, -+ p->prefix.ead_addr.ip.ipaddr_v4, ead_es); - ++ ret = bgp_evpn_es_evi_vtep_add(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4, + ead_es); + bgp_evpn_es_evi_remote_info_re_eval(es_evi); - return 0; + return ret; } - + /* A remote VTEP has withdrawn. The es-evi-vtep will be deleted and the * parent es-evi freed up implicitly in last VTEP's deref. */ -int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn, -- const struct prefix_evpn *p) -+enum zclient_send_status bgp_evpn_remote_es_evi_del(struct bgp *bgp, -+ struct bgpevpn *vpn, -+ const struct prefix_evpn *p) ++enum zclient_send_status bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn, + const struct prefix_evpn *p) { char buf[ESI_STR_LEN]; struct bgp_evpn_es *es; struct bgp_evpn_es_evi *es_evi; bool ead_es; + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; - + if (!vpn) /* local EAD-ES need not be sent back to zebra */ - return 0; + return ret; - + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) zlog_debug( -@@ -3822,7 +3850,7 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn, +@@ -3847,7 +3863,7 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn, esi_to_str(&p->prefix.ead_addr.esi, buf, sizeof(buf)), vpn->vni, &p->prefix.ead_addr.ip.ipaddr_v4); @@ -707,31 +1862,29 @@ index 552365959d..40687c558d 100644 } es_evi = bgp_evpn_es_evi_find(es, vpn); if (!es_evi) { -@@ -3835,14 +3863,15 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn, +@@ -3860,14 +3876,14 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn, sizeof(buf)), vpn->vni, &p->prefix.ead_addr.ip.ipaddr_v4); - return 0; + return ret; } - + ead_es = !!p->prefix.ead_addr.eth_tag; - bgp_evpn_es_evi_vtep_del(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4, -- ead_es); -+ ret = bgp_evpn_es_evi_vtep_del(bgp, es_evi, -+ p->prefix.ead_addr.ip.ipaddr_v4, ead_es); ++ ret = bgp_evpn_es_evi_vtep_del(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4, + ead_es); bgp_evpn_es_evi_remote_info_re_eval(es_evi); - return 0; -+ + return ret; } - + /* If a VNI is being deleted we need to force del all remote VTEPs */ diff --git a/bgpd/bgp_evpn_mh.h b/bgpd/bgp_evpn_mh.h -index 11030e323f..d6e77e982f 100644 +index cebabb9fd..5d393c37a 100644 --- a/bgpd/bgp_evpn_mh.h +++ b/bgpd/bgp_evpn_mh.h -@@ -434,10 +434,12 @@ extern int bgp_evpn_local_es_add(struct bgp *bgp, esi_t *esi, +@@ -418,10 +418,12 @@ extern int bgp_evpn_local_es_add(struct bgp *bgp, esi_t *esi, extern int bgp_evpn_local_es_del(struct bgp *bgp, esi_t *esi); extern int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni); extern int bgp_evpn_local_es_evi_del(struct bgp *bgp, esi_t *esi, vni_t vni); @@ -749,99 +1902,89 @@ index 11030e323f..d6e77e982f 100644 extern void bgp_evpn_mh_finish(void); void bgp_evpn_vni_es_init(struct bgpevpn *vpn); diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c -index c29442d96c..679abba463 100644 +index e45d4b1ff..3dff073a3 100644 --- a/bgpd/bgp_route.c +++ b/bgpd/bgp_route.c -@@ -3213,9 +3213,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, - && (new_select->sub_type == BGP_ROUTE_NORMAL - || new_select->sub_type +@@ -3420,7 +3420,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, == BGP_ROUTE_IMPORTED)) -- - bgp_zebra_route_install( -- dest, old_select, bgp, true); -+ dest, old_select, bgp, true, -+ NULL, false); + + bgp_zebra_route_install(dest, old_select, +- bgp, true); ++ bgp, true, NULL, false); } } - -@@ -3313,9 +3313,10 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + +@@ -3529,9 +3529,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + */ if (old_select && is_route_parent_evpn(old_select)) - bgp_zebra_route_install(dest, old_select, bgp, -- false); -+ false, NULL, false); - +- bgp_zebra_route_install(dest, old_select, bgp, false); ++ bgp_zebra_route_install(dest, old_select, bgp, false, NULL, false); + - bgp_zebra_route_install(dest, new_select, bgp, true); -+ bgp_zebra_route_install(dest, new_select, bgp, true, -+ NULL, false); ++ bgp_zebra_route_install(dest, new_select, bgp, true, NULL, false); } else { /* Withdraw the route from the kernel. */ if (old_select && old_select->type == ZEBRA_ROUTE_BGP -@@ -3324,7 +3325,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, +@@ -3539,7 +3539,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + || old_select->sub_type == BGP_ROUTE_AGGREGATE || old_select->sub_type == BGP_ROUTE_IMPORTED)) - - bgp_zebra_route_install(dest, old_select, bgp, -- false); -+ false, NULL, false); + +- bgp_zebra_route_install(dest, old_select, bgp, false); ++ bgp_zebra_route_install(dest, old_select, bgp, false, NULL, false); } } - -@@ -4203,7 +4204,8 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, + +@@ -4444,7 +4444,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) { if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)) /* remove from RIB previous entry */ - bgp_zebra_route_install(dest, pi, bgp, false); -+ bgp_zebra_route_install(dest, pi, bgp, false, NULL, -+ false); ++ bgp_zebra_route_install(dest, pi, bgp, false, NULL, false); } - + if (peer->sort == BGP_PEER_EBGP) { diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h -index 45d61f8dfd..9eb681ea3f 100644 +index 67431ea4f..1550d00ad 100644 --- a/bgpd/bgp_table.h +++ b/bgpd/bgp_table.h -@@ -103,6 +103,8 @@ struct bgp_node { - +@@ -75,10 +75,10 @@ struct bgp_dest { + struct bgp_dest *pdest; + + STAILQ_ENTRY(bgp_dest) pq; +- struct bgp_path_info *za_bgp_pi; +- struct zebra_announce_item zai; - struct bgp_path_info *za_bgp_pi; +- ++ struct bgp_path_info *za_bgp_pi; + struct bgpevpn *za_vpn; + bool za_is_sync; - uint64_t version; - + + mpls_label_t local_label; diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c -index 1162941ef1..b81acaf8ec 100644 +index 064f23350..cab758fca 100644 --- a/bgpd/bgp_zebra.c +++ b/bgpd/bgp_zebra.c -@@ -1713,12 +1713,11 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi) - for (dest = bgp_table_top(table); dest; dest = bgp_route_next(dest)) - for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) - if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) && -- -- (pi->type == ZEBRA_ROUTE_BGP -- && (pi->sub_type == BGP_ROUTE_NORMAL -- || pi->sub_type == BGP_ROUTE_IMPORTED))) -- +@@ -1674,7 +1674,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi) + && (pi->sub_type == BGP_ROUTE_NORMAL + || pi->sub_type == BGP_ROUTE_IMPORTED))) + - bgp_zebra_route_install(dest, pi, bgp, true); -+ (pi->type == ZEBRA_ROUTE_BGP && -+ (pi->sub_type == BGP_ROUTE_NORMAL || -+ pi->sub_type == BGP_ROUTE_IMPORTED))) -+ bgp_zebra_route_install(dest, pi, bgp, true, -+ NULL, false); ++ bgp_zebra_route_install(dest, pi, bgp, true, NULL, false); } - + /* Announce routes of any bgp subtype of a table to zebra */ -@@ -1740,7 +1739,8 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, +@@ -1696,7 +1696,7 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) && pi->type == ZEBRA_ROUTE_BGP) - bgp_zebra_route_install(dest, pi, bgp, true); -+ bgp_zebra_route_install(dest, pi, bgp, true, -+ NULL, false); ++ bgp_zebra_route_install(dest, pi, bgp, true, NULL, false); } - - enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest, -@@ -1793,6 +1793,7 @@ enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest, + + +@@ -1749,6 +1749,7 @@ enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest, #define ZEBRA_ANNOUNCEMENTS_LIMIT 1000 static void bgp_handle_route_announcements_to_zebra(struct thread *e) { @@ -849,19 +1992,19 @@ index 1162941ef1..b81acaf8ec 100644 uint32_t count = 0; struct bgp_dest *dest = NULL; struct bgp_table *table = NULL; -@@ -1808,6 +1809,9 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e) +@@ -1764,6 +1765,9 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e) table = bgp_dest_table(dest); install = CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL); + if (table && table->afi == AFI_L2VPN && + table->safi == SAFI_EVPN) + is_evpn = true; - + if (BGP_DEBUG(zebra, ZEBRA)) zlog_debug( -@@ -1816,17 +1820,33 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e) +@@ -1772,17 +1776,32 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e) table->bgp->name_pretty, dest, dest->flags); - + if (install) { - status = bgp_zebra_announce_actual( - dest, dest->za_bgp_pi, table->bgp); @@ -887,23 +2030,21 @@ index 1162941ef1..b81acaf8ec 100644 + else + status = bgp_zebra_withdraw_actual( + dest, dest->za_bgp_pi, table->bgp); -+ UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE); } - + bgp_path_info_unlock(dest->za_bgp_pi); dest->za_bgp_pi = NULL; + dest->za_vpn = NULL; bgp_dest_unlock_node(dest); - + if (status == ZCLIENT_SEND_BUFFERED) -@@ -1880,8 +1900,16 @@ static void bgp_zebra_buffer_write_ready(void) +@@ -1836,8 +1855,14 @@ static void bgp_zebra_buffer_write_ready(void) * withdrawn. */ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, - struct bgp *bgp, bool install) -+ struct bgp *bgp, bool install, struct bgpevpn *vpn, -+ bool is_sync) ++ struct bgp *bgp, bool install, struct bgpevpn *vpn, bool is_sync) { + bool is_evpn = false; + struct bgp_table *table = NULL; @@ -911,41 +2052,40 @@ index 1162941ef1..b81acaf8ec 100644 + table = bgp_dest_table(dest); + if (table && table->afi == AFI_L2VPN && table->safi == SAFI_EVPN) + is_evpn = true; -+ /* * BGP is installing this route and bgp has been configured * to suppress announcements until the route has been installed -@@ -1891,7 +1919,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, +@@ -1847,7 +1872,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, if (BGP_SUPPRESS_FIB_ENABLED(bgp)) SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING); - + - if (bgp->main_zebra_update_hold) + if (bgp->main_zebra_update_hold && !is_evpn) return; } else { UNSET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING); -@@ -1901,7 +1929,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, +@@ -1857,7 +1882,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, * Don't try to install if we're not connected to Zebra or Zebra doesn't * know of this instance. */ - if (!bgp_install_info_to_zebra(bgp)) + if (!bgp_install_info_to_zebra(bgp) && !is_evpn) return; - + if (!CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL) && -@@ -1922,7 +1950,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, +@@ -1878,7 +1903,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, dest->za_bgp_pi = info; } else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) { assert(dest->za_bgp_pi); - if (install) + if (install & !is_evpn) bgp_zebra_withdraw_actual(dest, dest->za_bgp_pi, bgp); - + bgp_path_info_unlock(dest->za_bgp_pi); -@@ -1930,6 +1958,11 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, +@@ -1886,6 +1911,11 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, dest->za_bgp_pi = info; } - + + if (is_evpn) { + dest->za_vpn = vpn; + dest->za_is_sync = is_sync; @@ -954,42 +2094,40 @@ index 1162941ef1..b81acaf8ec 100644 if (install) { UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE); SET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL); -@@ -1960,7 +1993,8 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa +@@ -1916,7 +1946,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) { if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) && (pi->type == ZEBRA_ROUTE_BGP)) - bgp_zebra_route_install(dest, pi, bgp, false); -+ bgp_zebra_route_install(dest, pi, bgp, false, -+ NULL, false); ++ bgp_zebra_route_install(dest, pi, bgp, false, NULL, false); } } } diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h -index 45fcf7f514..5186b7454e 100644 +index 83197c28e..92971b51f 100644 --- a/bgpd/bgp_zebra.h +++ b/bgpd/bgp_zebra.h -@@ -45,7 +45,8 @@ extern int bgp_zebra_get_table_range(uint32_t chunk_size, +@@ -30,7 +30,7 @@ extern int bgp_zebra_get_table_range(struct zclient *zc, uint32_t chunk_size, extern int bgp_if_update_all(void); extern void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *path, struct bgp *bgp, - bool install); -+ bool install, struct bgpevpn *vpn, -+ bool is_sync); ++ bool install, struct bgpevpn *vpn, bool is_sync); + extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi); - - /* Announce routes of any bgp subtype of a table to zebra */ + extern enum zclient_send_status diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h -index bdf31f5161..dc660fb8f0 100644 +index a088a2e11..214a2f9b0 100644 --- a/bgpd/bgpd.h +++ b/bgpd/bgpd.h -@@ -512,6 +512,7 @@ struct bgp { - #define BGP_FLAG_HARD_ADMIN_RESET (1ULL << 31) - /* Evaluate the AIGP attribute during the best path selection process */ - #define BGP_FLAG_COMPARE_AIGP (1ULL << 32) +@@ -529,6 +529,7 @@ struct bgp { + #define BGP_FLAG_LU_IPV6_EXPLICIT_NULL (1ULL << 34) + #define BGP_FLAG_SOFT_VERSION_CAPABILITY (1ULL << 35) + #define BGP_FLAG_ENFORCE_FIRST_AS (1ULL << 36) +#define BGP_FLAG_VNI_DOWN (1ULL << 38) - + /* BGP default address-families. * New peers inherit enabled afi/safis from bgp instance. --- -2.17.1 +-- +2.39.4 diff --git a/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch b/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch index a360a310159..fa1a742b1a8 100644 --- a/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch +++ b/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch @@ -19,21 +19,18 @@ Signed-off-by: Rajasekar Raja Signed-off-by: Donald Sharp diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c -index 622fd6afd2..eb5aa9f077 100644 +index 79e16d8f9..00a45a819 100644 --- a/bgpd/bgp_evpn.c +++ b/bgpd/bgp_evpn.c -@@ -3752,9 +3752,7 @@ static int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install) - * particular VNI. +@@ -3926,7 +3926,6 @@ int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install) */ - static int install_uninstall_routes_for_vni(struct bgp *bgp, -- struct bgpevpn *vpn, + int install_uninstall_routes_for_vni(struct bgp *bgp, + struct bgpevpn *vpn, - bgp_evpn_route_type rtype, -- int install) -+ struct bgpevpn *vpn, int install) + int install) { afi_t afi; - safi_t safi; -@@ -3785,7 +3783,9 @@ static int install_uninstall_routes_for_vni(struct bgp *bgp, +@@ -3958,7 +3957,9 @@ int install_uninstall_routes_for_vni(struct bgp *bgp, (const struct prefix_evpn *)bgp_dest_get_prefix( dest); @@ -44,19 +41,19 @@ index 622fd6afd2..eb5aa9f077 100644 continue; for (pi = bgp_dest_get_bgp_path_info(dest); pi; -@@ -3812,7 +3812,8 @@ static int install_uninstall_routes_for_vni(struct bgp *bgp, - bgp->vrf_id, - install ? "install" - : "uninstall", -- rtype == BGP_EVPN_MAC_IP_ROUTE +@@ -3991,7 +3992,8 @@ int install_uninstall_routes_for_vni(struct bgp *bgp, + bgp->vrf_id, + install ? "install" + : "uninstall", +- rtype == BGP_EVPN_MAC_IP_ROUTE + evp->prefix.route_type == + BGP_EVPN_MAC_IP_ROUTE - ? "MACIP" - : "IMET", - vpn->vni); -@@ -3845,23 +3846,11 @@ static int install_routes_for_vrf(struct bgp *bgp_vrf) + ? "MACIP" + : "IMET", + vpn->vni); +@@ -4023,23 +4025,11 @@ int install_routes_for_vrf(struct bgp *bgp_vrf) */ - static int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) { - int ret; - @@ -81,9 +78,9 @@ index 622fd6afd2..eb5aa9f077 100644 } /* uninstall routes from l3vni vrf. */ -@@ -3877,25 +3866,11 @@ static int uninstall_routes_for_vrf(struct bgp *bgp_vrf) +@@ -4055,25 +4045,11 @@ int uninstall_routes_for_vrf(struct bgp *bgp_vrf) */ - static int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) { - int ret; - @@ -112,5 +109,5 @@ index 622fd6afd2..eb5aa9f077 100644 /* -- -2.17.1 +2.39.4 diff --git a/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch b/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch index b74d86881ae..9c4be324fb6 100644 --- a/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch +++ b/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch @@ -17,38 +17,38 @@ Signed-off-by: Donald Sharp Signed-off-by: Rajasekar Raja diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c -index 679abba463..e28069767f 100644 +index 3dff073a3..26089e326 100644 --- a/bgpd/bgp_route.c +++ b/bgpd/bgp_route.c -@@ -3312,8 +3312,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, +@@ -3529,7 +3529,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, */ if (old_select && is_route_parent_evpn(old_select)) -- bgp_zebra_route_install(dest, old_select, bgp, -- false, NULL, false); +- bgp_zebra_route_install(dest, old_select, bgp, false, NULL, false); + bgp_zebra_withdraw_actual(dest, old_select, bgp); - - bgp_zebra_route_install(dest, new_select, bgp, true, - NULL, false); + + bgp_zebra_route_install(dest, new_select, bgp, true, NULL, false); + } else { diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c -index 524551b1e0..5d5525156b 100644 +index f0fe0ec5c..c0733dfe3 100644 --- a/bgpd/bgp_zebra.c +++ b/bgpd/bgp_zebra.c -@@ -1889,11 +1889,9 @@ static void bgp_zebra_buffer_write_ready(void) +@@ -1844,11 +1844,10 @@ static void bgp_zebra_buffer_write_ready(void) * save new pi, mark as going to be * withdrawan, remove install flag * - * Withdrawal Install Special case, send withdrawal immediately - * Leave dest on list, release old pi, ++ * + * Withdrawal Install Leave dest on list, release old pi, * save new pi, mark as going to be - * installed. -+ * installed. ++ * installed * Withdrawal Withdrawal Leave dest on list, release old pi, * save new pi, mark as going to be * withdrawn. -@@ -1949,9 +1947,6 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, +@@ -1902,9 +1901,6 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, dest->za_bgp_pi = info; } else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) { assert(dest->za_bgp_pi); @@ -58,6 +58,6 @@ index 524551b1e0..5d5525156b 100644 bgp_path_info_unlock(dest->za_bgp_pi); bgp_path_info_lock(info); dest->za_bgp_pi = info; --- -2.43.2 +-- +2.39.4 diff --git a/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch b/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch index 3401dae2715..b5dac2ba589 100644 --- a/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch +++ b/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch @@ -12,19 +12,19 @@ to the queue. Signed-off-by: Donald Sharp diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c -index caa2f988e2..bc9815bb10 100644 +index b2fee4ff7..f45003cd2 100644 --- a/zebra/dplane_fpm_nl.c +++ b/zebra/dplane_fpm_nl.c -@@ -135,8 +135,6 @@ struct fpm_nl_ctx { - +@@ -133,8 +133,6 @@ struct fpm_nl_ctx { + /* Amount of data plane context processed. */ _Atomic uint32_t dplane_contexts; - /* Amount of data plane contexts enqueued. */ - _Atomic uint32_t ctxqueue_len; /* Peak amount of data plane contexts enqueued. */ _Atomic uint32_t ctxqueue_len_peak; - -@@ -311,6 +309,12 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd, + +@@ -328,6 +326,12 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd, FPM_STR "FPM statistic counters\n") { @@ -35,9 +35,9 @@ index caa2f988e2..bc9815bb10 100644 + } + vty_out(vty, "%30s\n%30s\n", "FPM counters", "============"); - + #define SHOW_COUNTER(label, counter) \ -@@ -324,8 +328,7 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd, +@@ -341,8 +345,7 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd, SHOW_COUNTER("Connection errors", gfnc->counters.connection_errors); SHOW_COUNTER("Data plane items processed", gfnc->counters.dplane_contexts); @@ -47,7 +47,7 @@ index caa2f988e2..bc9815bb10 100644 SHOW_COUNTER("Data plane items queue peak", gfnc->counters.ctxqueue_len_peak); SHOW_COUNTER("Buffer full hits", gfnc->counters.buffer_full); -@@ -344,6 +347,12 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd, +@@ -361,6 +364,12 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd, "FPM statistic counters\n" JSON_STR) { @@ -58,9 +58,9 @@ index caa2f988e2..bc9815bb10 100644 + } + struct json_object *jo; - + jo = json_object_new_object(); -@@ -357,8 +366,7 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd, +@@ -374,8 +383,7 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd, gfnc->counters.connection_errors); json_object_int_add(jo, "data-plane-contexts", gfnc->counters.dplane_contexts); @@ -70,25 +70,25 @@ index caa2f988e2..bc9815bb10 100644 json_object_int_add(jo, "data-plane-contexts-queue-peak", gfnc->counters.ctxqueue_len_peak); json_object_int_add(jo, "buffer-full-hits", gfnc->counters.buffer_full); -@@ -1380,8 +1388,6 @@ static void fpm_process_queue(struct thread *t) - +@@ -1427,8 +1435,6 @@ static void fpm_process_queue(struct event *t) + /* Account the processed entries. */ processed_contexts++; - atomic_fetch_sub_explicit(&fnc->counters.ctxqueue_len, 1, - memory_order_relaxed); - + dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_SUCCESS); dplane_provider_enqueue_out_ctx(fnc->prov, ctx); -@@ -1550,7 +1556,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) +@@ -1602,7 +1608,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) struct zebra_dplane_ctx *ctx; struct fpm_nl_ctx *fnc; int counter, limit; - uint64_t cur_queue, peak_queue = 0, stored_peak_queue; + uint64_t cur_queue = 0, peak_queue = 0, stored_peak_queue; - + fnc = dplane_provider_get_data(prov); limit = dplane_provider_get_work_limit(prov); -@@ -1564,20 +1570,12 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) +@@ -1616,20 +1622,12 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) * anyway. */ if (fnc->socket != -1 && fnc->connecting == false) { @@ -104,32 +104,32 @@ index caa2f988e2..bc9815bb10 100644 + cur_queue = + dplane_ctx_queue_count(&fnc->ctxqueue); } - + - cur_queue = atomic_load_explicit( - &fnc->counters.ctxqueue_len, - memory_order_relaxed); if (peak_queue < cur_queue) peak_queue = cur_queue; continue; -@@ -1594,9 +1592,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) +@@ -1646,9 +1644,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) atomic_store_explicit(&fnc->counters.ctxqueue_len_peak, peak_queue, memory_order_relaxed); - + - if (atomic_load_explicit(&fnc->counters.ctxqueue_len, - memory_order_relaxed) - > 0) + if (cur_queue > 0) - thread_add_timer(fnc->fthread->master, fpm_process_queue, - fnc, 0, &fnc->t_dequeue); - + event_add_event(fnc->fthread->master, fpm_process_queue, fnc, 0, + &fnc->t_dequeue); + diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c -index 59b8d6cc63..c252a370b8 100644 +index 70ce555b1..a53bf8b25 100644 --- a/zebra/zebra_dplane.c +++ b/zebra/zebra_dplane.c -@@ -969,6 +969,11 @@ struct zebra_dplane_ctx *dplane_ctx_dequeue(struct dplane_ctx_list_head *q) +@@ -956,6 +956,11 @@ struct zebra_dplane_ctx *dplane_ctx_dequeue(struct dplane_ctx_list_head *q) return ctx; } - + +uint32_t dplane_ctx_queue_count(struct dplane_ctx_list_head *q) +{ + return dplane_ctx_list_count(q); @@ -139,18 +139,18 @@ index 59b8d6cc63..c252a370b8 100644 * Accessors for information from the context object */ diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h -index 9f9496c8f4..c29e05bbc9 100644 +index 2f7d21850..51c1bff5d 100644 --- a/zebra/zebra_dplane.h +++ b/zebra/zebra_dplane.h -@@ -324,6 +324,8 @@ struct zebra_dplane_ctx *dplane_ctx_get_head(struct dplane_ctx_list_head *q); +@@ -316,6 +316,8 @@ struct zebra_dplane_ctx *dplane_ctx_get_head(struct dplane_ctx_list_head *q); /* Init a list of contexts */ void dplane_ctx_q_init(struct dplane_ctx_list_head *q); - + +uint32_t dplane_ctx_queue_count(struct dplane_ctx_list_head *q); + /* * Accessors for information from the context object */ --- -2.43.2 +-- +2.39.4 diff --git a/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch b/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch index e865b861d19..847a63797fd 100644 --- a/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch +++ b/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch @@ -20,42 +20,42 @@ r1# Signed-off-by: Donald Sharp diff --git a/zebra/rib.h b/zebra/rib.h -index 2e62148ea0..b78cd218f6 100644 +index a721f4bac..15f877b66 100644 --- a/zebra/rib.h +++ b/zebra/rib.h -@@ -630,6 +630,7 @@ static inline struct nexthop_group *rib_get_fib_backup_nhg( - } - +@@ -628,6 +628,7 @@ extern int rib_add_gr_run(afi_t afi, vrf_id_t vrf_id, uint8_t proto, + uint8_t instance); + extern void zebra_vty_init(void); +extern uint32_t zebra_rib_dplane_results_count(void); - + extern pid_t pid; - + diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c -index f0e1ff6f27..21c73a3796 100644 +index e077c28d1..efa795331 100644 --- a/zebra/zebra_dplane.c +++ b/zebra/zebra_dplane.c -@@ -5998,12 +5998,14 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed) +@@ -6089,12 +6089,14 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed) struct zebra_dplane_provider *prov; uint64_t in, in_q, in_max, out, out_q, out_max; - + - vty_out(vty, "Zebra dataplane providers:\n"); - DPLANE_LOCK(); prov = dplane_prov_list_first(&zdplane_info.dg_providers); + in = dplane_ctx_queue_count(&zdplane_info.dg_update_list); DPLANE_UNLOCK(); - + + vty_out(vty, "dataplane Incoming Queue from Zebra: %" PRIu64 "\n", in); + vty_out(vty, "Zebra dataplane providers:\n"); + /* Show counters, useful info from each registered provider */ while (prov) { dplane_provider_lock(prov); -@@ -6022,13 +6024,19 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed) +@@ -6113,13 +6115,19 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed) out_max = atomic_load_explicit(&prov->dp_out_max, memory_order_relaxed); - + - vty_out(vty, "%s (%u): in: %"PRIu64", q: %"PRIu64", q_max: %"PRIu64", out: %"PRIu64", q: %"PRIu64", q_max: %"PRIu64"\n", - prov->dp_name, prov->dp_id, in, in_q, in_max, - out, out_q, out_max); @@ -65,24 +65,24 @@ index f0e1ff6f27..21c73a3796 100644 + ", q_max: %" PRIu64 "\n", + prov->dp_name, prov->dp_id, in, in_q, in_max, out, + out_q, out_max); - + prov = dplane_prov_list_next(&zdplane_info.dg_providers, prov); } - + + out = zebra_rib_dplane_results_count(); + vty_out(vty, "dataplane Outgoing Queue to Zebra: %" PRIu64 "\n", out); + return CMD_SUCCESS; } - + diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c -index 1ff3d98545..ae051d37eb 100644 +index 5b95d8668..430878daf 100644 --- a/zebra/zebra_rib.c +++ b/zebra/zebra_rib.c -@@ -4874,6 +4874,17 @@ static int rib_dplane_results(struct dplane_ctx_list_head *ctxlist) +@@ -5001,6 +5001,17 @@ static int rib_dplane_results(struct dplane_ctx_list_head *ctxlist) return 0; } - + +uint32_t zebra_rib_dplane_results_count(void) +{ + uint32_t count; @@ -97,6 +97,6 @@ index 1ff3d98545..ae051d37eb 100644 /* * Ensure there are no empty slots in the route_info array. * Every route type in zebra should be present there. --- -2.43.2 +-- +2.39.4 diff --git a/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch b/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch index 1731b6d21f3..e98f867fa9a 100644 --- a/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch +++ b/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch @@ -22,16 +22,16 @@ Signed-off-by: Chirag Shah Signed-off-by: Rajasekar Raja diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c -index 2243ffdc77..b1f8f19594 100644 +index 5e62854ed..c517a67f5 100644 --- a/bgpd/bgp_evpn.c +++ b/bgpd/bgp_evpn.c -@@ -6074,16 +6074,16 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni, +@@ -6301,16 +6301,16 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni, void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn) { struct bgp_dest *dest = NULL; - uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head); + struct bgp_dest *dest_next = NULL; - + - while (ann_count) { - dest = zebra_announce_pop(&bm->zebra_announce_head); - ann_count--; @@ -46,13 +46,13 @@ index 2243ffdc77..b1f8f19594 100644 + zebra_announce_del(&bm->zebra_announce_head, dest); + } } - bgp_evpn_remote_ip_hash_destroy(vpn); + bgp_evpn_vni_es_cleanup(vpn); diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c -index 492566f8c8..e16a58b443 100644 +index 4348a60c5..24577768f 100644 --- a/bgpd/bgpd.c +++ b/bgpd/bgpd.c -@@ -3689,19 +3689,25 @@ int bgp_delete(struct bgp *bgp) +@@ -3868,19 +3868,25 @@ int bgp_delete(struct bgp *bgp) safi_t safi; int i; struct bgp_dest *dest = NULL; @@ -60,9 +60,9 @@ index 492566f8c8..e16a58b443 100644 + struct bgp_table *dest_table = NULL; struct graceful_restart_info *gr_info; - uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head); - + assert(bgp); - + - while (ann_count) { - dest = zebra_announce_pop(&bm->zebra_announce_head); - ann_count--; @@ -83,8 +83,8 @@ index 492566f8c8..e16a58b443 100644 + zebra_announce_del(&bm->zebra_announce_head, dest); + } } - + bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL); --- -2.43.2 +-- +2.39.4 diff --git a/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch b/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch index 878d60eb5e3..f4f1b6b3b42 100644 --- a/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch +++ b/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch @@ -14,10 +14,10 @@ Ticket :#4001204 Signed-off-by: Rajasekar Raja diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c -index b1f8f19594..bb3cd62950 100644 +index c517a67f5..63e2e1c05 100644 --- a/bgpd/bgp_evpn.c +++ b/bgpd/bgp_evpn.c -@@ -6080,9 +6080,9 @@ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn) +@@ -6307,9 +6307,9 @@ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn) dest = dest_next) { dest_next = zebra_announce_next(&bm->zebra_announce_head, dest); if (dest->za_vpn == vpn) { @@ -27,12 +27,12 @@ index b1f8f19594..bb3cd62950 100644 - zebra_announce_del(&bm->zebra_announce_head, dest); } } - + bgp_evpn_remote_ip_hash_destroy(vpn); diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c -index 2e1c5e555b..342982069b 100644 +index 8132d0515..8ebfde10c 100644 --- a/bgpd/bgpd.c +++ b/bgpd/bgpd.c -@@ -3706,9 +3706,9 @@ int bgp_delete(struct bgp *bgp) +@@ -3885,9 +3885,9 @@ int bgp_delete(struct bgp *bgp) dest_next = zebra_announce_next(&bm->zebra_announce_head, dest); dest_table = bgp_dest_table(dest); if (dest_table->bgp == bgp) { @@ -42,7 +42,7 @@ index 2e1c5e555b..342982069b 100644 - zebra_announce_del(&bm->zebra_announce_head, dest); } } - --- -2.43.2 + +-- +2.39.4 diff --git a/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch b/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch deleted file mode 100644 index 791f52de396..00000000000 --- a/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch +++ /dev/null @@ -1,14 +0,0 @@ -diff --git a/bgpd/bgp_network.c b/bgpd/bgp_network.c -index 76bb9949d..974a57ef2 100644 ---- a/bgpd/bgp_network.c -+++ b/bgpd/bgp_network.c -@@ -774,6 +774,9 @@ int bgp_connect(struct peer *peer) - ? IPV4_MAX_BITLEN - : IPV6_MAX_BITLEN; - -+ if (!BGP_PEER_SU_UNSPEC(peer)) -+ bgp_md5_set(peer); -+ - bgp_md5_set_connect(peer->fd, &peer->su, prefixlen, - peer->password); - } diff --git a/src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch b/src/sonic-frr/patch/0054-build-dplane-fpm-sonic-module.patch similarity index 62% rename from src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch rename to src/sonic-frr/patch/0054-build-dplane-fpm-sonic-module.patch index 1ada5d9604d..03af6cad314 100644 --- a/src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch +++ b/src/sonic-frr/patch/0054-build-dplane-fpm-sonic-module.patch @@ -1,43 +1,46 @@ -Build dplane_fpm_sonic module +From 9e789e450003b9d2c7347c9f9b0d29d9b84d525f Mon Sep 17 00:00:00 2001 +From: sudhanshukumar22 +Date: Tue, 1 Oct 2024 02:28:17 -0700 +Subject: [PATCH] Build dplane_fpm_sonic module From: Carmine Scarpitta Signed-off-by: Carmine Scarpitta --- - debian/frr.install | 1 + - redhat/frr.spec.in | 1 + - zebra/subdir.am | 6 ++++++ + debian/frr.install | 1 + + redhat/frr.spec.in | 1 + + zebra/subdir.am | 6 ++++++ 3 files changed, 8 insertions(+) diff --git a/debian/frr.install b/debian/frr.install -index 044b48498..f53b874e3 100644 +index d4b904b6e..375f0dadd 100644 --- a/debian/frr.install +++ b/debian/frr.install -@@ -10,6 +10,7 @@ usr/lib/*/frr/libfrrcares.* - usr/lib/*/frr/libfrrospfapiclient.* +@@ -11,6 +11,7 @@ usr/lib/*/frr/libfrrospfapiclient.* + usr/lib/*/frr/libmgmt_be_nb.* usr/lib/*/frr/modules/bgpd_bmp.so usr/lib/*/frr/modules/dplane_fpm_nl.so +usr/lib/*/frr/modules/dplane_fpm_sonic.so usr/lib/*/frr/modules/zebra_cumulus_mlag.so usr/lib/*/frr/modules/zebra_fpm.so - usr/lib/*/frr/modules/zebra_irdp.so + usr/lib/*/frr/modules/pathd_pcep.so diff --git a/redhat/frr.spec.in b/redhat/frr.spec.in -index 4afd562a8..2eab817c9 100644 +index 13d5b8689..ffbe872c4 100644 --- a/redhat/frr.spec.in +++ b/redhat/frr.spec.in -@@ -714,6 +714,7 @@ fi +@@ -723,6 +723,7 @@ fi %endif %{_libdir}/frr/modules/zebra_cumulus_mlag.so %{_libdir}/frr/modules/dplane_fpm_nl.so +%{_libdir}/frr/modules/dplane_fpm_sonic.so - %{_libdir}/frr/modules/zebra_irdp.so %{_libdir}/frr/modules/bgpd_bmp.so - %{_bindir}/* + %{_libdir}/libfrr_pb.so* + %{_libdir}/libfrrfpm_pb.so* diff --git a/zebra/subdir.am b/zebra/subdir.am -index 5c4a87b93..3f1807d26 100644 +index d9c8d9045..ecc7195ae 100644 --- a/zebra/subdir.am +++ b/zebra/subdir.am -@@ -236,6 +236,12 @@ zebra_dplane_fpm_nl_la_LDFLAGS = $(MODULE_LDFLAGS) +@@ -245,6 +245,12 @@ zebra_dplane_fpm_nl_la_LDFLAGS = $(MODULE_LDFLAGS) zebra_dplane_fpm_nl_la_LIBADD = endif @@ -50,3 +53,6 @@ index 5c4a87b93..3f1807d26 100644 if NETLINK_DEBUG zebra_zebra_SOURCES += \ zebra/debug_nl.c \ +-- +2.39.4 + diff --git a/src/sonic-frr/patch/bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch b/src/sonic-frr/patch/0055-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch similarity index 54% rename from src/sonic-frr/patch/bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch rename to src/sonic-frr/patch/0055-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch index 161a0454b3c..ce4ee66ab31 100644 --- a/src/sonic-frr/patch/bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch +++ b/src/sonic-frr/patch/0055-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch @@ -6,47 +6,12 @@ Subject: [PATCH 1/5] lib: Include SID structure in seg6local nexthop Include SID structure information in seg6local nexthop data structure. Signed-off-by: Carmine Scarpitta ---- - lib/srv6.h | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/lib/srv6.h b/lib/srv6.h -index acfb0631cc..3749b01563 100644 ---- a/lib/srv6.h -+++ b/lib/srv6.h -@@ -72,6 +72,10 @@ struct seg6local_context { - struct in_addr nh4; - struct in6_addr nh6; - uint32_t table; -+ uint8_t block_len; -+ uint8_t node_len; -+ uint8_t function_len; -+ uint8_t argument_len; - }; - - struct srv6_locator { --- -2.45.2 - - -From ebea171cadaae63d89c41fdd5e4d507cf9084e42 Mon Sep 17 00:00:00 2001 -From: Carmine Scarpitta -Date: Sun, 15 Sep 2024 18:53:35 +0200 -Subject: [PATCH 2/5] bgpd: Include structure when installing End.DT4/6 SID - -Include SID structure information when installing an SRv6 End.DT6 or End.DT4 SID -in the forwarding plane. - -Signed-off-by: Carmine Scarpitta ---- - bgpd/bgp_mplsvpn.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c -index 2af553d982..b9eef35812 100644 +index 58e3097e1..ef8ca39e8 100644 --- a/bgpd/bgp_mplsvpn.c +++ b/bgpd/bgp_mplsvpn.c -@@ -393,6 +393,18 @@ void vpn_leak_zebra_vrf_sid_update_per_af(struct bgp *bgp, afi_t afi) +@@ -381,6 +381,19 @@ void vpn_leak_zebra_vrf_sid_update_per_af(struct bgp *bgp, afi_t afi) if (!vrf) return; @@ -62,31 +27,11 @@ index 2af553d982..b9eef35812 100644 + bgp->vpn_policy[afi] + .tovpn_sid_locator->argument_bits_length; + } ++ ctx.table = vrf->data.l.table_id; act = afi == AFI_IP ? ZEBRA_SEG6_LOCAL_ACTION_END_DT4 : ZEBRA_SEG6_LOCAL_ACTION_END_DT6; --- -2.45.2 - - -From f5c7cf0edc25905d357effe54ece27ed5db0ae6b Mon Sep 17 00:00:00 2001 -From: Carmine Scarpitta -Date: Sun, 15 Sep 2024 18:54:55 +0200 -Subject: [PATCH 3/5] bgpd: Include structure when installing End.DT46 SID - -Include SID structure information when installing an SRv6 End.DT46 SID -in the forwarding plane. - -Signed-off-by: Carmine Scarpitta ---- - bgpd/bgp_mplsvpn.c | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c -index b9eef35812..005a54ec1b 100644 ---- a/bgpd/bgp_mplsvpn.c -+++ b/bgpd/bgp_mplsvpn.c -@@ -453,6 +453,12 @@ void vpn_leak_zebra_vrf_sid_update_per_vrf(struct bgp *bgp) +@@ -432,6 +445,13 @@ void vpn_leak_zebra_vrf_sid_update_per_vrf(struct bgp *bgp) if (!vrf) return; @@ -96,31 +41,11 @@ index b9eef35812..005a54ec1b 100644 + ctx.function_len = bgp->tovpn_sid_locator->function_bits_length; + ctx.argument_len = bgp->tovpn_sid_locator->argument_bits_length; + } ++ ctx.table = vrf->data.l.table_id; act = ZEBRA_SEG6_LOCAL_ACTION_END_DT46; zclient_send_localsid(zclient, tovpn_sid, bgp->vrf_id, act, &ctx); --- -2.45.2 - - -From e2428a573321cb5909a3858008df2968b655a086 Mon Sep 17 00:00:00 2001 -From: Carmine Scarpitta -Date: Sun, 15 Sep 2024 18:56:21 +0200 -Subject: [PATCH 4/5] bgpd: Include structure when removing End.DT4/6 SID - -Include SID structure information when removing an SRv6 End.DT4 or End.DT6 SID -from the forwarding plane. - -Signed-off-by: Carmine Scarpitta ---- - bgpd/bgp_mplsvpn.c | 18 ++++++++++++++++-- - 1 file changed, 16 insertions(+), 2 deletions(-) - -diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c -index 005a54ec1b..aba1b4febe 100644 ---- a/bgpd/bgp_mplsvpn.c -+++ b/bgpd/bgp_mplsvpn.c -@@ -495,6 +495,7 @@ void vpn_leak_zebra_vrf_sid_update(struct bgp *bgp, afi_t afi) +@@ -470,6 +490,7 @@ void vpn_leak_zebra_vrf_sid_update(struct bgp *bgp, afi_t afi) void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi) { int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL); @@ -128,7 +53,7 @@ index 005a54ec1b..aba1b4febe 100644 if (bgp->vrf_id == VRF_UNKNOWN) { if (debug) -@@ -507,9 +508,22 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi) +@@ -482,9 +503,23 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi) zlog_debug("%s: deleting sid for vrf %s afi (id=%d)", __func__, bgp->name_pretty, bgp->vrf_id); @@ -144,37 +69,17 @@ index 005a54ec1b..aba1b4febe 100644 + bgp->vpn_policy[afi] + .tovpn_sid_locator->argument_bits_length; + } ++ zclient_send_localsid(zclient, - bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent, - bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC, NULL); -+ bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent, -+ bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC, -+ &seg6localctx); ++ bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent, ++ bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC, ++ &seg6localctx); XFREE(MTYPE_BGP_SRV6_SID, bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent); - } --- -2.45.2 - - -From 8d148b738cdf8b987a67e13979331d91337494f3 Mon Sep 17 00:00:00 2001 -From: Carmine Scarpitta -Date: Sun, 15 Sep 2024 18:56:48 +0200 -Subject: [PATCH 5/5] bgpd: Include structure when removing End.DT46 SID - -Include SID structure information when removing an SRv6 End.DT46 SID -from the forwarding plane. - -Signed-off-by: Carmine Scarpitta ---- - bgpd/bgp_mplsvpn.c | 12 +++++++++++- - 1 file changed, 11 insertions(+), 1 deletion(-) - -diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c -index aba1b4febe..6589f3e388 100644 ---- a/bgpd/bgp_mplsvpn.c -+++ b/bgpd/bgp_mplsvpn.c -@@ -535,6 +535,7 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi) + bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent = NULL; +@@ -497,6 +532,7 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi) void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp) { int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL); @@ -182,7 +87,7 @@ index aba1b4febe..6589f3e388 100644 if (bgp->vrf_id == VRF_UNKNOWN) { if (debug) -@@ -548,9 +549,18 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp) +@@ -510,9 +546,19 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp) zlog_debug("%s: deleting sid for vrf %s (id=%d)", __func__, bgp->name_pretty, bgp->vrf_id); @@ -195,13 +100,26 @@ index aba1b4febe..6589f3e388 100644 + seg6localctx.argument_len = + bgp->tovpn_sid_locator->argument_bits_length; + } ++ zclient_send_localsid(zclient, bgp->tovpn_zebra_vrf_sid_last_sent, bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC, - NULL); + &seg6localctx); XFREE(MTYPE_BGP_SRV6_SID, bgp->tovpn_zebra_vrf_sid_last_sent); + bgp->tovpn_zebra_vrf_sid_last_sent = NULL; } +diff --git a/lib/srv6.h b/lib/srv6.h +index 433c5c14f..53f5119aa 100644 +--- a/lib/srv6.h ++++ b/lib/srv6.h +@@ -103,6 +103,10 @@ struct seg6local_context { + struct in_addr nh4; + struct in6_addr nh6; + uint32_t table; ++ uint8_t block_len; ++ uint8_t node_len; ++ uint8_t function_len; ++ uint8_t argument_len; + struct seg6local_flavors_info flv; + }; --- -2.45.2 - diff --git a/src/sonic-frr/patch/0056-zebra-do-not-send-local-routes-to-fpm.patch b/src/sonic-frr/patch/0056-zebra-do-not-send-local-routes-to-fpm.patch new file mode 100644 index 00000000000..85f98f58ea4 --- /dev/null +++ b/src/sonic-frr/patch/0056-zebra-do-not-send-local-routes-to-fpm.patch @@ -0,0 +1,80 @@ +From 94d88c9e9155756fce152141e0d0d86e64a6981d Mon Sep 17 00:00:00 2001 +From: sudhanshukumar22 +Date: Mon, 25 Nov 2024 01:32:36 -0800 +Subject: [PATCH] https://github.com/FRRouting/frr/pull/12600, we are now + installing a new host route for every connected route (along with the subnet + route). However, the orchagent already installs a host route for a connected + interface address. Hence, not sending the connected host route to the FPM. + +--- + zebra/connected.c | 4 ++-- + zebra/zebra_rib.c | 16 ++++++++++++++-- + 2 files changed, 16 insertions(+), 4 deletions(-) + +diff --git a/zebra/connected.c b/zebra/connected.c +index 404f892f6..2c698bed1 100644 +--- a/zebra/connected.c ++++ b/zebra/connected.c +@@ -191,7 +191,7 @@ void connected_up(struct interface *ifp, struct connected *ifc) + uint32_t flags = 0; + uint32_t count = 0; + struct connected *c; +- bool install_local = true; ++ bool install_local = false; + + zvrf = ifp->vrf->info; + if (!zvrf) { +@@ -394,7 +394,7 @@ void connected_down(struct interface *ifp, struct connected *ifc) + struct zebra_vrf *zvrf; + uint32_t count = 0; + struct connected *c; +- bool remove_local = true; ++ bool remove_local = false; + + zvrf = ifp->vrf->info; + if (!zvrf) { +diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c +index 5b95d8668..b0921f657 100644 +--- a/zebra/zebra_rib.c ++++ b/zebra/zebra_rib.c +@@ -701,6 +701,12 @@ void rib_install_kernel(struct route_node *rn, struct route_entry *re, + /* Update fib selection */ + dest->selected_fib = re; + ++ /* Do not install local routes to FIB */ ++ if (re->type == ZEBRA_ROUTE_LOCAL) { ++ zlog_debug("Not installing local route re %p (%s)", ++ re, zebra_route_string(re->type)); ++ return; ++ } + /* + * Make sure we update the FPM any time we send new information to + * the kernel. +@@ -762,6 +768,12 @@ void rib_uninstall_kernel(struct route_node *rn, struct route_entry *re) + return; + } + ++ /* Do not uninstall local routes to FIB */ ++ if (re->type == ZEBRA_ROUTE_LOCAL) { ++ zlog_debug("Not uninstalling local route re %p (%s)", ++ re, zebra_route_string(re->type)); ++ return; ++ } + /* + * Make sure we update the FPM any time we send new information to + * the dataplane. +@@ -1196,9 +1208,9 @@ static struct route_entry *rib_choose_best(struct route_entry *current, + * or loopback interface. If not, pick the last connected + * route of the set of lowest metric connected routes. + */ +- possible = rib_choose_best_type(ZEBRA_ROUTE_LOCAL, current, alternate); ++ /*possible = rib_choose_best_type(ZEBRA_ROUTE_LOCAL, current, alternate); + if (possible) +- return possible; ++ return possible; */ + + possible = rib_choose_best_type(ZEBRA_ROUTE_CONNECT, current, alternate); + if (possible) +-- +2.39.4 + diff --git a/src/sonic-frr/patch/0057-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch b/src/sonic-frr/patch/0057-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch new file mode 100644 index 00000000000..1e832b803e7 --- /dev/null +++ b/src/sonic-frr/patch/0057-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch @@ -0,0 +1,85 @@ +From 274386fbefc83dc4f2f3184637db3c973f8200b6 Mon Sep 17 00:00:00 2001 +From: sudhanshukumar22 +Date: Wed, 13 Nov 2024 23:12:22 -0800 +Subject: [PATCH] Adding changes to write ip nht resolve-via-default + configuration for VRF in zebra + +--- + zebra/zebra_vrf.c | 34 +++++++++++++++++++++++++++++++++++ + zebra/zebra_vrf.h | 1 + + zebra/zebra_vty.c | 2 ++ + 3 files changed, 37 insertions(+) + +diff --git a/zebra/zebra_vrf.c b/zebra/zebra_vrf.c +index e464e47b1..ae8624a5e 100644 +--- a/zebra/zebra_vrf.c ++++ b/zebra/zebra_vrf.c +@@ -541,6 +541,40 @@ int zebra_vrf_netns_handler_create(struct vty *vty, struct vrf *vrf, + return CMD_SUCCESS; + } + ++void zebra_vrf_config_write(struct vty *vty) ++{ ++ struct vrf *vrf; ++ struct zebra_vrf *zvrf; ++ ++ RB_FOREACH (vrf, vrf_name_head, &vrfs_by_name) { ++ zvrf = vrf->info; ++ ++ if (!zvrf) ++ continue; ++ ++ if (zvrf_id(zvrf) == VRF_DEFAULT) { ++ if (zvrf->zebra_rnh_ip_default_route) ++ vty_out(vty, "ip nht resolve-via-default\n"); ++ ++ if (zvrf->zebra_rnh_ipv6_default_route) ++ vty_out(vty, "ipv6 nht resolve-via-default\n"); ++ } else { ++ vty_frame(vty, "vrf %s\n", zvrf_name(zvrf)); ++ if (zvrf->zebra_rnh_ip_default_route) ++ vty_out(vty, " ip nht resolve-via-default\n"); ++ ++ if (zvrf->zebra_rnh_ipv6_default_route) ++ vty_out(vty, " ipv6 nht resolve-via-default\n"); ++ } ++ if (zvrf_id(zvrf) != VRF_DEFAULT) ++ vty_endframe(vty, "exit-vrf\n!\n"); ++ else ++ vty_out(vty, "!\n"); ++ } ++ return 0; ++ ++} ++ + /* Zebra VRF initialization. */ + void zebra_vrf_init(void) + { +diff --git a/zebra/zebra_vrf.h b/zebra/zebra_vrf.h +index 5cbfab1dd..36f42a3db 100644 +--- a/zebra/zebra_vrf.h ++++ b/zebra/zebra_vrf.h +@@ -246,6 +246,7 @@ extern struct zebra_vrf *zebra_vrf_lookup_by_name(const char *); + extern vrf_id_t zebra_vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id); + extern struct zebra_vrf *zebra_vrf_alloc(struct vrf *vrf); + extern struct route_table *zebra_vrf_table(afi_t, safi_t, vrf_id_t); ++extern void zebra_vrf_config_write(struct vty *vty); + + /* + * API to associate a VRF with a NETNS. +diff --git a/zebra/zebra_vty.c b/zebra/zebra_vty.c +index 9a68d5ae9..ce772b818 100644 +--- a/zebra/zebra_vty.c ++++ b/zebra/zebra_vty.c +@@ -3809,6 +3809,8 @@ static int config_write_protocol(struct vty *vty) + + zebra_pbr_config_write(vty); + ++ zebra_vrf_config_write(vty); ++ + if (!zebra_vxlan_get_accept_bgp_seq()) + vty_out(vty, "no evpn accept-bgp-seq\n"); + +-- +2.39.4 + diff --git a/src/sonic-frr/patch/0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch b/src/sonic-frr/patch/0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch new file mode 100644 index 00000000000..a952c0a609b --- /dev/null +++ b/src/sonic-frr/patch/0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch @@ -0,0 +1,71 @@ +From 83714071c68c588c66972fc0fe0f5f2a57a7dd55 Mon Sep 17 00:00:00 2001 +From: sudhanshukumar22 +Date: Thu, 21 Nov 2024 20:57:11 -0800 +Subject: [PATCH] When the file is config replayed, we cannot handle the errors + in command execution. We would let all commands in the file to complete, + irrespective of some of them failing. Also, certain protocols like RIP, RIPng + are not supported in SONIC. So, it is expected that their configuration files + will not be present. + +--- + lib/vty.c | 16 +++++++++++++--- + mgmtd/mgmt_be_adapter.c | 2 +- + 2 files changed, 14 insertions(+), 4 deletions(-) + +diff --git a/lib/vty.c b/lib/vty.c +index 1c9cff478..017e0c7c4 100644 +--- a/lib/vty.c ++++ b/lib/vty.c +@@ -2654,7 +2654,9 @@ void vty_read_file_finish(struct vty *vty, struct nb_config *config) + nl = strchr(ve->error_buf, '\n'); + if (nl) + *nl = '\0'; +- flog_err(EC_LIB_VTY, "%s on config line %u: %s", message, ++ /* When the file is config replayed, we cannot handle the errors in command execution. ++ We would let all commands in the file to complete, irrespective of some of them failing. */ ++ flog_warn(EC_LIB_VTY, "%s on config line %u: %s", message, + ve->line_num, ve->error_buf); + } + +@@ -2773,7 +2775,11 @@ FILE *vty_open_config(const char *config_file, char *config_default_dir) + flog_warn(EC_LIB_BACKUP_CONFIG, + "using backup configuration file!"); + else { +- flog_err( ++ /* There are few protocols e.g. RIP, RIPng, which are ununsed in SONIC. ++ So, there will not be any config file for them. ++ Flagging error, will be considered a breakage by loganalyzer, whereas ++ it is valid for these protocol config file to be not present. */ ++ flog_warn( + EC_LIB_VTY, + "%s: can't open configuration file [%s]", + __func__, config_file); +@@ -2822,7 +2828,11 @@ FILE *vty_open_config(const char *config_file, char *config_default_dir) + "using backup configuration file!"); + fullpath = config_default_dir; + } else { +- flog_err(EC_LIB_VTY, ++ /* There are few protocols e.g. RIP, RIPng, which are ununsed in SONIC. ++ So, there will not be any config file for them. ++ Flagging error, will be considered a breakage by loganalyzer, whereas ++ it is valid for these protocol config file to be not present. */ ++ flog_warn(EC_LIB_VTY, + "can't open configuration file [%s]", + config_default_dir); + goto tmp_free_and_out; +diff --git a/mgmtd/mgmt_be_adapter.c b/mgmtd/mgmt_be_adapter.c +index b311bf469..58f866115 100644 +--- a/mgmtd/mgmt_be_adapter.c ++++ b/mgmtd/mgmt_be_adapter.c +@@ -732,7 +732,7 @@ static void mgmt_be_adapter_conn_init(struct event *thread) + * transaction in progress. + */ + if (mgmt_txn_notify_be_adapter_conn(adapter, true) != 0) { +- zlog_err("XXX txn in progress, retry init"); ++ zlog_warn("XXX txn in progress, retry init"); + mgmt_be_adapter_sched_init_event(adapter); + return; + } +-- +2.39.4 + diff --git a/src/sonic-frr/patch/0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch b/src/sonic-frr/patch/0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch new file mode 100644 index 00000000000..9d3962f5518 --- /dev/null +++ b/src/sonic-frr/patch/0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch @@ -0,0 +1,32 @@ +From 8f6adef67c93d04a9eefa1404db0c8de9877fb38 Mon Sep 17 00:00:00 2001 +From: sudhanshukumar22 +Date: Tue, 26 Nov 2024 00:40:46 -0800 +Subject: [PATCH] Pull request: https://github.com/FRRouting/frr/pull/17487 + bgpd: Do not reset peers on suppress-fib toggling If the desired state is the + same - do nothing instead of resetting once again. + +Fixes: bdb5ae8 (bgpd: Make suppress-fib-pending clear peering) + +Signed-off-by: Donatas Abraitis +--- + bgpd/bgpd.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c +index d6d874be2..0b2bf821e 100644 +--- a/bgpd/bgpd.c ++++ b/bgpd/bgpd.c +@@ -461,6 +461,10 @@ void bgp_suppress_fib_pending_set(struct bgp *bgp, bool set) + if (bgp->inst_type == BGP_INSTANCE_TYPE_VIEW) + return; + ++ /* Do nothing if already in a desired state */ ++ if (set == !!CHECK_FLAG(bgp->flags, BGP_FLAG_SUPPRESS_FIB_PENDING)) ++ return; ++ + if (set) { + SET_FLAG(bgp->flags, BGP_FLAG_SUPPRESS_FIB_PENDING); + /* Send msg to zebra for the first instance of bgp enabled +-- +2.39.4 + diff --git a/src/sonic-frr/patch/0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch b/src/sonic-frr/patch/0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch new file mode 100644 index 00000000000..c1088df457b --- /dev/null +++ b/src/sonic-frr/patch/0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch @@ -0,0 +1,106 @@ +From 4e3f27fec6a3b4c0b853ad30f73bf0d34003e23f Mon Sep 17 00:00:00 2001 +From: sk408845 +Date: Tue, 26 Nov 2024 07:33:58 +0000 +Subject: [PATCH] Port https://github.com/FRRouting/frr/pull/17435/ bgpd: + Validate both nexthop information (NEXTHOP and NLRI) If we receive an IPv6 + prefix e.g.: 2001:db8:100::/64 with nextop: 0.0.0.0, and mp_nexthop: fc00::2, + we should not treat this with an invalid nexthop because of 0.0.0.0. We MUST + check for MP_REACH attribute also and decide later if we have at least one a + valid nexthop. + +Signed-off-by: Donatas Abraitis +--- + bgpd/bgp_route.c | 50 ++++++++++++++++++++++-------------------------- + 1 file changed, 23 insertions(+), 27 deletions(-) + +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index 26089e326..e05507c52 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -4032,7 +4032,7 @@ bool bgp_update_martian_nexthop(struct bgp *bgp, afi_t afi, safi_t safi, + uint8_t type, uint8_t stype, struct attr *attr, + struct bgp_dest *dest) + { +- bool ret = false; ++ bool nh_invalid = false; + bool is_bgp_static_route = + (type == ZEBRA_ROUTE_BGP && stype == BGP_ROUTE_STATIC) ? true + : false; +@@ -4054,12 +4054,16 @@ bool bgp_update_martian_nexthop(struct bgp *bgp, afi_t afi, safi_t safi, + (safi != SAFI_UNICAST && safi != SAFI_MULTICAST && safi != SAFI_EVPN)) + return false; + +- /* If NEXT_HOP is present, validate it. */ +- if (attr->flag & ATTR_FLAG_BIT(BGP_ATTR_NEXT_HOP)) { +- if (!ipv4_unicast_valid(&attr->nexthop) || +- bgp_nexthop_self(bgp, afi, type, stype, attr, dest)) +- return true; +- } ++ /* If NEXT_HOP is present, validate it: ++ * The route can have both nexthop + mp_nexthop encoded as multiple NLRIs, ++ * and we MUST check if at least one of them is valid. ++ * E.g.: IPv6 prefix can be with nexthop: 0.0.0.0, and mp_nexthop: fc00::1. ++ */ ++ if (CHECK_FLAG(attr->flag, ATTR_FLAG_BIT(BGP_ATTR_NEXT_HOP))) ++ nh_invalid = (attr->nexthop.s_addr == INADDR_ANY || ++ !ipv4_unicast_valid(&attr->nexthop) || ++ bgp_nexthop_self(bgp, afi, type, stype, attr, dest)); ++ + + /* If MP_NEXTHOP is present, validate it. */ + /* Note: For IPv6 nexthops, we only validate the global (1st) nexthop; +@@ -4074,39 +4078,31 @@ bool bgp_update_martian_nexthop(struct bgp *bgp, afi_t afi, safi_t safi, + switch (attr->mp_nexthop_len) { + case BGP_ATTR_NHLEN_IPV4: + case BGP_ATTR_NHLEN_VPNV4: +- ret = (attr->mp_nexthop_global_in.s_addr == +- INADDR_ANY || +- !ipv4_unicast_valid( +- &attr->mp_nexthop_global_in) || +- bgp_nexthop_self(bgp, afi, type, stype, attr, +- dest)); ++ nh_invalid = (attr->mp_nexthop_global_in.s_addr == INADDR_ANY || ++ !ipv4_unicast_valid(&attr->mp_nexthop_global_in) || ++ bgp_nexthop_self(bgp, afi, type, stype, attr, dest)); + break; + + case BGP_ATTR_NHLEN_IPV6_GLOBAL: + case BGP_ATTR_NHLEN_VPNV6_GLOBAL: +- ret = (IN6_IS_ADDR_UNSPECIFIED( +- &attr->mp_nexthop_global) +- || IN6_IS_ADDR_LOOPBACK(&attr->mp_nexthop_global) +- || IN6_IS_ADDR_MULTICAST( +- &attr->mp_nexthop_global) +- || bgp_nexthop_self(bgp, afi, type, stype, attr, +- dest)); ++ nh_invalid = (IN6_IS_ADDR_UNSPECIFIED(&attr->mp_nexthop_global) || ++ IN6_IS_ADDR_LOOPBACK(&attr->mp_nexthop_global) || ++ IN6_IS_ADDR_MULTICAST(&attr->mp_nexthop_global) || ++ bgp_nexthop_self(bgp, afi, type, stype, attr, dest)); + break; + case BGP_ATTR_NHLEN_IPV6_GLOBAL_AND_LL: +- ret = (IN6_IS_ADDR_LOOPBACK(&attr->mp_nexthop_global) +- || IN6_IS_ADDR_MULTICAST( +- &attr->mp_nexthop_global) +- || bgp_nexthop_self(bgp, afi, type, stype, attr, +- dest)); ++ nh_invalid = (IN6_IS_ADDR_LOOPBACK(&attr->mp_nexthop_global) || ++ IN6_IS_ADDR_MULTICAST(&attr->mp_nexthop_global) || ++ bgp_nexthop_self(bgp, afi, type, stype, attr, dest)); + break; + + default: +- ret = true; ++ nh_invalid = true; + break; + } + } + +- return ret; ++ return nh_invalid; + } + + static void bgp_attr_add_no_export_community(struct attr *attr) +-- +2.20.1 + diff --git a/src/sonic-frr/patch/0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch b/src/sonic-frr/patch/0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch new file mode 100644 index 00000000000..63bbf717025 --- /dev/null +++ b/src/sonic-frr/patch/0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch @@ -0,0 +1,23 @@ +From 501f267ec4c7359fc518ba31c5d63045c935045c Mon Sep 17 00:00:00 2001 +From: dgsudharsan +Date: Wed, 4 Dec 2024 20:39:46 +0000 +Subject: [PATCH] Set multipath to 514 and disable bgp-vnc for optimization + + +diff --git a/debian/rules b/debian/rules +index 5a8199afb7..3d762e6df1 100755 +--- a/debian/rules ++++ b/debian/rules +@@ -66,8 +66,7 @@ override_dh_auto_configure: + --disable-protobuf \ + --disable-zeromq \ + --enable-ospfapi \ +- --enable-bgp-vnc \ +- --enable-multipath=256 \ ++ --enable-multipath=514 \ + \ + --enable-user=frr \ + --enable-group=frr \ +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0062-zebra-lib-use-internal-rbtree-per-ns.patch b/src/sonic-frr/patch/0062-zebra-lib-use-internal-rbtree-per-ns.patch new file mode 100644 index 00000000000..4fb56f6094f --- /dev/null +++ b/src/sonic-frr/patch/0062-zebra-lib-use-internal-rbtree-per-ns.patch @@ -0,0 +1,1826 @@ +From a4eb079b5d87dbc6720ac9788ad3bec5a25aa519 Mon Sep 17 00:00:00 2001 +From: Mark Stapp +Date: Tue, 15 Oct 2024 11:31:22 -0400 +Subject: [PATCH 1/9] zebra: make a zif MTYPE internal/static + +Make an MTYPE used in zifs internal/static + +Signed-off-by: Mark Stapp +--- + zebra/interface.c | 2 +- + zebra/interface.h | 3 --- + 2 files changed, 1 insertion(+), 4 deletions(-) + +diff --git a/zebra/interface.c b/zebra/interface.c +index 5ce222cc04..bbdc62c1c2 100644 +--- a/zebra/interface.c ++++ b/zebra/interface.c +@@ -44,7 +44,7 @@ DEFINE_MTYPE_STATIC(ZEBRA, ZINFO, "Zebra Interface Information"); + DEFINE_HOOK(zebra_if_extra_info, (struct vty * vty, struct interface *ifp), + (vty, ifp)); + +-DEFINE_MTYPE(ZEBRA, ZIF_DESC, "Intf desc"); ++DEFINE_MTYPE_STATIC(ZEBRA, ZIF_DESC, "Intf desc"); + + static void if_down_del_nbr_connected(struct interface *ifp); + +diff --git a/zebra/interface.h b/zebra/interface.h +index 7d633f32d2..4cbec83cce 100644 +--- a/zebra/interface.h ++++ b/zebra/interface.h +@@ -94,9 +94,6 @@ enum zebra_if_flags { + #define ZEBRA_IF_IS_PROTODOWN_ONLY_EXTERNAL(zif) \ + ((zif)->protodown_rc == ZEBRA_PROTODOWN_EXTERNAL) + +-/* Mem type for zif desc */ +-DECLARE_MTYPE(ZIF_DESC); +- + /* `zebra' daemon local interface structure. */ + struct zebra_if { + /* back pointer to the interface */ +-- +2.43.2 + + +From ccc18a117a74b3d7caec9db926b0d52e9180ef13 Mon Sep 17 00:00:00 2001 +From: Mark Stapp +Date: Tue, 22 Oct 2024 15:20:54 -0700 +Subject: [PATCH 2/9] zebra: add new per-NS tree of interfaces + +Add new per-NS interface typerb tree, using external linkage, to +replace the use of the if_table table. +Add apis to iterate the per-NS collection - which is not public. + +Signed-off-by: Mark Stapp +--- + zebra/zebra_ns.c | 188 +++++++++++++++++++++++++++++++++++++++++++++++ + zebra/zebra_ns.h | 34 +++++++++ + 2 files changed, 222 insertions(+) + +diff --git a/zebra/zebra_ns.c b/zebra/zebra_ns.c +index 803d8f0034..c6b279a9d7 100644 +--- a/zebra/zebra_ns.c ++++ b/zebra/zebra_ns.c +@@ -28,9 +28,185 @@ + extern struct zebra_privs_t zserv_privs; + + DEFINE_MTYPE_STATIC(ZEBRA, ZEBRA_NS, "Zebra Name Space"); ++DEFINE_MTYPE_STATIC(ZEBRA, ZNS_IFP, "Zebra NS Ifp"); ++ ++static int ifp_tree_cmp(const struct ifp_tree_link *a, const struct ifp_tree_link *b); ++ ++DECLARE_RBTREE_UNIQ(ifp_tree, struct ifp_tree_link, link, ifp_tree_cmp); + + static struct zebra_ns *dzns; + ++static int ifp_tree_cmp(const struct ifp_tree_link *a, const struct ifp_tree_link *b) ++{ ++ return (a->ifindex - b->ifindex); ++} ++ ++/* ++ * Link an ifp into its parent NS ++ */ ++void zebra_ns_link_ifp(struct zebra_ns *zns, struct interface *ifp) ++{ ++ struct zebra_if *zif; ++ struct ifp_tree_link *link, tlink = {}; ++ ++ zif = ifp->info; ++ assert(zif != NULL); ++ ++ if (zif->ns_tree_link) { ++ assert(zif->ns_tree_link->zns == zns); ++ assert(zif->ns_tree_link->ifp == ifp); ++ return; ++ } ++ ++ /* Lookup first - already linked? */ ++ tlink.ifindex = ifp->ifindex; ++ link = ifp_tree_find(&zns->ifp_tree, &tlink); ++ if (link) { ++ assert(link->ifp == ifp); ++ return; ++ } ++ ++ /* Allocate new linkage struct and add */ ++ link = XCALLOC(MTYPE_ZNS_IFP, sizeof(struct ifp_tree_link)); ++ link->ifp = ifp; ++ link->ifindex = ifp->ifindex; ++ link->zns = zns; ++ ++ ifp_tree_add(&zns->ifp_tree, link); ++ ++ zif->ns_tree_link = link; ++} ++ ++/* ++ * Unlink an ifp from its parent NS (probably because the ifp is being deleted) ++ */ ++void zebra_ns_unlink_ifp(struct interface *ifp) ++{ ++ struct zebra_if *zif; ++ struct ifp_tree_link *link; ++ struct zebra_ns *zns; ++ ++ zif = ifp->info; ++ if (zif && zif->ns_tree_link) { ++ link = zif->ns_tree_link; ++ zns = link->zns; ++ ++ ifp_tree_del(&zns->ifp_tree, link); ++ ++ zif->ns_tree_link = NULL; ++ ++ XFREE(MTYPE_ZNS_IFP, link); ++ } ++} ++ ++/* ++ * ifp lookup apis ++ */ ++struct interface *zebra_ns_lookup_ifp(struct zebra_ns *zns, uint32_t ifindex) ++{ ++ struct interface *ifp = NULL; ++ struct ifp_tree_link *link, tlink = {}; ++ ++ /* Init temp struct for lookup */ ++ tlink.ifindex = ifindex; ++ ++ link = ifp_tree_find(&zns->ifp_tree, &tlink); ++ if (link) ++ ifp = link->ifp; ++ ++ return ifp; ++} ++ ++static int lookup_ifp_name_cb(struct interface *ifp, void *arg); ++ ++struct ifp_name_ctx { ++ const char *ifname; ++ struct interface *ifp; ++}; ++ ++struct interface *zebra_ns_lookup_ifp_name(struct zebra_ns *zns, const char *ifname) ++{ ++ struct ifp_name_ctx ctx = {}; ++ ++ /* Hand context struct into walker function for use in its callback */ ++ ctx.ifname = ifname; ++ zebra_ns_ifp_walk(zns, lookup_ifp_name_cb, &ctx); ++ ++ return ctx.ifp; ++} ++ ++static int lookup_ifp_name_cb(struct interface *ifp, void *arg) ++{ ++ struct ifp_name_ctx *pctx = arg; ++ ++ if (strcmp(ifp->name, pctx->ifname) == 0) { ++ pctx->ifp = ifp; ++ return NS_WALK_STOP; ++ } ++ ++ return NS_WALK_CONTINUE; ++} ++ ++/* Iterate collection of ifps, calling application's callback. Callback uses ++ * return semantics from lib/ns.h: return NS_WALK_STOP to stop the iteration. ++ * Caller's 'arg' is included in each callback. ++ */ ++int zebra_ns_ifp_walk(struct zebra_ns *zns, ++ int (*func)(struct interface *ifp, void *arg), void *arg) ++{ ++ struct ifp_tree_link *link; ++ int ret = NS_WALK_CONTINUE; ++ ++ frr_each (ifp_tree, &zns->ifp_tree, link) { ++ ret = (func)(link->ifp, arg); ++ if (ret == NS_WALK_STOP) ++ break; ++ } ++ ++ if (ret == NS_WALK_STOP) ++ return NS_WALK_STOP; ++ else ++ return NS_WALK_CONTINUE; ++} ++ ++/* ++ * Walk all NSes, and all ifps for each NS. ++ */ ++struct ns_ifp_walk_ctx { ++ int (*func)(struct interface *ifp, void *arg); ++ void *arg; ++ int ret; ++}; ++ ++static int ns_ifp_walker(struct ns *ns, void *in_param, void **unused); ++ ++void zebra_ns_ifp_walk_all(int (*func)(struct interface *ifp, void *arg), void *arg) ++{ ++ struct ns_ifp_walk_ctx ctx = {}; ++ ++ ctx.func = func; ++ ctx.arg = arg; ++ ++ ns_walk_func(ns_ifp_walker, &ctx, NULL); ++} ++ ++static int ns_ifp_walker(struct ns *ns, void *in_param, void **unused) ++{ ++ struct zebra_ns *zns; ++ struct ns_ifp_walk_ctx *ctx = in_param; ++ int ret = NS_WALK_CONTINUE; ++ ++ zns = ns->info; ++ if (zns == NULL) ++ goto done; ++ ++ ret = zebra_ns_ifp_walk(zns, ctx->func, ctx->arg); ++ ++done: ++ ++ return ret; ++} ++ + static int zebra_ns_disable_internal(struct zebra_ns *zns, bool complete); + + struct zebra_ns *zebra_ns_lookup(ns_id_t ns_id) +@@ -59,6 +235,7 @@ static int zebra_ns_new(struct ns *ns) + + /* Do any needed per-NS data structure allocation. */ + zns->if_table = route_table_init(); ++ ifp_tree_init(&zns->ifp_tree); + + return 0; + } +@@ -66,11 +243,22 @@ static int zebra_ns_new(struct ns *ns) + static int zebra_ns_delete(struct ns *ns) + { + struct zebra_ns *zns = (struct zebra_ns *)ns->info; ++ struct zebra_if *zif; ++ struct ifp_tree_link *link; + + if (IS_ZEBRA_DEBUG_EVENT) + zlog_info("ZNS %s with id %u (deleted)", ns->name, ns->ns_id); + if (!zns) + return 0; ++ ++ /* Clean up ifp tree */ ++ while ((link = ifp_tree_pop(&zns->ifp_tree)) != NULL) { ++ zif = link->ifp->info; ++ ++ zif->ns_tree_link = NULL; ++ XFREE(MTYPE_ZNS_IFP, link); ++ } ++ + XFREE(MTYPE_ZEBRA_NS, ns->info); + return 0; + } +diff --git a/zebra/zebra_ns.h b/zebra/zebra_ns.h +index 8d988c3f82..1ddecc8252 100644 +--- a/zebra/zebra_ns.h ++++ b/zebra/zebra_ns.h +@@ -32,6 +32,20 @@ struct nlsock { + }; + #endif + ++/* Tree of interfaces: external linkage struct, and rbtree */ ++PREDECL_RBTREE_UNIQ(ifp_tree); ++ ++struct ifp_tree_link { ++ struct ifp_tree_item link; ++ ++ ifindex_t ifindex; ++ ++ struct interface *ifp; ++ ++ /* Backpointer */ ++ struct zebra_ns *zns; ++}; ++ + struct zebra_ns { + /* net-ns name. */ + char name[VRF_NAMSIZ]; +@@ -55,12 +69,32 @@ struct zebra_ns { + + struct route_table *if_table; + ++ /* Tree of interfaces in this ns */ ++ struct ifp_tree_head ifp_tree; ++ + /* Back pointer */ + struct ns *ns; + }; + + struct zebra_ns *zebra_ns_lookup(ns_id_t ns_id); + ++/* Manage collection of ifps per-NS */ ++void zebra_ns_link_ifp(struct zebra_ns *zns, struct interface *ifp); ++void zebra_ns_unlink_ifp(struct interface *ifp); ++struct interface *zebra_ns_lookup_ifp(struct zebra_ns *zns, uint32_t ifindex); ++struct interface *zebra_ns_lookup_ifp_name(struct zebra_ns *zns, const char *ifname); ++ ++/* Iterate collection of ifps, calling application's callback. Callback uses ++ * return semantics from lib/ns.h: return NS_WALK_STOP to stop the iteration. ++ * Caller's 'arg' is included in each callback. ++ * The iterator returns STOP or CONTINUE also. ++ */ ++int zebra_ns_ifp_walk(struct zebra_ns *zns, ++ int (*func)(struct interface *ifp, void *arg), void *arg); ++ ++/* Walk all NSes, and all ifps for each NS. */ ++void zebra_ns_ifp_walk_all(int (*func)(struct interface *ifp, void *arg), void *arg); ++ + int zebra_ns_init(void); + int zebra_ns_enable(ns_id_t ns_id, void **info); + int zebra_ns_disabled(struct ns *ns); +-- +2.43.2 + + +From 24957f224f8a9918e451d152917feb5cf5ce0d2f Mon Sep 17 00:00:00 2001 +From: Mark Stapp +Date: Tue, 22 Oct 2024 15:23:17 -0700 +Subject: [PATCH 3/9] zebra: use new per-NS interface iteration + +Replace use of the old if_table with the new per-NS ifp +iteration apis. + +Signed-off-by: Mark Stapp +--- + zebra/if_netlink.c | 61 +++++++++++++++++++++++++++++++--------------- + 1 file changed, 41 insertions(+), 20 deletions(-) + +diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c +index 5f096e3039..f7567f06d0 100644 +--- a/zebra/if_netlink.c ++++ b/zebra/if_netlink.c +@@ -1775,6 +1775,15 @@ static int netlink_request_tunneldump(struct zebra_ns *zns, int family, + return netlink_request(&zns->netlink_cmd, &req); + } + ++/* Prototype for tunneldump walker */ ++static int tunneldump_walk_cb(struct interface *ifp, void *arg); ++ ++struct tunneldump_ctx { ++ struct zebra_ns *zns; ++ struct zebra_dplane_info *dp_info; ++ int ret; ++}; ++ + /* + * Currently we only ask for vxlan l3svd vni information. + * In the future this can be expanded. +@@ -1782,35 +1791,47 @@ static int netlink_request_tunneldump(struct zebra_ns *zns, int family, + int netlink_tunneldump_read(struct zebra_ns *zns) + { + int ret = 0; ++ struct tunneldump_ctx ctx = {}; + struct zebra_dplane_info dp_info; +- struct route_node *rn; +- struct interface *tmp_if = NULL; +- struct zebra_if *zif; +- struct nlsock *netlink_cmd = &zns->netlink_cmd; + + zebra_dplane_info_from_zns(&dp_info, zns, true /*is_cmd*/); + +- for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) { +- tmp_if = (struct interface *)rn->info; +- if (!tmp_if) +- continue; +- zif = tmp_if->info; +- if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) +- continue; ++ /* Set up context and call iterator */ ++ ctx.zns = zns; ++ ctx.dp_info = &dp_info; + +- ret = netlink_request_tunneldump(zns, PF_BRIDGE, +- tmp_if->ifindex); +- if (ret < 0) +- return ret; ++ zebra_ns_ifp_walk(zns, tunneldump_walk_cb, &ctx); ++ ret = ctx.ret; + +- ret = netlink_parse_info(netlink_link_change, netlink_cmd, +- &dp_info, 0, true); ++ return ret; ++} + +- if (ret < 0) +- return ret; ++static int tunneldump_walk_cb(struct interface *ifp, void *arg) ++{ ++ int ret; ++ struct tunneldump_ctx *ctx = arg; ++ struct zebra_if *zif; ++ ++ zif = ifp->info; ++ if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) ++ goto done; ++ ++ ret = netlink_request_tunneldump(ctx->zns, PF_BRIDGE, ifp->ifindex); ++ if (ret < 0) { ++ ctx->ret = ret; ++ return NS_WALK_STOP; + } + +- return 0; ++ ret = netlink_parse_info(netlink_link_change, &(ctx->zns->netlink_cmd), ++ ctx->dp_info, 0, true); ++ ++ if (ret < 0) { ++ ctx->ret = ret; ++ return NS_WALK_STOP; ++ } ++ ++done: ++ return NS_WALK_CONTINUE; + } + + static const char *port_state2str(uint8_t state) +-- +2.43.2 + + +From 8504e1119d084deef326a72f930873e6f7d921a6 Mon Sep 17 00:00:00 2001 +From: Mark Stapp +Date: Tue, 22 Oct 2024 15:56:11 -0700 +Subject: [PATCH 4/9] isisd: add include file + +Add an include to an isis header so it's self-contained. + +Signed-off-by: Mark Stapp +--- + isisd/isis_route.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/isisd/isis_route.h b/isisd/isis_route.h +index 4d49a5ae9c..d9572336af 100644 +--- a/isisd/isis_route.h ++++ b/isisd/isis_route.h +@@ -12,6 +12,7 @@ + #ifndef _ZEBRA_ISIS_ROUTE_H + #define _ZEBRA_ISIS_ROUTE_H + ++#include "lib/table.h" + #include "lib/nexthop.h" + + struct isis_nexthop { +-- +2.43.2 + + +From eb75106d9a0e5bc689f914e5ff9ebd3528fd3b7a Mon Sep 17 00:00:00 2001 +From: Mark Stapp +Date: Tue, 22 Oct 2024 15:57:53 -0700 +Subject: [PATCH 5/9] zebra: removing use of per-NS if_table + +Remove use of the per-NS if_table from zebra/interface +module. Use new add, lookup, and iteration apis. + +Signed-off-by: Mark Stapp +--- + zebra/interface.c | 144 +++++++++++++++------------------------------- + zebra/interface.h | 5 +- + 2 files changed, 49 insertions(+), 100 deletions(-) + +diff --git a/zebra/interface.c b/zebra/interface.c +index bbdc62c1c2..7ec80cb259 100644 +--- a/zebra/interface.c ++++ b/zebra/interface.c +@@ -233,62 +233,14 @@ static int if_zebra_delete_hook(struct interface *ifp) + return 0; + } + +-/* Build the table key */ +-static void if_build_key(uint32_t ifindex, struct prefix *p) +-{ +- p->family = AF_INET; +- p->prefixlen = IPV4_MAX_BITLEN; +- p->u.prefix4.s_addr = ifindex; +-} +- +-/* Link an interface in a per NS interface tree */ +-struct interface *if_link_per_ns(struct zebra_ns *ns, struct interface *ifp) +-{ +- struct prefix p; +- struct route_node *rn; +- +- if (ifp->ifindex == IFINDEX_INTERNAL) +- return NULL; +- +- if_build_key(ifp->ifindex, &p); +- rn = route_node_get(ns->if_table, &p); +- if (rn->info) { +- ifp = (struct interface *)rn->info; +- route_unlock_node(rn); /* get */ +- return ifp; +- } +- +- rn->info = ifp; +- ifp->node = rn; +- +- return ifp; +-} +- +-/* Delete a VRF. This is called in vrf_terminate(). */ +-void if_unlink_per_ns(struct interface *ifp) +-{ +- if (!ifp->node) +- return; +- +- ifp->node->info = NULL; +- route_unlock_node(ifp->node); +- ifp->node = NULL; +-} +- + /* Look up an interface by identifier within a NS */ + struct interface *if_lookup_by_index_per_ns(struct zebra_ns *ns, + uint32_t ifindex) + { +- struct prefix p; +- struct route_node *rn; + struct interface *ifp = NULL; + +- if_build_key(ifindex, &p); +- rn = route_node_lookup(ns->if_table, &p); +- if (rn) { +- ifp = (struct interface *)rn->info; +- route_unlock_node(rn); /* lookup */ +- } ++ ifp = zebra_ns_lookup_ifp(ns, ifindex); ++ + return ifp; + } + +@@ -296,18 +248,11 @@ struct interface *if_lookup_by_index_per_ns(struct zebra_ns *ns, + struct interface *if_lookup_by_name_per_ns(struct zebra_ns *ns, + const char *ifname) + { +- struct route_node *rn; + struct interface *ifp; + +- for (rn = route_top(ns->if_table); rn; rn = route_next(rn)) { +- ifp = (struct interface *)rn->info; +- if (ifp && strcmp(ifp->name, ifname) == 0) { +- route_unlock_node(rn); +- return (ifp); +- } +- } ++ ifp = zebra_ns_lookup_ifp_name(ns, ifname); + +- return NULL; ++ return ifp; + } + + struct interface *if_lookup_by_index_per_nsid(ns_id_t ns_id, uint32_t ifindex) +@@ -579,7 +524,8 @@ void if_add_update(struct interface *ifp) + zns = zvrf->zns; + else + zns = zebra_ns_lookup(NS_DEFAULT); +- if_link_per_ns(zns, ifp); ++ ++ zebra_ns_link_ifp(zns, ifp); + if_data = ifp->info; + assert(if_data); + +@@ -784,7 +730,7 @@ void if_delete_update(struct interface **pifp) + /* Send out notification on interface delete. */ + zebra_interface_delete_update(ifp); + +- if_unlink_per_ns(ifp); ++ zebra_ns_unlink_ifp(ifp); + + /* Update ifindex after distributing the delete message. This is in + case any client needs to have the old value of ifindex available +@@ -1121,50 +1067,52 @@ void zebra_if_update_link(struct interface *ifp, ifindex_t link_ifindex, + } + + /* +- * during initial link dump kernel does not order lower devices before +- * upper devices so we need to fixup link dependencies at the end of dump ++ * Callback for per-ns link fixup iteration + */ +-void zebra_if_update_all_links(struct zebra_ns *zns) ++static int zif_link_fixup_cb(struct interface *ifp, void *arg) + { +- struct route_node *rn; +- struct interface *ifp; + struct zebra_if *zif; + +- if (IS_ZEBRA_DEBUG_KERNEL) +- zlog_info("fixup link dependencies"); ++ zif = ifp->info; ++ /* update bond-member to bond linkages */ ++ if ((IS_ZEBRA_IF_BOND_SLAVE(ifp)) && ++ (zif->bondslave_info.bond_ifindex != IFINDEX_INTERNAL) && ++ !zif->bondslave_info.bond_if) { ++ if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL) ++ zlog_debug("bond mbr %s map to bond %d", zif->ifp->name, ++ zif->bondslave_info.bond_ifindex); ++ zebra_l2_map_slave_to_bond(zif, ifp->vrf->vrf_id); ++ } + +- for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) { +- ifp = (struct interface *)rn->info; +- if (!ifp) +- continue; +- zif = ifp->info; +- /* update bond-member to bond linkages */ +- if ((IS_ZEBRA_IF_BOND_SLAVE(ifp)) +- && (zif->bondslave_info.bond_ifindex != IFINDEX_INTERNAL) +- && !zif->bondslave_info.bond_if) { +- if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL) +- zlog_debug("bond mbr %s map to bond %d", +- zif->ifp->name, +- zif->bondslave_info.bond_ifindex); +- zebra_l2_map_slave_to_bond(zif, ifp->vrf->vrf_id); +- } ++ /* update SVI linkages */ ++ if ((zif->link_ifindex != IFINDEX_INTERNAL) && !zif->link) { ++ zif->link = if_lookup_by_index_per_nsid(zif->link_nsid, ++ zif->link_ifindex); ++ if (IS_ZEBRA_DEBUG_KERNEL) ++ zlog_debug("interface %s/%d's lower fixup to %s/%d", ++ ifp->name, ifp->ifindex, ++ zif->link ? zif->link->name : "unk", ++ zif->link_ifindex); ++ } + +- /* update SVI linkages */ +- if ((zif->link_ifindex != IFINDEX_INTERNAL) && !zif->link) { +- zif->link = if_lookup_by_index_per_nsid( +- zif->link_nsid, zif->link_ifindex); +- if (IS_ZEBRA_DEBUG_KERNEL) +- zlog_debug("interface %s/%d's lower fixup to %s/%d", +- ifp->name, ifp->ifindex, +- zif->link?zif->link->name:"unk", +- zif->link_ifindex); +- } ++ /* Update VLAN<=>SVI map */ ++ if (IS_ZEBRA_IF_VLAN(ifp)) ++ zebra_evpn_acc_bd_svi_set(zif, NULL, ++ !!if_is_operative(ifp)); + +- /* Update VLAN<=>SVI map */ +- if (IS_ZEBRA_IF_VLAN(ifp)) +- zebra_evpn_acc_bd_svi_set(zif, NULL, +- !!if_is_operative(ifp)); +- } ++ return NS_WALK_CONTINUE; ++} ++ ++/* ++ * during initial link dump kernel does not order lower devices before ++ * upper devices so we need to fixup link dependencies at the end of dump ++ */ ++void zebra_if_update_all_links(struct zebra_ns *zns) ++{ ++ if (IS_ZEBRA_DEBUG_KERNEL) ++ zlog_debug("fixup link dependencies"); ++ ++ zebra_ns_ifp_walk(zns, zif_link_fixup_cb, NULL); + } + + static bool if_ignore_set_protodown(const struct interface *ifp, bool new_down, +diff --git a/zebra/interface.h b/zebra/interface.h +index 4cbec83cce..4f768e0217 100644 +--- a/zebra/interface.h ++++ b/zebra/interface.h +@@ -212,6 +212,9 @@ struct zebra_if { + char neigh_mac[6]; + struct in6_addr v6_2_v4_ll_addr6; + ++ /* Linkage for per-vrf/per-NS ifp container */ ++ struct ifp_tree_link *ns_tree_link; ++ + /* The description of the interface */ + char *desc; + }; +@@ -259,12 +262,10 @@ extern void zebra_if_init(void); + extern struct interface *if_lookup_by_index_per_ns(struct zebra_ns *, uint32_t); + extern struct interface *if_lookup_by_name_per_ns(struct zebra_ns *, + const char *); +-extern struct interface *if_link_per_ns(struct zebra_ns *, struct interface *); + extern struct interface *if_lookup_by_index_per_nsid(ns_id_t nsid, + uint32_t ifindex); + extern const char *ifindex2ifname_per_ns(struct zebra_ns *, unsigned int); + +-extern void if_unlink_per_ns(struct interface *); + extern void if_nbr_mac_to_ipv4ll_neigh_update(struct interface *fip, + char mac[6], + struct in6_addr *address, +-- +2.43.2 + + +From 3f951796fcd65edba9fa41e5f094f0e79e9583b9 Mon Sep 17 00:00:00 2001 +From: Mark Stapp +Date: Wed, 23 Oct 2024 12:34:36 -0700 +Subject: [PATCH 6/9] zebra: use new per-NS iteration in zebra_evpn + +Use the new per-NS interface iteration apis in the evpn +module. + +Signed-off-by: Mark Stapp +--- + zebra/zebra_evpn.c | 245 +++++++++++++++++++-------------------------- + zebra/zebra_evpn.h | 2 + + 2 files changed, 103 insertions(+), 144 deletions(-) + +diff --git a/zebra/zebra_evpn.c b/zebra/zebra_evpn.c +index 147f5b93fa..1122b5a2c0 100644 +--- a/zebra/zebra_evpn.c ++++ b/zebra/zebra_evpn.c +@@ -644,70 +644,47 @@ void zebra_evpn_svi_macip_del_for_evpn_hash(struct hash_bucket *bucket, + return; + } + +-static int zebra_evpn_map_vlan_ns(struct ns *ns, +- void *_in_param, +- void **_p_zevpn) ++/* Callback for per-NS ifp walk */ ++static int zebra_evpn_map_vlan_ns(struct interface *tmp_if, void *_in_param) + { +- int found = 0; +- struct zebra_ns *zns = ns->info; +- struct route_node *rn; ++ bool found = false; + struct interface *br_if; +- struct zebra_evpn **p_zevpn = (struct zebra_evpn **)_p_zevpn; + struct zebra_evpn *zevpn; +- struct interface *tmp_if = NULL; + struct zebra_if *zif; +- struct zebra_from_svi_param *in_param = +- (struct zebra_from_svi_param *)_in_param; +- vlanid_t vid; ++ struct zebra_from_svi_param *in_param = _in_param; + vni_t vni_id = 0; +- uint8_t bridge_vlan_aware; + +- assert(p_zevpn && in_param); ++ assert(in_param); + + br_if = in_param->br_if; + assert(br_if); + zif = in_param->zif; + assert(zif); +- vid = in_param->vid; +- bridge_vlan_aware = in_param->bridge_vlan_aware; + +- if (bridge_vlan_aware) { +- vni_id = zebra_l2_bridge_if_vni_find(zif, vid); +- if (vni_id) +- found = 1; +- } else { +- /* +- * See if this interface (or interface plus VLAN Id) maps to a +- * VxLAN +- */ +- /* TODO: Optimize with a hash. */ +- for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) { +- tmp_if = (struct interface *)rn->info; +- if (!tmp_if) +- continue; +- zif = tmp_if->info; +- if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) +- continue; +- if (!if_is_operative(tmp_if)) +- continue; +- +- if (zif->brslave_info.br_if != br_if) +- continue; +- +- vni_id = +- zebra_vxlan_if_access_vlan_vni_find(zif, br_if); +- if (vni_id) { +- found = 1; +- break; +- } +- } +- } ++ /* ++ * See if this interface (or interface plus VLAN Id) maps to a ++ * VxLAN ++ */ ++ /* TODO: Optimize with a hash. */ ++ zif = tmp_if->info; ++ if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) ++ goto done; ++ if (!if_is_operative(tmp_if)) ++ goto done; ++ ++ if (zif->brslave_info.br_if != br_if) ++ goto done; ++ ++ vni_id = zebra_vxlan_if_access_vlan_vni_find(zif, br_if); ++ if (vni_id) ++ found = true; + ++done: + if (!found) + return NS_WALK_CONTINUE; + + zevpn = zebra_evpn_lookup(vni_id); +- *p_zevpn = zevpn; ++ in_param->zevpn = zevpn; + return NS_WALK_STOP; + } + +@@ -719,44 +696,39 @@ struct zebra_evpn *zebra_evpn_map_vlan(struct interface *ifp, + struct interface *br_if, vlanid_t vid) + { + struct zebra_if *zif; +- struct zebra_evpn **p_zevpn; +- struct zebra_evpn *zevpn = NULL; +- struct zebra_from_svi_param in_param; ++ struct zebra_from_svi_param in_param = {}; ++ vni_t vni_id = 0; + + /* Determine if bridge is VLAN-aware or not */ + zif = br_if->info; + assert(zif); +- in_param.bridge_vlan_aware = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(zif); ++ ++ /* Special case for vlan */ ++ if (IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(zif)) { ++ vni_id = zebra_l2_bridge_if_vni_find(zif, vid); ++ if (vni_id) ++ return zebra_evpn_lookup(vni_id); ++ } ++ + in_param.vid = vid; + in_param.br_if = br_if; + in_param.zif = zif; +- p_zevpn = &zevpn; + +- ns_walk_func(zebra_evpn_map_vlan_ns, +- (void *)&in_param, +- (void **)p_zevpn); +- return zevpn; ++ zebra_ns_ifp_walk_all(zebra_evpn_map_vlan_ns, &in_param); ++ ++ return in_param.zevpn; + } + +-static int zebra_evpn_from_svi_ns(struct ns *ns, +- void *_in_param, +- void **_p_zevpn) ++/* Callback for from_svi ifp walker */ ++static int zebra_evpn_from_svi_ns(struct interface *tmp_if, void *_in_param) + { +- struct zebra_ns *zns = ns->info; +- struct route_node *rn; + struct interface *br_if; +- struct zebra_evpn **p_zevpn = (struct zebra_evpn **)_p_zevpn; + struct zebra_evpn *zevpn; +- struct interface *tmp_if = NULL; + struct zebra_if *zif; + struct zebra_if *br_zif; +- struct zebra_l2_bridge_vlan *bvlan; +- struct zebra_from_svi_param *in_param = +- (struct zebra_from_svi_param *)_in_param; +- int found = 0; ++ struct zebra_from_svi_param *in_param = _in_param; ++ bool found = false; + vni_t vni_id = 0; +- vlanid_t vid = 0; +- uint8_t bridge_vlan_aware; + + if (!in_param) + return NS_WALK_STOP; +@@ -764,47 +736,30 @@ static int zebra_evpn_from_svi_ns(struct ns *ns, + br_if = in_param->br_if; + zif = in_param->zif; + assert(zif); +- bridge_vlan_aware = in_param->bridge_vlan_aware; +- vid = in_param->vid; + br_zif = br_if->info; + assert(br_zif); + +- if (bridge_vlan_aware) { +- bvlan = zebra_l2_bridge_if_vlan_find(br_zif, vid); +- if (bvlan && bvlan->access_bd && bvlan->access_bd->vni) { +- found = 1; +- vni_id = bvlan->access_bd->vni; +- } +- } else { +- /* TODO: Optimize with a hash. */ +- for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) { +- tmp_if = (struct interface *)rn->info; +- if (!tmp_if) +- continue; +- zif = tmp_if->info; +- if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) +- continue; +- if (!if_is_operative(tmp_if)) +- continue; +- +- if (zif->brslave_info.br_if != br_if) +- continue; +- +- vni_id = +- zebra_vxlan_if_access_vlan_vni_find(zif, br_if); +- if (vni_id) { +- found = 1; +- break; +- } +- } +- } ++ if (!tmp_if) ++ goto done; ++ zif = tmp_if->info; ++ if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) ++ goto done; ++ if (!if_is_operative(tmp_if)) ++ goto done; ++ ++ if (zif->brslave_info.br_if != br_if) ++ goto done; ++ ++ vni_id = zebra_vxlan_if_access_vlan_vni_find(zif, br_if); ++ if (vni_id) ++ found = true; + ++done: + if (!found) + return NS_WALK_CONTINUE; + + zevpn = zebra_evpn_lookup(vni_id); +- if (p_zevpn) +- *p_zevpn = zevpn; ++ in_param->zevpn = zevpn; + return NS_WALK_STOP; + } + +@@ -815,17 +770,21 @@ static int zebra_evpn_from_svi_ns(struct ns *ns, + struct zebra_evpn *zebra_evpn_from_svi(struct interface *ifp, + struct interface *br_if) + { +- struct zebra_evpn *zevpn = NULL; +- struct zebra_evpn **p_zevpn; + struct zebra_if *zif; +- struct zebra_from_svi_param in_param; ++ struct zebra_l2_bridge_vlan *bvlan; ++ struct zebra_from_svi_param in_param = {}; ++ vni_t vni_id = 0; ++ struct zebra_evpn *zevpn; ++ struct zebra_l2info_vlan *vl; + + if (!br_if) + return NULL; + + /* Make sure the linked interface is a bridge. */ +- if (!IS_ZEBRA_IF_BRIDGE(br_if)) ++ if (!IS_ZEBRA_IF_BRIDGE(br_if)) { ++ zlog_debug("%s: br_if NOT a bridge", __func__); + return NULL; ++ } + + /* Determine if bridge is VLAN-aware or not */ + zif = br_if->info; +@@ -833,58 +792,60 @@ struct zebra_evpn *zebra_evpn_from_svi(struct interface *ifp, + in_param.bridge_vlan_aware = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(zif); + in_param.vid = 0; + ++ /* Don't need to search in this case */ + if (in_param.bridge_vlan_aware) { +- struct zebra_l2info_vlan *vl; +- + if (!IS_ZEBRA_IF_VLAN(ifp)) + return NULL; + ++ zevpn = NULL; ++ + zif = ifp->info; + assert(zif); + vl = &zif->l2info.vl; + in_param.vid = vl->vid; ++ ++ bvlan = zebra_l2_bridge_if_vlan_find(br_if->info, vl->vid); ++ if (bvlan && bvlan->access_bd && bvlan->access_bd->vni) { ++ vni_id = bvlan->access_bd->vni; ++ zevpn = zebra_evpn_lookup(vni_id); ++ } ++ ++ return zevpn; + } + ++ /* See if this interface (or interface plus VLAN Id) maps to a VxLAN: ++ * search all NSes ++ */ + in_param.br_if = br_if; + in_param.zif = zif; +- p_zevpn = &zevpn; +- /* See if this interface (or interface plus VLAN Id) maps to a VxLAN */ +- ns_walk_func(zebra_evpn_from_svi_ns, (void *)&in_param, +- (void **)p_zevpn); +- return zevpn; ++ zebra_ns_ifp_walk_all(zebra_evpn_from_svi_ns, &in_param); ++ ++ return in_param.zevpn; + } + +-static int zvni_map_to_macvlan_ns(struct ns *ns, +- void *_in_param, +- void **_p_ifp) ++static int zvni_map_to_macvlan_ns(struct interface *tmp_if, void *_in_param) + { +- struct zebra_ns *zns = ns->info; +- struct zebra_from_svi_param *in_param = +- (struct zebra_from_svi_param *)_in_param; +- struct interface **p_ifp = (struct interface **)_p_ifp; +- struct route_node *rn; +- struct interface *tmp_if = NULL; ++ struct zebra_from_svi_param *in_param = _in_param; + struct zebra_if *zif; + +- assert(in_param && p_ifp); ++ assert(in_param); + + /* Identify corresponding VLAN interface. */ +- for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) { +- tmp_if = (struct interface *)rn->info; +- /* Check oper status of the SVI. */ +- if (!tmp_if || !if_is_operative(tmp_if)) +- continue; +- zif = tmp_if->info; + +- if (!zif || zif->zif_type != ZEBRA_IF_MACVLAN) +- continue; ++ /* Check oper status of the SVI. */ ++ if (!tmp_if || !if_is_operative(tmp_if)) ++ goto done; + +- if (zif->link == in_param->svi_if) { +- *p_ifp = tmp_if; +- return NS_WALK_STOP; +- } ++ zif = tmp_if->info; ++ if (!zif || zif->zif_type != ZEBRA_IF_MACVLAN) ++ goto done; ++ ++ if (zif->link == in_param->svi_if) { ++ in_param->ret_ifp = tmp_if; ++ return NS_WALK_STOP; + } + ++done: + return NS_WALK_CONTINUE; + } + +@@ -893,17 +854,16 @@ static int zvni_map_to_macvlan_ns(struct ns *ns, + struct interface *zebra_evpn_map_to_macvlan(struct interface *br_if, + struct interface *svi_if) + { +- struct interface *tmp_if = NULL; + struct zebra_if *zif; +- struct interface **p_ifp; +- struct zebra_from_svi_param in_param; ++ struct zebra_from_svi_param in_param = {}; + + /* Defensive check, caller expected to invoke only with valid bridge. */ + if (!br_if) + return NULL; + + if (!svi_if) { +- zlog_debug("svi_if is not passed."); ++ if (IS_ZEBRA_DEBUG_VXLAN) ++ zlog_debug("%s: svi_if is not passed.", __func__); + return NULL; + } + +@@ -915,13 +875,10 @@ struct interface *zebra_evpn_map_to_macvlan(struct interface *br_if, + in_param.br_if = br_if; + in_param.zif = NULL; + in_param.svi_if = svi_if; +- p_ifp = &tmp_if; + + /* Identify corresponding VLAN interface. */ +- ns_walk_func(zvni_map_to_macvlan_ns, +- (void *)&in_param, +- (void **)p_ifp); +- return tmp_if; ++ zebra_ns_ifp_walk_all(zvni_map_to_macvlan_ns, &in_param); ++ return in_param.ret_ifp; + } + + /* +diff --git a/zebra/zebra_evpn.h b/zebra/zebra_evpn.h +index c946425dd5..85bdf54272 100644 +--- a/zebra/zebra_evpn.h ++++ b/zebra/zebra_evpn.h +@@ -116,7 +116,9 @@ struct zebra_evpn { + struct zebra_from_svi_param { + struct interface *br_if; + struct interface *svi_if; ++ struct interface *ret_ifp; + struct zebra_if *zif; ++ struct zebra_evpn *zevpn; + uint8_t bridge_vlan_aware; + vlanid_t vid; + }; +-- +2.43.2 + + +From 8a9d5ecbbcdf04894de461662e83df8c5dcb7ab4 Mon Sep 17 00:00:00 2001 +From: Mark Stapp +Date: Thu, 24 Oct 2024 14:49:28 -0700 +Subject: [PATCH 7/9] lib,zebra: remove table node from ifp struct + +Finish removing the table route_node from the ifp struct. + +Signed-off-by: Mark Stapp +--- + lib/if.c | 6 ------ + lib/if.h | 2 -- + zebra/interface.c | 3 ++- + 3 files changed, 2 insertions(+), 9 deletions(-) + +diff --git a/lib/if.c b/lib/if.c +index a8ceac7243..bde35a3460 100644 +--- a/lib/if.c ++++ b/lib/if.c +@@ -1003,12 +1003,6 @@ void if_terminate(struct vrf *vrf) + + while (!RB_EMPTY(if_name_head, &vrf->ifaces_by_name)) { + ifp = RB_ROOT(if_name_head, &vrf->ifaces_by_name); +- +- if (ifp->node) { +- ifp->node->info = NULL; +- route_unlock_node(ifp->node); +- ifp->node = NULL; +- } + if_delete(&ifp); + } + } +diff --git a/lib/if.h b/lib/if.h +index 0dc56bd210..c2ec73378d 100644 +--- a/lib/if.h ++++ b/lib/if.h +@@ -295,8 +295,6 @@ struct interface { + struct if_data stats; + #endif /* HAVE_NET_RT_IFLIST */ + +- struct route_node *node; +- + struct vrf *vrf; + + /* +diff --git a/zebra/interface.c b/zebra/interface.c +index 7ec80cb259..237ad2340d 100644 +--- a/zebra/interface.c ++++ b/zebra/interface.c +@@ -223,6 +223,8 @@ static int if_zebra_delete_hook(struct interface *ifp) + if_nhg_dependents_release(ifp); + zebra_if_nhg_dependents_free(zebra_if); + ++ zebra_ns_unlink_ifp(ifp); ++ + XFREE(MTYPE_ZIF_DESC, zebra_if->desc); + + EVENT_OFF(zebra_if->speed_update); +@@ -738,7 +740,6 @@ void if_delete_update(struct interface **pifp) + for setting ifindex to IFINDEX_INTERNAL after processing the + interface deletion message. */ + if_set_index(ifp, IFINDEX_INTERNAL); +- ifp->node = NULL; + + UNSET_FLAG(ifp->status, ZEBRA_INTERFACE_VRF_LOOPBACK); + +-- +2.43.2 + + +From bf41170c63771c5bda25476ccbab56383d9c74a6 Mon Sep 17 00:00:00 2001 +From: Mark Stapp +Date: Thu, 24 Oct 2024 14:50:12 -0700 +Subject: [PATCH 8/9] zebra: use new per-NS ifp iterators in vxlan code + +Replace use of the old if_table with the new per-NS ifp +iterator apis in the zebra vxlan code. + +Signed-off-by: Mark Stapp +--- + zebra/zebra_evpn.h | 1 + + zebra/zebra_vxlan.c | 368 ++++++++++++++++++++------------------------ + 2 files changed, 172 insertions(+), 197 deletions(-) + +diff --git a/zebra/zebra_evpn.h b/zebra/zebra_evpn.h +index 85bdf54272..0ffebdd277 100644 +--- a/zebra/zebra_evpn.h ++++ b/zebra/zebra_evpn.h +@@ -119,6 +119,7 @@ struct zebra_from_svi_param { + struct interface *ret_ifp; + struct zebra_if *zif; + struct zebra_evpn *zevpn; ++ struct zebra_l3vni *zl3vni; + uint8_t bridge_vlan_aware; + vlanid_t vid; + }; +diff --git a/zebra/zebra_vxlan.c b/zebra/zebra_vxlan.c +index 0b75ec261e..28646a7a6a 100644 +--- a/zebra/zebra_vxlan.c ++++ b/zebra/zebra_vxlan.c +@@ -862,39 +862,30 @@ static void zl3vni_print_hash_detail(struct hash_bucket *bucket, void *data) + vty_out(vty, "\n"); + } + +-static int zvni_map_to_svi_ns(struct ns *ns, +- void *_in_param, +- void **_p_ifp) ++static int zvni_map_to_svi_ns(struct interface *tmp_if, void *_in_param) + { +- struct zebra_ns *zns = ns->info; +- struct route_node *rn; +- struct zebra_from_svi_param *in_param = +- (struct zebra_from_svi_param *)_in_param; ++ struct zebra_from_svi_param *in_param = _in_param; + struct zebra_l2info_vlan *vl; +- struct interface *tmp_if = NULL; +- struct interface **p_ifp = (struct interface **)_p_ifp; + struct zebra_if *zif; + +- assert(in_param && p_ifp); ++ assert(in_param); + + /* TODO: Optimize with a hash. */ +- for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) { +- tmp_if = (struct interface *)rn->info; +- /* Check oper status of the SVI. */ +- if (!tmp_if || !if_is_operative(tmp_if)) +- continue; +- zif = tmp_if->info; +- if (!zif || zif->zif_type != ZEBRA_IF_VLAN +- || zif->link != in_param->br_if) +- continue; +- vl = (struct zebra_l2info_vlan *)&zif->l2info.vl; +- +- if (vl->vid == in_param->vid) { +- *p_ifp = tmp_if; +- route_unlock_node(rn); +- return NS_WALK_STOP; +- } ++ ++ /* Check oper status of the SVI. */ ++ if (!tmp_if || !if_is_operative(tmp_if)) ++ goto done; ++ zif = tmp_if->info; ++ if (!zif || zif->zif_type != ZEBRA_IF_VLAN || zif->link != in_param->br_if) ++ goto done; ++ vl = (struct zebra_l2info_vlan *)&zif->l2info.vl; ++ ++ if (vl->vid == in_param->vid) { ++ in_param->ret_ifp = tmp_if; ++ return NS_WALK_STOP; + } ++ ++done: + return NS_WALK_CONTINUE; + } + +@@ -907,10 +898,9 @@ static int zvni_map_to_svi_ns(struct ns *ns, + */ + struct interface *zvni_map_to_svi(vlanid_t vid, struct interface *br_if) + { +- struct interface *tmp_if = NULL; + struct zebra_if *zif; +- struct zebra_from_svi_param in_param; +- struct interface **p_ifp; ++ struct zebra_from_svi_param in_param = {}; ++ + /* Defensive check, caller expected to invoke only with valid bridge. */ + if (!br_if) + return NULL; +@@ -925,12 +915,11 @@ struct interface *zvni_map_to_svi(vlanid_t vid, struct interface *br_if) + + in_param.vid = vid; + in_param.br_if = br_if; +- in_param.zif = NULL; +- p_ifp = &tmp_if; ++ + /* Identify corresponding VLAN interface. */ +- ns_walk_func(zvni_map_to_svi_ns, (void *)&in_param, +- (void **)p_ifp); +- return tmp_if; ++ zebra_ns_ifp_walk_all(zvni_map_to_svi_ns, &in_param); ++ ++ return in_param.ret_ifp; + } + + int zebra_evpn_vxlan_del(struct zebra_evpn *zevpn) +@@ -1010,9 +999,9 @@ static int zevpn_build_vni_hash_table(struct zebra_if *zif, + */ + zevpn = zebra_evpn_lookup(vni); + if (zevpn) { +- zlog_debug( +- "EVPN hash already present for IF %s(%u) L2-VNI %u", +- ifp->name, ifp->ifindex, vni); ++ if (IS_ZEBRA_DEBUG_VXLAN) ++ zlog_debug("EVPN hash already present for IF %s(%u) L2-VNI %u", ++ ifp->name, ifp->ifindex, vni); + + /* + * Inform BGP if intf is up and mapped to +@@ -1075,48 +1064,32 @@ static int zevpn_build_vni_hash_table(struct zebra_if *zif, + return 0; + } + +-static int zevpn_build_hash_table_zns(struct ns *ns, +- void *param_in __attribute__((unused)), +- void **param_out __attribute__((unused))) ++static int zevpn_build_hash_table_zns(struct interface *ifp, void *arg) + { +- struct zebra_ns *zns = ns->info; +- struct route_node *rn; +- struct interface *ifp; +- struct zebra_vrf *zvrf; +- +- zvrf = zebra_vrf_get_evpn(); ++ struct zebra_vrf *zvrf = arg; ++ struct zebra_if *zif; ++ struct zebra_l2info_vxlan *vxl; + +- /* Walk VxLAN interfaces and create EVPN hash. */ +- for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) { +- struct zebra_if *zif; +- struct zebra_l2info_vxlan *vxl; ++ zif = ifp->info; ++ if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) ++ goto done; + +- ifp = (struct interface *)rn->info; +- if (!ifp) +- continue; +- zif = ifp->info; +- if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) +- continue; ++ vxl = &zif->l2info.vxl; ++ /* link of VXLAN interface should be in zebra_evpn_vrf */ ++ if (zvrf->zns->ns_id != vxl->link_nsid) { ++ if (IS_ZEBRA_DEBUG_VXLAN) ++ zlog_debug("Intf %s(%u) link not in same namespace as BGP EVPN core instance", ++ ifp->name, ifp->ifindex); ++ goto done; ++ } + +- vxl = &zif->l2info.vxl; +- /* link of VXLAN interface should be in zebra_evpn_vrf */ +- if (zvrf->zns->ns_id != vxl->link_nsid) { +- if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug( +- "Intf %s(%u) link not in same " +- "namespace than BGP EVPN core instance ", +- ifp->name, ifp->ifindex); +- continue; +- } ++ if (IS_ZEBRA_DEBUG_VXLAN) ++ zlog_debug("Building vni table for %s-if %s", ++ IS_ZEBRA_VXLAN_IF_VNI(zif) ? "vni" : "svd", ifp->name); + +- if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug("Building vni table for %s-if %s", +- IS_ZEBRA_VXLAN_IF_VNI(zif) ? "vni" : "svd", +- ifp->name); ++ zebra_vxlan_if_vni_iterate(zif, zevpn_build_vni_hash_table, NULL); + +- zebra_vxlan_if_vni_iterate(zif, zevpn_build_vni_hash_table, +- NULL); +- } ++done: + return NS_WALK_CONTINUE; + } + +@@ -1127,7 +1100,13 @@ static int zevpn_build_hash_table_zns(struct ns *ns, + + static void zevpn_build_hash_table(void) + { +- ns_walk_func(zevpn_build_hash_table_zns, NULL, NULL); ++ struct zebra_vrf *zvrf; ++ ++ zvrf = zebra_vrf_get_evpn(); ++ if (zvrf == NULL) ++ return; ++ ++ zebra_ns_ifp_walk_all(zevpn_build_hash_table_zns, zvrf); + } + + /* +@@ -1966,70 +1945,63 @@ static int zl3vni_del(struct zebra_l3vni *zl3vni) + return 0; + } + +-static int zl3vni_map_to_vxlan_if_ns(struct ns *ns, +- void *_zl3vni, +- void **_pifp) +-{ +- struct zebra_ns *zns = ns->info; +- struct zebra_l3vni *zl3vni = (struct zebra_l3vni *)_zl3vni; +- struct route_node *rn = NULL; +- struct interface *ifp = NULL; ++/* Context arg for zl3vni map iteration */ ++struct zl3vni_map_arg { + struct zebra_vrf *zvrf; ++ struct zebra_l3vni *zl3vni; ++ struct interface *ret_ifp; ++}; + +- zvrf = zebra_vrf_get_evpn(); +- +- assert(_pifp); +- +- /* loop through all vxlan-interface */ +- for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) { ++static int zl3vni_map_to_vxlan_if_ns(struct interface *ifp, void *arg) ++{ ++ struct zl3vni_map_arg *ctx = arg; ++ struct zebra_l3vni *zl3vni = ctx->zl3vni; ++ struct zebra_vrf *zvrf = ctx->zvrf; ++ struct zebra_if *zif = NULL; ++ struct zebra_l2info_vxlan *vxl; ++ struct zebra_vxlan_vni *vni = NULL; + +- struct zebra_if *zif = NULL; +- struct zebra_l2info_vxlan *vxl; +- struct zebra_vxlan_vni *vni = NULL; ++ /* look for vxlan-interface */ + +- ifp = (struct interface *)rn->info; +- if (!ifp) +- continue; +- +- zif = ifp->info; +- if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) +- continue; ++ zif = ifp->info; ++ if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) ++ goto done; + +- vxl = &zif->l2info.vxl; +- vni = zebra_vxlan_if_vni_find(zif, zl3vni->vni); +- if (!vni || vni->vni != zl3vni->vni) +- continue; ++ vxl = &zif->l2info.vxl; ++ vni = zebra_vxlan_if_vni_find(zif, zl3vni->vni); ++ if (!vni || vni->vni != zl3vni->vni) ++ goto done; + +- /* link of VXLAN interface should be in zebra_evpn_vrf */ +- if (zvrf->zns->ns_id != vxl->link_nsid) { +- if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug( +- "Intf %s(%u) VNI %u, link not in same " +- "namespace than BGP EVPN core instance ", +- ifp->name, ifp->ifindex, vni->vni); +- continue; +- } ++ /* link of VXLAN interface should be in zebra_evpn_vrf */ ++ if (zvrf->zns->ns_id != vxl->link_nsid) { ++ if (IS_ZEBRA_DEBUG_VXLAN) ++ zlog_debug("Intf %s(%u) VNI %u, link not in same namespace as BGP EVPN core instance", ++ ifp->name, ifp->ifindex, vni->vni); ++ goto done; ++ } + ++ zl3vni->local_vtep_ip = zif->l2info.vxl.vtep_ip; ++ ctx->ret_ifp = ifp; + +- zl3vni->local_vtep_ip = zif->l2info.vxl.vtep_ip; +- *_pifp = (void *)ifp; +- route_unlock_node(rn); +- return NS_WALK_STOP; +- } ++ return NS_WALK_STOP; + ++done: + return NS_WALK_CONTINUE; + } + + struct interface *zl3vni_map_to_vxlan_if(struct zebra_l3vni *zl3vni) + { +- struct interface **p_ifp; +- struct interface *ifp = NULL; ++ struct zl3vni_map_arg arg = {}; + +- p_ifp = &ifp; ++ arg.zl3vni = zl3vni; ++ arg.zvrf = zebra_vrf_get_evpn(); + +- ns_walk_func(zl3vni_map_to_vxlan_if_ns, +- (void *)zl3vni, (void **)p_ifp); +- return ifp; ++ if (arg.zvrf == NULL) ++ return NULL; ++ ++ zebra_ns_ifp_walk_all(zl3vni_map_to_vxlan_if_ns, &arg); ++ ++ return arg.ret_ifp; + } + + struct interface *zl3vni_map_to_svi_if(struct zebra_l3vni *zl3vni) +@@ -2084,57 +2056,35 @@ struct zebra_l3vni *zl3vni_from_vrf(vrf_id_t vrf_id) + return zl3vni_lookup(zvrf->l3vni); + } + +-static int zl3vni_from_svi_ns(struct ns *ns, void *_in_param, void **_p_zl3vni) ++/* loop through all vxlan-interface */ ++static int zl3vni_from_svi_ns(struct interface *tmp_if, void *_in_param) + { + int found = 0; + vni_t vni_id = 0; +- struct zebra_ns *zns = ns->info; +- struct zebra_l3vni **p_zl3vni = (struct zebra_l3vni **)_p_zl3vni; +- struct zebra_from_svi_param *in_param = +- (struct zebra_from_svi_param *)_in_param; +- struct route_node *rn = NULL; +- struct interface *tmp_if = NULL; ++ struct zebra_from_svi_param *in_param = _in_param; + struct zebra_if *zif = NULL; +- struct zebra_if *br_zif = NULL; + +- assert(in_param && p_zl3vni); ++ assert(in_param); + +- br_zif = in_param->br_if->info; +- assert(br_zif); ++ zif = tmp_if->info; ++ if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) ++ goto done; ++ if (!if_is_operative(tmp_if)) ++ goto done; + +- if (in_param->bridge_vlan_aware) { +- vni_id = zebra_l2_bridge_if_vni_find(br_zif, in_param->vid); +- if (vni_id) +- found = 1; +- } else { +- /* loop through all vxlan-interface */ +- for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) { +- tmp_if = (struct interface *)rn->info; +- if (!tmp_if) +- continue; +- zif = tmp_if->info; +- if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) +- continue; +- if (!if_is_operative(tmp_if)) +- continue; +- +- if (zif->brslave_info.br_if != in_param->br_if) +- continue; +- +- vni_id = zebra_vxlan_if_access_vlan_vni_find( +- zif, in_param->br_if); +- if (vni_id) { +- found = 1; +- route_unlock_node(rn); +- break; +- } +- } ++ if (zif->brslave_info.br_if != in_param->br_if) ++ goto done; ++ ++ vni_id = zebra_vxlan_if_access_vlan_vni_find(zif, in_param->br_if); ++ if (vni_id) { ++ in_param->zl3vni = zl3vni_lookup(vni_id); ++ found = 1; + } + ++done: + if (!found) + return NS_WALK_CONTINUE; + +- *p_zl3vni = zl3vni_lookup(vni_id); + return NS_WALK_STOP; + } + +@@ -2145,10 +2095,11 @@ static int zl3vni_from_svi_ns(struct ns *ns, void *_in_param, void **_p_zl3vni) + static struct zebra_l3vni *zl3vni_from_svi(struct interface *ifp, + struct interface *br_if) + { +- struct zebra_l3vni *zl3vni = NULL; + struct zebra_if *zif = NULL; ++ vni_t vni_id = 0; ++ struct zebra_if *br_zif = NULL; + struct zebra_from_svi_param in_param = {}; +- struct zebra_l3vni **p_zl3vni; ++ struct zebra_l2info_vlan *vl; + + if (!br_if) + return NULL; +@@ -2156,15 +2107,15 @@ static struct zebra_l3vni *zl3vni_from_svi(struct interface *ifp, + /* Make sure the linked interface is a bridge. */ + if (!IS_ZEBRA_IF_BRIDGE(br_if)) + return NULL; ++ + in_param.br_if = br_if; + + /* Determine if bridge is VLAN-aware or not */ +- zif = br_if->info; +- assert(zif); +- in_param.bridge_vlan_aware = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(zif); +- if (in_param.bridge_vlan_aware) { +- struct zebra_l2info_vlan *vl; ++ br_zif = br_if->info; ++ assert(br_zif); + ++ in_param.bridge_vlan_aware = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(br_zif); ++ if (in_param.bridge_vlan_aware) { + if (!IS_ZEBRA_IF_VLAN(ifp)) + return NULL; + +@@ -2172,15 +2123,18 @@ static struct zebra_l3vni *zl3vni_from_svi(struct interface *ifp, + assert(zif); + vl = &zif->l2info.vl; + in_param.vid = vl->vid; ++ ++ vni_id = zebra_l2_bridge_if_vni_find(br_zif, in_param.vid); ++ if (vni_id) ++ return zl3vni_lookup(vni_id); + } + + /* See if this interface (or interface plus VLAN Id) maps to a VxLAN */ + /* TODO: Optimize with a hash. */ + +- p_zl3vni = &zl3vni; ++ zebra_ns_ifp_walk_all(zl3vni_from_svi_ns, &in_param); + +- ns_walk_func(zl3vni_from_svi_ns, (void *)&in_param, (void **)p_zl3vni); +- return zl3vni; ++ return in_param.zl3vni; + } + + vni_t vni_id_from_svi(struct interface *ifp, struct interface *br_if) +@@ -2334,6 +2288,36 @@ static void zevpn_add_to_l3vni_list(struct hash_bucket *bucket, void *ctxt) + listnode_add_sort(zl3vni->l2vnis, zevpn); + } + ++/* Helper for vni transition iterator */ ++ ++struct vni_trans_ctx { ++ vni_t vni; ++ struct zebra_vxlan_vni *vnip; ++ struct interface *ret_ifp; ++}; ++ ++static int vni_trans_cb(struct interface *ifp, void *arg) ++{ ++ struct vni_trans_ctx *ctx = arg; ++ struct zebra_if *zif; ++ struct zebra_vxlan_vni *vnip; ++ ++ /* Find VxLAN interface for this VNI. */ ++ zif = ifp->info; ++ if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) ++ goto done; ++ ++ vnip = zebra_vxlan_if_vni_find(zif, ctx->vni); ++ if (vnip) { ++ ctx->ret_ifp = ifp; ++ ctx->vnip = vnip; ++ return NS_WALK_STOP; ++ } ++ ++done: ++ return NS_WALK_CONTINUE; ++} ++ + /* + * Handle transition of vni from l2 to l3 and vice versa. + * This function handles only the L2VNI add/delete part of +@@ -2384,39 +2368,25 @@ static int zebra_vxlan_handle_vni_transition(struct zebra_vrf *zvrf, vni_t vni, + return -1; + } + } else { +- struct zebra_ns *zns; +- struct route_node *rn; +- struct interface *ifp; +- struct zebra_if *zif; + struct zebra_vxlan_vni *vnip; + struct zebra_l2info_vxlan *vxl; + struct interface *vlan_if; +- bool found = false; ++ struct zebra_if *zif; ++ struct zebra_ns *zns; ++ struct vni_trans_ctx ctx = {}; + + if (IS_ZEBRA_DEBUG_VXLAN) + zlog_debug("Adding L2-VNI %u - transition from L3-VNI", + vni); + +- /* Find VxLAN interface for this VNI. */ + zns = zebra_ns_lookup(NS_DEFAULT); +- for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) { +- ifp = (struct interface *)rn->info; +- if (!ifp) +- continue; +- zif = ifp->info; +- if (!zif || zif->zif_type != ZEBRA_IF_VXLAN) +- continue; +- +- vxl = &zif->l2info.vxl; +- vnip = zebra_vxlan_if_vni_find(zif, vni); +- if (vnip) { +- found = true; +- route_unlock_node(rn); +- break; +- } +- } + +- if (!found) { ++ ctx.vni = vni; ++ ++ /* Find VxLAN interface for this VNI. */ ++ zebra_ns_ifp_walk(zns, vni_trans_cb, &ctx); ++ ++ if (ctx.ret_ifp == NULL) { + if (IS_ZEBRA_DEBUG_VXLAN) + zlog_err( + "Adding L2-VNI - Failed to find VxLAN interface for VNI %u", +@@ -2429,6 +2399,10 @@ static int zebra_vxlan_handle_vni_transition(struct zebra_vrf *zvrf, vni_t vni, + if (zevpn) + return 0; + ++ zif = ctx.ret_ifp->info; ++ vnip = ctx.vnip; ++ vxl = &zif->l2info.vxl; ++ + zevpn = zebra_evpn_add(vni); + + /* Find bridge interface for the VNI */ +@@ -2441,13 +2415,13 @@ static int zebra_vxlan_handle_vni_transition(struct zebra_vrf *zvrf, vni_t vni, + listnode_add_sort_nodup(zl3vni->l2vnis, zevpn); + } + +- zevpn->vxlan_if = ifp; ++ zevpn->vxlan_if = ctx.ret_ifp; + zevpn->local_vtep_ip = vxl->vtep_ip; + + /* Inform BGP if the VNI is up and mapped to a bridge. */ +- if (if_is_operative(ifp) && zif->brslave_info.br_if) { ++ if (if_is_operative(ctx.ret_ifp) && zif->brslave_info.br_if) { + zebra_evpn_send_add_to_client(zevpn); +- zebra_evpn_read_mac_neigh(zevpn, ifp); ++ zebra_evpn_read_mac_neigh(zevpn, ctx.ret_ifp); + } + } + +-- +2.43.2 + + +From 328f2f83feed43f0871669f47aa4206e9cd7a065 Mon Sep 17 00:00:00 2001 +From: Mark Stapp +Date: Thu, 24 Oct 2024 14:52:21 -0700 +Subject: [PATCH 9/9] zebra: remove if_table from the zebra NS + +Finish removing the if_table from the zebra NS struct. + +Signed-off-by: Mark Stapp +--- + zebra/zebra_ns.c | 5 ----- + zebra/zebra_ns.h | 2 -- + 2 files changed, 7 deletions(-) + +diff --git a/zebra/zebra_ns.c b/zebra/zebra_ns.c +index c6b279a9d7..578dee7b7e 100644 +--- a/zebra/zebra_ns.c ++++ b/zebra/zebra_ns.c +@@ -234,7 +234,6 @@ static int zebra_ns_new(struct ns *ns) + zns->ns_id = ns->ns_id; + + /* Do any needed per-NS data structure allocation. */ +- zns->if_table = route_table_init(); + ifp_tree_init(&zns->ifp_tree); + + return 0; +@@ -334,10 +333,6 @@ int zebra_ns_enable(ns_id_t ns_id, void **info) + */ + static int zebra_ns_disable_internal(struct zebra_ns *zns, bool complete) + { +- if (zns->if_table) +- route_table_finish(zns->if_table); +- zns->if_table = NULL; +- + zebra_dplane_ns_enable(zns, false /*Disable*/); + + kernel_terminate(zns, complete); +diff --git a/zebra/zebra_ns.h b/zebra/zebra_ns.h +index 1ddecc8252..96b78d4745 100644 +--- a/zebra/zebra_ns.h ++++ b/zebra/zebra_ns.h +@@ -67,8 +67,6 @@ struct zebra_ns { + struct nlsock ge_netlink_cmd; /* command channel for generic netlink */ + #endif + +- struct route_table *if_table; +- + /* Tree of interfaces in this ns */ + struct ifp_tree_head ifp_tree; + +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0063-Patch-to-send-tag-value-associated-with-route-via-ne.patch b/src/sonic-frr/patch/0063-Patch-to-send-tag-value-associated-with-route-via-ne.patch new file mode 100644 index 00000000000..606f1ff3f38 --- /dev/null +++ b/src/sonic-frr/patch/0063-Patch-to-send-tag-value-associated-with-route-via-ne.patch @@ -0,0 +1,49 @@ +From c0418c02dabe901f5dc39c85ce2e80bd361d7c78 Mon Sep 17 00:00:00 2001 +From: Abhishek Dosi +Date: Wed, 11 Dec 2024 11:19:05 +0000 +Subject: [PATCH] Patch to send tag value associated with route via netlink in + RTA_PRIORITY field. + +Signed-off-by: Abhishek Dosi +--- + zebra/rt_netlink.c | 22 ++++++++++++++++++++-- + 1 file changed, 20 insertions(+), 2 deletions(-) + +diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c +index 976c245c3..1f73f5759 100644 +--- a/zebra/rt_netlink.c ++++ b/zebra/rt_netlink.c +@@ -2348,10 +2348,28 @@ ssize_t netlink_route_multipath_msg_encode(int cmd, struct zebra_dplane_ctx *ctx + * path(s) + * by the routing protocol and for communicating with protocol peers. + */ +- if (!nl_attr_put32(&req->n, datalen, RTA_PRIORITY, +- ROUTE_INSTALLATION_METRIC)) ++ if (fpm) ++ { ++ /* Patch to send tag value as route attribute using RTA_PRIORITY ++ * which can be used as metadata/attribute to take application specific ++ * action. As seen in above comment this field is not use anyways and can be ++ * use by fpmsyncd */ ++ if (!nl_attr_put32(&req->n, datalen, RTA_PRIORITY, ++ cmd == RTM_DELROUTE ? dplane_ctx_get_old_tag(ctx) : ++ dplane_ctx_get_tag(ctx))) ++ { + return 0; + ++ } ++ } ++ else ++ { ++ if (!nl_attr_put32(&req->n, datalen, RTA_PRIORITY, ++ ROUTE_INSTALLATION_METRIC)) ++ { ++ return 0; ++ } ++ } + #if defined(SUPPORT_REALMS) + if (cmd == RTM_DELROUTE) + tag = dplane_ctx_get_old_tag(ctx); +-- +2.25.1 + diff --git a/src/sonic-frr/patch/0064-SRv6-BGP-SID-reachability.patch b/src/sonic-frr/patch/0064-SRv6-BGP-SID-reachability.patch new file mode 100644 index 00000000000..65a15f4b65f --- /dev/null +++ b/src/sonic-frr/patch/0064-SRv6-BGP-SID-reachability.patch @@ -0,0 +1,845 @@ +From f49fc7682f3e1f0e82181d03a1b4f9af3d955abb Mon Sep 17 00:00:00 2001 + +From: Dmytro Shytyi + +Subject: [PATCH 1/4] doc: bgp ipv4 l3vpn sid reachability + +BGP IPv4 L3VPN with SRv6 SID reachability example +provided in the documentation + +Signed-off-by: Dmytro Shytyi +--- + bgpd/bgp_nht.c | 52 ++++-- + doc/user/bgp.rst | 25 +++ + .../bgp_srv6_sid_reachability/c11/bgpd.conf | 0 + .../bgp_srv6_sid_reachability/c11/staticd.conf | 4 + .../bgp_srv6_sid_reachability/c11/zebra.conf | 6 + + .../bgp_srv6_sid_reachability/c12/bgpd.conf | 0 + .../bgp_srv6_sid_reachability/c12/staticd.conf | 4 + .../bgp_srv6_sid_reachability/c12/zebra.conf | 6 + + .../bgp_srv6_sid_reachability/c21/bgpd.conf | 0 + .../bgp_srv6_sid_reachability/c21/staticd.conf | 4 + .../bgp_srv6_sid_reachability/c21/zebra.conf | 6 + + .../bgp_srv6_sid_reachability/c22/bgpd.conf | 0 + .../bgp_srv6_sid_reachability/c22/staticd.conf | 5 + + .../bgp_srv6_sid_reachability/c22/zebra.conf | 9 + + .../bgp_srv6_sid_reachability/c31/bgpd.conf | 0 + .../bgp_srv6_sid_reachability/c31/staticd.conf | 4 + .../bgp_srv6_sid_reachability/c31/zebra.conf | 6 + + .../bgp_srv6_sid_reachability/c32/bgpd.conf | 0 + .../bgp_srv6_sid_reachability/c32/staticd.conf | 4 + .../bgp_srv6_sid_reachability/c32/zebra.conf | 6 + + .../bgp_srv6_sid_reachability/r1/bgpd.conf | 61 +++++++ + .../bgp_srv6_sid_reachability/r1/staticd.conf | 4 + .../bgp_srv6_sid_reachability/r1/zebra.conf | 32 ++++ + .../bgp_srv6_sid_reachability/r2/bgpd.conf | 50 ++++++ + .../bgp_srv6_sid_reachability/r2/staticd.conf | 4 + .../bgp_srv6_sid_reachability/r2/zebra.conf | 29 +++ + .../bgp_srv6_sid_reachability/r3/bgpd.conf | 50 ++++++ + .../bgp_srv6_sid_reachability/r3/staticd.conf | 6 + + .../bgp_srv6_sid_reachability/r3/zebra.conf | 29 +++ + .../test_bgp_srv6_sid_reachability.py | 169 ++++++++++++++++++++ + 30 files changed, 557 insertions(+), 18 deletions(-) + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c11/bgpd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c11/staticd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c11/zebra.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c12/bgpd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c12/staticd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c12/zebra.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c21/bgpd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c21/staticd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c21/zebra.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c22/bgpd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c22/staticd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c22/zebra.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c31/bgpd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c31/staticd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c31/zebra.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c32/bgpd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c32/staticd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c32/zebra.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r1/bgpd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r1/staticd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r1/zebra.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r2/bgpd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r2/staticd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r2/zebra.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r3/bgpd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r3/staticd.conf + create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r3/zebra.conf + create mode 100755 tests/topotests/bgp_srv6_sid_reachability/test_bgp_srv6_sid_reachability.py + +diff --git a/bgpd/bgp_nht.c b/bgpd/bgp_nht.c +index e2c103bb5..6f77d6201 100644 +--- a/bgpd/bgp_nht.c ++++ b/bgpd/bgp_nht.c +@@ -116,24 +116,36 @@ static int bgp_isvalid_nexthop_for_mplsovergre(struct bgp_nexthop_cache *bnc, + static int bgp_isvalid_nexthop_for_mpls(struct bgp_nexthop_cache *bnc, + struct bgp_path_info *path) + { ++ return (bnc && (bnc->nexthop_num > 0 && ++ (CHECK_FLAG(path->flags, BGP_PATH_ACCEPT_OWN) || ++ CHECK_FLAG(bnc->flags, BGP_NEXTHOP_LABELED_VALID) || ++ bgp_isvalid_nexthop_for_ebgp(bnc, path) || ++ bgp_isvalid_nexthop_for_mplsovergre(bnc, path)))); ++} ++ ++static bool bgp_isvalid_nexthop_for_l3vpn(struct bgp_nexthop_cache *bnc, ++ struct bgp_path_info *path) ++{ ++ if (bgp_zebra_num_connects() == 0) ++ return 1; ++ ++ if (path->attr->srv6_l3vpn || path->attr->srv6_vpn) { ++ /* In the case of SRv6-VPN, we need to track the reachability to the ++ * SID (in other words, IPv6 address). We check that the SID is ++ * available in the BGP update; then if it is available, we check ++ * for the nexthop reachability. ++ */ ++ if (bnc && (bnc->nexthop_num > 0 && bgp_isvalid_nexthop(bnc))) ++ return 1; ++ return 0; ++ } + /* +- * - In the case of MPLS-VPN, the label is learned from LDP or other ++ * In the case of MPLS-VPN, the label is learned from LDP or other + * protocols, and nexthop tracking is enabled for the label. + * The value is recorded as BGP_NEXTHOP_LABELED_VALID. +- * - In the case of SRv6-VPN, we need to track the reachability to the +- * SID (in other words, IPv6 address). As in MPLS, we need to record +- * the value as BGP_NEXTHOP_SID_VALID. However, this function is +- * currently not implemented, and this function assumes that all +- * Transit routes for SRv6-VPN are valid. + * - Otherwise check for mpls-gre acceptance + */ +- return (bgp_zebra_num_connects() == 0 || +- (bnc && (bnc->nexthop_num > 0 && +- (CHECK_FLAG(path->flags, BGP_PATH_ACCEPT_OWN) || +- CHECK_FLAG(bnc->flags, BGP_NEXTHOP_LABELED_VALID) || +- bnc->bgp->srv6_enabled || +- bgp_isvalid_nexthop_for_ebgp(bnc, path) || +- bgp_isvalid_nexthop_for_mplsovergre(bnc, path))))); ++ return bgp_isvalid_nexthop_for_mpls(bnc, path); + } + + static void bgp_unlink_nexthop_check(struct bgp_nexthop_cache *bnc) +@@ -496,7 +508,7 @@ int bgp_find_or_add_nexthop(struct bgp *bgp_route, struct bgp *bgp_nexthop, + else if (safi == SAFI_UNICAST && pi && + pi->sub_type == BGP_ROUTE_IMPORTED && pi->extra && + pi->extra->num_labels && !bnc->is_evpn_gwip_nexthop) +- return bgp_isvalid_nexthop_for_mpls(bnc, pi); ++ return bgp_isvalid_nexthop_for_l3vpn(bnc, pi); + else if (safi == SAFI_MPLS_VPN && pi && + pi->sub_type != BGP_ROUTE_IMPORTED) + /* avoid not redistributing mpls vpn routes */ +@@ -1045,8 +1057,11 @@ static int make_prefix(int afi, struct bgp_path_info *pi, struct prefix *p) + break; + case AFI_IP6: + p->family = AF_INET6; +- +- if (is_bgp_static) { ++ if (pi->attr && pi->attr->srv6_l3vpn) { ++ IPV6_ADDR_COPY(&(p->u.prefix6), ++ &(pi->attr->srv6_l3vpn->sid)); ++ p->prefixlen = IPV6_MAX_BITLEN; ++ } else if (is_bgp_static) { + p->u.prefix6 = p_orig->u.prefix6; + p->prefixlen = p_orig->prefixlen; + } else { +@@ -1294,8 +1309,9 @@ void evaluate_paths(struct bgp_nexthop_cache *bnc) + && (path->attr->evpn_overlay.type + != OVERLAY_INDEX_GATEWAY_IP)) { + bnc_is_valid_nexthop = +- bgp_isvalid_nexthop_for_mpls(bnc, path) ? true +- : false; ++ bgp_isvalid_nexthop_for_l3vpn(bnc, path) ++ ? true ++ : false; + } else if (safi == SAFI_MPLS_VPN && + path->sub_type != BGP_ROUTE_IMPORTED) { + /* avoid not redistributing mpls vpn routes */ +diff --git a/doc/user/bgp.rst b/doc/user/bgp.rst +index 99d2a8c35..1b7039b23 100644 +--- a/doc/user/bgp.rst ++++ b/doc/user/bgp.rst +@@ -3201,6 +3201,31 @@ L3VPN SRv6 + Specify the SRv6 locator to be used for SRv6 L3VPN. The Locator name must + be set in zebra, but user can set it in any order. + ++L3VPN SRv6 SID reachability ++--------------------------- ++ ++In the context of IPv4 L3VPN over SRv6 specific usecase, 2001:db8:12::2 ++is the peer IPv6 address of r2, and 2001:db8:2:2:: is the SRv6 SID ++advertised by router r2 for prefix P. On r1, the SID reachability is ++checked in order to install the prefix P. The below output indicates ++that the 2001:db8:2:2:: prefix is valid. ++ ++ ++.. code-block:: frr ++ ++ r1# show bgp nexthop detail ++ Current BGP nexthop cache: ++ 2001:db8:2:2:: valid [IGP metric 0], #paths 4 ++ gate 2001:db8:12::2, if eth0 ++ Last update: Tue Nov 14 10:36:28 2023 ++ Paths: ++ 1/1 192.168.2.0/24 VRF vrf10 flags 0x4018 ++ 1/3 192.168.2.0/24 RD 65002:10 VRF default flags 0x418 ++ 2001:db8:12::2 valid [IGP metric 0], #paths 0, peer 2001:db8:12::2 ++ if eth0 ++ Last update: Tue Nov 14 10:36:26 2023 ++ Paths: ++ + General configuration + ^^^^^^^^^^^^^^^^^^^^^ + +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c11/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/c11/bgpd.conf +new file mode 100644 +index 000000000..e69de29bb +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c11/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/c11/staticd.conf +new file mode 100644 +index 000000000..bcf5a0499 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/c11/staticd.conf +@@ -0,0 +1,4 @@ ++! ++ip route 0.0.0.0/0 192.168.1.254 ++ipv6 route ::/0 2001:1::ffff ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c11/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/c11/zebra.conf +new file mode 100644 +index 000000000..0615cf9a9 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/c11/zebra.conf +@@ -0,0 +1,6 @@ ++hostname c11 ++! ++interface eth0 ++ ip address 192.168.1.1/24 ++ ipv6 address 2001:1::1/64 ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c12/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/c12/bgpd.conf +new file mode 100644 +index 000000000..e69de29bb +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c12/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/c12/staticd.conf +new file mode 100644 +index 000000000..bcf5a0499 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/c12/staticd.conf +@@ -0,0 +1,4 @@ ++! ++ip route 0.0.0.0/0 192.168.1.254 ++ipv6 route ::/0 2001:1::ffff ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c12/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/c12/zebra.conf +new file mode 100644 +index 000000000..18985aa38 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/c12/zebra.conf +@@ -0,0 +1,6 @@ ++hostname c12 ++! ++interface eth0 ++ ip address 192.168.1.1/24 ++ ipv6 address 2001:1::1/64 ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c21/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/c21/bgpd.conf +new file mode 100644 +index 000000000..e69de29bb +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c21/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/c21/staticd.conf +new file mode 100644 +index 000000000..608e60060 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/c21/staticd.conf +@@ -0,0 +1,4 @@ ++! ++ip route 0.0.0.0/0 192.168.2.254 ++ipv6 route ::/0 2001:2::ffff ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c21/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/c21/zebra.conf +new file mode 100644 +index 000000000..b8b70ac96 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/c21/zebra.conf +@@ -0,0 +1,6 @@ ++hostname c21 ++! ++interface eth0 ++ ip address 192.168.2.1/24 ++ ipv6 address 2001:2::1/64 ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c22/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/c22/bgpd.conf +new file mode 100644 +index 000000000..e69de29bb +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c22/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/c22/staticd.conf +new file mode 100644 +index 000000000..277aae998 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/c22/staticd.conf +@@ -0,0 +1,5 @@ ++ ++! ++ip route 0.0.0.0/0 192.168.2.254 ++ipv6 route ::/0 2001:2::ffff ++! +\ No newline at end of file +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c22/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/c22/zebra.conf +new file mode 100644 +index 000000000..cc764cc35 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/c22/zebra.conf +@@ -0,0 +1,9 @@ ++hostname c22 ++! ++interface eth0 ++ ip address 192.168.2.1/24 ++ ipv6 address 2001:2::1/64 ++! ++ip route 0.0.0.0/0 192.168.2.254 ++ipv6 route ::/0 2001:2::ffff ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c31/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/c31/bgpd.conf +new file mode 100644 +index 000000000..e69de29bb +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c31/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/c31/staticd.conf +new file mode 100644 +index 000000000..0c88575ab +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/c31/staticd.conf +@@ -0,0 +1,4 @@ ++! ++ip route 0.0.0.0/0 192.168.3.254 ++ipv6 route ::/0 2001:3::ffff ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c31/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/c31/zebra.conf +new file mode 100644 +index 000000000..3f75641ea +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/c31/zebra.conf +@@ -0,0 +1,6 @@ ++hostname c31 ++! ++interface eth0 ++ ip address 192.168.3.1/24 ++ ipv6 address 2001:3::1/64 ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c32/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/c32/bgpd.conf +new file mode 100644 +index 000000000..e69de29bb +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c32/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/c32/staticd.conf +new file mode 100644 +index 000000000..0c88575ab +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/c32/staticd.conf +@@ -0,0 +1,4 @@ ++! ++ip route 0.0.0.0/0 192.168.3.254 ++ipv6 route ::/0 2001:3::ffff ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/c32/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/c32/zebra.conf +new file mode 100644 +index 000000000..c06a7d19f +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/c32/zebra.conf +@@ -0,0 +1,6 @@ ++hostname c32 ++! ++interface eth0 ++ ip address 192.168.3.1/24 ++ ipv6 address 2001:3::1/64 ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/r1/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/r1/bgpd.conf +new file mode 100644 +index 000000000..573dbe095 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/r1/bgpd.conf +@@ -0,0 +1,61 @@ ++frr defaults traditional ++! ++hostname r1 ++password zebra ++! ++log commands ++! ++router bgp 65001 ++ bgp router-id 192.0.2.1 ++ no bgp ebgp-requires-policy ++ no bgp default ipv4-unicast ++ neighbor 2001:db8:12::2 remote-as 65002 ++ neighbor 2001:db8:12::2 timers 3 10 ++ neighbor 2001:db8:12::2 timers connect 1 ++ neighbor 2001:db8:12::2 capability extended-nexthop ++ neighbor 2001:db8:13::3 remote-as 65001 ++ neighbor 2001:db8:13::3 timers 3 10 ++ neighbor 2001:db8:13::3 timers connect 1 ++ neighbor 2001:db8:13::3 capability extended-nexthop ++ ! ++ segment-routing srv6 ++ locator default ++ ! ++ address-family ipv4 vpn ++ neighbor 2001:db8:12::2 activate ++ neighbor 2001:db8:13::3 activate ++ exit-address-family ++ ! ++! ++router bgp 65001 vrf vrf10 ++ bgp router-id 192.0.2.1 ++ ! ++ address-family ipv4 unicast ++ redistribute connected ++ sid vpn export 1 ++ rd vpn export 65001:10 ++ rt vpn both 0:10 ++ import vpn ++ export vpn ++ exit-address-family ++ ! ++! ++router bgp 65001 vrf vrf20 ++ bgp router-id 192.0.2.1 ++ ! ++ address-family ipv4 unicast ++ redistribute connected ++ sid vpn export 2 ++ rd vpn export 65001:20 ++ rt vpn both 0:20 ++ import vpn ++ export vpn ++ exit-address-family ++ ! ++! ++interface eth0 ++ mpls bgp forwarding ++! ++interface eth1 ++ mpls bgp forwarding ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/r1/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/r1/staticd.conf +new file mode 100644 +index 000000000..49b64fd7a +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/r1/staticd.conf +@@ -0,0 +1,4 @@ ++! ++ipv6 route 2001:db8:2:2::/64 2001:db8:12::2 ++ipv6 route 2001:db8:3:3::/64 2001:db8:13::3 ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/r1/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/r1/zebra.conf +new file mode 100644 +index 000000000..79dbf9559 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/r1/zebra.conf +@@ -0,0 +1,32 @@ ++log file zebra.log ++! ++hostname r1 ++! ++interface lo ++ ipv6 address 2001:db8:1:1::1/128 ++! ++interface eth0 ++ ipv6 address 2001:db8:12::1/64 ++! ++interface eth1 ++ ipv6 address 2001:db8:13::1/64 ++! ++interface eth2 vrf vrf10 ++ ip address 192.168.1.254/24 ++! ++interface eth3 vrf vrf20 ++ ip address 192.168.1.254/24 ++! ++segment-routing ++ srv6 ++ locators ++ locator default ++ prefix 2001:db8:1:1::/64 ++ ! ++ ! ++! ++ip forwarding ++ipv6 forwarding ++! ++line vty ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/r2/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/r2/bgpd.conf +new file mode 100644 +index 000000000..723d6fca2 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/r2/bgpd.conf +@@ -0,0 +1,50 @@ ++frr defaults traditional ++! ++hostname r2 ++password zebra ++! ++log commands ++! ++router bgp 65002 ++ bgp router-id 192.0.2.2 ++ no bgp ebgp-requires-policy ++ no bgp default ipv4-unicast ++ neighbor 2001:db8:12::1 remote-as 65001 ++ neighbor 2001:db8:12::1 timers 3 10 ++ neighbor 2001:db8:12::1 timers connect 1 ++ neighbor 2001:db8:12::1 capability extended-nexthop ++ ! ++ segment-routing srv6 ++ locator default ++ ! ++ address-family ipv4 vpn ++ neighbor 2001:db8:12::1 activate ++ exit-address-family ++ ! ++! ++router bgp 65002 vrf vrf10 ++ bgp router-id 192.0.2.2 ++ ! ++ address-family ipv4 unicast ++ redistribute connected ++ sid vpn export 1 ++ rd vpn export 65002:10 ++ rt vpn both 0:10 ++ import vpn ++ export vpn ++ exit-address-family ++ ! ++! ++router bgp 65002 vrf vrf20 ++ bgp router-id 192.0.2.2 ++ ! ++ address-family ipv4 unicast ++ redistribute connected ++ sid vpn export 2 ++ rd vpn export 65002:20 ++ rt vpn both 0:20 ++ import vpn ++ export vpn ++ exit-address-family ++ ! ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/r2/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/r2/staticd.conf +new file mode 100644 +index 000000000..8d80c1ead +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/r2/staticd.conf +@@ -0,0 +1,4 @@ ++! ++ipv6 route 2001:db8:1:1::/64 2001:db8:12::1 ++ipv6 route 2001:db8:3:3::/64 2001:db8:12::1 ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/r2/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/r2/zebra.conf +new file mode 100644 +index 000000000..09a65b989 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/r2/zebra.conf +@@ -0,0 +1,29 @@ ++log file zebra.log ++! ++hostname r2 ++! ++interface lo ++ ipv6 address 2001:db8:2:2::1/128 ++! ++interface eth0 ++ ipv6 address 2001:db8:12::2/64 ++! ++interface eth1 vrf vrf10 ++ ip address 192.168.2.254/24 ++! ++interface eth2 vrf vrf20 ++ ip address 192.168.2.254/24 ++! ++segment-routing ++ srv6 ++ locators ++ locator default ++ prefix 2001:db8:2:2::/64 ++ ! ++ ! ++! ++ip forwarding ++ipv6 forwarding ++! ++line vty ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/r3/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/r3/bgpd.conf +new file mode 100644 +index 000000000..c412cb6d2 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/r3/bgpd.conf +@@ -0,0 +1,50 @@ ++frr defaults traditional ++! ++hostname r2 ++password zebra ++! ++log commands ++! ++router bgp 65001 ++ bgp router-id 192.0.2.3 ++ no bgp ebgp-requires-policy ++ no bgp default ipv4-unicast ++ neighbor 2001:db8:13::1 remote-as 65001 ++ neighbor 2001:db8:13::1 timers 3 10 ++ neighbor 2001:db8:13::1 timers connect 1 ++ neighbor 2001:db8:13::1 capability extended-nexthop ++ ! ++ segment-routing srv6 ++ locator default ++ ! ++ address-family ipv4 vpn ++ neighbor 2001:db8:13::1 activate ++ exit-address-family ++ ! ++! ++router bgp 65001 vrf vrf10 ++ bgp router-id 192.0.2.3 ++ ! ++ address-family ipv4 unicast ++ redistribute connected ++ sid vpn export 1 ++ rd vpn export 65001:10 ++ rt vpn both 0:10 ++ import vpn ++ export vpn ++ exit-address-family ++ ! ++! ++router bgp 65001 vrf vrf20 ++ bgp router-id 192.0.2.2 ++ ! ++ address-family ipv4 unicast ++ redistribute connected ++ sid vpn export 2 ++ rd vpn export 65001:20 ++ rt vpn both 0:20 ++ import vpn ++ export vpn ++ exit-address-family ++ ! ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/r3/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/r3/staticd.conf +new file mode 100644 +index 000000000..9d672d51b +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/r3/staticd.conf +@@ -0,0 +1,6 @@ ++! ++ipv6 route 2001:db8:12::/64 2001:db8:13::1 ++! ++ipv6 route 2001:db8:1:1::/64 2001:db8:13::1 ++ipv6 route 2001:db8:2:2::/64 2001:db8:13::1 ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/r3/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/r3/zebra.conf +new file mode 100644 +index 000000000..a20cb76a7 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/r3/zebra.conf +@@ -0,0 +1,29 @@ ++log file zebra.log ++! ++hostname r2 ++! ++interface lo ++ ipv6 address 2001:db8:3:3::1/128 ++! ++interface eth0 ++ ipv6 address 2001:db8:13::3/64 ++! ++interface eth1 vrf vrf10 ++ ip address 192.168.3.254/24 ++! ++interface eth2 vrf vrf20 ++ ip address 192.168.3.254/24 ++! ++segment-routing ++ srv6 ++ locators ++ locator default ++ prefix 2001:db8:3:3::/64 ++ ! ++ ! ++! ++ip forwarding ++ipv6 forwarding ++! ++line vty ++! +diff --git a/tests/topotests/bgp_srv6_sid_reachability/test_bgp_srv6_sid_reachability.py b/tests/topotests/bgp_srv6_sid_reachability/test_bgp_srv6_sid_reachability.py +new file mode 100755 +index 000000000..92315bce0 +--- /dev/null ++++ b/tests/topotests/bgp_srv6_sid_reachability/test_bgp_srv6_sid_reachability.py +@@ -0,0 +1,169 @@ ++#!/usr/bin/env python ++# SPDX-License-Identifier: ISC ++ ++# ++# Part of NetDEF Topology Tests ++# ++# Copyright (c) 2023 by 6WIND ++# ++ ++import os ++import re ++import sys ++import json ++import functools ++import pytest ++ ++CWD = os.path.dirname(os.path.realpath(__file__)) ++sys.path.append(os.path.join(CWD, "../")) ++ ++# pylint: disable=C0413 ++# Import topogen and topotest helpers ++from lib import topotest ++from lib.topogen import Topogen, TopoRouter, get_topogen ++from lib.topolog import logger ++from lib.common_config import required_linux_kernel_version ++from lib.checkping import check_ping ++ ++pytestmark = [pytest.mark.bgpd, pytest.mark.staticd] ++ ++ ++def build_topo(tgen): ++ tgen.add_router("r1") ++ tgen.add_router("r2") ++ tgen.add_router("r3") ++ ++ tgen.add_router("c11") ++ tgen.add_router("c12") ++ tgen.add_router("c21") ++ tgen.add_router("c22") ++ tgen.add_router("c31") ++ tgen.add_router("c32") ++ ++ tgen.add_link(tgen.gears["r1"], tgen.gears["r2"], "eth0", "eth0") ++ tgen.add_link(tgen.gears["r1"], tgen.gears["r3"], "eth1", "eth0") ++ tgen.add_link(tgen.gears["r1"], tgen.gears["c11"], "eth2", "eth0") ++ tgen.add_link(tgen.gears["r1"], tgen.gears["c12"], "eth3", "eth0") ++ tgen.add_link(tgen.gears["r2"], tgen.gears["c21"], "eth1", "eth0") ++ tgen.add_link(tgen.gears["r2"], tgen.gears["c22"], "eth2", "eth0") ++ tgen.add_link(tgen.gears["r3"], tgen.gears["c31"], "eth1", "eth0") ++ tgen.add_link(tgen.gears["r3"], tgen.gears["c32"], "eth2", "eth0") ++ ++ ++def setup_module(mod): ++ result = required_linux_kernel_version("5.15") ++ if result is not True: ++ pytest.skip("Kernel requirements are not met") ++ ++ tgen = Topogen(build_topo, mod.__name__) ++ tgen.start_topology() ++ ++ for rname, router in tgen.routers().items(): ++ router.load_config( ++ TopoRouter.RD_ZEBRA, os.path.join(CWD, "{}/zebra.conf".format(rname)) ++ ) ++ router.load_config( ++ TopoRouter.RD_STATIC, os.path.join(CWD, "{}/staticd.conf".format(rname)) ++ ) ++ router.load_config( ++ TopoRouter.RD_BGP, os.path.join(CWD, "{}/bgpd.conf".format(rname)) ++ ) ++ ++ tgen.gears["r1"].run("sysctl net.vrf.strict_mode=1") ++ tgen.gears["r1"].run("ip link add vrf10 type vrf table 10") ++ tgen.gears["r1"].run("ip link set vrf10 up") ++ tgen.gears["r1"].run("ip link add vrf20 type vrf table 20") ++ tgen.gears["r1"].run("ip link set vrf20 up") ++ tgen.gears["r1"].run("ip link set eth2 master vrf10") ++ tgen.gears["r1"].run("ip link set eth3 master vrf20") ++ ++ tgen.gears["r2"].run("sysctl net.vrf.strict_mode=1") ++ tgen.gears["r2"].run("ip link add vrf10 type vrf table 10") ++ tgen.gears["r2"].run("ip link set vrf10 up") ++ tgen.gears["r2"].run("ip link add vrf20 type vrf table 20") ++ tgen.gears["r2"].run("ip link set vrf20 up") ++ tgen.gears["r2"].run("ip link set eth1 master vrf10") ++ tgen.gears["r2"].run("ip link set eth2 master vrf20") ++ ++ tgen.gears["r3"].run("sysctl net.vrf.strict_mode=1") ++ tgen.gears["r3"].run("ip link add vrf10 type vrf table 10") ++ tgen.gears["r3"].run("ip link set vrf10 up") ++ tgen.gears["r3"].run("ip link add vrf20 type vrf table 20") ++ tgen.gears["r3"].run("ip link set vrf20 up") ++ tgen.gears["r3"].run("ip link set eth1 master vrf10") ++ tgen.gears["r3"].run("ip link set eth2 master vrf20") ++ ++ tgen.start_router() ++ ++ ++def teardown_module(mod): ++ tgen = get_topogen() ++ tgen.stop_topology() ++ ++ ++def test_ping(): ++ tgen = get_topogen() ++ ++ check_ping("c11", "192.168.2.1", True, 10, 1) ++ check_ping("c11", "192.168.3.1", True, 10, 1) ++ check_ping("c12", "192.168.2.1", True, 10, 1) ++ check_ping("c12", "192.168.3.1", True, 10, 1) ++ check_ping("c21", "192.168.3.1", True, 10, 1) ++ check_ping("c22", "192.168.3.1", True, 10, 1) ++ ++ ++def test_sid_unreachable_nht(): ++ get_topogen().gears["r1"].vtysh_cmd( ++ """ ++ configure terminal ++ no ipv6 route 2001:db8:2:2::/64 2001:db8:12::2 ++ """ ++ ) ++ check_ping("c11", "192.168.2.1", False, 10, 1) ++ ++ ++def test_sid_reachable_again_nht(): ++ get_topogen().gears["r1"].vtysh_cmd( ++ """ ++ configure terminal ++ ipv6 route 2001:db8:2:2::/64 2001:db8:12::2 ++ """ ++ ) ++ check_ping("c11", "192.168.2.1", True, 10, 1) ++ ++ ++def test_sid_unreachable_bgp_update(): ++ get_topogen().gears["r2"].vtysh_cmd( ++ """ ++ configure terminal ++ router bgp 65002 ++ no segment-routing srv6 ++ exit ++ router bgp 65002 vrf vrf10 ++ address-family ipv4 unicast ++ no sid vpn export 1 ++ """ ++ ) ++ check_ping("c11", "192.168.2.1", False, 10, 1) ++ ++ ++def test_sid_reachable_again_bgp_update(): ++ get_topogen().gears["r2"].vtysh_cmd( ++ """ ++ configure terminal ++ router bgp 65002 ++ segment-routing srv6 ++ locator default ++ exit ++ exit ++ router bgp 65002 vrf vrf10 ++ address-family ipv4 unicast ++ sid vpn export 1 ++ """ ++ ) ++ check_ping("c11", "192.168.2.1", True, 10, 1) ++ ++ ++if __name__ == "__main__": ++ args = ["-s"] + sys.argv[1:] ++ sys.exit(pytest.main(args)) diff --git a/src/sonic-frr/patch/0065-zebra-display-srv6-encapsulation-source-address-when-configured.patch b/src/sonic-frr/patch/0065-zebra-display-srv6-encapsulation-source-address-when-configured.patch new file mode 100644 index 00000000000..431d9e07ad9 --- /dev/null +++ b/src/sonic-frr/patch/0065-zebra-display-srv6-encapsulation-source-address-when-configured.patch @@ -0,0 +1,57 @@ +From 890b67d7a9eb6ee9cbb6b5623934ad4d0b781232 Mon Sep 17 00:00:00 2001 + +From: Philippe Guibert + +Subject: [PATCH] zebra: display srv6 encapsulation source-address when + configured + +The 'show running-config' does not display the ipv6 source address +when a locator is not configured. Fix this by systematically displaying +the ipv6 source address. + +Fixes: 6a0956169b31 ("zebra: Add encap source address to SRv6 config write function") + +Signed-off-by: Philippe Guibert +--- + zebra/zebra_srv6_vty.c | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +diff --git a/zebra/zebra_srv6_vty.c b/zebra/zebra_srv6_vty.c +index c5b850599..d5cd30e64 100644 +--- a/zebra/zebra_srv6_vty.c ++++ b/zebra/zebra_srv6_vty.c +@@ -475,16 +475,24 @@ static int zebra_sr_config(struct vty *vty) + struct listnode *node; + struct srv6_locator *locator; + char str[256]; ++ bool display_source_srv6 = false; ++ ++ if (srv6 && !IPV6_ADDR_SAME(&srv6->encap_src_addr, &in6addr_any)) ++ display_source_srv6 = true; + + vty_out(vty, "!\n"); +- if (zebra_srv6_is_enable()) { ++ if (display_source_srv6 || zebra_srv6_is_enable()) { + vty_out(vty, "segment-routing\n"); + vty_out(vty, " srv6\n"); ++ } ++ if (display_source_srv6) { + if (!IPV6_ADDR_SAME(&srv6->encap_src_addr, &in6addr_any)) { + vty_out(vty, " encapsulation\n"); + vty_out(vty, " source-address %pI6\n", + &srv6->encap_src_addr); + } ++ } ++ if (zebra_srv6_is_enable()) { + vty_out(vty, " locators\n"); + for (ALL_LIST_ELEMENTS_RO(srv6->locators, node, locator)) { + inet_ntop(AF_INET6, &locator->prefix.prefix, +@@ -514,6 +522,8 @@ static int zebra_sr_config(struct vty *vty) + vty_out(vty, " !\n"); + vty_out(vty, " exit\n"); + vty_out(vty, " !\n"); ++ } ++ if (display_source_srv6 || zebra_srv6_is_enable()) { + vty_out(vty, "exit\n"); + vty_out(vty, "!\n"); + } diff --git a/src/sonic-frr/patch/0066-lib-fix-srv6-locator-flags-propagated-to-isis.patch b/src/sonic-frr/patch/0066-lib-fix-srv6-locator-flags-propagated-to-isis.patch new file mode 100644 index 00000000000..b872ff9cbf8 --- /dev/null +++ b/src/sonic-frr/patch/0066-lib-fix-srv6-locator-flags-propagated-to-isis.patch @@ -0,0 +1,41 @@ +From 03d2ad01a4fd4aa6df4b1ec64249fb391405a61f Mon Sep 17 00:00:00 2001 + +From: Philippe Guibert + +Subject: [PATCH] lib: fix srv6 locator flags propagated to isis + +When usid is not used, the isis_srv6_topo1 test does not work. +The SID prefix allocated by isis is different when the usid +flags is set or not. When the flags is not transmitted to isis, +the SID allocated is supposed to be a 128 bit mask length SID, +which is not what the isis_srv6_topo1 test is supposed to obtain. + +Fix this by exchanging the flags locator value in the zclient api. + +Fixes: 9b7491e1fc04 ("lib: Add support for flags to the SRv6 locator") + +Signed-off-by: Philippe Guibert +--- + lib/zclient.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/lib/zclient.c b/lib/zclient.c +index 64515c754..269c3e9ba 100644 +--- a/lib/zclient.c ++++ b/lib/zclient.c +@@ -1125,6 +1125,7 @@ int zapi_srv6_locator_encode(struct stream *s, const struct srv6_locator *l) + stream_put(s, l->name, strlen(l->name)); + stream_putw(s, l->prefix.prefixlen); + stream_put(s, &l->prefix.prefix, sizeof(l->prefix.prefix)); ++ stream_putc(s, l->flags); + return 0; + } + +@@ -1140,6 +1141,7 @@ int zapi_srv6_locator_decode(struct stream *s, struct srv6_locator *l) + STREAM_GETW(s, l->prefix.prefixlen); + STREAM_GET(&l->prefix.prefix, s, sizeof(l->prefix.prefix)); + l->prefix.family = AF_INET6; ++ STREAM_GETC(s, l->flags); + return 0; + + stream_failure: diff --git a/src/sonic-frr/patch/0067-Add-support-for-SRv6-SID-Manager.patch b/src/sonic-frr/patch/0067-Add-support-for-SRv6-SID-Manager.patch new file mode 100644 index 00000000000..06373a63264 --- /dev/null +++ b/src/sonic-frr/patch/0067-Add-support-for-SRv6-SID-Manager.patch @@ -0,0 +1,4461 @@ +From 021386a34eb49893ce6b7df16c2fe1096a8fedf6 Mon Sep 17 00:00:00 2001 + +From: Carmine Scarpitta + +Subject: [PATCH 01/25] lib: Add support for SRv6 SID formats + +Add functionalities to manage SRv6 SID formats (allocate / free). + +Signed-off-by: Carmine Scarpitta +--- + doc/user/zebra.rst | 84 ++ + lib/command.h | 3 + lib/log.c | 6 + lib/srv6.c | 187 ++++ + lib/srv6.h | 134 +++ + lib/zclient.c | 194 ++++ + lib/zclient.h | 51 + + vtysh/vtysh.c | 82 ++ + zebra/zapi_msg.c | 162 ++++ + zebra/zapi_msg.h | 8 + zebra/zebra_errors.c | 12 + zebra/zebra_errors.h | 2 + zebra/zebra_srv6.c | 2094 +++++++++++++++++++++++++++++++++++++++++++++++- + zebra/zebra_srv6.h | 247 ++++++ + zebra/zebra_srv6_vty.c | 593 +++++++++++++- + 15 files changed, 3768 insertions(+), 91 deletions(-) + +diff --git a/doc/user/zebra.rst b/doc/user/zebra.rst +index 30b020425..172a8332f 100644 +--- a/doc/user/zebra.rst ++++ b/doc/user/zebra.rst +@@ -1021,6 +1021,35 @@ and this section also helps that case. + ! + ... + ++.. clicmd:: format NAME ++ ++ Specify the SID allocation schema for the SIDs allocated from this locator. Currently, ++ FRR supports supports the following allocation schemas: ++ ++ - `usid-f3216` ++ - `uncompressed` ++ ++:: ++ ++ router# configure terminal ++ router(config)# segment-routinig ++ router(config-sr)# srv6 ++ router(config-srv6)# locators ++ router(config-srv6-locators)# locator loc1 ++ router(config-srv6-locator)# prefix fc00:0:1::/48 ++ router(config-srv6-locator)# format usid-f3216 ++ ++ router(config-srv6-locator)# show run ++ ... ++ segment-routing ++ srv6 ++ locators ++ locator loc1 ++ prefix fc00:0:1::/48 ++ format usid-f3216 ++ ! ++ ... ++ + .. clicmd:: encapsulation + + Configure parameters for SRv6 encapsulation. +@@ -1029,6 +1058,61 @@ and this section also helps that case. + + Configure the source address of the outer encapsulating IPv6 header. + ++.. clicmd:: formats ++ ++ Configure SRv6 SID formats. ++ ++.. clicmd:: format NAME ++ ++ Configure SRv6 SID format. ++ ++.. clicmd:: compressed usid ++ ++ Enable SRv6 uSID compression and configure SRv6 uSID compression parameters. ++ ++.. clicmd:: local-id-block start START ++ ++ Configure the start value for the Local ID Block (LIB). ++ ++.. clicmd:: local-id-block explicit start START end END ++ ++ Configure the start/end values for the Explicit LIB (ELIB). ++ ++.. clicmd:: wide-local-id-block start START end END ++ ++ Configure the start/end values for the Wide LIB (W-LIB). ++ ++.. clicmd:: wide-local-id-block explicit start START ++ ++ Configure the start value for the Explicit Wide LIB (EW-LIB). ++ ++:: ++ ++ router# configure terminal ++ router(config)# segment-routinig ++ router(config-sr)# srv6 ++ router(config-srv6)# formats ++ router(config-srv6-formats)# format usid-f3216 ++ router(config-srv6-format)# compressed usid ++ router(config-srv6-format-usid)# local-id-block start 0xD000 ++ router(config-srv6-format-usid)# local-id-block explicit start 0xF000 end 0xFDFF ++ router(config-srv6-format-usid)# wide-local-id-block start 0xFFF4 end 0xFFF5 ++ router(config-srv6-format-usid)# wide-local-id-block explicit start 0xFFF4 ++ ++ router(config-srv6-locator)# show run ++ ... ++ segment-routing ++ srv6 ++ formats ++ format usid-f3216 ++ compressed usid ++ local-id-block start 0xD000 ++ local-id-block explicit start 0xF000 end 0xFDFF ++ wide-local-id-block start 0xFFF4 end 0xFFF5 ++ wide-local-id-block explicit start 0xFFF4 ++ ! ++ ... ++ + .. _multicast-rib-commands: + + Multicast RIB Commands +diff --git a/lib/command.h b/lib/command.h +index 04c66adb2..12c893b1b 100644 +--- a/lib/command.h ++++ b/lib/command.h +@@ -161,6 +161,9 @@ enum node_type { + SRV6_LOCS_NODE, /* SRv6 locators node */ + SRV6_LOC_NODE, /* SRv6 locator node */ + SRV6_ENCAP_NODE, /* SRv6 encapsulation node */ ++ SRV6_SID_FORMATS_NODE, /* SRv6 SID formats config node */ ++ SRV6_SID_FORMAT_USID_F3216_NODE, /* SRv6 uSID f3216 format config node */ ++ SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE, /* SRv6 uncompressed f4024 format config node */ + VTY_NODE, /* Vty node. */ + FPM_NODE, /* Dataplane FPM node. */ + LINK_PARAMS_NODE, /* Link-parameters node */ +diff --git a/lib/log.c b/lib/log.c +index 969ca7925..880180ae5 100644 +--- a/lib/log.c ++++ b/lib/log.c +@@ -436,6 +436,9 @@ static const struct zebra_desc_table command_types[] = { + DESC_ENTRY(ZEBRA_SRV6_LOCATOR_DELETE), + DESC_ENTRY(ZEBRA_SRV6_MANAGER_GET_LOCATOR_CHUNK), + DESC_ENTRY(ZEBRA_SRV6_MANAGER_RELEASE_LOCATOR_CHUNK), ++ DESC_ENTRY(ZEBRA_SRV6_MANAGER_GET_LOCATOR), ++ DESC_ENTRY(ZEBRA_SRV6_MANAGER_GET_SRV6_SID), ++ DESC_ENTRY(ZEBRA_SRV6_MANAGER_RELEASE_SRV6_SID), + DESC_ENTRY(ZEBRA_ERROR), + DESC_ENTRY(ZEBRA_CLIENT_CAPABILITIES), + DESC_ENTRY(ZEBRA_OPAQUE_MESSAGE), +@@ -461,7 +464,8 @@ static const struct zebra_desc_table command_types[] = { + DESC_ENTRY(ZEBRA_TC_CLASS_DELETE), + DESC_ENTRY(ZEBRA_TC_FILTER_ADD), + DESC_ENTRY(ZEBRA_TC_FILTER_DELETE), +- DESC_ENTRY(ZEBRA_OPAQUE_NOTIFY) ++ DESC_ENTRY(ZEBRA_OPAQUE_NOTIFY), ++ DESC_ENTRY(ZEBRA_SRV6_SID_NOTIFY) + }; + #undef DESC_ENTRY + +diff --git a/lib/srv6.c b/lib/srv6.c +index dceb6ab48..4cb062256 100644 +--- a/lib/srv6.c ++++ b/lib/srv6.c +@@ -10,8 +10,11 @@ + #include "log.h" + + DEFINE_QOBJ_TYPE(srv6_locator); ++DEFINE_QOBJ_TYPE(srv6_sid_format); + DEFINE_MTYPE_STATIC(LIB, SRV6_LOCATOR, "SRV6 locator"); + DEFINE_MTYPE_STATIC(LIB, SRV6_LOCATOR_CHUNK, "SRV6 locator chunk"); ++DEFINE_MTYPE_STATIC(LIB, SRV6_SID_FORMAT, "SRv6 SID format"); ++DEFINE_MTYPE_STATIC(LIB, SRV6_SID_CTX, "SRv6 SID context"); + + const char *seg6local_action2str(uint32_t action) + { +@@ -137,6 +140,21 @@ struct srv6_locator_chunk *srv6_locator_chunk_alloc(void) + return chunk; + } + ++void srv6_locator_copy(struct srv6_locator *copy, ++ const struct srv6_locator *locator) ++{ ++ strlcpy(copy->name, locator->name, sizeof(locator->name)); ++ copy->prefix = locator->prefix; ++ copy->block_bits_length = locator->block_bits_length; ++ copy->node_bits_length = locator->node_bits_length; ++ copy->function_bits_length = locator->function_bits_length; ++ copy->argument_bits_length = locator->argument_bits_length; ++ copy->algonum = locator->algonum; ++ copy->current = locator->current; ++ copy->status_up = locator->status_up; ++ copy->flags = locator->flags; ++} ++ + void srv6_locator_free(struct srv6_locator *locator) + { + if (locator) { +@@ -152,6 +170,59 @@ void srv6_locator_chunk_free(struct srv6_locator_chunk **chunk) + XFREE(MTYPE_SRV6_LOCATOR_CHUNK, *chunk); + } + ++struct srv6_sid_format *srv6_sid_format_alloc(const char *name) ++{ ++ struct srv6_sid_format *format = NULL; ++ ++ format = XCALLOC(MTYPE_SRV6_SID_FORMAT, sizeof(struct srv6_sid_format)); ++ strlcpy(format->name, name, sizeof(format->name)); ++ ++ QOBJ_REG(format, srv6_sid_format); ++ return format; ++} ++ ++void srv6_sid_format_free(struct srv6_sid_format *format) ++{ ++ if (!format) ++ return; ++ ++ QOBJ_UNREG(format); ++ XFREE(MTYPE_SRV6_SID_FORMAT, format); ++} ++ ++/** ++ * Free an SRv6 SID format. ++ * ++ * @param val SRv6 SID format to be freed ++ */ ++void delete_srv6_sid_format(void *val) ++{ ++ srv6_sid_format_free((struct srv6_sid_format *)val); ++} ++ ++struct srv6_sid_ctx *srv6_sid_ctx_alloc(enum seg6local_action_t behavior, ++ struct in_addr *nh4, ++ struct in6_addr *nh6, vrf_id_t vrf_id) ++{ ++ struct srv6_sid_ctx *ctx = NULL; ++ ++ ctx = XCALLOC(MTYPE_SRV6_SID_CTX, sizeof(struct srv6_sid_ctx)); ++ ctx->behavior = behavior; ++ if (nh4) ++ ctx->nh4 = *nh4; ++ if (nh6) ++ ctx->nh6 = *nh6; ++ if (vrf_id) ++ ctx->vrf_id = vrf_id; ++ ++ return ctx; ++} ++ ++void srv6_sid_ctx_free(struct srv6_sid_ctx *ctx) ++{ ++ XFREE(MTYPE_SRV6_SID_CTX, ctx); ++} ++ + json_object *srv6_locator_chunk_json(const struct srv6_locator_chunk *chunk) + { + json_object *jo_root = NULL; +@@ -221,23 +292,47 @@ json_object *srv6_locator_json(const struct srv6_locator *loc) + /* set prefix */ + json_object_string_addf(jo_root, "prefix", "%pFX", &loc->prefix); + +- /* set block_bits_length */ +- json_object_int_add(jo_root, "blockBitsLength", loc->block_bits_length); +- +- /* set node_bits_length */ +- json_object_int_add(jo_root, "nodeBitsLength", loc->node_bits_length); +- +- /* set function_bits_length */ +- json_object_int_add(jo_root, "functionBitsLength", +- loc->function_bits_length); +- +- /* set argument_bits_length */ +- json_object_int_add(jo_root, "argumentBitsLength", +- loc->argument_bits_length); +- +- /* set true if the locator is a Micro-segment (uSID) locator */ +- if (CHECK_FLAG(loc->flags, SRV6_LOCATOR_USID)) +- json_object_string_add(jo_root, "behavior", "usid"); ++ if (loc->sid_format) { ++ /* set block_bits_length */ ++ json_object_int_add(jo_root, "blockBitsLength", ++ loc->sid_format->block_len); ++ ++ /* set node_bits_length */ ++ json_object_int_add(jo_root, "nodeBitsLength", ++ loc->sid_format->node_len); ++ ++ /* set function_bits_length */ ++ json_object_int_add(jo_root, "functionBitsLength", ++ loc->sid_format->function_len); ++ ++ /* set argument_bits_length */ ++ json_object_int_add(jo_root, "argumentBitsLength", ++ loc->sid_format->argument_len); ++ ++ /* set true if the locator is a Micro-segment (uSID) locator */ ++ if (loc->sid_format->type == SRV6_SID_FORMAT_TYPE_USID) ++ json_object_string_add(jo_root, "behavior", "usid"); ++ } else { ++ /* set block_bits_length */ ++ json_object_int_add(jo_root, "blockBitsLength", ++ loc->block_bits_length); ++ ++ /* set node_bits_length */ ++ json_object_int_add(jo_root, "nodeBitsLength", ++ loc->node_bits_length); ++ ++ /* set function_bits_length */ ++ json_object_int_add(jo_root, "functionBitsLength", ++ loc->function_bits_length); ++ ++ /* set argument_bits_length */ ++ json_object_int_add(jo_root, "argumentBitsLength", ++ loc->argument_bits_length); ++ ++ /* set true if the locator is a Micro-segment (uSID) locator */ ++ if (CHECK_FLAG(loc->flags, SRV6_LOCATOR_USID)) ++ json_object_string_add(jo_root, "behavior", "usid"); ++ } + + /* set status_up */ + json_object_boolean_add(jo_root, "statusUp", +@@ -270,23 +365,47 @@ json_object *srv6_locator_detailed_json(const struct srv6_locator *loc) + /* set prefix */ + json_object_string_addf(jo_root, "prefix", "%pFX", &loc->prefix); + +- /* set block_bits_length */ +- json_object_int_add(jo_root, "blockBitsLength", loc->block_bits_length); +- +- /* set node_bits_length */ +- json_object_int_add(jo_root, "nodeBitsLength", loc->node_bits_length); +- +- /* set function_bits_length */ +- json_object_int_add(jo_root, "functionBitsLength", +- loc->function_bits_length); +- +- /* set argument_bits_length */ +- json_object_int_add(jo_root, "argumentBitsLength", +- loc->argument_bits_length); +- +- /* set true if the locator is a Micro-segment (uSID) locator */ +- if (CHECK_FLAG(loc->flags, SRV6_LOCATOR_USID)) +- json_object_string_add(jo_root, "behavior", "usid"); ++ if (loc->sid_format) { ++ /* set block_bits_length */ ++ json_object_int_add(jo_root, "blockBitsLength", ++ loc->sid_format->block_len); ++ ++ /* set node_bits_length */ ++ json_object_int_add(jo_root, "nodeBitsLength", ++ loc->sid_format->node_len); ++ ++ /* set function_bits_length */ ++ json_object_int_add(jo_root, "functionBitsLength", ++ loc->sid_format->function_len); ++ ++ /* set argument_bits_length */ ++ json_object_int_add(jo_root, "argumentBitsLength", ++ loc->sid_format->argument_len); ++ ++ /* set true if the locator is a Micro-segment (uSID) locator */ ++ if (loc->sid_format->type == SRV6_SID_FORMAT_TYPE_USID) ++ json_object_string_add(jo_root, "behavior", "usid"); ++ } else { ++ /* set block_bits_length */ ++ json_object_int_add(jo_root, "blockBitsLength", ++ loc->block_bits_length); ++ ++ /* set node_bits_length */ ++ json_object_int_add(jo_root, "nodeBitsLength", ++ loc->node_bits_length); ++ ++ /* set function_bits_length */ ++ json_object_int_add(jo_root, "functionBitsLength", ++ loc->function_bits_length); ++ ++ /* set argument_bits_length */ ++ json_object_int_add(jo_root, "argumentBitsLength", ++ loc->argument_bits_length); ++ ++ /* set true if the locator is a Micro-segment (uSID) locator */ ++ if (CHECK_FLAG(loc->flags, SRV6_LOCATOR_USID)) ++ json_object_string_add(jo_root, "behavior", "usid"); ++ } + + /* set algonum */ + json_object_int_add(jo_root, "algoNum", loc->algonum); +diff --git a/lib/srv6.h b/lib/srv6.h +index 53f5119aa..225bdf3ad 100644 +--- a/lib/srv6.h ++++ b/lib/srv6.h +@@ -20,6 +20,8 @@ + #define SRH_BASE_HEADER_LENGTH 8 + #define SRH_SEGMENT_LENGTH 16 + ++#define SRV6_SID_FORMAT_NAME_SIZE 512 ++ + #ifdef __cplusplus + extern "C" { + #endif +@@ -131,6 +133,12 @@ struct srv6_locator { + uint8_t flags; + #define SRV6_LOCATOR_USID (1 << 0) /* The SRv6 Locator is a uSID Locator */ + ++ /* Pointer to the SID format. */ ++ struct srv6_sid_format *sid_format; ++ ++ /* Pointer to the parent SID block of the locator. */ ++ void *sid_block; ++ + QOBJ_FIELDS; + }; + DECLARE_QOBJ_TYPE(srv6_locator); +@@ -187,6 +195,72 @@ struct nexthop_srv6 { + struct seg6_seg_stack *seg6_segs; + }; + ++/* SID format type */ ++enum srv6_sid_format_type { ++ SRV6_SID_FORMAT_TYPE_UNSPEC = 0, ++ /* SRv6 SID uncompressed format */ ++ SRV6_SID_FORMAT_TYPE_UNCOMPRESSED = 1, ++ /* SRv6 SID compressed uSID format */ ++ SRV6_SID_FORMAT_TYPE_USID = 2, ++}; ++ ++/* SRv6 SID format */ ++struct srv6_sid_format { ++ /* Name of the format */ ++ char name[SRV6_SID_FORMAT_NAME_SIZE]; ++ ++ /* Format type: uncompressed vs compressed */ ++ enum srv6_sid_format_type type; ++ ++ /* ++ * Lengths of block/node/function/argument parts of the SIDs allocated ++ * using this format ++ */ ++ uint8_t block_len; ++ uint8_t node_len; ++ uint8_t function_len; ++ uint8_t argument_len; ++ ++ union { ++ /* Configuration settings for compressed uSID format type */ ++ struct { ++ /* Start of the Local ID Block (LIB) range */ ++ uint32_t lib_start; ++ ++ /* Start/End of the Explicit LIB range */ ++ uint32_t elib_start; ++ uint32_t elib_end; ++ ++ /* Start/End of the Wide LIB range */ ++ uint32_t wlib_start; ++ uint32_t wlib_end; ++ ++ /* Start/End of the Explicit Wide LIB range */ ++ uint32_t ewlib_start; ++ } usid; ++ ++ /* Configuration settings for uncompressed format type */ ++ struct { ++ /* Start of the Explicit range */ ++ uint32_t explicit_start; ++ } uncompressed; ++ } config; ++ ++ QOBJ_FIELDS; ++}; ++DECLARE_QOBJ_TYPE(srv6_sid_format); ++ ++/* Context for an SRv6 SID */ ++struct srv6_sid_ctx { ++ /* Behavior associated with the SID */ ++ enum seg6local_action_t behavior; ++ ++ /* Behavior-specific attributes */ ++ struct in_addr nh4; ++ struct in6_addr nh6; ++ vrf_id_t vrf_id; ++}; ++ + static inline const char *seg6_mode2str(enum seg6_mode_t mode) + { + switch (mode) { +@@ -250,6 +324,54 @@ const char *seg6local_context2str(char *str, size_t size, + const struct seg6local_context *ctx, + uint32_t action); + ++static inline const char *srv6_sid_ctx2str(char *str, size_t size, ++ const struct srv6_sid_ctx *ctx) ++{ ++ int len = 0; ++ ++ len += snprintf(str + len, size - len, "%s", ++ seg6local_action2str(ctx->behavior)); ++ ++ switch (ctx->behavior) { ++ case ZEBRA_SEG6_LOCAL_ACTION_UNSPEC: ++ break; ++ ++ case ZEBRA_SEG6_LOCAL_ACTION_END: ++ len += snprintf(str + len, size - len, " USP"); ++ break; ++ ++ case ZEBRA_SEG6_LOCAL_ACTION_END_X: ++ case ZEBRA_SEG6_LOCAL_ACTION_END_DX6: ++ len += snprintfrr(str + len, size - len, " nh6 %pI6", &ctx->nh6); ++ break; ++ ++ case ZEBRA_SEG6_LOCAL_ACTION_END_DX4: ++ len += snprintfrr(str + len, size - len, " nh4 %pI4", &ctx->nh4); ++ break; ++ ++ case ZEBRA_SEG6_LOCAL_ACTION_END_T: ++ case ZEBRA_SEG6_LOCAL_ACTION_END_DT6: ++ case ZEBRA_SEG6_LOCAL_ACTION_END_DT4: ++ case ZEBRA_SEG6_LOCAL_ACTION_END_DT46: ++ len += snprintf(str + len, size - len, " vrf_id %u", ++ ctx->vrf_id); ++ break; ++ ++ case ZEBRA_SEG6_LOCAL_ACTION_END_DX2: ++ case ZEBRA_SEG6_LOCAL_ACTION_END_B6: ++ case ZEBRA_SEG6_LOCAL_ACTION_END_B6_ENCAP: ++ case ZEBRA_SEG6_LOCAL_ACTION_END_BM: ++ case ZEBRA_SEG6_LOCAL_ACTION_END_S: ++ case ZEBRA_SEG6_LOCAL_ACTION_END_AS: ++ case ZEBRA_SEG6_LOCAL_ACTION_END_AM: ++ case ZEBRA_SEG6_LOCAL_ACTION_END_BPF: ++ default: ++ len += snprintf(str + len, size - len, " unknown(%s)", __func__); ++ } ++ ++ return str; ++} ++ + int snprintf_seg6_segs(char *str, + size_t size, const struct seg6_segs *segs); + +@@ -258,12 +380,24 @@ extern struct srv6_locator_chunk *srv6_locator_chunk_alloc(void); + extern void srv6_locator_free(struct srv6_locator *locator); + extern void srv6_locator_chunk_list_free(void *data); + extern void srv6_locator_chunk_free(struct srv6_locator_chunk **chunk); ++extern void srv6_locator_copy(struct srv6_locator *copy, ++ const struct srv6_locator *locator); + json_object *srv6_locator_chunk_json(const struct srv6_locator_chunk *chunk); + json_object *srv6_locator_json(const struct srv6_locator *loc); + json_object *srv6_locator_detailed_json(const struct srv6_locator *loc); + json_object * + srv6_locator_chunk_detailed_json(const struct srv6_locator_chunk *chunk); + ++extern struct srv6_sid_format *srv6_sid_format_alloc(const char *name); ++extern void srv6_sid_format_free(struct srv6_sid_format *format); ++extern void delete_srv6_sid_format(void *format); ++ ++extern struct srv6_sid_ctx *srv6_sid_ctx_alloc(enum seg6local_action_t behavior, ++ struct in_addr *nh4, ++ struct in6_addr *nh6, ++ vrf_id_t vrf_id); ++extern void srv6_sid_ctx_free(struct srv6_sid_ctx *ctx); ++ + #ifdef __cplusplus + } + #endif +diff --git a/lib/zclient.c b/lib/zclient.c +index 269c3e9ba..462a4362a 100644 +--- a/lib/zclient.c ++++ b/lib/zclient.c +@@ -1125,6 +1125,10 @@ int zapi_srv6_locator_encode(struct stream *s, const struct srv6_locator *l) + stream_put(s, l->name, strlen(l->name)); + stream_putw(s, l->prefix.prefixlen); + stream_put(s, &l->prefix.prefix, sizeof(l->prefix.prefix)); ++ stream_putc(s, l->block_bits_length); ++ stream_putc(s, l->node_bits_length); ++ stream_putc(s, l->function_bits_length); ++ stream_putc(s, l->argument_bits_length); + stream_putc(s, l->flags); + return 0; + } +@@ -1141,6 +1145,10 @@ int zapi_srv6_locator_decode(struct stream *s, struct srv6_locator *l) + STREAM_GETW(s, l->prefix.prefixlen); + STREAM_GET(&l->prefix.prefix, s, sizeof(l->prefix.prefix)); + l->prefix.family = AF_INET6; ++ STREAM_GETC(s, l->block_bits_length); ++ STREAM_GETC(s, l->node_bits_length); ++ STREAM_GETC(s, l->function_bits_length); ++ STREAM_GETC(s, l->argument_bits_length); + STREAM_GETC(s, l->flags); + return 0; + +@@ -2125,6 +2133,46 @@ stream_failure: + return false; + } + ++bool zapi_srv6_sid_notify_decode(struct stream *s, struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value, uint32_t *func, ++ uint32_t *wide_func, ++ enum zapi_srv6_sid_notify *note, ++ char **p_locator_name) ++{ ++ uint32_t f, wf; ++ uint16_t len; ++ static char locator_name[SRV6_LOCNAME_SIZE] = {}; ++ ++ STREAM_GET(note, s, sizeof(*note)); ++ STREAM_GET(ctx, s, sizeof(struct srv6_sid_ctx)); ++ STREAM_GET(sid_value, s, sizeof(struct in6_addr)); ++ STREAM_GETL(s, f); ++ STREAM_GETL(s, wf); ++ ++ if (func) ++ *func = f; ++ if (wide_func) ++ *wide_func = wf; ++ ++ STREAM_GETW(s, len); ++ if (len > SRV6_LOCNAME_SIZE) { ++ *p_locator_name = NULL; ++ return false; ++ } ++ if (p_locator_name) { ++ if (len == 0) ++ *p_locator_name = NULL; ++ else { ++ STREAM_GET(locator_name, s, len); ++ *p_locator_name = locator_name; ++ } ++ } ++ return true; ++ ++stream_failure: ++ return false; ++} ++ + struct nexthop *nexthop_from_zapi_nexthop(const struct zapi_nexthop *znh) + { + struct nexthop *n = nexthop_new(); +@@ -3267,10 +3315,154 @@ int srv6_manager_release_locator_chunk(struct zclient *zclient, + return zclient_send_message(zclient); + } + ++/** ++ * Function to request a SRv6 locator in an asynchronous way ++ * ++ * @param zclient The zclient used to connect to SRv6 Manager (zebra) ++ * @param locator_name Name of SRv6 locator ++ * @return 0 on success, -1 otherwise ++ */ ++int srv6_manager_get_locator(struct zclient *zclient, const char *locator_name) ++{ ++ struct stream *s; ++ size_t len; ++ ++ if (!locator_name) ++ return -1; ++ ++ if (zclient->sock < 0) { ++ flog_err(EC_LIB_ZAPI_SOCKET, "%s: invalid zclient socket", ++ __func__); ++ return -1; ++ } ++ ++ if (zclient_debug) ++ zlog_debug("Getting SRv6 Locator %s", locator_name); ++ ++ len = strlen(locator_name); ++ ++ /* Send request */ ++ s = zclient->obuf; ++ stream_reset(s); ++ zclient_create_header(s, ZEBRA_SRV6_MANAGER_GET_LOCATOR, VRF_DEFAULT); ++ ++ /* Locator name */ ++ stream_putw(s, len); ++ stream_put(s, locator_name, len); ++ ++ /* Put length at the first point of the stream. */ ++ stream_putw_at(s, 0, stream_get_endp(s)); ++ ++ return zclient_send_message(zclient); ++} ++ ++/** ++ * Function to request an SRv6 SID in an asynchronous way ++ * ++ * @param zclient The zclient used to connect to SRv6 manager (zebra) ++ * @param ctx Context associated with the SRv6 SID ++ * @param sid_value SRv6 SID value for explicit SID allocation ++ * @param locator_name Name of the parent locator for dynamic SID allocation ++ * @param sid_func SID function assigned by the SRv6 Manager ++ * @result 0 on success, -1 otherwise ++ */ ++int srv6_manager_get_sid(struct zclient *zclient, const struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value, const char *locator_name, ++ uint32_t *sid_func) ++{ ++ struct stream *s; ++ uint8_t flags = 0; ++ size_t len; ++ char buf[256]; ++ ++ if (zclient->sock < 0) { ++ flog_err(EC_LIB_ZAPI_SOCKET, "%s: invalid zclient socket", ++ __func__); ++ return ZCLIENT_SEND_FAILURE; ++ } ++ ++ if (zclient_debug) ++ zlog_debug("Getting SRv6 SID: %s", ++ srv6_sid_ctx2str(buf, sizeof(buf), ctx)); ++ ++ /* send request */ ++ s = zclient->obuf; ++ stream_reset(s); ++ ++ zclient_create_header(s, ZEBRA_SRV6_MANAGER_GET_SRV6_SID, VRF_DEFAULT); ++ ++ /* Context associated with the SRv6 SID */ ++ stream_put(s, ctx, sizeof(struct srv6_sid_ctx)); ++ ++ /* Flags */ ++ if (!sid_zero_ipv6(sid_value)) ++ SET_FLAG(flags, ZAPI_SRV6_MANAGER_SID_FLAG_HAS_SID_VALUE); ++ if (locator_name) ++ SET_FLAG(flags, ZAPI_SRV6_MANAGER_SID_FLAG_HAS_LOCATOR); ++ stream_putc(s, flags); ++ ++ /* SRv6 SID value */ ++ if (CHECK_FLAG(flags, ZAPI_SRV6_MANAGER_SID_FLAG_HAS_SID_VALUE)) ++ stream_put(s, sid_value, sizeof(struct in6_addr)); ++ ++ /* SRv6 locator */ ++ if (CHECK_FLAG(flags, ZAPI_SRV6_MANAGER_SID_FLAG_HAS_LOCATOR)) { ++ len = strlen(locator_name); ++ stream_putw(s, len); ++ stream_put(s, locator_name, len); ++ } ++ ++ /* Put length at the first point of the stream. */ ++ stream_putw_at(s, 0, stream_get_endp(s)); ++ ++ /* Send the request to SRv6 Manager */ ++ return zclient_send_message(zclient); ++} ++ ++/** ++ * Function to release an SRv6 SID ++ * ++ * @param zclient Zclient used to connect to SRv6 manager (zebra) ++ * @param ctx Context associated with the SRv6 SID to be removed ++ * @result 0 on success, -1 otherwise ++ */ ++int srv6_manager_release_sid(struct zclient *zclient, ++ const struct srv6_sid_ctx *ctx) ++{ ++ struct stream *s; ++ char buf[256]; ++ ++ if (zclient->sock < 0) { ++ flog_err(EC_LIB_ZAPI_SOCKET, "%s: invalid zclient socket", ++ __func__); ++ return -1; ++ } ++ ++ if (zclient_debug) ++ zlog_debug("Releasing SRv6 SID: %s", ++ srv6_sid_ctx2str(buf, sizeof(buf), ctx)); ++ ++ /* send request */ ++ s = zclient->obuf; ++ stream_reset(s); ++ ++ zclient_create_header(s, ZEBRA_SRV6_MANAGER_RELEASE_SRV6_SID, ++ VRF_DEFAULT); ++ ++ /* Context associated with the SRv6 SID */ ++ stream_put(s, ctx, sizeof(struct srv6_sid_ctx)); ++ ++ /* Put length at the first point of the stream. */ ++ stream_putw_at(s, 0, stream_get_endp(s)); ++ ++ /* Send the SID release message */ ++ return zclient_send_message(zclient); ++} ++ + /* + * Asynchronous label chunk request + * +- * @param zclient Zclient used to connect to label manager (zebra) ++ * @param zclient The zclient used to connect to label manager (zebra) + * @param keep Avoid garbage collection + * @param chunk_size Amount of labels requested + * @param base Base for the label chunk. if MPLS_LABEL_BASE_ANY we do not care +diff --git a/lib/zclient.h b/lib/zclient.h +index 1bf91064e..d2dba15a6 100644 +--- a/lib/zclient.h ++++ b/lib/zclient.h +@@ -209,6 +209,9 @@ typedef enum { + ZEBRA_SRV6_LOCATOR_DELETE, + ZEBRA_SRV6_MANAGER_GET_LOCATOR_CHUNK, + ZEBRA_SRV6_MANAGER_RELEASE_LOCATOR_CHUNK, ++ ZEBRA_SRV6_MANAGER_GET_LOCATOR, ++ ZEBRA_SRV6_MANAGER_GET_SRV6_SID, ++ ZEBRA_SRV6_MANAGER_RELEASE_SRV6_SID, + ZEBRA_ERROR, + ZEBRA_CLIENT_CAPABILITIES, + ZEBRA_OPAQUE_MESSAGE, +@@ -235,6 +238,7 @@ typedef enum { + ZEBRA_TC_FILTER_ADD, + ZEBRA_TC_FILTER_DELETE, + ZEBRA_OPAQUE_NOTIFY, ++ ZEBRA_SRV6_SID_NOTIFY, + } zebra_message_types_t; + /* Zebra message types. Please update the corresponding + * command_types array with any changes! +@@ -761,6 +765,13 @@ enum zapi_iptable_notify_owner { + ZAPI_IPTABLE_FAIL_REMOVE, + }; + ++enum zapi_srv6_sid_notify { ++ ZAPI_SRV6_SID_FAIL_ALLOC = 0, ++ ZAPI_SRV6_SID_ALLOCATED, ++ ZAPI_SRV6_SID_RELEASED, ++ ZAPI_SRV6_SID_FAIL_RELEASE, ++}; ++ + enum zclient_send_status { + ZCLIENT_SEND_FAILURE = -1, + ZCLIENT_SEND_SUCCESS = 0, +@@ -813,6 +824,28 @@ zapi_rule_notify_owner2str(enum zapi_rule_notify_owner note) + return ret; + } + ++static inline const char *zapi_srv6_sid_notify2str(enum zapi_srv6_sid_notify note) ++{ ++ const char *ret = "UNKNOWN"; ++ ++ switch (note) { ++ case ZAPI_SRV6_SID_FAIL_ALLOC: ++ ret = "ZAPI_SRV6_SID_FAIL_ALLOC"; ++ break; ++ case ZAPI_SRV6_SID_ALLOCATED: ++ ret = "ZAPI_SRV6_SID_ALLOCATED"; ++ break; ++ case ZAPI_SRV6_SID_FAIL_RELEASE: ++ ret = "ZAPI_SRV6_SID_FAIL_RELEASE"; ++ break; ++ case ZAPI_SRV6_SID_RELEASED: ++ ret = "ZAPI_SRV6_SID_RELEASED"; ++ break; ++ } ++ ++ return ret; ++} ++ + /* Zebra MAC types */ + #define ZEBRA_MACIP_TYPE_STICKY 0x01 /* Sticky MAC*/ + #define ZEBRA_MACIP_TYPE_GW 0x02 /* gateway (SVI) mac*/ +@@ -1070,10 +1103,23 @@ extern int tm_get_table_chunk(struct zclient *zclient, uint32_t chunk_size, + uint32_t *start, uint32_t *end); + extern int tm_release_table_chunk(struct zclient *zclient, uint32_t start, + uint32_t end); ++ ++/* Zebra SRv6 Manager flags */ ++#define ZAPI_SRV6_MANAGER_SID_FLAG_HAS_SID_VALUE 0x01 ++#define ZAPI_SRV6_MANAGER_SID_FLAG_HAS_LOCATOR 0x02 ++ + extern int srv6_manager_get_locator_chunk(struct zclient *zclient, + const char *locator_name); + extern int srv6_manager_release_locator_chunk(struct zclient *zclient, + const char *locator_name); ++extern int srv6_manager_get_locator(struct zclient *zclient, ++ const char *locator_name); ++extern int srv6_manager_get_sid(struct zclient *zclient, ++ const struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value, ++ const char *locator_name, uint32_t *sid_func); ++extern int srv6_manager_release_sid(struct zclient *zclient, ++ const struct srv6_sid_ctx *ctx); + + extern enum zclient_send_status zebra_send_sr_policy(struct zclient *zclient, + int cmd, +@@ -1128,6 +1174,11 @@ bool zapi_rule_notify_decode(struct stream *s, uint32_t *seqno, + bool zapi_ipset_notify_decode(struct stream *s, + uint32_t *unique, + enum zapi_ipset_notify_owner *note); ++bool zapi_srv6_sid_notify_decode(struct stream *s, struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value, uint32_t *func, ++ uint32_t *wide_func, ++ enum zapi_srv6_sid_notify *note, ++ char **locator_name); + + /* Nexthop-group message apis */ + extern enum zclient_send_status +diff --git a/vtysh/vtysh.c b/vtysh/vtysh.c +index 12d22b1fc..a6dcd7647 100644 +--- a/vtysh/vtysh.c ++++ b/vtysh/vtysh.c +@@ -1345,6 +1345,27 @@ static struct cmd_node srv6_encap_node = { + .prompt = "%s(config-srv6-encap)# " + }; + ++static struct cmd_node srv6_sid_formats_node = { ++ .name = "srv6-formats", ++ .node = SRV6_SID_FORMATS_NODE, ++ .parent_node = SRV6_NODE, ++ .prompt = "%s(config-srv6-formats)# ", ++}; ++ ++static struct cmd_node srv6_sid_format_usid_f3216_node = { ++ .name = "srv6-format-usid-f3216", ++ .node = SRV6_SID_FORMAT_USID_F3216_NODE, ++ .parent_node = SRV6_SID_FORMATS_NODE, ++ .prompt = "%s(config-srv6-format)# " ++}; ++ ++static struct cmd_node srv6_sid_format_uncompressed_f4024_node = { ++ .name = "srv6-format-uncompressed-f4024", ++ .node = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE, ++ .parent_node = SRV6_SID_FORMATS_NODE, ++ .prompt = "%s(config-srv6-format)# " ++}; ++ + #ifdef HAVE_PBRD + static struct cmd_node pbr_map_node = { + .name = "pbr-map", +@@ -1716,6 +1737,31 @@ DEFUNSH(VTYSH_ZEBRA, srv6_encap, srv6_encap_cmd, + return CMD_SUCCESS; + } + ++DEFUNSH(VTYSH_ZEBRA, srv6_sid_formats, srv6_sid_formats_cmd, "formats", ++ "Segment Routing SRv6 SID formats\n") ++{ ++ vty->node = SRV6_SID_FORMATS_NODE; ++ return CMD_SUCCESS; ++} ++ ++DEFUNSH(VTYSH_ZEBRA, srv6_sid_format_f3216_usid, srv6_sid_format_f3216_usid_cmd, ++ "format usid-f3216", ++ "Configure SRv6 SID format\n" ++ "Configure the uSID f3216 format\n") ++{ ++ vty->node = SRV6_SID_FORMAT_USID_F3216_NODE; ++ return CMD_SUCCESS; ++} ++ ++DEFUNSH(VTYSH_ZEBRA, srv6_sid_format_f4024_uncompressed, srv6_sid_format_f4024_uncompressed_cmd, ++ "format uncompressed-f4024", ++ "Configure SRv6 SID format\n" ++ "Configure the uncompressed f4024 format\n") ++{ ++ vty->node = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE; ++ return CMD_SUCCESS; ++} ++ + #ifdef HAVE_BGPD + DEFUNSH(VTYSH_BGPD, router_bgp, router_bgp_cmd, + "router bgp [ASNUM [ VIEWVRFNAME] [as-notation ]]", +@@ -2516,6 +2562,23 @@ DEFUNSH(VTYSH_ZEBRA, exit_srv6_encap, exit_srv6_encap_cmd, "exit", + return CMD_SUCCESS; + } + ++DEFUNSH(VTYSH_ZEBRA, exit_srv6_sid_formats, exit_srv6_sid_formats_cmd, "exit", ++ "Exit from SRv6 SID formats configuration mode\n") ++{ ++ if (vty->node == SRV6_SID_FORMATS_NODE) ++ vty->node = SRV6_NODE; ++ return CMD_SUCCESS; ++} ++ ++DEFUNSH(VTYSH_ZEBRA, exit_srv6_sid_format, exit_srv6_sid_format_cmd, ++ "exit", "Exit from SRv6 SID format configuration mode\n") ++{ ++ if (vty->node == SRV6_SID_FORMAT_USID_F3216_NODE || ++ vty->node == SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE) ++ vty->node = SRV6_SID_FORMATS_NODE; ++ return CMD_SUCCESS; ++} ++ + #ifdef HAVE_RIPD + DEFUNSH(VTYSH_MGMTD, vtysh_exit_ripd, vtysh_exit_ripd_cmd, "exit", + "Exit current mode and down to previous mode\n") +@@ -5117,6 +5180,7 @@ void vtysh_init_vty(void) + install_node(&srv6_node); + install_element(SEGMENT_ROUTING_NODE, &srv6_cmd); + install_element(SRV6_NODE, &srv6_locators_cmd); ++ install_element(SRV6_NODE, &srv6_sid_formats_cmd); + install_element(SRV6_NODE, &exit_srv6_config_cmd); + install_element(SRV6_NODE, &vtysh_end_all_cmd); + install_element(SRV6_NODE, &srv6_encap_cmd); +@@ -5134,6 +5198,24 @@ void vtysh_init_vty(void) + install_element(SRV6_ENCAP_NODE, &exit_srv6_encap_cmd); + install_element(SRV6_ENCAP_NODE, &vtysh_end_all_cmd); + ++ install_node(&srv6_sid_formats_node); ++ install_element(SRV6_SID_FORMATS_NODE, &srv6_sid_format_f3216_usid_cmd); ++ install_element(SRV6_SID_FORMATS_NODE, ++ &srv6_sid_format_f4024_uncompressed_cmd); ++ install_element(SRV6_SID_FORMATS_NODE, &exit_srv6_sid_formats_cmd); ++ install_element(SRV6_SID_FORMATS_NODE, &vtysh_end_all_cmd); ++ ++ install_node(&srv6_sid_format_usid_f3216_node); ++ install_element(SRV6_SID_FORMAT_USID_F3216_NODE, ++ &exit_srv6_sid_format_cmd); ++ install_element(SRV6_SID_FORMAT_USID_F3216_NODE, &vtysh_end_all_cmd); ++ ++ install_node(&srv6_sid_format_uncompressed_f4024_node); ++ install_element(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE, ++ &exit_srv6_sid_format_cmd); ++ install_element(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE, ++ &vtysh_end_all_cmd); ++ + install_element(ENABLE_NODE, &vtysh_show_running_config_cmd); + install_element(ENABLE_NODE, &vtysh_copy_running_config_cmd); + install_element(ENABLE_NODE, &vtysh_copy_to_running_cmd); +diff --git a/zebra/zapi_msg.c b/zebra/zapi_msg.c +index 9ae8333d6..305faaa09 100644 +--- a/zebra/zapi_msg.c ++++ b/zebra/zapi_msg.c +@@ -999,6 +999,48 @@ void zsend_neighbor_notify(int cmd, struct interface *ifp, + } + } + ++void zsend_srv6_sid_notify(struct zserv *client, const struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value, uint32_t func, ++ uint32_t wide_func, const char *locator_name, ++ enum zapi_srv6_sid_notify note) ++ ++{ ++ struct stream *s; ++ uint16_t cmd = ZEBRA_SRV6_SID_NOTIFY; ++ char buf[256]; ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: notifying %s ctx %s sid %pI6 note %s (proto=%u, instance=%u, sessionId=%u)", ++ __func__, zserv_command_string(cmd), ++ srv6_sid_ctx2str(buf, sizeof(buf), ctx), sid_value, ++ zapi_srv6_sid_notify2str(note), client->proto, ++ client->instance, client->session_id); ++ ++ s = stream_new(ZEBRA_MAX_PACKET_SIZ); ++ ++ zclient_create_header(s, cmd, VRF_DEFAULT); ++ /* Notification type (e.g. ZAPI_SRV6_SID_ALLOCATED, ZAPI_SRV6_SID_FAIL_ALLOC, ...) */ ++ stream_put(s, ¬e, sizeof(note)); ++ /* Context associated with the SRv6 SID */ ++ stream_put(s, ctx, sizeof(struct srv6_sid_ctx)); ++ /* SRv6 SID value (i.e. IPv6 address) */ ++ stream_put(s, sid_value, sizeof(struct in6_addr)); ++ /* SRv6 SID function */ ++ stream_putl(s, func); ++ /* SRv6 wide SID function */ ++ stream_putl(s, wide_func); ++ /* SRv6 locator name optional */ ++ if (locator_name) { ++ stream_putw(s, strlen(locator_name)); ++ stream_put(s, locator_name, strlen(locator_name)); ++ } else ++ stream_putw(s, 0); ++ ++ stream_putw_at(s, 0, stream_get_endp(s)); ++ ++ zserv_send_message(client, s); ++} ++ + + /* Router-id is updated. Send ZEBRA_ROUTER_ID_UPDATE to client. */ + int zsend_router_id_update(struct zserv *client, afi_t afi, struct prefix *p, +@@ -1136,9 +1178,25 @@ static int zsend_table_manager_connect_response(struct zserv *client, + int zsend_zebra_srv6_locator_add(struct zserv *client, struct srv6_locator *loc) + { + struct stream *s = stream_new(ZEBRA_MAX_PACKET_SIZ); ++ struct srv6_locator locator = {}; ++ struct srv6_sid_format *format = loc->sid_format; ++ ++ /* ++ * Copy the locator and fill locator block/node/func/arg length from the format ++ * before sending the locator to the zclient ++ */ ++ srv6_locator_copy(&locator, loc); ++ if (format) { ++ locator.block_bits_length = format->block_len; ++ locator.node_bits_length = format->node_len; ++ locator.function_bits_length = format->function_len; ++ locator.argument_bits_length = format->argument_len; ++ if (format->type == SRV6_SID_FORMAT_TYPE_USID) ++ SET_FLAG(locator.flags, SRV6_LOCATOR_USID); ++ } + + zclient_create_header(s, ZEBRA_SRV6_LOCATOR_ADD, VRF_DEFAULT); +- zapi_srv6_locator_encode(s, loc); ++ zapi_srv6_locator_encode(s, &locator); + stream_putw_at(s, 0, stream_get_endp(s)); + + return zserv_send_message(client, s); +@@ -2995,6 +3053,96 @@ stream_failure: + return; + } + ++/** ++ * Handle SRv6 SID request received from a client daemon protocol. ++ * ++ * @param client The client zapi session ++ * @param msg The request message ++ */ ++static void zread_srv6_manager_get_srv6_sid(struct zserv *client, ++ struct stream *msg) ++{ ++ struct stream *s; ++ struct srv6_sid_ctx ctx = {}; ++ struct in6_addr sid_value = {}; ++ struct in6_addr *sid_value_ptr = NULL; ++ char locator[SRV6_LOCNAME_SIZE] = { 0 }; ++ uint16_t len; ++ struct zebra_srv6_sid *sid = NULL; ++ uint8_t flags; ++ ++ /* Get input stream */ ++ s = msg; ++ ++ /* Get data */ ++ STREAM_GET(&ctx, s, sizeof(struct srv6_sid_ctx)); ++ STREAM_GETC(s, flags); ++ if (CHECK_FLAG(flags, ZAPI_SRV6_MANAGER_SID_FLAG_HAS_SID_VALUE)) { ++ STREAM_GET(&sid_value, s, sizeof(struct in6_addr)); ++ sid_value_ptr = &sid_value; ++ } ++ if (CHECK_FLAG(flags, ZAPI_SRV6_MANAGER_SID_FLAG_HAS_LOCATOR)) { ++ STREAM_GETW(s, len); ++ STREAM_GET(locator, s, len); ++ } ++ ++ /* Call hook to get a SID using wrapper */ ++ srv6_manager_get_sid_call(&sid, client, &ctx, sid_value_ptr, locator); ++ ++stream_failure: ++ return; ++} ++ ++/** ++ * Handle SRv6 SID release request received from a client daemon protocol. ++ * ++ * @param client The client zapi session ++ * @param msg The request message ++ */ ++static void zread_srv6_manager_release_srv6_sid(struct zserv *client, ++ struct stream *msg) ++{ ++ struct stream *s; ++ struct srv6_sid_ctx ctx = {}; ++ ++ /* Get input stream */ ++ s = msg; ++ ++ /* Get data */ ++ STREAM_GET(&ctx, s, sizeof(struct srv6_sid_ctx)); ++ ++ /* Call hook to release a SID using wrapper */ ++ srv6_manager_release_sid_call(client, &ctx); ++ ++stream_failure: ++ return; ++} ++ ++/** ++ * Handle SRv6 locator get request received from a client daemon protocol. ++ * ++ * @param client The client zapi session ++ * @param msg The request message ++ */ ++static void zread_srv6_manager_get_locator(struct zserv *client, ++ struct stream *msg) ++{ ++ struct stream *s = msg; ++ uint16_t len; ++ char locator_name[SRV6_LOCNAME_SIZE] = { 0 }; ++ struct srv6_locator *locator = NULL; ++ ++ /* Get data */ ++ STREAM_GETW(s, len); ++ STREAM_GET(locator_name, s, len); ++ ++ /* Call hook to get the locator info using wrapper */ ++ srv6_manager_get_locator_call(&locator, client, locator_name); ++ ++stream_failure: ++ return; ++} ++ + static void zread_srv6_manager_request(ZAPI_HANDLER_ARGS) + { + switch (hdr->command) { +@@ -3006,6 +3154,15 @@ static void zread_srv6_manager_request(ZAPI_HANDLER_ARGS) + zread_srv6_manager_release_locator_chunk(client, msg, + zvrf_id(zvrf)); + break; ++ case ZEBRA_SRV6_MANAGER_GET_SRV6_SID: ++ zread_srv6_manager_get_srv6_sid(client, msg); ++ break; ++ case ZEBRA_SRV6_MANAGER_RELEASE_SRV6_SID: ++ zread_srv6_manager_release_srv6_sid(client, msg); ++ break; ++ case ZEBRA_SRV6_MANAGER_GET_LOCATOR: ++ zread_srv6_manager_get_locator(client, msg); ++ break; + default: + zlog_err("%s: unknown SRv6 Manager command", __func__); + break; +@@ -3954,6 +4111,9 @@ void (*const zserv_handlers[])(ZAPI_HANDLER_ARGS) = { + [ZEBRA_MLAG_FORWARD_MSG] = zebra_mlag_forward_client_msg, + [ZEBRA_SRV6_MANAGER_GET_LOCATOR_CHUNK] = zread_srv6_manager_request, + [ZEBRA_SRV6_MANAGER_RELEASE_LOCATOR_CHUNK] = zread_srv6_manager_request, ++ [ZEBRA_SRV6_MANAGER_GET_SRV6_SID] = zread_srv6_manager_request, ++ [ZEBRA_SRV6_MANAGER_RELEASE_SRV6_SID] = zread_srv6_manager_request, ++ [ZEBRA_SRV6_MANAGER_GET_LOCATOR] = zread_srv6_manager_request, + [ZEBRA_CLIENT_CAPABILITIES] = zread_client_capabilities, + [ZEBRA_NEIGH_DISCOVER] = zread_neigh_discover, + [ZEBRA_NHG_ADD] = zread_nhg_add, +diff --git a/zebra/zapi_msg.h b/zebra/zapi_msg.h +index 43f734d26..9e3ea6fb6 100644 +--- a/zebra/zapi_msg.h ++++ b/zebra/zapi_msg.h +@@ -94,6 +94,11 @@ extern int zsend_sr_policy_notify_status(uint32_t color, + extern void zsend_neighbor_notify(int cmd, struct interface *ifp, + struct ipaddr *ipaddr, int ndm_state, + union sockunion *link_layer_ipv4, int ip_len); ++extern void zsend_srv6_sid_notify(struct zserv *client, ++ const struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value, uint32_t func, ++ uint32_t wide_func, const char *locator_name, ++ enum zapi_srv6_sid_notify note); + + extern int zsend_client_close_notify(struct zserv *client, + struct zserv *closed_client); +@@ -110,6 +115,9 @@ extern int zsend_zebra_srv6_locator_delete(struct zserv *client, + extern int zsend_srv6_manager_get_locator_chunk_response(struct zserv *client, + vrf_id_t vrf_id, struct srv6_locator *loc); + ++extern int zsend_srv6_manager_get_locator_response(struct zserv *client, ++ struct srv6_locator *locator); ++ + #ifdef __cplusplus + } + #endif +diff --git a/zebra/zebra_errors.c b/zebra/zebra_errors.c +index 09b369e23..dcfa37d26 100644 +--- a/zebra/zebra_errors.c ++++ b/zebra/zebra_errors.c +@@ -787,6 +787,18 @@ static struct log_ref ferr_zebra_err[] = { + .suggestion = + "Wait for Zebra to reattempt update.", + }, ++ { ++ .code = EC_ZEBRA_SM_CANNOT_ASSIGN_SID, ++ .title = "SRv6 manager unable to assign SID", ++ .description = "Zebra's SRv6 manager was unable to assign a SID to client.", ++ .suggestion = "Ensure that Zebra has a sufficient SID range available.", ++ }, ++ { ++ .code = EC_ZEBRA_SM_DAEMON_MISMATCH, ++ .title = "Daemon mismatch when releasing SRV6 SIDs", ++ .description = "Zebra noticed a mismatch between a SRv6 SID and a protocol daemon number or instance when releasing unused SRv6 SIDs.", ++ .suggestion = "Ignore this error.", ++ }, + { + .code = END_FERR, + } +diff --git a/zebra/zebra_errors.h b/zebra/zebra_errors.h +index 3ac654bda..84632e1ad 100644 +--- a/zebra/zebra_errors.h ++++ b/zebra/zebra_errors.h +@@ -124,6 +124,8 @@ enum zebra_log_refs { + EC_ZEBRA_GRE_SET_UPDATE, + EC_ZEBRA_SRV6M_UNRELEASED_LOCATOR_CHUNK, + EC_ZEBRA_INTF_UPDATE_FAILURE, ++ EC_ZEBRA_SM_CANNOT_ASSIGN_SID, ++ EC_ZEBRA_SM_DAEMON_MISMATCH, + }; + + void zebra_error_init(void); +diff --git a/zebra/zebra_srv6.c b/zebra/zebra_srv6.c +index bb872ef91..0ca77a497 100644 +--- a/zebra/zebra_srv6.c ++++ b/zebra/zebra_srv6.c +@@ -33,6 +33,16 @@ + + DEFINE_MGROUP(SRV6_MGR, "SRv6 Manager"); + DEFINE_MTYPE_STATIC(SRV6_MGR, SRV6M_CHUNK, "SRv6 Manager Chunk"); ++DEFINE_MTYPE_STATIC(SRV6_MGR, ZEBRA_SRV6_SID_BLOCK, "SRv6 SID block"); ++DEFINE_MTYPE_STATIC(SRV6_MGR, ZEBRA_SRV6_SID_FUNC, "SRv6 SID function"); ++DEFINE_MTYPE_STATIC(SRV6_MGR, ZEBRA_SRV6_USID_WLIB, ++ "SRv6 uSID Wide LIB information"); ++DEFINE_MTYPE_STATIC(SRV6_MGR, ZEBRA_SRV6_SID, "SRv6 SID"); ++DEFINE_MTYPE_STATIC(SRV6_MGR, ZEBRA_SRV6_SID_CTX, "SRv6 SID context"); ++ ++/* Prototypes */ ++static int release_srv6_sid_func_dynamic(struct zebra_srv6_sid_block *block, ++ uint32_t sid_func); + + /* define hooks for the basic API, so that it can be specialized or served + * externally +@@ -55,6 +65,18 @@ DEFINE_HOOK(srv6_manager_release_chunk, + vrf_id_t vrf_id), + (client, locator_name, vrf_id)); + ++DEFINE_HOOK(srv6_manager_get_sid, ++ (struct zebra_srv6_sid **sid, struct zserv *client, ++ struct srv6_sid_ctx *ctx, struct in6_addr *sid_value, ++ const char *locator_name), ++ (sid, client, ctx, sid_value, locator_name)); ++DEFINE_HOOK(srv6_manager_release_sid, ++ (struct zserv *client, struct srv6_sid_ctx *ctx), (client, ctx)); ++DEFINE_HOOK(srv6_manager_get_locator, ++ (struct srv6_locator **locator, struct zserv *client, ++ const char *locator_name), ++ (locator, client, locator_name)); ++ + /* define wrappers to be called in zapi_msg.c (as hooks must be called in + * source file where they were defined) + */ +@@ -85,11 +107,502 @@ int srv6_manager_client_disconnect_cb(struct zserv *client) + return 0; + } + ++ ++void srv6_manager_get_sid_call(struct zebra_srv6_sid **sid, ++ struct zserv *client, struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value, ++ const char *locator_name) ++{ ++ hook_call(srv6_manager_get_sid, sid, client, ctx, sid_value, ++ locator_name); ++} ++ ++void srv6_manager_release_sid_call(struct zserv *client, ++ struct srv6_sid_ctx *ctx) ++{ ++ hook_call(srv6_manager_release_sid, client, ctx); ++} ++ ++void srv6_manager_get_locator_call(struct srv6_locator **locator, ++ struct zserv *client, ++ const char *locator_name) ++{ ++ hook_call(srv6_manager_get_locator, locator, client, locator_name); ++} ++ + static int zebra_srv6_cleanup(struct zserv *client) + { ++ /* Client has disconnected, let's release all the SIDs allocated by it. */ ++ release_daemon_srv6_sids(client); + return 0; + } + ++/* --- Zebra SRv6 SID context management functions -------------------------- */ ++ ++struct zebra_srv6_sid_ctx *zebra_srv6_sid_ctx_alloc(void) ++{ ++ struct zebra_srv6_sid_ctx *ctx = NULL; ++ ++ ctx = XCALLOC(MTYPE_ZEBRA_SRV6_SID_CTX, ++ sizeof(struct zebra_srv6_sid_ctx)); ++ ++ return ctx; ++} ++ ++void zebra_srv6_sid_ctx_free(struct zebra_srv6_sid_ctx *ctx) ++{ ++ XFREE(MTYPE_ZEBRA_SRV6_SID_CTX, ctx); ++} ++ ++/** ++ * Free an SRv6 SID context. ++ * ++ * @param val SRv6 SID context to be freed ++ */ ++void delete_zebra_srv6_sid_ctx(void *val) ++{ ++ zebra_srv6_sid_ctx_free((struct zebra_srv6_sid_ctx *)val); ++} ++ ++/* --- Zebra SRv6 SID format management functions --------------------------- */ ++ ++void srv6_sid_format_register(struct srv6_sid_format *format) ++{ ++ struct zebra_srv6 *srv6 = zebra_srv6_get_default(); ++ ++ /* Ensure that the format is registered only once */ ++ assert(!srv6_sid_format_lookup(format->name)); ++ ++ listnode_add(srv6->sid_formats, format); ++} ++ ++void srv6_sid_format_unregister(struct srv6_sid_format *format) ++{ ++ struct zebra_srv6 *srv6 = zebra_srv6_get_default(); ++ ++ listnode_delete(srv6->sid_formats, format); ++} ++ ++struct srv6_sid_format *srv6_sid_format_lookup(const char *name) ++{ ++ struct zebra_srv6 *srv6 = zebra_srv6_get_default(); ++ struct srv6_sid_format *format; ++ struct listnode *node; ++ ++ for (ALL_LIST_ELEMENTS_RO(srv6->sid_formats, node, format)) ++ if (!strncmp(name, format->name, sizeof(format->name))) ++ return format; ++ ++ return NULL; ++} ++ ++/* ++ * Called to change the SID format of a locator. ++ * ++ * After switching the locator to a different format, the SIDs allocated ++ * from the locator may no longer be valid; we need to notify the ++ * interested zclient that the locator has changed, so that the ++ * zclients can withdraw/uninstall the old SIDs, allocate/advertise/program ++ * the new SIDs. ++ */ ++void zebra_srv6_locator_format_set(struct srv6_locator *locator, ++ struct srv6_sid_format *format) ++{ ++ struct zebra_srv6 *srv6 = zebra_srv6_get_default(); ++ struct zebra_srv6_sid_block *block_old, *block_new; ++ struct prefix_ipv6 block_pfx_new; ++ struct listnode *node, *nnode; ++ struct zebra_srv6_sid_ctx *ctx; ++ ++ if (!locator) ++ return; ++ ++ locator->sid_format = format; ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: Locator %s format has changed, old=%s new=%s", ++ __func__, locator->name, ++ locator->sid_format ? ((struct srv6_sid_format *) ++ locator->sid_format) ++ ->name ++ : NULL, ++ format ? format->name : NULL); ++ ++ /* Notify zclients that the locator is no longer valid */ ++ zebra_notify_srv6_locator_delete(locator); ++ ++ for (ALL_LIST_ELEMENTS(srv6->sids, node, nnode, ctx)) { ++ if (!ctx->sid || ctx->sid->locator != locator) ++ continue; ++ ++ if (ctx->sid) ++ zebra_srv6_sid_free(ctx->sid); ++ ++ listnode_delete(srv6->sids, ctx); ++ zebra_srv6_sid_ctx_free(ctx); ++ } ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: Locator %s format has changed, send SRV6_LOCATOR_DEL notification to zclients", ++ __func__, locator->name); ++ ++ /* Release the current parent block */ ++ block_old = locator->sid_block; ++ if (block_old) { ++ block_old->refcnt--; ++ if (block_old->refcnt == 0) { ++ listnode_delete(srv6->sid_blocks, block_old); ++ zebra_srv6_sid_block_free(block_old); ++ } ++ } ++ locator->sid_block = NULL; ++ ++ block_pfx_new = locator->prefix; ++ if (format) ++ block_pfx_new.prefixlen = format->block_len; ++ else ++ block_pfx_new.prefixlen = locator->block_bits_length; ++ apply_mask(&block_pfx_new); ++ ++ /* Allocate the new parent block */ ++ block_new = zebra_srv6_sid_block_lookup(&block_pfx_new); ++ if (!block_new) { ++ block_new = zebra_srv6_sid_block_alloc(format, &block_pfx_new); ++ listnode_add(srv6->sid_blocks, block_new); ++ } ++ ++ block_new->refcnt++; ++ locator->sid_block = block_new; ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: Locator %s format has changed, send SRV6_LOCATOR_ADD notification to zclients", ++ __func__, locator->name); ++ ++ /* Notify zclients about the updated locator */ ++ zebra_srv6_locator_add(locator); ++} ++ ++/* ++ * Called when a SID format is modified by the user. ++ * ++ * After modifying a SID format, the SIDs that are using that format may no ++ * longer be valid. ++ * This function walks through the list of locators that are using the SID format ++ * and notifies the zclients that the locator has changed, so that the zclients ++ * can withdraw/uninstall the old SIDs, allocate/program/advertise the new SIDs. ++ */ ++void zebra_srv6_sid_format_changed_cb(struct srv6_sid_format *format) ++{ ++ struct zebra_srv6 *srv6 = zebra_srv6_get_default(); ++ struct srv6_locator *locator; ++ struct listnode *node, *nnode; ++ struct zebra_srv6_sid_ctx *ctx; ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: SID format %s has changed. Notifying zclients.", ++ __func__, format->name); ++ ++ for (ALL_LIST_ELEMENTS_RO(srv6->locators, node, locator)) { ++ if (locator->sid_format == format) { ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: Locator %s has changed because its format (%s) has been modified. Notifying zclients.", ++ __func__, locator->name, ++ format->name); ++ ++ /* Notify zclients that the locator is no longer valid */ ++ zebra_notify_srv6_locator_delete(locator); ++ ++ for (ALL_LIST_ELEMENTS(srv6->sids, node, nnode, ctx)) { ++ if (!ctx->sid || ctx->sid->locator != locator) ++ continue; ++ ++ if (ctx->sid) ++ zebra_srv6_sid_free(ctx->sid); ++ ++ listnode_delete(srv6->sids, ctx); ++ zebra_srv6_sid_ctx_free(ctx); ++ } ++ ++ /* Notify zclients about the updated locator */ ++ zebra_notify_srv6_locator_add(locator); ++ } ++ } ++} ++ ++/* ++ * Helper function to create the SRv6 compressed format `usid-f3216`. ++ */ ++static struct srv6_sid_format *create_srv6_sid_format_usid_f3216(void) ++{ ++ struct srv6_sid_format *format = NULL; ++ ++ format = srv6_sid_format_alloc(SRV6_SID_FORMAT_USID_F3216_NAME); ++ ++ format->type = SRV6_SID_FORMAT_TYPE_USID; ++ ++ /* Define block/node/function length */ ++ format->block_len = SRV6_SID_FORMAT_USID_F3216_BLOCK_LEN; ++ format->node_len = SRV6_SID_FORMAT_USID_F3216_NODE_LEN; ++ format->function_len = SRV6_SID_FORMAT_USID_F3216_FUNCTION_LEN; ++ format->argument_len = SRV6_SID_FORMAT_USID_F3216_ARGUMENT_LEN; ++ ++ /* Define the ranges from which the SID function can be allocated */ ++ format->config.usid.lib_start = SRV6_SID_FORMAT_USID_F3216_LIB_START; ++ format->config.usid.elib_start = SRV6_SID_FORMAT_USID_F3216_ELIB_START; ++ format->config.usid.elib_end = SRV6_SID_FORMAT_USID_F3216_ELIB_END; ++ format->config.usid.wlib_start = SRV6_SID_FORMAT_USID_F3216_WLIB_START; ++ format->config.usid.wlib_end = SRV6_SID_FORMAT_USID_F3216_WLIB_END; ++ format->config.usid.ewlib_start = SRV6_SID_FORMAT_USID_F3216_EWLIB_START; ++ ++ return format; ++} ++ ++/* ++ * Helper function to create the SRv6 uncompressed format. ++ */ ++static struct srv6_sid_format *create_srv6_sid_format_uncompressed(void) ++{ ++ struct srv6_sid_format *format = NULL; ++ ++ format = srv6_sid_format_alloc(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME); ++ ++ format->type = SRV6_SID_FORMAT_TYPE_UNCOMPRESSED; ++ ++ /* Define block/node/function length */ ++ format->block_len = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_BLOCK_LEN; ++ format->node_len = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE_LEN; ++ format->function_len = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_FUNCTION_LEN; ++ format->argument_len = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_ARGUMENT_LEN; ++ ++ /* Define the ranges from which the SID function can be allocated */ ++ format->config.uncompressed.explicit_start = ++ SRV6_SID_FORMAT_UNCOMPRESSED_F4024_EXPLICIT_RANGE_START; ++ ++ return format; ++} ++ ++/* --- Zebra SRv6 SID function management functions ---------------------------- */ ++ ++uint32_t *zebra_srv6_sid_func_alloc(uint32_t func) ++{ ++ uint32_t *sid_func_ptr; ++ ++ sid_func_ptr = XCALLOC(MTYPE_ZEBRA_SRV6_SID_FUNC, sizeof(uint32_t)); ++ *sid_func_ptr = func; ++ ++ return sid_func_ptr; ++} ++ ++void zebra_srv6_sid_func_free(uint32_t *func) ++{ ++ XFREE(MTYPE_ZEBRA_SRV6_SID_FUNC, func); ++} ++ ++/** ++ * Free an SRv6 SID function. ++ * ++ * @param val SRv6 SID function to be freed ++ */ ++void delete_zebra_srv6_sid_func(void *val) ++{ ++ zebra_srv6_sid_func_free((uint32_t *)val); ++} ++ ++/* --- Zebra SRv6 SID block management functions ---------------------------- */ ++ ++static struct zebra_srv6_sid_block *zebra_srv6_sid_block_alloc_internal(void) ++{ ++ struct zebra_srv6_sid_block *block = NULL; ++ ++ block = XCALLOC(MTYPE_ZEBRA_SRV6_SID_BLOCK, ++ sizeof(struct zebra_srv6_sid_block)); ++ ++ return block; ++} ++ ++struct zebra_srv6_sid_block * ++zebra_srv6_sid_block_alloc(struct srv6_sid_format *format, ++ struct prefix_ipv6 *prefix) ++{ ++ struct zebra_srv6_sid_block *block; ++ ++ block = zebra_srv6_sid_block_alloc_internal(); ++ block->sid_format = format; ++ block->prefix = *prefix; ++ ++ if (format) { ++ if (format->type == SRV6_SID_FORMAT_TYPE_USID) { ++ uint32_t wlib_start, wlib_end, func; ++ ++ /* Init uSID LIB */ ++ block->u.usid.lib.func_allocated = list_new(); ++ block->u.usid.lib.func_allocated->del = ++ delete_zebra_srv6_sid_func; ++ block->u.usid.lib.func_released = list_new(); ++ block->u.usid.lib.func_released->del = ++ delete_zebra_srv6_sid_func; ++ block->u.usid.lib.first_available_func = ++ format->config.usid.lib_start; ++ ++ /* Init uSID Wide LIB */ ++ wlib_start = block->sid_format->config.usid.wlib_start; ++ wlib_end = block->sid_format->config.usid.wlib_end; ++ block->u.usid.wide_lib = ++ XCALLOC(MTYPE_ZEBRA_SRV6_USID_WLIB, ++ (wlib_end - wlib_start + 1) * ++ sizeof(struct wide_lib)); ++ for (func = 0; func < wlib_end - wlib_start + 1; ++ func++) { ++ block->u.usid.wide_lib[func].func_allocated = ++ list_new(); ++ block->u.usid.wide_lib[func].func_allocated->del = ++ delete_zebra_srv6_sid_func; ++ block->u.usid.wide_lib[func].func_released = ++ list_new(); ++ block->u.usid.wide_lib[func].func_released->del = ++ delete_zebra_srv6_sid_func; ++ block->u.usid.wide_lib[func].func = func; ++ } ++ } else if (format->type == SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) { ++ block->u.uncompressed.func_allocated = list_new(); ++ block->u.uncompressed.func_allocated->del = ++ delete_zebra_srv6_sid_func; ++ block->u.uncompressed.func_released = list_new(); ++ block->u.uncompressed.func_released->del = ++ delete_zebra_srv6_sid_func; ++ block->u.uncompressed.first_available_func = ++ SRV6_SID_FORMAT_UNCOMPRESSED_F4024_FUNC_UNRESERVED_MIN; ++ } else { ++ /* We should never arrive here */ ++ assert(0); ++ } ++ } else { ++ block->u.uncompressed.func_allocated = list_new(); ++ block->u.uncompressed.func_allocated->del = ++ delete_zebra_srv6_sid_func; ++ block->u.uncompressed.func_released = list_new(); ++ block->u.uncompressed.func_released->del = ++ delete_zebra_srv6_sid_func; ++ block->u.uncompressed.first_available_func = 1; ++ } ++ ++ return block; ++} ++ ++void zebra_srv6_sid_block_free(struct zebra_srv6_sid_block *block) ++{ ++ if (block->sid_format) { ++ if (block->sid_format->type == SRV6_SID_FORMAT_TYPE_USID) { ++ uint32_t wlib_start, wlib_end, func; ++ ++ /* Free uSID LIB */ ++ list_delete(&block->u.usid.lib.func_allocated); ++ list_delete(&block->u.usid.lib.func_released); ++ ++ /* Free uSID Wide LIB */ ++ wlib_start = block->sid_format->config.usid.wlib_start; ++ wlib_end = block->sid_format->config.usid.wlib_end; ++ for (func = 0; func < wlib_end - wlib_start + 1; ++ func++) { ++ list_delete(&block->u.usid.wide_lib[func] ++ .func_allocated); ++ list_delete(&block->u.usid.wide_lib[func] ++ .func_released); ++ } ++ XFREE(MTYPE_ZEBRA_SRV6_USID_WLIB, ++ block->u.usid.wide_lib); ++ } else if (block->sid_format->type == ++ SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) { ++ list_delete(&block->u.uncompressed.func_allocated); ++ list_delete(&block->u.uncompressed.func_released); ++ } else { ++ /* We should never arrive here */ ++ assert(0); ++ } ++ } else { ++ list_delete(&block->u.uncompressed.func_allocated); ++ list_delete(&block->u.uncompressed.func_released); ++ } ++ ++ XFREE(MTYPE_ZEBRA_SRV6_SID_BLOCK, block); ++} ++ ++/** ++ * Free an SRv6 SID block. ++ * ++ * @param val SRv6 SID block to be freed ++ */ ++void delete_zebra_srv6_sid_block(void *val) ++{ ++ zebra_srv6_sid_block_free((struct zebra_srv6_sid_block *)val); ++} ++ ++struct zebra_srv6_sid_block * ++zebra_srv6_sid_block_lookup(struct prefix_ipv6 *prefix) ++{ ++ struct zebra_srv6 *srv6 = zebra_srv6_get_default(); ++ struct zebra_srv6_sid_block *block; ++ struct listnode *node; ++ ++ for (ALL_LIST_ELEMENTS_RO(srv6->sid_blocks, node, block)) ++ if (prefix_match(prefix, &block->prefix)) ++ return block; ++ ++ return NULL; ++} ++ ++/* --- Zebra SRv6 SID management functions ---------------------------------- */ ++ ++/** ++ * Alloc and fill an SRv6 SID. ++ * ++ * @param ctx Context associated with the SID to be created ++ * @param sid_value IPv6 address associated with the SID to be created ++ * @param locator Parent locator of the SID to be created ++ * @param sid_block Block from which the SID value has been allocated ++ * @param sid_func Function part of the SID to be created ++ * @param alloc_mode Allocation mode of the Function (dynamic vs explicit) ++ * @return The requested SID ++ */ ++struct zebra_srv6_sid * ++zebra_srv6_sid_alloc(struct zebra_srv6_sid_ctx *ctx, struct in6_addr *sid_value, ++ struct srv6_locator *locator, ++ struct zebra_srv6_sid_block *sid_block, uint32_t sid_func, ++ enum srv6_sid_alloc_mode alloc_mode) ++{ ++ struct zebra_srv6_sid *sid; ++ ++ if (!ctx || !sid_value) ++ return NULL; ++ ++ sid = XCALLOC(MTYPE_ZEBRA_SRV6_SID, sizeof(struct zebra_srv6_sid)); ++ sid->ctx = ctx; ++ sid->value = *sid_value; ++ sid->locator = locator; ++ sid->block = sid_block; ++ sid->func = sid_func; ++ sid->alloc_mode = alloc_mode; ++ sid->client_list = list_new(); ++ ++ return sid; ++} ++ ++void zebra_srv6_sid_free(struct zebra_srv6_sid *sid) ++{ ++ list_delete(&sid->client_list); ++ XFREE(MTYPE_ZEBRA_SRV6_SID, sid); ++} ++ ++/** ++ * Free an SRv6 SID. ++ * ++ * @param val SRv6 SID to be freed ++ */ ++void delete_zebra_srv6_sid(void *val) ++{ ++ zebra_srv6_sid_free((struct zebra_srv6_sid *)val); ++} ++ + void zebra_srv6_locator_add(struct srv6_locator *locator) + { + struct zebra_srv6 *srv6 = zebra_srv6_get_default(); +@@ -121,7 +634,6 @@ void zebra_srv6_locator_add(struct srv6_locator *locator) + void zebra_srv6_locator_delete(struct srv6_locator *locator) + { + struct listnode *n; +- struct srv6_locator_chunk *c; + struct zebra_srv6 *srv6 = zebra_srv6_get_default(); + struct zserv *client; + +@@ -136,18 +648,8 @@ void zebra_srv6_locator_delete(struct srv6_locator *locator) + * by ZEBRA_SRV6_LOCATOR_DELETE, and this notification is sent to the + * owner of each chunk. + */ +- for (ALL_LIST_ELEMENTS_RO((struct list *)locator->chunks, n, c)) { +- if (c->proto == ZEBRA_ROUTE_SYSTEM) +- continue; +- client = zserv_find_client(c->proto, c->instance); +- if (!client) { +- zlog_warn( +- "%s: Not found zclient(proto=%u, instance=%u).", +- __func__, c->proto, c->instance); +- continue; +- } ++ for (ALL_LIST_ELEMENTS_RO(zrouter.client_list, n, client)) + zsend_zebra_srv6_locator_delete(client, locator); +- } + + listnode_delete(srv6->locators, locator); + srv6_locator_free(locator); +@@ -190,7 +692,6 @@ void zebra_notify_srv6_locator_add(struct srv6_locator *locator) + void zebra_notify_srv6_locator_delete(struct srv6_locator *locator) + { + struct listnode *n; +- struct srv6_locator_chunk *c; + struct zserv *client; + + /* +@@ -204,17 +705,8 @@ void zebra_notify_srv6_locator_delete(struct srv6_locator *locator) + * by ZEBRA_SRV6_LOCATOR_DELETE, and this notification is sent to the + * owner of each chunk. + */ +- for (ALL_LIST_ELEMENTS_RO((struct list *)locator->chunks, n, c)) { +- if (c->proto == ZEBRA_ROUTE_SYSTEM) +- continue; +- client = zserv_find_client(c->proto, c->instance); +- if (!client) { +- zlog_warn("Not found zclient(proto=%u, instance=%u).", +- c->proto, c->instance); +- continue; +- } ++ for (ALL_LIST_ELEMENTS_RO(zrouter.client_list, n, client)) + zsend_zebra_srv6_locator_delete(client, locator); +- } + } + + struct zebra_srv6 srv6; +@@ -222,10 +714,32 @@ struct zebra_srv6 srv6; + struct zebra_srv6 *zebra_srv6_get_default(void) + { + static bool first_execution = true; ++ struct srv6_sid_format *format_usidf3216; ++ struct srv6_sid_format *format_uncompressed; + + if (first_execution) { + first_execution = false; + srv6.locators = list_new(); ++ ++ /* Initialize list of SID formats */ ++ srv6.sid_formats = list_new(); ++ srv6.sid_formats->del = delete_srv6_sid_format; ++ ++ /* Create SID format `usid-f3216` */ ++ format_usidf3216 = create_srv6_sid_format_usid_f3216(); ++ srv6_sid_format_register(format_usidf3216); ++ ++ /* Create SID format `uncompressed` */ ++ format_uncompressed = create_srv6_sid_format_uncompressed(); ++ srv6_sid_format_register(format_uncompressed); ++ ++ /* Init list to store SRv6 SIDs */ ++ srv6.sids = list_new(); ++ srv6.sids->del = delete_zebra_srv6_sid_ctx; ++ ++ /* Init list to store SRv6 SID blocks */ ++ srv6.sid_blocks = list_new(); ++ srv6.sid_blocks->del = delete_zebra_srv6_sid_block; + } + return &srv6; + } +@@ -427,30 +941,1534 @@ void zebra_srv6_encap_src_addr_unset(void) + memset(&srv6->encap_src_addr, 0, sizeof(struct in6_addr)); + } + +-void zebra_srv6_terminate(void) ++/* --- SRv6 SID Allocation/Release functions -------------------------------- */ ++ ++/** ++ * Return the SRv6 SID obtained composing the locator and function. ++ * ++ * @param sid_value SRv6 SID address returned ++ * @param locator Parent locator of the SRv6 SID ++ * @param sid_func Function part of the SID ++ * @return True if success, False otherwise ++ */ ++static bool zebra_srv6_sid_compose(struct in6_addr *sid_value, ++ struct srv6_locator *locator, ++ uint32_t sid_func) + { +- struct srv6_locator *locator; ++ uint8_t offset, func_len; ++ struct srv6_sid_format *format = locator->sid_format; + +- if (!srv6.locators) +- return; ++ if (!sid_value || !locator) ++ return false; ++ ++ if (format) { ++ offset = format->block_len + format->node_len; ++ func_len = format->function_len; ++ } else { ++ offset = locator->block_bits_length + locator->node_bits_length; ++ func_len = locator->function_bits_length; ++ } + +- while (listcount(srv6.locators)) { +- locator = listnode_head(srv6.locators); ++ *sid_value = locator->prefix.prefix; ++ for (uint8_t idx = 0; idx < func_len; idx++) { ++ uint8_t tidx = offset + idx; + +- listnode_delete(srv6.locators, locator); +- srv6_locator_free(locator); ++ sid_value->s6_addr[tidx / 8] &= ~(0x1 << (7 - tidx % 8)); ++ if (sid_func >> (func_len - 1 - idx) & 0x1) ++ sid_value->s6_addr[tidx / 8] |= 0x1 << (7 - tidx % 8); + } + +- list_delete(&srv6.locators); ++ return true; + } + +-void zebra_srv6_init(void) ++/** ++ * Return the parent locator and function of an SRv6 SID. ++ * ++ * @param sid_value SRv6 SID address to be decomposed ++ * @param sid_block Parent block of the SRv6 SID ++ * @param locator Parent locator of the SRv6 SID ++ * @param sid_func Function part of the SID ++ * @param sid_wide_func Wide function of the SID ++ * @return True if success, False otherwise ++ */ ++static bool zebra_srv6_sid_decompose(struct in6_addr *sid_value, ++ struct zebra_srv6_sid_block **sid_block, ++ struct srv6_locator **locator, ++ uint32_t *sid_func, uint32_t *sid_wide_func) + { +- hook_register(zserv_client_close, zebra_srv6_cleanup); +- hook_register(srv6_manager_get_chunk, +- zebra_srv6_manager_get_locator_chunk); +- hook_register(srv6_manager_release_chunk, +- zebra_srv6_manager_release_locator_chunk); ++ struct zebra_srv6 *srv6 = zebra_srv6_get_default(); ++ struct srv6_locator *l; ++ struct zebra_srv6_sid_block *b; ++ struct srv6_sid_format *format; ++ struct listnode *node; ++ struct prefix_ipv6 tmp_prefix; ++ uint8_t offset, func_len; ++ ++ if (!sid_value || !sid_func) ++ return false; ++ ++ *sid_func = 0; ++ *sid_wide_func = 0; ++ ++ /* ++ * Build a temporary prefix_ipv6 object representing the SRv6 SID. ++ * This temporary prefix object is used below by the prefix_match ++ * function to check if the SID belongs to a specific locator. ++ */ ++ tmp_prefix.family = AF_INET6; ++ tmp_prefix.prefixlen = IPV6_MAX_BITLEN; ++ tmp_prefix.prefix = *sid_value; ++ ++ /* ++ * Lookup the parent locator of the SID and return the locator and ++ * the function of the SID. ++ */ ++ for (ALL_LIST_ELEMENTS_RO(srv6->locators, node, l)) { ++ /* ++ * Check if the locator prefix includes the temporary prefix ++ * representing the SID. ++ */ ++ if (prefix_match((struct prefix *)&l->prefix, ++ (struct prefix *)&tmp_prefix)) { ++ format = l->sid_format; ++ ++ if (format) { ++ offset = format->block_len + format->node_len; ++ func_len = format->function_len; ++ } else { ++ offset = l->block_bits_length + ++ l->node_bits_length; ++ func_len = l->function_bits_length; ++ } ++ ++ for (uint8_t idx = 0; idx < func_len; idx++) { ++ uint8_t tidx = offset + idx; ++ *sid_func |= (sid_value->s6_addr[tidx / 8] & ++ (0x1 << (7 - tidx % 8))) ++ << (((func_len - 1 - idx) / 8) * 8); ++ } ++ ++ /* ++ * If function comes from the Wide LIB range, we also ++ * need to get the Wide function. ++ */ ++ if (format && format->type == SRV6_SID_FORMAT_TYPE_USID) { ++ if (*sid_func >= format->config.usid.wlib_start && ++ *sid_func <= format->config.usid.wlib_end) { ++ format = l->sid_format; ++ ++ offset = format->block_len + ++ format->node_len + ++ format->function_len; ++ ++ for (uint8_t idx = 0; idx < 16; idx++) { ++ uint8_t tidx = offset + idx; ++ *sid_wide_func |= ++ (sid_value->s6_addr[tidx / ++ 8] & ++ (0x1 << (7 - tidx % 8))) ++ << (((16 - 1 - idx) / 8) * ++ 8); ++ } ++ } ++ } ++ ++ *locator = l; ++ *sid_block = l->sid_block; ++ ++ return true; ++ } ++ } ++ ++ /* ++ * If we arrive here, the SID does not belong to any locator. ++ * Then, let's try to find the parent block from which the SID ++ * has been allocated. ++ */ ++ ++ /* ++ * Lookup the parent block of the SID and return the block and ++ * the function of the SID. ++ */ ++ for (ALL_LIST_ELEMENTS_RO(srv6->sid_blocks, node, b)) { ++ /* ++ * Check if the block prefix includes the temporary prefix ++ * representing the SID ++ */ ++ if (prefix_match((struct prefix *)&b->prefix, ++ (struct prefix *)&tmp_prefix)) { ++ format = b->sid_format; ++ ++ if (!format) ++ continue; ++ ++ offset = format->block_len + format->node_len; ++ func_len = format->function_len; ++ ++ for (uint8_t idx = 0; idx < func_len; idx++) { ++ uint8_t tidx = offset + idx; ++ *sid_func |= (sid_value->s6_addr[tidx / 8] & ++ (0x1 << (7 - tidx % 8))) ++ << ((func_len - 1 - idx) / 8); ++ } ++ ++ /* ++ * If function comes from the Wide LIB range, we also ++ * need to get the Wide function. ++ */ ++ if (*sid_func >= format->config.usid.wlib_start && ++ *sid_func <= format->config.usid.wlib_end) { ++ format = b->sid_format; ++ ++ offset = format->block_len + format->node_len + ++ format->function_len; ++ ++ for (uint8_t idx = 0; idx < 16; idx++) { ++ uint8_t tidx = offset + idx; ++ *sid_wide_func |= ++ (sid_value->s6_addr[tidx / 8] & ++ (0x1 << (7 - tidx % 8))) ++ << (((16 - 1 - idx) / 8) * 8); ++ } ++ } ++ ++ *sid_block = b; ++ ++ return true; ++ } ++ } ++ ++ return false; ++} ++ ++/** ++ * Allocate an explicit SID function (i.e. specific SID function value) from a given SID block. ++ * ++ * @param block SRv6 SID block from which the SID function has to be allocated ++ * @param sid_func SID function to be allocated ++ * @param sid_wide_func SID wide function to be allocated ++ * ++ * @return true on success, false otherwise ++ */ ++static bool alloc_srv6_sid_func_explicit(struct zebra_srv6_sid_block *block, ++ uint32_t sid_func, ++ uint32_t sid_wide_func) ++{ ++ struct srv6_sid_format *format; ++ struct listnode *node; ++ uint32_t *sid_func_ptr = NULL; ++ ++ if (!block) ++ return false; ++ ++ format = block->sid_format; ++ ++ if (ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: trying to allocate explicit SID function %u from block %pFX", ++ __func__, sid_func, &block->prefix); ++ ++ /* ++ * Allocate SID function from the corresponding range depending on the SID format type ++ */ ++ if (format) { ++ if (format->type == SRV6_SID_FORMAT_TYPE_USID) { ++ uint32_t elib_start = format->config.usid.elib_start; ++ uint32_t elib_end = format->config.usid.elib_end; ++ uint32_t wlib_end = format->config.usid.wlib_end; ++ uint32_t ewlib_start = format->config.usid.ewlib_start; ++ uint32_t ewlib_end = wlib_end; ++ uint32_t *sid_wide_func_ptr = NULL; ++ ++ /* Figure out the range from which the SID function has been allocated and release it */ ++ if ((sid_func >= elib_start) && (sid_func <= elib_end)) { ++ /* The SID function has to be allocated from the ELIB range */ ++ ++ /* Ensure that the requested SID function has not already been taken */ ++ for (ALL_LIST_ELEMENTS_RO(block->u.usid.lib ++ .func_allocated, ++ node, sid_func_ptr)) ++ if (*sid_func_ptr == sid_func) ++ break; ++ ++ if (sid_func_ptr) { ++ zlog_err("%s: invalid SM request arguments: SID function %u already taken", ++ __func__, sid_func); ++ return false; ++ } ++ ++ /* ++ * Mark the SID function as "taken" by adding it to the "func_allocated" list and ++ * increase the counter of function allocated ++ */ ++ sid_func_ptr = ++ zebra_srv6_sid_func_alloc(sid_func); ++ listnode_add(block->u.usid.lib.func_allocated, ++ sid_func_ptr); ++ block->u.usid.lib.num_func_allocated++; ++ } else if ((sid_func >= ewlib_start) && ++ (sid_func <= ewlib_end)) { ++ /* The SID function has to be allocated from the EWLIB range */ ++ ++ /* Ensure that the requested SID function has not already been taken */ ++ for (ALL_LIST_ELEMENTS_RO(block->u.usid ++ .wide_lib[sid_func] ++ .func_allocated, ++ node, ++ sid_wide_func_ptr)) ++ if (*sid_wide_func_ptr == sid_wide_func) ++ break; ++ ++ if (sid_wide_func_ptr) { ++ zlog_err("%s: invalid SM request arguments: SID function %u already taken", ++ __func__, sid_func); ++ return false; ++ } ++ ++ /* ++ * Mark the SID function as "taken" by adding it to the "func_allocated" list and ++ * increase the counter of function allocated ++ */ ++ sid_wide_func_ptr = zebra_srv6_sid_func_alloc( ++ sid_wide_func); ++ listnode_add(block->u.usid.wide_lib[sid_func] ++ .func_allocated, ++ sid_wide_func_ptr); ++ block->u.usid.wide_lib[sid_func] ++ .num_func_allocated++; ++ } else { ++ zlog_warn("%s: function %u is outside ELIB [%u/%u] and EWLIB alloc ranges [%u/%u]", ++ __func__, sid_func, elib_start, ++ elib_end, ewlib_start, ewlib_end); ++ return -1; ++ } ++ } else if (format->type == SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) { ++ uint32_t explicit_start = ++ format->config.uncompressed.explicit_start; ++ uint32_t explicit_end = ++ (uint32_t)((1 << format->function_len) - 1); ++ ++ /* Ensure that the SID function comes from the Explicit range */ ++ if (!(sid_func >= explicit_start && ++ sid_func <= explicit_end)) { ++ zlog_err("%s: invalid SM request arguments: SID function %u out of explicit range (%u - %u)", ++ __func__, sid_func, explicit_start, ++ explicit_end); ++ return false; ++ } ++ ++ /* Ensure that the SID function has not already been taken */ ++ ++ for (ALL_LIST_ELEMENTS_RO(block->u.uncompressed ++ .func_allocated, ++ node, sid_func_ptr)) ++ if (*sid_func_ptr == sid_func) ++ break; ++ ++ /* SID function already taken */ ++ if (sid_func_ptr) { ++ zlog_err("%s: invalid SM request arguments: SID function %u already taken", ++ __func__, sid_func); ++ return false; ++ } ++ ++ /* ++ * Mark the SID function as "taken" by adding it to the "func_allocated" list and ++ * increase the counter of function allocated ++ */ ++ sid_func_ptr = zebra_srv6_sid_func_alloc(sid_func); ++ listnode_add(block->u.uncompressed.func_allocated, ++ sid_func_ptr); ++ block->u.uncompressed.num_func_allocated++; ++ } else { ++ /* We should never arrive here */ ++ zlog_err("%s: unknown SID format type: %u", __func__, ++ format->type); ++ assert(0); ++ } ++ } else { ++ /* Ensure that the SID function has not already been taken */ ++ ++ for (ALL_LIST_ELEMENTS_RO(block->u.uncompressed.func_allocated, ++ node, sid_func_ptr)) ++ if (*sid_func_ptr == sid_func) ++ break; ++ ++ /* SID function already taken */ ++ if (sid_func_ptr) { ++ zlog_err("%s: invalid SM request arguments: SID function %u already taken", ++ __func__, sid_func); ++ return false; ++ } ++ ++ /* ++ * Mark the SID function as "taken" by adding it to the "func_allocated" list and ++ * increase the counter of function allocated ++ */ ++ sid_func_ptr = zebra_srv6_sid_func_alloc(sid_func); ++ listnode_add(block->u.uncompressed.func_allocated, sid_func_ptr); ++ block->u.uncompressed.num_func_allocated++; ++ } ++ ++ if (ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: allocated explicit SID function %u from block %pFX", ++ __func__, sid_func, &block->prefix); ++ ++ return true; ++} ++ ++/** ++ * Allocate a dynamic SID function (i.e. any available SID function value) from a given SID block. ++ * ++ * @param block SRv6 SID block from which the SID function has to be allocated ++ * @param sid_func SID function allocated ++ * ++ * @return true on success, false otherwise ++ */ ++static bool alloc_srv6_sid_func_dynamic(struct zebra_srv6_sid_block *block, ++ uint32_t *sid_func) ++{ ++ struct srv6_sid_format *format; ++ uint32_t *sid_func_ptr = NULL; ++ ++ if (!block || !sid_func) ++ return false; ++ ++ format = block->sid_format; ++ ++ if (ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: trying to allocate dynamic SID function from block %pFX", ++ __func__, &block->prefix); ++ ++ /* ++ * Allocate SID function from the corresponding range depending on the SID format type ++ */ ++ if (format) { ++ if (format->type == SRV6_SID_FORMAT_TYPE_USID) { ++ /* Format is uSID and behavior => allocate SID function from LIB range */ ++ ++ /* The Dynamic LIB range ends where the Explicit LIB range begins */ ++ uint32_t dlib_end = format->config.usid.elib_start - 1; ++ ++ /* Check if we ran out of available SID functions */ ++ if (block->u.usid.lib.first_available_func > dlib_end) { ++ zlog_warn("%s: SRv6: Warning, SRv6 Dynamic LIB is depleted", ++ __func__); ++ return false; ++ } ++ ++ /* ++ * First, let's check if there are any SID functions that were previously ++ * allocated and then released. ++ */ ++ if (listcount(block->u.usid.lib.func_released) != 0) { ++ /* ++ * There are SID functions previously allocated and then released, ++ * let's pick the first one and reuse it now. ++ */ ++ sid_func_ptr = listnode_head( ++ block->u.usid.lib.func_released); ++ *sid_func = *sid_func_ptr; ++ listnode_delete(block->u.usid.lib.func_released, ++ sid_func_ptr); ++ zebra_srv6_sid_func_free(sid_func_ptr); ++ } else { ++ /* ++ * There are no SID functions previously allocated and then released, ++ * let's allocate a new function from the pool of available functions. ++ */ ++ *sid_func = ++ block->u.usid.lib.first_available_func; ++ block->u.usid.lib.first_available_func++; ++ } ++ ++ /* Increase the counter of SID functions allocated */ ++ block->u.usid.lib.num_func_allocated++; ++ ++ if (block->u.usid.lib.first_available_func > dlib_end) ++ zlog_warn("%s: SRv6: Warning, SRv6 Dynamic LIB is depleted and next SID request will fail", ++ __func__); ++ } else if (format->type == SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) { ++ /* Format is uncompressed => allocate SID function from Dynamic range */ ++ ++ uint32_t dynamic_end = ++ format->config.uncompressed.explicit_start - 1; ++ ++ /* Check if we ran out of available SID functions */ ++ if (block->u.uncompressed.first_available_func > ++ dynamic_end) { ++ zlog_warn("%s: SRv6: Warning, SRv6 SID Dynamic alloc space is depleted", ++ __func__); ++ return NULL; ++ } ++ ++ /* ++ * First, let's check if there are any SID functions that were previously ++ * allocated and then released. ++ */ ++ if (listcount(block->u.uncompressed.func_released) != 0) { ++ /* ++ * There are SID functions previously allocated and then released, ++ * let's pick the first one and reuse it now. ++ */ ++ sid_func_ptr = listnode_head( ++ block->u.uncompressed.func_released); ++ *sid_func = *sid_func_ptr; ++ listnode_delete(block->u.uncompressed ++ .func_released, ++ sid_func_ptr); ++ zebra_srv6_sid_func_free(sid_func_ptr); ++ } else { ++ /* ++ * There are no SID functions previously allocated and then released, ++ * let's allocate a new function from the pool of available functions. ++ */ ++ *sid_func = block->u.uncompressed ++ .first_available_func; ++ block->u.uncompressed.first_available_func++; ++ } ++ ++ /* Increase the counter of SID functions allocated */ ++ block->u.uncompressed.num_func_allocated++; ++ ++ if (block->u.uncompressed.first_available_func > ++ dynamic_end) ++ zlog_warn("%s: SRv6: Warning, SRv6 SID Dynamic alloc space is depleted and next SID request will fail", ++ __func__); ++ } else { ++ /* We should never arrive here */ ++ zlog_err("%s: unknown SID format type: %u", __func__, ++ format->type); ++ assert(0); ++ } ++ } else { ++ /* ++ * First, let's check if there are any SID functions that were previously ++ * allocated and then released. ++ */ ++ if (listcount(block->u.uncompressed.func_released) != 0) { ++ /* ++ * There are SID functions previously allocated and then released, ++ * let's pick the first one and reuse it now. ++ */ ++ sid_func_ptr = listnode_head( ++ block->u.uncompressed.func_released); ++ *sid_func = *sid_func_ptr; ++ listnode_delete(block->u.uncompressed.func_released, ++ sid_func_ptr); ++ zebra_srv6_sid_func_free(sid_func_ptr); ++ } else { ++ /* ++ * There are no SID functions previously allocated and then released, ++ * let's allocate a new function from the pool of available functions. ++ */ ++ *sid_func = block->u.uncompressed.first_available_func; ++ block->u.uncompressed.first_available_func++; ++ } ++ ++ /* Increase the counter of SID functions allocated */ ++ block->u.uncompressed.num_func_allocated++; ++ } ++ ++ if (ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: allocated dynamic SID function %u from block %pFX", ++ __func__, *sid_func, &block->prefix); ++ ++ return true; ++} ++ ++/** ++ * Get an explicit SID (i.e., a specific SID value) for a given context. ++ * ++ * If a SID already exists associated with the context, it returns the existing SID. ++ * Otherwise, it allocates a new SID. ++ * ++ * @param sid SID returned ++ * @param ctx Context for which the SID has been requested ++ * @param sid_value specific SRv6 SID value (i.e. IPv6 address) to be ++ * allocated explicitly ++ * ++ * @return 0 if the function returned an existing SID and SID value has not changed, ++ * 1 if a new SID has been allocated or the existing SID value has changed, -1 if an error occurred ++ */ ++static int get_srv6_sid_explicit(struct zebra_srv6_sid **sid, ++ struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value) ++{ ++ struct zebra_srv6 *srv6 = zebra_srv6_get_default(); ++ struct zebra_srv6_sid_ctx *s = NULL; ++ struct zebra_srv6_sid_ctx *zctx = NULL; ++ struct listnode *node; ++ uint32_t sid_func = 0, sid_func_wide = 0; ++ struct srv6_locator *locator = NULL; ++ struct zebra_srv6_sid_block *block = NULL; ++ char buf[256]; ++ ++ if (!ctx || !sid_value) ++ return -1; ++ ++ /* Check if we already have a SID associated with the provided context */ ++ for (ALL_LIST_ELEMENTS_RO(srv6->sids, node, s)) { ++ if (memcmp(&s->ctx, ctx, sizeof(struct srv6_sid_ctx)) == 0) { ++ /* ++ * If the context is already associated with a SID that has the same SID value, then ++ * return the existing SID ++ */ ++ if (sid_same(&s->sid->value, sid_value)) { ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: returning existing SRv6 SID %pI6 ctx %s", ++ __func__, &s->sid->value, ++ srv6_sid_ctx2str(buf, ++ sizeof(buf), ++ ctx)); ++ *sid = s->sid; ++ return 0; ++ } ++ ++ /* ++ * It is not allowed to allocate an explicit SID for a given context if the context ++ * is already associated with an explicit SID ++ */ ++ if (s->sid->alloc_mode == SRV6_SID_ALLOC_MODE_EXPLICIT) { ++ zlog_err("%s: cannot alloc SID %pI6 for ctx %s: ctx already associated with SID %pI6", ++ __func__, sid_value, ++ srv6_sid_ctx2str(buf, sizeof(buf), ++ &s->ctx), ++ &s->sid->value); ++ return -1; ++ } ++ ++ zctx = s; ++ break; ++ } ++ } ++ ++ /* Get parent locator and function of the provided SID */ ++ if (!zebra_srv6_sid_decompose(sid_value, &block, &locator, &sid_func, ++ &sid_func_wide)) { ++ zlog_err("%s: invalid SM request arguments: parent block/locator not found for SID %pI6", ++ __func__, sid_value); ++ return -1; ++ } ++ ++ if (ctx->behavior == ZEBRA_SEG6_LOCAL_ACTION_END) { ++ zlog_err("%s: invalid SM request arguments: explicit SID allocation not allowed for End/uN behavior", ++ __func__); ++ return -1; ++ } ++ ++ /* Allocate an explicit SID function for the SID */ ++ if (!alloc_srv6_sid_func_explicit(block, sid_func, sid_func_wide)) { ++ zlog_err("%s: invalid SM request arguments: failed to allocate SID function %u from block %pFX", ++ __func__, sid_func, &block->prefix); ++ return -1; ++ } ++ ++ if (!zctx) { ++ /* If we don't have a zebra SID context for this context, allocate a new one */ ++ zctx = zebra_srv6_sid_ctx_alloc(); ++ zctx->ctx = *ctx; ++ } else { ++ /* ++ * If we already have a SID associated with this context, we need to ++ * deallocate the current SID function before allocating the new one ++ */ ++ if (zctx->sid) { ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: ctx %s already associated with a dynamic SID %pI6, releasing dynamic SID", ++ __func__, ++ srv6_sid_ctx2str(buf, sizeof(buf), ++ ctx), ++ &zctx->sid->value); ++ ++ release_srv6_sid_func_dynamic(block, zctx->sid->func); ++ zebra_srv6_sid_free(zctx->sid); ++ zctx->sid = NULL; ++ } ++ } ++ ++ /* Allocate the SID to store SID information */ ++ *sid = zebra_srv6_sid_alloc(zctx, sid_value, locator, block, sid_func, ++ SRV6_SID_ALLOC_MODE_EXPLICIT); ++ if (!(*sid)) { ++ flog_err(EC_ZEBRA_SM_CANNOT_ASSIGN_SID, ++ "%s: failed to create SRv6 SID %s (%pI6)", __func__, ++ srv6_sid_ctx2str(buf, sizeof(buf), ctx), sid_value); ++ return -1; ++ } ++ (*sid)->ctx = zctx; ++ zctx->sid = *sid; ++ listnode_add(srv6->sids, zctx); ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: allocated explicit SRv6 SID %pI6 for context %s", ++ __func__, &(*sid)->value, ++ srv6_sid_ctx2str(buf, sizeof(buf), ctx)); ++ ++ return 1; ++} ++ ++/** ++ * Get a dynamic SID (i.e., any available SID value) for a given context. ++ * ++ * If a SID already exists associated with the context, it returns the existing SID. ++ * Otherwise, it allocates a new SID. ++ * ++ * @param sid SID returned ++ * @param ctx Context for which the SID has been requested ++ * @param locator SRv6 locator from which the SID has to be allocated ++ * ++ * @return 0 if the function returned an existing SID and SID value has not changed, ++ * 1 if a new SID has been allocated or the existing SID value has changed, -1 if an error occurred ++ */ ++static int get_srv6_sid_dynamic(struct zebra_srv6_sid **sid, ++ struct srv6_sid_ctx *ctx, ++ struct srv6_locator *locator) ++{ ++ struct zebra_srv6 *srv6 = zebra_srv6_get_default(); ++ struct zebra_srv6_sid_block *block; ++ struct srv6_sid_format *format; ++ struct zebra_srv6_sid_ctx *s = NULL; ++ struct zebra_srv6_sid_ctx *zctx; ++ struct listnode *node; ++ struct in6_addr sid_value; ++ uint32_t sid_func = 0; ++ char buf[256]; ++ ++ if (!ctx || !locator) ++ return -1; ++ ++ block = locator->sid_block; ++ format = locator->sid_format; ++ ++ /* ++ * If we already have a SID for the provided context, we return the existing ++ * SID instead of allocating a new one. ++ */ ++ for (ALL_LIST_ELEMENTS_RO(srv6->sids, node, s)) { ++ if (locator && s->sid && s->sid->locator) { ++ if (strncmp(s->sid->locator->name, locator->name, ++ SRV6_LOCNAME_SIZE)) { ++ continue; ++ } ++ } ++ if (memcmp(&s->ctx, ctx, sizeof(struct srv6_sid_ctx)) == 0) { ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: returning existing SID %s %pI6", ++ __func__, ++ srv6_sid_ctx2str(buf, sizeof(buf), ++ ctx), ++ &s->sid->value); ++ *sid = s->sid; ++ return 0; ++ } ++ } ++ ++ if (format && format->type == SRV6_SID_FORMAT_TYPE_USID && ++ ctx->behavior == ZEBRA_SEG6_LOCAL_ACTION_END) { ++ /* uN SID is allocated from the GIB range */ ++ sid_value = locator->prefix.prefix; ++ } else if (!format && ctx->behavior == ZEBRA_SEG6_LOCAL_ACTION_END) { ++ /* uN SID is allocated from the GIB range */ ++ sid_value = locator->prefix.prefix; ++ } else { ++ /* Allocate a dynamic SID function for the SID */ ++ if (!alloc_srv6_sid_func_dynamic(block, &sid_func)) { ++ zlog_err("%s: invalid SM request arguments: failed to allocate SID function %u from block %pFX", ++ __func__, sid_func, &block->prefix); ++ return -1; ++ } ++ ++ /* Compose the SID as the locator followed by the SID function */ ++ zebra_srv6_sid_compose(&sid_value, locator, sid_func); ++ } ++ ++ /* Allocate a zebra SID context to store SID context information */ ++ zctx = zebra_srv6_sid_ctx_alloc(); ++ zctx->ctx = *ctx; ++ ++ /* Allocate the SID to store SID information */ ++ *sid = zebra_srv6_sid_alloc(zctx, &sid_value, locator, block, sid_func, ++ SRV6_SID_ALLOC_MODE_DYNAMIC); ++ if (!(*sid)) { ++ flog_err(EC_ZEBRA_SM_CANNOT_ASSIGN_SID, ++ "%s: failed to create SRv6 SID ctx %s (%pI6)", __func__, ++ srv6_sid_ctx2str(buf, sizeof(buf), ctx), &sid_value); ++ return -1; ++ } ++ (*sid)->ctx = zctx; ++ zctx->sid = *sid; ++ listnode_add(srv6->sids, zctx); ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: allocated new dynamic SRv6 SID %pI6 for context %s", ++ __func__, &(*sid)->value, ++ srv6_sid_ctx2str(buf, sizeof(buf), ctx)); ++ ++ return 1; ++} ++ ++/** ++ * Get an SRv6 SID for a given context. ++ * ++ * If a SID already exists associated with the context, it returns the existing SID. ++ * Otherwise, it allocates a new SID. ++ * ++ * If the sid_value parameter is non-NULL, it allocates the requested SID value ++ * if it is available (explicit SID allocation). ++ * If the sid_value parameter is NULL, it allocates any available SID value ++ * (dynamic SID allocation). ++ * ++ * @param sid SID returned ++ * @param ctx Context for which the SID has been requested ++ * @param sid_value SRv6 SID value to be allocated (for explicit SID allocation) ++ * @param locator_name Parent SRv6 locator from which the SID has to be allocated (for dynamic SID allocation) ++ * ++ * @return 0 if the function returned an existing SID and SID value has not changed, ++ * 1 if a new SID has been allocated or the existing SID value has changed, -1 if an error occurred ++ */ ++int get_srv6_sid(struct zebra_srv6_sid **sid, struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value, const char *locator_name) ++{ ++ int ret = -1; ++ struct srv6_locator *locator; ++ char buf[256]; ++ ++ enum srv6_sid_alloc_mode alloc_mode = ++ (sid_value) ? SRV6_SID_ALLOC_MODE_EXPLICIT ++ : SRV6_SID_ALLOC_MODE_DYNAMIC; ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: received SRv6 SID alloc request: SID ctx %s (%pI6), mode=%s", ++ __func__, srv6_sid_ctx2str(buf, sizeof(buf), ctx), ++ sid_value, srv6_sid_alloc_mode2str(alloc_mode)); ++ ++ switch (alloc_mode) { ++ case SRV6_SID_ALLOC_MODE_EXPLICIT: ++ /* ++ * Explicit SID allocation: allocate a specific SID value ++ */ ++ ++ if (!sid_value) { ++ zlog_err("%s: invalid SM request arguments: missing SRv6 SID value, necessary for explicit allocation", ++ __func__); ++ return -1; ++ } ++ ++ ret = get_srv6_sid_explicit(sid, ctx, sid_value); ++ ++ break; ++ case SRV6_SID_ALLOC_MODE_DYNAMIC: ++ /* ++ * Dynamic SID allocation: allocate any available SID value ++ */ ++ ++ if (!locator_name) { ++ zlog_err("%s: invalid SM request arguments: missing SRv6 locator, necessary for dynamic allocation", ++ __func__); ++ return -1; ++ } ++ ++ locator = zebra_srv6_locator_lookup(locator_name); ++ if (!locator) { ++ zlog_err("%s: invalid SM request arguments: SRv6 locator '%s' does not exist", ++ __func__, locator_name); ++ return -1; ++ } ++ ++ ret = get_srv6_sid_dynamic(sid, ctx, locator); ++ ++ break; ++ case SRV6_SID_ALLOC_MODE_MAX: ++ case SRV6_SID_ALLOC_MODE_UNSPEC: ++ default: ++ flog_err(EC_ZEBRA_SM_CANNOT_ASSIGN_SID, ++ "%s: SRv6 Manager: Unrecognized alloc mode %u", ++ __func__, alloc_mode); ++ /* We should never arrive here */ ++ assert(0); ++ } ++ ++ return ret; ++} ++ ++/** ++ * Release an explicit SRv6 SID function. ++ * ++ * @param block Parent SRv6 SID block of the SID function that has to be released ++ * @param sid_func SID function to be released ++ * @return 0 on success, -1 otherwise ++ */ ++static bool release_srv6_sid_func_explicit(struct zebra_srv6_sid_block *block, ++ uint32_t sid_func, ++ uint32_t sid_wide_func) ++{ ++ struct srv6_sid_format *format; ++ struct listnode *node; ++ uint32_t *sid_func_ptr = NULL; ++ ++ if (!block) ++ return -1; ++ ++ format = block->sid_format; ++ ++ if (ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: trying to release explicit SRv6 SID function %u from block %pFX", ++ __func__, sid_func, &block->prefix); ++ ++ /* ++ * Release SID function from the corresponding range depending on the SID format type ++ */ ++ if (format) { ++ if (format->type == SRV6_SID_FORMAT_TYPE_USID) { ++ uint32_t elib_start = format->config.usid.elib_start; ++ uint32_t elib_end = format->config.usid.elib_end; ++ uint32_t ewlib_start = format->config.usid.ewlib_start; ++ uint32_t ewlib_end = format->config.usid.wlib_end; ++ uint32_t *sid_wide_func_ptr = NULL; ++ ++ /* Figure out the range from which the SID function has been allocated and release it */ ++ if ((sid_func >= elib_start) && (sid_func <= elib_end)) { ++ /* The SID function comes from the ELIB range */ ++ ++ /* Lookup SID function in the functions allocated list of ELIB range */ ++ for (ALL_LIST_ELEMENTS_RO(block->u.usid.lib ++ .func_allocated, ++ node, sid_func_ptr)) ++ if (*sid_func_ptr == sid_func) ++ break; ++ ++ /* Ensure that the SID function is allocated */ ++ if (!sid_func_ptr) { ++ zlog_warn("%s: failed to release SID function %u, function is not allocated", ++ __func__, sid_func); ++ return -1; ++ } ++ ++ /* Release the SID function from the ELIB range */ ++ listnode_delete(block->u.usid.lib.func_allocated, ++ sid_func_ptr); ++ zebra_srv6_sid_func_free(sid_func_ptr); ++ } else if ((sid_func >= ewlib_start) && ++ (sid_func <= ewlib_end)) { ++ /* The SID function comes from the EWLIB range */ ++ ++ /* Lookup SID function in the functions allocated list of EWLIB range */ ++ for (ALL_LIST_ELEMENTS_RO(block->u.usid ++ .wide_lib[sid_func] ++ .func_allocated, ++ node, sid_func_ptr)) ++ if (*sid_wide_func_ptr == sid_wide_func) ++ break; ++ ++ /* Ensure that the SID function is allocated */ ++ if (!sid_wide_func_ptr) { ++ zlog_warn("%s: failed to release wide SID function %u, function is not allocated", ++ __func__, sid_wide_func); ++ return -1; ++ } ++ ++ /* Release the SID function from the EWLIB range */ ++ listnode_delete(block->u.usid.wide_lib[sid_func] ++ .func_allocated, ++ sid_wide_func_ptr); ++ zebra_srv6_sid_func_free(sid_wide_func_ptr); ++ } else { ++ zlog_warn("%s: function %u is outside ELIB [%u/%u] and EWLIB alloc ranges [%u/%u]", ++ __func__, sid_func, elib_start, ++ elib_end, ewlib_start, ewlib_end); ++ return -1; ++ } ++ } else if (format->type == SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) { ++ uint32_t explicit_start = ++ format->config.uncompressed.explicit_start; ++ uint32_t explicit_end = ++ (uint32_t)((1 << format->function_len) - 1); ++ ++ /* Ensure that the SID function comes from the Explicit range */ ++ if (!(sid_func >= explicit_start && ++ sid_func <= explicit_end)) { ++ zlog_warn("%s: function %u is outside explicit alloc range [%u/%u]", ++ __func__, sid_func, explicit_start, ++ explicit_end); ++ return -1; ++ } ++ ++ /* Lookup SID function in the functions allocated list of Explicit range */ ++ for (ALL_LIST_ELEMENTS_RO(block->u.uncompressed ++ .func_allocated, ++ node, sid_func_ptr)) ++ if (*sid_func_ptr == sid_func) ++ break; ++ ++ /* Ensure that the SID function is allocated */ ++ if (!sid_func_ptr) { ++ zlog_warn("%s: failed to release SID function %u, function is not allocated", ++ __func__, sid_func); ++ return -1; ++ } ++ ++ /* Release the SID function from the Explicit range */ ++ listnode_delete(block->u.uncompressed.func_allocated, ++ sid_func_ptr); ++ zebra_srv6_sid_func_free(sid_func_ptr); ++ } else { ++ /* We should never arrive here */ ++ assert(0); ++ } ++ } else { ++ /* Lookup SID function in the functions allocated list of Explicit range */ ++ for (ALL_LIST_ELEMENTS_RO(block->u.uncompressed.func_allocated, ++ node, sid_func_ptr)) ++ if (*sid_func_ptr == sid_func) ++ break; ++ ++ /* Ensure that the SID function is allocated */ ++ if (!sid_func_ptr) { ++ zlog_warn("%s: failed to release SID function %u, function is not allocated", ++ __func__, sid_func); ++ return -1; ++ } ++ ++ /* Release the SID function from the Explicit range */ ++ listnode_delete(block->u.uncompressed.func_allocated, ++ sid_func_ptr); ++ zebra_srv6_sid_func_free(sid_func_ptr); ++ } ++ ++ if (ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: released explicit SRv6 SID function %u from block %pFX", ++ __func__, sid_func, &block->prefix); ++ ++ return 0; ++} ++ ++/** ++ * Release a dynamic SRv6 SID function. ++ * ++ * @param block Parent SRv6 SID block of the SID function that has to be released ++ * @param sid_func SID function to be released ++ * @return 0 on success, -1 otherwise ++ */ ++static int release_srv6_sid_func_dynamic(struct zebra_srv6_sid_block *block, ++ uint32_t sid_func) ++{ ++ struct srv6_sid_format *format; ++ struct listnode *node, *nnode; ++ uint32_t *sid_func_ptr = NULL; ++ ++ if (!block) ++ return -1; ++ ++ format = block->sid_format; ++ ++ if (ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: trying to release dynamic SRv6 SID function %u from block %pFX", ++ __func__, sid_func, &block->prefix); ++ ++ /* ++ * Release SID function from the corresponding range depending on the SID format type ++ */ ++ if (format && format->type == SRV6_SID_FORMAT_TYPE_USID) { ++ uint32_t dlib_start = format->config.usid.lib_start; ++ /* The Dynamic LIB range ends where the Explicit LIB range begins */ ++ uint32_t dlib_end = format->config.usid.elib_start - 1; ++ ++ /* Ensure that the SID function to be released comes from the Dynamic LIB (DLIB) range */ ++ if (!(sid_func >= dlib_start && sid_func <= dlib_end)) { ++ zlog_warn("%s: function %u is outside Dynamic LIB range [%u/%u]", ++ __func__, sid_func, dlib_start, dlib_end); ++ return -1; ++ } ++ ++ if (sid_func == block->u.usid.lib.first_available_func - 1) { ++ /* ++ * The SID function to be released precedes the `first_available_func`. ++ * Reset first_available_func to the first available position. ++ */ ++ ++ block->u.usid.lib.first_available_func -= 1; ++ ++ bool found; ++ ++ do { ++ found = false; ++ for (ALL_LIST_ELEMENTS(block->u.usid.lib ++ .func_released, ++ node, nnode, ++ sid_func_ptr)) ++ if (*sid_func_ptr == ++ block->u.usid.lib.first_available_func - ++ 1) { ++ listnode_delete(block->u.usid ++ .lib ++ .func_released, ++ sid_func_ptr); ++ zebra_srv6_sid_func_free( ++ sid_func_ptr); ++ block->u.usid.lib ++ .first_available_func -= ++ 1; ++ found = true; ++ break; ++ } ++ } while (found); ++ } else { ++ /* ++ * The SID function to be released does not precede the `first_available_func`. ++ * Add the released function to the func_released array to indicate ++ * that it is available again for allocation. ++ */ ++ sid_func_ptr = zebra_srv6_sid_func_alloc(sid_func); ++ listnode_add_head(block->u.usid.lib.func_released, ++ sid_func_ptr); ++ } ++ } else if (format && format->type == SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) { ++ uint32_t dynamic_start = ++ SRV6_SID_FORMAT_UNCOMPRESSED_F4024_FUNC_UNRESERVED_MIN; ++ /* The Dynamic range ends where the Explicit range begins */ ++ uint32_t dynamic_end = ++ format->config.uncompressed.explicit_start - 1; ++ ++ /* Ensure that the SID function to be released comes from the Dynamic range */ ++ if (!(sid_func >= dynamic_start && sid_func <= dynamic_end)) { ++ zlog_warn("%s: function %u is outside dynamic range [%u/%u]", ++ __func__, sid_func, dynamic_start, ++ dynamic_end); ++ return -1; ++ } ++ ++ if (sid_func == block->u.uncompressed.first_available_func - 1) { ++ /* ++ * The released SID function precedes the `first_available_func`. ++ * Reset first_available_func to the first available position. ++ */ ++ ++ block->u.uncompressed.first_available_func -= 1; ++ ++ bool found; ++ ++ do { ++ found = false; ++ for (ALL_LIST_ELEMENTS(block->u.uncompressed ++ .func_released, ++ node, nnode, ++ sid_func_ptr)) ++ if (*sid_func_ptr == ++ block->u.uncompressed ++ .first_available_func - ++ 1) { ++ listnode_delete(block->u.uncompressed ++ .func_released, ++ sid_func_ptr); ++ zebra_srv6_sid_func_free( ++ sid_func_ptr); ++ block->u.uncompressed ++ .first_available_func -= ++ 1; ++ found = true; ++ break; ++ } ++ } while (found); ++ } else { ++ /* ++ * The released SID function does not precede the `first_available_func`. ++ * Add the released function to the func_released array to indicate ++ * that it is available again for allocation. ++ */ ++ sid_func_ptr = zebra_srv6_sid_func_alloc(sid_func); ++ listnode_add_head(block->u.uncompressed.func_released, ++ sid_func_ptr); ++ } ++ } else if (!format) { ++ if (sid_func == block->u.uncompressed.first_available_func - 1) { ++ /* ++ * The released SID function precedes the `first_available_func`. ++ * Reset first_available_func to the first available position. ++ */ ++ ++ block->u.uncompressed.first_available_func -= 1; ++ ++ bool found; ++ ++ do { ++ found = false; ++ for (ALL_LIST_ELEMENTS(block->u.uncompressed ++ .func_released, ++ node, nnode, ++ sid_func_ptr)) ++ if (*sid_func_ptr == ++ block->u.uncompressed ++ .first_available_func - ++ 1) { ++ listnode_delete(block->u.uncompressed ++ .func_released, ++ sid_func_ptr); ++ zebra_srv6_sid_func_free( ++ sid_func_ptr); ++ block->u.uncompressed ++ .first_available_func -= ++ 1; ++ found = true; ++ break; ++ } ++ } while (found); ++ } else { ++ /* ++ * The released SID function does not precede the `first_available_func`. ++ * Add the released function to the func_released array to indicate ++ * that it is available again for allocation. ++ */ ++ sid_func_ptr = zebra_srv6_sid_func_alloc(sid_func); ++ listnode_add_head(block->u.uncompressed.func_released, ++ sid_func_ptr); ++ } ++ } ++ ++ if (ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: released dynamic SRv6 SID function %u from block %pFX", ++ __func__, sid_func, &block->prefix); ++ ++ return 0; ++} ++ ++/** ++ * Core function, release the SRv6 SID associated with a given context. ++ * ++ * @param client The client for which the SID has to be released ++ * @param ctx Context associated with the SRv6 SID to be released ++ * @return 0 on success, -1 otherwise ++ */ ++int release_srv6_sid(struct zserv *client, struct zebra_srv6_sid_ctx *zctx) ++{ ++ struct zebra_srv6 *srv6 = zebra_srv6_get_default(); ++ char buf[256]; ++ ++ if (!zctx || !zctx->sid) ++ return -1; ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: releasing SRv6 SID %pI6 associated with ctx %s (proto=%u, instance=%u)", ++ __func__, &zctx->sid->value, ++ srv6_sid_ctx2str(buf, sizeof(buf), &zctx->ctx), ++ client->proto, client->instance); ++ ++ /* Ensures the SID is in use by the client */ ++ if (!listnode_lookup(zctx->sid->client_list, client)) { ++ flog_err(EC_ZEBRA_SM_DAEMON_MISMATCH, "%s: Daemon mismatch!!", ++ __func__); ++ return -1; ++ } ++ ++ /* Remove the client from the list of clients using the SID */ ++ listnode_delete(zctx->sid->client_list, client); ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: released SRv6 SID %pI6 associated with ctx %s (proto=%u, instance=%u)", ++ __func__, &zctx->sid->value, ++ srv6_sid_ctx2str(buf, sizeof(buf), &zctx->ctx), ++ client->proto, client->instance); ++ ++ /* ++ * If the SID is not used by any other client, then deallocate it ++ * and remove it from the SRv6 database. ++ */ ++ if (listcount(zctx->sid->client_list) == 0) { ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: SRv6 SID %pI6 associated with ctx %s is no longer in use, removing it from SRv6 database", ++ __func__, &zctx->sid->value, ++ srv6_sid_ctx2str(buf, sizeof(buf), ++ &zctx->ctx)); ++ ++ if (!(zctx->sid->block->sid_format && ++ zctx->sid->block->sid_format->type == ++ SRV6_SID_FORMAT_TYPE_USID && ++ zctx->ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END) && ++ !(!zctx->sid->block->sid_format && ++ zctx->ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END)) { ++ if (zctx->sid->alloc_mode == ++ SRV6_SID_ALLOC_MODE_EXPLICIT) ++ /* Release SRv6 SID function */ ++ release_srv6_sid_func_explicit(zctx->sid->block, ++ zctx->sid->func, ++ zctx->sid->wide_func); ++ else if (zctx->sid->alloc_mode == ++ SRV6_SID_ALLOC_MODE_DYNAMIC) ++ /* Release SRv6 SID function */ ++ release_srv6_sid_func_dynamic(zctx->sid->block, ++ zctx->sid->func); ++ else ++ /* We should never arrive here */ ++ assert(0); ++ } ++ ++ /* Free the SID */ ++ zebra_srv6_sid_free(zctx->sid); ++ zctx->sid = NULL; ++ ++ /* Remove the SID context from the list and free memory */ ++ listnode_delete(srv6->sids, zctx); ++ zebra_srv6_sid_ctx_free(zctx); ++ } ++ ++ return 0; ++} ++ ++/** ++ * Handle a get SRv6 Locator request received from a client. ++ * ++ * It looks up the requested locator and send it to the client. ++ * ++ * @param locator SRv6 locator returned by this function ++ * @param client The client that sent the Get SRv6 Locator request ++ * @param locator_name Name of the locator to look up ++ * ++ * @return 0 on success ++ */ ++static int srv6_manager_get_srv6_locator_internal(struct srv6_locator **locator, ++ struct zserv *client, ++ const char *locator_name) ++{ ++ *locator = zebra_srv6_locator_lookup(locator_name); ++ if (!*locator) ++ return -1; ++ ++ return zsend_zebra_srv6_locator_add(client, *locator); ++} ++ ++/** ++ * Handle a get SID request received from a client. ++ * ++ * It gets a SID for a given context. If there is no SID associated with the context yet, ++ * we allocate one and return it to the client. Otherwise, we return the existing SID. ++ * ++ * - When the `sid_value` parameter is non-NULL, SRv6 Manager assigns the requested SID value ++ * if it is available (explicit SID allocation). ++ * - When the `sid_value` parameter is NULL, SRv6 Manager assigns any available SID value ++ * (dynamic SID allocation). ++ * ++ * Finally, notify the client whether the SID allocation was successful or failed. ++ * ++ * @param sid SID returned by this function ++ * @param client The client that requested the SID ++ * @param ctx Context for which the SID was requested ++ * @param sid_value SID value (i.e., IPv6 address) that has to be assigned to the SID ++ * (for explicit SID allocation) ++ * @param locator_name Locator from which the SID has to be allocated (for dynamic SID allocation) ++ * ++ * @return 0 on success, -1 otherwise ++ */ ++static int srv6_manager_get_sid_internal(struct zebra_srv6_sid **sid, ++ struct zserv *client, ++ struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value, ++ const char *locator_name) ++{ ++ int ret = -1; ++ struct listnode *node; ++ struct zserv *c; ++ char buf[256]; ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: getting SRv6 SID for ctx %s, sid_value=%pI6, locator_name=%s", ++ __func__, srv6_sid_ctx2str(buf, sizeof(buf), ctx), ++ sid_value ? sid_value : &in6addr_any, locator_name); ++ ++ ret = get_srv6_sid(sid, ctx, sid_value, locator_name); ++ if (ret < 0) { ++ zlog_warn("%s: not got SRv6 SID for ctx %s, sid_value=%pI6, locator_name=%s", ++ __func__, srv6_sid_ctx2str(buf, sizeof(buf), ctx), ++ sid_value ? sid_value : &in6addr_any, locator_name); ++ ++ /* Notify client about SID alloc failure */ ++ zsend_srv6_sid_notify(client, ctx, sid_value, 0, 0, NULL, ++ ZAPI_SRV6_SID_FAIL_ALLOC); ++ } else if (ret == 0) { ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: got existing SRv6 SID for ctx %s: sid_value=%pI6 (func=%u) (proto=%u, instance=%u, sessionId=%u), notify client", ++ __func__, ++ srv6_sid_ctx2str(buf, sizeof(buf), ctx), ++ &(*sid)->value, (*sid)->func, client->proto, ++ client->instance, client->session_id); ++ if (!listnode_lookup((*sid)->client_list, client)) ++ listnode_add((*sid)->client_list, client); ++ ++ zsend_srv6_sid_notify(client, ctx, &(*sid)->value, (*sid)->func, ++ (*sid)->wide_func, ++ (*sid)->locator ? (*sid)->locator->name ++ : NULL, ++ ZAPI_SRV6_SID_ALLOCATED); ++ } else { ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: got new SRv6 SID for ctx %s: sid_value=%pI6 (func=%u) (proto=%u, instance=%u, sessionId=%u), notifying all clients", ++ __func__, ++ srv6_sid_ctx2str(buf, sizeof(buf), ctx), ++ &(*sid)->value, (*sid)->func, client->proto, ++ client->instance, client->session_id); ++ if (!listnode_lookup((*sid)->client_list, client)) ++ listnode_add((*sid)->client_list, client); ++ ++ for (ALL_LIST_ELEMENTS_RO((*sid)->client_list, node, c)) ++ zsend_srv6_sid_notify(c, ctx, &(*sid)->value, ++ (*sid)->func, (*sid)->wide_func, ++ (*sid)->locator ++ ? (*sid)->locator->name ++ : NULL, ++ ZAPI_SRV6_SID_ALLOCATED); ++ } ++ ++ return ret; ++} ++ ++/** ++ * Release SRv6 SIDs from a client. ++ * ++ * Called on client disconnection or reconnection. ++ * ++ * @param client The client to release SIDs from ++ * @return Number of SIDs released ++ */ ++int release_daemon_srv6_sids(struct zserv *client) ++{ ++ struct zebra_srv6 *srv6 = zebra_srv6_get_default(); ++ struct listnode *node, *nnode; ++ struct zebra_srv6_sid_ctx *ctx; ++ int count = 0; ++ int ret; ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: releasing SRv6 SIDs for client proto %s, instance %d, session %u", ++ __func__, zebra_route_string(client->proto), ++ client->instance, client->session_id); ++ ++ /* Iterate over the SIDs and release SIDs used by the client daemon */ ++ for (ALL_LIST_ELEMENTS(srv6->sids, node, nnode, ctx)) { ++ if (!listnode_lookup(ctx->sid->client_list, client)) ++ continue; ++ ++ ret = release_srv6_sid(client, ctx); ++ if (ret == 0) ++ count++; ++ } ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: released %d SRv6 SIDs", __func__, count); ++ ++ return count; ++} ++ ++/** ++ * Release SRv6 SIDs from a client. ++ * ++ * @param client The client zapi session ++ * @param ctx Context associated with the SRv6 SID ++ * @return 0 on success, -1 on failure ++ */ ++static int srv6_manager_release_sid_internal(struct zserv *client, ++ struct srv6_sid_ctx *ctx) ++{ ++ int ret = -1; ++ struct zebra_srv6 *srv6 = zebra_srv6_get_default(); ++ struct zebra_srv6_sid_ctx *zctx; ++ struct listnode *node, *nnode; ++ char buf[256]; ++ const char *locator_name = NULL; ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: releasing SRv6 SID associated with ctx %s", ++ __func__, srv6_sid_ctx2str(buf, sizeof(buf), ctx)); ++ ++ /* Lookup Zebra SID context and release it */ ++ for (ALL_LIST_ELEMENTS(srv6->sids, node, nnode, zctx)) ++ if (memcmp(&zctx->ctx, ctx, sizeof(struct srv6_sid_ctx)) == 0) { ++ if (zctx->sid && zctx->sid->locator) ++ locator_name = ++ (const char *)zctx->sid->locator->name; ++ ret = release_srv6_sid(client, zctx); ++ break; ++ } ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: no SID associated with ctx %s", __func__, ++ srv6_sid_ctx2str(buf, sizeof(buf), ctx)); ++ ++ if (ret == 0) ++ zsend_srv6_sid_notify(client, ctx, NULL, 0, 0, locator_name, ++ ZAPI_SRV6_SID_RELEASED); ++ else ++ zsend_srv6_sid_notify(client, ctx, NULL, 0, 0, locator_name, ++ ZAPI_SRV6_SID_FAIL_RELEASE); ++ ++ return ret; ++} ++ ++void zebra_srv6_terminate(void) ++{ ++ struct srv6_locator *locator; ++ struct srv6_sid_format *format; ++ struct zebra_srv6_sid_block *block; ++ struct zebra_srv6_sid_ctx *sid_ctx; ++ ++ if (srv6.locators) { ++ while (listcount(srv6.locators)) { ++ locator = listnode_head(srv6.locators); ++ ++ listnode_delete(srv6.locators, locator); ++ srv6_locator_free(locator); ++ } ++ ++ list_delete(&srv6.locators); ++ } ++ ++ /* Free SRv6 SIDs */ ++ if (srv6.sids) { ++ while (listcount(srv6.sids)) { ++ sid_ctx = listnode_head(srv6.sids); ++ ++ listnode_delete(srv6.sids, sid_ctx); ++ zebra_srv6_sid_ctx_free(sid_ctx); ++ } ++ ++ list_delete(&srv6.sids); ++ } ++ ++ /* Free SRv6 SID blocks */ ++ if (srv6.sid_blocks) { ++ while (listcount(srv6.sid_blocks)) { ++ block = listnode_head(srv6.sid_blocks); ++ ++ listnode_delete(srv6.sid_blocks, block); ++ zebra_srv6_sid_block_free(block); ++ } ++ ++ list_delete(&srv6.sid_blocks); ++ } ++ ++ /* Free SRv6 SID formats */ ++ if (srv6.sid_formats) { ++ while (listcount(srv6.sid_formats)) { ++ format = listnode_head(srv6.sid_formats); ++ ++ srv6_sid_format_unregister(format); ++ srv6_sid_format_free(format); ++ } ++ ++ list_delete(&srv6.sid_formats); ++ } ++} ++ ++void zebra_srv6_init(void) ++{ ++ hook_register(zserv_client_close, zebra_srv6_cleanup); ++ hook_register(srv6_manager_get_chunk, ++ zebra_srv6_manager_get_locator_chunk); ++ hook_register(srv6_manager_release_chunk, ++ zebra_srv6_manager_release_locator_chunk); ++ ++ hook_register(srv6_manager_get_sid, srv6_manager_get_sid_internal); ++ hook_register(srv6_manager_release_sid, ++ srv6_manager_release_sid_internal); ++ hook_register(srv6_manager_get_locator, ++ srv6_manager_get_srv6_locator_internal); + } + + bool zebra_srv6_is_enable(void) +diff --git a/zebra/zebra_srv6.h b/zebra/zebra_srv6.h +index 21936c332..1599fd7ad 100644 +--- a/zebra/zebra_srv6.h ++++ b/zebra/zebra_srv6.h +@@ -16,12 +16,197 @@ + #include + #include + ++/* Default config for SRv6 SID `usid-f3216` format */ ++#define SRV6_SID_FORMAT_USID_F3216_NAME "usid-f3216" ++#define SRV6_SID_FORMAT_USID_F3216_BLOCK_LEN 32 ++#define SRV6_SID_FORMAT_USID_F3216_NODE_LEN 16 ++#define SRV6_SID_FORMAT_USID_F3216_FUNCTION_LEN 16 ++#define SRV6_SID_FORMAT_USID_F3216_ARGUMENT_LEN 0 ++#define SRV6_SID_FORMAT_USID_F3216_LIB_START 0xE000 ++#define SRV6_SID_FORMAT_USID_F3216_ELIB_START 0xFE00 ++#define SRV6_SID_FORMAT_USID_F3216_ELIB_END 0xFEFF ++#define SRV6_SID_FORMAT_USID_F3216_WLIB_START 0xFFF0 ++#define SRV6_SID_FORMAT_USID_F3216_WLIB_END 0xFFF7 ++#define SRV6_SID_FORMAT_USID_F3216_EWLIB_START 0xFFF7 ++ ++/* Default config for SRv6 SID `uncompressed` format */ ++#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME "uncompressed-f4024" ++#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_BLOCK_LEN 40 ++#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE_LEN 24 ++#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_FUNCTION_LEN 16 ++#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_ARGUMENT_LEN 0 ++#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_EXPLICIT_RANGE_START 0xFF00 ++#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_FUNC_UNRESERVED_MIN 0x40 ++ ++/* uSID Wide LIB */ ++struct wide_lib { ++ uint32_t func; ++ uint32_t num_func_allocated; ++ uint32_t first_available_func; ++ struct list *func_allocated; ++ struct list *func_released; ++}; ++ ++/* ++ * SRv6 SID block. ++ * ++ * A SID block is an IPv6 prefix from which SRv6 SIDs are allocated. ++ * Example: ++ * SID block = fc00:0::/32 ++ * SID 1 = fc00:0:1:e000:: ++ * SID 2 = fc00:0:1:fe00:: ++ * ... ++ */ ++struct zebra_srv6_sid_block { ++ /* Prefix of this block, e.g. fc00:0::/32 */ ++ struct prefix_ipv6 prefix; ++ ++ /* Reference counter */ ++ unsigned long refcnt; ++ ++ /* ++ * Pointer to the SID format that defines the structure of the SIDs ++ * allocated from this block ++ */ ++ struct srv6_sid_format *sid_format; ++ ++ /* ++ * Run-time information/state of this SID block. ++ * ++ * This includes stuff like how many SID functions have been allocated ++ * from this block, which functions are still available to be allocated ++ * and so on... ++ */ ++ union { ++ /* Information/state for compressed uSID format */ ++ struct { ++ /* uSID Local ID Block (LIB) */ ++ struct { ++ uint32_t num_func_allocated; ++ uint32_t first_available_func; ++ struct list *func_allocated; ++ struct list *func_released; ++ } lib; ++ ++ /* uSID Wide LIB */ ++ struct wide_lib *wide_lib; ++ } usid; ++ ++ /* Information/state for uncompressed SID format */ ++ struct { ++ uint32_t num_func_allocated; ++ uint32_t first_available_func; ++ struct list *func_allocated; ++ struct list *func_released; ++ } uncompressed; ++ } u; ++}; ++ ++/** ++ * The function part of an SRv6 SID can be allocated in one ++ * of the following ways: ++ * - dynamic: allocate any available function ++ * - explicit: allocate a specific function ++ */ ++enum srv6_sid_alloc_mode { ++ SRV6_SID_ALLOC_MODE_UNSPEC = 0, ++ /* Dynamic SID allocation */ ++ SRV6_SID_ALLOC_MODE_DYNAMIC = 1, ++ /* Explicit SID allocation */ ++ SRV6_SID_ALLOC_MODE_EXPLICIT = 2, ++ SRV6_SID_ALLOC_MODE_MAX = 3, ++}; ++ ++/** ++ * Convert SID allocation mode to string. ++ * ++ * @param alloc_mode SID allocation mode ++ * @return String representing the allocation mode ++ */ ++static inline const char * ++srv6_sid_alloc_mode2str(enum srv6_sid_alloc_mode alloc_mode) ++{ ++ switch (alloc_mode) { ++ case SRV6_SID_ALLOC_MODE_EXPLICIT: ++ return "explicit"; ++ case SRV6_SID_ALLOC_MODE_DYNAMIC: ++ return "dynamic"; ++ case SRV6_SID_ALLOC_MODE_UNSPEC: ++ return "unspec"; ++ case SRV6_SID_ALLOC_MODE_MAX: ++ default: ++ return "unknown"; ++ } ++} ++ ++/* SRv6 SID instance. */ ++struct zebra_srv6_sid { ++ /* ++ * SID context associated with the SID. ++ * Defines behavior and attributes of the SID. ++ */ ++ struct zebra_srv6_sid_ctx *ctx; ++ ++ /* SID value (e.g. fc00:0:1:e000::) */ ++ struct in6_addr value; ++ ++ /* Pointer to the SRv6 locator from which the SID has been allocated */ ++ struct srv6_locator *locator; ++ ++ /* Pointer to the SRv6 block from which the SID has been allocated */ ++ struct zebra_srv6_sid_block *block; ++ ++ /* ++ * Function part of the SID ++ * Example: ++ * SID = fc00:0:1:e000:: => func = e000 ++ */ ++ uint32_t func; ++ ++ /* SID wide function. */ ++ uint32_t wide_func; ++ ++ /* SID allocation mode: dynamic or explicit */ ++ enum srv6_sid_alloc_mode alloc_mode; ++ ++ /* List of clients that are using the SID */ ++ struct list *client_list; ++}; ++ ++/* ++ * Zebra SRv6 SID context. ++ * A context defines a behavior and (optionally) some behavior-specific ++ * attributes. Client daemons (bgp, isis, ...) ask SRv6 Manager to allocate ++ * a SID for a particular context. SRv6 Manager is responsible for allocating ++ * a SID from a given SID block and associating with the context. ++ * ++ * Example: ++ * bgp asks to associate a SID to the context {behavior=End.DT46 vrf=Vrf10}. ++ * SRv6 Manager allocate SID fc00:0:1:e000:: for that context. ++ */ ++struct zebra_srv6_sid_ctx { ++ /* SRv6 SID context information. */ ++ struct srv6_sid_ctx ctx; ++ ++ /* SID associated with the context. */ ++ struct zebra_srv6_sid *sid; ++}; ++ + /* SRv6 instance structure. */ + struct zebra_srv6 { + struct list *locators; + + /* Source address for SRv6 encapsulation */ + struct in6_addr encap_src_addr; ++ ++ /* SRv6 SID formats */ ++ struct list *sid_formats; ++ ++ /* SRv6 SIDs */ ++ struct list *sids; ++ ++ /* SRv6 SID blocks */ ++ struct list *sid_blocks; + }; + + /* declare hooks for the basic API, so that it can be specialized or served +@@ -46,6 +231,17 @@ DECLARE_HOOK(srv6_manager_release_chunk, + vrf_id_t vrf_id), + (client, locator_name, vrf_id)); + ++DECLARE_HOOK(srv6_manager_get_sid, ++ (struct zebra_srv6_sid **sid, struct zserv *client, ++ struct srv6_sid_ctx *ctx, struct in6_addr *sid_value, ++ const char *locator_name), ++ (sid, client, ctx, sid_value, locator_name)); ++DECLARE_HOOK(srv6_manager_release_sid, ++ (struct zserv *client, struct srv6_sid_ctx *ctx), (client, ctx)); ++DECLARE_HOOK(srv6_manager_get_locator, ++ (struct srv6_locator **locator, struct zserv *client, ++ const char *locator_name), ++ (locator, client, locator_name)); + + extern void zebra_srv6_locator_add(struct srv6_locator *locator); + extern void zebra_srv6_locator_delete(struct srv6_locator *locator); +@@ -74,4 +270,55 @@ extern int release_daemon_srv6_locator_chunks(struct zserv *client); + extern void zebra_srv6_encap_src_addr_set(struct in6_addr *src_addr); + extern void zebra_srv6_encap_src_addr_unset(void); + ++void srv6_sid_format_register(struct srv6_sid_format *format); ++void srv6_sid_format_unregister(struct srv6_sid_format *format); ++struct srv6_sid_format *srv6_sid_format_lookup(const char *name); ++void zebra_srv6_locator_format_set(struct srv6_locator *locator, ++ struct srv6_sid_format *format); ++void zebra_srv6_sid_format_changed_cb(struct srv6_sid_format *format); ++ ++uint32_t *zebra_srv6_sid_func_alloc(uint32_t func); ++void zebra_srv6_sid_func_free(uint32_t *func); ++void delete_zebra_srv6_sid_func(void *val); ++ ++extern struct zebra_srv6_sid_block * ++zebra_srv6_sid_block_alloc(struct srv6_sid_format *format, ++ struct prefix_ipv6 *prefix); ++extern void zebra_srv6_sid_block_free(struct zebra_srv6_sid_block *block); ++extern void delete_zebra_srv6_sid_block(void *val); ++extern struct zebra_srv6_sid_block * ++zebra_srv6_sid_block_lookup(struct prefix_ipv6 *prefix); ++ ++extern struct zebra_srv6_sid * ++zebra_srv6_sid_alloc(struct zebra_srv6_sid_ctx *ctx, struct in6_addr *sid_value, ++ struct srv6_locator *locator, ++ struct zebra_srv6_sid_block *sid_block, uint32_t sid_func, ++ enum srv6_sid_alloc_mode alloc_mode); ++extern void zebra_srv6_sid_free(struct zebra_srv6_sid *sid); ++extern void delete_zebra_srv6_sid(void *val); ++ ++extern void srv6_manager_get_sid_call(struct zebra_srv6_sid **sid, ++ struct zserv *client, ++ struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value, ++ const char *locator_name); ++extern void srv6_manager_release_sid_call(struct zserv *client, ++ struct srv6_sid_ctx *ctx); ++ ++extern void srv6_manager_get_locator_call(struct srv6_locator **locator, ++ struct zserv *client, ++ const char *locator_name); ++ ++extern int get_srv6_sid(struct zebra_srv6_sid **sid, struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value, const char *locator_name); ++extern int release_srv6_sid(struct zserv *client, ++ struct zebra_srv6_sid_ctx *zctx); ++extern int release_daemon_srv6_sids(struct zserv *client); ++extern int srv6_manager_get_sid_response(struct zebra_srv6_sid *sid, ++ struct zserv *client); ++ ++extern struct zebra_srv6_sid_ctx *zebra_srv6_sid_ctx_alloc(void); ++extern void zebra_srv6_sid_ctx_free(struct zebra_srv6_sid_ctx *ctx); ++extern void delete_zebra_srv6_sid_ctx(void *val); ++ + #endif /* _ZEBRA_SRV6_H */ +diff --git a/zebra/zebra_srv6_vty.c b/zebra/zebra_srv6_vty.c +index d5cd30e64..c664a9c69 100644 +--- a/zebra/zebra_srv6_vty.c ++++ b/zebra/zebra_srv6_vty.c +@@ -68,6 +68,27 @@ static struct cmd_node srv6_encap_node = { + .prompt = "%s(config-srv6-encap)# " + }; + ++static struct cmd_node srv6_sid_formats_node = { ++ .name = "srv6-formats", ++ .node = SRV6_SID_FORMATS_NODE, ++ .parent_node = SRV6_NODE, ++ .prompt = "%s(config-srv6-formats)# ", ++}; ++ ++static struct cmd_node srv6_sid_format_usid_f3216_node = { ++ .name = "srv6-format-usid-f3216", ++ .node = SRV6_SID_FORMAT_USID_F3216_NODE, ++ .parent_node = SRV6_SID_FORMATS_NODE, ++ .prompt = "%s(config-srv6-format)# " ++}; ++ ++static struct cmd_node srv6_sid_format_uncompressed_f4024_node = { ++ .name = "srv6-format-uncompressed-f4024", ++ .node = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE, ++ .parent_node = SRV6_SID_FORMATS_NODE, ++ .prompt = "%s(config-srv6-format)# " ++}; ++ + DEFPY (show_srv6_manager, + show_srv6_manager_cmd, + "show segment-routing srv6 manager [json]", +@@ -198,15 +219,32 @@ DEFUN (show_srv6_locator_detail, + prefix2str(&locator->prefix, str, sizeof(str)); + vty_out(vty, "Name: %s\n", locator->name); + vty_out(vty, "Prefix: %s\n", str); +- vty_out(vty, "Block-Bit-Len: %u\n", locator->block_bits_length); +- vty_out(vty, "Node-Bit-Len: %u\n", locator->node_bits_length); +- vty_out(vty, "Function-Bit-Len: %u\n", +- locator->function_bits_length); +- vty_out(vty, "Argument-Bit-Len: %u\n", +- locator->argument_bits_length); ++ if (locator->sid_format) { ++ vty_out(vty, "Block-Bit-Len: %u\n", ++ locator->sid_format->block_len); ++ vty_out(vty, "Node-Bit-Len: %u\n", ++ locator->sid_format->node_len); ++ vty_out(vty, "Function-Bit-Len: %u\n", ++ locator->sid_format->function_len); ++ vty_out(vty, "Argument-Bit-Len: %u\n", ++ locator->sid_format->argument_len); ++ ++ if (locator->sid_format->type == ++ SRV6_SID_FORMAT_TYPE_USID) ++ vty_out(vty, "Behavior: uSID\n"); ++ } else { ++ vty_out(vty, "Block-Bit-Len: %u\n", ++ locator->block_bits_length); ++ vty_out(vty, "Node-Bit-Len: %u\n", ++ locator->node_bits_length); ++ vty_out(vty, "Function-Bit-Len: %u\n", ++ locator->function_bits_length); ++ vty_out(vty, "Argument-Bit-Len: %u\n", ++ locator->argument_bits_length); + +- if (CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) +- vty_out(vty, "Behavior: uSID\n"); ++ if (CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ++ vty_out(vty, "Behavior: uSID\n"); ++ } + + vty_out(vty, "Chunks:\n"); + for (ALL_LIST_ELEMENTS_RO((struct list *)locator->chunks, node, +@@ -248,9 +286,30 @@ DEFUN (no_srv6, + struct zebra_srv6 *srv6 = zebra_srv6_get_default(); + struct srv6_locator *locator; + struct listnode *node, *nnode; ++ struct zebra_srv6_sid_block *block; ++ struct zebra_srv6_sid_ctx *ctx; ++ ++ for (ALL_LIST_ELEMENTS(srv6->sids, node, nnode, ctx)) { ++ if (ctx->sid) ++ zebra_srv6_sid_free(ctx->sid); ++ ++ listnode_delete(srv6->sids, ctx); ++ zebra_srv6_sid_ctx_free(ctx); ++ } ++ ++ for (ALL_LIST_ELEMENTS(srv6->locators, node, nnode, locator)) { ++ block = locator->sid_block; ++ if (block) { ++ block->refcnt--; ++ if (block->refcnt == 0) { ++ listnode_delete(srv6->sid_blocks, block); ++ zebra_srv6_sid_block_free(block); ++ } ++ locator->sid_block = NULL; ++ } + +- for (ALL_LIST_ELEMENTS(srv6->locators, node, nnode, locator)) + zebra_srv6_locator_delete(locator); ++ } + return CMD_SUCCESS; + } + +@@ -297,12 +356,37 @@ DEFUN (no_srv6_locator, + "Segment Routing SRv6 locator\n" + "Specify locator-name\n") + { ++ struct zebra_srv6 *srv6 = zebra_srv6_get_default(); ++ struct zebra_srv6_sid_block *block; ++ struct listnode *node, *nnode; ++ struct zebra_srv6_sid_ctx *ctx; + struct srv6_locator *locator = zebra_srv6_locator_lookup(argv[2]->arg); + if (!locator) { + vty_out(vty, "%% Can't find SRv6 locator\n"); + return CMD_WARNING_CONFIG_FAILED; + } + ++ for (ALL_LIST_ELEMENTS(srv6->sids, node, nnode, ctx)) { ++ if (!ctx->sid || ctx->sid->locator != locator) ++ continue; ++ ++ if (ctx->sid) ++ zebra_srv6_sid_free(ctx->sid); ++ ++ listnode_delete(srv6->sids, ctx); ++ zebra_srv6_sid_ctx_free(ctx); ++ } ++ ++ block = locator->sid_block; ++ if (block) { ++ block->refcnt--; ++ if (block->refcnt == 0) { ++ listnode_delete(srv6->sid_blocks, block); ++ zebra_srv6_sid_block_free(block); ++ } ++ locator->sid_block = NULL; ++ } ++ + zebra_srv6_locator_delete(locator); + return CMD_SUCCESS; + } +@@ -323,14 +407,37 @@ DEFPY (locator_prefix, + VTY_DECLVAR_CONTEXT(srv6_locator, locator); + struct srv6_locator_chunk *chunk = NULL; + struct listnode *node = NULL; ++ uint8_t expected_prefixlen; ++ struct srv6_sid_format *format; + + locator->prefix = *prefix; + func_bit_len = func_bit_len ?: ZEBRA_SRV6_FUNCTION_LENGTH; + ++ expected_prefixlen = prefix->prefixlen; ++ format = locator->sid_format; ++ if (format) { ++ if (strmatch(format->name, SRV6_SID_FORMAT_USID_F3216_NAME)) ++ expected_prefixlen = ++ SRV6_SID_FORMAT_USID_F3216_BLOCK_LEN + ++ SRV6_SID_FORMAT_USID_F3216_NODE_LEN; ++ else if (strmatch(format->name, ++ SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME)) ++ expected_prefixlen = ++ SRV6_SID_FORMAT_UNCOMPRESSED_F4024_BLOCK_LEN + ++ SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE_LEN; ++ } ++ ++ if (prefix->prefixlen != expected_prefixlen) { ++ vty_out(vty, ++ "%% Locator prefix length '%u' inconsistent with configured format '%s'. Please either use a prefix length that is consistent with the format or change the format.\n", ++ prefix->prefixlen, format->name); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ + /* Resolve optional arguments */ + if (block_bit_len == 0 && node_bit_len == 0) { +- block_bit_len = +- prefix->prefixlen - ZEBRA_SRV6_LOCATOR_NODE_LENGTH; ++ block_bit_len = prefix->prefixlen - ++ ZEBRA_SRV6_LOCATOR_NODE_LENGTH; + node_bit_len = ZEBRA_SRV6_LOCATOR_NODE_LENGTH; + } else if (block_bit_len == 0) { + block_bit_len = prefix->prefixlen - node_bit_len; +@@ -401,7 +508,8 @@ DEFPY (locator_prefix, + } + } + +- zebra_srv6_locator_add(locator); ++ zebra_srv6_locator_format_set(locator, locator->sid_format); ++ + return CMD_SUCCESS; + } + +@@ -422,8 +530,9 @@ DEFPY (locator_behavior, + /* SRv6 locator uSID flag already set, nothing to do */ + return CMD_SUCCESS; + +- /* Remove old locator from zclients */ +- zebra_notify_srv6_locator_delete(locator); ++ if (!locator->sid_format) ++ /* Remove old locator from zclients */ ++ zebra_notify_srv6_locator_delete(locator); + + /* Set/Unset the SRV6_LOCATOR_USID */ + if (no) +@@ -431,8 +540,75 @@ DEFPY (locator_behavior, + else + SET_FLAG(locator->flags, SRV6_LOCATOR_USID); + +- /* Notify the new locator to zclients */ +- zebra_notify_srv6_locator_add(locator); ++ if (!locator->sid_format) ++ /* Notify the new locator to zclients */ ++ zebra_srv6_locator_add(locator); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFPY(locator_sid_format, ++ locator_sid_format_cmd, ++ "format $format", ++ "Configure SRv6 SID format\n" ++ "Specify usid-f3216 format\n" ++ "Specify uncompressed-f4024 format\n") ++{ ++ VTY_DECLVAR_CONTEXT(srv6_locator, locator); ++ struct srv6_sid_format *sid_format = NULL; ++ uint8_t expected_prefixlen; ++ ++ expected_prefixlen = locator->prefix.prefixlen; ++ if (strmatch(format, SRV6_SID_FORMAT_USID_F3216_NAME)) ++ expected_prefixlen = SRV6_SID_FORMAT_USID_F3216_BLOCK_LEN + ++ SRV6_SID_FORMAT_USID_F3216_NODE_LEN; ++ else if (strmatch(format, SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME)) ++ expected_prefixlen = ++ SRV6_SID_FORMAT_UNCOMPRESSED_F4024_BLOCK_LEN + ++ SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE_LEN; ++ ++ if (IPV6_ADDR_SAME(&locator->prefix, &in6addr_any)) { ++ vty_out(vty, ++ "%% Unexpected configuration sequence: the prefix of the locator is required before configuring the format. Please configure the prefix first and then configure the format.\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ if (locator->prefix.prefixlen != expected_prefixlen) { ++ vty_out(vty, ++ "%% Locator prefix length '%u' inconsistent with configured format '%s'. Please either use a prefix length that is consistent with the format or change the format.\n", ++ locator->prefix.prefixlen, format); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ sid_format = srv6_sid_format_lookup(format); ++ if (!sid_format) { ++ vty_out(vty, "%% Cannot find SRv6 SID format '%s'\n", format); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ if (sid_format == locator->sid_format) ++ /* Format has not changed, nothing to do */ ++ return CMD_SUCCESS; ++ ++ zebra_srv6_locator_format_set(locator, sid_format); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFPY (no_locator_sid_format, ++ no_locator_sid_format_cmd, ++ "no format [WORD]", ++ NO_STR ++ "Configure SRv6 SID format\n" ++ "Specify SRv6 SID format\n") ++{ ++ VTY_DECLVAR_CONTEXT(srv6_locator, locator); ++ ++ if (!locator->sid_format) ++ /* SID format already unset, nothing to do */ ++ return CMD_SUCCESS; ++ ++ zebra_srv6_locator_format_set(locator, NULL); + + return CMD_SUCCESS; + } +@@ -469,11 +645,312 @@ DEFPY (no_srv6_src_addr, + return CMD_SUCCESS; + } + ++DEFUN_NOSH(srv6_sid_formats, ++ srv6_sid_formats_cmd, ++ "formats", ++ "Segment Routing SRv6 SID formats\n") ++{ ++ vty->node = SRV6_SID_FORMATS_NODE; ++ return CMD_SUCCESS; ++} ++ ++DEFUN_NOSH (srv6_sid_format_f3216_usid, ++ srv6_sid_format_f3216_usid_cmd, ++ "format usid-f3216", ++ "Configure SRv6 SID format\n" ++ "Configure the uSID f3216 format\n") ++{ ++ struct srv6_sid_format *format; ++ ++ format = srv6_sid_format_lookup(SRV6_SID_FORMAT_USID_F3216_NAME); ++ assert(format); ++ ++ VTY_PUSH_CONTEXT(SRV6_SID_FORMAT_USID_F3216_NODE, format); ++ return CMD_SUCCESS; ++} ++ ++DEFUN(no_srv6_sid_format_f3216_usid, ++ no_srv6_sid_format_f3216_usid_cmd, ++ "no format usid-f3216", ++ NO_STR ++ "Configure SRv6 SID format\n" ++ "Configure the uSID f3216 format\n") ++{ ++ struct srv6_sid_format *format; ++ ++ format = srv6_sid_format_lookup(SRV6_SID_FORMAT_USID_F3216_NAME); ++ assert(format); ++ ++ format->config.usid.lib_start = SRV6_SID_FORMAT_USID_F3216_LIB_START; ++ format->config.usid.elib_start = SRV6_SID_FORMAT_USID_F3216_ELIB_START; ++ format->config.usid.elib_end = SRV6_SID_FORMAT_USID_F3216_ELIB_END; ++ format->config.usid.wlib_start = SRV6_SID_FORMAT_USID_F3216_WLIB_START; ++ format->config.usid.wlib_end = SRV6_SID_FORMAT_USID_F3216_WLIB_END; ++ format->config.usid.ewlib_start = SRV6_SID_FORMAT_USID_F3216_EWLIB_START; ++ ++ /* Notify zclients that the format has changed */ ++ zebra_srv6_sid_format_changed_cb(format); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFUN_NOSH (srv6_sid_format_f4024_uncompressed, ++ srv6_sid_format_uncompressed_cmd, ++ "format uncompressed-f4024", ++ "Configure SRv6 SID format\n" ++ "Configure the uncompressed f4024 format\n") ++{ ++ struct srv6_sid_format *format; ++ ++ format = srv6_sid_format_lookup(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME); ++ assert(format); ++ ++ VTY_PUSH_CONTEXT(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE, format); ++ return CMD_SUCCESS; ++} ++ ++DEFUN(no_srv6_sid_format_f4024_uncompressed, ++ no_srv6_sid_format_f4024_uncompressed_cmd, ++ "no format uncompressed-f4024", ++ NO_STR ++ "Configure SRv6 SID format\n" ++ "Configure the uncompressed f4024 format\n") ++{ ++ struct srv6_sid_format *format; ++ ++ format = srv6_sid_format_lookup(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME); ++ assert(format); ++ ++ format->config.uncompressed.explicit_start = ++ SRV6_SID_FORMAT_UNCOMPRESSED_F4024_EXPLICIT_RANGE_START; ++ ++ /* Notify zclients that the format has changed */ ++ zebra_srv6_sid_format_changed_cb(format); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFPY(srv6_sid_format_usid_lib, ++ srv6_sid_format_usid_lib_cmd, ++ "local-id-block start (0-4294967295)$start", ++ "Configure LIB\n" ++ "Configure the start value for the LIB\n" ++ "Specify the start value for the LIB\n") ++{ ++ VTY_DECLVAR_CONTEXT(srv6_sid_format, format); ++ ++ format->config.usid.lib_start = start; ++ ++ /* Notify zclients that the format has changed */ ++ zebra_srv6_sid_format_changed_cb(format); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFPY(no_srv6_sid_format_usid_lib, ++ no_srv6_sid_format_usid_lib_cmd, ++ "no local-id-block [start (0-4294967295)]", ++ NO_STR ++ "Configure LIB\n" ++ "Configure the start value for the LIB\n" ++ "Specify the start value for the LIB\n") ++{ ++ VTY_DECLVAR_CONTEXT(srv6_sid_format, format); ++ ++ if (strmatch(format->name, SRV6_SID_FORMAT_USID_F3216_NAME)) ++ format->config.usid.lib_start = ++ SRV6_SID_FORMAT_USID_F3216_LIB_START; ++ else ++ assert(0); ++ ++ /* Notify zclients that the format has changed */ ++ zebra_srv6_sid_format_changed_cb(format); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFPY(srv6_sid_format_usid_lib_explicit, ++ srv6_sid_format_usid_lib_explicit_cmd, ++ "local-id-block explicit start (0-4294967295)$start end (0-4294967295)$end", ++ "Configure LIB\n" ++ "Configure the Explicit LIB\n" ++ "Configure the start value for the Explicit LIB\n" ++ "Specify the start value for the Explicit LIB\n" ++ "Configure the end value for the Explicit LIB\n" ++ "Specify the end value for the Explicit LIB\n") ++{ ++ VTY_DECLVAR_CONTEXT(srv6_sid_format, format); ++ ++ format->config.usid.elib_start = start; ++ format->config.usid.elib_end = end; ++ ++ /* Notify zclients that the format has changed */ ++ zebra_srv6_sid_format_changed_cb(format); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFPY(no_srv6_sid_format_usid_lib_explicit, ++ no_srv6_sid_format_usid_lib_explicit_cmd, ++ "no local-id-block explicit [start (0-4294967295) end (0-4294967295)]", ++ NO_STR ++ "Configure LIB\n" ++ "Configure the Explicit LIB\n" ++ "Configure the start value for the Explicit LIB\n" ++ "Specify the start value for the Explicit LIB\n" ++ "Configure the end value for the Explicit LIB\n" ++ "Specify the end value for the Explicit LIB\n") ++{ ++ VTY_DECLVAR_CONTEXT(srv6_sid_format, format); ++ ++ if (strmatch(format->name, SRV6_SID_FORMAT_USID_F3216_NAME)) { ++ format->config.usid.elib_start = ++ SRV6_SID_FORMAT_USID_F3216_ELIB_START; ++ format->config.usid.elib_end = ++ SRV6_SID_FORMAT_USID_F3216_ELIB_END; ++ } else { ++ assert(0); ++ } ++ ++ /* Notify zclients that the format has changed */ ++ zebra_srv6_sid_format_changed_cb(format); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFPY(srv6_sid_format_usid_wlib, ++ srv6_sid_format_usid_wlib_cmd, ++ "wide-local-id-block start (0-4294967295)$start end (0-4294967295)$end", ++ "Configure Wide LIB\n" ++ "Configure the start value for the Wide LIB\n" ++ "Specify the start value for the Wide LIB\n" ++ "Configure the end value for the Wide LIB\n" ++ "Specify the end value for the Wide LIB\n") ++{ ++ VTY_DECLVAR_CONTEXT(srv6_sid_format, format); ++ ++ format->config.usid.wlib_start = start; ++ format->config.usid.wlib_end = end; ++ ++ /* Notify zclients that the format has changed */ ++ zebra_srv6_sid_format_changed_cb(format); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFPY(no_srv6_sid_format_usid_wlib, ++ no_srv6_sid_format_usid_wlib_cmd, ++ "no wide-local-id-block [start (0-4294967295) end (0-4294967295)]", ++ NO_STR ++ "Configure Wide LIB\n" ++ "Configure the start value for the Wide LIB\n" ++ "Specify the start value for the Wide LIB\n" ++ "Configure the end value for the Wide LIB\n" ++ "Specify the end value for the Wide LIB\n") ++{ ++ VTY_DECLVAR_CONTEXT(srv6_sid_format, format); ++ ++ if (strmatch(format->name, SRV6_SID_FORMAT_USID_F3216_NAME)) { ++ format->config.usid.wlib_start = ++ SRV6_SID_FORMAT_USID_F3216_WLIB_START; ++ format->config.usid.wlib_end = ++ SRV6_SID_FORMAT_USID_F3216_WLIB_END; ++ } else { ++ assert(0); ++ } ++ ++ /* Notify zclients that the format has changed */ ++ zebra_srv6_sid_format_changed_cb(format); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFPY(srv6_sid_format_usid_wide_lib_explicit, ++ srv6_sid_format_usid_wide_lib_explicit_cmd, ++ "wide-local-id-block explicit start (0-4294967295)$start", ++ "Configure Wide LIB\n" ++ "Configure Explicit Wide LIB\n" ++ "Configure the start value for the Explicit Wide LIB\n" ++ "Specify the start value for the Explicit Wide LIB\n") ++{ ++ VTY_DECLVAR_CONTEXT(srv6_sid_format, format); ++ ++ format->config.usid.ewlib_start = start; ++ ++ /* Notify zclients that the format has changed */ ++ zebra_srv6_sid_format_changed_cb(format); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFPY(no_srv6_sid_format_usid_wide_lib_explicit, ++ no_srv6_sid_format_usid_wide_lib_explicit_cmd, ++ "no wide-local-id-block explicit [start (0-4294967295)]", ++ NO_STR ++ "Configure Wide LIB\n" ++ "Configure Explicit Wide LIB\n" ++ "Configure the start value for the Explicit Wide LIB\n" ++ "Specify the start value for the Explicit Wide LIB\n") ++{ ++ VTY_DECLVAR_CONTEXT(srv6_sid_format, format); ++ ++ if (strmatch(format->name, SRV6_SID_FORMAT_USID_F3216_NAME)) ++ format->config.usid.ewlib_start = ++ SRV6_SID_FORMAT_USID_F3216_EWLIB_START; ++ else ++ assert(0); ++ ++ /* Notify zclients that the format has changed */ ++ zebra_srv6_sid_format_changed_cb(format); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFPY(srv6_sid_format_explicit, ++ srv6_sid_format_explicit_cmd, ++ "explicit start (0-4294967295)$start", ++ "Configure Explicit range\n" ++ "Configure the start value for the Explicit range\n" ++ "Specify the start value for the Explicit range\n") ++{ ++ VTY_DECLVAR_CONTEXT(srv6_sid_format, format); ++ ++ format->config.uncompressed.explicit_start = start; ++ ++ /* Notify zclients that the format has changed */ ++ zebra_srv6_sid_format_changed_cb(format); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFPY(no_srv6_sid_format_explicit, ++ no_srv6_sid_format_explicit_cmd, ++ "no explicit [start (0-4294967295)$start]", ++ NO_STR ++ "Configure Explicit range\n" ++ "Configure the start value for the Explicit range\n" ++ "Specify the start value for the Explicit range\n") ++{ ++ VTY_DECLVAR_CONTEXT(srv6_sid_format, format); ++ ++ if (strmatch(format->name, SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME)) ++ format->config.usid.ewlib_start = ++ SRV6_SID_FORMAT_UNCOMPRESSED_F4024_EXPLICIT_RANGE_START; ++ else ++ assert(0); ++ ++ /* Notify zclients that the format has changed */ ++ zebra_srv6_sid_format_changed_cb(format); ++ ++ return CMD_SUCCESS; ++} ++ + static int zebra_sr_config(struct vty *vty) + { + struct zebra_srv6 *srv6 = zebra_srv6_get_default(); + struct listnode *node; + struct srv6_locator *locator; ++ struct srv6_sid_format *format; + char str[256]; + bool display_source_srv6 = false; + +@@ -515,6 +992,54 @@ static int zebra_sr_config(struct vty *vty) + vty_out(vty, "\n"); + if (CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) + vty_out(vty, " behavior usid\n"); ++ if (locator->sid_format) { ++ format = locator->sid_format; ++ vty_out(vty, " format %s\n", format->name); ++ } ++ vty_out(vty, " exit\n"); ++ vty_out(vty, " !\n"); ++ } ++ vty_out(vty, " exit\n"); ++ vty_out(vty, " !\n"); ++ vty_out(vty, " formats\n"); ++ for (ALL_LIST_ELEMENTS_RO(srv6->sid_formats, node, format)) { ++ if (format->type == SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) { ++ vty_out(vty, " format %s\n", format->name); ++ if (format->config.uncompressed.explicit_start != ++ SRV6_SID_FORMAT_UNCOMPRESSED_F4024_EXPLICIT_RANGE_START) ++ vty_out(vty, " explicit start %u\n", ++ format->config.uncompressed ++ .explicit_start); ++ } ++ if (format->type == SRV6_SID_FORMAT_TYPE_USID) { ++ vty_out(vty, " format %s\n", format->name); ++ if (format->config.usid.lib_start != ++ SRV6_SID_FORMAT_USID_F3216_LIB_START) ++ vty_out(vty, ++ " local-id-block start %u\n", ++ format->config.usid.lib_start); ++ if (format->config.usid.elib_start != ++ SRV6_SID_FORMAT_USID_F3216_ELIB_START || ++ format->config.usid.elib_end != ++ SRV6_SID_FORMAT_USID_F3216_ELIB_END) ++ vty_out(vty, ++ " local-id-block explicit start %u end %u\n", ++ format->config.usid.elib_start, ++ format->config.usid.elib_end); ++ if (format->config.usid.wlib_start != ++ SRV6_SID_FORMAT_USID_F3216_WLIB_START || ++ format->config.usid.wlib_end != ++ SRV6_SID_FORMAT_USID_F3216_WLIB_END) ++ vty_out(vty, ++ " wide-local-id-block start %u end %u\n", ++ format->config.usid.wlib_start, ++ format->config.usid.wlib_end); ++ if (format->config.usid.ewlib_start != ++ SRV6_SID_FORMAT_USID_F3216_EWLIB_START) ++ vty_out(vty, ++ " wide-local-id-block explicit start %u\n", ++ format->config.usid.ewlib_start); ++ } + vty_out(vty, " exit\n"); + vty_out(vty, " !\n"); + } +@@ -538,11 +1063,17 @@ void zebra_srv6_vty_init(void) + install_node(&srv6_locs_node); + install_node(&srv6_loc_node); + install_node(&srv6_encap_node); ++ install_node(&srv6_sid_formats_node); ++ install_node(&srv6_sid_format_usid_f3216_node); ++ install_node(&srv6_sid_format_uncompressed_f4024_node); + install_default(SEGMENT_ROUTING_NODE); + install_default(SRV6_NODE); + install_default(SRV6_LOCS_NODE); + install_default(SRV6_LOC_NODE); + install_default(SRV6_ENCAP_NODE); ++ install_default(SRV6_SID_FORMATS_NODE); ++ install_default(SRV6_SID_FORMAT_USID_F3216_NODE); ++ install_default(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE); + + /* Command for change node */ + install_element(CONFIG_NODE, &segment_routing_cmd); +@@ -550,14 +1081,44 @@ void zebra_srv6_vty_init(void) + install_element(SEGMENT_ROUTING_NODE, &no_srv6_cmd); + install_element(SRV6_NODE, &srv6_locators_cmd); + install_element(SRV6_NODE, &srv6_encap_cmd); ++ install_element(SRV6_NODE, &srv6_sid_formats_cmd); + install_element(SRV6_LOCS_NODE, &srv6_locator_cmd); + install_element(SRV6_LOCS_NODE, &no_srv6_locator_cmd); ++ install_element(SRV6_SID_FORMATS_NODE, &srv6_sid_format_f3216_usid_cmd); ++ install_element(SRV6_SID_FORMATS_NODE, ++ &srv6_sid_format_uncompressed_cmd); ++ install_element(SRV6_SID_FORMATS_NODE, ++ &no_srv6_sid_format_f3216_usid_cmd); ++ install_element(SRV6_SID_FORMATS_NODE, ++ &no_srv6_sid_format_f4024_uncompressed_cmd); + + /* Command for configuration */ + install_element(SRV6_LOC_NODE, &locator_prefix_cmd); + install_element(SRV6_LOC_NODE, &locator_behavior_cmd); ++ install_element(SRV6_LOC_NODE, &locator_sid_format_cmd); ++ install_element(SRV6_LOC_NODE, &no_locator_sid_format_cmd); + install_element(SRV6_ENCAP_NODE, &srv6_src_addr_cmd); + install_element(SRV6_ENCAP_NODE, &no_srv6_src_addr_cmd); ++ install_element(SRV6_SID_FORMAT_USID_F3216_NODE, ++ &srv6_sid_format_usid_lib_cmd); ++ install_element(SRV6_SID_FORMAT_USID_F3216_NODE, ++ &no_srv6_sid_format_usid_lib_cmd); ++ install_element(SRV6_SID_FORMAT_USID_F3216_NODE, ++ &srv6_sid_format_usid_lib_explicit_cmd); ++ install_element(SRV6_SID_FORMAT_USID_F3216_NODE, ++ &no_srv6_sid_format_usid_lib_explicit_cmd); ++ install_element(SRV6_SID_FORMAT_USID_F3216_NODE, ++ &srv6_sid_format_usid_wlib_cmd); ++ install_element(SRV6_SID_FORMAT_USID_F3216_NODE, ++ &no_srv6_sid_format_usid_wlib_cmd); ++ install_element(SRV6_SID_FORMAT_USID_F3216_NODE, ++ &srv6_sid_format_usid_wide_lib_explicit_cmd); ++ install_element(SRV6_SID_FORMAT_USID_F3216_NODE, ++ &no_srv6_sid_format_usid_wide_lib_explicit_cmd); ++ install_element(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE, ++ &srv6_sid_format_explicit_cmd); ++ install_element(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE, ++ &no_srv6_sid_format_explicit_cmd); + + /* Command for operation */ + install_element(VIEW_NODE, &show_srv6_locator_cmd); diff --git a/src/sonic-frr/patch/0068-bgpd-Extend-BGP-to-communicate-with-the-SRv6-SID-Manager-to-allocate-release-SRv6-SIDs.patch b/src/sonic-frr/patch/0068-bgpd-Extend-BGP-to-communicate-with-the-SRv6-SID-Manager-to-allocate-release-SRv6-SIDs.patch new file mode 100644 index 00000000000..df60dfa9404 --- /dev/null +++ b/src/sonic-frr/patch/0068-bgpd-Extend-BGP-to-communicate-with-the-SRv6-SID-Manager-to-allocate-release-SRv6-SIDs.patch @@ -0,0 +1,1126 @@ +From c50b4b9afc2a23369f1fd26e5c8bd47a412fa04f Mon Sep 17 00:00:00 2001 + +From: Carmine Scarpitta + +Subject: [PATCH 01/10] bgpd: Add API to get SRv6 locator info + +Add an API to request information from the SRv6 SID Manager (zebra) +regarding a specific SRv6 locator. + +Signed-off-by: Carmine Scarpitta +--- + bgpd/bgp_mplsvpn.c | 293 +++++++++++++++++++++------------------ + bgpd/bgp_mplsvpn.h | 2 + bgpd/bgp_vty.c | 38 +++-- + bgpd/bgp_zebra.c | 394 ++++++++++++++++++++++++++++++++++++++++++++++++++-- + bgpd/bgp_zebra.h | 7 + + bgpd/bgpd.c | 17 ++ + bgpd/bgpd.h | 5 - + 7 files changed, 588 insertions(+), 168 deletions(-) + +diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c +index ef8ca39e8..29644b19f 100644 +--- a/bgpd/bgp_mplsvpn.c ++++ b/bgpd/bgp_mplsvpn.c +@@ -491,6 +491,7 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi) + { + int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL); + struct seg6local_context seg6localctx = {}; ++ struct srv6_sid_ctx ctx = {}; + + if (bgp->vrf_id == VRF_UNKNOWN) { + if (debug) +@@ -523,6 +524,11 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi) + XFREE(MTYPE_BGP_SRV6_SID, + bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent); + bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent = NULL; ++ ++ ctx.vrf_id = bgp->vrf_id; ++ ctx.behavior = afi == AFI_IP ? ZEBRA_SEG6_LOCAL_ACTION_END_DT4 ++ : ZEBRA_SEG6_LOCAL_ACTION_END_DT6; ++ bgp_zebra_release_srv6_sid(&ctx); + } + + /* +@@ -533,6 +539,7 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp) + { + int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL); + struct seg6local_context seg6localctx = {}; ++ struct srv6_sid_ctx ctx = {}; + + if (bgp->vrf_id == VRF_UNKNOWN) { + if (debug) +@@ -561,6 +568,10 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp) + &seg6localctx); + XFREE(MTYPE_BGP_SRV6_SID, bgp->tovpn_zebra_vrf_sid_last_sent); + bgp->tovpn_zebra_vrf_sid_last_sent = NULL; ++ ++ ctx.vrf_id = bgp->vrf_id; ++ ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT46; ++ bgp_zebra_release_srv6_sid(&ctx); + } + + /* +@@ -637,8 +648,8 @@ int vpn_leak_label_callback( + return 0; + } + +-static void sid_register(struct bgp *bgp, const struct in6_addr *sid, +- const char *locator_name) ++void sid_register(struct bgp *bgp, const struct in6_addr *sid, ++ const char *locator_name) + { + struct bgp_srv6_function *func; + func = XCALLOC(MTYPE_BGP_SRV6_FUNCTION, +@@ -677,108 +688,97 @@ static bool sid_exist(struct bgp *bgp, const struct in6_addr *sid) + return false; + } + +-/* +- * This function generates a new SID based on bgp->srv6_locator_chunks and +- * index. The locator and generated SID are stored in arguments sid_locator +- * and sid, respectively. ++/** ++ * Return the SRv6 SID value obtained by composing the LOCATOR and FUNCTION. + * +- * if index != 0: try to allocate as index-mode +- * else: try to allocate as auto-mode ++ * @param sid_value SRv6 SID value returned ++ * @param locator Parent locator of the SRv6 SID ++ * @param sid_func Function part of the SID ++ * @return True if success, False otherwise + */ +-static uint32_t alloc_new_sid(struct bgp *bgp, uint32_t index, +- struct srv6_locator_chunk *sid_locator_chunk, +- struct in6_addr *sid) ++static bool srv6_sid_compose(struct in6_addr *sid_value, ++ struct srv6_locator *locator, uint32_t sid_func) + { + int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL); +- struct listnode *node; +- struct srv6_locator_chunk *chunk; +- bool alloced = false; + int label = 0; + uint8_t offset = 0; + uint8_t func_len = 0, shift_len = 0; +- uint32_t index_max = 0; ++ uint32_t sid_func_max = 0; + +- if (!bgp || !sid_locator_chunk || !sid) ++ if (!locator || !sid_value) + return false; + +- for (ALL_LIST_ELEMENTS_RO(bgp->srv6_locator_chunks, node, chunk)) { +- if (chunk->function_bits_length > +- BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH) { +- if (debug) +- zlog_debug( +- "%s: invalid SRv6 Locator chunk (%pFX): Function Length must be less or equal to %d", +- __func__, &chunk->prefix, +- BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH); +- continue; +- } ++ if (locator->function_bits_length > ++ BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH) { ++ if (debug) ++ zlog_debug("%s: invalid SRv6 Locator (%pFX): Function Length must be less or equal to %d", ++ __func__, &locator->prefix, ++ BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH); ++ return false; ++ } + +- index_max = (1 << chunk->function_bits_length) - 1; ++ /* Max value that can be encoded in the Function part of the SID */ ++ sid_func_max = (1 << locator->function_bits_length) - 1; + +- if (index > index_max) { +- if (debug) +- zlog_debug( +- "%s: skipped SRv6 Locator chunk (%pFX): Function Length is too short to support specified index (%u)", +- __func__, &chunk->prefix, index); +- continue; +- } ++ if (sid_func > sid_func_max) { ++ if (debug) ++ zlog_debug("%s: invalid SRv6 Locator (%pFX): Function Length is too short to support specified function (%u)", ++ __func__, &locator->prefix, sid_func); ++ return false; ++ } + +- *sid = chunk->prefix.prefix; +- *sid_locator_chunk = *chunk; +- offset = chunk->block_bits_length + chunk->node_bits_length; +- func_len = chunk->function_bits_length; +- shift_len = BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH - func_len; ++ /** ++ * Let's build the SID value. ++ * sid_value = LOC:FUNC:: ++ */ + +- if (index != 0) { +- label = index << shift_len; +- if (label < MPLS_LABEL_UNRESERVED_MIN) { +- if (debug) +- zlog_debug( +- "%s: skipped to allocate SRv6 SID (%pFX): Label (%u) is too small to use", +- __func__, &chunk->prefix, +- label); +- continue; +- } ++ /* First, we put the locator (LOC) in the most significant bits of sid_value */ ++ *sid_value = locator->prefix.prefix; + +- transpose_sid(sid, label, offset, func_len); +- if (sid_exist(bgp, sid)) +- continue; +- alloced = true; +- break; +- } ++ /* ++ * Then, we compute the offset at which we have to place the function (FUNC). ++ * FUNC will be placed immediately after LOC, i.e. at block_bits_length + node_bits_length ++ */ ++ offset = locator->block_bits_length + locator->node_bits_length; + +- for (uint32_t i = 1; i < index_max; i++) { +- label = i << shift_len; +- if (label < MPLS_LABEL_UNRESERVED_MIN) { +- if (debug) +- zlog_debug( +- "%s: skipped to allocate SRv6 SID (%pFX): Label (%u) is too small to use", +- __func__, &chunk->prefix, +- label); +- continue; +- } +- transpose_sid(sid, label, offset, func_len); +- if (sid_exist(bgp, sid)) +- continue; +- alloced = true; +- break; +- } ++ /* ++ * The FUNC part of the SID is advertised in the label field of SRv6 Service TLV. ++ * (see SID Transposition Scheme, RFC 9252 section #4). ++ * Therefore, we need to encode the FUNC in the most significant bits of the ++ * 20-bit label. ++ */ ++ func_len = locator->function_bits_length; ++ shift_len = BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH - func_len; ++ ++ label = sid_func << shift_len; ++ if (label < MPLS_LABEL_UNRESERVED_MIN) { ++ if (debug) ++ zlog_debug("%s: skipped to allocate SRv6 SID (%pFX): Label (%u) is too small to use", ++ __func__, &locator->prefix, label); ++ return false; + } + +- if (!alloced) +- return 0; ++ if (sid_exist(bgp_get_default(), sid_value)) { ++ zlog_warn("%s: skipped to allocate SRv6 SID (%pFX): SID %pI6 already in use", ++ __func__, &locator->prefix, sid_value); ++ return false; ++ } + +- sid_register(bgp, sid, bgp->srv6_locator_name); +- return label; ++ /* Finally, we put the FUNC in sid_value at the computed offset */ ++ transpose_sid(sid_value, label, offset, func_len); ++ ++ return true; + } + + void ensure_vrf_tovpn_sid_per_af(struct bgp *bgp_vpn, struct bgp *bgp_vrf, + afi_t afi) + { + int debug = BGP_DEBUG(vpn, VPN_LEAK_FROM_VRF); +- struct srv6_locator_chunk *tovpn_sid_locator; +- struct in6_addr *tovpn_sid; +- uint32_t tovpn_sid_index = 0, tovpn_sid_transpose_label; ++ struct in6_addr tovpn_sid = {}; ++ uint32_t tovpn_sid_index = 0; + bool tovpn_sid_auto = false; ++ struct srv6_sid_ctx ctx = {}; ++ uint32_t sid_func; + + if (debug) + zlog_debug("%s: try to allocate new SID for vrf %s: afi %s", +@@ -790,10 +790,17 @@ void ensure_vrf_tovpn_sid_per_af(struct bgp *bgp_vpn, struct bgp *bgp_vrf, + + /* + * skip when bgp vpn instance ins't allocated +- * or srv6 locator chunk isn't allocated ++ * or srv6 locator isn't allocated + */ +- if (!bgp_vpn || !bgp_vpn->srv6_locator_chunks) ++ if (!bgp_vpn || !bgp_vpn->srv6_locator) ++ return; ++ ++ if (bgp_vrf->vrf_id == VRF_UNKNOWN) { ++ if (debug) ++ zlog_debug("%s: vrf %s: vrf_id not set, can't set zebra vrf SRv6 SID", ++ __func__, bgp_vrf->name_pretty); + return; ++ } + + tovpn_sid_index = bgp_vrf->vpn_policy[afi].tovpn_sid_index; + tovpn_sid_auto = CHECK_FLAG(bgp_vrf->vpn_policy[afi].flags, +@@ -810,40 +817,34 @@ void ensure_vrf_tovpn_sid_per_af(struct bgp *bgp_vpn, struct bgp *bgp_vrf, + return; + } + +- tovpn_sid_locator = srv6_locator_chunk_alloc(); +- tovpn_sid = XCALLOC(MTYPE_BGP_SRV6_SID, sizeof(struct in6_addr)); +- +- tovpn_sid_transpose_label = alloc_new_sid(bgp_vpn, tovpn_sid_index, +- tovpn_sid_locator, tovpn_sid); ++ if (!tovpn_sid_auto) { ++ if (!srv6_sid_compose(&tovpn_sid, bgp_vpn->srv6_locator, ++ tovpn_sid_index)) { ++ zlog_err("%s: failed to compose sid for vrf %s: afi %s", ++ __func__, bgp_vrf->name_pretty, afi2str(afi)); ++ return; ++ } ++ } + +- if (tovpn_sid_transpose_label == 0) { +- if (debug) +- zlog_debug( +- "%s: not allocated new sid for vrf %s: afi %s", +- __func__, bgp_vrf->name_pretty, afi2str(afi)); +- srv6_locator_chunk_free(&tovpn_sid_locator); +- XFREE(MTYPE_BGP_SRV6_SID, tovpn_sid); ++ ctx.vrf_id = bgp_vrf->vrf_id; ++ ctx.behavior = afi == AFI_IP ? ZEBRA_SEG6_LOCAL_ACTION_END_DT4 ++ : ZEBRA_SEG6_LOCAL_ACTION_END_DT6; ++ if (!bgp_zebra_request_srv6_sid(&ctx, &tovpn_sid, ++ bgp_vpn->srv6_locator_name, &sid_func)) { ++ zlog_err("%s: failed to request sid for vrf %s: afi %s", ++ __func__, bgp_vrf->name_pretty, afi2str(afi)); + return; + } +- +- if (debug) +- zlog_debug("%s: new sid %pI6 allocated for vrf %s: afi %s", +- __func__, tovpn_sid, bgp_vrf->name_pretty, +- afi2str(afi)); +- +- bgp_vrf->vpn_policy[afi].tovpn_sid = tovpn_sid; +- bgp_vrf->vpn_policy[afi].tovpn_sid_locator = tovpn_sid_locator; +- bgp_vrf->vpn_policy[afi].tovpn_sid_transpose_label = +- tovpn_sid_transpose_label; + } + + void ensure_vrf_tovpn_sid_per_vrf(struct bgp *bgp_vpn, struct bgp *bgp_vrf) + { + int debug = BGP_DEBUG(vpn, VPN_LEAK_FROM_VRF); +- struct srv6_locator_chunk *tovpn_sid_locator; +- struct in6_addr *tovpn_sid; +- uint32_t tovpn_sid_index = 0, tovpn_sid_transpose_label; ++ struct in6_addr tovpn_sid = {}; ++ uint32_t tovpn_sid_index = 0; + bool tovpn_sid_auto = false; ++ struct srv6_sid_ctx ctx = {}; ++ uint32_t sid_func; + + if (debug) + zlog_debug("%s: try to allocate new SID for vrf %s", __func__, +@@ -855,11 +856,18 @@ void ensure_vrf_tovpn_sid_per_vrf(struct bgp *bgp_vpn, struct bgp *bgp_vrf) + + /* + * skip when bgp vpn instance ins't allocated +- * or srv6 locator chunk isn't allocated ++ * or srv6 locator isn't allocated + */ +- if (!bgp_vpn || !bgp_vpn->srv6_locator_chunks) ++ if (!bgp_vpn || !bgp_vpn->srv6_locator) + return; + ++ if (bgp_vrf->vrf_id == VRF_UNKNOWN) { ++ if (debug) ++ zlog_debug("%s: vrf %s: vrf_id not set, can't set zebra vrf SRv6 SID", ++ __func__, bgp_vrf->name_pretty); ++ return; ++ } ++ + tovpn_sid_index = bgp_vrf->tovpn_sid_index; + tovpn_sid_auto = CHECK_FLAG(bgp_vrf->vrf_flags, BGP_VRF_TOVPN_SID_AUTO); + +@@ -874,28 +882,23 @@ void ensure_vrf_tovpn_sid_per_vrf(struct bgp *bgp_vpn, struct bgp *bgp_vrf) + return; + } + +- tovpn_sid_locator = srv6_locator_chunk_alloc(); +- tovpn_sid = XCALLOC(MTYPE_BGP_SRV6_SID, sizeof(struct in6_addr)); +- +- tovpn_sid_transpose_label = alloc_new_sid(bgp_vpn, tovpn_sid_index, +- tovpn_sid_locator, tovpn_sid); ++ if (!tovpn_sid_auto) { ++ if (!srv6_sid_compose(&tovpn_sid, bgp_vpn->srv6_locator, ++ bgp_vrf->tovpn_sid_index)) { ++ zlog_err("%s: failed to compose new sid for vrf %s", ++ __func__, bgp_vrf->name_pretty); ++ return; ++ } ++ } + +- if (tovpn_sid_transpose_label == 0) { +- if (debug) +- zlog_debug("%s: not allocated new sid for vrf %s", +- __func__, bgp_vrf->name_pretty); +- srv6_locator_chunk_free(&tovpn_sid_locator); +- XFREE(MTYPE_BGP_SRV6_SID, tovpn_sid); ++ ctx.vrf_id = bgp_vrf->vrf_id; ++ ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT46; ++ if (!bgp_zebra_request_srv6_sid(&ctx, &tovpn_sid, ++ bgp_vpn->srv6_locator_name, &sid_func)) { ++ zlog_err("%s: failed to request new sid for vrf %s", __func__, ++ bgp_vrf->name_pretty); + return; + } +- +- if (debug) +- zlog_debug("%s: new sid %pI6 allocated for vrf %s", __func__, +- tovpn_sid, bgp_vrf->name_pretty); +- +- bgp_vrf->tovpn_sid = tovpn_sid; +- bgp_vrf->tovpn_sid_locator = tovpn_sid_locator; +- bgp_vrf->tovpn_sid_transpose_label = tovpn_sid_transpose_label; + } + + void ensure_vrf_tovpn_sid(struct bgp *bgp_vpn, struct bgp *bgp_vrf, afi_t afi) +@@ -918,6 +921,7 @@ void delete_vrf_tovpn_sid_per_af(struct bgp *bgp_vpn, struct bgp *bgp_vrf, + int debug = BGP_DEBUG(vpn, VPN_LEAK_FROM_VRF); + uint32_t tovpn_sid_index = 0; + bool tovpn_sid_auto = false; ++ struct srv6_sid_ctx ctx = {}; + + if (debug) + zlog_debug("%s: try to remove SID for vrf %s: afi %s", __func__, +@@ -931,9 +935,22 @@ void delete_vrf_tovpn_sid_per_af(struct bgp *bgp_vpn, struct bgp *bgp_vrf, + if (tovpn_sid_index != 0 || tovpn_sid_auto) + return; + +- srv6_locator_chunk_free(&bgp_vrf->vpn_policy[afi].tovpn_sid_locator); ++ if (bgp_vrf->vrf_id == VRF_UNKNOWN) { ++ if (debug) ++ zlog_debug("%s: vrf %s: vrf_id not set, can't set zebra vrf label", ++ __func__, bgp_vrf->name_pretty); ++ return; ++ } ++ ++ srv6_locator_free(bgp_vrf->vpn_policy[afi].tovpn_sid_locator); ++ bgp_vrf->vpn_policy[afi].tovpn_sid_locator = NULL; + + if (bgp_vrf->vpn_policy[afi].tovpn_sid) { ++ ctx.vrf_id = bgp_vrf->vrf_id; ++ ctx.behavior = afi == AFI_IP ? ZEBRA_SEG6_LOCAL_ACTION_END_DT4 ++ : ZEBRA_SEG6_LOCAL_ACTION_END_DT6; ++ bgp_zebra_release_srv6_sid(&ctx); ++ + sid_unregister(bgp_vpn, bgp_vrf->vpn_policy[afi].tovpn_sid); + XFREE(MTYPE_BGP_SRV6_SID, bgp_vrf->vpn_policy[afi].tovpn_sid); + } +@@ -945,6 +962,7 @@ void delete_vrf_tovpn_sid_per_vrf(struct bgp *bgp_vpn, struct bgp *bgp_vrf) + int debug = BGP_DEBUG(vpn, VPN_LEAK_FROM_VRF); + uint32_t tovpn_sid_index = 0; + bool tovpn_sid_auto = false; ++ struct srv6_sid_ctx ctx = {}; + + if (debug) + zlog_debug("%s: try to remove SID for vrf %s", __func__, +@@ -958,9 +976,21 @@ void delete_vrf_tovpn_sid_per_vrf(struct bgp *bgp_vpn, struct bgp *bgp_vrf) + if (tovpn_sid_index != 0 || tovpn_sid_auto) + return; + +- srv6_locator_chunk_free(&bgp_vrf->tovpn_sid_locator); ++ if (bgp_vrf->vrf_id == VRF_UNKNOWN) { ++ if (debug) ++ zlog_debug("%s: vrf %s: vrf_id not set, can't set zebra vrf label", ++ __func__, bgp_vrf->name_pretty); ++ return; ++ } ++ ++ srv6_locator_free(bgp_vrf->tovpn_sid_locator); ++ bgp_vrf->tovpn_sid_locator = NULL; + + if (bgp_vrf->tovpn_sid) { ++ ctx.vrf_id = bgp_vrf->vrf_id; ++ ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT46; ++ bgp_zebra_release_srv6_sid(&ctx); ++ + sid_unregister(bgp_vpn, bgp_vrf->tovpn_sid); + XFREE(MTYPE_BGP_SRV6_SID, bgp_vrf->tovpn_sid); + } +@@ -1829,8 +1859,9 @@ void vpn_leak_from_vrf_update(struct bgp *to_bgp, /* to */ + + /* Set SID for SRv6 VPN */ + if (from_bgp->vpn_policy[afi].tovpn_sid_locator) { +- struct srv6_locator_chunk *locator = ++ struct srv6_locator *locator = + from_bgp->vpn_policy[afi].tovpn_sid_locator; ++ + encode_label( + from_bgp->vpn_policy[afi].tovpn_sid_transpose_label, + &label); +@@ -1871,8 +1902,8 @@ void vpn_leak_from_vrf_update(struct bgp *to_bgp, /* to */ + .tovpn_sid_locator->prefix.prefix, + sizeof(struct in6_addr)); + } else if (from_bgp->tovpn_sid_locator) { +- struct srv6_locator_chunk *locator = +- from_bgp->tovpn_sid_locator; ++ struct srv6_locator *locator = from_bgp->tovpn_sid_locator; ++ + encode_label(from_bgp->tovpn_sid_transpose_label, &label); + static_attr.srv6_l3vpn = + XCALLOC(MTYPE_BGP_SRV6_L3VPN, +diff --git a/bgpd/bgp_mplsvpn.h b/bgpd/bgp_mplsvpn.h +index cd2589996..0593a736d 100644 +--- a/bgpd/bgp_mplsvpn.h ++++ b/bgpd/bgp_mplsvpn.h +@@ -429,6 +429,8 @@ struct bgp_mplsvpn_nh_label_bind_cache *bgp_mplsvpn_nh_label_bind_find( + struct bgp_mplsvpn_nh_label_bind_cache_head *tree, struct prefix *p, + mpls_label_t orig_label); + void bgp_mplsvpn_nexthop_init(void); ++extern void sid_register(struct bgp *bgp, const struct in6_addr *sid, ++ const char *locator_name); + extern void sid_unregister(struct bgp *bgp, const struct in6_addr *sid); + + #endif /* _QUAGGA_BGP_MPLSVPN_H */ +diff --git a/bgpd/bgp_vty.c b/bgpd/bgp_vty.c +index 9530a66fc..4b30f087c 100644 +--- a/bgpd/bgp_vty.c ++++ b/bgpd/bgp_vty.c +@@ -298,18 +298,11 @@ static const char *get_afi_safi_json_str(afi_t afi, safi_t safi) + /* unset srv6 locator */ + static int bgp_srv6_locator_unset(struct bgp *bgp) + { +- int ret; + struct listnode *node, *nnode; + struct srv6_locator_chunk *chunk; + struct bgp_srv6_function *func; + struct bgp *bgp_vrf; + +- /* release chunk notification via ZAPI */ +- ret = bgp_zebra_srv6_manager_release_locator_chunk( +- bgp->srv6_locator_name); +- if (ret < 0) +- return -1; +- + /* refresh chunks */ + for (ALL_LIST_ELEMENTS(bgp->srv6_locator_chunks, node, nnode, chunk)) { + listnode_delete(bgp->srv6_locator_chunks, chunk); +@@ -348,20 +341,28 @@ static int bgp_srv6_locator_unset(struct bgp *bgp) + continue; + + /* refresh vpnv4 tovpn_sid_locator */ +- srv6_locator_chunk_free( +- &bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator); ++ srv6_locator_free(bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator); ++ bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator = NULL; + + /* refresh vpnv6 tovpn_sid_locator */ +- srv6_locator_chunk_free( +- &bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator); ++ srv6_locator_free( ++ bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator); ++ bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator = NULL; + + /* refresh per-vrf tovpn_sid_locator */ +- srv6_locator_chunk_free(&bgp_vrf->tovpn_sid_locator); ++ srv6_locator_free(bgp_vrf->tovpn_sid_locator); ++ bgp_vrf->tovpn_sid_locator = NULL; + } + + /* clear locator name */ + memset(bgp->srv6_locator_name, 0, sizeof(bgp->srv6_locator_name)); + ++ /* clear SRv6 locator */ ++ if (bgp->srv6_locator) { ++ srv6_locator_free(bgp->srv6_locator); ++ bgp->srv6_locator = NULL; ++ } ++ + return 0; + } + +@@ -10515,7 +10516,7 @@ DEFPY (bgp_srv6_locator, + snprintf(bgp->srv6_locator_name, + sizeof(bgp->srv6_locator_name), "%s", name); + +- ret = bgp_zebra_srv6_manager_get_locator_chunk(name); ++ ret = bgp_zebra_srv6_manager_get_locator(name); + if (ret < 0) + return CMD_WARNING_CONFIG_FAILED; + +@@ -10566,6 +10567,17 @@ DEFPY (show_bgp_srv6, + return CMD_SUCCESS; + + vty_out(vty, "locator_name: %s\n", bgp->srv6_locator_name); ++ if (bgp->srv6_locator) { ++ vty_out(vty, " prefix: %pFX\n", &bgp->srv6_locator->prefix); ++ vty_out(vty, " block-length: %d\n", ++ bgp->srv6_locator->block_bits_length); ++ vty_out(vty, " node-length: %d\n", ++ bgp->srv6_locator->node_bits_length); ++ vty_out(vty, " func-length: %d\n", ++ bgp->srv6_locator->function_bits_length); ++ vty_out(vty, " arg-length: %d\n", ++ bgp->srv6_locator->argument_bits_length); ++ } + vty_out(vty, "locator_chunks:\n"); + for (ALL_LIST_ELEMENTS_RO(bgp->srv6_locator_chunks, node, chunk)) { + vty_out(vty, "- %pFX\n", &chunk->prefix); +diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c +index d553d3d27..03c0be0bf 100644 +--- a/bgpd/bgp_zebra.c ++++ b/bgpd/bgp_zebra.c +@@ -3359,11 +3359,278 @@ static int bgp_zebra_process_srv6_locator_chunk(ZAPI_CALLBACK_ARGS) + return 0; + } + ++/** ++ * Internal function to process an SRv6 locator ++ * ++ * @param locator The locator to be processed ++ */ ++static int bgp_zebra_process_srv6_locator_internal(struct srv6_locator *locator) ++{ ++ struct bgp *bgp = bgp_get_default(); ++ ++ if (!bgp || !bgp->srv6_enabled || !locator) ++ return -1; ++ ++ /* ++ * Check if the main BGP instance is configured to use the received ++ * locator ++ */ ++ if (strcmp(bgp->srv6_locator_name, locator->name) != 0) { ++ zlog_err("%s: SRv6 Locator name unmatch %s:%s", __func__, ++ bgp->srv6_locator_name, locator->name); ++ return 0; ++ } ++ ++ zlog_info("%s: Received SRv6 locator %s %pFX, loc-block-len=%u, loc-node-len=%u func-len=%u, arg-len=%u", ++ __func__, locator->name, &locator->prefix, ++ locator->block_bits_length, locator->node_bits_length, ++ locator->function_bits_length, locator->argument_bits_length); ++ ++ /* Store the locator in the main BGP instance */ ++ bgp->srv6_locator = srv6_locator_alloc(locator->name); ++ srv6_locator_copy(bgp->srv6_locator, locator); ++ ++ /* ++ * Process VPN-to-VRF and VRF-to-VPN leaks to advertise new locator ++ * and SIDs. ++ */ ++ vpn_leak_postchange_all(); ++ ++ return 0; ++} ++ ++static int bgp_zebra_srv6_sid_notify(ZAPI_CALLBACK_ARGS) ++{ ++ struct bgp *bgp = bgp_get_default(); ++ struct srv6_locator *locator; ++ struct srv6_sid_ctx ctx; ++ struct in6_addr sid_addr; ++ enum zapi_srv6_sid_notify note; ++ struct bgp *bgp_vrf; ++ struct vrf *vrf; ++ struct listnode *node, *nnode; ++ char buf[256]; ++ struct in6_addr *tovpn_sid; ++ struct prefix_ipv6 tmp_prefix; ++ uint32_t sid_func; ++ bool found = false; ++ ++ if (!bgp || !bgp->srv6_enabled) ++ return -1; ++ ++ if (!bgp->srv6_locator) { ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug("%s: ignoring SRv6 SID notify: locator not set", ++ __func__); ++ return -1; ++ } ++ ++ /* Decode the received notification message */ ++ if (!zapi_srv6_sid_notify_decode(zclient->ibuf, &ctx, &sid_addr, ++ &sid_func, NULL, ¬e, NULL)) { ++ zlog_err("%s : error in msg decode", __func__); ++ return -1; ++ } ++ ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug("%s: received SRv6 SID notify: ctx %s sid_value %pI6 %s", ++ __func__, srv6_sid_ctx2str(buf, sizeof(buf), &ctx), ++ &sid_addr, zapi_srv6_sid_notify2str(note)); ++ ++ /* Get the BGP instance for which the SID has been requested, if any */ ++ for (ALL_LIST_ELEMENTS(bm->bgp, node, nnode, bgp_vrf)) { ++ vrf = vrf_lookup_by_id(bgp_vrf->vrf_id); ++ if (!vrf) ++ continue; ++ ++ if (vrf->vrf_id == ctx.vrf_id) { ++ found = true; ++ break; ++ } ++ } ++ ++ if (!found) { ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug("%s: ignoring SRv6 SID notify: No VRF suitable for received SID ctx %s sid_value %pI6", ++ __func__, ++ srv6_sid_ctx2str(buf, sizeof(buf), &ctx), ++ &sid_addr); ++ return -1; ++ } ++ ++ /* Handle notification */ ++ switch (note) { ++ case ZAPI_SRV6_SID_ALLOCATED: ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug("SRv6 SID %pI6 %s : ALLOCATED", &sid_addr, ++ srv6_sid_ctx2str(buf, sizeof(buf), &ctx)); ++ ++ /* Verify that the received SID belongs to the configured locator */ ++ tmp_prefix.family = AF_INET6; ++ tmp_prefix.prefixlen = IPV6_MAX_BITLEN; ++ tmp_prefix.prefix = sid_addr; ++ ++ if (!prefix_match((struct prefix *)&bgp->srv6_locator->prefix, ++ (struct prefix *)&tmp_prefix)) ++ return -1; ++ ++ /* Get label */ ++ uint8_t func_len = bgp->srv6_locator->function_bits_length; ++ uint8_t shift_len = BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH - ++ func_len; ++ ++ int label = sid_func << shift_len; ++ ++ /* Un-export VPN to VRF routes */ ++ vpn_leak_prechange(BGP_VPN_POLICY_DIR_TOVPN, AFI_IP, bgp, ++ bgp_vrf); ++ vpn_leak_prechange(BGP_VPN_POLICY_DIR_TOVPN, AFI_IP6, bgp, ++ bgp_vrf); ++ ++ locator = srv6_locator_alloc(bgp->srv6_locator_name); ++ srv6_locator_copy(locator, bgp->srv6_locator); ++ ++ /* Store SID, locator, and label */ ++ tovpn_sid = XCALLOC(MTYPE_BGP_SRV6_SID, sizeof(struct in6_addr)); ++ *tovpn_sid = sid_addr; ++ if (ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END_DT6) { ++ XFREE(MTYPE_BGP_SRV6_SID, ++ bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid); ++ srv6_locator_free( ++ bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator); ++ sid_unregister(bgp, ++ bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid); ++ ++ bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid = tovpn_sid; ++ bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator = locator; ++ bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_transpose_label = ++ label; ++ } else if (ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END_DT4) { ++ XFREE(MTYPE_BGP_SRV6_SID, ++ bgp_vrf->vpn_policy[AFI_IP].tovpn_sid); ++ srv6_locator_free( ++ bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator); ++ sid_unregister(bgp, ++ bgp_vrf->vpn_policy[AFI_IP].tovpn_sid); ++ ++ bgp_vrf->vpn_policy[AFI_IP].tovpn_sid = tovpn_sid; ++ bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator = locator; ++ bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_transpose_label = ++ label; ++ } else if (ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END_DT46) { ++ XFREE(MTYPE_BGP_SRV6_SID, bgp_vrf->tovpn_sid); ++ srv6_locator_free(bgp_vrf->tovpn_sid_locator); ++ sid_unregister(bgp, bgp_vrf->tovpn_sid); ++ ++ bgp_vrf->tovpn_sid = tovpn_sid; ++ bgp_vrf->tovpn_sid_locator = locator; ++ bgp_vrf->tovpn_sid_transpose_label = label; ++ } else { ++ srv6_locator_free(locator); ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug("Unsupported behavior. Not assigned SRv6 SID: %s %pI6", ++ srv6_sid_ctx2str(buf, sizeof(buf), ++ &ctx), ++ &sid_addr); ++ return -1; ++ } ++ ++ /* Register the new SID */ ++ sid_register(bgp, tovpn_sid, bgp->srv6_locator_name); ++ ++ /* Export VPN to VRF routes */ ++ vpn_leak_postchange_all(); ++ ++ break; ++ case ZAPI_SRV6_SID_RELEASED: ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug("SRv6 SID %pI6 %s: RELEASED", &sid_addr, ++ srv6_sid_ctx2str(buf, sizeof(buf), &ctx)); ++ ++ /* Un-export VPN to VRF routes */ ++ vpn_leak_prechange(BGP_VPN_POLICY_DIR_TOVPN, AFI_IP, bgp, ++ bgp_vrf); ++ vpn_leak_prechange(BGP_VPN_POLICY_DIR_TOVPN, AFI_IP6, bgp, ++ bgp_vrf); ++ ++ /* Remove SID, locator, and label */ ++ if (ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END_DT6) { ++ XFREE(MTYPE_BGP_SRV6_SID, ++ bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid); ++ if (bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator) { ++ srv6_locator_free(bgp->vpn_policy[AFI_IP6] ++ .tovpn_sid_locator); ++ bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator = ++ NULL; ++ } ++ bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_transpose_label = ++ 0; ++ ++ /* Unregister the SID */ ++ sid_unregister(bgp, ++ bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid); ++ } else if (ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END_DT4) { ++ XFREE(MTYPE_BGP_SRV6_SID, ++ bgp_vrf->vpn_policy[AFI_IP].tovpn_sid); ++ if (bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator) { ++ srv6_locator_free(bgp->vpn_policy[AFI_IP] ++ .tovpn_sid_locator); ++ bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator = ++ NULL; ++ } ++ bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_transpose_label = ++ 0; ++ ++ /* Unregister the SID */ ++ sid_unregister(bgp, ++ bgp_vrf->vpn_policy[AFI_IP].tovpn_sid); ++ } else if (ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END_DT46) { ++ XFREE(MTYPE_BGP_SRV6_SID, bgp_vrf->tovpn_sid); ++ if (bgp_vrf->tovpn_sid_locator) { ++ srv6_locator_free(bgp_vrf->tovpn_sid_locator); ++ bgp_vrf->tovpn_sid_locator = NULL; ++ } ++ bgp_vrf->tovpn_sid_transpose_label = 0; ++ ++ /* Unregister the SID */ ++ sid_unregister(bgp, bgp_vrf->tovpn_sid); ++ } else { ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug("Unsupported behavior. Not assigned SRv6 SID: %s %pI6", ++ srv6_sid_ctx2str(buf, sizeof(buf), ++ &ctx), ++ &sid_addr); ++ return -1; ++ } ++ ++ /* Export VPN to VRF routes*/ ++ vpn_leak_postchange_all(); ++ break; ++ case ZAPI_SRV6_SID_FAIL_ALLOC: ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug("SRv6 SID %pI6 %s: Failed to allocate", ++ &sid_addr, ++ srv6_sid_ctx2str(buf, sizeof(buf), &ctx)); ++ ++ /* Error will be logged by zebra module */ ++ break; ++ case ZAPI_SRV6_SID_FAIL_RELEASE: ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug("%s: SRv6 SID %pI6 %s failure to release", ++ __func__, &sid_addr, ++ srv6_sid_ctx2str(buf, sizeof(buf), &ctx)); ++ ++ /* Error will be logged by zebra module */ ++ break; ++ } ++ ++ return 0; ++} ++ + static int bgp_zebra_process_srv6_locator_add(ZAPI_CALLBACK_ARGS) + { + struct srv6_locator loc = {}; + struct bgp *bgp = bgp_get_default(); +- const char *loc_name = bgp->srv6_locator_name; + + if (!bgp || !bgp->srv6_enabled) + return 0; +@@ -3371,10 +3638,7 @@ static int bgp_zebra_process_srv6_locator_add(ZAPI_CALLBACK_ARGS) + if (zapi_srv6_locator_decode(zclient->ibuf, &loc) < 0) + return -1; + +- if (bgp_zebra_srv6_manager_get_locator_chunk(loc_name) < 0) +- return -1; +- +- return 0; ++ return bgp_zebra_process_srv6_locator_internal(&loc); + } + + static int bgp_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS) +@@ -3382,7 +3646,8 @@ static int bgp_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS) + struct srv6_locator loc = {}; + struct bgp *bgp = bgp_get_default(); + struct listnode *node, *nnode; +- struct srv6_locator_chunk *chunk, *tovpn_sid_locator; ++ struct srv6_locator_chunk *chunk; ++ struct srv6_locator *tovpn_sid_locator; + struct bgp_srv6_function *func; + struct bgp *bgp_vrf; + struct in6_addr *tovpn_sid; +@@ -3394,6 +3659,12 @@ static int bgp_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS) + if (zapi_srv6_locator_decode(zclient->ibuf, &loc) < 0) + return -1; + ++ // clear SRv6 locator ++ if (bgp->srv6_locator) { ++ srv6_locator_free(bgp->srv6_locator); ++ bgp->srv6_locator = NULL; ++ } ++ + // refresh chunks + for (ALL_LIST_ELEMENTS(bgp->srv6_locator_chunks, node, nnode, chunk)) + if (prefix_match((struct prefix *)&loc.prefix, +@@ -3470,10 +3741,12 @@ static int bgp_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS) + tmp_prefi.prefixlen = IPV6_MAX_BITLEN; + tmp_prefi.prefix = tovpn_sid_locator->prefix.prefix; + if (prefix_match((struct prefix *)&loc.prefix, +- (struct prefix *)&tmp_prefi)) +- srv6_locator_chunk_free( +- &bgp_vrf->vpn_policy[AFI_IP] +- .tovpn_sid_locator); ++ (struct prefix *)&tmp_prefi)) { ++ srv6_locator_free(bgp_vrf->vpn_policy[AFI_IP] ++ .tovpn_sid_locator); ++ bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator = ++ NULL; ++ } + } + + /* refresh vpnv6 tovpn_sid_locator */ +@@ -3484,10 +3757,12 @@ static int bgp_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS) + tmp_prefi.prefixlen = IPV6_MAX_BITLEN; + tmp_prefi.prefix = tovpn_sid_locator->prefix.prefix; + if (prefix_match((struct prefix *)&loc.prefix, +- (struct prefix *)&tmp_prefi)) +- srv6_locator_chunk_free( +- &bgp_vrf->vpn_policy[AFI_IP6] +- .tovpn_sid_locator); ++ (struct prefix *)&tmp_prefi)) { ++ srv6_locator_free(bgp_vrf->vpn_policy[AFI_IP6] ++ .tovpn_sid_locator); ++ bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator = ++ NULL; ++ } + } + + /* refresh per-vrf tovpn_sid_locator */ +@@ -3497,9 +3772,10 @@ static int bgp_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS) + tmp_prefi.prefixlen = IPV6_MAX_BITLEN; + tmp_prefi.prefix = tovpn_sid_locator->prefix.prefix; + if (prefix_match((struct prefix *)&loc.prefix, +- (struct prefix *)&tmp_prefi)) +- srv6_locator_chunk_free( +- &bgp_vrf->tovpn_sid_locator); ++ (struct prefix *)&tmp_prefi)) { ++ srv6_locator_free(bgp_vrf->tovpn_sid_locator); ++ bgp_vrf->tovpn_sid_locator = NULL; ++ } + } + } + +@@ -3536,6 +3812,7 @@ static zclient_handler *const bgp_handlers[] = { + [ZEBRA_SRV6_LOCATOR_DELETE] = bgp_zebra_process_srv6_locator_delete, + [ZEBRA_SRV6_MANAGER_GET_LOCATOR_CHUNK] = + bgp_zebra_process_srv6_locator_chunk, ++ [ZEBRA_SRV6_SID_NOTIFY] = bgp_zebra_srv6_sid_notify, + }; + + static int bgp_if_new_hook(struct interface *ifp) +@@ -4068,6 +4345,89 @@ int bgp_zebra_srv6_manager_release_locator_chunk(const char *name) + return srv6_manager_release_locator_chunk(zclient, name); + } + ++/** ++ * Ask the SRv6 Manager (zebra) about a specific locator ++ * ++ * @param name Locator name ++ * @return 0 on success, -1 otherwise ++ */ ++int bgp_zebra_srv6_manager_get_locator(const char *name) ++{ ++ if (!name) ++ return -1; ++ ++ /* ++ * Send the Get Locator request to the SRv6 Manager and return the ++ * result ++ */ ++ return srv6_manager_get_locator(zclient, name); ++} ++ ++/** ++ * Ask the SRv6 Manager (zebra) to allocate a SID. ++ * ++ * Optionally, it is possible to provide an IPv6 address (sid_value parameter). ++ * ++ * When sid_value is provided, the SRv6 Manager allocates the requested SID ++ * address, if the request can be satisfied (explicit allocation). ++ * ++ * When sid_value is not provided, the SRv6 Manager allocates any available SID ++ * from the provided locator (dynamic allocation). ++ * ++ * @param ctx Context to be associated with the request SID ++ * @param sid_value IPv6 address to be associated with the requested SID (optional) ++ * @param locator_name Name of the locator from which the SID must be allocated ++ * @param sid_func SID Function allocated by the SRv6 Manager. ++ */ ++bool bgp_zebra_request_srv6_sid(const struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value, ++ const char *locator_name, uint32_t *sid_func) ++{ ++ int ret; ++ ++ if (!ctx || !locator_name) ++ return false; ++ ++ /* ++ * Send the Get SRv6 SID request to the SRv6 Manager and check the ++ * result ++ */ ++ ret = srv6_manager_get_sid(zclient, ctx, sid_value, locator_name, ++ sid_func); ++ if (ret < 0) { ++ zlog_warn("%s: error getting SRv6 SID!", __func__); ++ return false; ++ } ++ ++ return true; ++} ++ ++/** ++ * Ask the SRv6 Manager (zebra) to release a previously allocated SID. ++ * ++ * This function is used to tell the SRv6 Manager that BGP no longer intends ++ * to use the SID. ++ * ++ * @param ctx Context to be associated with the SID to be released ++ */ ++void bgp_zebra_release_srv6_sid(const struct srv6_sid_ctx *ctx) ++{ ++ int ret; ++ ++ if (!ctx) ++ return; ++ ++ /* ++ * Send the Release SRv6 SID request to the SRv6 Manager and check the ++ * result ++ */ ++ ret = srv6_manager_release_sid(zclient, ctx); ++ if (ret < 0) { ++ zlog_warn("%s: error releasing SRv6 SID!", __func__); ++ return; ++ } ++} ++ + void bgp_zebra_send_nexthop_label(int cmd, mpls_label_t label, + ifindex_t ifindex, vrf_id_t vrf_id, + enum lsp_types_t ltype, struct prefix *p, +diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h +index d0b3351ad..1471770dc 100644 +--- a/bgpd/bgp_zebra.h ++++ b/bgpd/bgp_zebra.h +@@ -120,6 +120,13 @@ extern int bgp_zebra_update(struct bgp *bgp, afi_t afi, safi_t safi, + extern int bgp_zebra_stale_timer_update(struct bgp *bgp); + extern int bgp_zebra_srv6_manager_get_locator_chunk(const char *name); + extern int bgp_zebra_srv6_manager_release_locator_chunk(const char *name); ++extern int bgp_zebra_srv6_manager_get_locator(const char *name); ++extern bool bgp_zebra_request_srv6_sid(const struct srv6_sid_ctx *ctx, ++ struct in6_addr *sid_value, ++ const char *locator_name, ++ uint32_t *sid_func); ++extern void bgp_zebra_release_srv6_sid(const struct srv6_sid_ctx *ctx); ++ + extern void bgp_zebra_send_nexthop_label(int cmd, mpls_label_t label, + ifindex_t index, vrf_id_t vrfid, + enum lsp_types_t ltype, +diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c +index cf52053c4..06a0e0367 100644 +--- a/bgpd/bgpd.c ++++ b/bgpd/bgpd.c +@@ -1478,9 +1478,11 @@ static void bgp_srv6_init(struct bgp *bgp) + static void bgp_srv6_cleanup(struct bgp *bgp) + { + for (afi_t afi = AFI_IP; afi < AFI_MAX; afi++) { +- if (bgp->vpn_policy[afi].tovpn_sid_locator != NULL) +- srv6_locator_chunk_free( +- &bgp->vpn_policy[afi].tovpn_sid_locator); ++ if (bgp->vpn_policy[afi].tovpn_sid_locator != NULL) { ++ srv6_locator_free( ++ bgp->vpn_policy[afi].tovpn_sid_locator); ++ bgp->vpn_policy[afi].tovpn_sid_locator = NULL; ++ } + if (bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent != NULL) + XFREE(MTYPE_BGP_SRV6_SID, + bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent); +@@ -1491,8 +1493,10 @@ static void bgp_srv6_cleanup(struct bgp *bgp) + } + } + +- if (bgp->tovpn_sid_locator != NULL) +- srv6_locator_chunk_free(&bgp->tovpn_sid_locator); ++ if (bgp->tovpn_sid_locator != NULL) { ++ srv6_locator_free(bgp->tovpn_sid_locator); ++ bgp->tovpn_sid_locator = NULL; ++ } + if (bgp->tovpn_zebra_vrf_sid_last_sent != NULL) + XFREE(MTYPE_BGP_SRV6_SID, bgp->tovpn_zebra_vrf_sid_last_sent); + if (bgp->tovpn_sid != NULL) { +@@ -1504,6 +1508,9 @@ static void bgp_srv6_cleanup(struct bgp *bgp) + list_delete(&bgp->srv6_locator_chunks); + if (bgp->srv6_functions) + list_delete(&bgp->srv6_functions); ++ ++ srv6_locator_free(bgp->srv6_locator); ++ bgp->srv6_locator = NULL; + } + + /* Allocate new peer object, implicitely locked. */ +diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h +index 057e26a83..b1feb8bde 100644 +--- a/bgpd/bgpd.h ++++ b/bgpd/bgpd.h +@@ -249,7 +249,7 @@ struct vpn_policy { + */ + uint32_t tovpn_sid_index; /* unset => set to 0 */ + struct in6_addr *tovpn_sid; +- struct srv6_locator_chunk *tovpn_sid_locator; ++ struct srv6_locator *tovpn_sid_locator; + uint32_t tovpn_sid_transpose_label; + struct in6_addr *tovpn_zebra_vrf_sid_last_sent; + }; +@@ -813,11 +813,12 @@ struct bgp { + /* BGP VPN SRv6 backend */ + bool srv6_enabled; + char srv6_locator_name[SRV6_LOCNAME_SIZE]; ++ struct srv6_locator *srv6_locator; + struct list *srv6_locator_chunks; + struct list *srv6_functions; + uint32_t tovpn_sid_index; /* unset => set to 0 */ + struct in6_addr *tovpn_sid; +- struct srv6_locator_chunk *tovpn_sid_locator; ++ struct srv6_locator *tovpn_sid_locator; + uint32_t tovpn_sid_transpose_label; + struct in6_addr *tovpn_zebra_vrf_sid_last_sent; + diff --git a/src/sonic-frr/patch/0069-lib-nexthop-code-should-use-uint16_t-for-nexthop-cou.patch b/src/sonic-frr/patch/0069-lib-nexthop-code-should-use-uint16_t-for-nexthop-cou.patch new file mode 100644 index 00000000000..5b6588ce312 --- /dev/null +++ b/src/sonic-frr/patch/0069-lib-nexthop-code-should-use-uint16_t-for-nexthop-cou.patch @@ -0,0 +1,91 @@ +From 1102e4f6ee58d0d41596880fe3a7c82840ee679e Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Tue, 1 Oct 2024 14:31:08 -0400 +Subject: [PATCH] lib: nexthop code should use uint16_t for nexthop counting + +It's possible to specify via the cli and configure how many +nexthops that are allowed on the system. If you happen to +have > 255 then things are about to get interesting otherwise. + +Let's allow up to 65k nexthops (ha!) + +Signed-off-by: Donald Sharp + +diff --git a/lib/nexthop_group.c b/lib/nexthop_group.c +index 3f408e0a71..cb1ebb5d09 100644 +--- a/lib/nexthop_group.c ++++ b/lib/nexthop_group.c +@@ -70,10 +70,10 @@ static struct nexthop *nexthop_group_tail(const struct nexthop_group *nhg) + return nexthop; + } + +-uint8_t nexthop_group_nexthop_num(const struct nexthop_group *nhg) ++uint16_t nexthop_group_nexthop_num(const struct nexthop_group *nhg) + { + struct nexthop *nhop; +- uint8_t num = 0; ++ uint16_t num = 0; + + for (ALL_NEXTHOPS_PTR(nhg, nhop)) + num++; +@@ -81,11 +81,10 @@ uint8_t nexthop_group_nexthop_num(const struct nexthop_group *nhg) + return num; + } + +-static uint8_t +-nexthop_group_nexthop_num_no_recurse(const struct nexthop_group *nhg) ++static uint16_t nexthop_group_nexthop_num_no_recurse(const struct nexthop_group *nhg) + { + struct nexthop *nhop; +- uint8_t num = 0; ++ uint16_t num = 0; + + for (nhop = nhg->nexthop; nhop; nhop = nhop->next) + num++; +@@ -93,10 +92,10 @@ nexthop_group_nexthop_num_no_recurse(const struct nexthop_group *nhg) + return num; + } + +-uint8_t nexthop_group_active_nexthop_num(const struct nexthop_group *nhg) ++uint16_t nexthop_group_active_nexthop_num(const struct nexthop_group *nhg) + { + struct nexthop *nhop; +- uint8_t num = 0; ++ uint16_t num = 0; + + for (ALL_NEXTHOPS_PTR(nhg, nhop)) { + if (CHECK_FLAG(nhop->flags, NEXTHOP_FLAG_ACTIVE)) +@@ -184,11 +183,9 @@ static struct nexthop *nhg_nh_find(const struct nexthop_group *nhg, + return NULL; + } + +-static bool +-nexthop_group_equal_common(const struct nexthop_group *nhg1, +- const struct nexthop_group *nhg2, +- uint8_t (*nexthop_group_nexthop_num_func)( +- const struct nexthop_group *nhg)) ++static bool nexthop_group_equal_common( ++ const struct nexthop_group *nhg1, const struct nexthop_group *nhg2, ++ uint16_t (*nexthop_group_nexthop_num_func)(const struct nexthop_group *nhg)) + { + if (nhg1 && !nhg2) + return false; +diff --git a/lib/nexthop_group.h b/lib/nexthop_group.h +index 822a35439c..9103299418 100644 +--- a/lib/nexthop_group.h ++++ b/lib/nexthop_group.h +@@ -149,9 +149,8 @@ extern void nexthop_group_json_nexthop(json_object *j, + const struct nexthop *nh); + + /* Return the number of nexthops in this nhg */ +-extern uint8_t nexthop_group_nexthop_num(const struct nexthop_group *nhg); +-extern uint8_t +-nexthop_group_active_nexthop_num(const struct nexthop_group *nhg); ++extern uint16_t nexthop_group_nexthop_num(const struct nexthop_group *nhg); ++extern uint16_t nexthop_group_active_nexthop_num(const struct nexthop_group *nhg); + + extern bool nexthop_group_has_label(const struct nexthop_group *nhg); + +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0070-Allow-16-bit-size-for-nexthops.patch b/src/sonic-frr/patch/0070-Allow-16-bit-size-for-nexthops.patch new file mode 100644 index 00000000000..3ffb095db07 --- /dev/null +++ b/src/sonic-frr/patch/0070-Allow-16-bit-size-for-nexthops.patch @@ -0,0 +1,362 @@ +From ab639c4563abc5754d6a185ea3a8f29778fc3fae Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Mon, 7 Oct 2024 12:40:46 -0400 +Subject: [PATCH] *: Allow 16 bit size for nexthops + +Currently FRR is limiting the nexthop count to a uint8_t not a +uint16_t. This leads to issues when the nexthop count is 256 +which results in the count to overflow to 0 causing problems +in the code. + +Signed-off-by: Donald Sharp + +diff --git a/bgpd/bgp_addpath.c b/bgpd/bgp_addpath.c +index f391c13847..aada6e555f 100644 +--- a/bgpd/bgp_addpath.c ++++ b/bgpd/bgp_addpath.c +@@ -361,8 +361,7 @@ void bgp_addpath_type_changed(struct bgp *bgp) + } + } + +-int bgp_addpath_capability_action(enum bgp_addpath_strat addpath_type, +- uint8_t paths) ++int bgp_addpath_capability_action(enum bgp_addpath_strat addpath_type, uint16_t paths) + { + int action = CAPABILITY_ACTION_UNSET; + +@@ -392,8 +391,7 @@ int bgp_addpath_capability_action(enum bgp_addpath_strat addpath_type, + * change take effect. + */ + void bgp_addpath_set_peer_type(struct peer *peer, afi_t afi, safi_t safi, +- enum bgp_addpath_strat addpath_type, +- uint8_t paths) ++ enum bgp_addpath_strat addpath_type, uint16_t paths) + { + struct bgp *bgp = peer->bgp; + enum bgp_addpath_strat old_type; +diff --git a/bgpd/bgp_addpath.h b/bgpd/bgp_addpath.h +index d562000e30..0954a7ced1 100644 +--- a/bgpd/bgp_addpath.h ++++ b/bgpd/bgp_addpath.h +@@ -56,13 +56,11 @@ bool bgp_addpath_tx_path(enum bgp_addpath_strat strat, + * Change the type of addpath used for a peer. + */ + void bgp_addpath_set_peer_type(struct peer *peer, afi_t afi, safi_t safi, +- enum bgp_addpath_strat addpath_type, +- uint8_t paths); ++ enum bgp_addpath_strat addpath_type, uint16_t paths); + + void bgp_addpath_update_ids(struct bgp *bgp, struct bgp_dest *dest, afi_t afi, + safi_t safi); + + void bgp_addpath_type_changed(struct bgp *bgp); +-extern int bgp_addpath_capability_action(enum bgp_addpath_strat addpath_type, +- uint8_t paths); ++extern int bgp_addpath_capability_action(enum bgp_addpath_strat addpath_type, uint16_t paths); + #endif +diff --git a/bgpd/bgp_nexthop.h b/bgpd/bgp_nexthop.h +index 830883872e..410b3f7db9 100644 +--- a/bgpd/bgp_nexthop.h ++++ b/bgpd/bgp_nexthop.h +@@ -38,7 +38,7 @@ struct bgp_nexthop_cache { + uint32_t metric; + + /* Nexthop number and nexthop linked list.*/ +- uint8_t nexthop_num; ++ uint16_t nexthop_num; + + /* This flag is set to TRUE for a bnc that is gateway IP overlay index + * nexthop. +diff --git a/bgpd/bgp_nht.c b/bgpd/bgp_nht.c +index e2c103bb52..1614779ea6 100644 +--- a/bgpd/bgp_nht.c ++++ b/bgpd/bgp_nht.c +@@ -740,7 +740,7 @@ static void bgp_nht_ifp_table_handle(struct bgp *bgp, + { + struct bgp_nexthop_cache *bnc; + struct nexthop *nhop; +- uint8_t other_nh_count; ++ uint16_t other_nh_count; + bool nhop_ll_found = false; + bool nhop_found = false; + +diff --git a/pimd/pim_nht.c b/pimd/pim_nht.c +index 32cdf4bf82..b4f9aa7ca4 100644 +--- a/pimd/pim_nht.c ++++ b/pimd/pim_nht.c +@@ -543,7 +543,7 @@ static int pim_ecmp_nexthop_search(struct pim_instance *pim, + ifindex_t first_ifindex; + struct interface *ifp = NULL; + uint32_t hash_val = 0, mod_val = 0; +- uint8_t nh_iter = 0, found = 0; ++ uint16_t nh_iter = 0, found = 0; + uint32_t i, num_nbrs = 0; + struct pim_interface *pim_ifp; + +@@ -914,7 +914,7 @@ int pim_ecmp_nexthop_lookup(struct pim_instance *pim, + struct interface *ifps[router->multipath], *ifp; + int first_ifindex; + int found = 0; +- uint8_t i = 0; ++ uint16_t i = 0; + uint32_t hash_val = 0, mod_val = 0; + uint32_t num_nbrs = 0; + struct pim_interface *pim_ifp; +diff --git a/pimd/pim_nht.h b/pimd/pim_nht.h +index a1feb76e3b..27014e6898 100644 +--- a/pimd/pim_nht.h ++++ b/pimd/pim_nht.h +@@ -23,7 +23,7 @@ struct pim_nexthop_cache { + uint32_t metric; + uint32_t distance; + /* Nexthop number and nexthop linked list. */ +- uint8_t nexthop_num; ++ uint16_t nexthop_num; + struct nexthop *nexthop; + int64_t last_update; + uint16_t flags; +diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c +index 988e67c963..4dd5f80836 100644 +--- a/zebra/rt_netlink.c ++++ b/zebra/rt_netlink.c +@@ -616,12 +616,9 @@ parse_nexthop_unicast(ns_id_t ns_id, struct rtmsg *rtm, struct rtattr **tb, + return nh; + } + +-static uint8_t parse_multipath_nexthops_unicast(ns_id_t ns_id, +- struct nexthop_group *ng, +- struct rtmsg *rtm, +- struct rtnexthop *rtnh, +- struct rtattr **tb, +- void *prefsrc, vrf_id_t vrf_id) ++static uint16_t parse_multipath_nexthops_unicast(ns_id_t ns_id, struct nexthop_group *ng, ++ struct rtmsg *rtm, struct rtnexthop *rtnh, ++ struct rtattr **tb, void *prefsrc, vrf_id_t vrf_id) + { + void *gate = NULL; + struct interface *ifp = NULL; +@@ -746,7 +743,7 @@ static uint8_t parse_multipath_nexthops_unicast(ns_id_t ns_id, + rtnh = RTNH_NEXT(rtnh); + } + +- uint8_t nhop_num = nexthop_group_nexthop_num(ng); ++ uint16_t nhop_num = nexthop_group_nexthop_num(ng); + + return nhop_num; + } +@@ -1039,7 +1036,7 @@ int netlink_route_change_read_unicast_internal(struct nlmsghdr *h, + (struct rtnexthop *)RTA_DATA(tb[RTA_MULTIPATH]); + + if (!nhe_id) { +- uint8_t nhop_num; ++ uint16_t nhop_num; + + /* Use temporary list of nexthops; parse + * message payload's nexthops. +@@ -2672,11 +2669,9 @@ int kernel_get_ipmr_sg_stats(struct zebra_vrf *zvrf, void *in) + /* Char length to debug ID with */ + #define ID_LENGTH 10 + +-static bool _netlink_nexthop_build_group(struct nlmsghdr *n, size_t req_size, +- uint32_t id, +- const struct nh_grp *z_grp, +- const uint8_t count, bool resilient, +- const struct nhg_resilience *nhgr) ++static bool _netlink_nexthop_build_group(struct nlmsghdr *n, size_t req_size, uint32_t id, ++ const struct nh_grp *z_grp, const uint16_t count, ++ bool resilient, const struct nhg_resilience *nhgr) + { + struct nexthop_grp grp[count]; + /* Need space for max group size, "/", and null term */ +@@ -3301,7 +3296,7 @@ static int netlink_nexthop_process_group(struct rtattr **tb, + struct nh_grp *z_grp, int z_grp_size, + struct nhg_resilience *nhgr) + { +- uint8_t count = 0; ++ uint16_t count = 0; + /* linux/nexthop.h group struct */ + struct nexthop_grp *n_grp = NULL; + +@@ -3374,7 +3369,7 @@ int netlink_nexthop_change(struct nlmsghdr *h, ns_id_t ns_id, int startup) + struct nexthop nh = {}; + struct nh_grp grp[MULTIPATH_NUM] = {}; + /* Count of nexthops in group array */ +- uint8_t grp_count = 0; ++ uint16_t grp_count = 0; + struct rtattr *tb[NHA_MAX + 1] = {}; + + frrtrace(3, frr_zebra, netlink_nexthop_change, h, ns_id, startup); +diff --git a/zebra/zapi_msg.c b/zebra/zapi_msg.c +index 9ae8333d6b..4ee3e18e5b 100644 +--- a/zebra/zapi_msg.c ++++ b/zebra/zapi_msg.c +@@ -517,7 +517,7 @@ int zsend_redistribute_route(int cmd, struct zserv *client, + struct zapi_nexthop *api_nh; + struct nexthop *nexthop; + const struct prefix *p, *src_p; +- uint8_t count = 0; ++ uint16_t count = 0; + afi_t afi; + size_t stream_size = + MAX(ZEBRA_MAX_PACKET_SIZ, sizeof(struct zapi_route)); +diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c +index efa795331d..5214b428b3 100644 +--- a/zebra/zebra_dplane.c ++++ b/zebra/zebra_dplane.c +@@ -79,7 +79,7 @@ struct dplane_nexthop_info { + + struct nexthop_group ng; + struct nh_grp nh_grp[MULTIPATH_NUM]; +- uint8_t nh_grp_count; ++ uint16_t nh_grp_count; + }; + + /* +@@ -2303,7 +2303,7 @@ dplane_ctx_get_nhe_nh_grp(const struct zebra_dplane_ctx *ctx) + return ctx->u.rinfo.nhe.nh_grp; + } + +-uint8_t dplane_ctx_get_nhe_nh_grp_count(const struct zebra_dplane_ctx *ctx) ++uint16_t dplane_ctx_get_nhe_nh_grp_count(const struct zebra_dplane_ctx *ctx) + { + DPLANE_CTX_VALID(ctx); + return ctx->u.rinfo.nhe.nh_grp_count; +diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h +index 51c1bff5d2..63130b751f 100644 +--- a/zebra/zebra_dplane.h ++++ b/zebra/zebra_dplane.h +@@ -590,7 +590,7 @@ const struct nexthop_group * + dplane_ctx_get_nhe_ng(const struct zebra_dplane_ctx *ctx); + const struct nh_grp * + dplane_ctx_get_nhe_nh_grp(const struct zebra_dplane_ctx *ctx); +-uint8_t dplane_ctx_get_nhe_nh_grp_count(const struct zebra_dplane_ctx *ctx); ++uint16_t dplane_ctx_get_nhe_nh_grp_count(const struct zebra_dplane_ctx *ctx); + + /* Accessors for LSP information */ + +diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c +index ed949da917..0c882ee1d9 100644 +--- a/zebra/zebra_nhg.c ++++ b/zebra/zebra_nhg.c +@@ -601,9 +601,8 @@ bool zebra_nhg_hash_id_equal(const void *arg1, const void *arg2) + return nhe1->id == nhe2->id; + } + +-static int zebra_nhg_process_grp(struct nexthop_group *nhg, +- struct nhg_connected_tree_head *depends, +- struct nh_grp *grp, uint8_t count, ++static int zebra_nhg_process_grp(struct nexthop_group *nhg, struct nhg_connected_tree_head *depends, ++ struct nh_grp *grp, uint16_t count, + struct nhg_resilience *resilience) + { + nhg_connected_tree_init(depends); +@@ -958,7 +957,7 @@ static struct nexthop *nhg_ctx_get_nh(struct nhg_ctx *ctx) + return &ctx->u.nh; + } + +-static uint8_t nhg_ctx_get_count(const struct nhg_ctx *ctx) ++static uint16_t nhg_ctx_get_count(const struct nhg_ctx *ctx) + { + return ctx->count; + } +@@ -1004,9 +1003,8 @@ done: + XFREE(MTYPE_NHG_CTX, *ctx); + } + +-static struct nhg_ctx *nhg_ctx_init(uint32_t id, struct nexthop *nh, +- struct nh_grp *grp, vrf_id_t vrf_id, +- afi_t afi, int type, uint8_t count, ++static struct nhg_ctx *nhg_ctx_init(uint32_t id, struct nexthop *nh, struct nh_grp *grp, ++ vrf_id_t vrf_id, afi_t afi, int type, uint16_t count, + struct nhg_resilience *resilience) + { + struct nhg_ctx *ctx = NULL; +@@ -1155,7 +1153,7 @@ static int nhg_ctx_process_new(struct nhg_ctx *ctx) + struct nhg_hash_entry *nhe = NULL; + + uint32_t id = nhg_ctx_get_id(ctx); +- uint8_t count = nhg_ctx_get_count(ctx); ++ uint16_t count = nhg_ctx_get_count(ctx); + vrf_id_t vrf_id = nhg_ctx_get_vrf_id(ctx); + int type = nhg_ctx_get_type(ctx); + afi_t afi = nhg_ctx_get_afi(ctx); +@@ -1307,9 +1305,9 @@ int nhg_ctx_process(struct nhg_ctx *ctx) + } + + /* Kernel-side, you either get a single new nexthop or a array of ID's */ +-int zebra_nhg_kernel_find(uint32_t id, struct nexthop *nh, struct nh_grp *grp, +- uint8_t count, vrf_id_t vrf_id, afi_t afi, int type, +- int startup, struct nhg_resilience *nhgr) ++int zebra_nhg_kernel_find(uint32_t id, struct nexthop *nh, struct nh_grp *grp, uint16_t count, ++ vrf_id_t vrf_id, afi_t afi, int type, int startup, ++ struct nhg_resilience *nhgr) + { + struct nhg_ctx *ctx = NULL; + +@@ -2973,14 +2971,14 @@ backups_done: + * I'm pretty sure we only allow ONE level of group within group currently. + * But making this recursive just in case that ever changes. + */ +-static uint8_t zebra_nhg_nhe2grp_internal(struct nh_grp *grp, +- uint8_t curr_index, ++static uint16_t zebra_nhg_nhe2grp_internal(struct nh_grp *grp, ++ uint16_t curr_index, + struct nhg_hash_entry *nhe, + int max_num) + { + struct nhg_connected *rb_node_dep = NULL; + struct nhg_hash_entry *depend = NULL; +- uint8_t i = curr_index; ++ uint16_t i = curr_index; + + frr_each(nhg_connected_tree, &nhe->nhg_depends, rb_node_dep) { + bool duplicate = false; +@@ -3069,8 +3067,7 @@ done: + } + + /* Convert a nhe into a group array */ +-uint8_t zebra_nhg_nhe2grp(struct nh_grp *grp, struct nhg_hash_entry *nhe, +- int max_num) ++uint16_t zebra_nhg_nhe2grp(struct nh_grp *grp, struct nhg_hash_entry *nhe, int max_num) + { + /* Call into the recursive function */ + return zebra_nhg_nhe2grp_internal(grp, 0, nhe, max_num); +diff --git a/zebra/zebra_nhg.h b/zebra/zebra_nhg.h +index 4eddecb73d..1f55a4bd96 100644 +--- a/zebra/zebra_nhg.h ++++ b/zebra/zebra_nhg.h +@@ -204,7 +204,7 @@ struct nhg_ctx { + int type; + + /* If its a group array, how many? */ +- uint8_t count; ++ uint16_t count; + + /* Its either a single nexthop or an array of ID's */ + union { +@@ -290,10 +290,8 @@ extern int nhg_ctx_process(struct nhg_ctx *ctx); + void nhg_ctx_free(struct nhg_ctx **ctx); + + /* Find via kernel nh creation */ +-extern int zebra_nhg_kernel_find(uint32_t id, struct nexthop *nh, +- struct nh_grp *grp, uint8_t count, +- vrf_id_t vrf_id, afi_t afi, int type, +- int startup, ++extern int zebra_nhg_kernel_find(uint32_t id, struct nexthop *nh, struct nh_grp *grp, ++ uint16_t count, vrf_id_t vrf_id, afi_t afi, int type, int startup, + struct nhg_resilience *resilience); + /* Del via kernel */ + extern int zebra_nhg_kernel_del(uint32_t id, vrf_id_t vrf_id); +@@ -352,8 +350,7 @@ extern void zebra_nhg_increment_ref(struct nhg_hash_entry *nhe); + extern void zebra_nhg_check_valid(struct nhg_hash_entry *nhe); + + /* Convert nhe depends to a grp context that can be passed around safely */ +-extern uint8_t zebra_nhg_nhe2grp(struct nh_grp *grp, struct nhg_hash_entry *nhe, +- int size); ++extern uint16_t zebra_nhg_nhe2grp(struct nh_grp *grp, struct nhg_hash_entry *nhe, int size); + + /* Dataplane install/uninstall */ + extern void zebra_nhg_install_kernel(struct nhg_hash_entry *nhe); +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0071-zebra-Only-notify-dplane-work-pthread-when-needed.patch b/src/sonic-frr/patch/0071-zebra-Only-notify-dplane-work-pthread-when-needed.patch new file mode 100644 index 00000000000..7373dee5eee --- /dev/null +++ b/src/sonic-frr/patch/0071-zebra-Only-notify-dplane-work-pthread-when-needed.patch @@ -0,0 +1,112 @@ +From ccfaabcd8a9d519c22d43dbcf8f31be2f378a4bd Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Thu, 10 Oct 2024 16:00:08 -0400 +Subject: [PATCH 1/3] zebra: Only notify dplane work pthread when needed + +The fpm_nl_process function was getting the count +of the total number of ctx's processed. This leads +to after having processed 1 context to always signal +the dataplane that there is work to do. Change the +code to only notify the dplane worker when a context +was actually added to the outgoing context queue. + +Signed-off-by: Donald Sharp +--- + zebra/dplane_fpm_nl.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c +index e9942b7dbd..3e5236b077 100644 +--- a/zebra/dplane_fpm_nl.c ++++ b/zebra/dplane_fpm_nl.c +@@ -1459,7 +1459,7 @@ static void fpm_process_queue(struct event *t) + * until the dataplane thread gets scheduled for new, + * unrelated work. + */ +- if (dplane_provider_out_ctx_queue_len(fnc->prov) > 0) ++ if (processed_contexts) + dplane_provider_work_ready(); + } + +-- +2.43.2 + + +From 527923b651aa6eb6d07136fd0988c6054af65d00 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Thu, 10 Oct 2024 20:08:32 -0400 +Subject: [PATCH 2/3] zebra: Slow down fpm_process_queue + +When the fpm_process_queue has run out of space +but has written to the fpm output buffer, schedule +it to wake up immediately, as that the write will go out +pretty much immediately, since it was scheduled first. +If the fpm_process_queue has not written to the output +buffer then delay the processing by 10 milliseconds to +allow a possibly backed up write processing to have a +chance to complete it's work. + +Signed-off-by: Donald Sharp +--- + zebra/dplane_fpm_nl.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c +index 3e5236b077..66079d2dfc 100644 +--- a/zebra/dplane_fpm_nl.c ++++ b/zebra/dplane_fpm_nl.c +@@ -1446,8 +1446,12 @@ static void fpm_process_queue(struct event *t) + + /* Re-schedule if we ran out of buffer space */ + if (no_bufs) { +- event_add_event(fnc->fthread->master, fpm_process_queue, fnc, 0, +- &fnc->t_dequeue); ++ if (processed_contexts) ++ event_add_event(fnc->fthread->master, fpm_process_queue, fnc, 0, ++ &fnc->t_dequeue); ++ else ++ event_add_timer_msec(fnc->fthread->master, fpm_process_queue, fnc, 10, ++ &fnc->t_dequeue); + event_add_timer(fnc->fthread->master, fpm_process_wedged, fnc, + DPLANE_FPM_NL_WEDGIE_TIME, &fnc->t_wedged); + } else +-- +2.43.2 + + +From 46cf5903312a1a4c9833f7654779a0e3d903dad3 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Fri, 11 Oct 2024 09:33:35 -0400 +Subject: [PATCH 3/3] fpm: Allow max fpm message size to float based on ecmp + +Currently the max message size is 4k. With a 256 way +ecmp FRR is seeing message sizes that are in the +6k size. There is desire to allow this to increase as +well to 512. Since the multipath size directly effects +how big the message may be when sending the routes ecmp +let's give a bit of headroom for this value when compiling +FRR at greater sizes. Additionally since we know not everyone +is using such large ecmp, allow them to build as appropriate +for their use cases. + +Signed-off-by: Donald Sharp +--- + fpm/fpm.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/fpm/fpm.h b/fpm/fpm.h +index 70c0df5715..9003c643b0 100644 +--- a/fpm/fpm.h ++++ b/fpm/fpm.h +@@ -65,7 +65,7 @@ + /* + * Largest message that can be sent to or received from the FPM. + */ +-#define FPM_MAX_MSG_LEN 4096 ++#define FPM_MAX_MSG_LEN MAX(MULTIPATH_NUM * 32, 4096) + + #ifdef __SUNPRO_C + #pragma pack(1) +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0072-Fix-up-improper-handling-of-nexthops-for-nexthop-tra.patch b/src/sonic-frr/patch/0072-Fix-up-improper-handling-of-nexthops-for-nexthop-tra.patch new file mode 100644 index 00000000000..1bac1eaf5a1 --- /dev/null +++ b/src/sonic-frr/patch/0072-Fix-up-improper-handling-of-nexthops-for-nexthop-tra.patch @@ -0,0 +1,149 @@ +From 9b0f6cee3bbb8b0a42faf72015ac7e7705f8bfbd Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Fri, 11 Oct 2024 14:01:10 -0400 +Subject: [PATCH] *: Fix up improper handling of nexthops for nexthop tracking + +Currently FRR needs to send a uint16_t value for the number +of nexthops as well it needs the ability to properly decode +all of this. Find and handle all the places that this happens. + +Signed-off-by: Donald Sharp + +diff --git a/lib/zclient.c b/lib/zclient.c +index 64515c7544..a89a02997a 100644 +--- a/lib/zclient.c ++++ b/lib/zclient.c +@@ -2322,7 +2322,7 @@ static bool zapi_nexthop_update_decode(struct stream *s, struct prefix *match, + STREAM_GETW(s, nhr->instance); + STREAM_GETC(s, nhr->distance); + STREAM_GETL(s, nhr->metric); +- STREAM_GETC(s, nhr->nexthop_num); ++ STREAM_GETW(s, nhr->nexthop_num); + + for (i = 0; i < nhr->nexthop_num; i++) { + if (zapi_nexthop_decode(s, &(nhr->nexthops[i]), 0, 0) != 0) +diff --git a/pimd/pim_zlookup.c b/pimd/pim_zlookup.c +index c19119fa47..5d344f1f66 100644 +--- a/pimd/pim_zlookup.c ++++ b/pimd/pim_zlookup.c +@@ -193,7 +193,7 @@ static int zclient_read_nexthop(struct pim_instance *pim, + + distance = stream_getc(s); + metric = stream_getl(s); +- nexthop_num = stream_getc(s); ++ nexthop_num = stream_getw(s); + + if (nexthop_num < 1 || nexthop_num > router->multipath) { + if (PIM_DEBUG_PIM_NHT_DETAIL) +diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c +index c4efc14a9d..f1b793524c 100644 +--- a/staticd/static_zebra.c ++++ b/staticd/static_zebra.c +@@ -43,7 +43,7 @@ struct static_nht_data { + vrf_id_t nh_vrf_id; + + uint32_t refcount; +- uint8_t nh_num; ++ uint16_t nh_num; + bool registered; + }; + +diff --git a/zebra/zapi_msg.c b/zebra/zapi_msg.c +index 4ee3e18e5b..7e3b571844 100644 +--- a/zebra/zapi_msg.c ++++ b/zebra/zapi_msg.c +@@ -647,7 +647,7 @@ static int zsend_nexthop_lookup_mrib(struct zserv *client, struct ipaddr *addr, + { + struct stream *s; + unsigned long nump; +- uint8_t num; ++ uint16_t num; + struct nexthop *nexthop; + + /* Get output stream. */ +@@ -667,7 +667,7 @@ static int zsend_nexthop_lookup_mrib(struct zserv *client, struct ipaddr *addr, + /* remember position for nexthop_num */ + nump = stream_get_endp(s); + /* reserve room for nexthop_num */ +- stream_putc(s, 0); ++ stream_putw(s, 0); + nhg = rib_get_fib_nhg(re); + for (ALL_NEXTHOPS_PTR(nhg, nexthop)) { + if (rnh_nexthop_valid(re, nexthop)) +@@ -675,11 +675,11 @@ static int zsend_nexthop_lookup_mrib(struct zserv *client, struct ipaddr *addr, + } + + /* store nexthop_num */ +- stream_putc_at(s, nump, num); ++ stream_putw_at(s, nump, num); + } else { + stream_putc(s, 0); /* distance */ + stream_putl(s, 0); /* metric */ +- stream_putc(s, 0); /* nexthop_num */ ++ stream_putw(s, 0); /* nexthop_num */ + } + + stream_putw_at(s, 0, stream_get_endp(s)); +diff --git a/zebra/zebra_rnh.c b/zebra/zebra_rnh.c +index b387e9949b..3c64ee9ddf 100644 +--- a/zebra/zebra_rnh.c ++++ b/zebra/zebra_rnh.c +@@ -1141,7 +1141,7 @@ int zebra_send_rnh_update(struct rnh *rnh, struct zserv *client, + struct stream *s = NULL; + struct route_entry *re; + unsigned long nump; +- uint8_t num; ++ uint16_t num; + struct nexthop *nh; + struct route_node *rn; + int ret; +@@ -1212,7 +1212,7 @@ int zebra_send_rnh_update(struct rnh *rnh, struct zserv *client, + stream_putl(s, re->metric); + num = 0; + nump = stream_get_endp(s); +- stream_putc(s, 0); ++ stream_putw(s, 0); + + nhg = rib_get_fib_nhg(re); + for (ALL_NEXTHOPS_PTR(nhg, nh)) +@@ -1240,13 +1240,13 @@ int zebra_send_rnh_update(struct rnh *rnh, struct zserv *client, + } + } + +- stream_putc_at(s, nump, num); ++ stream_putw_at(s, nump, num); + } else { + stream_putc(s, 0); // type + stream_putw(s, 0); // instance + stream_putc(s, 0); // distance + stream_putl(s, 0); // metric +- stream_putc(s, 0); // nexthops ++ stream_putw(s, 0); // nexthops + } + stream_putw_at(s, 0, stream_get_endp(s)); + +diff --git a/zebra/zebra_srte.c b/zebra/zebra_srte.c +index c0b83382c4..bb8d4b3b40 100644 +--- a/zebra/zebra_srte.c ++++ b/zebra/zebra_srte.c +@@ -145,7 +145,7 @@ static int zebra_sr_policy_notify_update_client(struct zebra_sr_policy *policy, + stream_putc(s, nhlfe->distance); + stream_putl(s, 0); /* metric - not available */ + nump = stream_get_endp(s); +- stream_putc(s, 0); ++ stream_putw(s, 0); + } + + zapi_nexthop_from_nexthop(&znh, nhlfe->nexthop); +@@ -155,7 +155,7 @@ static int zebra_sr_policy_notify_update_client(struct zebra_sr_policy *policy, + + num++; + } +- stream_putc_at(s, nump, num); ++ stream_putw_at(s, nump, num); + stream_putw_at(s, 0, stream_get_endp(s)); + + client->nh_last_upd_time = monotime(NULL); +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0073-remove-in6addr-cmp.patch b/src/sonic-frr/patch/0073-remove-in6addr-cmp.patch new file mode 100644 index 00000000000..94c54fdfcce --- /dev/null +++ b/src/sonic-frr/patch/0073-remove-in6addr-cmp.patch @@ -0,0 +1,150 @@ +From 716d115e843151b30c3ab27e90182efcff44ecac Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Wed, 30 Oct 2024 10:15:42 -0400 +Subject: [PATCH 1/3] lib: Replace usage of in6addr_cmp with memcmp + +memcmp will return and act exactly the same as in6addr_cmp +but it does it significantly faster than how in6addr_cmp +does it. Let this be a lesson for implementing something +that is a duplicate of what is provided by the c library. + +Signed-off-by: Donald Sharp +--- + lib/sockunion.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/lib/sockunion.c b/lib/sockunion.c +index c37ab1d6dd..1b08a06e93 100644 +--- a/lib/sockunion.c ++++ b/lib/sockunion.c +@@ -621,7 +621,8 @@ int sockunion_cmp(const union sockunion *su1, const union sockunion *su2) + return -1; + } + if (su1->sa.sa_family == AF_INET6) +- return in6addr_cmp(&su1->sin6.sin6_addr, &su2->sin6.sin6_addr); ++ return IN6_ADDR_CMP(&su1->sin6.sin6_addr, &su2->sin6.sin6_addr); ++ + return 0; + } + +-- +2.43.2 + + +From bdce78eb3e909e788efa6a28151464b0d65b768a Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Wed, 30 Oct 2024 10:41:08 -0400 +Subject: [PATCH 2/3] lib, tests: Remove in6addr_cmp function from the system + +This function should just be memcmp. + +Signed-off-by: Donald Sharp +--- + lib/sockunion.c | 17 ----------------- + lib/sockunion.h | 1 - + tests/lib/test_frrlua.c | 2 +- + 3 files changed, 1 insertion(+), 19 deletions(-) + +diff --git a/lib/sockunion.c b/lib/sockunion.c +index 1b08a06e93..4a7c190953 100644 +--- a/lib/sockunion.c ++++ b/lib/sockunion.c +@@ -588,23 +588,6 @@ static void __attribute__((unused)) sockunion_print(const union sockunion *su) + } + } + +-int in6addr_cmp(const struct in6_addr *addr1, const struct in6_addr *addr2) +-{ +- unsigned int i; +- const uint8_t *p1, *p2; +- +- p1 = (const uint8_t *)addr1; +- p2 = (const uint8_t *)addr2; +- +- for (i = 0; i < sizeof(struct in6_addr); i++) { +- if (p1[i] > p2[i]) +- return 1; +- else if (p1[i] < p2[i]) +- return -1; +- } +- return 0; +-} +- + int sockunion_cmp(const union sockunion *su1, const union sockunion *su2) + { + if (su1->sa.sa_family > su2->sa.sa_family) +diff --git a/lib/sockunion.h b/lib/sockunion.h +index 146651225c..5152e70a23 100644 +--- a/lib/sockunion.h ++++ b/lib/sockunion.h +@@ -93,7 +93,6 @@ enum connect_result { connect_error, connect_success, connect_in_progress }; + /* Prototypes. */ + extern int str2sockunion(const char *, union sockunion *); + extern const char *sockunion2str(const union sockunion *, char *, size_t); +-int in6addr_cmp(const struct in6_addr *addr1, const struct in6_addr *addr2); + extern int sockunion_cmp(const union sockunion *, const union sockunion *); + extern int sockunion_same(const union sockunion *, const union sockunion *); + extern unsigned int sockunion_hash(const union sockunion *); +diff --git a/tests/lib/test_frrlua.c b/tests/lib/test_frrlua.c +index 2760a273bd..b9cdfd088f 100644 +--- a/tests/lib/test_frrlua.c ++++ b/tests/lib/test_frrlua.c +@@ -88,7 +88,7 @@ static void test_encode_decode(void) + + lua_pushin6addr(L, &in6addr_a); + lua_decode_in6addr(L, -1, &in6addr_a); +- assert(in6addr_cmp(&in6addr_a, &in6addr_b) == 0); ++ assert(memcmp(&in6addr_a, &in6addr_b, sizeof(struct in6_addr)) == 0); + assert(lua_gettop(L) == 0); + + union sockunion su_a, su_b; +-- +2.43.2 + + +From bf0d3bafd4b29b6f0a9bafc349b7d90dc4310a92 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Thu, 31 Oct 2024 10:06:26 -0400 +Subject: [PATCH 3/3] lib: In sockunion.c convert v6 memcmp's to IPV6_ADDR_CMP + +Signed-off-by: Donald Sharp +--- + lib/sockunion.c | 8 +++----- + 1 file changed, 3 insertions(+), 5 deletions(-) + +diff --git a/lib/sockunion.c b/lib/sockunion.c +index 4a7c190953..7acb5004db 100644 +--- a/lib/sockunion.c ++++ b/lib/sockunion.c +@@ -403,8 +403,7 @@ int sockunion_same(const union sockunion *su1, const union sockunion *su2) + sizeof(struct in_addr)); + break; + case AF_INET6: +- ret = memcmp(&su1->sin6.sin6_addr, &su2->sin6.sin6_addr, +- sizeof(struct in6_addr)); ++ ret = IPV6_ADDR_CMP(&su1->sin6.sin6_addr, &su2->sin6.sin6_addr); + if ((ret == 0) && IN6_IS_ADDR_LINKLOCAL(&su1->sin6.sin6_addr)) { + /* compare interface indices */ + if (su1->sin6.sin6_scope_id && su2->sin6.sin6_scope_id) +@@ -604,7 +603,7 @@ int sockunion_cmp(const union sockunion *su1, const union sockunion *su2) + return -1; + } + if (su1->sa.sa_family == AF_INET6) +- return IN6_ADDR_CMP(&su1->sin6.sin6_addr, &su2->sin6.sin6_addr); ++ return IPV6_ADDR_CMP(&su1->sin6.sin6_addr, &su2->sin6.sin6_addr); + + return 0; + } +@@ -711,8 +710,7 @@ int sockunion_is_null(const union sockunion *su) + case AF_INET: + return (su->sin.sin_addr.s_addr == 0); + case AF_INET6: +- return !memcmp(su->sin6.sin6_addr.s6_addr, null_s6_addr, +- sizeof(null_s6_addr)); ++ return !IPV6_ADDR_CMP(su->sin6.sin6_addr.s6_addr, null_s6_addr); + default: + return 0; + } +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0074-bgp-best-port-reordering.patch b/src/sonic-frr/patch/0074-bgp-best-port-reordering.patch new file mode 100644 index 00000000000..9dd3f6c6c91 --- /dev/null +++ b/src/sonic-frr/patch/0074-bgp-best-port-reordering.patch @@ -0,0 +1,2199 @@ +From b6345ad2f34f78470f8839a21eba6e234f011cfa Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Mon, 11 Mar 2024 15:26:14 -0400 +Subject: [PATCH 01/11] tests: Explicitly call out bgp timers for bgp_evpn_mh + test + +Signed-off-by: Donald Sharp +--- + tests/topotests/bgp_evpn_mh/leaf1/evpn.conf | 1 + + tests/topotests/bgp_evpn_mh/leaf2/evpn.conf | 1 + + tests/topotests/bgp_evpn_mh/spine1/evpn.conf | 1 + + tests/topotests/bgp_evpn_mh/spine2/evpn.conf | 1 + + tests/topotests/bgp_evpn_mh/torm11/evpn.conf | 1 + + tests/topotests/bgp_evpn_mh/torm12/evpn.conf | 1 + + tests/topotests/bgp_evpn_mh/torm21/evpn.conf | 1 + + tests/topotests/bgp_evpn_mh/torm22/evpn.conf | 1 + + 8 files changed, 8 insertions(+) + +diff --git a/tests/topotests/bgp_evpn_mh/leaf1/evpn.conf b/tests/topotests/bgp_evpn_mh/leaf1/evpn.conf +index 33b6d08aba..d246517898 100644 +--- a/tests/topotests/bgp_evpn_mh/leaf1/evpn.conf ++++ b/tests/topotests/bgp_evpn_mh/leaf1/evpn.conf +@@ -1,6 +1,7 @@ + frr defaults datacenter + ! + router bgp 65101 ++ timers bgp 3 10 + bgp router-id 192.168.100.13 + no bgp ebgp-requires-policy + neighbor 192.168.50.1 remote-as external +diff --git a/tests/topotests/bgp_evpn_mh/leaf2/evpn.conf b/tests/topotests/bgp_evpn_mh/leaf2/evpn.conf +index 428998b0fe..6855a436d4 100644 +--- a/tests/topotests/bgp_evpn_mh/leaf2/evpn.conf ++++ b/tests/topotests/bgp_evpn_mh/leaf2/evpn.conf +@@ -1,6 +1,7 @@ + frr defaults datacenter + ! + router bgp 65101 ++ timers bgp 3 10 + bgp router-id 192.168.100.14 + no bgp ebgp-requires-policy + neighbor 192.168.61.1 remote-as external +diff --git a/tests/topotests/bgp_evpn_mh/spine1/evpn.conf b/tests/topotests/bgp_evpn_mh/spine1/evpn.conf +index b9fce46ea4..7d6fef699d 100644 +--- a/tests/topotests/bgp_evpn_mh/spine1/evpn.conf ++++ b/tests/topotests/bgp_evpn_mh/spine1/evpn.conf +@@ -1,6 +1,7 @@ + frr defaults datacenter + ! + router bgp 65001 ++ timers bgp 3 10 + bgp router-id 192.168.100.13 + no bgp ebgp-requires-policy + neighbor 192.168.50.2 remote-as external +diff --git a/tests/topotests/bgp_evpn_mh/spine2/evpn.conf b/tests/topotests/bgp_evpn_mh/spine2/evpn.conf +index 1430e10b68..c651ada686 100644 +--- a/tests/topotests/bgp_evpn_mh/spine2/evpn.conf ++++ b/tests/topotests/bgp_evpn_mh/spine2/evpn.conf +@@ -1,6 +1,7 @@ + frr defaults datacenter + ! + router bgp 65001 ++ timers bgp 3 10 + bgp router-id 192.168.100.14 + no bgp ebgp-requires-policy + neighbor 192.168.60.2 remote-as external +diff --git a/tests/topotests/bgp_evpn_mh/torm11/evpn.conf b/tests/topotests/bgp_evpn_mh/torm11/evpn.conf +index 2c1c695a18..62b7ec5855 100644 +--- a/tests/topotests/bgp_evpn_mh/torm11/evpn.conf ++++ b/tests/topotests/bgp_evpn_mh/torm11/evpn.conf +@@ -7,6 +7,7 @@ frr defaults datacenter + ! + ! + router bgp 65002 ++ timers bgp 3 10 + bgp router-id 192.168.100.15 + no bgp ebgp-requires-policy + neighbor 192.168.1.1 remote-as external +diff --git a/tests/topotests/bgp_evpn_mh/torm12/evpn.conf b/tests/topotests/bgp_evpn_mh/torm12/evpn.conf +index 8b0ce1d98f..3ceb974c47 100644 +--- a/tests/topotests/bgp_evpn_mh/torm12/evpn.conf ++++ b/tests/topotests/bgp_evpn_mh/torm12/evpn.conf +@@ -7,6 +7,7 @@ frr defaults datacenter + ! + ! + router bgp 65003 ++ timers bgp 3 10 + bgp router-id 192.168.100.16 + no bgp ebgp-requires-policy + neighbor 192.168.2.1 remote-as external +diff --git a/tests/topotests/bgp_evpn_mh/torm21/evpn.conf b/tests/topotests/bgp_evpn_mh/torm21/evpn.conf +index 5247dc1ebd..ecaf85ddb7 100644 +--- a/tests/topotests/bgp_evpn_mh/torm21/evpn.conf ++++ b/tests/topotests/bgp_evpn_mh/torm21/evpn.conf +@@ -7,6 +7,7 @@ frr defaults datacenter + ! + ! + router bgp 65004 ++ timers bgp 3 10 + bgp router-id 192.168.100.17 + no bgp ebgp-requires-policy + neighbor 192.168.3.1 remote-as external +diff --git a/tests/topotests/bgp_evpn_mh/torm22/evpn.conf b/tests/topotests/bgp_evpn_mh/torm22/evpn.conf +index ec56360176..c7e152498c 100644 +--- a/tests/topotests/bgp_evpn_mh/torm22/evpn.conf ++++ b/tests/topotests/bgp_evpn_mh/torm22/evpn.conf +@@ -6,6 +6,7 @@ frr defaults datacenter + ! debug bgp zebra + ! + router bgp 65005 ++ timers bgp 3 10 + bgp router-id 192.168.100.18 + no bgp ebgp-requires-policy + neighbor 192.168.4.1 remote-as external +-- +2.43.2 + + +From da25ab9fa54cad2db494becf0645da8fdad5b414 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Mon, 11 Mar 2024 14:40:49 -0400 +Subject: [PATCH 02/11] tests: teste_ospf_rte_calc.py uses bgp add pytest mark + +Signed-off-by: Donald Sharp +--- + tests/topotests/ospf_basic_functionality/test_ospf_rte_calc.py | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tests/topotests/ospf_basic_functionality/test_ospf_rte_calc.py b/tests/topotests/ospf_basic_functionality/test_ospf_rte_calc.py +index f0950a2db3..45c1325917 100644 +--- a/tests/topotests/ospf_basic_functionality/test_ospf_rte_calc.py ++++ b/tests/topotests/ospf_basic_functionality/test_ospf_rte_calc.py +@@ -49,7 +49,7 @@ from lib.ospf import ( + verify_ospf_interface, + ) + +-pytestmark = [pytest.mark.ospfd, pytest.mark.staticd] ++pytestmark = [pytest.mark.bgpd, pytest.mark.ospfd, pytest.mark.staticd] + + + # Global variables +-- +2.43.2 + + +From fc76785fe670153941b1f320fabc2ca9c1511e33 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Mon, 11 Mar 2024 11:22:49 -0400 +Subject: [PATCH 03/11] bgpd: Modify update_evpn_type5_route_entry to include + path_info pointer + +Modify update_evpn_type5_route_entry to return a pointer to the +struct bgp_path_info modified in this function. This code +merely follows the standards used in other bgp_evpn.c code +where the update function returns the pointer to the path +info. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_evpn.c | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index 405e9a84bb..c7f8024f79 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -1584,7 +1584,8 @@ struct bgp_path_info *bgp_evpn_route_get_local_path( + int update_evpn_type5_route_entry(struct bgp *bgp_evpn, + struct bgp *bgp_vrf, afi_t afi, + safi_t safi, struct bgp_dest *dest, +- struct attr *attr, int *route_changed) ++ struct attr *attr, int *route_changed, ++ struct bgp_path_info **entry) + { + struct attr *attr_new = NULL; + struct bgp_path_info *pi = NULL; +@@ -1622,8 +1623,8 @@ int update_evpn_type5_route_entry(struct bgp *bgp_evpn, + + /* add the route entry to route node*/ + bgp_path_info_add(dest, pi); ++ *entry = pi; + } else { +- + tmp_pi = local_pi; + if (!attrhash_cmp(tmp_pi->attr, attr)) { + +@@ -1645,6 +1646,7 @@ int update_evpn_type5_route_entry(struct bgp *bgp_evpn, + tmp_pi->attr = attr_new; + tmp_pi->uptime = monotime(NULL); + } ++ *entry = local_pi; + } + return 0; + } +@@ -1660,6 +1662,7 @@ int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp, + struct bgp_dest *dest = NULL; + struct bgp *bgp_evpn = NULL; + int route_changed = 0; ++ struct bgp_path_info *pi = NULL; + + bgp_evpn = bgp_get_evpn(); + if (!bgp_evpn) +@@ -1741,7 +1744,7 @@ int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp, + + /* create or update the route entry within the route node */ + update_evpn_type5_route_entry(bgp_evpn, bgp_vrf, afi, safi, dest, &attr, +- &route_changed); ++ &route_changed, &pi); + + /* schedule for processing and unlock node */ + if (route_changed) { +-- +2.43.2 + + +From 6032fb1a37b1d195e67f0e594d762ce048df092e Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Wed, 6 Mar 2024 15:03:31 -0500 +Subject: [PATCH 04/11] bgpd: Fix indentation problem in + bgp_recalculate_afi_safi_bestpaths + +This is seriously indented. Let's make it a bit better. + +Signed-off-by: Donald Sharp +--- + bgpd/bgpd.c | 24 +++++++++++++----------- + 1 file changed, 13 insertions(+), 11 deletions(-) + +diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c +index cf52053c4e..b1711848e6 100644 +--- a/bgpd/bgpd.c ++++ b/bgpd/bgpd.c +@@ -1878,17 +1878,19 @@ void bgp_recalculate_afi_safi_bestpaths(struct bgp *bgp, afi_t afi, safi_t safi) + for (dest = bgp_table_top(bgp->rib[afi][safi]); dest; + dest = bgp_route_next(dest)) { + table = bgp_dest_get_bgp_table_info(dest); +- if (table != NULL) { +- /* Special handling for 2-level routing +- * tables. */ +- if (safi == SAFI_MPLS_VPN || safi == SAFI_ENCAP +- || safi == SAFI_EVPN) { +- for (ndest = bgp_table_top(table); ndest; +- ndest = bgp_route_next(ndest)) +- bgp_process(bgp, ndest, afi, safi); +- } else +- bgp_process(bgp, dest, afi, safi); +- } ++ ++ if (!table) ++ continue; ++ ++ /* Special handling for 2-level routing ++ * tables. */ ++ if (safi == SAFI_MPLS_VPN || safi == SAFI_ENCAP ++ || safi == SAFI_EVPN) { ++ for (ndest = bgp_table_top(table); ndest; ++ ndest = bgp_route_next(ndest)) ++ bgp_process(bgp, ndest, afi, safi); ++ } else ++ bgp_process(bgp, dest, afi, safi); + } + } + +-- +2.43.2 + + +From a4a790e18469c46fe55e8bf861da4bc37108e2b7 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Fri, 1 Mar 2024 09:49:30 -0500 +Subject: [PATCH 05/11] bgpd: Add a path_info_flags dumper for bgp + +Add a debug function to allow developers to dump flags +associated with a bgp_path_info in a human readable format. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_route.c | 51 +++++++++++++++++++++++++++++++++++++++++++++--- + 1 file changed, 48 insertions(+), 3 deletions(-) + +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index e05507c520..c778002dc8 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -114,6 +114,45 @@ static const struct message bgp_pmsi_tnltype_str[] = { + #define VRFID_NONE_STR "-" + #define SOFT_RECONFIG_TASK_MAX_PREFIX 25000 + ++static inline char *bgp_route_dump_path_info_flags(struct bgp_path_info *pi, ++ char *buf, size_t len) ++{ ++ uint32_t flags = pi->flags; ++ ++ if (flags == 0) { ++ snprintfrr(buf, len, "None "); ++ return buf; ++ } ++ ++ snprintfrr(buf, len, "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", ++ CHECK_FLAG(flags, BGP_PATH_IGP_CHANGED) ? "IGP Changed " : "", ++ CHECK_FLAG(flags, BGP_PATH_DAMPED) ? "Damped" : "", ++ CHECK_FLAG(flags, BGP_PATH_HISTORY) ? "History " : "", ++ CHECK_FLAG(flags, BGP_PATH_SELECTED) ? "Selected " : "", ++ CHECK_FLAG(flags, BGP_PATH_VALID) ? "Valid " : "", ++ CHECK_FLAG(flags, BGP_PATH_ATTR_CHANGED) ? "Attr Changed " ++ : "", ++ CHECK_FLAG(flags, BGP_PATH_DMED_CHECK) ? "Dmed Check " : "", ++ CHECK_FLAG(flags, BGP_PATH_DMED_SELECTED) ? "Dmed Selected " ++ : "", ++ CHECK_FLAG(flags, BGP_PATH_STALE) ? "Stale " : "", ++ CHECK_FLAG(flags, BGP_PATH_REMOVED) ? "Removed " : "", ++ CHECK_FLAG(flags, BGP_PATH_COUNTED) ? "Counted " : "", ++ CHECK_FLAG(flags, BGP_PATH_MULTIPATH) ? "Mpath " : "", ++ CHECK_FLAG(flags, BGP_PATH_MULTIPATH_CHG) ? "Mpath Chg " : "", ++ CHECK_FLAG(flags, BGP_PATH_RIB_ATTR_CHG) ? "Rib Chg " : "", ++ CHECK_FLAG(flags, BGP_PATH_ANNC_NH_SELF) ? "NH Self " : "", ++ CHECK_FLAG(flags, BGP_PATH_LINK_BW_CHG) ? "LinkBW Chg " : "", ++ CHECK_FLAG(flags, BGP_PATH_ACCEPT_OWN) ? "Accept Own " : "", ++ CHECK_FLAG(flags, BGP_PATH_MPLSVPN_LABEL_NH) ? "MPLS Label " ++ : "", ++ CHECK_FLAG(flags, BGP_PATH_MPLSVPN_NH_LABEL_BIND) ++ ? "MPLS Label Bind " ++ : ""); ++ ++ return buf; ++} ++ + DEFINE_HOOK(bgp_process, + (struct bgp * bgp, afi_t afi, safi_t safi, struct bgp_dest *bn, + struct peer *peer, bool withdraw), +@@ -683,12 +722,18 @@ int bgp_path_info_cmp(struct bgp *bgp, struct bgp_path_info *new, + } + + if (debug) { ++ char buf1[256], buf2[256]; ++ + bpi_ultimate = bgp_get_imported_bpi_ultimate(exist); + bgp_path_info_path_with_addpath_rx_str(bpi_ultimate, exist_buf, + sizeof(exist_buf)); +- zlog_debug("%s(%s): Comparing %s flags 0x%x with %s flags 0x%x", +- pfx_buf, bgp->name_pretty, new_buf, new->flags, +- exist_buf, exist->flags); ++ zlog_debug("%s(%s): Comparing %s flags %s with %s flags %s", ++ pfx_buf, bgp->name_pretty, new_buf, ++ bgp_route_dump_path_info_flags(new, buf1, ++ sizeof(buf1)), ++ exist_buf, ++ bgp_route_dump_path_info_flags(exist, buf2, ++ sizeof(buf2))); + } + + newattr = new->attr; +-- +2.43.2 + + +From eeea1554360868aa5efec3ad9cd9e5d7a13621aa Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Fri, 1 Mar 2024 10:01:35 -0500 +Subject: [PATCH 06/11] bgpd: Add BGP_PATH_UNSORTED for future commits + +Add a new flag BGP_PATH_UNSORTED to keep track +of sorted -vs- unsorted path_info's. Add some +ability to the system to understand when that +flag is set. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_route.c | 36 ++++++++++++------- + bgpd/bgp_route.h | 3 +- + .../r1/show_bgp_ipv4-post4.1.ref | 2 +- + .../r1/show_bgp_ipv4-post5.0.ref | 2 +- + .../r1/show_bgp_ipv4-post6.1.ref | 2 +- + .../all_protocol_startup/r1/show_bgp_ipv4.ref | 2 +- + .../r1/show_bgp_ipv6-post4.1.ref | 2 +- + .../all_protocol_startup/r1/show_bgp_ipv6.ref | 2 +- + .../r1/show_bgp_ipv6_post6.1.ref | 2 +- + 9 files changed, 32 insertions(+), 21 deletions(-) + +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index c778002dc8..a9bbcaf37e 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -124,7 +124,7 @@ static inline char *bgp_route_dump_path_info_flags(struct bgp_path_info *pi, + return buf; + } + +- snprintfrr(buf, len, "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", ++ snprintfrr(buf, len, "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", + CHECK_FLAG(flags, BGP_PATH_IGP_CHANGED) ? "IGP Changed " : "", + CHECK_FLAG(flags, BGP_PATH_DAMPED) ? "Damped" : "", + CHECK_FLAG(flags, BGP_PATH_HISTORY) ? "History " : "", +@@ -148,7 +148,8 @@ static inline char *bgp_route_dump_path_info_flags(struct bgp_path_info *pi, + : "", + CHECK_FLAG(flags, BGP_PATH_MPLSVPN_NH_LABEL_BIND) + ? "MPLS Label Bind " +- : ""); ++ : "", ++ CHECK_FLAG(flags, BGP_PATH_UNSORTED) ? "Unsorted " : ""); + + return buf; + } +@@ -9021,6 +9022,9 @@ static void route_vty_short_status_out(struct vty *vty, + if (path->extra && bgp_path_suppressed(path)) + json_object_boolean_true_add(json_path, "suppressed"); + ++ if (CHECK_FLAG(path->flags, BGP_PATH_UNSORTED)) ++ json_object_boolean_true_add(json_path, "unsorted"); ++ + if (CHECK_FLAG(path->flags, BGP_PATH_VALID) + && !CHECK_FLAG(path->flags, BGP_PATH_HISTORY)) + json_object_boolean_true_add(json_path, "valid"); +@@ -9083,6 +9087,8 @@ static void route_vty_short_status_out(struct vty *vty, + /* Selected */ + if (CHECK_FLAG(path->flags, BGP_PATH_HISTORY)) + vty_out(vty, "h"); ++ else if (CHECK_FLAG(path->flags, BGP_PATH_UNSORTED)) ++ vty_out(vty, "u"); + else if (CHECK_FLAG(path->flags, BGP_PATH_DAMPED)) + vty_out(vty, "d"); + else if (CHECK_FLAG(path->flags, BGP_PATH_SELECTED)) +@@ -13723,21 +13729,23 @@ enum bgp_pcounts { + PCOUNT_COUNTED, + PCOUNT_BPATH_SELECTED, + PCOUNT_PFCNT, /* the figure we display to users */ ++ PCOUNT_UNSORTED, + PCOUNT_MAX, + }; + + static const char *const pcount_strs[] = { +- [PCOUNT_ADJ_IN] = "Adj-in", +- [PCOUNT_DAMPED] = "Damped", +- [PCOUNT_REMOVED] = "Removed", +- [PCOUNT_HISTORY] = "History", +- [PCOUNT_STALE] = "Stale", +- [PCOUNT_VALID] = "Valid", +- [PCOUNT_ALL] = "All RIB", +- [PCOUNT_COUNTED] = "PfxCt counted", +- [PCOUNT_BPATH_SELECTED] = "PfxCt Best Selected", +- [PCOUNT_PFCNT] = "Useable", +- [PCOUNT_MAX] = NULL, ++ [PCOUNT_ADJ_IN] = "Adj-in", ++ [PCOUNT_DAMPED] = "Damped", ++ [PCOUNT_REMOVED] = "Removed", ++ [PCOUNT_HISTORY] = "History", ++ [PCOUNT_STALE] = "Stale", ++ [PCOUNT_VALID] = "Valid", ++ [PCOUNT_ALL] = "All RIB", ++ [PCOUNT_COUNTED] = "PfxCt counted", ++ [PCOUNT_BPATH_SELECTED] = "PfxCt Best Selected", ++ [PCOUNT_PFCNT] = "Useable", ++ [PCOUNT_UNSORTED] = "Unsorted", ++ [PCOUNT_MAX] = NULL, + }; + + struct peer_pcounts { +@@ -13778,6 +13786,8 @@ static void bgp_peer_count_proc(struct bgp_dest *rn, struct peer_pcounts *pc) + pc->count[PCOUNT_PFCNT]++; + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)) + pc->count[PCOUNT_BPATH_SELECTED]++; ++ if (CHECK_FLAG(pi->flags, BGP_PATH_UNSORTED)) ++ pc->count[PCOUNT_UNSORTED]++; + + if (CHECK_FLAG(pi->flags, BGP_PATH_COUNTED)) { + pc->count[PCOUNT_COUNTED]++; +diff --git a/bgpd/bgp_route.h b/bgpd/bgp_route.h +index 2929c75df7..5781eb70f2 100644 +--- a/bgpd/bgp_route.h ++++ b/bgpd/bgp_route.h +@@ -59,7 +59,7 @@ enum bgp_show_adj_route_type { + + #define BGP_SHOW_SCODE_HEADER \ + "Status codes: s suppressed, d damped, " \ +- "h history, * valid, > best, = multipath,\n" \ ++ "h history, u unsorted, * valid, > best, = multipath,\n" \ + " i internal, r RIB-failure, S Stale, R Removed\n" + #define BGP_SHOW_OCODE_HEADER \ + "Origin codes: i - IGP, e - EGP, ? - incomplete\n" +@@ -327,6 +327,7 @@ struct bgp_path_info { + #define BGP_PATH_ACCEPT_OWN (1 << 16) + #define BGP_PATH_MPLSVPN_LABEL_NH (1 << 17) + #define BGP_PATH_MPLSVPN_NH_LABEL_BIND (1 << 18) ++#define BGP_PATH_UNSORTED (1 << 19) + + /* BGP route type. This can be static, RIP, OSPF, BGP etc. */ + uint8_t type; +diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post4.1.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post4.1.ref +index b2e8de5ce1..fca6cbed82 100644 +--- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post4.1.ref ++++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post4.1.ref +@@ -1,5 +1,5 @@ + BGP table version is 1, local router ID is 192.168.0.1, vrf id 0 +-Status codes: s suppressed, d damped, h history, * valid, > best, = multipath, ++Status codes: s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath, + i internal, r RIB-failure, S Stale, R Removed + Nexthop codes: @NNN nexthop's vrf id, < announce-nh-self + Origin codes: i - IGP, e - EGP, ? - incomplete +diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post5.0.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post5.0.ref +index 7bee704182..bb10828815 100644 +--- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post5.0.ref ++++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post5.0.ref +@@ -1,5 +1,5 @@ + BGP table version is 1, local router ID is 192.168.0.1, vrf id 0 +-Status codes: s suppressed, d damped, h history, * valid, > best, = multipath, ++Status codes: s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath, + i internal, r RIB-failure, S Stale, R Removed + Nexthop codes: @NNN nexthop's vrf id, < announce-nh-self + Origin codes: i - IGP, e - EGP, ? - incomplete +diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post6.1.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post6.1.ref +index 31071e760d..04ad86fbb0 100644 +--- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post6.1.ref ++++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post6.1.ref +@@ -1,6 +1,6 @@ + BGP table version is 1, local router ID is 192.168.0.1, vrf id 0 + Default local pref 100, local AS 100 +-Status codes: s suppressed, d damped, h history, * valid, > best, = multipath, ++Status codes: s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath, + i internal, r RIB-failure, S Stale, R Removed + Nexthop codes: @NNN nexthop's vrf id, < announce-nh-self + Origin codes: i - IGP, e - EGP, ? - incomplete +diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4.ref +index 53c4793bf4..ca95a1671b 100644 +--- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4.ref ++++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4.ref +@@ -1,5 +1,5 @@ + BGP table version is 1, local router ID is 192.168.0.1 +-Status codes: s suppressed, d damped, h history, * valid, > best, = multipath, ++Status codes: s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath, + i internal, r RIB-failure, S Stale, R Removed + Origin codes: i - IGP, e - EGP, ? - incomplete + +diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6-post4.1.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6-post4.1.ref +index fe3f0720d8..f1b09264b2 100644 +--- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6-post4.1.ref ++++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6-post4.1.ref +@@ -1,5 +1,5 @@ + BGP table version is 1, local router ID is 192.168.0.1, vrf id 0 +-Status codes: s suppressed, d damped, h history, * valid, > best, = multipath, ++Status codes: s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath, + i internal, r RIB-failure, S Stale, R Removed + Nexthop codes: @NNN nexthop's vrf id, < announce-nh-self + Origin codes: i - IGP, e - EGP, ? - incomplete +diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6.ref +index 363b4f5349..278fc2dad2 100644 +--- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6.ref ++++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6.ref +@@ -1,5 +1,5 @@ + BGP table version is 1, local router ID is 192.168.0.1 +-Status codes: s suppressed, d damped, h history, * valid, > best, = multipath, ++Status codes: s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath, + i internal, r RIB-failure, S Stale, R Removed + Origin codes: i - IGP, e - EGP, ? - incomplete + +diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6_post6.1.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6_post6.1.ref +index 8c3229b45d..88f3eac178 100644 +--- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6_post6.1.ref ++++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6_post6.1.ref +@@ -1,6 +1,6 @@ + BGP table version is 1, local router ID is 192.168.0.1, vrf id 0 + Default local pref 100, local AS 100 +-Status codes: s suppressed, d damped, h history, * valid, > best, = multipath, ++Status codes: s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath, + i internal, r RIB-failure, S Stale, R Removed + Nexthop codes: @NNN nexthop's vrf id, < announce-nh-self + Origin codes: i - IGP, e - EGP, ? - incomplete +-- +2.43.2 + + +From 2913f3227edd1b85927f763a4f5ca2bb6dcf9899 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Mon, 18 Mar 2024 09:33:21 -0400 +Subject: [PATCH 07/11] bgpd: Call bgp_process when bgp_path_info_delete is + called + +bgp_damp.c has an instance of bgp_path_info_delete is called. +Thus setting up the path info for deletion, but since it never +calls bgp_process, it can never be deleted. This means that in +a dampening situation, after a withdrawal the path_info would +stick around. Schedule the path for deletion. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_damp.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/bgpd/bgp_damp.c b/bgpd/bgp_damp.c +index 80425ebe7a..7893884fa6 100644 +--- a/bgpd/bgp_damp.c ++++ b/bgpd/bgp_damp.c +@@ -306,8 +306,10 @@ void bgp_damp_info_free(struct bgp_damp_info *bdi, int withdraw, afi_t afi, + bgp_path_info_unset_flag(bdi->dest, path, + BGP_PATH_HISTORY | BGP_PATH_DAMPED); + +- if (bdi->lastrecord == BGP_RECORD_WITHDRAW && withdraw) ++ if (bdi->lastrecord == BGP_RECORD_WITHDRAW && withdraw) { + bgp_path_info_delete(bdi->dest, path); ++ bgp_process(path->peer->bgp, bdi->dest, afi, safi); ++ } + + XFREE(MTYPE_BGP_DAMP_INFO, bdi); + } +-- +2.43.2 + + +From 70e1a639ac199ed5fb6df2e0a88e565472c4e65a Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Mon, 4 Mar 2024 10:41:13 -0500 +Subject: [PATCH 08/11] bgpd: Add pi to bgp_process + +This will allow a consistency of approach to adding/removing +pi's to from the workqueue for processing as well as properly +handling the dest->info pi list more appropriately. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_damp.c | 4 +-- + bgpd/bgp_evpn.c | 24 +++++++-------- + bgpd/bgp_evpn_mh.c | 8 ++--- + bgpd/bgp_label.c | 2 +- + bgpd/bgp_mplsvpn.c | 14 ++++----- + bgpd/bgp_nht.c | 2 +- + bgpd/bgp_route.c | 77 ++++++++++++++++++++-------------------------- + bgpd/bgp_route.h | 3 +- + bgpd/bgp_vty.c | 9 ++++-- + bgpd/bgp_zebra.c | 2 +- + bgpd/bgpd.c | 16 +++++++--- + bgpd/rfapi/rfapi.c | 6 ++-- + 12 files changed, 85 insertions(+), 82 deletions(-) + +diff --git a/bgpd/bgp_damp.c b/bgpd/bgp_damp.c +index 7893884fa6..6b6387b1b5 100644 +--- a/bgpd/bgp_damp.c ++++ b/bgpd/bgp_damp.c +@@ -150,7 +150,7 @@ static void bgp_reuse_timer(struct event *t) + bgp_aggregate_increment( + bgp, bgp_dest_get_prefix(bdi->dest), + bdi->path, bdi->afi, bdi->safi); +- bgp_process(bgp, bdi->dest, bdi->afi, ++ bgp_process(bgp, bdi->dest, bdi->path, bdi->afi, + bdi->safi); + } + +@@ -308,7 +308,7 @@ void bgp_damp_info_free(struct bgp_damp_info *bdi, int withdraw, afi_t afi, + + if (bdi->lastrecord == BGP_RECORD_WITHDRAW && withdraw) { + bgp_path_info_delete(bdi->dest, path); +- bgp_process(path->peer->bgp, bdi->dest, afi, safi); ++ bgp_process(path->peer->bgp, bdi->dest, path, afi, safi); + } + + XFREE(MTYPE_BGP_DAMP_INFO, bdi); +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index c7f8024f79..72dfd000f6 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -1428,7 +1428,7 @@ void evpn_delete_old_local_route(struct bgp *bgp, struct bgpevpn *vpn, + * this table. + */ + if (pi) +- bgp_process(bgp, global_dest, afi, safi); ++ bgp_process(bgp, global_dest, pi, afi, safi); + bgp_dest_unlock_node(global_dest); + } + +@@ -1748,7 +1748,7 @@ int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp, + + /* schedule for processing and unlock node */ + if (route_changed) { +- bgp_process(bgp_evpn, dest, afi, safi); ++ bgp_process(bgp_evpn, dest, pi, afi, safi); + bgp_dest_unlock_node(dest); + } + +@@ -2314,7 +2314,7 @@ int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, + false /* setup_sync */, NULL /* old_is_sync */); + + /* Schedule for processing and unlock node. */ +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, global_pi, afi, safi); + bgp_dest_unlock_node(dest); + } + +@@ -2374,7 +2374,7 @@ int delete_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp) + + delete_evpn_route_entry(bgp_evpn, afi, safi, dest, &pi); + if (pi) +- bgp_process(bgp_evpn, dest, afi, safi); ++ bgp_process(bgp_evpn, dest, pi, afi, safi); + bgp_dest_unlock_node(dest); + return 0; + } +@@ -2414,7 +2414,7 @@ int delete_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, + * this table. + */ + if (pi) +- bgp_process(bgp, global_dest, afi, safi); ++ bgp_process(bgp, global_dest, pi, afi, safi); + bgp_dest_unlock_node(global_dest); + } + +@@ -2586,7 +2586,7 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn, + NULL /* old_is_sync */); + + /* Schedule for processing and unlock node. */ +- bgp_process(bgp, global_dest, afi, safi); ++ bgp_process(bgp, global_dest, global_pi, afi, safi); + bgp_dest_unlock_node(global_dest); + } + +@@ -2671,7 +2671,7 @@ void delete_global_type2_routes(struct bgp *bgp, struct bgpevpn *vpn) + + delete_evpn_route_entry(bgp, afi, safi, dest, &pi); + if (pi) +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, pi, afi, safi); + } + + /* Unlock RD node. */ +@@ -3140,7 +3140,7 @@ int install_evpn_route_entry_in_vrf(struct bgp *bgp_vrf, + safi); + + /* Perform route selection and update zebra, if required. */ +- bgp_process(bgp_vrf, dest, afi, safi); ++ bgp_process(bgp_vrf, dest, pi, afi, safi); + + /* Process for route leaking. */ + vpn_leak_from_vrf_update(bgp_get_default(), bgp_vrf, pi); +@@ -3502,7 +3502,7 @@ int uninstall_evpn_route_entry_in_vrf(struct bgp *bgp_vrf, + bgp_evpn_path_nh_del(bgp_vrf, pi); + + /* Perform route selection and update zebra, if required. */ +- bgp_process(bgp_vrf, dest, afi, safi); ++ bgp_process(bgp_vrf, dest, pi, afi, safi); + + /* Unlock route node. */ + bgp_dest_unlock_node(dest); +@@ -4475,7 +4475,7 @@ void update_advertise_vni_route(struct bgp *bgp, struct bgpevpn *vpn, + } + + /* Schedule for processing and unlock node. */ +- bgp_process(bgp, global_dest, afi, safi); ++ bgp_process(bgp, global_dest, global_pi, afi, safi); + bgp_dest_unlock_node(global_dest); + } + +@@ -4525,7 +4525,7 @@ void update_advertise_vni_routes(struct bgp *bgp, struct bgpevpn *vpn) + false /* setup_sync */, NULL /* old_is_sync */); + + /* Schedule for processing and unlock node. */ +- bgp_process(bgp, global_dest, afi, safi); ++ bgp_process(bgp, global_dest, pi, afi, safi); + bgp_dest_unlock_node(global_dest); + } + +@@ -4570,7 +4570,7 @@ int delete_withdraw_vni_routes(struct bgp *bgp, struct bgpevpn *vpn) + * this table. + */ + if (pi) +- bgp_process(bgp, global_dest, afi, safi); ++ bgp_process(bgp, global_dest, pi, afi, safi); + bgp_dest_unlock_node(global_dest); + } + +diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c +index f36d109b65..f5df47fbfb 100644 +--- a/bgpd/bgp_evpn_mh.c ++++ b/bgpd/bgp_evpn_mh.c +@@ -512,7 +512,7 @@ static int bgp_evpn_mh_route_delete(struct bgp *bgp, struct bgp_evpn_es *es, + * this table. + */ + if (pi) +- bgp_process(bgp, global_dest, afi, safi); ++ bgp_process(bgp, global_dest, pi, afi, safi); + bgp_dest_unlock_node(global_dest); + } + +@@ -563,7 +563,7 @@ int delete_global_ead_evi_routes(struct bgp *bgp, struct bgpevpn *vpn) + + delete_evpn_route_entry(bgp, afi, safi, bd, &pi); + if (pi) +- bgp_process(bgp, bd, afi, safi); ++ bgp_process(bgp, bd, pi, afi, safi); + } + } + +@@ -687,7 +687,7 @@ static int bgp_evpn_type4_route_update(struct bgp *bgp, + attr_new, &global_pi, &route_changed); + + /* Schedule for processing and unlock node. */ +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, global_pi, afi, safi); + bgp_dest_unlock_node(dest); + } + +@@ -1026,7 +1026,7 @@ static int bgp_evpn_type1_route_update(struct bgp *bgp, struct bgp_evpn_es *es, + attr_new, &global_pi, &route_changed); + + /* Schedule for processing and unlock node. */ +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, global_pi, afi, safi); + bgp_dest_unlock_node(dest); + } + +diff --git a/bgpd/bgp_label.c b/bgpd/bgp_label.c +index 7327ab5182..68104967b2 100644 +--- a/bgpd/bgp_label.c ++++ b/bgpd/bgp_label.c +@@ -74,7 +74,7 @@ int bgp_parse_fec_update(void) + bgp_set_valid_label(&dest->local_label); + } + SET_FLAG(dest->flags, BGP_NODE_LABEL_CHANGED); +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, NULL, afi, safi); + bgp_dest_unlock_node(dest); + return 1; + } +diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c +index ef8ca39e82..a48ef875c4 100644 +--- a/bgpd/bgp_mplsvpn.c ++++ b/bgpd/bgp_mplsvpn.c +@@ -1254,7 +1254,7 @@ leak_update(struct bgp *to_bgp, struct bgp_dest *bn, + + /* Process change. */ + bgp_aggregate_increment(to_bgp, p, bpi, afi, safi); +- bgp_process(to_bgp, bn, afi, safi); ++ bgp_process(to_bgp, bn, bpi, afi, safi); + + if (debug) + zlog_debug("%s: ->%s: %pBD Found route, changed attr", +@@ -1316,7 +1316,7 @@ leak_update(struct bgp *to_bgp, struct bgp_dest *bn, + bgp_aggregate_increment(to_bgp, p, new, afi, safi); + bgp_path_info_add(bn, new); + +- bgp_process(to_bgp, bn, afi, safi); ++ bgp_process(to_bgp, bn, new, afi, safi); + + if (debug) + zlog_debug("%s: ->%s: %pBD: Added new route", __func__, +@@ -2002,7 +2002,7 @@ void vpn_leak_from_vrf_withdraw(struct bgp *to_bgp, /* to */ + + bgp_aggregate_decrement(to_bgp, p, bpi, afi, safi); + bgp_path_info_delete(bn, bpi); +- bgp_process(to_bgp, bn, afi, safi); ++ bgp_process(to_bgp, bn, bpi, afi, safi); + } + bgp_dest_unlock_node(bn); + } +@@ -2058,7 +2058,7 @@ void vpn_leak_from_vrf_withdraw_all(struct bgp *to_bgp, struct bgp *from_bgp, + to_bgp, bgp_dest_get_prefix(bn), + bpi, afi, safi); + bgp_path_info_delete(bn, bpi); +- bgp_process(to_bgp, bn, afi, safi); ++ bgp_process(to_bgp, bn, bpi, afi, safi); + bgp_mplsvpn_path_nh_label_unlink( + bpi->extra->vrfleak->parent); + } +@@ -2543,7 +2543,7 @@ void vpn_leak_to_vrf_withdraw(struct bgp_path_info *path_vpn) + bpi); + bgp_aggregate_decrement(bgp, p, bpi, afi, safi); + bgp_path_info_delete(bn, bpi); +- bgp_process(bgp, bn, afi, safi); ++ bgp_process(bgp, bn, bpi, afi, safi); + } + bgp_dest_unlock_node(bn); + } +@@ -2575,7 +2575,7 @@ void vpn_leak_to_vrf_withdraw_all(struct bgp *to_bgp, afi_t afi) + bgp_dest_get_prefix(bn), + bpi, afi, safi); + bgp_path_info_delete(bn, bpi); +- bgp_process(to_bgp, bn, afi, safi); ++ bgp_process(to_bgp, bn, bpi, afi, safi); + } + } + } +@@ -4226,7 +4226,7 @@ static int bgp_mplsvpn_nh_label_bind_get_local_label_cb(mpls_label_t label, + if (!table) + continue; + SET_FLAG(pi->net->flags, BGP_NODE_LABEL_CHANGED); +- bgp_process(table->bgp, pi->net, table->afi, table->safi); ++ bgp_process(table->bgp, pi->net, pi, table->afi, table->safi); + } + + return 0; +diff --git a/bgpd/bgp_nht.c b/bgpd/bgp_nht.c +index 1614779ea6..97ec7e33b1 100644 +--- a/bgpd/bgp_nht.c ++++ b/bgpd/bgp_nht.c +@@ -1414,7 +1414,7 @@ void evaluate_paths(struct bgp_nexthop_cache *bnc) + } + } + +- bgp_process(bgp_path, dest, afi, safi); ++ bgp_process(bgp_path, dest, path, afi, safi); + } + + if (peer) { +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index a9bbcaf37e..e3350df7b0 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -2892,6 +2892,7 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest, + (pi != NULL) && (nextpi = pi->next, 1); pi = nextpi) { + enum bgp_path_selection_reason reason; + ++ UNSET_FLAG(pi->flags, BGP_PATH_UNSORTED); + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)) + old_select = pi; + +@@ -3748,13 +3749,22 @@ static struct bgp_process_queue *bgp_processq_alloc(struct bgp *bgp) + return pqnode; + } + +-void bgp_process(struct bgp *bgp, struct bgp_dest *dest, afi_t afi, safi_t safi) ++void bgp_process(struct bgp *bgp, struct bgp_dest *dest, ++ struct bgp_path_info *pi, afi_t afi, safi_t safi) + { + #define ARBITRARY_PROCESS_QLEN 10000 + struct work_queue *wq = bgp->process_queue; + struct bgp_process_queue *pqnode; + int pqnode_reuse = 0; + ++ /* ++ * Indicate that *this* pi is in an unsorted ++ * situation, even if the node is already ++ * scheduled. ++ */ ++ if (pi) ++ SET_FLAG(pi->flags, BGP_PATH_UNSORTED); ++ + /* already scheduled for processing? */ + if (CHECK_FLAG(dest->flags, BGP_NODE_PROCESS_SCHEDULED)) + return; +@@ -4003,7 +4013,7 @@ void bgp_rib_remove(struct bgp_dest *dest, struct bgp_path_info *pi, + } + + hook_call(bgp_process, peer->bgp, afi, safi, dest, peer, true); +- bgp_process(peer->bgp, dest, afi, safi); ++ bgp_process(peer->bgp, dest, pi, afi, safi); + } + + static void bgp_rib_withdraw(struct bgp_dest *dest, struct bgp_path_info *pi, +@@ -4603,7 +4613,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, + != BGP_DAMP_SUPPRESSED) { + bgp_aggregate_increment(bgp, p, pi, afi, + safi); +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, pi, afi, safi); + } + } else /* Duplicate - odd */ + { +@@ -4631,7 +4641,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, + bgp_path_info_unset_flag( + dest, pi, BGP_PATH_STALE); + bgp_dest_set_defer_flag(dest, false); +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, pi, afi, safi); + } + } + +@@ -4921,7 +4931,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, + /* Process change. */ + bgp_aggregate_increment(bgp, p, pi, afi, safi); + +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, pi, afi, safi); + bgp_dest_unlock_node(dest); + + if (SAFI_UNICAST == safi +@@ -5066,7 +5076,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, + hook_call(bgp_process, bgp, afi, safi, dest, peer, false); + + /* Process change. */ +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, new, afi, safi); + + if (SAFI_UNICAST == safi + && (bgp->inst_type == BGP_INSTANCE_TYPE_VRF +@@ -6573,7 +6583,7 @@ void bgp_static_update(struct bgp *bgp, const struct prefix *p, + + /* Process change. */ + bgp_aggregate_increment(bgp, p, pi, afi, safi); +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, pi, afi, safi); + + if (SAFI_MPLS_VPN == safi && + bgp->inst_type == BGP_INSTANCE_TYPE_DEFAULT) { +@@ -6631,7 +6641,7 @@ void bgp_static_update(struct bgp *bgp, const struct prefix *p, + bgp_dest_unlock_node(dest); + + /* Process change. */ +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, new, afi, safi); + + if (SAFI_UNICAST == safi && + (bgp->inst_type == BGP_INSTANCE_TYPE_VRF || +@@ -6688,7 +6698,7 @@ void bgp_static_withdraw(struct bgp *bgp, const struct prefix *p, afi_t afi, + bgp_aggregate_decrement(bgp, p, pi, afi, safi); + bgp_unlink_nexthop(pi); + bgp_path_info_delete(dest, pi); +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, pi, afi, safi); + } + + /* Unlock bgp_node_lookup. */ +@@ -7093,7 +7103,7 @@ static void bgp_purge_af_static_redist_routes(struct bgp *bgp, afi_t afi, + safi); + bgp_unlink_nexthop(pi); + bgp_path_info_delete(dest, pi); +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, pi, afi, safi); + } + } + } +@@ -7482,7 +7492,7 @@ static void bgp_aggregate_install( + SET_FLAG(new->flags, BGP_PATH_VALID); + + bgp_path_info_add(dest, new); +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, new, afi, safi); + } else { + uninstall_aggregate_route: + for (pi = orig; pi; pi = pi->next) +@@ -7494,7 +7504,7 @@ static void bgp_aggregate_install( + /* Withdraw static BGP route from routing table. */ + if (pi) { + bgp_path_info_delete(dest, pi); +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, pi, afi, safi); + } + } + +@@ -7580,7 +7590,6 @@ void bgp_aggregate_toggle_suppressed(struct bgp_aggregate *aggregate, + const struct prefix *dest_p; + struct bgp_dest *dest, *top; + struct bgp_path_info *pi; +- bool toggle_suppression; + + /* We've found a different MED we must revert any suppressed routes. */ + top = bgp_node_get(table, p); +@@ -7590,7 +7599,6 @@ void bgp_aggregate_toggle_suppressed(struct bgp_aggregate *aggregate, + if (dest_p->prefixlen <= p->prefixlen) + continue; + +- toggle_suppression = false; + for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) { + if (BGP_PATH_HOLDDOWN(pi)) + continue; +@@ -7601,17 +7609,14 @@ void bgp_aggregate_toggle_suppressed(struct bgp_aggregate *aggregate, + if (suppress) { + /* Suppress route if not suppressed already. */ + if (aggr_suppress_path(aggregate, pi)) +- toggle_suppression = true; ++ bgp_process(bgp, dest, pi, afi, safi); + continue; + } + + /* Install route if there is no more suppression. */ + if (aggr_unsuppress_path(aggregate, pi)) +- toggle_suppression = true; ++ bgp_process(bgp, dest, pi, afi, safi); + } +- +- if (toggle_suppression) +- bgp_process(bgp, dest, afi, safi); + } + bgp_dest_unlock_node(top); + } +@@ -7670,7 +7675,6 @@ bool bgp_aggregate_route(struct bgp *bgp, const struct prefix *p, afi_t afi, + struct ecommunity *ecommunity = NULL; + struct lcommunity *lcommunity = NULL; + struct bgp_path_info *pi; +- unsigned long match = 0; + uint8_t atomic_aggregate = 0; + + /* If the bgp instance is being deleted or self peer is deleted +@@ -7720,8 +7724,6 @@ bool bgp_aggregate_route(struct bgp *bgp, const struct prefix *p, afi_t afi, + if (!bgp_check_advertise(bgp, dest, safi)) + continue; + +- match = 0; +- + for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) { + if (BGP_PATH_HOLDDOWN(pi)) + continue; +@@ -7745,7 +7747,7 @@ bool bgp_aggregate_route(struct bgp *bgp, const struct prefix *p, afi_t afi, + if (aggregate->summary_only + && AGGREGATE_MED_VALID(aggregate)) { + if (aggr_suppress_path(aggregate, pi)) +- match++; ++ bgp_process(bgp, dest, pi, afi, safi); + } + + /* +@@ -7761,7 +7763,7 @@ bool bgp_aggregate_route(struct bgp *bgp, const struct prefix *p, afi_t afi, + && AGGREGATE_MED_VALID(aggregate) + && aggr_suppress_map_test(bgp, aggregate, pi)) { + if (aggr_suppress_path(aggregate, pi)) +- match++; ++ bgp_process(bgp, dest, pi, afi, safi); + } + + aggregate->count++; +@@ -7822,8 +7824,6 @@ bool bgp_aggregate_route(struct bgp *bgp, const struct prefix *p, afi_t afi, + aggregate, + bgp_attr_get_lcommunity(pi->attr)); + } +- if (match) +- bgp_process(bgp, dest, afi, safi); + } + if (aggregate->as_set) { + bgp_compute_aggregate_aspath_val(aggregate); +@@ -7883,7 +7883,6 @@ void bgp_aggregate_delete(struct bgp *bgp, const struct prefix *p, afi_t afi, + struct bgp_dest *top; + struct bgp_dest *dest; + struct bgp_path_info *pi; +- unsigned long match; + + table = bgp->rib[afi][safi]; + +@@ -7895,7 +7894,6 @@ void bgp_aggregate_delete(struct bgp *bgp, const struct prefix *p, afi_t afi, + + if (dest_p->prefixlen <= p->prefixlen) + continue; +- match = 0; + + for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) { + if (BGP_PATH_HOLDDOWN(pi)) +@@ -7913,7 +7911,7 @@ void bgp_aggregate_delete(struct bgp *bgp, const struct prefix *p, afi_t afi, + if (pi->extra && pi->extra->aggr_suppressors && + listcount(pi->extra->aggr_suppressors)) { + if (aggr_unsuppress_path(aggregate, pi)) +- match++; ++ bgp_process(bgp, dest, pi, afi, safi); + } + + aggregate->count--; +@@ -7955,10 +7953,6 @@ void bgp_aggregate_delete(struct bgp *bgp, const struct prefix *p, afi_t afi, + pi->attr)); + } + } +- +- /* If this node was suppressed, process the change. */ +- if (match) +- bgp_process(bgp, dest, afi, safi); + } + if (aggregate->as_set) { + aspath_free(aggregate->aspath); +@@ -8107,7 +8101,6 @@ static void bgp_remove_route_from_aggregate(struct bgp *bgp, afi_t afi, + struct community *community = NULL; + struct ecommunity *ecommunity = NULL; + struct lcommunity *lcommunity = NULL; +- unsigned long match = 0; + + /* If the bgp instance is being deleted or self peer is deleted + * then do not create aggregate route +@@ -8124,12 +8117,12 @@ static void bgp_remove_route_from_aggregate(struct bgp *bgp, afi_t afi, + + if (aggregate->summary_only && AGGREGATE_MED_VALID(aggregate)) + if (aggr_unsuppress_path(aggregate, pi)) +- match++; ++ bgp_process(bgp, pi->net, pi, afi, safi); + + if (aggregate->suppress_map_name && AGGREGATE_MED_VALID(aggregate) + && aggr_suppress_map_test(bgp, aggregate, pi)) + if (aggr_unsuppress_path(aggregate, pi)) +- match++; ++ bgp_process(bgp, pi->net, pi, afi, safi); + + /* + * This must be called after `summary`, `suppress-map` check to avoid +@@ -8171,10 +8164,6 @@ static void bgp_remove_route_from_aggregate(struct bgp *bgp, afi_t afi, + aggregate, bgp_attr_get_lcommunity(pi->attr)); + } + +- /* If this node was suppressed, process the change. */ +- if (match) +- bgp_process(bgp, pi->net, afi, safi); +- + origin = BGP_ORIGIN_IGP; + if (aggregate->incomplete_origin_count > 0) + origin = BGP_ORIGIN_INCOMPLETE; +@@ -8778,7 +8767,7 @@ void bgp_redistribute_add(struct bgp *bgp, struct prefix *p, + /* Process change. */ + bgp_aggregate_increment(bgp, p, bpi, afi, + SAFI_UNICAST); +- bgp_process(bgp, bn, afi, SAFI_UNICAST); ++ bgp_process(bgp, bn, bpi, afi, SAFI_UNICAST); + bgp_dest_unlock_node(bn); + aspath_unintern(&attr.aspath); + +@@ -8801,7 +8790,7 @@ void bgp_redistribute_add(struct bgp *bgp, struct prefix *p, + bgp_path_info_add(bn, new); + bgp_dest_unlock_node(bn); + SET_FLAG(bn->flags, BGP_NODE_FIB_INSTALLED); +- bgp_process(bgp, bn, afi, SAFI_UNICAST); ++ bgp_process(bgp, bn, new, afi, SAFI_UNICAST); + + if ((bgp->inst_type == BGP_INSTANCE_TYPE_VRF) + || (bgp->inst_type == BGP_INSTANCE_TYPE_DEFAULT)) { +@@ -8842,7 +8831,7 @@ void bgp_redistribute_delete(struct bgp *bgp, struct prefix *p, uint8_t type, + } + bgp_aggregate_decrement(bgp, p, pi, afi, SAFI_UNICAST); + bgp_path_info_delete(dest, pi); +- bgp_process(bgp, dest, afi, SAFI_UNICAST); ++ bgp_process(bgp, dest, pi, afi, SAFI_UNICAST); + } + bgp_dest_unlock_node(dest); + } +@@ -8876,7 +8865,7 @@ void bgp_redistribute_withdraw(struct bgp *bgp, afi_t afi, int type, + bgp_path_info_delete(dest, pi); + if (!CHECK_FLAG(bgp->flags, + BGP_FLAG_DELETE_IN_PROGRESS)) +- bgp_process(bgp, dest, afi, SAFI_UNICAST); ++ bgp_process(bgp, dest, pi, afi, SAFI_UNICAST); + else { + dest = bgp_path_info_reap(dest, pi); + assert(dest); +diff --git a/bgpd/bgp_route.h b/bgpd/bgp_route.h +index 5781eb70f2..1e5c31afab 100644 +--- a/bgpd/bgp_route.h ++++ b/bgpd/bgp_route.h +@@ -802,7 +802,8 @@ extern void bgp_withdraw(struct peer *peer, const struct prefix *p, + struct bgp_route_evpn *evpn); + + /* for bgp_nexthop and bgp_damp */ +-extern void bgp_process(struct bgp *, struct bgp_dest *, afi_t, safi_t); ++extern void bgp_process(struct bgp *bgp, struct bgp_dest *dest, ++ struct bgp_path_info *pi, afi_t afi, safi_t safi); + + /* + * Add an end-of-initial-update marker to the process queue. This is just a +diff --git a/bgpd/bgp_vty.c b/bgpd/bgp_vty.c +index 9530a66fca..8d442ae64a 100644 +--- a/bgpd/bgp_vty.c ++++ b/bgpd/bgp_vty.c +@@ -10672,7 +10672,10 @@ static int bgp_clear_prefix(struct vty *vty, const char *view_name, + if (rm_p->prefixlen == match.prefixlen) { + SET_FLAG(rm->flags, + BGP_NODE_USER_CLEAR); +- bgp_process(bgp, rm, afi, safi); ++ bgp_process(bgp, rm, ++ bgp_dest_get_bgp_path_info( ++ rm), ++ afi, safi); + } + bgp_dest_unlock_node(rm); + } +@@ -10684,7 +10687,9 @@ static int bgp_clear_prefix(struct vty *vty, const char *view_name, + + if (dest_p->prefixlen == match.prefixlen) { + SET_FLAG(dest->flags, BGP_NODE_USER_CLEAR); +- bgp_process(bgp, dest, afi, safi); ++ bgp_process(bgp, dest, ++ bgp_dest_get_bgp_path_info(dest), ++ afi, safi); + } + bgp_dest_unlock_node(dest); + } +diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c +index d553d3d27f..d94ec66c18 100644 +--- a/bgpd/bgp_zebra.c ++++ b/bgpd/bgp_zebra.c +@@ -2142,7 +2142,7 @@ bool bgp_redistribute_metric_set(struct bgp *bgp, struct bgp_redist *red, + + bgp_path_info_set_flag(dest, pi, + BGP_PATH_ATTR_CHANGED); +- bgp_process(bgp, dest, afi, SAFI_UNICAST); ++ bgp_process(bgp, dest, pi, afi, SAFI_UNICAST); + } + } + } +diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c +index b1711848e6..8a3115c8fb 100644 +--- a/bgpd/bgpd.c ++++ b/bgpd/bgpd.c +@@ -1873,6 +1873,7 @@ void bgp_peer_conf_if_to_su_update(struct peer_connection *connection) + void bgp_recalculate_afi_safi_bestpaths(struct bgp *bgp, afi_t afi, safi_t safi) + { + struct bgp_dest *dest, *ndest; ++ struct bgp_path_info *pi, *next; + struct bgp_table *table; + + for (dest = bgp_table_top(bgp->rib[afi][safi]); dest; +@@ -1887,10 +1888,17 @@ void bgp_recalculate_afi_safi_bestpaths(struct bgp *bgp, afi_t afi, safi_t safi) + if (safi == SAFI_MPLS_VPN || safi == SAFI_ENCAP + || safi == SAFI_EVPN) { + for (ndest = bgp_table_top(table); ndest; +- ndest = bgp_route_next(ndest)) +- bgp_process(bgp, ndest, afi, safi); +- } else +- bgp_process(bgp, dest, afi, safi); ++ ndest = bgp_route_next(ndest)) { ++ for (pi = bgp_dest_get_bgp_path_info(ndest); ++ (pi != NULL) && (next = pi->next, 1); ++ pi = next) ++ bgp_process(bgp, ndest, pi, afi, safi); ++ } ++ } else { ++ for (pi = bgp_dest_get_bgp_path_info(dest); ++ (pi != NULL) && (next = pi->next, 1); pi = next) ++ bgp_process(bgp, dest, pi, afi, safi); ++ } + } + } + +diff --git a/bgpd/rfapi/rfapi.c b/bgpd/rfapi/rfapi.c +index 382af05c24..ae899daf82 100644 +--- a/bgpd/rfapi/rfapi.c ++++ b/bgpd/rfapi/rfapi.c +@@ -463,7 +463,7 @@ void del_vnc_route(struct rfapi_descriptor *rfd, + + bgp_aggregate_decrement(bgp, p, bpi, afi, safi); + bgp_path_info_delete(bn, bpi); +- bgp_process(bgp, bn, afi, safi); ++ bgp_process(bgp, bn, bpi, afi, safi); + } else { + vnc_zlog_debug_verbose( + "%s: Couldn't find route (safi=%d) at prefix %pFX", +@@ -1001,7 +1001,7 @@ void add_vnc_route(struct rfapi_descriptor *rfd, /* cookie, VPN UN addr, peer */ + + /* Process change. */ + bgp_aggregate_increment(bgp, p, bpi, afi, safi); +- bgp_process(bgp, bn, afi, safi); ++ bgp_process(bgp, bn, bpi, afi, safi); + bgp_dest_unlock_node(bn); + + vnc_zlog_debug_any( +@@ -1046,7 +1046,7 @@ void add_vnc_route(struct rfapi_descriptor *rfd, /* cookie, VPN UN addr, peer */ + } + + bgp_dest_unlock_node(bn); +- bgp_process(bgp, bn, afi, safi); ++ bgp_process(bgp, bn, new, afi, safi); + + vnc_zlog_debug_any( + "%s: Added route (safi=%s) at prefix %s (bn=%p, prd=%pRDP)", +-- +2.43.2 + + +From 88c7297831d5c49b8f9208075ec2947bb4180765 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Mon, 11 Mar 2024 14:05:59 -0400 +Subject: [PATCH 09/11] bgpd: bgp_best_selection is inherently pi based + +Currently evpn code calls bgp_best_selection for local +decisions for local tables to figure out what to do. +This is also pi based so let's note that the pi has +been changed before calling bgp_best_selection. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_evpn.c | 14 ++++++++------ + bgpd/bgp_evpn_mh.c | 13 ++++++++----- + bgpd/bgp_evpn_private.h | 3 ++- + 3 files changed, 18 insertions(+), 12 deletions(-) + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index 72dfd000f6..76b005fac0 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -1442,7 +1442,7 @@ void evpn_delete_old_local_route(struct bgp *bgp, struct bgpevpn *vpn, + * Note: vpn is NULL for local EAD-ES routes. + */ + int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, +- struct bgp_dest *dest) ++ struct bgp_dest *dest, struct bgp_path_info *pi) + { + struct bgp_path_info *old_select, *new_select; + struct bgp_path_info_pair old_and_new; +@@ -1450,6 +1450,8 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, + safi_t safi = SAFI_EVPN; + int ret = 0; + ++ SET_FLAG(pi->flags, BGP_PATH_UNSORTED); ++ + /* Compute the best path. */ + bgp_best_selection(bgp, dest, &bgp->maxpaths[afi][safi], &old_and_new, + afi, safi); +@@ -2258,7 +2260,7 @@ int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, + * route would win, and we should evict the defunct local route + * and (re)install the remote route into zebra. + */ +- evpn_route_select_install(bgp, vpn, dest); ++ evpn_route_select_install(bgp, vpn, dest, pi); + /* + * If the new local route was not selected evict it and tell zebra + * to re-add the best remote dest. BGP doesn't retain non-best local +@@ -2424,7 +2426,7 @@ int delete_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, + if (pi) { + dest = bgp_path_info_reap(dest, pi); + assert(dest); +- evpn_route_select_install(bgp, vpn, dest); ++ evpn_route_select_install(bgp, vpn, dest, pi); + } + + /* dest should still exist due to locking make coverity happy */ +@@ -2539,7 +2541,7 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn, + * advertised to peers; otherwise, ensure it is evicted and + * (re)install the remote route into zebra. + */ +- evpn_route_select_install(bgp, vpn, dest); ++ evpn_route_select_install(bgp, vpn, dest, pi); + + if (CHECK_FLAG(pi->flags, BGP_PATH_REMOVED)) { + route_change = 0; +@@ -3252,7 +3254,7 @@ int install_evpn_route_entry_in_vni_common( + bgp_evpn_remote_ip_hash_add(vpn, pi); + + /* Perform route selection and update zebra, if required. */ +- ret = evpn_route_select_install(bgp, vpn, dest); ++ ret = evpn_route_select_install(bgp, vpn, dest, pi); + + /* if the best path is a local path with a non-zero ES + * sync info against the local path may need to be updated +@@ -3294,7 +3296,7 @@ int uninstall_evpn_route_entry_in_vni_common( + bgp_path_info_delete(dest, pi); + + /* Perform route selection and update zebra, if required. */ +- ret = evpn_route_select_install(bgp, vpn, dest); ++ ret = evpn_route_select_install(bgp, vpn, dest, pi); + + /* if the best path is a local path with a non-zero ES + * sync info against the local path may need to be updated +diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c +index f5df47fbfb..d3def69198 100644 +--- a/bgpd/bgp_evpn_mh.c ++++ b/bgpd/bgp_evpn_mh.c +@@ -91,7 +91,8 @@ static void bgp_evpn_path_nh_unlink(struct bgp_path_evpn_nh_info *nh_info); + */ + static int bgp_evpn_es_route_select_install(struct bgp *bgp, + struct bgp_evpn_es *es, +- struct bgp_dest *dest) ++ struct bgp_dest *dest, ++ struct bgp_path_info *pi) + { + int ret = 0; + int zret = 0; +@@ -101,6 +102,8 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp, + struct bgp_path_info *new_select; /* new best */ + struct bgp_path_info_pair old_and_new; + ++ SET_FLAG(pi->flags, BGP_PATH_UNSORTED); ++ + /* Compute the best path. */ + bgp_best_selection(bgp, dest, &bgp->maxpaths[afi][safi], &old_and_new, + afi, safi); +@@ -232,7 +235,7 @@ static int bgp_evpn_es_route_install(struct bgp *bgp, + } + + /* Perform route selection and update zebra, if required. */ +- ret = bgp_evpn_es_route_select_install(bgp, es, dest); ++ ret = bgp_evpn_es_route_select_install(bgp, es, dest, pi); + + bgp_dest_unlock_node(dest); + +@@ -273,7 +276,7 @@ static int bgp_evpn_es_route_uninstall(struct bgp *bgp, struct bgp_evpn_es *es, + bgp_path_info_delete(dest, pi); + + /* Perform route selection and update zebra, if required. */ +- ret = bgp_evpn_es_route_select_install(bgp, es, dest); ++ ret = bgp_evpn_es_route_select_install(bgp, es, dest, pi); + + /* Unlock route node. */ + bgp_dest_unlock_node(dest); +@@ -669,7 +672,7 @@ static int bgp_evpn_type4_route_update(struct bgp *bgp, + * this is just to set the flags correctly + * as local route in the ES always wins. + */ +- bgp_evpn_es_route_select_install(bgp, es, dest); ++ bgp_evpn_es_route_select_install(bgp, es, dest, pi); + bgp_dest_unlock_node(dest); + + /* If this is a new route or some attribute has changed, export the +@@ -1009,7 +1012,7 @@ static int bgp_evpn_type1_route_update(struct bgp *bgp, struct bgp_evpn_es *es, + * this is just to set the flags correctly as local route in + * the ES always wins. + */ +- evpn_route_select_install(bgp, vpn, dest); ++ evpn_route_select_install(bgp, vpn, dest, pi); + bgp_dest_unlock_node(dest); + + /* If this is a new route or some attribute has changed, export the +diff --git a/bgpd/bgp_evpn_private.h b/bgpd/bgp_evpn_private.h +index 5af99afa34..07bba9b426 100644 +--- a/bgpd/bgp_evpn_private.h ++++ b/bgpd/bgp_evpn_private.h +@@ -716,7 +716,8 @@ extern void delete_evpn_route_entry(struct bgp *bgp, afi_t afi, safi_t safi, + struct bgp_path_info **pi); + int vni_list_cmp(void *p1, void *p2); + extern int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, +- struct bgp_dest *dest); ++ struct bgp_dest *dest, ++ struct bgp_path_info *pi); + extern struct bgp_dest * + bgp_evpn_global_node_get(struct bgp_table *table, afi_t afi, safi_t safi, + const struct prefix_evpn *evp, struct prefix_rd *prd, +-- +2.43.2 + + +From a12e265b609288d5a466103b84b26ef53cad8f9f Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Wed, 20 Mar 2024 10:13:00 -0400 +Subject: [PATCH 10/11] bgpd: Do not reap, schedule for deletion + +Do not reap instead let's schedule for deletion +and let best_path_selection take care of the deletion +as it should. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_evpn.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index 76b005fac0..3c89495ccc 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -2424,8 +2424,7 @@ int delete_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, + */ + delete_evpn_route_entry(bgp, afi, safi, dest, &pi); + if (pi) { +- dest = bgp_path_info_reap(dest, pi); +- assert(dest); ++ bgp_path_info_delete(dest, pi); + evpn_route_select_install(bgp, vpn, dest, pi); + } + +-- +2.43.2 + + +From c420b9efd6bcbe556cd9d801d02c5fcedd526b85 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Tue, 19 Mar 2024 12:26:14 -0400 +Subject: [PATCH 11/11] bgpd: Sort the bgp_path_info's + +Currently bgp_path_info's are stored in reverse order +received. Sort them by the best path ordering. + +This will allow for optimizations in the future on +how multipath is done. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_evpn.c | 20 ++- + bgpd/bgp_mplsvpn.c | 19 ++- + bgpd/bgp_route.c | 368 +++++++++++++++++++++++++++++++++++++-------- + bgpd/bgp_route.h | 2 + + 4 files changed, 336 insertions(+), 73 deletions(-) + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index 3c89495ccc..cb51023a45 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -1444,13 +1444,26 @@ void evpn_delete_old_local_route(struct bgp *bgp, struct bgpevpn *vpn, + int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, + struct bgp_dest *dest, struct bgp_path_info *pi) + { +- struct bgp_path_info *old_select, *new_select; ++ struct bgp_path_info *old_select, *new_select, *first; + struct bgp_path_info_pair old_and_new; + afi_t afi = AFI_L2VPN; + safi_t safi = SAFI_EVPN; + int ret = 0; + ++ first = bgp_dest_get_bgp_path_info(dest); + SET_FLAG(pi->flags, BGP_PATH_UNSORTED); ++ if (pi != first) { ++ if (pi->next) ++ pi->next->prev = pi->prev; ++ if (pi->prev) ++ pi->prev->next = pi->next; ++ ++ if (first) ++ first->prev = pi; ++ pi->next = first; ++ pi->prev = NULL; ++ bgp_dest_set_bgp_path_info(dest, pi); ++ } + + /* Compute the best path. */ + bgp_best_selection(bgp, dest, &bgp->maxpaths[afi][safi], &old_and_new, +@@ -6482,9 +6495,10 @@ void bgp_filter_evpn_routes_upon_martian_change( + + for (dest = bgp_table_top(table); dest; + dest = bgp_route_next(dest)) { ++ struct bgp_path_info *next; + +- for (pi = bgp_dest_get_bgp_path_info(dest); pi; +- pi = pi->next) { ++ for (pi = bgp_dest_get_bgp_path_info(dest); ++ (pi != NULL) && (next = pi->next, 1); pi = next) { + bool affected = false; + const struct prefix *p; + +diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c +index a48ef875c4..b9846d7e63 100644 +--- a/bgpd/bgp_mplsvpn.c ++++ b/bgpd/bgp_mplsvpn.c +@@ -2022,7 +2022,7 @@ void vpn_leak_from_vrf_withdraw_all(struct bgp *to_bgp, struct bgp *from_bgp, + + struct bgp_table *table; + struct bgp_dest *bn; +- struct bgp_path_info *bpi; ++ struct bgp_path_info *bpi, *next; + + /* This is the per-RD table of prefixes */ + table = bgp_dest_get_bgp_table_info(pdest); +@@ -2037,7 +2037,8 @@ void vpn_leak_from_vrf_withdraw_all(struct bgp *to_bgp, struct bgp *from_bgp, + __func__, bn); + } + +- for (; bpi; bpi = bpi->next) { ++ for (; (bpi != NULL) && (next = bpi->next, 1); ++ bpi = next) { + if (debug) + zlog_debug("%s: type %d, sub_type %d", + __func__, bpi->type, +@@ -2552,7 +2553,7 @@ void vpn_leak_to_vrf_withdraw(struct bgp_path_info *path_vpn) + void vpn_leak_to_vrf_withdraw_all(struct bgp *to_bgp, afi_t afi) + { + struct bgp_dest *bn; +- struct bgp_path_info *bpi; ++ struct bgp_path_info *bpi, *next; + safi_t safi = SAFI_UNICAST; + int debug = BGP_DEBUG(vpn, VPN_LEAK_TO_VRF); + +@@ -2563,9 +2564,8 @@ void vpn_leak_to_vrf_withdraw_all(struct bgp *to_bgp, afi_t afi) + */ + for (bn = bgp_table_top(to_bgp->rib[afi][safi]); bn; + bn = bgp_route_next(bn)) { +- +- for (bpi = bgp_dest_get_bgp_path_info(bn); bpi; +- bpi = bpi->next) { ++ for (bpi = bgp_dest_get_bgp_path_info(bn); ++ (bpi != NULL) && (next = bpi->next, 1); bpi = next) { + if (bpi->extra && bpi->extra->vrfleak && + bpi->extra->vrfleak->bgp_orig != to_bgp && + bpi->extra->vrfleak->parent && +@@ -2604,8 +2604,11 @@ void vpn_leak_no_retain(struct bgp *to_bgp, struct bgp *vpn_from, afi_t afi) + continue; + + for (bn = bgp_table_top(table); bn; bn = bgp_route_next(bn)) { +- for (bpi = bgp_dest_get_bgp_path_info(bn); bpi; +- bpi = bpi->next) { ++ struct bgp_path_info *next; ++ ++ for (bpi = bgp_dest_get_bgp_path_info(bn); ++ (bpi != NULL) && (next = bpi->next, 1); ++ bpi = next) { + if (bpi->extra && bpi->extra->vrfleak && + bpi->extra->vrfleak->bgp_orig == to_bgp) + continue; +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index e3350df7b0..c33b14675a 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -482,6 +482,7 @@ void bgp_path_info_add_with_caller(const char *name, struct bgp_dest *dest, + top->prev = pi; + bgp_dest_set_bgp_path_info(dest, pi); + ++ SET_FLAG(pi->flags, BGP_PATH_UNSORTED); + bgp_path_info_lock(pi); + bgp_dest_lock_node(dest); + peer_lock(pi->peer); /* bgp_path_info peer reference */ +@@ -502,8 +503,26 @@ struct bgp_dest *bgp_path_info_reap(struct bgp_dest *dest, + bgp_dest_set_bgp_path_info(dest, pi->next); + + bgp_path_info_mpath_dequeue(pi); ++ ++ pi->next = NULL; ++ pi->prev = NULL; ++ ++ hook_call(bgp_snmp_update_stats, dest, pi, false); ++ + bgp_path_info_unlock(pi); ++ return bgp_dest_unlock_node(dest); ++} ++ ++static struct bgp_dest *bgp_path_info_reap_unsorted(struct bgp_dest *dest, ++ struct bgp_path_info *pi) ++{ ++ bgp_path_info_mpath_dequeue(pi); ++ ++ pi->next = NULL; ++ pi->prev = NULL; ++ + hook_call(bgp_snmp_update_stats, dest, pi, false); ++ bgp_path_info_unlock(pi); + + return bgp_dest_unlock_node(dest); + } +@@ -2786,17 +2805,18 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest, + struct bgp_path_info_pair *result, afi_t afi, + safi_t safi) + { +- struct bgp_path_info *new_select; +- struct bgp_path_info *old_select; ++ struct bgp_path_info *new_select, *look_thru; ++ struct bgp_path_info *old_select, *worse, *first; + struct bgp_path_info *pi; + struct bgp_path_info *pi1; + struct bgp_path_info *pi2; +- struct bgp_path_info *nextpi = NULL; + int paths_eq, do_mpath; +- bool debug; ++ bool debug, any_comparisons; + struct list mp_list; + char pfx_buf[PREFIX2STR_BUFFER] = {}; + char path_buf[PATH_ADDPATH_STR_BUFFER]; ++ enum bgp_path_selection_reason reason = bgp_path_selection_none; ++ bool unsorted_items = true; + + bgp_mp_list_init(&mp_list); + do_mpath = +@@ -2807,16 +2827,16 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest, + if (debug) + prefix2str(bgp_dest_get_prefix(dest), pfx_buf, sizeof(pfx_buf)); + +- dest->reason = bgp_path_selection_none; + /* bgp deterministic-med */ + new_select = NULL; + if (CHECK_FLAG(bgp->flags, BGP_FLAG_DETERMINISTIC_MED)) { +- + /* Clear BGP_PATH_DMED_SELECTED for all paths */ + for (pi1 = bgp_dest_get_bgp_path_info(dest); pi1; +- pi1 = pi1->next) ++ pi1 = pi1->next) { + bgp_path_info_unset_flag(dest, pi1, + BGP_PATH_DMED_SELECTED); ++ UNSET_FLAG(pi1->flags, BGP_PATH_DMED_CHECK); ++ } + + for (pi1 = bgp_dest_get_bgp_path_info(dest); pi1; + pi1 = pi1->next) { +@@ -2885,70 +2905,273 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest, + } + } + +- /* Check old selected route and new selected route. */ ++ /* ++ * Let's grab the unsorted items from the list ++ */ ++ struct bgp_path_info *unsorted_list = NULL; ++ struct bgp_path_info *unsorted_list_spot = NULL; ++ struct bgp_path_info *unsorted_holddown = NULL; ++ + old_select = NULL; +- new_select = NULL; +- for (pi = bgp_dest_get_bgp_path_info(dest); +- (pi != NULL) && (nextpi = pi->next, 1); pi = nextpi) { +- enum bgp_path_selection_reason reason; ++ pi = bgp_dest_get_bgp_path_info(dest); ++ while (pi && CHECK_FLAG(pi->flags, BGP_PATH_UNSORTED)) { ++ struct bgp_path_info *next = pi->next; + +- UNSET_FLAG(pi->flags, BGP_PATH_UNSORTED); + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)) + old_select = pi; + +- if (BGP_PATH_HOLDDOWN(pi)) { +- /* reap REMOVED routes, if needs be ++ /* ++ * Pull off pi off the list ++ */ ++ if (pi->next) ++ pi->next->prev = NULL; ++ ++ bgp_dest_set_bgp_path_info(dest, pi->next); ++ pi->next = NULL; ++ pi->prev = NULL; ++ ++ /* ++ * Place it on the unsorted list ++ */ ++ if (unsorted_list_spot) { ++ unsorted_list_spot->next = pi; ++ pi->prev = unsorted_list_spot; ++ pi->next = NULL; ++ } else { ++ unsorted_list = pi; ++ ++ pi->next = NULL; ++ pi->prev = NULL; ++ } ++ ++ unsorted_list_spot = pi; ++ pi = next; ++ } ++ ++ if (!old_select) { ++ old_select = bgp_dest_get_bgp_path_info(dest); ++ if (old_select && ++ !CHECK_FLAG(old_select->flags, BGP_PATH_SELECTED)) ++ old_select = NULL; ++ } ++ ++ if (!unsorted_list) ++ unsorted_items = true; ++ else ++ unsorted_items = false; ++ ++ any_comparisons = false; ++ worse = NULL; ++ while (unsorted_list) { ++ first = unsorted_list; ++ unsorted_list = unsorted_list->next; ++ ++ if (unsorted_list) ++ unsorted_list->prev = NULL; ++ first->next = NULL; ++ first->prev = NULL; ++ ++ /* ++ * It's not likely that the just received unsorted entry ++ * is in holddown and scheduled for removal but we should ++ * check ++ */ ++ if (BGP_PATH_HOLDDOWN(first)) { ++ /* ++ * reap REMOVED routes, if needs be + * selected route must stay for a while longer though + */ + if (debug) +- zlog_debug( +- "%s: %pBD(%s) pi from %s in holddown", +- __func__, dest, bgp->name_pretty, +- pi->peer->host); ++ zlog_debug("%s: %pBD(%s) pi %p from %s in holddown", ++ __func__, dest, bgp->name_pretty, ++ first, first->peer->host); + +- if (CHECK_FLAG(pi->flags, BGP_PATH_REMOVED) && +- (pi != old_select)) { +- dest = bgp_path_info_reap(dest, pi); ++ if (old_select != first && ++ CHECK_FLAG(first->flags, BGP_PATH_REMOVED)) { ++ dest = bgp_path_info_reap_unsorted(dest, first); + assert(dest); +- } ++ } else { ++ /* ++ * We are in hold down, so we cannot sort this ++ * item yet. Let's wait, so hold the unsorted ++ * to the side ++ */ ++ if (unsorted_holddown) { ++ first->next = unsorted_holddown; ++ unsorted_holddown->prev = first; ++ unsorted_holddown = first; ++ } else ++ unsorted_holddown = first; + ++ UNSET_FLAG(first->flags, BGP_PATH_UNSORTED); ++ } + continue; + } + +- if (pi->peer && pi->peer != bgp->peer_self +- && !CHECK_FLAG(pi->peer->sflags, PEER_STATUS_NSF_WAIT)) +- if (!peer_established(pi->peer->connection)) { ++ bgp_path_info_unset_flag(dest, first, BGP_PATH_DMED_CHECK); ++ ++ worse = NULL; ++ ++ struct bgp_path_info *look_thru_next; ++ ++ for (look_thru = bgp_dest_get_bgp_path_info(dest); look_thru; ++ look_thru = look_thru_next) { ++ /* look thru can be reaped save the next pointer */ ++ look_thru_next = look_thru->next; ++ ++ /* ++ * Now we have the first unsorted and the best selected ++ * Let's do best path comparison ++ */ ++ if (BGP_PATH_HOLDDOWN(look_thru)) { ++ /* reap REMOVED routes, if needs be ++ * selected route must stay for a while longer though ++ */ + if (debug) +- zlog_debug( +- "%s: %pBD(%s) non self peer %s not estab state", +- __func__, dest, +- bgp->name_pretty, +- pi->peer->host); ++ zlog_debug("%s: %pBD(%s) pi from %s %p in holddown", ++ __func__, dest, ++ bgp->name_pretty, ++ look_thru->peer->host, ++ look_thru); ++ ++ if (CHECK_FLAG(look_thru->flags, ++ BGP_PATH_REMOVED) && ++ (look_thru != old_select)) { ++ dest = bgp_path_info_reap(dest, ++ look_thru); ++ assert(dest); ++ } + + continue; + } + +- if (CHECK_FLAG(bgp->flags, BGP_FLAG_DETERMINISTIC_MED) +- && (!CHECK_FLAG(pi->flags, BGP_PATH_DMED_SELECTED))) { +- bgp_path_info_unset_flag(dest, pi, BGP_PATH_DMED_CHECK); +- if (debug) +- zlog_debug("%s: %pBD(%s) pi %s dmed", __func__, +- dest, bgp->name_pretty, +- pi->peer->host); +- continue; ++ if (look_thru->peer && ++ look_thru->peer != bgp->peer_self && ++ !CHECK_FLAG(look_thru->peer->sflags, ++ PEER_STATUS_NSF_WAIT)) ++ if (!peer_established( ++ look_thru->peer->connection)) { ++ if (debug) ++ zlog_debug("%s: %pBD(%s) non self peer %s not estab state", ++ __func__, dest, ++ bgp->name_pretty, ++ look_thru->peer->host); ++ ++ continue; ++ } ++ ++ bgp_path_info_unset_flag(dest, look_thru, ++ BGP_PATH_DMED_CHECK); ++ if (CHECK_FLAG(bgp->flags, BGP_FLAG_DETERMINISTIC_MED) && ++ (!CHECK_FLAG(look_thru->flags, ++ BGP_PATH_DMED_SELECTED))) { ++ bgp_path_info_unset_flag(dest, look_thru, ++ BGP_PATH_DMED_CHECK); ++ if (debug) ++ zlog_debug("%s: %pBD(%s) pi %s dmed", ++ __func__, dest, ++ bgp->name_pretty, ++ look_thru->peer->host); ++ ++ worse = look_thru; ++ continue; ++ } ++ ++ reason = dest->reason; ++ any_comparisons = true; ++ if (bgp_path_info_cmp(bgp, first, look_thru, &paths_eq, ++ mpath_cfg, debug, pfx_buf, afi, ++ safi, &reason)) { ++ first->reason = reason; ++ worse = look_thru; ++ /* ++ * We can stop looking ++ */ ++ break; ++ } ++ ++ look_thru->reason = reason; + } + +- bgp_path_info_unset_flag(dest, pi, BGP_PATH_DMED_CHECK); ++ if (!any_comparisons) ++ first->reason = bgp_path_selection_first; ++ ++ /* ++ * At this point worse if NON-NULL is where the first ++ * pointer should be before. if worse is NULL then ++ * first is bestpath too. Let's remove first from the ++ * list and place it in the right spot ++ */ ++ ++ if (!worse) { ++ struct bgp_path_info *end = ++ bgp_dest_get_bgp_path_info(dest); ++ ++ for (; end && end->next != NULL; end = end->next) ++ ; ++ ++ if (end) ++ end->next = first; ++ else ++ bgp_dest_set_bgp_path_info(dest, first); ++ first->prev = end; ++ first->next = NULL; ++ ++ dest->reason = first->reason; ++ } else { ++ if (worse->prev) ++ worse->prev->next = first; ++ first->next = worse; ++ if (worse) { ++ first->prev = worse->prev; ++ worse->prev = first; ++ } else ++ first->prev = NULL; + +- reason = dest->reason; +- if (bgp_path_info_cmp(bgp, pi, new_select, &paths_eq, mpath_cfg, +- debug, pfx_buf, afi, safi, +- &dest->reason)) { +- if (new_select == NULL && +- reason != bgp_path_selection_none) +- dest->reason = reason; +- new_select = pi; ++ if (dest->info == worse) { ++ bgp_dest_set_bgp_path_info(dest, first); ++ dest->reason = first->reason; ++ } + } ++ UNSET_FLAG(first->flags, BGP_PATH_UNSORTED); ++ } ++ ++ if (!unsorted_items) { ++ new_select = bgp_dest_get_bgp_path_info(dest); ++ while (new_select && BGP_PATH_HOLDDOWN(new_select)) ++ new_select = new_select->next; ++ ++ if (new_select) { ++ if (new_select->reason == bgp_path_selection_none) ++ new_select->reason = bgp_path_selection_first; ++ else if (new_select == bgp_dest_get_bgp_path_info(dest) && ++ new_select->next == NULL) ++ new_select->reason = bgp_path_selection_first; ++ dest->reason = new_select->reason; ++ } else ++ dest->reason = bgp_path_selection_none; ++ } else ++ new_select = old_select; ++ ++ ++ /* ++ * Reinsert all the unsorted_holddown items for future processing ++ * at the end of the list. ++ */ ++ if (unsorted_holddown) { ++ struct bgp_path_info *top = bgp_dest_get_bgp_path_info(dest); ++ struct bgp_path_info *prev = NULL; ++ ++ while (top != NULL) { ++ prev = top; ++ top = top->next; ++ } ++ ++ if (prev) { ++ prev->next = unsorted_holddown; ++ unsorted_holddown->prev = prev; ++ } else ++ bgp_dest_set_bgp_path_info(dest, unsorted_holddown); + } + + /* Now that we know which path is the bestpath see if any of the other +@@ -2968,9 +3191,7 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest, + } + + if (do_mpath && new_select) { +- for (pi = bgp_dest_get_bgp_path_info(dest); +- (pi != NULL) && (nextpi = pi->next, 1); pi = nextpi) { +- ++ for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) { + if (debug) + bgp_path_info_path_with_addpath_rx_str( + pi, path_buf, sizeof(path_buf)); +@@ -3527,7 +3748,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + bgp_path_info_unset_flag(dest, old_select, BGP_PATH_SELECTED); + if (new_select) { + if (debug) +- zlog_debug("%s: setting SELECTED flag", __func__); ++ zlog_debug("%s: %pBD setting SELECTED flag", __func__, ++ dest); + bgp_path_info_set_flag(dest, new_select, BGP_PATH_SELECTED); + bgp_path_info_unset_flag(dest, new_select, + BGP_PATH_ATTR_CHANGED); +@@ -3762,9 +3984,25 @@ void bgp_process(struct bgp *bgp, struct bgp_dest *dest, + * situation, even if the node is already + * scheduled. + */ +- if (pi) ++ if (pi) { ++ struct bgp_path_info *first = bgp_dest_get_bgp_path_info(dest); ++ + SET_FLAG(pi->flags, BGP_PATH_UNSORTED); + ++ if (pi != first) { ++ if (pi->next) ++ pi->next->prev = pi->prev; ++ if (pi->prev) ++ pi->prev->next = pi->next; ++ ++ if (first) ++ first->prev = pi; ++ pi->next = first; ++ pi->prev = NULL; ++ bgp_dest_set_bgp_path_info(dest, pi); ++ } ++ } ++ + /* already scheduled for processing? */ + if (CHECK_FLAG(dest->flags, BGP_NODE_PROCESS_SCHEDULED)) + return; +@@ -5647,7 +5885,7 @@ static wq_item_status bgp_clear_route_node(struct work_queue *wq, void *data) + struct bgp_clear_node_queue *cnq = data; + struct bgp_dest *dest = cnq->dest; + struct peer *peer = wq->spec.data; +- struct bgp_path_info *pi; ++ struct bgp_path_info *pi, *next; + struct bgp *bgp; + afi_t afi = bgp_dest_table(dest)->afi; + safi_t safi = bgp_dest_table(dest)->safi; +@@ -5658,7 +5896,8 @@ static wq_item_status bgp_clear_route_node(struct work_queue *wq, void *data) + /* It is possible that we have multiple paths for a prefix from a peer + * if that peer is using AddPath. + */ +- for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) { ++ for (pi = bgp_dest_get_bgp_path_info(dest); ++ (pi != NULL) && (next = pi->next, 1); pi = next) { + if (pi->peer != peer) + continue; + +@@ -5920,7 +6159,7 @@ void bgp_clear_adj_in(struct peer *peer, afi_t afi, safi_t safi) + void bgp_clear_stale_route(struct peer *peer, afi_t afi, safi_t safi) + { + struct bgp_dest *dest; +- struct bgp_path_info *pi; ++ struct bgp_path_info *pi, *next; + struct bgp_table *table; + + if (safi == SAFI_MPLS_VPN || safi == SAFI_ENCAP || safi == SAFI_EVPN) { +@@ -5935,8 +6174,9 @@ void bgp_clear_stale_route(struct peer *peer, afi_t afi, safi_t safi) + + for (rm = bgp_table_top(table); rm; + rm = bgp_route_next(rm)) +- for (pi = bgp_dest_get_bgp_path_info(rm); pi; +- pi = pi->next) { ++ for (pi = bgp_dest_get_bgp_path_info(rm); ++ (pi != NULL) && (next = pi->next, 1); ++ pi = next) { + if (pi->peer != peer) + continue; + if (CHECK_FLAG( +@@ -5969,8 +6209,8 @@ void bgp_clear_stale_route(struct peer *peer, afi_t afi, safi_t safi) + } else { + for (dest = bgp_table_top(peer->bgp->rib[afi][safi]); dest; + dest = bgp_route_next(dest)) +- for (pi = bgp_dest_get_bgp_path_info(dest); pi; +- pi = pi->next) { ++ for (pi = bgp_dest_get_bgp_path_info(dest); ++ (pi != NULL) && (next = pi->next, 1); pi = next) { + if (pi->peer != peer) + continue; + if (CHECK_FLAG(peer->af_sflags[afi][safi], +@@ -6680,6 +6920,7 @@ void bgp_static_withdraw(struct bgp *bgp, const struct prefix *p, afi_t afi, + + /* Withdraw static BGP route from routing table. */ + if (pi) { ++ SET_FLAG(pi->flags, BGP_PATH_UNSORTED); + #ifdef ENABLE_BGP_VNC + if (safi == SAFI_MPLS_VPN || safi == SAFI_ENCAP) + rfapiProcessWithdraw(pi->peer, NULL, p, prd, pi->attr, +@@ -7466,8 +7707,10 @@ static void bgp_aggregate_install( + /* + * Mark the old as unusable + */ +- if (pi) ++ if (pi) { + bgp_path_info_delete(dest, pi); ++ bgp_process(bgp, dest, pi, afi, safi); ++ } + + attr = bgp_attr_aggregate_intern( + bgp, origin, aspath, community, ecommunity, lcommunity, +@@ -7914,7 +8157,8 @@ void bgp_aggregate_delete(struct bgp *bgp, const struct prefix *p, afi_t afi, + bgp_process(bgp, dest, pi, afi, safi); + } + +- aggregate->count--; ++ if (aggregate->count > 0) ++ aggregate->count--; + + if (pi->attr->origin == BGP_ORIGIN_INCOMPLETE) + aggregate->incomplete_origin_count--; +diff --git a/bgpd/bgp_route.h b/bgpd/bgp_route.h +index 1e5c31afab..e6f7b9da36 100644 +--- a/bgpd/bgp_route.h ++++ b/bgpd/bgp_route.h +@@ -346,6 +346,8 @@ struct bgp_path_info { + + unsigned short instance; + ++ enum bgp_path_selection_reason reason; ++ + /* Addpath identifiers */ + uint32_t addpath_rx_id; + struct bgp_addpath_info_data tx_addpath; +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0075-bgp-mp-info-changes.patch b/src/sonic-frr/patch/0075-bgp-mp-info-changes.patch new file mode 100644 index 00000000000..de994256cb2 --- /dev/null +++ b/src/sonic-frr/patch/0075-bgp-mp-info-changes.patch @@ -0,0 +1,1542 @@ +From fb21d89e46751e56822e5bfbd44367641ccec687 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Thu, 26 Sep 2024 10:40:30 -0400 +Subject: [PATCH 1/5] bgpd: Use CHECK_FLAG to remain consistent for mp_flags + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_mpath.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/bgpd/bgp_mpath.c b/bgpd/bgp_mpath.c +index c773c21fb7..cf1326e07e 100644 +--- a/bgpd/bgp_mpath.c ++++ b/bgpd/bgp_mpath.c +@@ -468,10 +468,10 @@ bool bgp_path_info_mpath_chkwtd(struct bgp *bgp, struct bgp_path_info *path) + */ + if (bgp->lb_handling != BGP_LINK_BW_SKIP_MISSING && + bgp->lb_handling != BGP_LINK_BW_DEFWT_4_MISSING) +- return (path->mpath->mp_flags & BGP_MP_LB_ALL); ++ return CHECK_FLAG(path->mpath->mp_flags, BGP_MP_LB_ALL); + + /* At least one path should have bandwidth. */ +- return (path->mpath->mp_flags & BGP_MP_LB_PRESENT); ++ return CHECK_FLAG(path->mpath->mp_flags, BGP_MP_LB_PRESENT); + } + + /* +-- +2.43.2 + + +From 179fba970178e9199e95ef364ca50eaac287b958 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Thu, 26 Sep 2024 10:46:23 -0400 +Subject: [PATCH 2/5] bgpd: Ensure mpath data is only on bestpath + +The mpath data structure has data that is only relevant +for the first mpath in the list. It is not being used +anywhere else. Let's document that a bit more. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_mpath.c | 4 ++++ + bgpd/bgp_mpath.h | 9 ++++++--- + 2 files changed, 10 insertions(+), 3 deletions(-) + +diff --git a/bgpd/bgp_mpath.c b/bgpd/bgp_mpath.c +index cf1326e07e..635bb5236d 100644 +--- a/bgpd/bgp_mpath.c ++++ b/bgpd/bgp_mpath.c +@@ -407,6 +407,10 @@ static void bgp_path_info_mpath_count_set(struct bgp_path_info *path, + * bgp_path_info_mpath_lb_update + * + * Update cumulative info related to link-bandwidth ++ * ++ * This is only set on the first mpath of the list ++ * as such we should UNSET the flags when removing ++ * to ensure nothing accidently happens + */ + static void bgp_path_info_mpath_lb_update(struct bgp_path_info *path, bool set, + bool all_paths_lb, uint64_t cum_bw) +diff --git a/bgpd/bgp_mpath.h b/bgpd/bgp_mpath.h +index 129682d1dc..267d729e06 100644 +--- a/bgpd/bgp_mpath.h ++++ b/bgpd/bgp_mpath.h +@@ -25,15 +25,18 @@ struct bgp_path_info_mpath { + /* When attached to best path, the number of selected multipaths */ + uint16_t mp_count; + +- /* Flags - relevant as noted. */ ++ /* Flags - relevant as noted, attached to bestpath. */ + uint16_t mp_flags; + #define BGP_MP_LB_PRESENT 0x1 /* Link-bandwidth present for >= 1 path */ + #define BGP_MP_LB_ALL 0x2 /* Link-bandwidth present for all multipaths */ + +- /* Aggregated attribute for advertising multipath route */ ++ /* ++ * Aggregated attribute for advertising multipath route, ++ * attached to bestpath ++ */ + struct attr *mp_attr; + +- /* Cumulative bandiwdth of all multipaths - attached to best path. */ ++ /* Cumulative bandiwdth of all multipaths - attached to bestpath. */ + uint64_t cum_bw; + }; + +-- +2.43.2 + + +From 5c40a38e780d00cf5c3dc4752146ae9767192423 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Mon, 30 Sep 2024 14:57:45 -0400 +Subject: [PATCH 3/5] tests: Clean up some logging in + test_bgp_default_originate_2links.py + +Test was confusing. Add some useful data and clean up some debugs + +Signed-off-by: Donald Sharp +--- + .../test_bgp_default_originate_2links.py | 11 ++++++----- + 1 file changed, 6 insertions(+), 5 deletions(-) + +diff --git a/tests/topotests/bgp_default_originate/test_bgp_default_originate_2links.py b/tests/topotests/bgp_default_originate/test_bgp_default_originate_2links.py +index 75e66566b7..58984221f9 100644 +--- a/tests/topotests/bgp_default_originate/test_bgp_default_originate_2links.py ++++ b/tests/topotests/bgp_default_originate/test_bgp_default_originate_2links.py +@@ -269,21 +269,21 @@ def verify_the_uptime(time_stamp_before, time_stamp_after, incremented=None): + if incremented == True: + if uptime_before < uptime_after: + logger.info( +- " The Uptime [{}] is incremented than [{}].......PASSED ".format( ++ " The Uptime before [{}] is less than [{}].......PASSED ".format( + time_stamp_before, time_stamp_after + ) + ) + return True + else: + logger.error( +- " The Uptime [{}] is expected to be incremented than [{}].......FAILED ".format( ++ " The Uptime before [{}] is greater than the uptime after [{}].......FAILED ".format( + time_stamp_before, time_stamp_after + ) + ) + return False + else: + logger.info( +- " The Uptime [{}] is not incremented than [{}] ".format( ++ " The Uptime before [{}] the same as after [{}] ".format( + time_stamp_before, time_stamp_after + ) + ) +@@ -1031,7 +1031,7 @@ def test_verify_bgp_default_originate_with_default_static_route_p1(request): + result = verify_the_uptime(uptime_before_ipv6, uptime_after_ipv6, incremented=False) + assert result is True, "Testcase {} : Failed Error: {}".format(tc_name, result) + +- step("Taking uptime snapshot before removing redisctribute static ") ++ step("Taking uptime snapshot before removing redistribute static") + uptime_before_ipv4 = get_rib_route_uptime(tgen, "ipv4", "r2", ipv4_uptime_dict) + uptime_before_ipv6 = get_rib_route_uptime(tgen, "ipv6", "r2", ipv6_uptime_dict) + sleep(1) +@@ -1078,6 +1078,7 @@ def test_verify_bgp_default_originate_with_default_static_route_p1(request): + ) + assert result is True, "Testcase {} : Failed Error: {}".format(tc_name, result) + ++ step("Now look that the route is not pointed at link2") + result = verify_rib_default_route( + tgen, + topo, +@@ -1097,7 +1098,7 @@ def test_verify_bgp_default_originate_with_default_static_route_p1(request): + ) + assert result is not True, "Testcase {} : Failed Error: {}".format(tc_name, result) + +- step("Taking uptime snapshot before removing redisctribute static ") ++ step("Taking uptime snapshot after removing redistribute static") + uptime_after_ipv4 = get_rib_route_uptime(tgen, "ipv4", "r2", ipv4_uptime_dict) + uptime_after_ipv6 = get_rib_route_uptime(tgen, "ipv6", "r2", ipv6_uptime_dict) + +-- +2.43.2 + + +From 7908175a589b41be062295d9e369a9a4168426ee Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Mon, 30 Sep 2024 15:09:42 -0400 +Subject: [PATCH 4/5] bgpd: Cleanup multipath figuring out in bgp + +Currently bgp multipath has these properties: + +a) mp_info may or may not be on a single path, based +upon path perturbations in the past. +b) mp_info->count started counting at 0( meaning 1 ). As that the +bestpath path_info was never included in the count +c) The first mp_info in the list held the multipath data associated +with the multipath. As such if you were at any other node that data +was not filled in. +d) As such the mp_info's that are not first on the list basically +were just pointers to the corresponding bgp_path_info that was in +the multipath. +e) On bestpath calculation, a linklist(struct linklist *) of bgp_path_info's was +created. +f) This linklist was passed in to a comparison function that took the +old mpinfo list and compared it item by item to the linklist and +doing magic to figure out how to create a new mp_info list. +g) the old mp_info and the link list had to be memory managed and +freed up. +h) BGP_PATH_MULTIPATH is only set on non bestpath nodes in the +multipath. + +This is really complicated. Let's change the algorithm to this: + +a) When running bestpath, mark a bgp_path_info node that could be in the ecmp path as +BGP_PATH_MULTIPATH_NEW. +b) When running multipath, just walk the list of bgp_path_info's and if +it has BGP_PATH_MULTIPATH_NEW on it, decide if it is in BGP_MULTIPATH. +If we run out of space to put in the ecmp, clear the flag on the rest. +c) Clean up the counting of sometimes adding 1 to the mpath count. +d) Only allocate a mpath_info node for the bestpath. Clean it up +when done with it. +e) remove the unneeded list management associated with the linklist and +the mp_list. + +This greatly simplifies multipath computation for bgp and reduces memory +load for large scale deployments. + +2 full feeds in work_queue_run prior: + + 0 56367.471 1123 50193 493695 50362 493791 0 0 0 TE work_queue_run + +BGP multipath info : 1941844 48 110780992 1941844 110780992 + +2 full feeds in work_queue_run after change: + + 1 52924.931 1296 40837 465968 41025 487390 0 0 1 TE work_queue_run + +BGP multipath info : 970860 32 38836880 970866 38837120 + +Aproximately 4 seconds of saved cpu time for convergence and ~75 mb +smaller run time. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_mpath.c | 390 +++++++++---------------------- + bgpd/bgp_mpath.h | 18 +- + bgpd/bgp_route.c | 21 +- + bgpd/bgp_route.h | 14 ++ + bgpd/bgp_routemap.c | 2 +- + tests/bgpd/subdir.am | 11 - + tests/bgpd/test_mpath.c | 482 --------------------------------------- + tests/bgpd/test_mpath.py | 10 - + 8 files changed, 135 insertions(+), 813 deletions(-) + delete mode 100644 tests/bgpd/test_mpath.c + delete mode 100644 tests/bgpd/test_mpath.py + +diff --git a/bgpd/bgp_mpath.c b/bgpd/bgp_mpath.c +index 635bb5236d..27c179380d 100644 +--- a/bgpd/bgp_mpath.c ++++ b/bgpd/bgp_mpath.c +@@ -2,8 +2,10 @@ + /* + * BGP Multipath + * Copyright (C) 2010 Google Inc. ++ * 2024 Nvidia Corporation ++ * Donald Sharp + * +- * This file is part of Quagga ++ * This file is part of FRR + */ + + #include +@@ -186,78 +188,6 @@ int bgp_path_info_nexthop_cmp(struct bgp_path_info *bpi1, + return compare; + } + +-/* +- * bgp_path_info_mpath_cmp +- * +- * This function determines our multipath list ordering. By ordering +- * the list we can deterministically select which paths are included +- * in the multipath set. The ordering also helps in detecting changes +- * in the multipath selection so we can detect whether to send an +- * update to zebra. +- * +- * The order of paths is determined first by received nexthop, and then +- * by peer address if the nexthops are the same. +- */ +-static int bgp_path_info_mpath_cmp(void *val1, void *val2) +-{ +- struct bgp_path_info *bpi1, *bpi2; +- int compare; +- +- bpi1 = val1; +- bpi2 = val2; +- +- compare = bgp_path_info_nexthop_cmp(bpi1, bpi2); +- +- if (!compare) { +- if (!bpi1->peer->su_remote && !bpi2->peer->su_remote) +- compare = 0; +- else if (!bpi1->peer->su_remote) +- compare = 1; +- else if (!bpi2->peer->su_remote) +- compare = -1; +- else +- compare = sockunion_cmp(bpi1->peer->su_remote, +- bpi2->peer->su_remote); +- } +- +- return compare; +-} +- +-/* +- * bgp_mp_list_init +- * +- * Initialize the mp_list, which holds the list of multipaths +- * selected by bgp_best_selection +- */ +-void bgp_mp_list_init(struct list *mp_list) +-{ +- assert(mp_list); +- memset(mp_list, 0, sizeof(struct list)); +- mp_list->cmp = bgp_path_info_mpath_cmp; +-} +- +-/* +- * bgp_mp_list_clear +- * +- * Clears all entries out of the mp_list +- */ +-void bgp_mp_list_clear(struct list *mp_list) +-{ +- assert(mp_list); +- list_delete_all_node(mp_list); +-} +- +-/* +- * bgp_mp_list_add +- * +- * Adds a multipath entry to the mp_list +- */ +-void bgp_mp_list_add(struct list *mp_list, struct bgp_path_info *mpinfo) +-{ +- assert(mp_list && mpinfo); +- listnode_add_sort(mp_list, mpinfo); +-} +- + /* + * bgp_path_info_mpath_new + * +@@ -270,6 +200,7 @@ static struct bgp_path_info_mpath *bgp_path_info_mpath_new(void) + new_mpath = XCALLOC(MTYPE_BGP_MPATH_INFO, + sizeof(struct bgp_path_info_mpath)); + ++ new_mpath->mp_count = 1; + return new_mpath; + } + +@@ -283,6 +214,8 @@ void bgp_path_info_mpath_free(struct bgp_path_info_mpath **mpath) + if (mpath && *mpath) { + if ((*mpath)->mp_attr) + bgp_attr_unintern(&(*mpath)->mp_attr); ++ (*mpath)->mp_attr = NULL; ++ + XFREE(MTYPE_BGP_MPATH_INFO, *mpath); + } + } +@@ -309,31 +242,6 @@ bgp_path_info_mpath_get(struct bgp_path_info *path) + return path->mpath; + } + +-/* +- * bgp_path_info_mpath_enqueue +- * +- * Enqueue a path onto the multipath list given the previous multipath +- * list entry +- */ +-static void bgp_path_info_mpath_enqueue(struct bgp_path_info *prev_info, +- struct bgp_path_info *path) +-{ +- struct bgp_path_info_mpath *prev, *mpath; +- +- prev = bgp_path_info_mpath_get(prev_info); +- mpath = bgp_path_info_mpath_get(path); +- if (!prev || !mpath) +- return; +- +- mpath->mp_next = prev->mp_next; +- mpath->mp_prev = prev; +- if (prev->mp_next) +- prev->mp_next->mp_prev = mpath; +- prev->mp_next = mpath; +- +- SET_FLAG(path->flags, BGP_PATH_MULTIPATH); +-} +- + /* + * bgp_path_info_mpath_dequeue + * +@@ -342,14 +250,9 @@ static void bgp_path_info_mpath_enqueue(struct bgp_path_info *prev_info, + void bgp_path_info_mpath_dequeue(struct bgp_path_info *path) + { + struct bgp_path_info_mpath *mpath = path->mpath; ++ + if (!mpath) + return; +- if (mpath->mp_prev) +- mpath->mp_prev->mp_next = mpath->mp_next; +- if (mpath->mp_next) +- mpath->mp_next->mp_prev = mpath->mp_prev; +- mpath->mp_next = mpath->mp_prev = NULL; +- UNSET_FLAG(path->flags, BGP_PATH_MULTIPATH); + } + + /* +@@ -359,9 +262,16 @@ void bgp_path_info_mpath_dequeue(struct bgp_path_info *path) + */ + struct bgp_path_info *bgp_path_info_mpath_next(struct bgp_path_info *path) + { +- if (!path->mpath || !path->mpath->mp_next) +- return NULL; +- return path->mpath->mp_next->mp_info; ++ path = path->next; ++ ++ while (path) { ++ if (CHECK_FLAG(path->flags, BGP_PATH_MULTIPATH)) ++ return path; ++ ++ path = path->next; ++ } ++ ++ return NULL; + } + + /* +@@ -382,7 +292,8 @@ struct bgp_path_info *bgp_path_info_mpath_first(struct bgp_path_info *path) + uint32_t bgp_path_info_mpath_count(struct bgp_path_info *path) + { + if (!path->mpath) +- return 0; ++ return 1; ++ + return path->mpath->mp_count; + } + +@@ -511,58 +422,51 @@ static void bgp_path_info_mpath_attr_set(struct bgp_path_info *path, + /* + * bgp_path_info_mpath_update + * +- * Compare and sync up the multipath list with the mp_list generated by +- * bgp_best_selection ++ * Compare and sync up the multipath flags with what was choosen ++ * in best selection + */ + void bgp_path_info_mpath_update(struct bgp *bgp, struct bgp_dest *dest, +- struct bgp_path_info *new_best, +- struct bgp_path_info *old_best, +- struct list *mp_list, +- struct bgp_maxpaths_cfg *mpath_cfg) ++ struct bgp_path_info *new_best, struct bgp_path_info *old_best, ++ uint32_t num_candidates, struct bgp_maxpaths_cfg *mpath_cfg) + { + uint16_t maxpaths, mpath_count, old_mpath_count; + uint32_t bwval; + uint64_t cum_bw, old_cum_bw; +- struct listnode *mp_node, *mp_next_node; +- struct bgp_path_info *cur_mpath, *new_mpath, *next_mpath, *prev_mpath; +- int mpath_changed, debug; ++ struct bgp_path_info *cur_iterator = NULL; ++ bool mpath_changed, debug; + bool all_paths_lb; + char path_buf[PATH_ADDPATH_STR_BUFFER]; ++ bool old_mpath, new_mpath; + +- mpath_changed = 0; ++ mpath_changed = false; + maxpaths = multipath_num; + mpath_count = 0; +- cur_mpath = NULL; + old_mpath_count = 0; + old_cum_bw = cum_bw = 0; +- prev_mpath = new_best; +- mp_node = listhead(mp_list); + debug = bgp_debug_bestpath(dest); + +- if (new_best) { +- mpath_count++; +- if (new_best != old_best) +- bgp_path_info_mpath_dequeue(new_best); +- maxpaths = (new_best->peer->sort == BGP_PEER_IBGP) +- ? mpath_cfg->maxpaths_ibgp +- : mpath_cfg->maxpaths_ebgp; +- } +- + if (old_best) { +- cur_mpath = bgp_path_info_mpath_first(old_best); + old_mpath_count = bgp_path_info_mpath_count(old_best); ++ if (old_mpath_count == 1) ++ SET_FLAG(old_best->flags, BGP_PATH_MULTIPATH); + old_cum_bw = bgp_path_info_mpath_cumbw(old_best); + bgp_path_info_mpath_count_set(old_best, 0); + bgp_path_info_mpath_lb_update(old_best, false, false, 0); +- bgp_path_info_mpath_dequeue(old_best); ++ bgp_path_info_mpath_free(&old_best->mpath); ++ old_best->mpath = NULL; ++ } ++ ++ if (new_best) { ++ maxpaths = (new_best->peer->sort == BGP_PEER_IBGP) ? mpath_cfg->maxpaths_ibgp ++ : mpath_cfg->maxpaths_ebgp; ++ cur_iterator = new_best; + } + + if (debug) +- zlog_debug("%pBD(%s): starting mpath update, newbest %s num candidates %d old-mpath-count %d old-cum-bw %" PRIu64, +- dest, bgp->name_pretty, +- new_best ? new_best->peer->host : "NONE", +- mp_list ? listcount(mp_list) : 0, old_mpath_count, +- old_cum_bw); ++ zlog_debug("%pBD(%s): starting mpath update, newbest %s num candidates %d old-mpath-count %d old-cum-bw %" PRIu64 ++ " maxpaths set %u", ++ dest, bgp->name_pretty, new_best ? new_best->peer->host : "NONE", ++ num_candidates, old_mpath_count, old_cum_bw, maxpaths); + + /* + * We perform an ordered walk through both lists in parallel. +@@ -576,173 +480,100 @@ void bgp_path_info_mpath_update(struct bgp *bgp, struct bgp_dest *dest, + * to skip over it + */ + all_paths_lb = true; /* We'll reset if any path doesn't have LB. */ +- while (mp_node || cur_mpath) { +- struct bgp_path_info *tmp_info; + ++ while (cur_iterator) { ++ old_mpath = CHECK_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH); ++ new_mpath = CHECK_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH_NEW); ++ ++ UNSET_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH_NEW); + /* +- * We can bail out of this loop if all existing paths on the +- * multipath list have been visited (for cleanup purposes) and +- * the maxpath requirement is fulfulled ++ * If the current mpath count is equal to the number of ++ * maxpaths that can be used then we can bail, after ++ * we clean up the flags associated with the rest of the ++ * bestpaths + */ +- if (!cur_mpath && (mpath_count >= maxpaths)) ++ if (mpath_count >= maxpaths) { ++ while (cur_iterator) { ++ UNSET_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH); ++ UNSET_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH_NEW); ++ ++ cur_iterator = cur_iterator->next; ++ } + break; + +- mp_next_node = mp_node ? listnextnode(mp_node) : NULL; +- next_mpath = +- cur_mpath ? bgp_path_info_mpath_next(cur_mpath) : NULL; +- tmp_info = mp_node ? listgetdata(mp_node) : NULL; ++ if (debug) ++ zlog_debug("%pBD(%s): Mpath count %u is equal to maximum paths allowed, finished comparision for MPATHS", ++ dest, bgp->name_pretty, mpath_count); ++ } + + if (debug) +- zlog_debug("%pBD(%s): comparing candidate %s with existing mpath %s", +- dest, bgp->name_pretty, +- tmp_info ? tmp_info->peer->host : "NONE", +- cur_mpath ? cur_mpath->peer->host : "NONE"); +- ++ zlog_debug("%pBD(%s): Candidate %s old_mpath: %u new_mpath: %u, Nexthop %pI4 current mpath count: %u", ++ dest, bgp->name_pretty, cur_iterator->peer->host, old_mpath, ++ new_mpath, &cur_iterator->attr->nexthop, mpath_count); + /* +- * If equal, the path was a multipath and is still a multipath. +- * Insert onto new multipath list if maxpaths allows. ++ * There is nothing to do if the cur_iterator is neither a old path ++ * or a new path + */ +- if (mp_node && (listgetdata(mp_node) == cur_mpath)) { +- list_delete_node(mp_list, mp_node); +- bgp_path_info_mpath_dequeue(cur_mpath); +- if ((mpath_count < maxpaths) +- && prev_mpath +- && bgp_path_info_nexthop_cmp(prev_mpath, +- cur_mpath)) { +- bgp_path_info_mpath_enqueue(prev_mpath, +- cur_mpath); +- prev_mpath = cur_mpath; +- mpath_count++; +- if (ecommunity_linkbw_present( +- bgp_attr_get_ecommunity( +- cur_mpath->attr), +- &bwval)) +- cum_bw += bwval; +- else +- all_paths_lb = false; +- if (debug) { +- bgp_path_info_path_with_addpath_rx_str( +- cur_mpath, path_buf, +- sizeof(path_buf)); +- zlog_debug("%pBD: %s is still multipath, cur count %d", +- dest, path_buf, mpath_count); +- } +- } else { +- mpath_changed = 1; +- if (debug) { +- bgp_path_info_path_with_addpath_rx_str( +- cur_mpath, path_buf, +- sizeof(path_buf)); +- zlog_debug("%pBD: remove mpath %s nexthop %pI4, cur count %d", +- dest, path_buf, +- &cur_mpath->attr->nexthop, +- mpath_count); +- } +- } +- mp_node = mp_next_node; +- cur_mpath = next_mpath; ++ if (!old_mpath && !new_mpath) { ++ UNSET_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH); ++ cur_iterator = cur_iterator->next; + continue; + } + +- if (cur_mpath +- && (!mp_node +- || (bgp_path_info_mpath_cmp(cur_mpath, +- listgetdata(mp_node)) +- < 0))) { +- /* +- * If here, we have an old multipath and either the +- * mp_list +- * is finished or the next mp_node points to a later +- * multipath, so we need to purge this path from the +- * multipath list +- */ +- bgp_path_info_mpath_dequeue(cur_mpath); +- mpath_changed = 1; ++ if (new_mpath) { ++ mpath_count++; ++ ++ if (cur_iterator != new_best) ++ SET_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH); ++ ++ if (!old_mpath) ++ mpath_changed = true; ++ ++ if (ecommunity_linkbw_present(bgp_attr_get_ecommunity(cur_iterator->attr), ++ &bwval) || ++ ecommunity_linkbw_present(bgp_attr_get_ipv6_ecommunity( ++ cur_iterator->attr), ++ &bwval)) ++ cum_bw += bwval; ++ else ++ all_paths_lb = false; ++ + if (debug) { +- bgp_path_info_path_with_addpath_rx_str( +- cur_mpath, path_buf, sizeof(path_buf)); +- zlog_debug("%pBD: remove mpath %s nexthop %pI4, cur count %d", +- dest, path_buf, +- &cur_mpath->attr->nexthop, +- mpath_count); ++ bgp_path_info_path_with_addpath_rx_str(cur_iterator, path_buf, ++ sizeof(path_buf)); ++ zlog_debug("%pBD: add mpath %s nexthop %pI4, cur count %d cum_bw: %" PRIu64 ++ " all_paths_lb: %u", ++ dest, path_buf, &cur_iterator->attr->nexthop, ++ mpath_count, cum_bw, all_paths_lb); + } +- cur_mpath = next_mpath; + } else { + /* +- * If here, we have a path on the mp_list that was not +- * previously +- * a multipath (due to non-equivalance or maxpaths +- * exceeded), +- * or the matching multipath is sorted later in the +- * multipath +- * list. Before we enqueue the path on the new multipath +- * list, +- * make sure its not on the old_best multipath list or +- * referenced +- * via next_mpath: +- * - If next_mpath points to this new path, update +- * next_mpath to +- * point to the multipath after this one +- * - Dequeue the path from the multipath list just to +- * make sure ++ * We know that old_mpath is true and new_mpath is false in this path + */ +- new_mpath = listgetdata(mp_node); +- list_delete_node(mp_list, mp_node); +- assert(new_mpath); +- assert(prev_mpath); +- if ((mpath_count < maxpaths) && (new_mpath != new_best) +- && bgp_path_info_nexthop_cmp(prev_mpath, +- new_mpath)) { +- bgp_path_info_mpath_dequeue(new_mpath); +- +- bgp_path_info_mpath_enqueue(prev_mpath, +- new_mpath); +- prev_mpath = new_mpath; +- mpath_changed = 1; +- mpath_count++; +- if (ecommunity_linkbw_present( +- bgp_attr_get_ecommunity( +- new_mpath->attr), +- &bwval)) +- cum_bw += bwval; +- else +- all_paths_lb = false; +- if (debug) { +- bgp_path_info_path_with_addpath_rx_str( +- new_mpath, path_buf, +- sizeof(path_buf)); +- zlog_debug("%pBD: add mpath %s nexthop %pI4, cur count %d", +- dest, path_buf, +- &new_mpath->attr->nexthop, +- mpath_count); +- } +- } +- mp_node = mp_next_node; ++ mpath_changed = true; ++ UNSET_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH); + } ++ ++ cur_iterator = cur_iterator->next; + } + + if (new_best) { +- bgp_path_info_mpath_count_set(new_best, mpath_count - 1); +- if (mpath_count <= 1 || +- !ecommunity_linkbw_present( +- bgp_attr_get_ecommunity(new_best->attr), &bwval)) +- all_paths_lb = false; +- else +- cum_bw += bwval; +- bgp_path_info_mpath_lb_update(new_best, true, +- all_paths_lb, cum_bw); +- ++ if (mpath_count > 1 || new_best->mpath) { ++ bgp_path_info_mpath_count_set(new_best, mpath_count); ++ bgp_path_info_mpath_lb_update(new_best, true, all_paths_lb, cum_bw); ++ } + if (debug) + zlog_debug("%pBD(%s): New mpath count (incl newbest) %d mpath-change %s all_paths_lb %d cum_bw %" PRIu64, + dest, bgp->name_pretty, mpath_count, + mpath_changed ? "YES" : "NO", all_paths_lb, + cum_bw); + ++ if (mpath_count == 1) ++ UNSET_FLAG(new_best->flags, BGP_PATH_MULTIPATH); + if (mpath_changed + || (bgp_path_info_mpath_count(new_best) != old_mpath_count)) + SET_FLAG(new_best->flags, BGP_PATH_MULTIPATH_CHG); +- if ((mpath_count - 1) != old_mpath_count || +- old_cum_bw != cum_bw) ++ if ((mpath_count) != old_mpath_count || old_cum_bw != cum_bw) + SET_FLAG(new_best->flags, BGP_PATH_LINK_BW_CHG); + } + } +@@ -755,20 +586,13 @@ void bgp_path_info_mpath_update(struct bgp *bgp, struct bgp_dest *dest, + */ + void bgp_mp_dmed_deselect(struct bgp_path_info *dmed_best) + { +- struct bgp_path_info *mpinfo, *mpnext; +- + if (!dmed_best) + return; + +- for (mpinfo = bgp_path_info_mpath_first(dmed_best); mpinfo; +- mpinfo = mpnext) { +- mpnext = bgp_path_info_mpath_next(mpinfo); +- bgp_path_info_mpath_dequeue(mpinfo); +- } +- + bgp_path_info_mpath_count_set(dmed_best, 0); + UNSET_FLAG(dmed_best->flags, BGP_PATH_MULTIPATH_CHG); + UNSET_FLAG(dmed_best->flags, BGP_PATH_LINK_BW_CHG); ++ + assert(bgp_path_info_mpath_first(dmed_best) == NULL); + } + +@@ -806,7 +630,7 @@ void bgp_path_info_mpath_aggregate_update(struct bgp_path_info *new_best, + if (!new_best) + return; + +- if (!bgp_path_info_mpath_count(new_best)) { ++ if (bgp_path_info_mpath_count(new_best) == 1) { + if ((new_attr = bgp_path_info_mpath_attr(new_best))) { + bgp_attr_unintern(&new_attr); + bgp_path_info_mpath_attr_set(new_best, NULL); +diff --git a/bgpd/bgp_mpath.h b/bgpd/bgp_mpath.h +index 267d729e06..a7107deb0e 100644 +--- a/bgpd/bgp_mpath.h ++++ b/bgpd/bgp_mpath.h +@@ -2,8 +2,9 @@ + /* + * BGP Multipath + * Copyright (C) 2010 Google Inc. ++ * 2024 Nvidia Corporation + * +- * This file is part of Quagga ++ * This file is part of FRR + */ + + #ifndef _FRR_BGP_MPATH_H +@@ -13,12 +14,6 @@ + * multipath selections, lazily allocated to save memory + */ + struct bgp_path_info_mpath { +- /* Points to the first multipath (on bestpath) or the next multipath */ +- struct bgp_path_info_mpath *mp_next; +- +- /* Points to the previous multipath or NULL on bestpath */ +- struct bgp_path_info_mpath *mp_prev; +- + /* Points to bgp_path_info associated with this multipath info */ + struct bgp_path_info *mp_info; + +@@ -50,16 +45,11 @@ extern int bgp_maximum_paths_unset(struct bgp *bgp, afi_t afi, safi_t safi, + /* Functions used by bgp_best_selection to record current + * multipath selections + */ +-extern int bgp_path_info_nexthop_cmp(struct bgp_path_info *bpi1, +- struct bgp_path_info *bpi2); +-extern void bgp_mp_list_init(struct list *mp_list); +-extern void bgp_mp_list_clear(struct list *mp_list); +-extern void bgp_mp_list_add(struct list *mp_list, struct bgp_path_info *mpinfo); ++extern int bgp_path_info_nexthop_cmp(struct bgp_path_info *bpi1, struct bgp_path_info *bpi2); + extern void bgp_mp_dmed_deselect(struct bgp_path_info *dmed_best); + extern void bgp_path_info_mpath_update(struct bgp *bgp, struct bgp_dest *dest, + struct bgp_path_info *new_best, +- struct bgp_path_info *old_best, +- struct list *mp_list, ++ struct bgp_path_info *old_best, uint32_t num_candidates, + struct bgp_maxpaths_cfg *mpath_cfg); + extern void + bgp_path_info_mpath_aggregate_update(struct bgp_path_info *new_best, +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index c33b14675a..12cbf66341 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -2143,8 +2143,7 @@ bool subgroup_announce_check(struct bgp_dest *dest, struct bgp_path_info *pi, + from = pi->peer; + filter = &peer->filter[afi][safi]; + bgp = SUBGRP_INST(subgrp); +- piattr = bgp_path_info_mpath_count(pi) ? bgp_path_info_mpath_attr(pi) +- : pi->attr; ++ piattr = bgp_path_info_mpath_count(pi) > 1 ? bgp_path_info_mpath_attr(pi) : pi->attr; + + if (CHECK_FLAG(peer->af_flags[afi][safi], PEER_FLAG_MAX_PREFIX_OUT) && + peer->pmax_out[afi][safi] != 0 && +@@ -2812,13 +2811,12 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest, + struct bgp_path_info *pi2; + int paths_eq, do_mpath; + bool debug, any_comparisons; +- struct list mp_list; + char pfx_buf[PREFIX2STR_BUFFER] = {}; + char path_buf[PATH_ADDPATH_STR_BUFFER]; + enum bgp_path_selection_reason reason = bgp_path_selection_none; + bool unsorted_items = true; ++ uint32_t num_candidates = 0; + +- bgp_mp_list_init(&mp_list); + do_mpath = + (mpath_cfg->maxpaths_ebgp > 1 || mpath_cfg->maxpaths_ibgp > 1); + +@@ -3202,7 +3200,8 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest, + "%pBD(%s): %s is the bestpath, add to the multipath list", + dest, bgp->name_pretty, + path_buf); +- bgp_mp_list_add(&mp_list, pi); ++ SET_FLAG(pi->flags, BGP_PATH_MULTIPATH_NEW); ++ num_candidates++; + continue; + } + +@@ -3234,15 +3233,14 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest, + "%pBD(%s): %s is equivalent to the bestpath, add to the multipath list", + dest, bgp->name_pretty, + path_buf); +- bgp_mp_list_add(&mp_list, pi); ++ SET_FLAG(pi->flags, BGP_PATH_MULTIPATH_NEW); ++ num_candidates++; + } + } + } + +- bgp_path_info_mpath_update(bgp, dest, new_select, old_select, &mp_list, +- mpath_cfg); ++ bgp_path_info_mpath_update(bgp, dest, new_select, old_select, num_candidates, mpath_cfg); + bgp_path_info_mpath_aggregate_update(new_select, old_select); +- bgp_mp_list_clear(&mp_list); + + bgp_addpath_update_ids(bgp, dest, afi, safi); + +@@ -11057,9 +11055,8 @@ void route_vty_out_detail(struct vty *vty, struct bgp *bgp, struct bgp_dest *bn, + vty_out(vty, ", otc %u", attr->otc); + } + +- if (CHECK_FLAG(path->flags, BGP_PATH_MULTIPATH) +- || (CHECK_FLAG(path->flags, BGP_PATH_SELECTED) +- && bgp_path_info_mpath_count(path))) { ++ if (CHECK_FLAG(path->flags, BGP_PATH_MULTIPATH) || ++ (CHECK_FLAG(path->flags, BGP_PATH_SELECTED) && bgp_path_info_mpath_count(path) > 1)) { + if (json_paths) + json_object_boolean_true_add(json_path, "multipath"); + else +diff --git a/bgpd/bgp_route.h b/bgpd/bgp_route.h +index e6f7b9da36..61492980ad 100644 +--- a/bgpd/bgp_route.h ++++ b/bgpd/bgp_route.h +@@ -319,6 +319,11 @@ struct bgp_path_info { + #define BGP_PATH_STALE (1 << 8) + #define BGP_PATH_REMOVED (1 << 9) + #define BGP_PATH_COUNTED (1 << 10) ++/* ++ * A BGP_PATH_MULTIPATH flag is not set on the best path ++ * it is set on every other node that is part of ECMP ++ * for that particular dest ++ */ + #define BGP_PATH_MULTIPATH (1 << 11) + #define BGP_PATH_MULTIPATH_CHG (1 << 12) + #define BGP_PATH_RIB_ATTR_CHG (1 << 13) +@@ -328,6 +333,15 @@ struct bgp_path_info { + #define BGP_PATH_MPLSVPN_LABEL_NH (1 << 17) + #define BGP_PATH_MPLSVPN_NH_LABEL_BIND (1 << 18) + #define BGP_PATH_UNSORTED (1 << 19) ++/* ++ * BGP_PATH_MULTIPATH_NEW is set on those bgp_path_info ++ * nodes that we have decided should possibly be in the ++ * ecmp path for a particular dest. This flag is ++ * removed when the bgp_path_info's are looked at to ++ * decide on whether or not a bgp_path_info is on ++ * the actual ecmp path. ++ */ ++#define BGP_PATH_MULTIPATH_NEW (1 << 20) + + /* BGP route type. This can be static, RIP, OSPF, BGP etc. */ + uint8_t type; +diff --git a/bgpd/bgp_routemap.c b/bgpd/bgp_routemap.c +index dbc3d6445d..7f0abd062b 100644 +--- a/bgpd/bgp_routemap.c ++++ b/bgpd/bgp_routemap.c +@@ -3238,7 +3238,7 @@ route_set_ecommunity_lb(void *rule, const struct prefix *prefix, void *object) + return RMAP_OKAY; + + bw_bytes = ((uint64_t)peer->bgp->lb_ref_bw * 1000 * 1000) / 8; +- mpath_count = bgp_path_info_mpath_count(path) + 1; ++ mpath_count = bgp_path_info_mpath_count(path); + bw_bytes *= mpath_count; + } + +diff --git a/tests/bgpd/subdir.am b/tests/bgpd/subdir.am +index 5148e7e440..97845ec1aa 100644 +--- a/tests/bgpd/subdir.am ++++ b/tests/bgpd/subdir.am +@@ -52,17 +52,6 @@ tests_bgpd_test_mp_attr_LDADD = $(BGP_TEST_LDADD) + tests_bgpd_test_mp_attr_SOURCES = tests/bgpd/test_mp_attr.c + EXTRA_DIST += tests/bgpd/test_mp_attr.py + +- +-if BGPD +-check_PROGRAMS += tests/bgpd/test_mpath +-endif +-tests_bgpd_test_mpath_CFLAGS = $(TESTS_CFLAGS) +-tests_bgpd_test_mpath_CPPFLAGS = $(TESTS_CPPFLAGS) +-tests_bgpd_test_mpath_LDADD = $(BGP_TEST_LDADD) +-tests_bgpd_test_mpath_SOURCES = tests/bgpd/test_mpath.c +-EXTRA_DIST += tests/bgpd/test_mpath.py +- +- + if BGPD + check_PROGRAMS += tests/bgpd/test_packet + endif +diff --git a/tests/bgpd/test_mpath.c b/tests/bgpd/test_mpath.c +deleted file mode 100644 +index ebbe3ac3e2..0000000000 +--- a/tests/bgpd/test_mpath.c ++++ /dev/null +@@ -1,482 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0-or-later +-/* +- * BGP Multipath Unit Test +- * Copyright (C) 2010 Google Inc. +- * +- * This file is part of Quagga +- */ +- +-#include +- +-#include "qobj.h" +-#include "vty.h" +-#include "stream.h" +-#include "privs.h" +-#include "linklist.h" +-#include "memory.h" +-#include "zclient.h" +-#include "queue.h" +-#include "filter.h" +- +-#include "bgpd/bgpd.h" +-#include "bgpd/bgp_table.h" +-#include "bgpd/bgp_route.h" +-#include "bgpd/bgp_attr.h" +-#include "bgpd/bgp_nexthop.h" +-#include "bgpd/bgp_mpath.h" +-#include "bgpd/bgp_evpn.h" +-#include "bgpd/bgp_network.h" +- +-#define VT100_RESET "\x1b[0m" +-#define VT100_RED "\x1b[31m" +-#define VT100_GREEN "\x1b[32m" +-#define VT100_YELLOW "\x1b[33m" +-#define OK VT100_GREEN "OK" VT100_RESET +-#define FAILED VT100_RED "failed" VT100_RESET +- +-#define TEST_PASSED 0 +-#define TEST_FAILED -1 +- +-#define EXPECT_TRUE(expr, res) \ +- if (!(expr)) { \ +- printf("Test failure in %s line %u: %s\n", __func__, __LINE__, \ +- #expr); \ +- (res) = TEST_FAILED; \ +- } +- +-typedef struct testcase_t__ testcase_t; +- +-typedef int (*test_setup_func)(testcase_t *); +-typedef int (*test_run_func)(testcase_t *); +-typedef int (*test_cleanup_func)(testcase_t *); +- +-struct testcase_t__ { +- const char *desc; +- void *test_data; +- void *verify_data; +- void *tmp_data; +- test_setup_func setup; +- test_run_func run; +- test_cleanup_func cleanup; +-}; +- +-/* need these to link in libbgp */ +-struct event_loop *master = NULL; +-extern struct zclient *zclient; +-struct zebra_privs_t bgpd_privs = { +- .user = NULL, +- .group = NULL, +- .vty_group = NULL, +-}; +- +-static int tty = 0; +- +-/* Create fake bgp instance */ +-static struct bgp *bgp_create_fake(as_t *as, const char *name) +-{ +- struct bgp *bgp; +- afi_t afi; +- safi_t safi; +- +- if ((bgp = XCALLOC(MTYPE_BGP, sizeof(struct bgp))) == NULL) +- return NULL; +- +- bgp_lock(bgp); +- // bgp->peer_self = peer_new (bgp); +- // bgp->peer_self->host = XSTRDUP (MTYPE_BGP_PEER_HOST, "Static +- // announcement"); +- +- bgp->peer = list_new(); +- // bgp->peer->cmp = (int (*)(void *, void *)) peer_cmp; +- +- bgp->group = list_new(); +- // bgp->group->cmp = (int (*)(void *, void *)) peer_group_cmp; +- +- bgp_evpn_init(bgp); +- FOREACH_AFI_SAFI (afi, safi) { +- bgp->route[afi][safi] = bgp_table_init(bgp, afi, safi); +- bgp->aggregate[afi][safi] = bgp_table_init(bgp, afi, safi); +- bgp->rib[afi][safi] = bgp_table_init(bgp, afi, safi); +- bgp->maxpaths[afi][safi].maxpaths_ebgp = MULTIPATH_NUM; +- bgp->maxpaths[afi][safi].maxpaths_ibgp = MULTIPATH_NUM; +- } +- +- bgp_scan_init(bgp); +- bgp->default_local_pref = BGP_DEFAULT_LOCAL_PREF; +- bgp->default_holdtime = BGP_DEFAULT_HOLDTIME; +- bgp->default_keepalive = BGP_DEFAULT_KEEPALIVE; +- bgp->restart_time = BGP_DEFAULT_RESTART_TIME; +- bgp->stalepath_time = BGP_DEFAULT_STALEPATH_TIME; +- +- bgp->as = *as; +- +- if (name) +- bgp->name = strdup(name); +- +- return bgp; +-} +- +-/*========================================================= +- * Testcase for maximum-paths configuration +- */ +-static int setup_bgp_cfg_maximum_paths(testcase_t *t) +-{ +- as_t asn = 1; +- t->tmp_data = bgp_create_fake(&asn, NULL); +- if (!t->tmp_data) +- return -1; +- return 0; +-} +- +-static int run_bgp_cfg_maximum_paths(testcase_t *t) +-{ +- afi_t afi; +- safi_t safi; +- struct bgp *bgp; +- int api_result; +- int test_result = TEST_PASSED; +- +- bgp = t->tmp_data; +- FOREACH_AFI_SAFI (afi, safi) { +- /* test bgp_maximum_paths_set */ +- api_result = bgp_maximum_paths_set(bgp, afi, safi, +- BGP_PEER_EBGP, 10, 0); +- EXPECT_TRUE(api_result == 0, test_result); +- api_result = bgp_maximum_paths_set(bgp, afi, safi, +- BGP_PEER_IBGP, 10, 0); +- EXPECT_TRUE(api_result == 0, test_result); +- EXPECT_TRUE(bgp->maxpaths[afi][safi].maxpaths_ebgp == 10, +- test_result); +- EXPECT_TRUE(bgp->maxpaths[afi][safi].maxpaths_ibgp == 10, +- test_result); +- +- /* test bgp_maximum_paths_unset */ +- api_result = +- bgp_maximum_paths_unset(bgp, afi, safi, BGP_PEER_EBGP); +- EXPECT_TRUE(api_result == 0, test_result); +- api_result = +- bgp_maximum_paths_unset(bgp, afi, safi, BGP_PEER_IBGP); +- EXPECT_TRUE(api_result == 0, test_result); +- EXPECT_TRUE((bgp->maxpaths[afi][safi].maxpaths_ebgp +- == MULTIPATH_NUM), +- test_result); +- EXPECT_TRUE((bgp->maxpaths[afi][safi].maxpaths_ibgp +- == MULTIPATH_NUM), +- test_result); +- } +- +- return test_result; +-} +- +-static int cleanup_bgp_cfg_maximum_paths(testcase_t *t) +-{ +- return bgp_delete((struct bgp *)t->tmp_data); +-} +- +-testcase_t test_bgp_cfg_maximum_paths = { +- .desc = "Test bgp maximum-paths config", +- .setup = setup_bgp_cfg_maximum_paths, +- .run = run_bgp_cfg_maximum_paths, +- .cleanup = cleanup_bgp_cfg_maximum_paths, +-}; +- +-/*========================================================= +- * Testcase for bgp_mp_list +- */ +-struct peer test_mp_list_peer[] = { +- {.local_as = 1, .as = 2}, {.local_as = 1, .as = 2}, +- {.local_as = 1, .as = 2}, {.local_as = 1, .as = 2}, +- {.local_as = 1, .as = 2}, +-}; +-int test_mp_list_peer_count = array_size(test_mp_list_peer); +-struct attr test_mp_list_attr[4]; +-struct bgp_path_info test_mp_list_info[] = { +- {.peer = &test_mp_list_peer[0], .attr = &test_mp_list_attr[0]}, +- {.peer = &test_mp_list_peer[1], .attr = &test_mp_list_attr[1]}, +- {.peer = &test_mp_list_peer[2], .attr = &test_mp_list_attr[1]}, +- {.peer = &test_mp_list_peer[3], .attr = &test_mp_list_attr[2]}, +- {.peer = &test_mp_list_peer[4], .attr = &test_mp_list_attr[3]}, +-}; +-int test_mp_list_info_count = array_size(test_mp_list_info); +- +-static int setup_bgp_mp_list(testcase_t *t) +-{ +- test_mp_list_attr[0].nexthop.s_addr = 0x01010101; +- test_mp_list_attr[1].nexthop.s_addr = 0x02020202; +- test_mp_list_attr[2].nexthop.s_addr = 0x03030303; +- test_mp_list_attr[3].nexthop.s_addr = 0x04040404; +- +- if ((test_mp_list_peer[0].su_remote = sockunion_str2su("1.1.1.1")) +- == NULL) +- return -1; +- if ((test_mp_list_peer[1].su_remote = sockunion_str2su("2.2.2.2")) +- == NULL) +- return -1; +- if ((test_mp_list_peer[2].su_remote = sockunion_str2su("3.3.3.3")) +- == NULL) +- return -1; +- if ((test_mp_list_peer[3].su_remote = sockunion_str2su("4.4.4.4")) +- == NULL) +- return -1; +- if ((test_mp_list_peer[4].su_remote = sockunion_str2su("5.5.5.5")) +- == NULL) +- return -1; +- +- return 0; +-} +- +-static int run_bgp_mp_list(testcase_t *t) +-{ +- struct list mp_list; +- struct listnode *mp_node; +- struct bgp_path_info *info; +- int i; +- int test_result = TEST_PASSED; +- bgp_mp_list_init(&mp_list); +- EXPECT_TRUE(listcount(&mp_list) == 0, test_result); +- +- bgp_mp_list_add(&mp_list, &test_mp_list_info[1]); +- bgp_mp_list_add(&mp_list, &test_mp_list_info[4]); +- bgp_mp_list_add(&mp_list, &test_mp_list_info[2]); +- bgp_mp_list_add(&mp_list, &test_mp_list_info[3]); +- bgp_mp_list_add(&mp_list, &test_mp_list_info[0]); +- +- for (i = 0, mp_node = mp_list.head; i < test_mp_list_info_count; +- i++, mp_node = listnextnode(mp_node)) { +- info = listgetdata(mp_node); +- info->lock++; +- EXPECT_TRUE(info == &test_mp_list_info[i], test_result); +- } +- +- bgp_mp_list_clear(&mp_list); +- EXPECT_TRUE(listcount(&mp_list) == 0, test_result); +- +- return test_result; +-} +- +-static int cleanup_bgp_mp_list(testcase_t *t) +-{ +- int i; +- +- for (i = 0; i < test_mp_list_peer_count; i++) +- sockunion_free(test_mp_list_peer[i].su_remote); +- +- return 0; +-} +- +-testcase_t test_bgp_mp_list = { +- .desc = "Test bgp_mp_list", +- .setup = setup_bgp_mp_list, +- .run = run_bgp_mp_list, +- .cleanup = cleanup_bgp_mp_list, +-}; +- +-/*========================================================= +- * Testcase for bgp_path_info_mpath_update +- */ +- +-static struct bgp_dest *dest; +- +-static int setup_bgp_path_info_mpath_update(testcase_t *t) +-{ +- int i; +- struct bgp *bgp; +- struct bgp_table *rt; +- struct prefix p; +- as_t asn = 1; +- +- t->tmp_data = bgp_create_fake(&asn, NULL); +- if (!t->tmp_data) +- return -1; +- +- bgp = t->tmp_data; +- rt = bgp->rib[AFI_IP][SAFI_UNICAST]; +- +- if (!rt) +- return -1; +- +- str2prefix("42.1.1.0/24", &p); +- dest = bgp_node_get(rt, &p); +- +- setup_bgp_mp_list(t); +- for (i = 0; i < test_mp_list_info_count; i++) +- bgp_path_info_add(dest, &test_mp_list_info[i]); +- return 0; +-} +- +-static int run_bgp_path_info_mpath_update(testcase_t *t) +-{ +- struct bgp_path_info *new_best, *old_best, *mpath; +- struct list mp_list; +- struct bgp_maxpaths_cfg mp_cfg = {3, 3}; +- +- int test_result = TEST_PASSED; +- bgp_mp_list_init(&mp_list); +- bgp_mp_list_add(&mp_list, &test_mp_list_info[4]); +- bgp_mp_list_add(&mp_list, &test_mp_list_info[3]); +- bgp_mp_list_add(&mp_list, &test_mp_list_info[0]); +- bgp_mp_list_add(&mp_list, &test_mp_list_info[1]); +- new_best = &test_mp_list_info[3]; +- old_best = NULL; +- bgp_path_info_mpath_update(NULL, dest, new_best, old_best, &mp_list, +- &mp_cfg); +- bgp_mp_list_clear(&mp_list); +- EXPECT_TRUE(bgp_path_info_mpath_count(new_best) == 2, test_result); +- mpath = bgp_path_info_mpath_first(new_best); +- EXPECT_TRUE(mpath == &test_mp_list_info[0], test_result); +- EXPECT_TRUE(CHECK_FLAG(mpath->flags, BGP_PATH_MULTIPATH), test_result); +- mpath = bgp_path_info_mpath_next(mpath); +- EXPECT_TRUE(mpath == &test_mp_list_info[1], test_result); +- EXPECT_TRUE(CHECK_FLAG(mpath->flags, BGP_PATH_MULTIPATH), test_result); +- +- bgp_mp_list_add(&mp_list, &test_mp_list_info[0]); +- bgp_mp_list_add(&mp_list, &test_mp_list_info[1]); +- new_best = &test_mp_list_info[0]; +- old_best = &test_mp_list_info[3]; +- bgp_path_info_mpath_update(NULL, dest, new_best, old_best, &mp_list, +- &mp_cfg); +- bgp_mp_list_clear(&mp_list); +- EXPECT_TRUE(bgp_path_info_mpath_count(new_best) == 1, test_result); +- mpath = bgp_path_info_mpath_first(new_best); +- EXPECT_TRUE(mpath == &test_mp_list_info[1], test_result); +- EXPECT_TRUE(CHECK_FLAG(mpath->flags, BGP_PATH_MULTIPATH), test_result); +- EXPECT_TRUE(!CHECK_FLAG(test_mp_list_info[0].flags, BGP_PATH_MULTIPATH), +- test_result); +- +- return test_result; +-} +- +-static int cleanup_bgp_path_info_mpath_update(testcase_t *t) +-{ +- int i; +- +- for (i = 0; i < test_mp_list_peer_count; i++) +- sockunion_free(test_mp_list_peer[i].su_remote); +- +- return bgp_delete((struct bgp *)t->tmp_data); +-} +- +-testcase_t test_bgp_path_info_mpath_update = { +- .desc = "Test bgp_path_info_mpath_update", +- .setup = setup_bgp_path_info_mpath_update, +- .run = run_bgp_path_info_mpath_update, +- .cleanup = cleanup_bgp_path_info_mpath_update, +-}; +- +-/*========================================================= +- * Set up testcase vector +- */ +-testcase_t *all_tests[] = { +- &test_bgp_cfg_maximum_paths, &test_bgp_mp_list, +- &test_bgp_path_info_mpath_update, +-}; +- +-int all_tests_count = array_size(all_tests); +- +-/*========================================================= +- * Test Driver Functions +- */ +-static int global_test_init(void) +-{ +- qobj_init(); +- master = event_master_create(NULL); +- zclient = zclient_new(master, &zclient_options_default, NULL, 0); +- bgp_master_init(master, BGP_SOCKET_SNDBUF_SIZE, list_new()); +- vrf_init(NULL, NULL, NULL, NULL); +- bgp_option_set(BGP_OPT_NO_LISTEN); +- +- if (fileno(stdout) >= 0) +- tty = isatty(fileno(stdout)); +- return 0; +-} +- +-static int global_test_cleanup(void) +-{ +- if (zclient != NULL) +- zclient_free(zclient); +- event_master_free(master); +- return 0; +-} +- +-static void display_result(testcase_t *test, int result) +-{ +- if (tty) +- printf("%s: %s\n", test->desc, +- result == TEST_PASSED ? OK : FAILED); +- else +- printf("%s: %s\n", test->desc, +- result == TEST_PASSED ? "OK" : "FAILED"); +-} +- +-static int setup_test(testcase_t *t) +-{ +- int res = 0; +- if (t->setup) +- res = t->setup(t); +- return res; +-} +- +-static int cleanup_test(testcase_t *t) +-{ +- int res = 0; +- if (t->cleanup) +- res = t->cleanup(t); +- return res; +-} +- +-static void run_tests(testcase_t *tests[], int num_tests, int *pass_count, +- int *fail_count) +-{ +- int test_index, result; +- testcase_t *cur_test; +- +- *pass_count = *fail_count = 0; +- +- for (test_index = 0; test_index < num_tests; test_index++) { +- cur_test = tests[test_index]; +- if (!cur_test->desc) { +- printf("error: test %d has no description!\n", +- test_index); +- continue; +- } +- if (!cur_test->run) { +- printf("error: test %s has no run function!\n", +- cur_test->desc); +- continue; +- } +- if (setup_test(cur_test) != 0) { +- printf("error: setup failed for test %s\n", +- cur_test->desc); +- continue; +- } +- result = cur_test->run(cur_test); +- if (result == TEST_PASSED) +- *pass_count += 1; +- else +- *fail_count += 1; +- display_result(cur_test, result); +- if (cleanup_test(cur_test) != 0) { +- printf("error: cleanup failed for test %s\n", +- cur_test->desc); +- continue; +- } +- } +-} +- +-int main(void) +-{ +- int pass_count, fail_count; +- time_t cur_time; +- char buf[32]; +- +- time(&cur_time); +- printf("BGP Multipath Tests Run at %s", ctime_r(&cur_time, buf)); +- if (global_test_init() != 0) { +- printf("Global init failed. Terminating.\n"); +- exit(1); +- } +- run_tests(all_tests, all_tests_count, &pass_count, &fail_count); +- global_test_cleanup(); +- printf("Total pass/fail: %d/%d\n", pass_count, fail_count); +- return fail_count; +-} +diff --git a/tests/bgpd/test_mpath.py b/tests/bgpd/test_mpath.py +deleted file mode 100644 +index 582fd25c20..0000000000 +--- a/tests/bgpd/test_mpath.py ++++ /dev/null +@@ -1,10 +0,0 @@ +-import frrtest +- +- +-class TestMpath(frrtest.TestMultiOut): +- program = "./test_mpath" +- +- +-TestMpath.okfail("bgp maximum-paths config") +-TestMpath.okfail("bgp_mp_list") +-TestMpath.okfail("bgp_path_info_mpath_update") +-- +2.43.2 + + +From 6436c4f55ceb2900d8da52411b300338b36125c1 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Tue, 1 Oct 2024 09:18:44 -0400 +Subject: [PATCH 5/5] bgpd: Remove bgp_path_info_mpath_dequeue + +This function is no doing any work. Let's remove. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_mpath.c | 13 ------------- + bgpd/bgp_mpath.h | 1 - + bgpd/bgp_route.c | 4 ---- + 3 files changed, 18 deletions(-) + +diff --git a/bgpd/bgp_mpath.c b/bgpd/bgp_mpath.c +index 27c179380d..b2e0371052 100644 +--- a/bgpd/bgp_mpath.c ++++ b/bgpd/bgp_mpath.c +@@ -242,19 +242,6 @@ bgp_path_info_mpath_get(struct bgp_path_info *path) + return path->mpath; + } + +-/* +- * bgp_path_info_mpath_dequeue +- * +- * Remove a path from the multipath list +- */ +-void bgp_path_info_mpath_dequeue(struct bgp_path_info *path) +-{ +- struct bgp_path_info_mpath *mpath = path->mpath; +- +- if (!mpath) +- return; +-} +- + /* + * bgp_path_info_mpath_next + * +diff --git a/bgpd/bgp_mpath.h b/bgpd/bgp_mpath.h +index a7107deb0e..8201896593 100644 +--- a/bgpd/bgp_mpath.h ++++ b/bgpd/bgp_mpath.h +@@ -56,7 +56,6 @@ bgp_path_info_mpath_aggregate_update(struct bgp_path_info *new_best, + struct bgp_path_info *old_best); + + /* Unlink and free multipath information associated with a bgp_path_info */ +-extern void bgp_path_info_mpath_dequeue(struct bgp_path_info *path); + extern void bgp_path_info_mpath_free(struct bgp_path_info_mpath **mpath); + + /* Walk list of multipaths associated with a best path */ +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index 12cbf66341..774ff068f8 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -502,8 +502,6 @@ struct bgp_dest *bgp_path_info_reap(struct bgp_dest *dest, + else + bgp_dest_set_bgp_path_info(dest, pi->next); + +- bgp_path_info_mpath_dequeue(pi); +- + pi->next = NULL; + pi->prev = NULL; + +@@ -516,8 +514,6 @@ struct bgp_dest *bgp_path_info_reap(struct bgp_dest *dest, + static struct bgp_dest *bgp_path_info_reap_unsorted(struct bgp_dest *dest, + struct bgp_path_info *pi) + { +- bgp_path_info_mpath_dequeue(pi); +- + pi->next = NULL; + pi->prev = NULL; + +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0076-Optimizations-and-problem-fixing-for-large-scale-ecmp-from-bgp.patch b/src/sonic-frr/patch/0076-Optimizations-and-problem-fixing-for-large-scale-ecmp-from-bgp.patch new file mode 100644 index 00000000000..fc885183034 --- /dev/null +++ b/src/sonic-frr/patch/0076-Optimizations-and-problem-fixing-for-large-scale-ecmp-from-bgp.patch @@ -0,0 +1,577 @@ +From a2d0c451c30e80754978854f316e5291c0812e75 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Wed, 23 Oct 2024 13:16:29 -0400 +Subject: [PATCH 1/5] bgpd: Do not call evpn_overlay_free no matter what + +bgp_update is a very expensive call. Calling evpn_overlay_free +even when we have no evpn data to free is not trivial. Let's +limit the call into this function until we actually have data to +free. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_route.c | 15 +++++++++------ + 1 file changed, 9 insertions(+), 6 deletions(-) + +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index 774ff068f8..55e0a7bc2c 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -4542,9 +4542,10 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, + * will not be interned. In which case, it is ok to update the + * attr->evpn_overlay, so that, this can be stored in adj_in. + */ +- if ((afi == AFI_L2VPN) && evpn) { +- memcpy(&attr->evpn_overlay, evpn, +- sizeof(struct bgp_route_evpn)); ++ if (evpn) { ++ if (afi == AFI_L2VPN) ++ memcpy(&attr->evpn_overlay, evpn, ++ sizeof(struct bgp_route_evpn)); + } + bgp_adj_in_set(dest, peer, attr, addpath_id); + } +@@ -4706,9 +4707,11 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, + * attr->evpn_overlay with evpn directly. Instead memcpy + * evpn to new_atr.evpn_overlay before it is interned. + */ +- if (soft_reconfig && (afi == AFI_L2VPN) && evpn) +- memcpy(&new_attr.evpn_overlay, evpn, +- sizeof(struct bgp_route_evpn)); ++ if (soft_reconfig && evpn) { ++ if (afi == AFI_L2VPN) ++ memcpy(&new_attr.evpn_overlay, evpn, ++ sizeof(struct bgp_route_evpn)); ++ } + + /* Apply incoming route-map. + * NB: new_attr may now contain newly allocated values from route-map +-- +2.43.2 + + +From 1fb6e42a69b92e7a9f7ee338389f4941a624b98b Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Thu, 24 Oct 2024 11:27:24 -0400 +Subject: [PATCH 2/5] bgpd: Store aspath count after aspath has changed + +When running bestpath on a very large number of ecmp. +BGP ends up calling aspath_count a very very large number +of times, which results in ~15% cpu runtime in aspath_count_hops. +Modify the aspath to keep track of it's own count. This results +in the function now taking up ~1.5% of the cpu runtime. Enough +for the moment to be ignored. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_aspath.c | 37 +++++++++++++++++++++++++++++++++++-- + bgpd/bgp_aspath.h | 1 + + 2 files changed, 36 insertions(+), 2 deletions(-) + +diff --git a/bgpd/bgp_aspath.c b/bgpd/bgp_aspath.c +index bc7e8939b4..9241231382 100644 +--- a/bgpd/bgp_aspath.c ++++ b/bgpd/bgp_aspath.c +@@ -294,6 +294,8 @@ static struct aspath *aspath_new(enum asnotation_mode asnotation) + + as = XCALLOC(MTYPE_AS_PATH, sizeof(struct aspath)); + as->asnotation = asnotation; ++ as->count = 0; ++ + return as; + } + +@@ -396,6 +398,11 @@ unsigned int aspath_count_confeds(struct aspath *aspath) + } + + unsigned int aspath_count_hops(const struct aspath *aspath) ++{ ++ return aspath->count; ++} ++ ++static unsigned int aspath_count_hops_internal(const struct aspath *aspath) + { + int count = 0; + struct assegment *seg = aspath->segments; +@@ -705,6 +712,7 @@ struct aspath *aspath_dup(struct aspath *aspath) + else + new->str[0] = '\0'; + ++ new->count = aspath->count; + return new; + } + +@@ -726,6 +734,7 @@ static void *aspath_hash_alloc(void *arg) + new->str_len = aspath->str_len; + new->json = aspath->json; + new->asnotation = aspath->asnotation; ++ new->count = aspath->count; + + return new; + } +@@ -853,6 +862,8 @@ struct aspath *aspath_parse(struct stream *s, size_t length, int use32bit, + if (assegments_parse(s, length, &as.segments, use32bit) < 0) + return NULL; + ++ as.count = aspath_count_hops_internal(&as); ++ + /* If already same aspath exist then return it. */ + find = hash_get(ashash, &as, aspath_hash_alloc); + +@@ -1029,7 +1040,7 @@ static struct assegment *aspath_aggregate_as_set_add(struct aspath *aspath, + asset->as[asset->length - 1] = as; + } + +- ++ aspath->count = aspath_count_hops_internal(aspath); + return asset; + } + +@@ -1110,6 +1121,8 @@ struct aspath *aspath_aggregate(struct aspath *as1, struct aspath *as2) + + assegment_normalise(aspath->segments); + aspath_str_update(aspath, false); ++ aspath->count = aspath_count_hops_internal(aspath); ++ + return aspath; + } + +@@ -1265,6 +1278,7 @@ struct aspath *aspath_replace_regex_asn(struct aspath *aspath, + } + + aspath_str_update(new, false); ++ new->count = aspath_count_hops_internal(new); + return new; + } + +@@ -1290,6 +1304,8 @@ struct aspath *aspath_replace_specific_asn(struct aspath *aspath, + } + + aspath_str_update(new, false); ++ new->count = aspath_count_hops_internal(new); ++ + return new; + } + +@@ -1312,6 +1328,8 @@ struct aspath *aspath_replace_all_asn(struct aspath *aspath, as_t our_asn) + } + + aspath_str_update(new, false); ++ new->count = aspath_count_hops_internal(new); ++ + return new; + } + +@@ -1338,6 +1356,8 @@ struct aspath *aspath_replace_private_asns(struct aspath *aspath, as_t asn, + } + + aspath_str_update(new, false); ++ new->count = aspath_count_hops_internal(new); ++ + return new; + } + +@@ -1410,6 +1430,7 @@ struct aspath *aspath_remove_private_asns(struct aspath *aspath, as_t peer_asn) + if (!aspath->refcnt) + aspath_free(aspath); + aspath_str_update(new, false); ++ new->count = aspath_count_hops_internal(new); + return new; + } + +@@ -1466,6 +1487,7 @@ static struct aspath *aspath_merge(struct aspath *as1, struct aspath *as2) + last->next = as2->segments; + as2->segments = new; + aspath_str_update(as2, false); ++ as2->count = aspath_count_hops_internal(as2); + return as2; + } + +@@ -1483,6 +1505,7 @@ struct aspath *aspath_prepend(struct aspath *as1, struct aspath *as2) + if (as2->segments == NULL) { + as2->segments = assegment_dup_all(as1->segments); + aspath_str_update(as2, false); ++ as2->count = aspath_count_hops_internal(as2); + return as2; + } + +@@ -1503,6 +1526,7 @@ struct aspath *aspath_prepend(struct aspath *as1, struct aspath *as2) + if (!as2->segments) { + as2->segments = assegment_dup_all(as1->segments); + aspath_str_update(as2, false); ++ as2->count = aspath_count_hops_internal(as2); + return as2; + } + +@@ -1548,6 +1572,7 @@ struct aspath *aspath_prepend(struct aspath *as1, struct aspath *as2) + * the inbetween AS_SEQUENCE of seg2 in the process + */ + aspath_str_update(as2, false); ++ as2->count = aspath_count_hops_internal(as2); + return as2; + } else { + /* AS_SET merge code is needed at here. */ +@@ -1627,6 +1652,7 @@ struct aspath *aspath_filter_exclude(struct aspath *source, + lastseg = newseg; + } + aspath_str_update(newpath, false); ++ newpath->count = aspath_count_hops_internal(newpath); + /* We are happy returning even an empty AS_PATH, because the + * administrator + * might expect this very behaviour. There's a mean to avoid this, if +@@ -1645,6 +1671,7 @@ struct aspath *aspath_filter_exclude_all(struct aspath *source) + newpath = aspath_new(source->asnotation); + + aspath_str_update(newpath, false); ++ newpath->count = aspath_count_hops_internal(newpath); + /* We are happy returning even an empty AS_PATH, because the + * administrator + * might expect this very behaviour. There's a mean to avoid this, if +@@ -1732,6 +1759,7 @@ struct aspath *aspath_filter_exclude_acl(struct aspath *source, + + + aspath_str_update(source, false); ++ source->count = aspath_count_hops_internal(source); + /* We are happy returning even an empty AS_PATH, because the + * administrator + * might expect this very behaviour. There's a mean to avoid this, if +@@ -1770,6 +1798,7 @@ static struct aspath *aspath_add_asns(struct aspath *aspath, as_t asno, + } + + aspath_str_update(aspath, false); ++ aspath->count = aspath_count_hops_internal(aspath); + return aspath; + } + +@@ -1861,6 +1890,7 @@ struct aspath *aspath_reconcile_as4(struct aspath *aspath, + if (!hops) { + newpath = aspath_dup(as4path); + aspath_str_update(newpath, false); ++ /* dup sets the count properly */ + return newpath; + } + +@@ -1922,6 +1952,7 @@ struct aspath *aspath_reconcile_as4(struct aspath *aspath, + aspath_free(newpath); + mergedpath->segments = assegment_normalise(mergedpath->segments); + aspath_str_update(mergedpath, false); ++ mergedpath->count = aspath_count_hops_internal(mergedpath); + + if (BGP_DEBUG(as4, AS4)) + zlog_debug("[AS4] result of synthesizing is %s", +@@ -1992,8 +2023,10 @@ struct aspath *aspath_delete_confed_seq(struct aspath *aspath) + seg = next; + } + +- if (removed_confed_segment) ++ if (removed_confed_segment) { + aspath_str_update(aspath, false); ++ aspath->count = aspath_count_hops_internal(aspath); ++ } + + return aspath; + } +diff --git a/bgpd/bgp_aspath.h b/bgpd/bgp_aspath.h +index 2a831c3a55..8a7a734e6a 100644 +--- a/bgpd/bgp_aspath.h ++++ b/bgpd/bgp_aspath.h +@@ -58,6 +58,7 @@ struct aspath { + and AS path regular expression match. */ + char *str; + unsigned short str_len; ++ uint32_t count; + + /* AS notation used by string expression of AS path */ + enum asnotation_mode asnotation; +-- +2.43.2 + + +From f41a92c74a0e10defdb5bd739b6596799e43f83c Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Thu, 24 Oct 2024 11:40:56 -0400 +Subject: [PATCH 3/5] bgpd: Only grab the confed path count if we are comparing + it + +This is just a small optimization but when calling path_info_cmp +hundreds of millions of times this adds up. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_route.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index 55e0a7bc2c..7c596f02a7 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -1096,9 +1096,9 @@ int bgp_path_info_cmp(struct bgp *bgp, struct bgp_path_info *new, + /* 4. AS path length check. */ + if (!CHECK_FLAG(bgp->flags, BGP_FLAG_ASPATH_IGNORE)) { + int exist_hops = aspath_count_hops(existattr->aspath); +- int exist_confeds = aspath_count_confeds(existattr->aspath); + + if (CHECK_FLAG(bgp->flags, BGP_FLAG_ASPATH_CONFED)) { ++ int exist_confeds = aspath_count_confeds(existattr->aspath); + int aspath_hops; + + aspath_hops = aspath_count_hops(newattr->aspath); +-- +2.43.2 + + +From 3c74e1d0dec60abfc8032c7edbebe4dc84e23a24 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Thu, 24 Oct 2024 14:17:51 -0400 +Subject: [PATCH 4/5] bgpd: Fix deadlock in bgp_keepalive and master pthreads + +(gdb) bt +0 futex_wait (private=0, expected=2, futex_word=0x5c438e9a98d8) at ../sysdeps/nptl/futex-internal.h:146 +1 __GI___lll_lock_wait (futex=futex@entry=0x5c438e9a98d8, private=0) at ./nptl/lowlevellock.c:49 +2 0x00007af16d698002 in lll_mutex_lock_optimized (mutex=0x5c438e9a98d8) at ./nptl/pthread_mutex_lock.c:48 +3 ___pthread_mutex_lock (mutex=0x5c438e9a98d8) at ./nptl/pthread_mutex_lock.c:93 +4 0x00005c4369c17e70 in _frr_mtx_lock (mutex=0x5c438e9a98d8, func=0x5c4369dc2750 <__func__.265> "bgp_notify_send_internal") at ./lib/frr_pthread.h:258 +5 0x00005c4369c1a07a in bgp_notify_send_internal (connection=0x5c438e9a98c0, code=8 '\b', sub_code=0 '\000', data=0x0, datalen=0, use_curr=true) at bgpd/bgp_packet.c:928 +6 0x00005c4369c1a707 in bgp_notify_send (connection=0x5c438e9a98c0, code=8 '\b', sub_code=0 '\000') at bgpd/bgp_packet.c:1069 +7 0x00005c4369bea422 in bgp_stop_with_notify (connection=0x5c438e9a98c0, code=8 '\b', sub_code=0 '\000') at bgpd/bgp_fsm.c:1597 +8 0x00005c4369c18480 in bgp_packet_add (connection=0x5c438e9a98c0, peer=0x5c438e9b6010, s=0x7af15c06bf70) at bgpd/bgp_packet.c:151 +9 0x00005c4369c19816 in bgp_keepalive_send (peer=0x5c438e9b6010) at bgpd/bgp_packet.c:639 +10 0x00005c4369bf01fd in peer_process (hb=0x5c438ed05520, arg=0x7af16bdffaf0) at bgpd/bgp_keepalives.c:111 +11 0x00007af16dacd8e6 in hash_iterate (hash=0x7af15c000be0, func=0x5c4369bf005e , arg=0x7af16bdffaf0) at lib/hash.c:252 +12 0x00005c4369bf0679 in bgp_keepalives_start (arg=0x5c438e0db110) at bgpd/bgp_keepalives.c:214 +13 0x00007af16dac9932 in frr_pthread_inner (arg=0x5c438e0db110) at lib/frr_pthread.c:180 +14 0x00007af16d694ac3 in start_thread (arg=) at ./nptl/pthread_create.c:442 +15 0x00007af16d726850 in clone3 () at ../sysdeps/unix/sysv/linux/x86_64/clone3.S:81 +(gdb) + +The bgp keepalive pthread gets deadlocked with itself and consequently +the bgp master pthread gets locked when it attempts to lock +the peerhash_mtx, since it is also locked by the keepalive_pthread + +The keepalive pthread is locking the peerhash_mtx in +bgp_keepalives_start. Next the connection->io_mtx mutex in +bgp_keepalives_send is locked and then when it notices a problem it invokes +bgp_stop_with_notify which relocks the same mutex ( and of course +the relock causes it to get stuck on itself ). This generates a +deadlock condition. + +Modify the code to only hold the connection->io_mtx as short as +possible. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_packet.c | 60 +++++++++++++++++++++++------------------------ + 1 file changed, 29 insertions(+), 31 deletions(-) + +diff --git a/bgpd/bgp_packet.c b/bgpd/bgp_packet.c +index 1f808eea72..effe20ab92 100644 +--- a/bgpd/bgp_packet.c ++++ b/bgpd/bgp_packet.c +@@ -122,41 +122,39 @@ static void bgp_packet_add(struct peer_connection *connection, + peer->last_sendq_ok = monotime(NULL); + + stream_fifo_push(connection->obuf, s); ++ } + +- delta = monotime(NULL) - peer->last_sendq_ok; ++ delta = monotime(NULL) - peer->last_sendq_ok; + +- if (CHECK_FLAG(peer->flags, PEER_FLAG_TIMER)) +- holdtime = atomic_load_explicit(&peer->holdtime, +- memory_order_relaxed); +- else +- holdtime = peer->bgp->default_holdtime; ++ if (CHECK_FLAG(peer->flags, PEER_FLAG_TIMER)) ++ holdtime = atomic_load_explicit(&peer->holdtime, ++ memory_order_relaxed); ++ else ++ holdtime = peer->bgp->default_holdtime; + +- sendholdtime = holdtime * 2; ++ sendholdtime = holdtime * 2; + +- /* Note that when we're here, we're adding some packet to the +- * OutQ. That includes keepalives when there is nothing to +- * do, so there's a guarantee we pass by here once in a while. +- * +- * That implies there is no need to go set up another separate +- * timer that ticks down SendHoldTime, as we'll be here sooner +- * or later anyway and will see the checks below failing. +- */ +- if (!holdtime) { +- /* no holdtime, do nothing. */ +- } else if (delta > sendholdtime) { +- flog_err( +- EC_BGP_SENDQ_STUCK_PROPER, +- "%pBP has not made any SendQ progress for 2 holdtimes (%jds), terminating session", +- peer, sendholdtime); +- BGP_EVENT_ADD(connection, TCP_fatal_error); +- } else if (delta > (intmax_t)holdtime && +- monotime(NULL) - peer->last_sendq_warn > 5) { +- flog_warn( +- EC_BGP_SENDQ_STUCK_WARN, +- "%pBP has not made any SendQ progress for 1 holdtime (%us), peer overloaded?", +- peer, holdtime); +- peer->last_sendq_warn = monotime(NULL); +- } ++ /* Note that when we're here, we're adding some packet to the ++ * OutQ. That includes keepalives when there is nothing to ++ * do, so there's a guarantee we pass by here once in a while. ++ * ++ * That implies there is no need to go set up another separate ++ * timer that ticks down SendHoldTime, as we'll be here sooner ++ * or later anyway and will see the checks below failing. ++ */ ++ if (!holdtime) { ++ /* no holdtime, do nothing. */ ++ } else if (delta > sendholdtime) { ++ flog_err(EC_BGP_SENDQ_STUCK_PROPER, ++ "%pBP has not made any SendQ progress for 2 holdtimes (%jds), terminating session", ++ peer, sendholdtime); ++ BGP_EVENT_ADD(connection, TCP_fatal_error); ++ } else if (delta > (intmax_t)holdtime && ++ monotime(NULL) - peer->last_sendq_warn > 5) { ++ flog_warn(EC_BGP_SENDQ_STUCK_WARN, ++ "%pBP has not made any SendQ progress for 1 holdtime (%us), peer overloaded?", ++ peer, holdtime); ++ peer->last_sendq_warn = monotime(NULL); + } + } + +-- +2.43.2 + + +From 2cf93b11d29475d0a7f0a0ee0759129669aa03ba Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Thu, 24 Oct 2024 17:44:31 -0400 +Subject: [PATCH 5/5] bgpd: Fix wrong pthread event cancelling + +0 __pthread_kill_implementation (no_tid=0, signo=6, threadid=130719886083648) at ./nptl/pthread_kill.c:44 +1 __pthread_kill_internal (signo=6, threadid=130719886083648) at ./nptl/pthread_kill.c:78 +2 __GI___pthread_kill (threadid=130719886083648, signo=signo@entry=6) at ./nptl/pthread_kill.c:89 +3 0x000076e399e42476 in __GI_raise (sig=6) at ../sysdeps/posix/raise.c:26 +4 0x000076e39a34f950 in core_handler (signo=6, siginfo=0x76e3985fca30, context=0x76e3985fc900) at lib/sigevent.c:258 +5 +6 __pthread_kill_implementation (no_tid=0, signo=6, threadid=130719886083648) at ./nptl/pthread_kill.c:44 +7 __pthread_kill_internal (signo=6, threadid=130719886083648) at ./nptl/pthread_kill.c:78 +8 __GI___pthread_kill (threadid=130719886083648, signo=signo@entry=6) at ./nptl/pthread_kill.c:89 +9 0x000076e399e42476 in __GI_raise (sig=sig@entry=6) at ../sysdeps/posix/raise.c:26 +10 0x000076e399e287f3 in __GI_abort () at ./stdlib/abort.c:79 +11 0x000076e39a39874b in _zlog_assert_failed (xref=0x76e39a46cca0 <_xref.27>, extra=0x0) at lib/zlog.c:789 +12 0x000076e39a369dde in cancel_event_helper (m=0x5eda32df5e40, arg=0x5eda33afeed0, flags=1) at lib/event.c:1428 +13 0x000076e39a369ef6 in event_cancel_event_ready (m=0x5eda32df5e40, arg=0x5eda33afeed0) at lib/event.c:1470 +14 0x00005eda0a94a5b3 in bgp_stop (connection=0x5eda33afeed0) at bgpd/bgp_fsm.c:1355 +15 0x00005eda0a94b4ae in bgp_stop_with_notify (connection=0x5eda33afeed0, code=8 '\b', sub_code=0 '\000') at bgpd/bgp_fsm.c:1610 +16 0x00005eda0a979498 in bgp_packet_add (connection=0x5eda33afeed0, peer=0x5eda33b11800, s=0x76e3880daf90) at bgpd/bgp_packet.c:152 +17 0x00005eda0a97a80f in bgp_keepalive_send (peer=0x5eda33b11800) at bgpd/bgp_packet.c:639 +18 0x00005eda0a9511fd in peer_process (hb=0x5eda33c9ab80, arg=0x76e3985ffaf0) at bgpd/bgp_keepalives.c:111 +19 0x000076e39a2cd8e6 in hash_iterate (hash=0x76e388000be0, func=0x5eda0a95105e , arg=0x76e3985ffaf0) at lib/hash.c:252 +20 0x00005eda0a951679 in bgp_keepalives_start (arg=0x5eda3306af80) at bgpd/bgp_keepalives.c:214 +21 0x000076e39a2c9932 in frr_pthread_inner (arg=0x5eda3306af80) at lib/frr_pthread.c:180 +22 0x000076e399e94ac3 in start_thread (arg=) at ./nptl/pthread_create.c:442 +23 0x000076e399f26850 in clone3 () at ../sysdeps/unix/sysv/linux/x86_64/clone3.S:81 +(gdb) f 12 +12 0x000076e39a369dde in cancel_event_helper (m=0x5eda32df5e40, arg=0x5eda33afeed0, flags=1) at lib/event.c:1428 +1428 assert(m->owner == pthread_self()); + +In this decode the attempt to cancel the connection's events from +the wrong thread is causing the crash. Modify the code to create an +event on the bm->master to cancel the events for the connection. + +Signed-off-by: Donald Sharp +--- + bgpd/bgp_fsm.c | 10 ++++++++++ + bgpd/bgp_fsm.h | 1 + + bgpd/bgp_packet.c | 3 ++- + bgpd/bgpd.h | 2 ++ + zebra/kernel_netlink.c | 2 +- + 5 files changed, 16 insertions(+), 2 deletions(-) + +diff --git a/bgpd/bgp_fsm.c b/bgpd/bgp_fsm.c +index f58ab7c027..650301163d 100644 +--- a/bgpd/bgp_fsm.c ++++ b/bgpd/bgp_fsm.c +@@ -178,6 +178,7 @@ static struct peer *peer_xfer_conn(struct peer *from_peer) + EVENT_OFF(going_away->t_delayopen); + EVENT_OFF(going_away->t_connect_check_r); + EVENT_OFF(going_away->t_connect_check_w); ++ EVENT_OFF(going_away->t_stop_with_notify); + EVENT_OFF(keeper->t_routeadv); + EVENT_OFF(keeper->t_connect); + EVENT_OFF(keeper->t_delayopen); +@@ -1472,6 +1473,8 @@ enum bgp_fsm_state_progress bgp_stop(struct peer_connection *connection) + EVENT_OFF(connection->t_connect_check_r); + EVENT_OFF(connection->t_connect_check_w); + ++ EVENT_OFF(connection->t_stop_with_notify); ++ + /* Stop all timers. */ + EVENT_OFF(connection->t_start); + EVENT_OFF(connection->t_connect); +@@ -3143,3 +3146,10 @@ void bgp_peer_gr_flags_update(struct peer *peer) + } + } + } ++ ++void bgp_event_stop_with_notify(struct event *event) ++{ ++ struct peer_connection *connection = EVENT_ARG(event); ++ ++ bgp_stop_with_notify(connection, BGP_NOTIFY_HOLD_ERR, 0); ++} +diff --git a/bgpd/bgp_fsm.h b/bgpd/bgp_fsm.h +index 2e96ac4c10..4e76262909 100644 +--- a/bgpd/bgp_fsm.h ++++ b/bgpd/bgp_fsm.h +@@ -109,6 +109,7 @@ enum bgp_fsm_state_progress { + extern void bgp_fsm_nht_update(struct peer_connection *connection, + struct peer *peer, bool has_valid_nexthops); + extern void bgp_event(struct event *event); ++extern void bgp_event_stop_with_notify(struct event *event); + extern int bgp_event_update(struct peer_connection *connection, + enum bgp_fsm_events event); + extern enum bgp_fsm_state_progress bgp_stop(struct peer_connection *connection); +diff --git a/bgpd/bgp_packet.c b/bgpd/bgp_packet.c +index effe20ab92..2e682c7733 100644 +--- a/bgpd/bgp_packet.c ++++ b/bgpd/bgp_packet.c +@@ -148,7 +148,8 @@ static void bgp_packet_add(struct peer_connection *connection, + flog_err(EC_BGP_SENDQ_STUCK_PROPER, + "%pBP has not made any SendQ progress for 2 holdtimes (%jds), terminating session", + peer, sendholdtime); +- BGP_EVENT_ADD(connection, TCP_fatal_error); ++ event_add_event(bm->master, bgp_event_stop_with_notify, ++ connection, 0, &connection->t_stop_with_notify); + } else if (delta > (intmax_t)holdtime && + monotime(NULL) - peer->last_sendq_warn > 5) { + flog_warn(EC_BGP_SENDQ_STUCK_WARN, +diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h +index 057e26a83d..1da1a17e8b 100644 +--- a/bgpd/bgpd.h ++++ b/bgpd/bgpd.h +@@ -1189,6 +1189,8 @@ struct peer_connection { + struct event *t_process_packet; + struct event *t_process_packet_error; + ++ struct event *t_stop_with_notify; ++ + union sockunion su; + #define BGP_CONNECTION_SU_UNSPEC(connection) \ + (connection->su.sa.sa_family == AF_UNSPEC) +diff --git a/zebra/kernel_netlink.c b/zebra/kernel_netlink.c +index 8a64a1ea48..cdfb90e0f8 100644 +--- a/zebra/kernel_netlink.c ++++ b/zebra/kernel_netlink.c +@@ -931,7 +931,7 @@ static int netlink_recv_msg(struct nlsock *nl, struct msghdr *msg) + } while (status == -1 && errno == EINTR); + + if (status == -1) { +- if (errno == EWOULDBLOCK || errno == EAGAIN) ++ if (errno == EWOULDBLOCK || errno == EAGAIN || errno == EMSGSIZE) + return 0; + flog_err(EC_ZEBRA_RECVMSG_OVERRUN, "%s recvmsg overrun: %s", + nl->name, safe_strerror(errno)); +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0077-frr-vtysh-dependencies-for-srv6-static-patches.patch b/src/sonic-frr/patch/0077-frr-vtysh-dependencies-for-srv6-static-patches.patch new file mode 100644 index 00000000000..47d13e7a178 --- /dev/null +++ b/src/sonic-frr/patch/0077-frr-vtysh-dependencies-for-srv6-static-patches.patch @@ -0,0 +1,5712 @@ +From fd8edc3dfbd41ff1ba8c21ea258276f3dab71e4b Mon Sep 17 00:00:00 2001 +From: Nathan Bahr +Date: Wed, 12 Jun 2024 16:26:48 +0000 +Subject: [PATCH] pimd, lib, vtysh: Added new 'router pim[6] [vrf NAME]' config + node + +Moved all existing global/vrf PIM config to the new subnode. +Existing configuration updated to be hidden and deprecated. +Both versions of configuration still work together. + +Signed-off-by: Nathan Bahr +--- + lib/command.h | 2 + + pimd/pim6_cmd.c | 1127 ++++++++++++++-- + pimd/pim_addr.h | 2 + + pimd/pim_cmd.c | 2845 +++++++++++++++++++++++++++++++++-------- + pimd/pim_cmd_common.c | 188 +-- + pimd/pim_cmd_common.h | 2 + + pimd/pim_instance.c | 21 +- + pimd/pim_msdp.c | 18 +- + pimd/pim_msdp.h | 11 +- + pimd/pim_nb.h | 4 - + pimd/pim_rp.c | 13 +- + pimd/pim_rp.h | 3 +- + pimd/pim_vty.c | 68 +- + vtysh/vtysh.c | 89 ++ + vtysh/vtysh_config.c | 5 + + 15 files changed, 3523 insertions(+), 875 deletions(-) + +diff --git a/lib/command.h b/lib/command.h +index 6f819c7e3693..57e3b9cda0b7 100644 +--- a/lib/command.h ++++ b/lib/command.h +@@ -182,6 +182,8 @@ enum node_type { + ISIS_SRV6_NODE_MSD_NODE, /* ISIS SRv6 Node MSDs node */ + MGMTD_NODE, /* MGMTD node. */ + RPKI_VRF_NODE, /* RPKI node for VRF */ ++ PIM_NODE, /* PIM protocol mode */ ++ PIM6_NODE, /* PIM protocol for IPv6 mode */ + NODE_TYPE_MAX, /* maximum */ + }; + /* clang-format on */ +diff --git a/pimd/pim6_cmd.c b/pimd/pim6_cmd.c +index ec912700d193..99f1474712b5 100644 +--- a/pimd/pim6_cmd.c ++++ b/pimd/pim6_cmd.c +@@ -41,45 +41,207 @@ static struct cmd_node debug_node = { + .config_write = pim_debug_config_write, + }; + +-DEFPY (ipv6_pim_joinprune_time, +- ipv6_pim_joinprune_time_cmd, +- "ipv6 pim join-prune-interval (1-65535)$jpi", +- IPV6_STR +- PIM_STR ++DEFPY_NOSH (router_pim6, ++ router_pim6_cmd, ++ "router pim6 [vrf NAME]", ++ "Enable a routing process\n" ++ "Start PIM6 configuration\n" ++ VRF_CMD_HELP_STR) ++{ ++ char xpath[XPATH_MAXLEN]; ++ const char *vrf_name; ++ ++ if (vrf) ++ vrf_name = vrf; ++ else ++ vrf_name = VRF_DEFAULT_NAME; ++ ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", ++ vrf_name, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) != CMD_SUCCESS) ++ return CMD_WARNING_CONFIG_FAILED; ++ ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ ++ return CMD_SUCCESS; ++} ++ ++DEFPY (no_router_pim6, ++ no_router_pim6_cmd, ++ "no router pim6 [vrf NAME]", ++ NO_STR ++ "Enable a routing process\n" ++ "Start PIM6 configuration\n" ++ VRF_CMD_HELP_STR) ++{ ++ char xpath[XPATH_MAXLEN]; ++ const char *vrf_name; ++ ++ if (vrf) ++ vrf_name = vrf; ++ else ++ vrf_name = VRF_DEFAULT_NAME; ++ ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", ++ vrf_name, FRR_PIM_AF_XPATH_VAL); ++ ++ nb_cli_enqueue_change(vty, xpath, NB_OP_DESTROY, NULL); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++ ++DEFPY (pim6_joinprune_time, ++ pim6_joinprune_time_cmd, ++ "join-prune-interval (1-65535)$jpi", + "Join Prune Send Interval\n" + "Seconds\n") + { + return pim_process_join_prune_cmd(vty, jpi_str); + } ++DEFPY_ATTR(ipv6_joinprune_time, ++ ipv6_pim_joinprune_time_cmd, ++ "ipv6 pim join-prune-interval (1-65535)$jpi", ++ IPV6_STR PIM_STR ++ "Join Prune Send Interval\n" ++ "Seconds\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_join_prune_cmd(vty, jpi_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (no_ipv6_pim_joinprune_time, +- no_ipv6_pim_joinprune_time_cmd, +- "no ipv6 pim join-prune-interval [(1-65535)]", ++DEFPY (no_pim6_joinprune_time, ++ no_pim6_joinprune_time_cmd, ++ "no join-prune-interval [(1-65535)]", + NO_STR +- IPV6_STR +- PIM_STR + "Join Prune Send Interval\n" + IGNORED_IN_NO_STR) + { + return pim_process_no_join_prune_cmd(vty); + } ++DEFPY_ATTR(no_ipv6_pim_joinprune_time, ++ no_ipv6_pim_joinprune_time_cmd, ++ "no ipv6 pim join-prune-interval [(1-65535)]", ++ NO_STR ++ IPV6_STR ++ PIM_STR ++ "Join Prune Send Interval\n" ++ IGNORED_IN_NO_STR, ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_join_prune_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (ipv6_pim_spt_switchover_infinity, +- ipv6_pim_spt_switchover_infinity_cmd, +- "ipv6 pim spt-switchover infinity-and-beyond", +- IPV6_STR +- PIM_STR ++DEFPY (pim6_spt_switchover_infinity, ++ pim6_spt_switchover_infinity_cmd, ++ "spt-switchover infinity-and-beyond", + "SPT-Switchover\n" + "Never switch to SPT Tree\n") + { + return pim_process_spt_switchover_infinity_cmd(vty); + } ++DEFPY_ATTR(ipv6_spt_switchover_infinity, ++ ipv6_pim_spt_switchover_infinity_cmd, ++ "ipv6 pim spt-switchover infinity-and-beyond", ++ IPV6_STR ++ PIM_STR ++ "SPT-Switchover\n" ++ "Never switch to SPT Tree\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_spt_switchover_infinity_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (ipv6_pim_spt_switchover_infinity_plist, +- ipv6_pim_spt_switchover_infinity_plist_cmd, +- "ipv6 pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST6_NAME$plist", +- IPV6_STR +- PIM_STR ++DEFPY (pim6_spt_switchover_infinity_plist, ++ pim6_spt_switchover_infinity_plist_cmd, ++ "spt-switchover infinity-and-beyond prefix-list PREFIXLIST6_NAME$plist", + "SPT-Switchover\n" + "Never switch to SPT Tree\n" + "Prefix-List to control which groups to switch\n" +@@ -87,25 +249,104 @@ DEFPY (ipv6_pim_spt_switchover_infinity_plist, + { + return pim_process_spt_switchover_prefixlist_cmd(vty, plist); + } ++DEFPY_ATTR(ipv6_spt_switchover_infinity_plist, ++ ipv6_pim_spt_switchover_infinity_plist_cmd, ++ "ipv6 pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST6_NAME$plist", ++ IPV6_STR ++ PIM_STR ++ "SPT-Switchover\n" ++ "Never switch to SPT Tree\n" ++ "Prefix-List to control which groups to switch\n" ++ "Prefix-List name\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_spt_switchover_prefixlist_cmd(vty, plist); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (no_ipv6_pim_spt_switchover_infinity, +- no_ipv6_pim_spt_switchover_infinity_cmd, +- "no ipv6 pim spt-switchover infinity-and-beyond", ++DEFPY (no_pim6_spt_switchover_infinity, ++ no_pim6_spt_switchover_infinity_cmd, ++ "no spt-switchover infinity-and-beyond", + NO_STR +- IPV6_STR +- PIM_STR + "SPT_Switchover\n" + "Never switch to SPT Tree\n") + { + return pim_process_no_spt_switchover_cmd(vty); + } ++DEFPY_ATTR(no_ipv6_pim_spt_switchover_infinity, ++ no_ipv6_pim_spt_switchover_infinity_cmd, ++ "no ipv6 pim spt-switchover infinity-and-beyond", ++ NO_STR ++ IPV6_STR ++ PIM_STR ++ "SPT_Switchover\n" ++ "Never switch to SPT Tree\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_spt_switchover_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (no_ipv6_pim_spt_switchover_infinity_plist, +- no_ipv6_pim_spt_switchover_infinity_plist_cmd, +- "no ipv6 pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST6_NAME", ++DEFPY (no_pim6_spt_switchover_infinity_plist, ++ no_pim6_spt_switchover_infinity_plist_cmd, ++ "no spt-switchover infinity-and-beyond prefix-list PREFIXLIST6_NAME", + NO_STR +- IPV6_STR +- PIM_STR + "SPT_Switchover\n" + "Never switch to SPT Tree\n" + "Prefix-List to control which groups to switch\n" +@@ -113,100 +354,453 @@ DEFPY (no_ipv6_pim_spt_switchover_infinity_plist, + { + return pim_process_no_spt_switchover_cmd(vty); + } ++DEFPY_ATTR(no_ipv6_pim_spt_switchover_infinity_plist, ++ no_ipv6_pim_spt_switchover_infinity_plist_cmd, ++ "no ipv6 pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST6_NAME", ++ NO_STR ++ IPV6_STR ++ PIM_STR ++ "SPT_Switchover\n" ++ "Never switch to SPT Tree\n" ++ "Prefix-List to control which groups to switch\n" ++ "Prefix-List name\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_spt_switchover_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (ipv6_pim_packets, +- ipv6_pim_packets_cmd, +- "ipv6 pim packets (1-255)", +- IPV6_STR +- PIM_STR ++DEFPY (pim6_packets, ++ pim6_packets_cmd, ++ "packets (1-255)", + "packets to process at one time per fd\n" + "Number of packets\n") + { + return pim_process_pim_packet_cmd(vty, packets_str); + } ++DEFPY_ATTR(ipv6_pim_packets, ++ ipv6_pim_packets_cmd, ++ "ipv6 pim packets (1-255)", ++ IPV6_STR ++ PIM_STR ++ "packets to process at one time per fd\n" ++ "Number of packets\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_pim_packet_cmd(vty, packets_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (no_ipv6_pim_packets, +- no_ipv6_pim_packets_cmd, +- "no ipv6 pim packets [(1-255)]", ++DEFPY (no_pim6_packets, ++ no_pim6_packets_cmd, ++ "no packets [(1-255)]", + NO_STR +- IPV6_STR +- PIM_STR + "packets to process at one time per fd\n" + IGNORED_IN_NO_STR) + { + return pim_process_no_pim_packet_cmd(vty); + } ++DEFPY_ATTR(no_ipv6_pim_packets, ++ no_ipv6_pim_packets_cmd, ++ "no ipv6 pim packets [(1-255)]", ++ NO_STR ++ IPV6_STR ++ PIM_STR ++ "packets to process at one time per fd\n" ++ IGNORED_IN_NO_STR, ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } + +-DEFPY (ipv6_pim_keep_alive, +- ipv6_pim_keep_alive_cmd, +- "ipv6 pim keep-alive-timer (1-65535)$kat", +- IPV6_STR +- PIM_STR ++ ret = pim_process_no_pim_packet_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY (pim6_keep_alive, ++ pim6_keep_alive_cmd, ++ "keep-alive-timer (1-65535)$kat", + "Keep alive Timer\n" + "Seconds\n") + { + return pim_process_keepalivetimer_cmd(vty, kat_str); + } ++DEFPY_ATTR(ipv6_pim_keep_alive, ++ ipv6_pim_keep_alive_cmd, ++ "ipv6 pim keep-alive-timer (1-65535)$kat", ++ IPV6_STR ++ PIM_STR ++ "Keep alive Timer\n" ++ "Seconds\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_keepalivetimer_cmd(vty, kat_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (no_ipv6_pim_keep_alive, +- no_ipv6_pim_keep_alive_cmd, +- "no ipv6 pim keep-alive-timer [(1-65535)]", ++DEFPY (no_pim6_keep_alive, ++ no_pim6_keep_alive_cmd, ++ "no keep-alive-timer [(1-65535)]", + NO_STR +- IPV6_STR +- PIM_STR + "Keep alive Timer\n" + IGNORED_IN_NO_STR) + { + return pim_process_no_keepalivetimer_cmd(vty); + } ++DEFPY_ATTR(no_ipv6_pim_keep_alive, ++ no_ipv6_pim_keep_alive_cmd, ++ "no ipv6 pim keep-alive-timer [(1-65535)]", ++ NO_STR ++ IPV6_STR ++ PIM_STR ++ "Keep alive Timer\n" ++ IGNORED_IN_NO_STR, ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_keepalivetimer_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (ipv6_pim_rp_keep_alive, +- ipv6_pim_rp_keep_alive_cmd, +- "ipv6 pim rp keep-alive-timer (1-65535)$kat", +- IPV6_STR +- PIM_STR ++DEFPY (pim6_rp_keep_alive, ++ pim6_rp_keep_alive_cmd, ++ "rp keep-alive-timer (1-65535)$kat", + "Rendezvous Point\n" + "Keep alive Timer\n" + "Seconds\n") + { + return pim_process_rp_kat_cmd(vty, kat_str); + } ++DEFPY_ATTR(ipv6_pim_rp_keep_alive, ++ ipv6_pim_rp_keep_alive_cmd, ++ "ipv6 pim rp keep-alive-timer (1-65535)$kat", ++ IPV6_STR ++ PIM_STR ++ "Rendezvous Point\n" ++ "Keep alive Timer\n" ++ "Seconds\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_rp_kat_cmd(vty, kat_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (no_ipv6_pim_rp_keep_alive, +- no_ipv6_pim_rp_keep_alive_cmd, +- "no ipv6 pim rp keep-alive-timer [(1-65535)]", ++DEFPY (no_pim6_rp_keep_alive, ++ no_pim6_rp_keep_alive_cmd, ++ "no rp keep-alive-timer [(1-65535)]", + NO_STR +- IPV6_STR +- PIM_STR + "Rendezvous Point\n" + "Keep alive Timer\n" + IGNORED_IN_NO_STR) + { + return pim_process_no_rp_kat_cmd(vty); + } ++DEFPY_ATTR(no_ipv6_pim_rp_keep_alive, ++ no_ipv6_pim_rp_keep_alive_cmd, ++ "no ipv6 pim rp keep-alive-timer [(1-65535)]", ++ NO_STR ++ IPV6_STR ++ PIM_STR ++ "Rendezvous Point\n" ++ "Keep alive Timer\n" ++ IGNORED_IN_NO_STR, ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } + +-DEFPY (ipv6_pim_register_suppress, +- ipv6_pim_register_suppress_cmd, +- "ipv6 pim register-suppress-time (1-65535)$rst", +- IPV6_STR +- PIM_STR ++ ret = pim_process_no_rp_kat_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY (pim6_register_suppress, ++ pim6_register_suppress_cmd, ++ "register-suppress-time (1-65535)$rst", + "Register Suppress Timer\n" + "Seconds\n") + { + return pim_process_register_suppress_cmd(vty, rst_str); + } ++DEFPY_ATTR(ipv6_pim_register_suppress, ++ ipv6_pim_register_suppress_cmd, ++ "ipv6 pim register-suppress-time (1-65535)$rst", ++ IPV6_STR ++ PIM_STR ++ "Register Suppress Timer\n" ++ "Seconds\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_register_suppress_cmd(vty, rst_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (no_ipv6_pim_register_suppress, +- no_ipv6_pim_register_suppress_cmd, +- "no ipv6 pim register-suppress-time [(1-65535)]", ++DEFPY (no_pim6_register_suppress, ++ no_pim6_register_suppress_cmd, ++ "no register-suppress-time [(1-65535)]", + NO_STR +- IPV6_STR +- PIM_STR + "Register Suppress Timer\n" + IGNORED_IN_NO_STR) + { + return pim_process_no_register_suppress_cmd(vty); + } ++DEFPY_ATTR(no_ipv6_pim_register_suppress, ++ no_ipv6_pim_register_suppress_cmd, ++ "no ipv6 pim register-suppress-time [(1-65535)]", ++ NO_STR ++ IPV6_STR ++ PIM_STR ++ "Register Suppress Timer\n" ++ IGNORED_IN_NO_STR, ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_register_suppress_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + + DEFPY (interface_ipv6_pim, + interface_ipv6_pim_cmd, +@@ -405,11 +999,9 @@ DEFPY (interface_no_ipv6_mroute, + source_str); + } + +-DEFPY (ipv6_pim_rp, +- ipv6_pim_rp_cmd, +- "ipv6 pim rp X:X::X:X$rp [X:X::X:X/M]$gp", +- IPV6_STR +- PIM_STR ++DEFPY (pim6_rp, ++ pim6_rp_cmd, ++ "rp X:X::X:X$rp [X:X::X:X/M]$gp", + "Rendezvous Point\n" + "ipv6 address of RP\n" + "Group Address range to cover\n") +@@ -418,13 +1010,53 @@ DEFPY (ipv6_pim_rp, + + return pim_process_rp_cmd(vty, rp_str, group_str); + } ++DEFPY_ATTR(ipv6_pim_rp, ++ ipv6_pim_rp_cmd, ++ "ipv6 pim rp X:X::X:X$rp [X:X::X:X/M]$gp", ++ IPV6_STR ++ PIM_STR ++ "Rendezvous Point\n" ++ "ipv6 address of RP\n" ++ "Group Address range to cover\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *group_str = (gp_str) ? gp_str : "FF00::0/8"; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_rp_cmd(vty, rp_str, group_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (no_ipv6_pim_rp, +- no_ipv6_pim_rp_cmd, +- "no ipv6 pim rp X:X::X:X$rp [X:X::X:X/M]$gp", ++DEFPY (no_pim6_rp, ++ no_pim6_rp_cmd, ++ "no rp X:X::X:X$rp [X:X::X:X/M]$gp", + NO_STR +- IPV6_STR +- PIM_STR + "Rendezvous Point\n" + "ipv6 address of RP\n" + "Group Address range to cover\n") +@@ -433,12 +1065,53 @@ DEFPY (no_ipv6_pim_rp, + + return pim_process_no_rp_cmd(vty, rp_str, group_str); + } ++DEFPY_ATTR(no_ipv6_pim_rp, ++ no_ipv6_pim_rp_cmd, ++ "no ipv6 pim rp X:X::X:X$rp [X:X::X:X/M]$gp", ++ NO_STR ++ IPV6_STR ++ PIM_STR ++ "Rendezvous Point\n" ++ "ipv6 address of RP\n" ++ "Group Address range to cover\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *group_str = (gp_str) ? gp_str : "FF00::0/8"; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } + +-DEFPY (ipv6_pim_rp_prefix_list, +- ipv6_pim_rp_prefix_list_cmd, +- "ipv6 pim rp X:X::X:X$rp prefix-list PREFIXLIST6_NAME$plist", +- IPV6_STR +- PIM_STR ++ ret = pim_process_no_rp_cmd(vty, rp_str, group_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY (pim6_rp_prefix_list, ++ pim6_rp_prefix_list_cmd, ++ "rp X:X::X:X$rp prefix-list PREFIXLIST6_NAME$plist", + "Rendezvous Point\n" + "ipv6 address of RP\n" + "group prefix-list filter\n" +@@ -446,13 +1119,53 @@ DEFPY (ipv6_pim_rp_prefix_list, + { + return pim_process_rp_plist_cmd(vty, rp_str, plist); + } ++DEFPY_ATTR(ipv6_pim_rp_prefix_list, ++ ipv6_pim_rp_prefix_list_cmd, ++ "ipv6 pim rp X:X::X:X$rp prefix-list PREFIXLIST6_NAME$plist", ++ IPV6_STR ++ PIM_STR ++ "Rendezvous Point\n" ++ "ipv6 address of RP\n" ++ "group prefix-list filter\n" ++ "Name of a prefix-list\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_rp_plist_cmd(vty, rp_str, plist); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (no_ipv6_pim_rp_prefix_list, +- no_ipv6_pim_rp_prefix_list_cmd, +- "no ipv6 pim rp X:X::X:X$rp prefix-list PREFIXLIST6_NAME$plist", ++DEFPY (no_pim6_rp_prefix_list, ++ no_pim6_rp_prefix_list_cmd, ++ "no rp X:X::X:X$rp prefix-list PREFIXLIST6_NAME$plist", + NO_STR +- IPV6_STR +- PIM_STR + "Rendezvous Point\n" + "ipv6 address of RP\n" + "group prefix-list filter\n" +@@ -460,6 +1173,49 @@ DEFPY (no_ipv6_pim_rp_prefix_list, + { + return pim_process_no_rp_plist_cmd(vty, rp_str, plist); + } ++DEFPY_ATTR(no_ipv6_pim_rp_prefix_list, ++ no_ipv6_pim_rp_prefix_list_cmd, ++ "no ipv6 pim rp X:X::X:X$rp prefix-list PREFIXLIST6_NAME$plist", ++ NO_STR ++ IPV6_STR ++ PIM_STR ++ "Rendezvous Point\n" ++ "ipv6 address of RP\n" ++ "group prefix-list filter\n" ++ "Name of a prefix-list\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_rp_plist_cmd(vty, rp_str, plist); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + + DEFPY (ipv6_pim_bsm, + ipv6_pim_bsm_cmd, +@@ -503,10 +1259,9 @@ DEFPY (no_ipv6_pim_ucast_bsm, + return pim_process_no_unicast_bsm_cmd(vty); + } + +-DEFPY (ipv6_ssmpingd, +- ipv6_ssmpingd_cmd, +- "ipv6 ssmpingd [X:X::X:X]$source", +- IPV6_STR ++DEFPY (pim6_ssmpingd, ++ pim6_ssmpingd_cmd, ++ "ssmpingd [X:X::X:X]$source", + CONF_SSMPINGD_STR + "Source address\n") + { +@@ -514,20 +1269,99 @@ DEFPY (ipv6_ssmpingd, + + return pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, src_str); + } ++DEFPY_ATTR(ipv6_ssmpingd, ++ ipv6_ssmpingd_cmd, ++ "ipv6 ssmpingd [X:X::X:X]$source", ++ IPV6_STR ++ CONF_SSMPINGD_STR ++ "Source address\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *src_str = (source_str) ? source_str : "::"; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } + ++ ret = pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, src_str); + +-DEFPY (no_ipv6_ssmpingd, +- no_ipv6_ssmpingd_cmd, +- "no ipv6 ssmpingd [X:X::X:X]$source", +- NO_STR +- IPV6_STR +- CONF_SSMPINGD_STR +- "Source address\n") ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY (no_pim6_ssmpingd, ++ no_pim6_ssmpingd_cmd, ++ "no ssmpingd [X:X::X:X]$source", ++ NO_STR ++ CONF_SSMPINGD_STR ++ "Source address\n") + { + const char *src_str = (source_str) ? source_str : "::"; + + return pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, src_str); + } ++DEFPY_ATTR(no_ipv6_ssmpingd, ++ no_ipv6_ssmpingd_cmd, ++ "no ipv6 ssmpingd [X:X::X:X]$source", ++ NO_STR ++ IPV6_STR ++ CONF_SSMPINGD_STR ++ "Source address\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *src_str = (source_str) ? source_str : "::"; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM6_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, src_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + + DEFPY (interface_ipv6_mld_join, + interface_ipv6_mld_join_cmd, +@@ -1733,12 +2567,16 @@ DEFPY (debug_pimv6_bsm, + return CMD_SUCCESS; + } + +-void pim_cmd_init(void) +-{ +- if_cmd_init(pim_interface_config_write); +- +- install_node(&debug_node); ++struct cmd_node pim6_node = { ++ .name = "pim6", ++ .node = PIM6_NODE, ++ .parent_node = CONFIG_NODE, ++ .prompt = "%s(config-pim6)# ", ++ .config_write = pim_router_config_write, ++}; + ++static void pim_install_deprecated(void) ++{ + install_element(CONFIG_NODE, &ipv6_pim_joinprune_time_cmd); + install_element(CONFIG_NODE, &no_ipv6_pim_joinprune_time_cmd); + install_element(CONFIG_NODE, &ipv6_pim_spt_switchover_infinity_cmd); +@@ -1753,6 +2591,60 @@ void pim_cmd_init(void) + install_element(CONFIG_NODE, &no_ipv6_pim_rp_keep_alive_cmd); + install_element(CONFIG_NODE, &ipv6_pim_register_suppress_cmd); + install_element(CONFIG_NODE, &no_ipv6_pim_register_suppress_cmd); ++ install_element(CONFIG_NODE, &ipv6_pim_rp_cmd); ++ install_element(VRF_NODE, &ipv6_pim_rp_cmd); ++ install_element(CONFIG_NODE, &no_ipv6_pim_rp_cmd); ++ install_element(VRF_NODE, &no_ipv6_pim_rp_cmd); ++ install_element(CONFIG_NODE, &ipv6_pim_rp_prefix_list_cmd); ++ install_element(VRF_NODE, &ipv6_pim_rp_prefix_list_cmd); ++ install_element(CONFIG_NODE, &no_ipv6_pim_rp_prefix_list_cmd); ++ install_element(VRF_NODE, &no_ipv6_pim_rp_prefix_list_cmd); ++ install_element(CONFIG_NODE, &ipv6_ssmpingd_cmd); ++ install_element(VRF_NODE, &ipv6_ssmpingd_cmd); ++ install_element(CONFIG_NODE, &no_ipv6_ssmpingd_cmd); ++ install_element(VRF_NODE, &no_ipv6_ssmpingd_cmd); ++} ++ ++void pim_cmd_init(void) ++{ ++ if_cmd_init(pim_interface_config_write); ++ ++ install_node(&debug_node); ++ ++ pim_install_deprecated(); ++ ++ install_element(CONFIG_NODE, &router_pim6_cmd); ++ install_element(CONFIG_NODE, &no_router_pim6_cmd); ++ ++ install_node(&pim6_node); ++ install_default(PIM6_NODE); ++ ++ install_element(PIM6_NODE, &pim6_joinprune_time_cmd); ++ install_element(PIM6_NODE, &no_pim6_joinprune_time_cmd); ++ install_element(PIM6_NODE, &pim6_spt_switchover_infinity_cmd); ++ install_element(PIM6_NODE, &pim6_spt_switchover_infinity_plist_cmd); ++ install_element(PIM6_NODE, &no_pim6_spt_switchover_infinity_cmd); ++ install_element(PIM6_NODE, &no_pim6_spt_switchover_infinity_plist_cmd); ++ install_element(PIM6_NODE, &pim6_packets_cmd); ++ install_element(PIM6_NODE, &no_pim6_packets_cmd); ++ install_element(PIM6_NODE, &pim6_keep_alive_cmd); ++ install_element(PIM6_NODE, &no_pim6_keep_alive_cmd); ++ install_element(PIM6_NODE, &pim6_rp_keep_alive_cmd); ++ install_element(PIM6_NODE, &no_pim6_rp_keep_alive_cmd); ++ install_element(PIM6_NODE, &pim6_register_suppress_cmd); ++ install_element(PIM6_NODE, &no_pim6_register_suppress_cmd); ++ install_element(PIM6_NODE, &pim6_rp_cmd); ++ install_element(PIM6_NODE, &no_pim6_rp_cmd); ++ install_element(PIM6_NODE, &pim6_rp_prefix_list_cmd); ++ install_element(PIM6_NODE, &no_pim6_rp_prefix_list_cmd); ++ install_element(PIM6_NODE, &pim6_ssmpingd_cmd); ++ install_element(PIM6_NODE, &no_pim6_ssmpingd_cmd); ++ ++ install_element(CONFIG_NODE, &ipv6_mld_group_watermark_cmd); ++ install_element(VRF_NODE, &ipv6_mld_group_watermark_cmd); ++ install_element(CONFIG_NODE, &no_ipv6_mld_group_watermark_cmd); ++ install_element(VRF_NODE, &no_ipv6_mld_group_watermark_cmd); ++ + install_element(INTERFACE_NODE, &interface_ipv6_pim_cmd); + install_element(INTERFACE_NODE, &interface_no_ipv6_pim_cmd); + install_element(INTERFACE_NODE, &interface_ipv6_pim_drprio_cmd); +@@ -1764,10 +2656,8 @@ void pim_cmd_init(void) + install_element(INTERFACE_NODE, &interface_no_ipv6_pim_ssm_cmd); + install_element(INTERFACE_NODE, &interface_ipv6_pim_sm_cmd); + install_element(INTERFACE_NODE, &interface_no_ipv6_pim_sm_cmd); +- install_element(INTERFACE_NODE, +- &interface_ipv6_pim_boundary_oil_cmd); +- install_element(INTERFACE_NODE, +- &interface_no_ipv6_pim_boundary_oil_cmd); ++ install_element(INTERFACE_NODE, &interface_ipv6_pim_boundary_oil_cmd); ++ install_element(INTERFACE_NODE, &interface_no_ipv6_pim_boundary_oil_cmd); + install_element(INTERFACE_NODE, &interface_ipv6_mroute_cmd); + install_element(INTERFACE_NODE, &interface_no_ipv6_mroute_cmd); + /* Install BSM command */ +@@ -1775,18 +2665,7 @@ void pim_cmd_init(void) + install_element(INTERFACE_NODE, &no_ipv6_pim_bsm_cmd); + install_element(INTERFACE_NODE, &ipv6_pim_ucast_bsm_cmd); + install_element(INTERFACE_NODE, &no_ipv6_pim_ucast_bsm_cmd); +- install_element(CONFIG_NODE, &ipv6_pim_rp_cmd); +- install_element(VRF_NODE, &ipv6_pim_rp_cmd); +- install_element(CONFIG_NODE, &no_ipv6_pim_rp_cmd); +- install_element(VRF_NODE, &no_ipv6_pim_rp_cmd); +- install_element(CONFIG_NODE, &ipv6_pim_rp_prefix_list_cmd); +- install_element(VRF_NODE, &ipv6_pim_rp_prefix_list_cmd); +- install_element(CONFIG_NODE, &no_ipv6_pim_rp_prefix_list_cmd); +- install_element(VRF_NODE, &no_ipv6_pim_rp_prefix_list_cmd); +- install_element(CONFIG_NODE, &ipv6_ssmpingd_cmd); +- install_element(VRF_NODE, &ipv6_ssmpingd_cmd); +- install_element(CONFIG_NODE, &no_ipv6_ssmpingd_cmd); +- install_element(VRF_NODE, &no_ipv6_ssmpingd_cmd); ++ + install_element(INTERFACE_NODE, &interface_ipv6_mld_cmd); + install_element(INTERFACE_NODE, &interface_no_ipv6_mld_cmd); + install_element(INTERFACE_NODE, &interface_ipv6_mld_join_cmd); +@@ -1796,10 +2675,6 @@ void pim_cmd_init(void) + install_element(INTERFACE_NODE, &interface_ipv6_mld_query_interval_cmd); + install_element(INTERFACE_NODE, + &interface_no_ipv6_mld_query_interval_cmd); +- install_element(CONFIG_NODE, &ipv6_mld_group_watermark_cmd); +- install_element(VRF_NODE, &ipv6_mld_group_watermark_cmd); +- install_element(CONFIG_NODE, &no_ipv6_mld_group_watermark_cmd); +- install_element(VRF_NODE, &no_ipv6_mld_group_watermark_cmd); + install_element(INTERFACE_NODE, + &interface_ipv6_mld_query_max_response_time_cmd); + install_element(INTERFACE_NODE, +diff --git a/pimd/pim_addr.h b/pimd/pim_addr.h +index 7b0c3f0350e2..c1416e1dd0f6 100644 +--- a/pimd/pim_addr.h ++++ b/pimd/pim_addr.h +@@ -26,6 +26,7 @@ typedef struct prefix_ipv4 prefix_pim; + #define PIM_MAX_BITLEN IPV4_MAX_BITLEN + #define PIM_AF_NAME "ip" + #define PIM_AF_DBG "pim" ++#define PIM_AF_ROUTER "pim" + #define GM_AF_DBG "igmp" + #define PIM_MROUTE_DBG "mroute" + #define PIMREG "pimreg" +@@ -58,6 +59,7 @@ typedef struct prefix_ipv6 prefix_pim; + #define PIM_MAX_BITLEN IPV6_MAX_BITLEN + #define PIM_AF_NAME "ipv6" + #define PIM_AF_DBG "pimv6" ++#define PIM_AF_ROUTER "pim6" + #define GM_AF_DBG "mld" + #define PIM_MROUTE_DBG "mroute6" + #define PIMREG "pim6reg" +diff --git a/pimd/pim_cmd.c b/pimd/pim_cmd.c +index a2d756a96a20..2b8d3e56e521 100644 +--- a/pimd/pim_cmd.c ++++ b/pimd/pim_cmd.c +@@ -1457,19 +1457,13 @@ static void clear_interfaces(struct pim_instance *pim) + static void pim_cli_legacy_mesh_group_behavior(struct vty *vty, + const char *gname) + { +- const char *vrfname; + char xpath_value[XPATH_MAXLEN]; + char xpath_member_value[XPATH_MAXLEN]; + const struct lyd_node *member_dnode; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return; +- + /* Get mesh group base XPath. */ + snprintf(xpath_value, sizeof(xpath_value), +- FRR_PIM_VRF_XPATH "/msdp-mesh-groups[name='%s']", +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4", gname); ++ "%s/msdp-mesh-groups[name='%s']", VTY_CURR_XPATH, gname); + /* Group must exists, otherwise just quit. */ + if (!yang_dnode_exists(vty->candidate_config->dnode, xpath_value)) + return; +@@ -1477,8 +1471,7 @@ static void pim_cli_legacy_mesh_group_behavior(struct vty *vty, + /* Group members check: */ + strlcpy(xpath_member_value, xpath_value, sizeof(xpath_member_value)); + strlcat(xpath_member_value, "/members", sizeof(xpath_member_value)); +- if (yang_dnode_exists(vty->candidate_config->dnode, +- xpath_member_value)) { ++ if (yang_dnode_exists(vty->candidate_config->dnode, xpath_member_value)) { + member_dnode = yang_dnode_get(vty->candidate_config->dnode, + xpath_member_value); + if (!member_dnode || !yang_is_last_list_dnode(member_dnode)) +@@ -2989,22 +2982,108 @@ DEFUN (show_ip_ssmpingd, + return CMD_SUCCESS; + } + +-DEFUN (ip_pim_spt_switchover_infinity, +- ip_pim_spt_switchover_infinity_cmd, +- "ip pim spt-switchover infinity-and-beyond", +- IP_STR +- PIM_STR ++DEFPY_NOSH (router_pim, ++ router_pim_cmd, ++ "router pim [vrf NAME]", ++ "Enable a routing process\n" ++ "Start PIM configuration\n" ++ VRF_CMD_HELP_STR) ++{ ++ char xpath[XPATH_MAXLEN]; ++ const char *vrf_name; ++ ++ if (vrf) ++ vrf_name = vrf; ++ else ++ vrf_name = VRF_DEFAULT_NAME; ++ ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", ++ vrf_name, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) != CMD_SUCCESS) ++ return CMD_WARNING_CONFIG_FAILED; ++ ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ return CMD_SUCCESS; ++} ++ ++DEFPY (no_router_pim, ++ no_router_pim_cmd, ++ "no router pim [vrf NAME]", ++ NO_STR ++ "Enable a routing process\n" ++ "Start PIM configuration\n" ++ VRF_CMD_HELP_STR) ++{ ++ char xpath[XPATH_MAXLEN]; ++ const char *vrf_name; ++ ++ if (vrf) ++ vrf_name = vrf; ++ else ++ vrf_name = VRF_DEFAULT_NAME; ++ ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", ++ vrf_name, FRR_PIM_AF_XPATH_VAL); ++ ++ nb_cli_enqueue_change(vty, xpath, NB_OP_DESTROY, NULL); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++ ++ ++DEFPY (pim_spt_switchover_infinity, ++ pim_spt_switchover_infinity_cmd, ++ "spt-switchover infinity-and-beyond", + "SPT-Switchover\n" + "Never switch to SPT Tree\n") + { + return pim_process_spt_switchover_infinity_cmd(vty); + } ++DEFPY_ATTR(ip_pim_spt_switchover_infinity, ++ ip_pim_spt_switchover_infinity_cmd, ++ "ip pim spt-switchover infinity-and-beyond", ++ IP_STR ++ PIM_STR ++ "SPT-Switchover\n" ++ "Never switch to SPT Tree\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_spt_switchover_infinity_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (ip_pim_spt_switchover_infinity_plist, +- ip_pim_spt_switchover_infinity_plist_cmd, +- "ip pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST4_NAME$plist", +- IP_STR +- PIM_STR ++DEFPY (pim_spt_switchover_infinity_plist, ++ pim_spt_switchover_infinity_plist_cmd, ++ "spt-switchover infinity-and-beyond prefix-list PREFIXLIST4_NAME$plist", + "SPT-Switchover\n" + "Never switch to SPT Tree\n" + "Prefix-List to control which groups to switch\n" +@@ -3012,25 +3091,104 @@ DEFPY (ip_pim_spt_switchover_infinity_plist, + { + return pim_process_spt_switchover_prefixlist_cmd(vty, plist); + } ++DEFPY_ATTR(ip_pim_spt_switchover_infinity_plist, ++ ip_pim_spt_switchover_infinity_plist_cmd, ++ "ip pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST4_NAME$plist", ++ IP_STR ++ PIM_STR ++ "SPT-Switchover\n" ++ "Never switch to SPT Tree\n" ++ "Prefix-List to control which groups to switch\n" ++ "Prefix-List name\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_spt_switchover_prefixlist_cmd(vty, plist); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFUN (no_ip_pim_spt_switchover_infinity, +- no_ip_pim_spt_switchover_infinity_cmd, +- "no ip pim spt-switchover infinity-and-beyond", ++DEFPY (no_pim_spt_switchover_infinity, ++ no_pim_spt_switchover_infinity_cmd, ++ "no spt-switchover infinity-and-beyond", + NO_STR +- IP_STR +- PIM_STR + "SPT_Switchover\n" + "Never switch to SPT Tree\n") + { + return pim_process_no_spt_switchover_cmd(vty); + } ++DEFPY_ATTR(no_ip_pim_spt_switchover_infinity, ++ no_ip_pim_spt_switchover_infinity_cmd, ++ "no ip pim spt-switchover infinity-and-beyond", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "SPT_Switchover\n" ++ "Never switch to SPT Tree\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_spt_switchover_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFUN (no_ip_pim_spt_switchover_infinity_plist, +- no_ip_pim_spt_switchover_infinity_plist_cmd, +- "no ip pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST4_NAME", ++DEFPY (no_pim_spt_switchover_infinity_plist, ++ no_pim_spt_switchover_infinity_plist_cmd, ++ "no spt-switchover infinity-and-beyond prefix-list PREFIXLIST4_NAME", + NO_STR +- IP_STR +- PIM_STR + "SPT_Switchover\n" + "Never switch to SPT Tree\n" + "Prefix-List to control which groups to switch\n" +@@ -3038,28 +3196,61 @@ DEFUN (no_ip_pim_spt_switchover_infinity_plist, + { + return pim_process_no_spt_switchover_cmd(vty); + } ++DEFPY_ATTR(no_ip_pim_spt_switchover_infinity_plist, ++ no_ip_pim_spt_switchover_infinity_plist_cmd, ++ "no ip pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST4_NAME", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "SPT_Switchover\n" ++ "Never switch to SPT Tree\n" ++ "Prefix-List to control which groups to switch\n" ++ "Prefix-List name\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_spt_switchover_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + + DEFPY (pim_register_accept_list, + pim_register_accept_list_cmd, +- "[no] ip pim register-accept-list PREFIXLIST4_NAME$word", ++ "[no] register-accept-list PREFIXLIST4_NAME$word", + NO_STR +- IP_STR +- PIM_STR + "Only accept registers from a specific source prefix list\n" + "Prefix-List name\n") + { +- const char *vrfname; + char reg_alist_xpath[XPATH_MAXLEN]; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- + snprintf(reg_alist_xpath, sizeof(reg_alist_xpath), +- FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname, +- "frr-routing:ipv4"); +- strlcat(reg_alist_xpath, "/register-accept-list", +- sizeof(reg_alist_xpath)); ++ "./register-accept-list"); + + if (no) + nb_cli_enqueue_change(vty, reg_alist_xpath, +@@ -3070,123 +3261,560 @@ DEFPY (pim_register_accept_list, + + return nb_cli_apply_changes(vty, NULL); + } ++DEFPY_ATTR(ip_pim_register_accept_list, ++ ip_pim_register_accept_list_cmd, ++ "[no] ip pim register-accept-list PREFIXLIST4_NAME$word", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "Only accept registers from a specific source prefix list\n" ++ "Prefix-List name\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char reg_alist_xpath[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; + +-DEFPY (ip_pim_joinprune_time, +- ip_pim_joinprune_time_cmd, +- "ip pim join-prune-interval (1-65535)$jpi", +- IP_STR +- "pim multicast routing\n" ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ snprintf(reg_alist_xpath, sizeof(reg_alist_xpath), ++ "./register-accept-list"); ++ ++ if (no) ++ nb_cli_enqueue_change(vty, reg_alist_xpath, NB_OP_DESTROY, NULL); ++ else ++ nb_cli_enqueue_change(vty, reg_alist_xpath, NB_OP_MODIFY, word); ++ ++ ret = nb_cli_apply_changes(vty, NULL); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY (pim_joinprune_time, ++ pim_joinprune_time_cmd, ++ "join-prune-interval (1-65535)$jpi", + "Join Prune Send Interval\n" + "Seconds\n") + { + return pim_process_join_prune_cmd(vty, jpi_str); + } ++DEFPY_ATTR(ip_pim_joinprune_time, ++ ip_pim_joinprune_time_cmd, ++ "ip pim join-prune-interval (1-65535)$jpi", ++ IP_STR ++ PIM_STR ++ "Join Prune Send Interval\n" ++ "Seconds\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_join_prune_cmd(vty, jpi_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFUN (no_ip_pim_joinprune_time, +- no_ip_pim_joinprune_time_cmd, +- "no ip pim join-prune-interval [(1-65535)]", ++DEFPY (no_pim_joinprune_time, ++ no_pim_joinprune_time_cmd, ++ "no join-prune-interval [(1-65535)]", + NO_STR +- IP_STR +- "pim multicast routing\n" + "Join Prune Send Interval\n" + IGNORED_IN_NO_STR) + { + return pim_process_no_join_prune_cmd(vty); + } ++DEFPY_ATTR(no_ip_pim_joinprune_time, ++ no_ip_pim_joinprune_time_cmd, ++ "no ip pim join-prune-interval [(1-65535)]", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "Join Prune Send Interval\n" ++ IGNORED_IN_NO_STR, ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; + +-DEFPY (ip_pim_register_suppress, +- ip_pim_register_suppress_cmd, +- "ip pim register-suppress-time (1-65535)$rst", +- IP_STR +- "pim multicast routing\n" ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_join_prune_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY (pim_register_suppress, ++ pim_register_suppress_cmd, ++ "register-suppress-time (1-65535)$rst", + "Register Suppress Timer\n" + "Seconds\n") + { + return pim_process_register_suppress_cmd(vty, rst_str); + } ++DEFPY_ATTR(ip_pim_register_suppress, ++ ip_pim_register_suppress_cmd, ++ "ip pim register-suppress-time (1-65535)$rst", ++ IP_STR ++ PIM_STR ++ "Register Suppress Timer\n" ++ "Seconds\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_register_suppress_cmd(vty, rst_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFUN (no_ip_pim_register_suppress, +- no_ip_pim_register_suppress_cmd, +- "no ip pim register-suppress-time [(1-65535)]", ++DEFPY (no_pim_register_suppress, ++ no_pim_register_suppress_cmd, ++ "no register-suppress-time [(1-65535)]", + NO_STR +- IP_STR +- "pim multicast routing\n" + "Register Suppress Timer\n" + IGNORED_IN_NO_STR) + { + return pim_process_no_register_suppress_cmd(vty); + } ++DEFPY_ATTR(no_ip_pim_register_suppress, ++ no_ip_pim_register_suppress_cmd, ++ "no ip pim register-suppress-time [(1-65535)]", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "Register Suppress Timer\n" ++ IGNORED_IN_NO_STR, ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_register_suppress_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (ip_pim_rp_keep_alive, +- ip_pim_rp_keep_alive_cmd, +- "ip pim rp keep-alive-timer (1-65535)$kat", +- IP_STR +- "pim multicast routing\n" ++DEFPY (pim_rp_keep_alive, ++ pim_rp_keep_alive_cmd, ++ "rp keep-alive-timer (1-65535)$kat", + "Rendezvous Point\n" + "Keep alive Timer\n" + "Seconds\n") + { + return pim_process_rp_kat_cmd(vty, kat_str); + } ++DEFPY_ATTR(ip_pim_rp_keep_alive, ++ ip_pim_rp_keep_alive_cmd, ++ "ip pim rp keep-alive-timer (1-65535)$kat", ++ IP_STR ++ PIM_STR ++ "Rendezvous Point\n" ++ "Keep alive Timer\n" ++ "Seconds\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_rp_kat_cmd(vty, kat_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFUN (no_ip_pim_rp_keep_alive, +- no_ip_pim_rp_keep_alive_cmd, +- "no ip pim rp keep-alive-timer [(1-65535)]", ++DEFPY (no_pim_rp_keep_alive, ++ no_pim_rp_keep_alive_cmd, ++ "no rp keep-alive-timer [(1-65535)]", + NO_STR +- IP_STR +- "pim multicast routing\n" + "Rendezvous Point\n" + "Keep alive Timer\n" + IGNORED_IN_NO_STR) + { + return pim_process_no_rp_kat_cmd(vty); + } ++DEFPY_ATTR(no_ip_pim_rp_keep_alive, ++ no_ip_pim_rp_keep_alive_cmd, ++ "no ip pim rp keep-alive-timer [(1-65535)]", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "Rendezvous Point\n" ++ "Keep alive Timer\n" ++ IGNORED_IN_NO_STR, ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; + +-DEFPY (ip_pim_keep_alive, +- ip_pim_keep_alive_cmd, +- "ip pim keep-alive-timer (1-65535)$kat", +- IP_STR +- "pim multicast routing\n" ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_rp_kat_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY (pim_keep_alive, ++ pim_keep_alive_cmd, ++ "keep-alive-timer (1-65535)$kat", + "Keep alive Timer\n" + "Seconds\n") + { + return pim_process_keepalivetimer_cmd(vty, kat_str); + } +- +-DEFUN (no_ip_pim_keep_alive, +- no_ip_pim_keep_alive_cmd, +- "no ip pim keep-alive-timer [(1-65535)]", +- NO_STR +- IP_STR +- "pim multicast routing\n" +- "Keep alive Timer\n" +- IGNORED_IN_NO_STR) ++DEFPY_ATTR(ip_pim_keep_alive, ++ ip_pim_keep_alive_cmd, ++ "ip pim keep-alive-timer (1-65535)$kat", ++ IP_STR ++ PIM_STR ++ "Keep alive Timer\n" ++ "Seconds\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) + { +- return pim_process_no_keepalivetimer_cmd(vty); +-} ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; + +-DEFPY (ip_pim_packets, +- ip_pim_packets_cmd, +- "ip pim packets (1-255)", +- IP_STR +- "pim multicast routing\n" +- "packets to process at one time per fd\n" +- "Number of packets\n") ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_keepalivetimer_cmd(vty, kat_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY (no_pim_keep_alive, ++ no_pim_keep_alive_cmd, ++ "no keep-alive-timer [(1-65535)]", ++ NO_STR ++ "Keep alive Timer\n" ++ IGNORED_IN_NO_STR) ++{ ++ return pim_process_no_keepalivetimer_cmd(vty); ++} ++DEFPY_ATTR(no_ip_pim_keep_alive, ++ no_ip_pim_keep_alive_cmd, ++ "no ip pim keep-alive-timer [(1-65535)]", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "Keep alive Timer\n" ++ IGNORED_IN_NO_STR, ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_keepalivetimer_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY (pim_packets, ++ pim_packets_cmd, ++ "packets (1-255)", ++ "packets to process at one time per fd\n" ++ "Number of packets\n") + { + return pim_process_pim_packet_cmd(vty, packets_str); + } ++DEFPY_ATTR(ip_pim_packets, ++ ip_pim_packets_cmd, ++ "ip pim packets (1-255)", ++ IP_STR ++ PIM_STR ++ "packets to process at one time per fd\n" ++ "Number of packets\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_pim_packet_cmd(vty, packets_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } + +-DEFUN (no_ip_pim_packets, +- no_ip_pim_packets_cmd, +- "no ip pim packets [(1-255)]", ++ return ret; ++} ++ ++DEFPY (no_pim_packets, ++ no_pim_packets_cmd, ++ "no packets [(1-255)]", + NO_STR +- IP_STR +- "pim multicast routing\n" + "packets to process at one time per fd\n" + IGNORED_IN_NO_STR) + { + return pim_process_no_pim_packet_cmd(vty); + } ++DEFPY_ATTR(no_ip_pim_packets, ++ no_ip_pim_packets_cmd, ++ "no ip pim packets [(1-255)]", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "packets to process at one time per fd\n" ++ IGNORED_IN_NO_STR, ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_pim_packet_cmd(vty); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + + DEFPY (ip_igmp_group_watermark, + ip_igmp_group_watermark_cmd, +@@ -3217,64 +3845,131 @@ DEFPY (no_ip_igmp_group_watermark, + return CMD_SUCCESS; + } + +-DEFUN (ip_pim_v6_secondary, +- ip_pim_v6_secondary_cmd, +- "ip pim send-v6-secondary", +- IP_STR +- "pim multicast routing\n" ++DEFPY (pim_v6_secondary, ++ pim_v6_secondary_cmd, ++ "send-v6-secondary", + "Send v6 secondary addresses\n") + { +- const char *vrfname; + char send_v6_secondary_xpath[XPATH_MAXLEN]; + ++ snprintf(send_v6_secondary_xpath, sizeof(send_v6_secondary_xpath), ++ "./send-v6-secondary"); ++ ++ nb_cli_enqueue_change(vty, send_v6_secondary_xpath, NB_OP_MODIFY, ++ "true"); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(ip_pim_v6_secondary, ++ ip_pim_v6_secondary_cmd, ++ "ip pim send-v6-secondary", ++ IP_STR ++ PIM_STR ++ "Send v6 secondary addresses\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char send_v6_secondary_xpath[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + + snprintf(send_v6_secondary_xpath, sizeof(send_v6_secondary_xpath), +- FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4"); +- strlcat(send_v6_secondary_xpath, "/send-v6-secondary", +- sizeof(send_v6_secondary_xpath)); +- ++ "./send-v6-secondary"); + nb_cli_enqueue_change(vty, send_v6_secondary_xpath, NB_OP_MODIFY, + "true"); ++ ret = nb_cli_apply_changes(vty, NULL); + +- return nb_cli_apply_changes(vty, NULL); ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + +-DEFUN (no_ip_pim_v6_secondary, +- no_ip_pim_v6_secondary_cmd, +- "no ip pim send-v6-secondary", ++DEFPY (no_pim_v6_secondary, ++ no_pim_v6_secondary_cmd, ++ "no send-v6-secondary", + NO_STR +- IP_STR +- "pim multicast routing\n" + "Send v6 secondary addresses\n") + { +- const char *vrfname; + char send_v6_secondary_xpath[XPATH_MAXLEN]; + ++ snprintf(send_v6_secondary_xpath, sizeof(send_v6_secondary_xpath), ++ "./send-v6-secondary"); ++ ++ nb_cli_enqueue_change(vty, send_v6_secondary_xpath, NB_OP_MODIFY, ++ "false"); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(no_ip_pim_v6_secondary, ++ no_ip_pim_v6_secondary_cmd, ++ "no ip pim send-v6-secondary", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "Send v6 secondary addresses\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char send_v6_secondary_xpath[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + + snprintf(send_v6_secondary_xpath, sizeof(send_v6_secondary_xpath), +- FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4"); +- strlcat(send_v6_secondary_xpath, "/send-v6-secondary", +- sizeof(send_v6_secondary_xpath)); +- ++ "./send-v6-secondary"); + nb_cli_enqueue_change(vty, send_v6_secondary_xpath, NB_OP_MODIFY, + "false"); ++ ret = nb_cli_apply_changes(vty, NULL); + +- return nb_cli_apply_changes(vty, NULL); ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + +-DEFPY (ip_pim_rp, +- ip_pim_rp_cmd, +- "ip pim rp A.B.C.D$rp [A.B.C.D/M]$gp", +- IP_STR +- "pim multicast routing\n" ++DEFPY (pim_rp, ++ pim_rp_cmd, ++ "rp A.B.C.D$rp [A.B.C.D/M]$gp", + "Rendezvous Point\n" + "ip address of RP\n" + "Group Address range to cover\n") +@@ -3283,12 +3978,52 @@ DEFPY (ip_pim_rp, + + return pim_process_rp_cmd(vty, rp_str, group_str); + } ++DEFPY_ATTR(ip_pim_rp, ++ ip_pim_rp_cmd, ++ "ip pim rp A.B.C.D$rp [A.B.C.D/M]$gp", ++ IP_STR ++ PIM_STR ++ "Rendezvous Point\n" ++ "ip address of RP\n" ++ "Group Address range to cover\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ const char *group_str = (gp_str) ? gp_str : "224.0.0.0/4"; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; + +-DEFPY (ip_pim_rp_prefix_list, +- ip_pim_rp_prefix_list_cmd, +- "ip pim rp A.B.C.D$rp prefix-list PREFIXLIST4_NAME$plist", +- IP_STR +- "pim multicast routing\n" ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_rp_cmd(vty, rp_str, group_str); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY (pim_rp_prefix_list, ++ pim_rp_prefix_list_cmd, ++ "rp A.B.C.D$rp prefix-list PREFIXLIST4_NAME$plist", + "Rendezvous Point\n" + "ip address of RP\n" + "group prefix-list filter\n" +@@ -3296,13 +4031,53 @@ DEFPY (ip_pim_rp_prefix_list, + { + return pim_process_rp_plist_cmd(vty, rp_str, plist); + } ++DEFPY_ATTR(ip_pim_rp_prefix_list, ++ ip_pim_rp_prefix_list_cmd, ++ "ip pim rp A.B.C.D$rp prefix-list PREFIXLIST4_NAME$plist", ++ IP_STR ++ PIM_STR ++ "Rendezvous Point\n" ++ "ip address of RP\n" ++ "group prefix-list filter\n" ++ "Name of a prefix-list\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_rp_plist_cmd(vty, rp_str, plist); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + +-DEFPY (no_ip_pim_rp, +- no_ip_pim_rp_cmd, +- "no ip pim rp A.B.C.D$rp [A.B.C.D/M]$gp", ++DEFPY (no_pim_rp, ++ no_pim_rp_cmd, ++ "no rp A.B.C.D$rp [A.B.C.D/M]$gp", + NO_STR +- IP_STR +- "pim multicast routing\n" + "Rendezvous Point\n" + "ip address of RP\n" + "Group Address range to cover\n") +@@ -3311,13 +4086,54 @@ DEFPY (no_ip_pim_rp, + + return pim_process_no_rp_cmd(vty, rp_str, group_str); + } ++DEFPY_ATTR(no_ip_pim_rp, ++ no_ip_pim_rp_cmd, ++ "no ip pim rp A.B.C.D$rp [A.B.C.D/M]$gp", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "Rendezvous Point\n" ++ "ip address of RP\n" ++ "Group Address range to cover\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ const char *group_str = (gp_str) ? gp_str : "224.0.0.0/4"; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_rp_cmd(vty, rp_str, group_str); + +-DEFPY (no_ip_pim_rp_prefix_list, +- no_ip_pim_rp_prefix_list_cmd, +- "no ip pim rp A.B.C.D$rp prefix-list PREFIXLIST4_NAME$plist", ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY (no_pim_rp_prefix_list, ++ no_pim_rp_prefix_list_cmd, ++ "no rp A.B.C.D$rp prefix-list PREFIXLIST4_NAME$plist", + NO_STR +- IP_STR +- "pim multicast routing\n" + "Rendezvous Point\n" + "ip address of RP\n" + "group prefix-list filter\n" +@@ -3325,104 +4141,264 @@ DEFPY (no_ip_pim_rp_prefix_list, + { + return pim_process_no_rp_plist_cmd(vty, rp_str, plist); + } ++DEFPY_ATTR(no_ip_pim_rp_prefix_list, ++ no_ip_pim_rp_prefix_list_cmd, ++ "no ip pim rp A.B.C.D$rp prefix-list PREFIXLIST4_NAME$plist", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "Rendezvous Point\n" ++ "ip address of RP\n" ++ "group prefix-list filter\n" ++ "Name of a prefix-list\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; + +-DEFUN (ip_pim_ssm_prefix_list, +- ip_pim_ssm_prefix_list_cmd, +- "ip pim ssm prefix-list PREFIXLIST4_NAME", +- IP_STR +- "pim multicast routing\n" ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ ret = pim_process_no_rp_plist_cmd(vty, rp_str, plist); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY (pim_ssm_prefix_list, ++ pim_ssm_prefix_list_cmd, ++ "ssm prefix-list PREFIXLIST4_NAME$plist", + "Source Specific Multicast\n" + "group range prefix-list filter\n" + "Name of a prefix-list\n") + { +- const char *vrfname; + char ssm_plist_xpath[XPATH_MAXLEN]; + ++ snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), "./ssm-prefix-list"); ++ ++ nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_MODIFY, plist); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(ip_pim_ssm_prefix_list, ++ ip_pim_ssm_prefix_list_cmd, ++ "ip pim ssm prefix-list PREFIXLIST4_NAME$plist", ++ IP_STR ++ PIM_STR ++ "Source Specific Multicast\n" ++ "group range prefix-list filter\n" ++ "Name of a prefix-list\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char ssm_plist_xpath[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + +- snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4"); +- strlcat(ssm_plist_xpath, "/ssm-prefix-list", sizeof(ssm_plist_xpath)); ++ snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), "./ssm-prefix-list"); ++ nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_MODIFY, plist); ++ ret = nb_cli_apply_changes(vty, NULL); + +- nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_MODIFY, argv[4]->arg); ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } + +- return nb_cli_apply_changes(vty, NULL); ++ return ret; + } + +-DEFUN (no_ip_pim_ssm_prefix_list, +- no_ip_pim_ssm_prefix_list_cmd, +- "no ip pim ssm prefix-list", ++DEFPY (no_pim_ssm_prefix_list, ++ no_pim_ssm_prefix_list_cmd, ++ "no ssm prefix-list", + NO_STR +- IP_STR +- "pim multicast routing\n" + "Source Specific Multicast\n" + "group range prefix-list filter\n") + { +- const char *vrfname; + char ssm_plist_xpath[XPATH_MAXLEN]; + ++ snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), "./ssm-prefix-list"); ++ ++ nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_DESTROY, NULL); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(no_ip_pim_ssm_prefix_list, ++ no_ip_pim_ssm_prefix_list_cmd, ++ "no ip pim ssm prefix-list", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "Source Specific Multicast\n" ++ "group range prefix-list filter\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char ssm_plist_xpath[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + +- snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), +- FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4"); +- strlcat(ssm_plist_xpath, "/ssm-prefix-list", sizeof(ssm_plist_xpath)); +- ++ snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), "./ssm-prefix-list"); + nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_DESTROY, NULL); ++ ret = nb_cli_apply_changes(vty, NULL); + +- return nb_cli_apply_changes(vty, NULL); ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + +-DEFUN (no_ip_pim_ssm_prefix_list_name, +- no_ip_pim_ssm_prefix_list_name_cmd, +- "no ip pim ssm prefix-list PREFIXLIST4_NAME", ++DEFPY (no_pim_ssm_prefix_list_name, ++ no_pim_ssm_prefix_list_name_cmd, ++ "no ssm prefix-list PREFIXLIST4_NAME$plist", + NO_STR +- IP_STR +- "pim multicast routing\n" + "Source Specific Multicast\n" + "group range prefix-list filter\n" + "Name of a prefix-list\n") + { +- const char *vrfname; + const struct lyd_node *ssm_plist_dnode; + char ssm_plist_xpath[XPATH_MAXLEN]; + const char *ssm_plist_name; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- +- snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), +- FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4"); +- strlcat(ssm_plist_xpath, "/ssm-prefix-list", sizeof(ssm_plist_xpath)); ++ snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), "%s/ssm-prefix-list", ++ VTY_CURR_XPATH); + ssm_plist_dnode = yang_dnode_get(vty->candidate_config->dnode, + ssm_plist_xpath); + + if (!ssm_plist_dnode) { +- vty_out(vty, +- "%% pim ssm prefix-list %s doesn't exist\n", +- argv[5]->arg); ++ vty_out(vty, "%% pim ssm prefix-list %s doesn't exist\n", plist); + return CMD_WARNING_CONFIG_FAILED; + } + + ssm_plist_name = yang_dnode_get_string(ssm_plist_dnode, "."); + +- if (ssm_plist_name && !strcmp(ssm_plist_name, argv[5]->arg)) { +- nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_DESTROY, +- NULL); +- ++ if (ssm_plist_name && !strcmp(ssm_plist_name, plist)) { ++ nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_DESTROY, NULL); + return nb_cli_apply_changes(vty, NULL); + } + +- vty_out(vty, "%% pim ssm prefix-list %s doesn't exist\n", argv[5]->arg); ++ vty_out(vty, "%% pim ssm prefix-list %s doesn't exist\n", plist); + + return CMD_WARNING_CONFIG_FAILED; + } ++DEFPY_ATTR(no_ip_pim_ssm_prefix_list_name, ++ no_ip_pim_ssm_prefix_list_name_cmd, ++ "no ip pim ssm prefix-list PREFIXLIST4_NAME$plist", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "Source Specific Multicast\n" ++ "group range prefix-list filter\n" ++ "Name of a prefix-list\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ const struct lyd_node *ssm_plist_dnode; ++ char ssm_plist_xpath[XPATH_MAXLEN]; ++ const char *ssm_plist_name; ++ int ret = CMD_WARNING_CONFIG_FAILED; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), "%s/ssm-prefix-list", ++ VTY_CURR_XPATH); ++ ssm_plist_dnode = yang_dnode_get(vty->candidate_config->dnode, ++ ssm_plist_xpath); ++ if (ssm_plist_dnode) { ++ ssm_plist_name = yang_dnode_get_string(ssm_plist_dnode, "."); ++ if (ssm_plist_name && !strcmp(ssm_plist_name, plist)) { ++ nb_cli_enqueue_change(vty, ssm_plist_xpath, ++ NB_OP_DESTROY, NULL); ++ ret = nb_cli_apply_changes(vty, NULL); ++ } else { ++ vty_out(vty, "%% pim ssm prefix-list %s doesn't exist\n", ++ plist); ++ } ++ } else { ++ vty_out(vty, "%% pim ssm prefix-list %s doesn't exist\n", plist); ++ } ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + + DEFUN (show_ip_pim_ssm_range, + show_ip_pim_ssm_range_cmd, +@@ -3511,135 +4487,354 @@ DEFPY (show_ip_pim_bsr, + return pim_show_bsr_helper(vrf, vty, !!json); + } + +-DEFUN (ip_ssmpingd, +- ip_ssmpingd_cmd, +- "ip ssmpingd [A.B.C.D]", +- IP_STR ++DEFPY (pim_ssmpingd, ++ pim_ssmpingd_cmd, ++ "ssmpingd [A.B.C.D]$src", + CONF_SSMPINGD_STR + "Source address\n") + { +- int idx_ipv4 = 2; +- const char *src_str = (argc == 3) ? argv[idx_ipv4]->arg : "0.0.0.0"; ++ if (src_str) ++ return pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, src_str); ++ else ++ return pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, "0.0.0.0"); ++} ++DEFPY_ATTR(ip_pim_ssmpingd, ++ ip_ssmpingd_cmd, ++ "ip ssmpingd [A.B.C.D]$src", ++ IP_STR ++ CONF_SSMPINGD_STR ++ "Source address\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; + +- return pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, src_str); ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ if (src_str) ++ ret = pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, src_str); ++ else ++ ret = pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, "0.0.0.0"); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + +-DEFUN (no_ip_ssmpingd, +- no_ip_ssmpingd_cmd, +- "no ip ssmpingd [A.B.C.D]", ++DEFPY (no_pim_ssmpingd, ++ no_pim_ssmpingd_cmd, ++ "no ssmpingd [A.B.C.D]$src", + NO_STR +- IP_STR + CONF_SSMPINGD_STR + "Source address\n") + { +- int idx_ipv4 = 3; +- const char *src_str = (argc == 4) ? argv[idx_ipv4]->arg : "0.0.0.0"; ++ if (src_str) ++ return pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, src_str); ++ else ++ return pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, "0.0.0.0"); ++} ++DEFPY_ATTR(no_ip_pim_ssmpingd, ++ no_ip_ssmpingd_cmd, ++ "no ip ssmpingd [A.B.C.D]$src", ++ NO_STR ++ IP_STR ++ CONF_SSMPINGD_STR ++ "Source address\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ if (src_str) ++ ret = pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, src_str); ++ else ++ ret = pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, "0.0.0.0"); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } + +- return pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, src_str); ++ return ret; + } + +-DEFUN (ip_pim_ecmp, +- ip_pim_ecmp_cmd, +- "ip pim ecmp", +- IP_STR +- "pim multicast routing\n" ++DEFPY (pim_ecmp, ++ pim_ecmp_cmd, ++ "ecmp", + "Enable PIM ECMP \n") + { +- const char *vrfname; + char ecmp_xpath[XPATH_MAXLEN]; + ++ snprintf(ecmp_xpath, sizeof(ecmp_xpath), "./ecmp"); ++ nb_cli_enqueue_change(vty, ecmp_xpath, NB_OP_MODIFY, "true"); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(ip_pim_ecmp, ++ ip_pim_ecmp_cmd, ++ "ip pim ecmp", ++ IP_STR ++ PIM_STR ++ "Enable PIM ECMP \n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char ecmp_xpath[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + +- snprintf(ecmp_xpath, sizeof(ecmp_xpath), FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4"); +- strlcat(ecmp_xpath, "/ecmp", sizeof(ecmp_xpath)); +- ++ snprintf(ecmp_xpath, sizeof(ecmp_xpath), "./ecmp"); + nb_cli_enqueue_change(vty, ecmp_xpath, NB_OP_MODIFY, "true"); +- return nb_cli_apply_changes(vty, NULL); ++ ret = nb_cli_apply_changes(vty, NULL); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + +-DEFUN (no_ip_pim_ecmp, +- no_ip_pim_ecmp_cmd, +- "no ip pim ecmp", ++DEFPY (no_pim_ecmp, ++ no_pim_ecmp_cmd, ++ "no ecmp", + NO_STR +- IP_STR +- "pim multicast routing\n" + "Disable PIM ECMP \n") + { +- const char *vrfname; + char ecmp_xpath[XPATH_MAXLEN]; + ++ snprintf(ecmp_xpath, sizeof(ecmp_xpath), "./ecmp"); ++ nb_cli_enqueue_change(vty, ecmp_xpath, NB_OP_MODIFY, "false"); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(no_ip_pim_ecmp, ++ no_ip_pim_ecmp_cmd, ++ "no ip pim ecmp", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "Disable PIM ECMP \n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char ecmp_xpath[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + +- snprintf(ecmp_xpath, sizeof(ecmp_xpath), FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4"); +- strlcat(ecmp_xpath, "/ecmp", sizeof(ecmp_xpath)); +- ++ snprintf(ecmp_xpath, sizeof(ecmp_xpath), "./ecmp"); + nb_cli_enqueue_change(vty, ecmp_xpath, NB_OP_MODIFY, "false"); ++ ret = nb_cli_apply_changes(vty, NULL); + +- return nb_cli_apply_changes(vty, NULL); ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + +-DEFUN (ip_pim_ecmp_rebalance, +- ip_pim_ecmp_rebalance_cmd, +- "ip pim ecmp rebalance", +- IP_STR +- "pim multicast routing\n" ++DEFPY (pim_ecmp_rebalance, ++ pim_ecmp_rebalance_cmd, ++ "ecmp rebalance", + "Enable PIM ECMP \n" + "Enable PIM ECMP Rebalance\n") + { +- const char *vrfname; + char ecmp_xpath[XPATH_MAXLEN]; + char ecmp_rebalance_xpath[XPATH_MAXLEN]; + ++ snprintf(ecmp_xpath, sizeof(ecmp_xpath), "./ecmp"); ++ snprintf(ecmp_rebalance_xpath, sizeof(ecmp_rebalance_xpath), ++ "./ecmp-rebalance"); ++ ++ nb_cli_enqueue_change(vty, ecmp_xpath, NB_OP_MODIFY, "true"); ++ nb_cli_enqueue_change(vty, ecmp_rebalance_xpath, NB_OP_MODIFY, "true"); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(ip_pim_ecmp_rebalance, ++ ip_pim_ecmp_rebalance_cmd, ++ "ip pim ecmp rebalance", ++ IP_STR ++ PIM_STR ++ "Enable PIM ECMP \n" ++ "Enable PIM ECMP Rebalance\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char ecmp_xpath[XPATH_MAXLEN]; ++ char ecmp_rebalance_xpath[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + +- snprintf(ecmp_xpath, sizeof(ecmp_xpath), FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4"); +- strlcat(ecmp_xpath, "/ecmp", sizeof(ecmp_xpath)); ++ snprintf(ecmp_xpath, sizeof(ecmp_xpath), "./ecmp"); + snprintf(ecmp_rebalance_xpath, sizeof(ecmp_rebalance_xpath), +- FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4"); +- strlcat(ecmp_rebalance_xpath, "/ecmp-rebalance", +- sizeof(ecmp_rebalance_xpath)); +- ++ "./ecmp-rebalance"); + nb_cli_enqueue_change(vty, ecmp_xpath, NB_OP_MODIFY, "true"); + nb_cli_enqueue_change(vty, ecmp_rebalance_xpath, NB_OP_MODIFY, "true"); ++ ret = nb_cli_apply_changes(vty, NULL); + +- return nb_cli_apply_changes(vty, NULL); ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + +-DEFUN (no_ip_pim_ecmp_rebalance, +- no_ip_pim_ecmp_rebalance_cmd, +- "no ip pim ecmp rebalance", ++DEFPY (no_pim_ecmp_rebalance, ++ no_pim_ecmp_rebalance_cmd, ++ "no ecmp rebalance", + NO_STR +- IP_STR +- "pim multicast routing\n" + "Disable PIM ECMP \n" + "Disable PIM ECMP Rebalance\n") + { +- const char *vrfname; + char ecmp_rebalance_xpath[XPATH_MAXLEN]; + ++ snprintf(ecmp_rebalance_xpath, sizeof(ecmp_rebalance_xpath), ++ "./ecmp-rebalance"); ++ ++ nb_cli_enqueue_change(vty, ecmp_rebalance_xpath, NB_OP_MODIFY, "false"); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(no_ip_pim_ecmp_rebalance, ++ no_ip_pim_ecmp_rebalance_cmd, ++ "no ip pim ecmp rebalance", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "Disable PIM ECMP \n" ++ "Disable PIM ECMP Rebalance\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char ecmp_rebalance_xpath[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + + snprintf(ecmp_rebalance_xpath, sizeof(ecmp_rebalance_xpath), +- FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4"); +- strlcat(ecmp_rebalance_xpath, "/ecmp-rebalance", +- sizeof(ecmp_rebalance_xpath)); +- ++ "./ecmp-rebalance"); + nb_cli_enqueue_change(vty, ecmp_rebalance_xpath, NB_OP_MODIFY, "false"); ++ ret = nb_cli_apply_changes(vty, NULL); + +- return nb_cli_apply_changes(vty, NULL); ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + + DEFUN (interface_ip_igmp, +@@ -4648,15 +5843,24 @@ DEFPY (debug_pim_zebra, + return CMD_SUCCESS; + } + +-DEFUN(debug_pim_mlag, debug_pim_mlag_cmd, "debug pim mlag", +- DEBUG_STR DEBUG_PIM_STR DEBUG_PIM_MLAG_STR) ++DEFUN(debug_pim_mlag, ++ debug_pim_mlag_cmd, ++ "debug pim mlag", ++ DEBUG_STR ++ DEBUG_PIM_STR ++ DEBUG_PIM_MLAG_STR) + { + PIM_DO_DEBUG_MLAG; + return CMD_SUCCESS; + } + +-DEFUN(no_debug_pim_mlag, no_debug_pim_mlag_cmd, "no debug pim mlag", +- NO_STR DEBUG_STR DEBUG_PIM_STR DEBUG_PIM_MLAG_STR) ++DEFUN(no_debug_pim_mlag, ++ no_debug_pim_mlag_cmd, ++ "no debug pim mlag", ++ NO_STR ++ DEBUG_STR ++ DEBUG_PIM_STR ++ DEBUG_PIM_MLAG_STR) + { + PIM_DONT_DEBUG_MLAG; + return CMD_SUCCESS; +@@ -5016,145 +6220,333 @@ ALIAS(no_ip_pim_bfd, no_ip_pim_bfd_param_cmd, + "Desired min transmit interval\n") + #endif /* !HAVE_BFDD */ + +-DEFPY(ip_msdp_peer, ip_msdp_peer_cmd, +- "ip msdp peer A.B.C.D$peer source A.B.C.D$source", +- IP_STR ++DEFPY(pim_msdp_peer, pim_msdp_peer_cmd, ++ "msdp peer A.B.C.D$peer source A.B.C.D$source", + CFG_MSDP_STR + "Configure MSDP peer\n" + "Peer IP address\n" + "Source address for TCP connection\n" + "Local IP address\n") + { +- const char *vrfname; +- char temp_xpath[XPATH_MAXLEN]; + char msdp_peer_source_xpath[XPATH_MAXLEN]; + ++ snprintf(msdp_peer_source_xpath, sizeof(msdp_peer_source_xpath), ++ "./msdp-peer[peer-ip='%s']/source-ip", peer_str); ++ nb_cli_enqueue_change(vty, msdp_peer_source_xpath, NB_OP_MODIFY, ++ source_str); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(ip_pim_msdp_peer, ++ ip_msdp_peer_cmd, ++ "ip msdp peer A.B.C.D$peer source A.B.C.D$source", ++ IP_STR ++ CFG_MSDP_STR ++ "Configure MSDP peer\n" ++ "Peer IP address\n" ++ "Source address for TCP connection\n" ++ "Local IP address\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char msdp_peer_source_xpath[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + + snprintf(msdp_peer_source_xpath, sizeof(msdp_peer_source_xpath), +- FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname, +- "frr-routing:ipv4"); +- snprintf(temp_xpath, sizeof(temp_xpath), +- "/msdp-peer[peer-ip='%s']/source-ip", peer_str); +- strlcat(msdp_peer_source_xpath, temp_xpath, +- sizeof(msdp_peer_source_xpath)); +- ++ "./msdp-peer[peer-ip='%s']/source-ip", peer_str); + nb_cli_enqueue_change(vty, msdp_peer_source_xpath, NB_OP_MODIFY, + source_str); ++ ret = nb_cli_apply_changes(vty, NULL); + +- return nb_cli_apply_changes(vty, +- FRR_PIM_INTERFACE_XPATH, "frr-routing:ipv4"); ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + +-DEFPY(ip_msdp_timers, ip_msdp_timers_cmd, +- "ip msdp timers (1-65535)$keepalive (1-65535)$holdtime [(1-65535)$connretry]", +- IP_STR ++DEFPY(pim_msdp_timers, pim_msdp_timers_cmd, ++ "msdp timers (1-65535)$keepalive (1-65535)$holdtime [(1-65535)$connretry]", + CFG_MSDP_STR + "MSDP timers configuration\n" + "Keep alive period (in seconds)\n" + "Hold time period (in seconds)\n" + "Connection retry period (in seconds)\n") + { ++ nb_cli_enqueue_change(vty, "./msdp/hold-time", NB_OP_MODIFY, ++ holdtime_str); ++ nb_cli_enqueue_change(vty, "./msdp/keep-alive", NB_OP_MODIFY, ++ keepalive_str); ++ if (connretry_str) ++ nb_cli_enqueue_change(vty, "./msdp/connection-retry", ++ NB_OP_MODIFY, connretry_str); ++ else ++ nb_cli_enqueue_change(vty, "./msdp/connection-retry", ++ NB_OP_DESTROY, NULL); ++ ++ nb_cli_apply_changes(vty, NULL); ++ return CMD_SUCCESS; ++} ++DEFPY_ATTR(ip_pim_msdp_timers, ++ ip_msdp_timers_cmd, ++ "ip msdp timers (1-65535)$keepalive (1-65535)$holdtime [(1-65535)$connretry]", ++ IP_STR ++ CFG_MSDP_STR ++ "MSDP timers configuration\n" ++ "Keep alive period (in seconds)\n" ++ "Hold time period (in seconds)\n" ++ "Connection retry period (in seconds)\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; + const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; + + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + +- nb_cli_enqueue_change(vty, "./hold-time", NB_OP_MODIFY, holdtime_str); +- nb_cli_enqueue_change(vty, "./keep-alive", NB_OP_MODIFY, keepalive_str); ++ nb_cli_enqueue_change(vty, "./msdp/hold-time", NB_OP_MODIFY, ++ holdtime_str); ++ nb_cli_enqueue_change(vty, "./msdp/keep-alive", NB_OP_MODIFY, ++ keepalive_str); + if (connretry_str) +- nb_cli_enqueue_change(vty, "./connection-retry", NB_OP_MODIFY, +- connretry_str); ++ nb_cli_enqueue_change(vty, "./msdp/connection-retry", ++ NB_OP_MODIFY, connretry_str); + else +- nb_cli_enqueue_change(vty, "./connection-retry", NB_OP_DESTROY, +- NULL); ++ nb_cli_enqueue_change(vty, "./msdp/connection-retry", ++ NB_OP_DESTROY, NULL); ++ ret = nb_cli_apply_changes(vty, NULL); + +- nb_cli_apply_changes(vty, FRR_PIM_MSDP_XPATH, "frr-pim:pimd", "pim", +- vrfname, "frr-routing:ipv4"); +- return CMD_SUCCESS; ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + +-DEFPY(no_ip_msdp_timers, no_ip_msdp_timers_cmd, +- "no ip msdp timers [(1-65535) (1-65535) [(1-65535)]]", ++DEFPY(no_pim_msdp_timers, no_pim_msdp_timers_cmd, ++ "no msdp timers [(1-65535) (1-65535) [(1-65535)]]", + NO_STR +- IP_STR + CFG_MSDP_STR + "MSDP timers configuration\n" + IGNORED_IN_NO_STR + IGNORED_IN_NO_STR + IGNORED_IN_NO_STR) + { ++ nb_cli_enqueue_change(vty, "./msdp/hold-time", NB_OP_DESTROY, NULL); ++ nb_cli_enqueue_change(vty, "./msdp/keep-alive", NB_OP_DESTROY, NULL); ++ nb_cli_enqueue_change(vty, "./msdp/connection-retry", NB_OP_DESTROY, ++ NULL); ++ nb_cli_apply_changes(vty, NULL); ++ return CMD_SUCCESS; ++} ++DEFPY_ATTR(no_ip_pim_msdp_timers, ++ no_ip_msdp_timers_cmd, ++ "no ip msdp timers [(1-65535) (1-65535) [(1-65535)]]", ++ NO_STR ++ IP_STR ++ CFG_MSDP_STR ++ "MSDP timers configuration\n" ++ IGNORED_IN_NO_STR ++ IGNORED_IN_NO_STR ++ IGNORED_IN_NO_STR, ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ int ret; + const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; + + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + +- nb_cli_enqueue_change(vty, "./hold-time", NB_OP_DESTROY, NULL); +- nb_cli_enqueue_change(vty, "./keep-alive", NB_OP_DESTROY, NULL); +- nb_cli_enqueue_change(vty, "./connection-retry", NB_OP_DESTROY, NULL); ++ nb_cli_enqueue_change(vty, "./msdp/hold-time", NB_OP_DESTROY, NULL); ++ nb_cli_enqueue_change(vty, "./msdp/keep-alive", NB_OP_DESTROY, NULL); ++ nb_cli_enqueue_change(vty, "./msdp/connection-retry", NB_OP_DESTROY, ++ NULL); ++ ret = nb_cli_apply_changes(vty, NULL); + +- nb_cli_apply_changes(vty, FRR_PIM_MSDP_XPATH, "frr-pim:pimd", "pim", +- vrfname, "frr-routing:ipv4"); ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } + +- return CMD_SUCCESS; ++ return ret; + } + +-DEFUN (no_ip_msdp_peer, +- no_ip_msdp_peer_cmd, +- "no ip msdp peer A.B.C.D", ++DEFPY (no_pim_msdp_peer, ++ no_pim_msdp_peer_cmd, ++ "no msdp peer A.B.C.D", + NO_STR +- IP_STR + CFG_MSDP_STR + "Delete MSDP peer\n" + "peer ip address\n") + { +- const char *vrfname; + char msdp_peer_xpath[XPATH_MAXLEN]; +- char temp_xpath[XPATH_MAXLEN]; ++ ++ snprintf(msdp_peer_xpath, sizeof(msdp_peer_xpath), ++ "./msdp-peer[peer-ip='%s']", peer_str); ++ nb_cli_enqueue_change(vty, msdp_peer_xpath, NB_OP_DESTROY, NULL); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(no_ip_pim_msdp_peer, ++ no_ip_msdp_peer_cmd, ++ "no ip msdp peer A.B.C.D", ++ NO_STR ++ IP_STR ++ CFG_MSDP_STR ++ "Delete MSDP peer\n" ++ "peer ip address\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char msdp_peer_xpath[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; + + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + + snprintf(msdp_peer_xpath, sizeof(msdp_peer_xpath), +- FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4"); +- snprintf(temp_xpath, sizeof(temp_xpath), +- "/msdp-peer[peer-ip='%s']", +- argv[4]->arg); +- +- strlcat(msdp_peer_xpath, temp_xpath, sizeof(msdp_peer_xpath)); +- ++ "./msdp-peer[peer-ip='%s']", peer_str); + nb_cli_enqueue_change(vty, msdp_peer_xpath, NB_OP_DESTROY, NULL); ++ ret = nb_cli_apply_changes(vty, NULL); + +- return nb_cli_apply_changes(vty, NULL); ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + +-DEFPY(ip_msdp_mesh_group_member, +- ip_msdp_mesh_group_member_cmd, +- "ip msdp mesh-group WORD$gname member A.B.C.D$maddr", +- IP_STR ++DEFPY(pim_msdp_mesh_group_member, ++ pim_msdp_mesh_group_member_cmd, ++ "msdp mesh-group WORD$gname member A.B.C.D$maddr", + CFG_MSDP_STR + "Configure MSDP mesh-group\n" + "Mesh group name\n" + "Mesh group member\n" + "Peer IP address\n") + { +- const char *vrfname; + char xpath_value[XPATH_MAXLEN]; + ++ /* Create mesh group. */ ++ snprintf(xpath_value, sizeof(xpath_value), ++ "./msdp-mesh-groups[name='%s']", gname); ++ nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL); ++ ++ /* Create mesh group member. */ ++ strlcat(xpath_value, "/members[address='", sizeof(xpath_value)); ++ strlcat(xpath_value, maddr_str, sizeof(xpath_value)); ++ strlcat(xpath_value, "']", sizeof(xpath_value)); ++ nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(ip_pim_msdp_mesh_group_member, ++ ip_msdp_mesh_group_member_cmd, ++ "ip msdp mesh-group WORD$gname member A.B.C.D$maddr", ++ IP_STR ++ CFG_MSDP_STR ++ "Configure MSDP mesh-group\n" ++ "Mesh group name\n" ++ "Mesh group member\n" ++ "Peer IP address\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char xpath_value[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + + /* Create mesh group. */ + snprintf(xpath_value, sizeof(xpath_value), +- FRR_PIM_VRF_XPATH "/msdp-mesh-groups[name='%s']", +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4", gname); ++ "./msdp-mesh-groups[name='%s']", gname); + nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL); + + /* Create mesh group member. */ +@@ -5162,33 +6554,32 @@ DEFPY(ip_msdp_mesh_group_member, + strlcat(xpath_value, maddr_str, sizeof(xpath_value)); + strlcat(xpath_value, "']", sizeof(xpath_value)); + nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL); ++ ret = nb_cli_apply_changes(vty, NULL); + +- return nb_cli_apply_changes(vty, NULL); ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + +-DEFPY(no_ip_msdp_mesh_group_member, +- no_ip_msdp_mesh_group_member_cmd, +- "no ip msdp mesh-group WORD$gname member A.B.C.D$maddr", ++DEFPY(no_pim_msdp_mesh_group_member, ++ no_pim_msdp_mesh_group_member_cmd, ++ "no msdp mesh-group WORD$gname member A.B.C.D$maddr", + NO_STR +- IP_STR + CFG_MSDP_STR + "Delete MSDP mesh-group member\n" + "Mesh group name\n" + "Mesh group member\n" + "Peer IP address\n") + { +- const char *vrfname; + char xpath_value[XPATH_MAXLEN]; + char xpath_member_value[XPATH_MAXLEN]; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- + /* Get mesh group base XPath. */ + snprintf(xpath_value, sizeof(xpath_value), +- FRR_PIM_VRF_XPATH "/msdp-mesh-groups[name='%s']", +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4", gname); ++ "%s/msdp-mesh-groups[name='%s']", VTY_CURR_XPATH, gname); + + if (!yang_dnode_exists(vty->candidate_config->dnode, xpath_value)) { + vty_out(vty, "%% mesh-group does not exist\n"); +@@ -5217,59 +6608,221 @@ DEFPY(no_ip_msdp_mesh_group_member, + + return nb_cli_apply_changes(vty, NULL); + } ++DEFPY_ATTR(no_ip_pim_msdp_mesh_group_member, ++ no_ip_msdp_mesh_group_member_cmd, ++ "no ip msdp mesh-group WORD$gname member A.B.C.D$maddr", ++ NO_STR ++ IP_STR ++ CFG_MSDP_STR ++ "Delete MSDP mesh-group member\n" ++ "Mesh group name\n" ++ "Mesh group member\n" ++ "Peer IP address\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char xpath_value[XPATH_MAXLEN]; ++ char xpath_member_value[XPATH_MAXLEN]; ++ int ret = CMD_WARNING_CONFIG_FAILED; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; + +-DEFPY(ip_msdp_mesh_group_source, +- ip_msdp_mesh_group_source_cmd, +- "ip msdp mesh-group WORD$gname source A.B.C.D$saddr", +- IP_STR ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ /* Get mesh group base XPath. */ ++ snprintf(xpath_value, sizeof(xpath_value), ++ "%s/msdp-mesh-groups[name='%s']", VTY_CURR_XPATH, gname); ++ ++ if (yang_dnode_exists(vty->candidate_config->dnode, xpath_value)) { ++ /* Remove mesh group member. */ ++ strlcpy(xpath_member_value, xpath_value, ++ sizeof(xpath_member_value)); ++ strlcat(xpath_member_value, "/members[address='", ++ sizeof(xpath_member_value)); ++ strlcat(xpath_member_value, maddr_str, ++ sizeof(xpath_member_value)); ++ strlcat(xpath_member_value, "']", sizeof(xpath_member_value)); ++ if (yang_dnode_exists(vty->candidate_config->dnode, ++ xpath_member_value)) { ++ nb_cli_enqueue_change(vty, xpath_member_value, ++ NB_OP_DESTROY, NULL); ++ ++ /* ++ * If this is the last member, then we must remove the group altogether ++ * to not break legacy CLI behaviour. ++ */ ++ pim_cli_legacy_mesh_group_behavior(vty, gname); ++ ret = nb_cli_apply_changes(vty, NULL); ++ } else { ++ vty_out(vty, "%% mesh-group member does not exist\n"); ++ } ++ } else { ++ vty_out(vty, "%% mesh-group does not exist\n"); ++ } ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY(pim_msdp_mesh_group_source, ++ pim_msdp_mesh_group_source_cmd, ++ "msdp mesh-group WORD$gname source A.B.C.D$saddr", + CFG_MSDP_STR + "Configure MSDP mesh-group\n" + "Mesh group name\n" + "Mesh group local address\n" + "Source IP address for the TCP connection\n") + { +- const char *vrfname; + char xpath_value[XPATH_MAXLEN]; + ++ /* Create mesh group. */ ++ snprintf(xpath_value, sizeof(xpath_value), ++ "./msdp-mesh-groups[name='%s']", gname); ++ nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL); ++ ++ /* Create mesh group source. */ ++ strlcat(xpath_value, "/source", sizeof(xpath_value)); ++ nb_cli_enqueue_change(vty, xpath_value, NB_OP_MODIFY, saddr_str); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(ip_pim_msdp_mesh_group_source, ++ ip_msdp_mesh_group_source_cmd, ++ "ip msdp mesh-group WORD$gname source A.B.C.D$saddr", ++ IP_STR ++ CFG_MSDP_STR ++ "Configure MSDP mesh-group\n" ++ "Mesh group name\n" ++ "Mesh group local address\n" ++ "Source IP address for the TCP connection\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char xpath_value[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + + /* Create mesh group. */ + snprintf(xpath_value, sizeof(xpath_value), +- FRR_PIM_VRF_XPATH "/msdp-mesh-groups[name='%s']", +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4", gname); ++ "./msdp-mesh-groups[name='%s']", gname); + nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL); +- + /* Create mesh group source. */ + strlcat(xpath_value, "/source", sizeof(xpath_value)); + nb_cli_enqueue_change(vty, xpath_value, NB_OP_MODIFY, saddr_str); ++ ret = nb_cli_apply_changes(vty, NULL); + +- return nb_cli_apply_changes(vty, NULL); ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + +-DEFPY(no_ip_msdp_mesh_group_source, +- no_ip_msdp_mesh_group_source_cmd, +- "no ip msdp mesh-group WORD$gname source [A.B.C.D]", ++DEFPY(no_pim_msdp_mesh_group_source, ++ no_pim_msdp_mesh_group_source_cmd, ++ "no msdp mesh-group WORD$gname source [A.B.C.D]", + NO_STR +- IP_STR + CFG_MSDP_STR + "Delete MSDP mesh-group source\n" + "Mesh group name\n" + "Mesh group source\n" + "Mesh group local address\n") + { +- const char *vrfname; + char xpath_value[XPATH_MAXLEN]; + ++ /* Get mesh group base XPath. */ ++ snprintf(xpath_value, sizeof(xpath_value), ++ "./msdp-mesh-groups[name='%s']", gname); ++ nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL); ++ ++ /* Create mesh group source. */ ++ strlcat(xpath_value, "/source", sizeof(xpath_value)); ++ nb_cli_enqueue_change(vty, xpath_value, NB_OP_DESTROY, NULL); ++ ++ /* ++ * If this is the last member, then we must remove the group altogether ++ * to not break legacy CLI behaviour. ++ */ ++ pim_cli_legacy_mesh_group_behavior(vty, gname); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(no_ip_pim_msdp_mesh_group_source, ++ no_ip_msdp_mesh_group_source_cmd, ++ "no ip msdp mesh-group WORD$gname source [A.B.C.D]", ++ NO_STR ++ IP_STR ++ CFG_MSDP_STR ++ "Delete MSDP mesh-group source\n" ++ "Mesh group name\n" ++ "Mesh group source\n" ++ "Mesh group local address\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char xpath_value[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ + vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); + return CMD_WARNING_CONFIG_FAILED; ++ } + + /* Get mesh group base XPath. */ + snprintf(xpath_value, sizeof(xpath_value), +- FRR_PIM_VRF_XPATH "/msdp-mesh-groups[name='%s']", +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4", gname); ++ "./msdp-mesh-groups[name='%s']", gname); + nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL); + + /* Create mesh group source. */ +@@ -5281,36 +6834,83 @@ DEFPY(no_ip_msdp_mesh_group_source, + * to not break legacy CLI behaviour. + */ + pim_cli_legacy_mesh_group_behavior(vty, gname); ++ ret = nb_cli_apply_changes(vty, NULL); + +- return nb_cli_apply_changes(vty, NULL); ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; + } + +-DEFPY(no_ip_msdp_mesh_group, +- no_ip_msdp_mesh_group_cmd, +- "no ip msdp mesh-group WORD$gname", ++DEFPY(no_pim_msdp_mesh_group, ++ no_pim_msdp_mesh_group_cmd, ++ "no msdp mesh-group WORD$gname", + NO_STR +- IP_STR + CFG_MSDP_STR + "Delete MSDP mesh-group\n" + "Mesh group name\n") + { +- const char *vrfname; + char xpath_value[XPATH_MAXLEN]; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- + /* Get mesh group base XPath. */ + snprintf(xpath_value, sizeof(xpath_value), +- FRR_PIM_VRF_XPATH "/msdp-mesh-groups[name='%s']", +- "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4", gname); ++ "%s/msdp-mesh-groups[name='%s']", VTY_CURR_XPATH, gname); + if (!yang_dnode_exists(vty->candidate_config->dnode, xpath_value)) + return CMD_SUCCESS; + + nb_cli_enqueue_change(vty, xpath_value, NB_OP_DESTROY, NULL); + return nb_cli_apply_changes(vty, NULL); + } ++DEFPY_ATTR(no_ip_pim_msdp_mesh_group, ++ no_ip_msdp_mesh_group_cmd, ++ "no ip msdp mesh-group WORD$gname", ++ NO_STR ++ IP_STR ++ CFG_MSDP_STR ++ "Delete MSDP mesh-group\n" ++ "Mesh group name\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char xpath_value[XPATH_MAXLEN]; ++ int ret = CMD_SUCCESS; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ ++ /* Get mesh group base XPath. */ ++ snprintf(xpath_value, sizeof(xpath_value), ++ "%s/msdp-mesh-groups[name='%s']", VTY_CURR_XPATH, gname); ++ if (yang_dnode_exists(vty->candidate_config->dnode, xpath_value)) { ++ nb_cli_enqueue_change(vty, xpath_value, NB_OP_DESTROY, NULL); ++ ret = nb_cli_apply_changes(vty, NULL); ++ } ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} + + static void ip_msdp_show_mesh_group(struct vty *vty, struct pim_msdp_mg *mg, + struct json_object *json) +@@ -5329,7 +6929,8 @@ static void ip_msdp_show_mesh_group(struct vty *vty, struct pim_msdp_mg *mg, + if (json) { + /* currently there is only one mesh group but we should still + * make +- * it a dict with mg-name as key */ ++ * it a dict with mg-name as key ++ */ + json_mg_row = json_object_new_object(); + json_object_string_add(json_mg_row, "name", + mg->mesh_group_name); +@@ -6311,119 +7912,224 @@ DEFUN_HIDDEN (show_ip_pim_vxlan_sg_work, + return CMD_SUCCESS; + } + +-DEFUN_HIDDEN (no_ip_pim_mlag, +- no_ip_pim_mlag_cmd, +- "no ip pim mlag", ++DEFPY_HIDDEN (no_pim_mlag, ++ no_pim_mlag_cmd, ++ "no mlag", + NO_STR +- IP_STR +- PIM_STR + "MLAG\n") + { + char mlag_xpath[XPATH_MAXLEN]; + +- snprintf(mlag_xpath, sizeof(mlag_xpath), FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", "default", "frr-routing:ipv4"); +- strlcat(mlag_xpath, "/mlag", sizeof(mlag_xpath)); ++ snprintf(mlag_xpath, sizeof(mlag_xpath), "./mlag"); ++ nb_cli_enqueue_change(vty, mlag_xpath, NB_OP_DESTROY, NULL); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++DEFPY_ATTR(no_ip_pim_mlag, ++ no_ip_pim_mlag_cmd, ++ "no ip pim mlag", ++ NO_STR ++ IP_STR ++ PIM_STR ++ "MLAG\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) ++{ ++ char mlag_xpath[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; ++ ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } + ++ snprintf(mlag_xpath, sizeof(mlag_xpath), "./mlag"); + nb_cli_enqueue_change(vty, mlag_xpath, NB_OP_DESTROY, NULL); ++ ret = nb_cli_apply_changes(vty, NULL); ++ ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } ++ ++ return ret; ++} ++ ++DEFPY_HIDDEN (pim_mlag, ++ pim_mlag_cmd, ++ "mlag INTERFACE$iface role [primary|secondary]$role state [up|down]$state addr A.B.C.D$addr", ++ "MLAG\n" ++ "peerlink sub interface\n" ++ "MLAG role\n" ++ "MLAG role primary\n" ++ "MLAG role secondary\n" ++ "peer session state\n" ++ "peer session state up\n" ++ "peer session state down\n" ++ "configure PIP\n" ++ "unique ip address\n") ++{ ++ char mlag_peerlink_rif_xpath[XPATH_MAXLEN]; ++ char mlag_my_role_xpath[XPATH_MAXLEN]; ++ char mlag_peer_state_xpath[XPATH_MAXLEN]; ++ char mlag_reg_address_xpath[XPATH_MAXLEN]; ++ ++ snprintf(mlag_peerlink_rif_xpath, sizeof(mlag_peerlink_rif_xpath), ++ "./mlag/peerlink-rif"); ++ nb_cli_enqueue_change(vty, mlag_peerlink_rif_xpath, NB_OP_MODIFY, iface); ++ ++ snprintf(mlag_my_role_xpath, sizeof(mlag_my_role_xpath), ++ "./mlag/my-role"); ++ if (!strcmp(role, "primary")) { ++ nb_cli_enqueue_change(vty, mlag_my_role_xpath, NB_OP_MODIFY, ++ "MLAG_ROLE_PRIMARY"); ++ } else if (!strcmp(role, "secondary")) { ++ nb_cli_enqueue_change(vty, mlag_my_role_xpath, NB_OP_MODIFY, ++ "MLAG_ROLE_SECONDARY"); ++ } else { ++ vty_out(vty, "unknown MLAG role %s\n", role); ++ return CMD_WARNING; ++ } ++ ++ snprintf(mlag_peer_state_xpath, sizeof(mlag_peer_state_xpath), ++ "./mlag/peer-state"); ++ if (!strcmp(state, "up")) { ++ nb_cli_enqueue_change(vty, mlag_peer_state_xpath, NB_OP_MODIFY, ++ "true"); ++ } else if (strcmp(state, "down")) { ++ nb_cli_enqueue_change(vty, mlag_peer_state_xpath, NB_OP_MODIFY, ++ "false"); ++ } else { ++ vty_out(vty, "unknown MLAG state %s\n", state); ++ return CMD_WARNING; ++ } + ++ snprintf(mlag_reg_address_xpath, sizeof(mlag_reg_address_xpath), ++ "./mlag/reg-address"); ++ nb_cli_enqueue_change(vty, mlag_reg_address_xpath, NB_OP_MODIFY, ++ addr_str); + + return nb_cli_apply_changes(vty, NULL); + } +- +-DEFUN_HIDDEN (ip_pim_mlag, +- ip_pim_mlag_cmd, +- "ip pim mlag INTERFACE role [primary|secondary] state [up|down] addr A.B.C.D", +- IP_STR +- PIM_STR +- "MLAG\n" +- "peerlink sub interface\n" +- "MLAG role\n" +- "MLAG role primary\n" +- "MLAG role secondary\n" +- "peer session state\n" +- "peer session state up\n" +- "peer session state down\n" +- "configure PIP\n" +- "unique ip address\n") ++DEFPY_ATTR(ip_pim_mlag, ++ ip_pim_mlag_cmd, ++ "ip pim mlag INTERFACE$iface role [primary|secondary]$role state [up|down]$state addr A.B.C.D$addr", ++ IP_STR ++ PIM_STR ++ "MLAG\n" ++ "peerlink sub interface\n" ++ "MLAG role\n" ++ "MLAG role primary\n" ++ "MLAG role secondary\n" ++ "peer session state\n" ++ "peer session state up\n" ++ "peer session state down\n" ++ "configure PIP\n" ++ "unique ip address\n", ++ CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED) + { +- int idx; + char mlag_peerlink_rif_xpath[XPATH_MAXLEN]; + char mlag_my_role_xpath[XPATH_MAXLEN]; + char mlag_peer_state_xpath[XPATH_MAXLEN]; + char mlag_reg_address_xpath[XPATH_MAXLEN]; ++ int ret; ++ const char *vrfname; ++ char xpath[XPATH_MAXLEN]; ++ int orig_node = -1; + +- snprintf(mlag_peerlink_rif_xpath, sizeof(mlag_peerlink_rif_xpath), +- FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", "default", "frr-routing:ipv4"); +- strlcat(mlag_peerlink_rif_xpath, "/mlag/peerlink-rif", +- sizeof(mlag_peerlink_rif_xpath)); ++ vrfname = pim_cli_get_vrf_name(vty); ++ if (vrfname) { ++ snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, ++ "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); ++ nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL); ++ if (nb_cli_apply_changes_clear_pending(vty, NULL) == ++ CMD_SUCCESS) { ++ orig_node = vty->node; ++ VTY_PUSH_XPATH(PIM_NODE, xpath); ++ } else { ++ return CMD_WARNING_CONFIG_FAILED; ++ } ++ } else { ++ vty_out(vty, "%% Failed to determine vrf name\n"); ++ return CMD_WARNING_CONFIG_FAILED; ++ } + +- idx = 3; +- nb_cli_enqueue_change(vty, mlag_peerlink_rif_xpath, NB_OP_MODIFY, +- argv[idx]->arg); ++ snprintf(mlag_peerlink_rif_xpath, sizeof(mlag_peerlink_rif_xpath), ++ "./mlag/peerlink-rif"); ++ nb_cli_enqueue_change(vty, mlag_peerlink_rif_xpath, NB_OP_MODIFY, iface); + + snprintf(mlag_my_role_xpath, sizeof(mlag_my_role_xpath), +- FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", "default", "frr-routing:ipv4"); +- strlcat(mlag_my_role_xpath, "/mlag/my-role", +- sizeof(mlag_my_role_xpath)); +- +- idx += 2; +- if (!strcmp(argv[idx]->arg, "primary")) { ++ "./mlag/my-role"); ++ if (!strcmp(role, "primary")) { + nb_cli_enqueue_change(vty, mlag_my_role_xpath, NB_OP_MODIFY, + "MLAG_ROLE_PRIMARY"); +- +- } else if (!strcmp(argv[idx]->arg, "secondary")) { ++ } else if (!strcmp(role, "secondary")) { + nb_cli_enqueue_change(vty, mlag_my_role_xpath, NB_OP_MODIFY, + "MLAG_ROLE_SECONDARY"); +- + } else { +- vty_out(vty, "unknown MLAG role %s\n", argv[idx]->arg); +- return CMD_WARNING; ++ vty_out(vty, "unknown MLAG role %s\n", role); ++ ret = CMD_WARNING; ++ goto done; + } + + snprintf(mlag_peer_state_xpath, sizeof(mlag_peer_state_xpath), +- FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", "default", "frr-routing:ipv4"); +- strlcat(mlag_peer_state_xpath, "/mlag/peer-state", +- sizeof(mlag_peer_state_xpath)); +- +- idx += 2; +- if (!strcmp(argv[idx]->arg, "up")) { ++ "./mlag/peer-state"); ++ if (!strcmp(state, "up")) { + nb_cli_enqueue_change(vty, mlag_peer_state_xpath, NB_OP_MODIFY, + "true"); +- +- } else if (strcmp(argv[idx]->arg, "down")) { ++ } else if (strcmp(state, "down")) { + nb_cli_enqueue_change(vty, mlag_peer_state_xpath, NB_OP_MODIFY, + "false"); +- + } else { +- vty_out(vty, "unknown MLAG state %s\n", argv[idx]->arg); +- return CMD_WARNING; ++ vty_out(vty, "unknown MLAG state %s\n", state); ++ ret = CMD_WARNING; ++ goto done; + } + + snprintf(mlag_reg_address_xpath, sizeof(mlag_reg_address_xpath), +- FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", "default", "frr-routing:ipv4"); +- strlcat(mlag_reg_address_xpath, "/mlag/reg-address", +- sizeof(mlag_reg_address_xpath)); +- +- idx += 2; ++ "./mlag/reg-address"); + nb_cli_enqueue_change(vty, mlag_reg_address_xpath, NB_OP_MODIFY, +- argv[idx]->arg); ++ addr_str); + +- return nb_cli_apply_changes(vty, NULL); +-} ++ ret = nb_cli_apply_changes(vty, NULL); + +-void pim_cmd_init(void) +-{ +- if_cmd_init(pim_interface_config_write); ++done: ++ if (orig_node != -1) { ++ vty->node = orig_node; ++ vty->xpath_index--; ++ } + +- install_node(&debug_node); ++ return ret; ++} + +- install_element(ENABLE_NODE, &pim_test_sg_keepalive_cmd); ++struct cmd_node pim_node = { ++ .name = "pim", ++ .node = PIM_NODE, ++ .parent_node = CONFIG_NODE, ++ .prompt = "%s(config-pim)# ", ++ .config_write = pim_router_config_write, ++}; + ++/* This function installs all of the deprecated PIM configuration commands that live in the global config and/or VRF nodes ++ * This configuration has been moved to the new 'router pim' config node instead like all the other routing protocols. ++ * No new commands should be added here. ++ */ ++static void pim_install_deprecated(void) ++{ + install_element(CONFIG_NODE, &ip_pim_rp_cmd); + install_element(VRF_NODE, &ip_pim_rp_cmd); + install_element(CONFIG_NODE, &no_ip_pim_rp_cmd); +@@ -6449,8 +8155,8 @@ void pim_cmd_init(void) + install_element(CONFIG_NODE, + &no_ip_pim_spt_switchover_infinity_plist_cmd); + install_element(VRF_NODE, &no_ip_pim_spt_switchover_infinity_plist_cmd); +- install_element(CONFIG_NODE, &pim_register_accept_list_cmd); +- install_element(VRF_NODE, &pim_register_accept_list_cmd); ++ install_element(CONFIG_NODE, &ip_pim_register_accept_list_cmd); ++ install_element(VRF_NODE, &ip_pim_register_accept_list_cmd); + install_element(CONFIG_NODE, &ip_pim_joinprune_time_cmd); + install_element(CONFIG_NODE, &no_ip_pim_joinprune_time_cmd); + install_element(CONFIG_NODE, &ip_pim_keep_alive_cmd); +@@ -6467,14 +8173,6 @@ void pim_cmd_init(void) + install_element(VRF_NODE, &ip_pim_v6_secondary_cmd); + install_element(CONFIG_NODE, &no_ip_pim_v6_secondary_cmd); + install_element(VRF_NODE, &no_ip_pim_v6_secondary_cmd); +- install_element(CONFIG_NODE, &ip_ssmpingd_cmd); +- install_element(VRF_NODE, &ip_ssmpingd_cmd); +- install_element(CONFIG_NODE, &no_ip_ssmpingd_cmd); +- install_element(VRF_NODE, &no_ip_ssmpingd_cmd); +- install_element(CONFIG_NODE, &ip_msdp_peer_cmd); +- install_element(VRF_NODE, &ip_msdp_peer_cmd); +- install_element(CONFIG_NODE, &no_ip_msdp_peer_cmd); +- install_element(VRF_NODE, &no_ip_msdp_peer_cmd); + install_element(CONFIG_NODE, &ip_pim_ecmp_cmd); + install_element(VRF_NODE, &ip_pim_ecmp_cmd); + install_element(CONFIG_NODE, &no_ip_pim_ecmp_cmd); +@@ -6485,10 +8183,87 @@ void pim_cmd_init(void) + install_element(VRF_NODE, &no_ip_pim_ecmp_rebalance_cmd); + install_element(CONFIG_NODE, &ip_pim_mlag_cmd); + install_element(CONFIG_NODE, &no_ip_pim_mlag_cmd); +- install_element(CONFIG_NODE, &ip_igmp_group_watermark_cmd); +- install_element(VRF_NODE, &ip_igmp_group_watermark_cmd); +- install_element(CONFIG_NODE, &no_ip_igmp_group_watermark_cmd); +- install_element(VRF_NODE, &no_ip_igmp_group_watermark_cmd); ++ ++ install_element(CONFIG_NODE, &ip_ssmpingd_cmd); ++ install_element(VRF_NODE, &ip_ssmpingd_cmd); ++ install_element(CONFIG_NODE, &no_ip_ssmpingd_cmd); ++ install_element(VRF_NODE, &no_ip_ssmpingd_cmd); ++ ++ install_element(CONFIG_NODE, &ip_msdp_peer_cmd); ++ install_element(VRF_NODE, &ip_msdp_peer_cmd); ++ install_element(CONFIG_NODE, &no_ip_msdp_peer_cmd); ++ install_element(VRF_NODE, &no_ip_msdp_peer_cmd); ++ install_element(CONFIG_NODE, &ip_msdp_timers_cmd); ++ install_element(VRF_NODE, &ip_msdp_timers_cmd); ++ install_element(CONFIG_NODE, &no_ip_msdp_timers_cmd); ++ install_element(VRF_NODE, &no_ip_msdp_timers_cmd); ++ install_element(CONFIG_NODE, &ip_msdp_mesh_group_member_cmd); ++ install_element(VRF_NODE, &ip_msdp_mesh_group_member_cmd); ++ install_element(CONFIG_NODE, &no_ip_msdp_mesh_group_member_cmd); ++ install_element(VRF_NODE, &no_ip_msdp_mesh_group_member_cmd); ++ install_element(CONFIG_NODE, &ip_msdp_mesh_group_source_cmd); ++ install_element(VRF_NODE, &ip_msdp_mesh_group_source_cmd); ++ install_element(CONFIG_NODE, &no_ip_msdp_mesh_group_source_cmd); ++ install_element(VRF_NODE, &no_ip_msdp_mesh_group_source_cmd); ++ install_element(CONFIG_NODE, &no_ip_msdp_mesh_group_cmd); ++ install_element(VRF_NODE, &no_ip_msdp_mesh_group_cmd); ++} ++ ++void pim_cmd_init(void) ++{ ++ if_cmd_init(pim_interface_config_write); ++ ++ install_node(&debug_node); ++ ++ install_element(CONFIG_NODE, &router_pim_cmd); ++ install_element(CONFIG_NODE, &no_router_pim_cmd); ++ ++ install_node(&pim_node); ++ install_default(PIM_NODE); ++ ++ install_element(PIM_NODE, &pim_rp_cmd); ++ install_element(PIM_NODE, &no_pim_rp_cmd); ++ install_element(PIM_NODE, &pim_rp_prefix_list_cmd); ++ install_element(PIM_NODE, &no_pim_rp_prefix_list_cmd); ++ install_element(PIM_NODE, &no_pim_ssm_prefix_list_cmd); ++ install_element(PIM_NODE, &no_pim_ssm_prefix_list_name_cmd); ++ install_element(PIM_NODE, &pim_ssm_prefix_list_cmd); ++ install_element(PIM_NODE, &pim_register_suppress_cmd); ++ install_element(PIM_NODE, &no_pim_register_suppress_cmd); ++ install_element(PIM_NODE, &pim_spt_switchover_infinity_cmd); ++ install_element(PIM_NODE, &pim_spt_switchover_infinity_plist_cmd); ++ install_element(PIM_NODE, &no_pim_spt_switchover_infinity_cmd); ++ install_element(PIM_NODE, &no_pim_spt_switchover_infinity_plist_cmd); ++ install_element(PIM_NODE, &pim_register_accept_list_cmd); ++ install_element(PIM_NODE, &pim_joinprune_time_cmd); ++ install_element(PIM_NODE, &no_pim_joinprune_time_cmd); ++ install_element(PIM_NODE, &pim_keep_alive_cmd); ++ install_element(PIM_NODE, &pim_rp_keep_alive_cmd); ++ install_element(PIM_NODE, &no_pim_keep_alive_cmd); ++ install_element(PIM_NODE, &no_pim_rp_keep_alive_cmd); ++ install_element(PIM_NODE, &pim_packets_cmd); ++ install_element(PIM_NODE, &no_pim_packets_cmd); ++ install_element(PIM_NODE, &pim_v6_secondary_cmd); ++ install_element(PIM_NODE, &no_pim_v6_secondary_cmd); ++ install_element(PIM_NODE, &pim_ecmp_cmd); ++ install_element(PIM_NODE, &no_pim_ecmp_cmd); ++ install_element(PIM_NODE, &pim_ecmp_rebalance_cmd); ++ install_element(PIM_NODE, &no_pim_ecmp_rebalance_cmd); ++ install_element(PIM_NODE, &pim_mlag_cmd); ++ install_element(PIM_NODE, &no_pim_mlag_cmd); ++ ++ install_element(PIM_NODE, &pim_ssmpingd_cmd); ++ install_element(PIM_NODE, &no_pim_ssmpingd_cmd); ++ ++ install_element(PIM_NODE, &pim_msdp_peer_cmd); ++ install_element(PIM_NODE, &no_pim_msdp_peer_cmd); ++ install_element(PIM_NODE, &pim_msdp_timers_cmd); ++ install_element(PIM_NODE, &no_pim_msdp_timers_cmd); ++ install_element(PIM_NODE, &pim_msdp_mesh_group_member_cmd); ++ install_element(PIM_NODE, &no_pim_msdp_mesh_group_member_cmd); ++ install_element(PIM_NODE, &pim_msdp_mesh_group_source_cmd); ++ install_element(PIM_NODE, &no_pim_msdp_mesh_group_source_cmd); ++ install_element(PIM_NODE, &no_pim_msdp_mesh_group_cmd); + + install_element(INTERFACE_NODE, &interface_ip_igmp_cmd); + install_element(INTERFACE_NODE, &interface_no_ip_igmp_cmd); +@@ -6534,6 +8309,22 @@ void pim_cmd_init(void) + install_element(INTERFACE_NODE, &interface_ip_mroute_cmd); + install_element(INTERFACE_NODE, &interface_no_ip_mroute_cmd); + ++ install_element(INTERFACE_NODE, &interface_pim_use_source_cmd); ++ install_element(INTERFACE_NODE, &interface_no_pim_use_source_cmd); ++ /* Install BSM command */ ++ install_element(INTERFACE_NODE, &ip_pim_bsm_cmd); ++ install_element(INTERFACE_NODE, &no_ip_pim_bsm_cmd); ++ install_element(INTERFACE_NODE, &ip_pim_ucast_bsm_cmd); ++ install_element(INTERFACE_NODE, &no_ip_pim_ucast_bsm_cmd); ++ /* Install BFD command */ ++ install_element(INTERFACE_NODE, &ip_pim_bfd_cmd); ++ install_element(INTERFACE_NODE, &ip_pim_bfd_param_cmd); ++ install_element(INTERFACE_NODE, &no_ip_pim_bfd_profile_cmd); ++ install_element(INTERFACE_NODE, &no_ip_pim_bfd_cmd); ++#if HAVE_BFDD == 0 ++ install_element(INTERFACE_NODE, &no_ip_pim_bfd_param_cmd); ++#endif /* !HAVE_BFDD */ ++ + install_element(VIEW_NODE, &show_ip_igmp_interface_cmd); + install_element(VIEW_NODE, &show_ip_igmp_interface_vrf_all_cmd); + install_element(VIEW_NODE, &show_ip_igmp_join_cmd); +@@ -6590,6 +8381,20 @@ void pim_cmd_init(void) + install_element(VIEW_NODE, &show_ip_pim_bsrp_cmd); + install_element(VIEW_NODE, &show_ip_pim_bsm_db_cmd); + install_element(VIEW_NODE, &show_ip_pim_statistics_cmd); ++ install_element(VIEW_NODE, &show_ip_msdp_peer_detail_cmd); ++ install_element(VIEW_NODE, &show_ip_msdp_peer_detail_vrf_all_cmd); ++ install_element(VIEW_NODE, &show_ip_msdp_sa_detail_cmd); ++ install_element(VIEW_NODE, &show_ip_msdp_sa_detail_vrf_all_cmd); ++ install_element(VIEW_NODE, &show_ip_msdp_sa_sg_cmd); ++ install_element(VIEW_NODE, &show_ip_msdp_sa_sg_vrf_all_cmd); ++ install_element(VIEW_NODE, &show_ip_msdp_mesh_group_cmd); ++ install_element(VIEW_NODE, &show_ip_msdp_mesh_group_vrf_all_cmd); ++ install_element(VIEW_NODE, &show_ip_pim_ssm_range_cmd); ++ install_element(VIEW_NODE, &show_ip_pim_group_type_cmd); ++ install_element(VIEW_NODE, &show_ip_pim_vxlan_sg_cmd); ++ install_element(VIEW_NODE, &show_ip_pim_vxlan_sg_work_cmd); ++ ++ install_element(ENABLE_NODE, &pim_test_sg_keepalive_cmd); + + install_element(ENABLE_NODE, &clear_ip_mroute_count_cmd); + install_element(ENABLE_NODE, &clear_ip_interfaces_cmd); +@@ -6604,134 +8409,98 @@ void pim_cmd_init(void) + install_element(ENABLE_NODE, &show_debugging_pim_cmd); + + install_element(ENABLE_NODE, &debug_igmp_cmd); +- install_element(ENABLE_NODE, &no_debug_igmp_cmd); +- install_element(ENABLE_NODE, &debug_igmp_events_cmd); +- install_element(ENABLE_NODE, &no_debug_igmp_events_cmd); +- install_element(ENABLE_NODE, &debug_igmp_packets_cmd); +- install_element(ENABLE_NODE, &no_debug_igmp_packets_cmd); +- install_element(ENABLE_NODE, &debug_igmp_trace_cmd); +- install_element(ENABLE_NODE, &no_debug_igmp_trace_cmd); +- install_element(ENABLE_NODE, &debug_igmp_trace_detail_cmd); +- install_element(ENABLE_NODE, &no_debug_igmp_trace_detail_cmd); +- install_element(ENABLE_NODE, &debug_mroute_cmd); +- install_element(ENABLE_NODE, &debug_mroute_detail_cmd); +- install_element(ENABLE_NODE, &no_debug_mroute_cmd); +- install_element(ENABLE_NODE, &no_debug_mroute_detail_cmd); +- install_element(ENABLE_NODE, &debug_pim_static_cmd); +- install_element(ENABLE_NODE, &no_debug_pim_static_cmd); +- install_element(ENABLE_NODE, &debug_pim_cmd); +- install_element(ENABLE_NODE, &debug_pim_nht_cmd); +- install_element(ENABLE_NODE, &debug_pim_nht_det_cmd); +- install_element(ENABLE_NODE, &debug_pim_nht_rp_cmd); +- install_element(ENABLE_NODE, &no_debug_pim_nht_rp_cmd); +- install_element(ENABLE_NODE, &debug_pim_events_cmd); +- install_element(ENABLE_NODE, &debug_pim_packets_cmd); +- install_element(ENABLE_NODE, &debug_pim_packetdump_send_cmd); +- install_element(ENABLE_NODE, &debug_pim_packetdump_recv_cmd); +- install_element(ENABLE_NODE, &debug_pim_trace_cmd); +- install_element(ENABLE_NODE, &debug_pim_trace_detail_cmd); +- install_element(ENABLE_NODE, &debug_ssmpingd_cmd); +- install_element(ENABLE_NODE, &no_debug_ssmpingd_cmd); +- install_element(ENABLE_NODE, &debug_pim_zebra_cmd); +- install_element(ENABLE_NODE, &debug_pim_mlag_cmd); +- install_element(ENABLE_NODE, &no_debug_pim_mlag_cmd); +- install_element(ENABLE_NODE, &debug_pim_vxlan_cmd); +- install_element(ENABLE_NODE, &no_debug_pim_vxlan_cmd); +- install_element(ENABLE_NODE, &debug_msdp_cmd); +- install_element(ENABLE_NODE, &no_debug_msdp_cmd); +- install_element(ENABLE_NODE, &debug_msdp_events_cmd); +- install_element(ENABLE_NODE, &no_debug_msdp_events_cmd); +- install_element(ENABLE_NODE, &debug_msdp_packets_cmd); +- install_element(ENABLE_NODE, &no_debug_msdp_packets_cmd); +- install_element(ENABLE_NODE, &debug_mtrace_cmd); +- install_element(ENABLE_NODE, &no_debug_mtrace_cmd); +- install_element(ENABLE_NODE, &debug_bsm_cmd); +- install_element(ENABLE_NODE, &no_debug_bsm_cmd); +- + install_element(CONFIG_NODE, &debug_igmp_cmd); ++ install_element(ENABLE_NODE, &no_debug_igmp_cmd); + install_element(CONFIG_NODE, &no_debug_igmp_cmd); ++ install_element(ENABLE_NODE, &debug_igmp_events_cmd); + install_element(CONFIG_NODE, &debug_igmp_events_cmd); ++ install_element(ENABLE_NODE, &no_debug_igmp_events_cmd); + install_element(CONFIG_NODE, &no_debug_igmp_events_cmd); ++ install_element(ENABLE_NODE, &debug_igmp_packets_cmd); + install_element(CONFIG_NODE, &debug_igmp_packets_cmd); ++ install_element(ENABLE_NODE, &no_debug_igmp_packets_cmd); + install_element(CONFIG_NODE, &no_debug_igmp_packets_cmd); ++ install_element(ENABLE_NODE, &debug_igmp_trace_cmd); + install_element(CONFIG_NODE, &debug_igmp_trace_cmd); ++ install_element(ENABLE_NODE, &no_debug_igmp_trace_cmd); + install_element(CONFIG_NODE, &no_debug_igmp_trace_cmd); ++ install_element(ENABLE_NODE, &debug_igmp_trace_detail_cmd); + install_element(CONFIG_NODE, &debug_igmp_trace_detail_cmd); ++ install_element(ENABLE_NODE, &no_debug_igmp_trace_detail_cmd); + install_element(CONFIG_NODE, &no_debug_igmp_trace_detail_cmd); ++ install_element(ENABLE_NODE, &debug_mroute_cmd); + install_element(CONFIG_NODE, &debug_mroute_cmd); ++ install_element(ENABLE_NODE, &debug_mroute_detail_cmd); + install_element(CONFIG_NODE, &debug_mroute_detail_cmd); ++ install_element(ENABLE_NODE, &no_debug_mroute_cmd); + install_element(CONFIG_NODE, &no_debug_mroute_cmd); ++ install_element(ENABLE_NODE, &no_debug_mroute_detail_cmd); + install_element(CONFIG_NODE, &no_debug_mroute_detail_cmd); ++ install_element(ENABLE_NODE, &debug_pim_static_cmd); + install_element(CONFIG_NODE, &debug_pim_static_cmd); ++ install_element(ENABLE_NODE, &no_debug_pim_static_cmd); + install_element(CONFIG_NODE, &no_debug_pim_static_cmd); ++ install_element(ENABLE_NODE, &debug_pim_cmd); + install_element(CONFIG_NODE, &debug_pim_cmd); ++ install_element(ENABLE_NODE, &debug_pim_nht_cmd); + install_element(CONFIG_NODE, &debug_pim_nht_cmd); ++ install_element(ENABLE_NODE, &debug_pim_nht_det_cmd); + install_element(CONFIG_NODE, &debug_pim_nht_det_cmd); ++ install_element(ENABLE_NODE, &debug_pim_nht_rp_cmd); + install_element(CONFIG_NODE, &debug_pim_nht_rp_cmd); ++ install_element(ENABLE_NODE, &no_debug_pim_nht_rp_cmd); + install_element(CONFIG_NODE, &no_debug_pim_nht_rp_cmd); ++ install_element(ENABLE_NODE, &debug_pim_events_cmd); + install_element(CONFIG_NODE, &debug_pim_events_cmd); ++ install_element(ENABLE_NODE, &debug_pim_packets_cmd); + install_element(CONFIG_NODE, &debug_pim_packets_cmd); ++ install_element(ENABLE_NODE, &debug_pim_packetdump_send_cmd); + install_element(CONFIG_NODE, &debug_pim_packetdump_send_cmd); ++ install_element(ENABLE_NODE, &debug_pim_packetdump_recv_cmd); + install_element(CONFIG_NODE, &debug_pim_packetdump_recv_cmd); ++ install_element(ENABLE_NODE, &debug_pim_trace_cmd); + install_element(CONFIG_NODE, &debug_pim_trace_cmd); ++ install_element(ENABLE_NODE, &debug_pim_trace_detail_cmd); + install_element(CONFIG_NODE, &debug_pim_trace_detail_cmd); ++ install_element(ENABLE_NODE, &debug_ssmpingd_cmd); + install_element(CONFIG_NODE, &debug_ssmpingd_cmd); ++ install_element(ENABLE_NODE, &no_debug_ssmpingd_cmd); + install_element(CONFIG_NODE, &no_debug_ssmpingd_cmd); ++ install_element(ENABLE_NODE, &debug_pim_zebra_cmd); + install_element(CONFIG_NODE, &debug_pim_zebra_cmd); ++ install_element(ENABLE_NODE, &debug_pim_mlag_cmd); + install_element(CONFIG_NODE, &debug_pim_mlag_cmd); ++ install_element(ENABLE_NODE, &no_debug_pim_mlag_cmd); + install_element(CONFIG_NODE, &no_debug_pim_mlag_cmd); ++ install_element(ENABLE_NODE, &debug_pim_vxlan_cmd); + install_element(CONFIG_NODE, &debug_pim_vxlan_cmd); ++ install_element(ENABLE_NODE, &no_debug_pim_vxlan_cmd); + install_element(CONFIG_NODE, &no_debug_pim_vxlan_cmd); ++ install_element(ENABLE_NODE, &debug_msdp_cmd); + install_element(CONFIG_NODE, &debug_msdp_cmd); ++ install_element(ENABLE_NODE, &no_debug_msdp_cmd); + install_element(CONFIG_NODE, &no_debug_msdp_cmd); ++ install_element(ENABLE_NODE, &debug_msdp_events_cmd); + install_element(CONFIG_NODE, &debug_msdp_events_cmd); ++ install_element(ENABLE_NODE, &no_debug_msdp_events_cmd); + install_element(CONFIG_NODE, &no_debug_msdp_events_cmd); ++ install_element(ENABLE_NODE, &debug_msdp_packets_cmd); + install_element(CONFIG_NODE, &debug_msdp_packets_cmd); ++ install_element(ENABLE_NODE, &no_debug_msdp_packets_cmd); + install_element(CONFIG_NODE, &no_debug_msdp_packets_cmd); ++ install_element(ENABLE_NODE, &debug_mtrace_cmd); + install_element(CONFIG_NODE, &debug_mtrace_cmd); ++ install_element(ENABLE_NODE, &no_debug_mtrace_cmd); + install_element(CONFIG_NODE, &no_debug_mtrace_cmd); ++ install_element(ENABLE_NODE, &debug_bsm_cmd); + install_element(CONFIG_NODE, &debug_bsm_cmd); ++ install_element(ENABLE_NODE, &no_debug_bsm_cmd); + install_element(CONFIG_NODE, &no_debug_bsm_cmd); + +- install_element(CONFIG_NODE, &ip_msdp_timers_cmd); +- install_element(VRF_NODE, &ip_msdp_timers_cmd); +- install_element(CONFIG_NODE, &no_ip_msdp_timers_cmd); +- install_element(VRF_NODE, &no_ip_msdp_timers_cmd); +- install_element(CONFIG_NODE, &ip_msdp_mesh_group_member_cmd); +- install_element(VRF_NODE, &ip_msdp_mesh_group_member_cmd); +- install_element(CONFIG_NODE, &no_ip_msdp_mesh_group_member_cmd); +- install_element(VRF_NODE, &no_ip_msdp_mesh_group_member_cmd); +- install_element(CONFIG_NODE, &ip_msdp_mesh_group_source_cmd); +- install_element(VRF_NODE, &ip_msdp_mesh_group_source_cmd); +- install_element(CONFIG_NODE, &no_ip_msdp_mesh_group_source_cmd); +- install_element(VRF_NODE, &no_ip_msdp_mesh_group_source_cmd); +- install_element(CONFIG_NODE, &no_ip_msdp_mesh_group_cmd); +- install_element(VRF_NODE, &no_ip_msdp_mesh_group_cmd); +- install_element(VIEW_NODE, &show_ip_msdp_peer_detail_cmd); +- install_element(VIEW_NODE, &show_ip_msdp_peer_detail_vrf_all_cmd); +- install_element(VIEW_NODE, &show_ip_msdp_sa_detail_cmd); +- install_element(VIEW_NODE, &show_ip_msdp_sa_detail_vrf_all_cmd); +- install_element(VIEW_NODE, &show_ip_msdp_sa_sg_cmd); +- install_element(VIEW_NODE, &show_ip_msdp_sa_sg_vrf_all_cmd); +- install_element(VIEW_NODE, &show_ip_msdp_mesh_group_cmd); +- install_element(VIEW_NODE, &show_ip_msdp_mesh_group_vrf_all_cmd); +- install_element(VIEW_NODE, &show_ip_pim_ssm_range_cmd); +- install_element(VIEW_NODE, &show_ip_pim_group_type_cmd); +- install_element(VIEW_NODE, &show_ip_pim_vxlan_sg_cmd); +- install_element(VIEW_NODE, &show_ip_pim_vxlan_sg_work_cmd); +- install_element(INTERFACE_NODE, &interface_pim_use_source_cmd); +- install_element(INTERFACE_NODE, &interface_no_pim_use_source_cmd); +- /* Install BSM command */ +- install_element(INTERFACE_NODE, &ip_pim_bsm_cmd); +- install_element(INTERFACE_NODE, &no_ip_pim_bsm_cmd); +- install_element(INTERFACE_NODE, &ip_pim_ucast_bsm_cmd); +- install_element(INTERFACE_NODE, &no_ip_pim_ucast_bsm_cmd); +- /* Install BFD command */ +- install_element(INTERFACE_NODE, &ip_pim_bfd_cmd); +- install_element(INTERFACE_NODE, &ip_pim_bfd_param_cmd); +- install_element(INTERFACE_NODE, &no_ip_pim_bfd_profile_cmd); +- install_element(INTERFACE_NODE, &no_ip_pim_bfd_cmd); +-#if HAVE_BFDD == 0 +- install_element(INTERFACE_NODE, &no_ip_pim_bfd_param_cmd); +-#endif /* !HAVE_BFDD */ ++ install_element(CONFIG_NODE, &ip_igmp_group_watermark_cmd); ++ install_element(VRF_NODE, &ip_igmp_group_watermark_cmd); ++ install_element(CONFIG_NODE, &no_ip_igmp_group_watermark_cmd); ++ install_element(VRF_NODE, &no_ip_igmp_group_watermark_cmd); ++ ++ pim_install_deprecated(); + } +diff --git a/pimd/pim_cmd_common.c b/pimd/pim_cmd_common.c +index 5e50a09355cf..c6cb28c097b9 100644 +--- a/pimd/pim_cmd_common.c ++++ b/pimd/pim_cmd_common.c +@@ -100,25 +100,13 @@ int pim_process_no_join_prune_cmd(struct vty *vty) + + int pim_process_spt_switchover_infinity_cmd(struct vty *vty) + { +- const char *vrfname; + char spt_plist_xpath[XPATH_MAXLEN]; + char spt_action_xpath[XPATH_MAXLEN]; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- + snprintf(spt_plist_xpath, sizeof(spt_plist_xpath), +- FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname, +- FRR_PIM_AF_XPATH_VAL); +- strlcat(spt_plist_xpath, "/spt-switchover/spt-infinity-prefix-list", +- sizeof(spt_plist_xpath)); +- ++ "%s/spt-switchover/spt-infinity-prefix-list", VTY_CURR_XPATH); + snprintf(spt_action_xpath, sizeof(spt_action_xpath), +- FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname, +- FRR_PIM_AF_XPATH_VAL); +- strlcat(spt_action_xpath, "/spt-switchover/spt-action", +- sizeof(spt_action_xpath)); ++ "%s/spt-switchover/spt-action", VTY_CURR_XPATH); + + if (yang_dnode_exists(vty->candidate_config->dnode, spt_plist_xpath)) + nb_cli_enqueue_change(vty, spt_plist_xpath, NB_OP_DESTROY, +@@ -132,55 +120,30 @@ int pim_process_spt_switchover_infinity_cmd(struct vty *vty) + int pim_process_spt_switchover_prefixlist_cmd(struct vty *vty, + const char *plist) + { +- const char *vrfname; + char spt_plist_xpath[XPATH_MAXLEN]; + char spt_action_xpath[XPATH_MAXLEN]; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- + snprintf(spt_plist_xpath, sizeof(spt_plist_xpath), +- FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname, +- FRR_PIM_AF_XPATH_VAL); +- strlcat(spt_plist_xpath, "/spt-switchover/spt-infinity-prefix-list", +- sizeof(spt_plist_xpath)); +- ++ "./spt-switchover/spt-infinity-prefix-list"); + snprintf(spt_action_xpath, sizeof(spt_action_xpath), +- FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname, +- FRR_PIM_AF_XPATH_VAL); +- strlcat(spt_action_xpath, "/spt-switchover/spt-action", +- sizeof(spt_action_xpath)); ++ "./spt-switchover/spt-action"); + + nb_cli_enqueue_change(vty, spt_action_xpath, NB_OP_MODIFY, + "PIM_SPT_INFINITY"); +- nb_cli_enqueue_change(vty, spt_plist_xpath, NB_OP_MODIFY, +- plist); ++ nb_cli_enqueue_change(vty, spt_plist_xpath, NB_OP_MODIFY, plist); + + return nb_cli_apply_changes(vty, NULL); + } + + int pim_process_no_spt_switchover_cmd(struct vty *vty) + { +- const char *vrfname; + char spt_plist_xpath[XPATH_MAXLEN]; + char spt_action_xpath[XPATH_MAXLEN]; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- + snprintf(spt_plist_xpath, sizeof(spt_plist_xpath), +- FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname, +- FRR_PIM_AF_XPATH_VAL); +- strlcat(spt_plist_xpath, "/spt-switchover/spt-infinity-prefix-list", +- sizeof(spt_plist_xpath)); +- ++ "./spt-switchover/spt-infinity-prefix-list"); + snprintf(spt_action_xpath, sizeof(spt_action_xpath), +- FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname, +- FRR_PIM_AF_XPATH_VAL); +- strlcat(spt_action_xpath, "/spt-switchover/spt-action", +- sizeof(spt_action_xpath)); ++ "./spt-switchover/spt-action"); + + nb_cli_enqueue_change(vty, spt_plist_xpath, NB_OP_DESTROY, NULL); + nb_cli_enqueue_change(vty, spt_action_xpath, NB_OP_MODIFY, +@@ -217,35 +180,20 @@ int pim_process_no_pim_packet_cmd(struct vty *vty) + + int pim_process_keepalivetimer_cmd(struct vty *vty, const char *kat) + { +- const char *vrfname; + char ka_timer_xpath[XPATH_MAXLEN]; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- +- snprintf(ka_timer_xpath, sizeof(ka_timer_xpath), FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); +- strlcat(ka_timer_xpath, "/keep-alive-timer", sizeof(ka_timer_xpath)); ++ snprintf(ka_timer_xpath, sizeof(ka_timer_xpath), "./keep-alive-timer"); + +- nb_cli_enqueue_change(vty, ka_timer_xpath, NB_OP_MODIFY, +- kat); ++ nb_cli_enqueue_change(vty, ka_timer_xpath, NB_OP_MODIFY, kat); + + return nb_cli_apply_changes(vty, NULL); + } + + int pim_process_no_keepalivetimer_cmd(struct vty *vty) + { +- const char *vrfname; + char ka_timer_xpath[XPATH_MAXLEN]; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- +- snprintf(ka_timer_xpath, sizeof(ka_timer_xpath), FRR_PIM_VRF_XPATH, +- "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL); +- strlcat(ka_timer_xpath, "/keep-alive-timer", sizeof(ka_timer_xpath)); ++ snprintf(ka_timer_xpath, sizeof(ka_timer_xpath), "./keep-alive-timer"); + + nb_cli_enqueue_change(vty, ka_timer_xpath, NB_OP_DESTROY, NULL); + +@@ -254,35 +202,25 @@ int pim_process_no_keepalivetimer_cmd(struct vty *vty) + + int pim_process_rp_kat_cmd(struct vty *vty, const char *rpkat) + { +- const char *vrfname; + char rp_ka_timer_xpath[XPATH_MAXLEN]; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- + snprintf(rp_ka_timer_xpath, sizeof(rp_ka_timer_xpath), +- FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname, +- FRR_PIM_AF_XPATH_VAL); +- strlcat(rp_ka_timer_xpath, "/rp-keep-alive-timer", +- sizeof(rp_ka_timer_xpath)); ++ "./rp-keep-alive-timer"); + +- nb_cli_enqueue_change(vty, rp_ka_timer_xpath, NB_OP_MODIFY, +- rpkat); ++ nb_cli_enqueue_change(vty, rp_ka_timer_xpath, NB_OP_MODIFY, rpkat); + + return nb_cli_apply_changes(vty, NULL); + } + + int pim_process_no_rp_kat_cmd(struct vty *vty) + { +- const char *vrfname; + char rp_ka_timer[6]; + char rp_ka_timer_xpath[XPATH_MAXLEN]; + uint v; + char rs_timer_xpath[XPATH_MAXLEN]; + +- snprintf(rs_timer_xpath, sizeof(rs_timer_xpath), +- FRR_PIM_ROUTER_XPATH, FRR_PIM_AF_XPATH_VAL); ++ snprintf(rs_timer_xpath, sizeof(rs_timer_xpath), FRR_PIM_ROUTER_XPATH, ++ FRR_PIM_AF_XPATH_VAL); + strlcat(rs_timer_xpath, "/register-suppress-time", + sizeof(rs_timer_xpath)); + +@@ -301,18 +239,10 @@ int pim_process_no_rp_kat_cmd(struct vty *vty) + v = UINT16_MAX; + snprintf(rp_ka_timer, sizeof(rp_ka_timer), "%u", v); + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- + snprintf(rp_ka_timer_xpath, sizeof(rp_ka_timer_xpath), +- FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname, +- FRR_PIM_AF_XPATH_VAL); +- strlcat(rp_ka_timer_xpath, "/rp-keep-alive-timer", +- sizeof(rp_ka_timer_xpath)); ++ "./rp-keep-alive-timer"); + +- nb_cli_enqueue_change(vty, rp_ka_timer_xpath, NB_OP_MODIFY, +- rp_ka_timer); ++ nb_cli_enqueue_change(vty, rp_ka_timer_xpath, NB_OP_MODIFY, rp_ka_timer); + + return nb_cli_apply_changes(vty, NULL); + } +@@ -531,9 +461,7 @@ int pim_process_no_ip_mroute_cmd(struct vty *vty, const char *interface, + int pim_process_rp_cmd(struct vty *vty, const char *rp_str, + const char *group_str) + { +- const char *vrfname; + char group_xpath[XPATH_MAXLEN]; +- char rp_xpath[XPATH_MAXLEN]; + int printed; + int result = 0; + struct prefix group; +@@ -575,14 +503,9 @@ int pim_process_rp_cmd(struct vty *vty, const char *rp_str, + } + #endif + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- +- snprintf(rp_xpath, sizeof(rp_xpath), FRR_PIM_STATIC_RP_XPATH, +- "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL, rp_str); + printed = snprintf(group_xpath, sizeof(group_xpath), +- "%s/group-list[.='%s']", rp_xpath, group_str); ++ "./" FRR_PIM_STATIC_RP_XPATH "/group-list[.='%s']", ++ rp_str, group_str); + + if (printed >= (int)(sizeof(group_xpath))) { + vty_out(vty, "Xpath too long (%d > %u)", printed + 1, +@@ -601,15 +524,10 @@ int pim_process_no_rp_cmd(struct vty *vty, const char *rp_str, + char group_xpath[XPATH_MAXLEN]; + char rp_xpath[XPATH_MAXLEN]; + int printed; +- const char *vrfname; + const struct lyd_node *group_dnode; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- +- snprintf(rp_xpath, sizeof(rp_xpath), FRR_PIM_STATIC_RP_XPATH, +- "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL, rp_str); ++ snprintf(rp_xpath, sizeof(rp_xpath), "%s/" FRR_PIM_STATIC_RP_XPATH, ++ VTY_CURR_XPATH, rp_str); + printed = snprintf(group_xpath, sizeof(group_xpath), + "%s/group-list[.='%s']", rp_xpath, group_str); + +@@ -636,16 +554,10 @@ int pim_process_no_rp_cmd(struct vty *vty, const char *rp_str, + int pim_process_rp_plist_cmd(struct vty *vty, const char *rp_str, + const char *prefix_list) + { +- const char *vrfname; + char rp_plist_xpath[XPATH_MAXLEN]; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- + snprintf(rp_plist_xpath, sizeof(rp_plist_xpath), +- FRR_PIM_STATIC_RP_XPATH, "frr-pim:pimd", "pim", vrfname, +- FRR_PIM_AF_XPATH_VAL, rp_str); ++ "./" FRR_PIM_STATIC_RP_XPATH, rp_str); + strlcat(rp_plist_xpath, "/prefix-list", sizeof(rp_plist_xpath)); + + nb_cli_enqueue_change(vty, rp_plist_xpath, NB_OP_MODIFY, prefix_list); +@@ -658,19 +570,12 @@ int pim_process_no_rp_plist_cmd(struct vty *vty, const char *rp_str, + { + char rp_xpath[XPATH_MAXLEN]; + char plist_xpath[XPATH_MAXLEN]; +- const char *vrfname; + const struct lyd_node *plist_dnode; + const char *plist; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- +- snprintf(rp_xpath, sizeof(rp_xpath), FRR_PIM_STATIC_RP_XPATH, +- "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL, rp_str); +- +- snprintf(plist_xpath, sizeof(plist_xpath), FRR_PIM_STATIC_RP_XPATH, +- "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL, rp_str); ++ snprintf(rp_xpath, sizeof(rp_xpath), "%s/" FRR_PIM_STATIC_RP_XPATH, ++ VTY_CURR_XPATH, rp_str); ++ snprintf(plist_xpath, sizeof(plist_xpath), "%s", rp_xpath); + strlcat(plist_xpath, "/prefix-list", sizeof(plist_xpath)); + + plist_dnode = yang_dnode_get(vty->candidate_config->dnode, plist_xpath); +@@ -679,7 +584,7 @@ int pim_process_no_rp_plist_cmd(struct vty *vty, const char *rp_str, + return NB_OK; + } + +- plist = yang_dnode_get_string(plist_dnode, "%s", plist_xpath); ++ plist = yang_dnode_get_string(plist_dnode, NULL); + if (strcmp(prefix_list, plist)) { + vty_out(vty, "%% Unable to find specified RP\n"); + return NB_OK; +@@ -3408,21 +3313,11 @@ int gm_process_no_last_member_query_interval_cmd(struct vty *vty) + int pim_process_ssmpingd_cmd(struct vty *vty, enum nb_operation operation, + const char *src_str) + { +- const char *vrfname; +- char ssmpingd_ip_xpath[XPATH_MAXLEN]; + char ssmpingd_src_ip_xpath[XPATH_MAXLEN]; + int printed; + +- vrfname = pim_cli_get_vrf_name(vty); +- if (vrfname == NULL) +- return CMD_WARNING_CONFIG_FAILED; +- +- snprintf(ssmpingd_ip_xpath, sizeof(ssmpingd_ip_xpath), +- FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname, +- FRR_PIM_AF_XPATH_VAL); + printed = snprintf(ssmpingd_src_ip_xpath, sizeof(ssmpingd_src_ip_xpath), +- "%s/ssm-pingd-source-ip[.='%s']", ssmpingd_ip_xpath, +- src_str); ++ "./ssm-pingd-source-ip[.='%s']", src_str); + if (printed >= (int)sizeof(ssmpingd_src_ip_xpath)) { + vty_out(vty, "Xpath too long (%d > %u)", printed + 1, + XPATH_MAXLEN); +@@ -5705,3 +5600,34 @@ int pim_show_bsm_db_helper(const char *vrf, struct vty *vty, bool uj) + + return CMD_SUCCESS; + } ++ ++int pim_router_config_write(struct vty *vty) ++{ ++ struct vrf *vrf; ++ struct pim_instance *pim; ++ int writes = 0; ++ char framestr[64] = { 0 }; ++ ++ RB_FOREACH (vrf, vrf_name_head, &vrfs_by_name) { ++ pim = vrf->info; ++ ++ if (!pim) ++ continue; ++ ++ snprintfrr(framestr, sizeof(framestr), "router %s", ++ PIM_AF_ROUTER); ++ if (vrf->vrf_id != VRF_DEFAULT) { ++ strlcat(framestr, " vrf ", sizeof(framestr)); ++ strlcat(framestr, vrf->name, sizeof(framestr)); ++ } ++ vty_frame(vty, "%s\n", framestr); ++ ++writes; ++ ++ writes += pim_global_config_write_worker(pim, vty); ++ ++ vty_endframe(vty, "exit\n"); ++ ++writes; ++ } ++ ++ return writes; ++} +diff --git a/pimd/pim_cmd_common.h b/pimd/pim_cmd_common.h +index e30203fad75b..da2e44be585b 100644 +--- a/pimd/pim_cmd_common.h ++++ b/pimd/pim_cmd_common.h +@@ -182,6 +182,8 @@ int pim_show_interface_traffic_helper(const char *vrf, const char *if_name, + void clear_pim_interfaces(struct pim_instance *pim); + void pim_show_bsr(struct pim_instance *pim, struct vty *vty, bool uj); + int pim_show_bsr_helper(const char *vrf, struct vty *vty, bool uj); ++int pim_router_config_write(struct vty *vty); ++ + /* + * Special Macro to allow us to get the correct pim_instance; + */ +diff --git a/pimd/pim_instance.c b/pimd/pim_instance.c +index b3410d15af72..a9eec9a9d25b 100644 +--- a/pimd/pim_instance.c ++++ b/pimd/pim_instance.c +@@ -201,6 +201,7 @@ static int pim_vrf_config_write(struct vty *vty) + { + struct vrf *vrf; + struct pim_instance *pim; ++ char spaces[10]; + + RB_FOREACH (vrf, vrf_name_head, &vrfs_by_name) { + pim = vrf->info; +@@ -208,10 +209,24 @@ static int pim_vrf_config_write(struct vty *vty) + if (!pim) + continue; + +- if (vrf->vrf_id != VRF_DEFAULT) ++ if (vrf->vrf_id != VRF_DEFAULT) { + vty_frame(vty, "vrf %s\n", vrf->name); +- +- pim_global_config_write_worker(pim, vty); ++ snprintf(spaces, sizeof(spaces), "%s", " "); ++ } else { ++ snprintf(spaces, sizeof(spaces), "%s", ""); ++ } ++ ++ /* Global IGMP/MLD configuration */ ++ if (pim->gm_watermark_limit != 0) { ++#if PIM_IPV == 4 ++ vty_out(vty, ++ "%s" PIM_AF_NAME " igmp watermark-warn %u\n", ++ spaces, pim->gm_watermark_limit); ++#else ++ vty_out(vty, "%s" PIM_AF_NAME " mld watermark-warn %u\n", ++ spaces, pim->gm_watermark_limit); ++#endif ++ } + + if (vrf->vrf_id != VRF_DEFAULT) + vty_endframe(vty, "exit-vrf\n!\n"); +diff --git a/pimd/pim_msdp.c b/pimd/pim_msdp.c +index 623c14bb0391..04b4d296ddbc 100644 +--- a/pimd/pim_msdp.c ++++ b/pimd/pim_msdp.c +@@ -1276,8 +1276,7 @@ static void pim_msdp_src_del(struct pim_msdp_mg *mg) + } + + /*********************** MSDP feature APIs *********************************/ +-int pim_msdp_config_write(struct pim_instance *pim, struct vty *vty, +- const char *spaces) ++int pim_msdp_config_write(struct pim_instance *pim, struct vty *vty) + { + struct pim_msdp_mg *mg; + struct listnode *mbrnode; +@@ -1292,14 +1291,14 @@ int pim_msdp_config_write(struct pim_instance *pim, struct vty *vty, + if (mg->src_ip.s_addr != INADDR_ANY) { + pim_inet4_dump("", mg->src_ip, src_str, + sizeof(src_str)); +- vty_out(vty, "%sip msdp mesh-group %s source %s\n", +- spaces, mg->mesh_group_name, src_str); ++ vty_out(vty, " msdp mesh-group %s source %s\n", ++ mg->mesh_group_name, src_str); + ++count; + } + + for (ALL_LIST_ELEMENTS_RO(mg->mbr_list, mbrnode, mbr)) { +- vty_out(vty, "%sip msdp mesh-group %s member %pI4\n", +- spaces, mg->mesh_group_name, &mbr->mbr_ip); ++ vty_out(vty, " msdp mesh-group %s member %pI4\n", ++ mg->mesh_group_name, &mbr->mbr_ip); + ++count; + } + } +@@ -1307,8 +1306,7 @@ int pim_msdp_config_write(struct pim_instance *pim, struct vty *vty, + return count; + } + +-bool pim_msdp_peer_config_write(struct vty *vty, struct pim_instance *pim, +- const char *spaces) ++bool pim_msdp_peer_config_write(struct vty *vty, struct pim_instance *pim) + { + struct pim_msdp_peer *mp; + struct listnode *node; +@@ -1319,8 +1317,8 @@ bool pim_msdp_peer_config_write(struct vty *vty, struct pim_instance *pim, + if (mp->flags & PIM_MSDP_PEERF_IN_GROUP) + continue; + +- vty_out(vty, "%sip msdp peer %pI4 source %pI4\n", spaces, +- &mp->peer, &mp->local); ++ vty_out(vty, " msdp peer %pI4 source %pI4\n", &mp->peer, ++ &mp->local); + written = true; + } + +diff --git a/pimd/pim_msdp.h b/pimd/pim_msdp.h +index ddc015f9b62b..80ca003dc595 100644 +--- a/pimd/pim_msdp.h ++++ b/pimd/pim_msdp.h +@@ -228,10 +228,8 @@ void pim_msdp_peer_pkt_rxed(struct pim_msdp_peer *mp); + void pim_msdp_peer_stop_tcp_conn(struct pim_msdp_peer *mp, bool chg_state); + void pim_msdp_peer_reset_tcp_conn(struct pim_msdp_peer *mp, const char *rc_str); + void pim_msdp_write(struct event *thread); +-int pim_msdp_config_write(struct pim_instance *pim, struct vty *vty, +- const char *spaces); +-bool pim_msdp_peer_config_write(struct vty *vty, struct pim_instance *pim, +- const char *spaces); ++int pim_msdp_config_write(struct pim_instance *pim, struct vty *vty); ++bool pim_msdp_peer_config_write(struct vty *vty, struct pim_instance *pim); + void pim_msdp_peer_pkt_txed(struct pim_msdp_peer *mp); + void pim_msdp_sa_ref(struct pim_instance *pim, struct pim_msdp_peer *mp, + pim_sgaddr *sg, struct in_addr rp); +@@ -339,14 +337,13 @@ static inline void pim_msdp_sa_local_del(struct pim_instance *pim, + } + + static inline int pim_msdp_config_write(struct pim_instance *pim, +- struct vty *vty, const char *spaces) ++ struct vty *vty) + { + return 0; + } + + static inline bool pim_msdp_peer_config_write(struct vty *vty, +- struct pim_instance *pim, +- const char *spaces) ++ struct pim_instance *pim) + { + return false; + } +diff --git a/pimd/pim_nb.h b/pimd/pim_nb.h +index 0321d076f0da..2d854d73de5e 100644 +--- a/pimd/pim_nb.h ++++ b/pimd/pim_nb.h +@@ -207,9 +207,6 @@ int routing_control_plane_protocols_name_validate( + "./frr-pim:pim/address-family[address-family='%s']/" \ + "mroute[source-addr='%s'][group-addr='%s']" + #define FRR_PIM_STATIC_RP_XPATH \ +- "/frr-routing:routing/control-plane-protocols/" \ +- "control-plane-protocol[type='%s'][name='%s'][vrf='%s']/" \ +- "frr-pim:pim/address-family[address-family='%s']/" \ + "frr-pim-rp:rp/static-rp/rp-list[rp-address='%s']" + #define FRR_GMP_INTERFACE_XPATH \ + "./frr-gmp:gmp/address-family[address-family='%s']" +@@ -218,6 +215,5 @@ int routing_control_plane_protocols_name_validate( + #define FRR_GMP_JOIN_XPATH \ + "./frr-gmp:gmp/address-family[address-family='%s']/" \ + "static-group[group-addr='%s'][source-addr='%s']" +-#define FRR_PIM_MSDP_XPATH FRR_PIM_VRF_XPATH "/msdp" + + #endif /* _FRR_PIM_NB_H_ */ +diff --git a/pimd/pim_rp.c b/pimd/pim_rp.c +index 49be9c0a7339..0f8940bb16d7 100644 +--- a/pimd/pim_rp.c ++++ b/pimd/pim_rp.c +@@ -1129,8 +1129,7 @@ int pim_rp_set_upstream_addr(struct pim_instance *pim, pim_addr *up, + return 1; + } + +-int pim_rp_config_write(struct pim_instance *pim, struct vty *vty, +- const char *spaces) ++int pim_rp_config_write(struct pim_instance *pim, struct vty *vty) + { + struct listnode *node; + struct rp_info *rp_info; +@@ -1146,13 +1145,11 @@ int pim_rp_config_write(struct pim_instance *pim, struct vty *vty, + + rp_addr = rp_info->rp.rpf_addr; + if (rp_info->plist) +- vty_out(vty, +- "%s" PIM_AF_NAME +- " pim rp %pPA prefix-list %s\n", +- spaces, &rp_addr, rp_info->plist); ++ vty_out(vty, " rp %pPA prefix-list %s\n", &rp_addr, ++ rp_info->plist); + else +- vty_out(vty, "%s" PIM_AF_NAME " pim rp %pPA %pFX\n", +- spaces, &rp_addr, &rp_info->group); ++ vty_out(vty, " rp %pPA %pFX\n", &rp_addr, ++ &rp_info->group); + count++; + } + +diff --git a/pimd/pim_rp.h b/pimd/pim_rp.h +index 9416a9a8a87e..32c6306740d6 100644 +--- a/pimd/pim_rp.h ++++ b/pimd/pim_rp.h +@@ -46,8 +46,7 @@ int pim_rp_change(struct pim_instance *pim, pim_addr new_rp_addr, + void pim_rp_prefix_list_update(struct pim_instance *pim, + struct prefix_list *plist); + +-int pim_rp_config_write(struct pim_instance *pim, struct vty *vty, +- const char *spaces); ++int pim_rp_config_write(struct pim_instance *pim, struct vty *vty); + + void pim_rp_setup(struct pim_instance *pim); + +diff --git a/pimd/pim_vty.c b/pimd/pim_vty.c +index 0f6547ee2e9a..1910a684957e 100644 +--- a/pimd/pim_vty.c ++++ b/pimd/pim_vty.c +@@ -172,89 +172,66 @@ int pim_global_config_write_worker(struct pim_instance *pim, struct vty *vty) + { + int writes = 0; + struct pim_ssm *ssm = pim->ssm_info; +- char spaces[10]; + +- if (pim->vrf->vrf_id == VRF_DEFAULT) +- snprintf(spaces, sizeof(spaces), "%s", ""); +- else +- snprintf(spaces, sizeof(spaces), "%s", " "); +- +- writes += pim_msdp_peer_config_write(vty, pim, spaces); +- writes += pim_msdp_config_write(pim, vty, spaces); ++ writes += pim_msdp_peer_config_write(vty, pim); ++ writes += pim_msdp_config_write(pim, vty); + + if (!pim->send_v6_secondary) { +- vty_out(vty, "%sno ip pim send-v6-secondary\n", spaces); ++ vty_out(vty, " no send-v6-secondary\n"); + ++writes; + } + +- writes += pim_rp_config_write(pim, vty, spaces); ++ writes += pim_rp_config_write(pim, vty); + + if (pim->vrf->vrf_id == VRF_DEFAULT) { + if (router->register_suppress_time + != PIM_REGISTER_SUPPRESSION_TIME_DEFAULT) { +- vty_out(vty, "%s" PIM_AF_NAME " pim register-suppress-time %d\n", +- spaces, router->register_suppress_time); ++ vty_out(vty, " register-suppress-time %d\n", ++ router->register_suppress_time); + ++writes; + } + if (router->t_periodic != PIM_DEFAULT_T_PERIODIC) { +- vty_out(vty, "%s" PIM_AF_NAME " pim join-prune-interval %d\n", +- spaces, router->t_periodic); ++ vty_out(vty, " join-prune-interval %d\n", ++ router->t_periodic); + ++writes; + } + + if (router->packet_process != PIM_DEFAULT_PACKET_PROCESS) { +- vty_out(vty, "%s" PIM_AF_NAME " pim packets %d\n", spaces, +- router->packet_process); ++ vty_out(vty, " packets %d\n", router->packet_process); + ++writes; + } + } + if (pim->keep_alive_time != PIM_KEEPALIVE_PERIOD) { +- vty_out(vty, "%s" PIM_AF_NAME " pim keep-alive-timer %d\n", +- spaces, pim->keep_alive_time); ++ vty_out(vty, " keep-alive-timer %d\n", pim->keep_alive_time); + ++writes; + } + if (pim->rp_keep_alive_time != (unsigned int)PIM_RP_KEEPALIVE_PERIOD) { +- vty_out(vty, "%s" PIM_AF_NAME " pim rp keep-alive-timer %d\n", +- spaces, pim->rp_keep_alive_time); ++ vty_out(vty, " rp keep-alive-timer %d\n", ++ pim->rp_keep_alive_time); + ++writes; + } + if (ssm->plist_name) { +- vty_out(vty, "%sip pim ssm prefix-list %s\n", spaces, +- ssm->plist_name); ++ vty_out(vty, " ssm prefix-list %s\n", ssm->plist_name); + ++writes; + } + if (pim->register_plist) { +- vty_out(vty, "%sip pim register-accept-list %s\n", spaces, +- pim->register_plist); ++ vty_out(vty, " register-accept-list %s\n", pim->register_plist); + ++writes; + } + if (pim->spt.switchover == PIM_SPT_INFINITY) { + if (pim->spt.plist) + vty_out(vty, +- "%s" PIM_AF_NAME " pim spt-switchover infinity-and-beyond prefix-list %s\n", +- spaces, pim->spt.plist); ++ " spt-switchover infinity-and-beyond prefix-list %s\n", ++ pim->spt.plist); + else +- vty_out(vty, +- "%s" PIM_AF_NAME " pim spt-switchover infinity-and-beyond\n", +- spaces); ++ vty_out(vty, " spt-switchover infinity-and-beyond\n"); + ++writes; + } + if (pim->ecmp_rebalance_enable) { +- vty_out(vty, "%sip pim ecmp rebalance\n", spaces); ++ vty_out(vty, " ecmp rebalance\n"); + ++writes; + } else if (pim->ecmp_enable) { +- vty_out(vty, "%sip pim ecmp\n", spaces); +- ++writes; +- } +- +- if (pim->gm_watermark_limit != 0) { +-#if PIM_IPV == 4 +- vty_out(vty, "%s" PIM_AF_NAME " igmp watermark-warn %u\n", +- spaces, pim->gm_watermark_limit); +-#else +- vty_out(vty, "%s" PIM_AF_NAME " mld watermark-warn %u\n", +- spaces, pim->gm_watermark_limit); +-#endif ++ vty_out(vty, " ecmp\n"); + ++writes; + } + +@@ -263,8 +240,7 @@ int pim_global_config_write_worker(struct pim_instance *pim, struct vty *vty) + struct ssmpingd_sock *ss; + ++writes; + for (ALL_LIST_ELEMENTS_RO(pim->ssmpingd_list, node, ss)) { +- vty_out(vty, "%s" PIM_AF_NAME " ssmpingd %pPA\n", +- spaces, &ss->source_addr); ++ vty_out(vty, " ssmpingd %pPA\n", &ss->source_addr); + ++writes; + } + } +@@ -272,8 +248,8 @@ int pim_global_config_write_worker(struct pim_instance *pim, struct vty *vty) + if (pim->msdp.hold_time != PIM_MSDP_PEER_HOLD_TIME + || pim->msdp.keep_alive != PIM_MSDP_PEER_KA_TIME + || pim->msdp.connection_retry != PIM_MSDP_PEER_CONNECT_RETRY_TIME) { +- vty_out(vty, "%sip msdp timers %u %u", spaces, +- pim->msdp.hold_time, pim->msdp.keep_alive); ++ vty_out(vty, " msdp timers %u %u", pim->msdp.hold_time, ++ pim->msdp.keep_alive); + if (pim->msdp.connection_retry + != PIM_MSDP_PEER_CONNECT_RETRY_TIME) + vty_out(vty, " %u", pim->msdp.connection_retry); +diff --git a/vtysh/vtysh.c b/vtysh/vtysh.c +index 573320667c33..1f6dde83c148 100644 +--- a/vtysh/vtysh.c ++++ b/vtysh/vtysh.c +@@ -1677,6 +1677,24 @@ static struct cmd_node bfd_profile_node = { + }; + #endif /* HAVE_BFDD */ + ++#ifdef HAVE_PIMD ++static struct cmd_node pim_node = { ++ .name = "pim", ++ .node = PIM_NODE, ++ .parent_node = CONFIG_NODE, ++ .prompt = "%s(config-pim)# ", ++}; ++#endif /* HAVE_PIMD */ ++ ++#ifdef HAVE_PIM6D ++static struct cmd_node pim6_node = { ++ .name = "pim6", ++ .node = PIM6_NODE, ++ .parent_node = CONFIG_NODE, ++ .prompt = "%s(config-pim6)# ", ++}; ++#endif /* HAVE_PIM6D */ ++ + /* Defined in lib/vty.c */ + extern struct cmd_node vty_node; + +@@ -2413,6 +2431,30 @@ DEFUNSH(VTYSH_BFDD, bfd_profile_enter, bfd_profile_enter_cmd, + } + #endif /* HAVE_BFDD */ + ++#ifdef HAVE_PIMD ++DEFUNSH(VTYSH_PIMD, router_pim, router_pim_cmd, ++ "router pim [vrf NAME]", ++ ROUTER_STR ++ "Start PIM configuration\n" ++ VRF_CMD_HELP_STR) ++{ ++ vty->node = PIM_NODE; ++ return CMD_SUCCESS; ++} ++#endif /* HAVE_PIMD */ ++ ++#ifdef HAVE_PIM6D ++DEFUNSH(VTYSH_PIM6D, router_pim6, router_pim6_cmd, ++ "router pim6 [vrf NAME]", ++ ROUTER_STR ++ "Start PIMv6 configuration\n" ++ VRF_CMD_HELP_STR) ++{ ++ vty->node = PIM6_NODE; ++ return CMD_SUCCESS; ++} ++#endif /* HAVE_PIM6D*/ ++ + DEFUNSH(VTYSH_ALL, vtysh_line_vty, vtysh_line_vty_cmd, "line vty", + "Configure a terminal line\n" + "Virtual terminal\n") +@@ -2826,6 +2868,34 @@ DEFUNSH(VTYSH_PATHD, vtysh_quit_pathd, vtysh_quit_pathd_cmd, "quit", + } + #endif /* HAVE_PATHD */ + ++#ifdef HAVE_PIMD ++DEFUNSH(VTYSH_PIMD, vtysh_exit_pimd, vtysh_exit_pimd_cmd, "exit", ++ "Exit current mode and down to previous mode\n") ++{ ++ return vtysh_exit(vty); ++} ++ ++DEFUNSH(VTYSH_PIMD, vtysh_quit_pimd, vtysh_quit_pimd_cmd, "quit", ++ "Exit current mode and down to previous mode\n") ++{ ++ return vtysh_exit_pimd(self, vty, argc, argv); ++} ++#endif /* HAVE_PIMD */ ++ ++#ifdef HAVE_PIM6D ++DEFUNSH(VTYSH_PIM6D, vtysh_exit_pim6d, vtysh_exit_pim6d_cmd, "exit", ++ "Exit current mode and down to previous mode\n") ++{ ++ return vtysh_exit(vty); ++} ++ ++DEFUNSH(VTYSH_PIM6D, vtysh_quit_pim6d, vtysh_quit_pim6d_cmd, "quit", ++ "Exit current mode and down to previous mode\n") ++{ ++ return vtysh_exit_pim6d(self, vty, argc, argv); ++} ++#endif /* HAVE_PIM6D */ ++ + DEFUNSH(VTYSH_ALL, vtysh_exit_line_vty, vtysh_exit_line_vty_cmd, "exit", + "Exit current mode and down to previous mode\n") + { +@@ -5293,6 +5363,25 @@ void vtysh_init_vty(void) + install_element(INTERFACE_NODE, &vtysh_exit_interface_cmd); + install_element(INTERFACE_NODE, &vtysh_quit_interface_cmd); + ++ /* pimd */ ++#ifdef HAVE_PIMD ++ install_node(&pim_node); ++ install_element(CONFIG_NODE, &router_pim_cmd); ++ install_element(PIM_NODE, &vtysh_exit_pimd_cmd); ++ install_element(PIM_NODE, &vtysh_quit_pimd_cmd); ++ install_element(PIM_NODE, &vtysh_end_all_cmd); ++#endif /* HAVE_PIMD */ ++ ++ /* pim6d */ ++#ifdef HAVE_PIM6D ++ install_node(&pim6_node); ++ install_element(CONFIG_NODE, &router_pim6_cmd); ++ install_element(PIM6_NODE, &vtysh_exit_pim6d_cmd); ++ install_element(PIM6_NODE, &vtysh_quit_pim6d_cmd); ++ install_element(PIM6_NODE, &vtysh_end_all_cmd); ++#endif /* HAVE_PIM6D */ ++ ++ /* zebra and all, cont. */ + install_node(&link_params_node); + install_element(INTERFACE_NODE, &vtysh_link_params_cmd); + install_element(LINK_PARAMS_NODE, &no_link_params_enable_cmd); +diff --git a/vtysh/vtysh_config.c b/vtysh/vtysh_config.c +index c207e4d42759..8f7cd84818c6 100644 +--- a/vtysh/vtysh_config.c ++++ b/vtysh/vtysh_config.c +@@ -497,6 +497,11 @@ void vtysh_config_parse_line(void *arg, const char *line) + config = config_get(BFD_NODE, line); + else if (strncmp(line, "rpki", strlen("rpki")) == 0) + config = config_get(RPKI_NODE, line); ++ else if (strncmp(line, "router pim", strlen("router pim")) == 0) ++ config = config_get(PIM_NODE, line); ++ else if (strncmp(line, "router pim6", strlen("router pim6")) == ++ 0) ++ config = config_get(PIM6_NODE, line); + else { + if (strncmp(line, "log", strlen("log")) == 0 || + strncmp(line, "hostname", strlen("hostname")) == 0 || diff --git a/src/sonic-frr/patch/0078-vtysh-de-conditionalize-and-reorder-install-node.patch b/src/sonic-frr/patch/0078-vtysh-de-conditionalize-and-reorder-install-node.patch new file mode 100644 index 00000000000..b43906c8cc4 --- /dev/null +++ b/src/sonic-frr/patch/0078-vtysh-de-conditionalize-and-reorder-install-node.patch @@ -0,0 +1,790 @@ +From e26c580588b3689463c76aa96888147e53a48885 Mon Sep 17 00:00:00 2001 +From: David Lamparter +Date: Sat, 20 Jul 2024 18:30:31 -0700 +Subject: [PATCH] vtysh: de-conditionalize and reorder install_node + +There is entirely no point to these being conditional. And pull them up +so the upcoming pre-parse code can work on a clean slate. + +Signed-off-by: David Lamparter +--- + lib/command.h | 4 + + vtysh/vtysh.c | 182 ++++++++++++++++++--------------------------- + vtysh/vtysh_main.c | 1 - + 3 files changed, 78 insertions(+), 109 deletions(-) + +diff --git a/lib/command.h b/lib/command.h +index 57e3b9cda0b7..f364f1e8fa2a 100644 +--- a/lib/command.h ++++ b/lib/command.h +@@ -252,6 +252,8 @@ struct cmd_node { + /* Argc max counts. */ + #define CMD_ARGC_MAX 256 + ++/* clang-format off */ ++ + /* helper defines for end-user DEFUN* macros */ + #define DEFUN_CMD_ELEMENT(funcname, cmdname, cmdstr, helpstr, attrs, dnum) \ + static const struct cmd_element cmdname = { \ +@@ -376,6 +378,8 @@ struct cmd_node { + #define ALIAS_YANG(funcname, cmdname, cmdstr, helpstr) \ + ALIAS_ATTR(funcname, cmdname, cmdstr, helpstr, CMD_ATTR_YANG) + ++/* clang-format on */ ++ + /* Some macroes */ + + /* +diff --git a/vtysh/vtysh.c b/vtysh/vtysh.c +index e657aa8af0ac..c43e1909e3e1 100644 +--- a/vtysh/vtysh.c ++++ b/vtysh/vtysh.c +@@ -1161,14 +1161,12 @@ static char **new_completion(const char *text, int start, int end) + } + + /* Vty node structures. */ +-#ifdef HAVE_BGPD + static struct cmd_node bgp_node = { + .name = "bgp", + .node = BGP_NODE, + .parent_node = CONFIG_NODE, + .prompt = "%s(config-router)# ", + }; +-#endif /* HAVE_BGPD */ + + static struct cmd_node rip_node = { + .name = "rip", +@@ -1177,7 +1175,6 @@ static struct cmd_node rip_node = { + .prompt = "%s(config-router)# ", + }; + +-#ifdef HAVE_ISISD + static struct cmd_node isis_node = { + .name = "isis", + .node = ISIS_NODE, +@@ -1205,16 +1202,13 @@ static struct cmd_node isis_srv6_node_msd_node = { + .parent_node = ISIS_SRV6_NODE, + .prompt = "%s(config-router-srv6-node-msd)# ", + }; +-#endif /* HAVE_ISISD */ + +-#ifdef HAVE_FABRICD + static struct cmd_node openfabric_node = { + .name = "openfabric", + .node = OPENFABRIC_NODE, + .parent_node = CONFIG_NODE, + .prompt = "%s(config-router)# ", + }; +-#endif /* HAVE_FABRICD */ + + static struct cmd_node interface_node = { + .name = "interface", +@@ -1237,7 +1231,6 @@ static struct cmd_node segment_routing_node = { + .prompt = "%s(config-sr)# ", + }; + +-#if defined(HAVE_PATHD) + static struct cmd_node sr_traffic_eng_node = { + .name = "sr traffic-eng", + .node = SR_TRAFFIC_ENG_NODE, +@@ -1293,7 +1286,6 @@ static struct cmd_node pcep_pce_config_node = { + .parent_node = PCEP_NODE, + .prompt = "%s(pcep-sr-te-pcep-pce-config)# ", + }; +-#endif /* HAVE_PATHD */ + + static struct cmd_node vrf_node = { + .name = "vrf", +@@ -1365,14 +1357,12 @@ static struct cmd_node srv6_sid_format_uncompressed_f4024_node = { + .prompt = "%s(config-srv6-format)# " + }; + +-#ifdef HAVE_PBRD + static struct cmd_node pbr_map_node = { + .name = "pbr-map", + .node = PBRMAP_NODE, + .parent_node = CONFIG_NODE, + .prompt = "%s(config-pbr-map)# ", + }; +-#endif /* HAVE_PBRD */ + + static struct cmd_node zebra_node = { + .name = "zebra", +@@ -1381,7 +1371,6 @@ static struct cmd_node zebra_node = { + .prompt = "%s(config-router)# ", + }; + +-#ifdef HAVE_BGPD + static struct cmd_node bgp_vpnv4_node = { + .name = "bgp vpnv4", + .node = BGP_VPNV4_NODE, +@@ -1477,7 +1466,6 @@ static struct cmd_node bgp_ipv6l_node = { + .no_xpath = true, + }; + +-#ifdef ENABLE_BGP_VNC + static struct cmd_node bgp_vnc_defaults_node = { + .name = "bgp vnc defaults", + .node = BGP_VNC_DEFAULTS_NODE, +@@ -1505,7 +1493,6 @@ static struct cmd_node bgp_vnc_l2_group_node = { + .parent_node = BGP_NODE, + .prompt = "%s(config-router-vnc-l2-group)# ", + }; +-#endif /* ENABLE_BGP_VNC */ + + static struct cmd_node bmp_node = { + .name = "bmp", +@@ -1520,34 +1507,27 @@ static struct cmd_node bgp_srv6_node = { + .parent_node = BGP_NODE, + .prompt = "%s(config-router-srv6)# ", + }; +-#endif /* HAVE_BGPD */ + +-#ifdef HAVE_OSPFD + static struct cmd_node ospf_node = { + .name = "ospf", + .node = OSPF_NODE, + .parent_node = CONFIG_NODE, + .prompt = "%s(config-router)# ", + }; +-#endif /* HAVE_OSPFD */ + +-#ifdef HAVE_EIGRPD + static struct cmd_node eigrp_node = { + .name = "eigrp", + .node = EIGRP_NODE, + .parent_node = CONFIG_NODE, + .prompt = "%s(config-router)# ", + }; +-#endif /* HAVE_EIGRPD */ + +-#ifdef HAVE_BABELD + static struct cmd_node babel_node = { + .name = "babel", + .node = BABEL_NODE, + .parent_node = CONFIG_NODE, + .prompt = "%s(config-router)# ", + }; +-#endif /* HAVE_BABELD */ + + static struct cmd_node ripng_node = { + .name = "ripng", +@@ -1556,16 +1536,13 @@ static struct cmd_node ripng_node = { + .prompt = "%s(config-router)# ", + }; + +-#ifdef HAVE_OSPF6D + static struct cmd_node ospf6_node = { + .name = "ospf6", + .node = OSPF6_NODE, + .parent_node = CONFIG_NODE, + .prompt = "%s(config-ospf6)# ", + }; +-#endif /* HAVE_OSPF6D */ + +-#ifdef HAVE_LDPD + static struct cmd_node ldp_node = { + .name = "ldp", + .node = LDP_NODE, +@@ -1614,7 +1591,6 @@ static struct cmd_node ldp_pseudowire_node = { + .parent_node = LDP_L2VPN_NODE, + .prompt = "%s(config-l2vpn-pw)# ", + }; +-#endif /* HAVE_LDPD */ + + static struct cmd_node keychain_node = { + .name = "keychain", +@@ -1637,7 +1613,6 @@ struct cmd_node link_params_node = { + .prompt = "%s(config-link-params)# ", + }; + +-#ifdef HAVE_BGPD + static struct cmd_node rpki_node = { + .name = "rpki", + .node = RPKI_NODE, +@@ -1652,9 +1627,6 @@ static struct cmd_node rpki_vrf_node = { + .prompt = "%s(config-vrf-rpki)# ", + }; + +-#endif /* HAVE_BGPD */ +- +-#if HAVE_BFDD > 0 + static struct cmd_node bfd_node = { + .name = "bfd", + .node = BFD_NODE, +@@ -1675,25 +1647,20 @@ static struct cmd_node bfd_profile_node = { + .parent_node = BFD_NODE, + .prompt = "%s(config-bfd-profile)# ", + }; +-#endif /* HAVE_BFDD */ + +-#ifdef HAVE_PIMD + static struct cmd_node pim_node = { + .name = "pim", + .node = PIM_NODE, + .parent_node = CONFIG_NODE, + .prompt = "%s(config-pim)# ", + }; +-#endif /* HAVE_PIMD */ + +-#ifdef HAVE_PIM6D + static struct cmd_node pim6_node = { + .name = "pim6", + .node = PIM6_NODE, + .parent_node = CONFIG_NODE, + .prompt = "%s(config-pim6)# ", + }; +-#endif /* HAVE_PIM6D */ + + /* Defined in lib/vty.c */ + extern struct cmd_node vty_node; +@@ -4954,15 +4921,87 @@ void vtysh_init_vty(void) + cmd_init(0); + cmd_variable_handler_register(vtysh_var_handler); + ++ install_node(&bgp_node); ++ install_node(&babel_node); ++ install_node(&bgp_vpnv4_node); ++ install_node(&bgp_vpnv6_node); ++ install_node(&bgp_flowspecv4_node); ++ install_node(&bgp_flowspecv6_node); ++ install_node(&bgp_ipv4_node); ++ install_node(&bgp_ipv4m_node); ++ install_node(&bgp_ipv4l_node); ++ install_node(&bgp_ipv6_node); ++ install_node(&bgp_ipv6m_node); ++ install_node(&bgp_ipv6l_node); ++ install_node(&bgp_vrf_policy_node); ++ install_node(&bgp_vnc_defaults_node); ++ install_node(&bgp_vnc_nve_group_node); ++ install_node(&bgp_vnc_l2_group_node); ++ install_node(&bgp_evpn_node); ++ install_node(&bgp_evpn_vni_node); ++ install_node(&rpki_node); ++ install_node(&bmp_node); ++ install_node(&bgp_srv6_node); ++ install_node(&rip_node); ++ install_node(&ripng_node); ++ install_node(&ospf_node); ++ install_node(&ospf6_node); ++ install_node(&ldp_node); ++ install_node(&ldp_ipv4_node); ++ install_node(&ldp_ipv6_node); ++ install_node(&ldp_ipv4_iface_node); ++ install_node(&ldp_ipv6_iface_node); ++ install_node(&ldp_l2vpn_node); ++ install_node(&ldp_pseudowire_node); ++ install_node(&eigrp_node); ++ install_node(&isis_node); ++ install_node(&isis_flex_algo_node); ++ install_node(&isis_srv6_node); ++ install_node(&isis_srv6_node_msd_node); ++ install_node(&openfabric_node); ++ install_node(&pbr_map_node); ++ install_node(&bfd_node); ++ install_node(&bfd_peer_node); ++ install_node(&bfd_profile_node); ++ install_node(&segment_routing_node); ++ install_node(&sr_traffic_eng_node); ++ install_node(&srte_segment_list_node); ++ install_node(&srte_policy_node); ++ install_node(&srte_candidate_dyn_node); ++ install_node(&pcep_node); ++ install_node(&pcep_pcc_node); ++ install_node(&pcep_pce_node); ++ install_node(&pcep_pce_config_node); ++ install_node(&keychain_node); ++ install_node(&keychain_key_node); ++ install_node(&nh_group_node); ++ install_node(&zebra_node); ++ install_node(&interface_node); ++ install_node(&pim_node); ++ install_node(&pim6_node); ++ install_node(&link_params_node); ++ install_node(&pw_node); ++ install_node(&vrf_node); ++ install_node(&rpki_vrf_node); ++ install_node(&rmap_node); ++ install_node(&vty_node); ++ install_node(&srv6_node); ++ install_node(&srv6_locs_node); ++ install_node(&srv6_loc_node); ++ install_node(&srv6_encap_node); ++ install_node(&srv6_sid_formats_node); ++ install_node(&srv6_sid_format_usid_f3216_node); ++ install_node(&srv6_sid_format_uncompressed_f4024_node); ++ ++ vtysh_init_cmd(); ++ + /* bgpd */ + #ifdef HAVE_BGPD +- install_node(&bgp_node); + install_element(CONFIG_NODE, &router_bgp_cmd); + install_element(BGP_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_NODE, &vtysh_quit_bgpd_cmd); + install_element(BGP_NODE, &vtysh_end_all_cmd); + +- install_node(&bgp_vpnv4_node); + install_element(BGP_NODE, &address_family_ipv4_vpn_cmd); + #ifdef KEEP_OLD_VPN_COMMANDS + install_element(BGP_NODE, &address_family_vpnv4_cmd); +@@ -4972,7 +5011,6 @@ void vtysh_init_vty(void) + install_element(BGP_VPNV4_NODE, &vtysh_end_all_cmd); + install_element(BGP_VPNV4_NODE, &exit_address_family_cmd); + +- install_node(&bgp_vpnv6_node); + install_element(BGP_NODE, &address_family_ipv6_vpn_cmd); + #ifdef KEEP_OLD_VPN_COMMANDS + install_element(BGP_NODE, &address_family_vpnv6_cmd); +@@ -4982,56 +5020,48 @@ void vtysh_init_vty(void) + install_element(BGP_VPNV6_NODE, &vtysh_end_all_cmd); + install_element(BGP_VPNV6_NODE, &exit_address_family_cmd); + +- install_node(&bgp_flowspecv4_node); + install_element(BGP_NODE, &address_family_flowspecv4_cmd); + install_element(BGP_FLOWSPECV4_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_FLOWSPECV4_NODE, &vtysh_quit_bgpd_cmd); + install_element(BGP_FLOWSPECV4_NODE, &vtysh_end_all_cmd); + install_element(BGP_FLOWSPECV4_NODE, &exit_address_family_cmd); + +- install_node(&bgp_flowspecv6_node); + install_element(BGP_NODE, &address_family_flowspecv6_cmd); + install_element(BGP_FLOWSPECV6_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_FLOWSPECV6_NODE, &vtysh_quit_bgpd_cmd); + install_element(BGP_FLOWSPECV6_NODE, &vtysh_end_all_cmd); + install_element(BGP_FLOWSPECV6_NODE, &exit_address_family_cmd); + +- install_node(&bgp_ipv4_node); + install_element(BGP_NODE, &address_family_ipv4_cmd); + install_element(BGP_IPV4_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_IPV4_NODE, &vtysh_quit_bgpd_cmd); + install_element(BGP_IPV4_NODE, &vtysh_end_all_cmd); + install_element(BGP_IPV4_NODE, &exit_address_family_cmd); + +- install_node(&bgp_ipv4m_node); + install_element(BGP_NODE, &address_family_ipv4_multicast_cmd); + install_element(BGP_IPV4M_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_IPV4M_NODE, &vtysh_quit_bgpd_cmd); + install_element(BGP_IPV4M_NODE, &vtysh_end_all_cmd); + install_element(BGP_IPV4M_NODE, &exit_address_family_cmd); + +- install_node(&bgp_ipv4l_node); + install_element(BGP_NODE, &address_family_ipv4_labeled_unicast_cmd); + install_element(BGP_IPV4L_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_IPV4L_NODE, &vtysh_quit_bgpd_cmd); + install_element(BGP_IPV4L_NODE, &vtysh_end_all_cmd); + install_element(BGP_IPV4L_NODE, &exit_address_family_cmd); + +- install_node(&bgp_ipv6_node); + install_element(BGP_NODE, &address_family_ipv6_cmd); + install_element(BGP_IPV6_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_IPV6_NODE, &vtysh_quit_bgpd_cmd); + install_element(BGP_IPV6_NODE, &vtysh_end_all_cmd); + install_element(BGP_IPV6_NODE, &exit_address_family_cmd); + +- install_node(&bgp_ipv6m_node); + install_element(BGP_NODE, &address_family_ipv6_multicast_cmd); + install_element(BGP_IPV6M_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_IPV6M_NODE, &vtysh_quit_bgpd_cmd); + install_element(BGP_IPV6M_NODE, &vtysh_end_all_cmd); + install_element(BGP_IPV6M_NODE, &exit_address_family_cmd); + +- install_node(&bgp_ipv6l_node); + install_element(BGP_NODE, &address_family_ipv6_labeled_unicast_cmd); + install_element(BGP_IPV6L_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_IPV6L_NODE, &vtysh_quit_bgpd_cmd); +@@ -5039,28 +5069,24 @@ void vtysh_init_vty(void) + install_element(BGP_IPV6L_NODE, &exit_address_family_cmd); + + #if defined(ENABLE_BGP_VNC) +- install_node(&bgp_vrf_policy_node); + install_element(BGP_NODE, &vnc_vrf_policy_cmd); + install_element(BGP_VRF_POLICY_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_VRF_POLICY_NODE, &vtysh_quit_bgpd_cmd); + install_element(BGP_VRF_POLICY_NODE, &vtysh_end_all_cmd); + install_element(BGP_VRF_POLICY_NODE, &exit_vrf_policy_cmd); + +- install_node(&bgp_vnc_defaults_node); + install_element(BGP_NODE, &vnc_defaults_cmd); + install_element(BGP_VNC_DEFAULTS_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_VNC_DEFAULTS_NODE, &vtysh_quit_bgpd_cmd); + install_element(BGP_VNC_DEFAULTS_NODE, &vtysh_end_all_cmd); + install_element(BGP_VNC_DEFAULTS_NODE, &exit_vnc_config_cmd); + +- install_node(&bgp_vnc_nve_group_node); + install_element(BGP_NODE, &vnc_nve_group_cmd); + install_element(BGP_VNC_NVE_GROUP_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_VNC_NVE_GROUP_NODE, &vtysh_quit_bgpd_cmd); + install_element(BGP_VNC_NVE_GROUP_NODE, &vtysh_end_all_cmd); + install_element(BGP_VNC_NVE_GROUP_NODE, &exit_vnc_config_cmd); + +- install_node(&bgp_vnc_l2_group_node); + install_element(BGP_NODE, &vnc_l2_group_cmd); + install_element(BGP_VNC_L2_GROUP_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_VNC_L2_GROUP_NODE, &vtysh_quit_bgpd_cmd); +@@ -5068,33 +5094,28 @@ void vtysh_init_vty(void) + install_element(BGP_VNC_L2_GROUP_NODE, &exit_vnc_config_cmd); + #endif + +- install_node(&bgp_evpn_node); + install_element(BGP_NODE, &address_family_evpn_cmd); + install_element(BGP_EVPN_NODE, &vtysh_quit_bgpd_cmd); + install_element(BGP_EVPN_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_EVPN_NODE, &vtysh_end_all_cmd); + install_element(BGP_EVPN_NODE, &exit_address_family_cmd); + +- install_node(&bgp_evpn_vni_node); + install_element(BGP_EVPN_NODE, &bgp_evpn_vni_cmd); + install_element(BGP_EVPN_VNI_NODE, &vtysh_exit_bgpd_cmd); + install_element(BGP_EVPN_VNI_NODE, &vtysh_quit_bgpd_cmd); + install_element(BGP_EVPN_VNI_NODE, &vtysh_end_all_cmd); + install_element(BGP_EVPN_VNI_NODE, &exit_vni_cmd); + +- install_node(&rpki_node); + install_element(CONFIG_NODE, &rpki_cmd); + install_element(RPKI_NODE, &rpki_exit_cmd); + install_element(RPKI_NODE, &rpki_quit_cmd); + install_element(RPKI_NODE, &vtysh_end_all_cmd); + +- install_node(&bmp_node); + install_element(BGP_NODE, &bmp_targets_cmd); + install_element(BMP_NODE, &bmp_exit_cmd); + install_element(BMP_NODE, &bmp_quit_cmd); + install_element(BMP_NODE, &vtysh_end_all_cmd); + +- install_node(&bgp_srv6_node); + install_element(BGP_NODE, &bgp_srv6_cmd); + install_element(BGP_SRV6_NODE, &exit_bgp_srv6_cmd); + install_element(BGP_SRV6_NODE, &quit_bgp_srv6_cmd); +@@ -5102,7 +5123,6 @@ void vtysh_init_vty(void) + #endif /* HAVE_BGPD */ + + /* ripd */ +- install_node(&rip_node); + #ifdef HAVE_RIPD + install_element(CONFIG_NODE, &router_rip_cmd); + install_element(RIP_NODE, &vtysh_exit_ripd_cmd); +@@ -5111,7 +5131,6 @@ void vtysh_init_vty(void) + #endif /* HAVE_RIPD */ + + /* ripngd */ +- install_node(&ripng_node); + #ifdef HAVE_RIPNGD + install_element(CONFIG_NODE, &router_ripng_cmd); + install_element(RIPNG_NODE, &vtysh_exit_ripngd_cmd); +@@ -5121,7 +5140,6 @@ void vtysh_init_vty(void) + + /* ospfd */ + #ifdef HAVE_OSPFD +- install_node(&ospf_node); + install_element(CONFIG_NODE, &router_ospf_cmd); + install_element(OSPF_NODE, &vtysh_exit_ospfd_cmd); + install_element(OSPF_NODE, &vtysh_quit_ospfd_cmd); +@@ -5130,7 +5148,6 @@ void vtysh_init_vty(void) + + /* ospf6d */ + #ifdef HAVE_OSPF6D +- install_node(&ospf6_node); + install_element(CONFIG_NODE, &router_ospf6_cmd); + install_element(OSPF6_NODE, &vtysh_exit_ospf6d_cmd); + install_element(OSPF6_NODE, &vtysh_quit_ospf6d_cmd); +@@ -5139,45 +5156,38 @@ void vtysh_init_vty(void) + + /* ldpd */ + #if defined(HAVE_LDPD) +- install_node(&ldp_node); + install_element(CONFIG_NODE, &ldp_mpls_ldp_cmd); + install_element(LDP_NODE, &vtysh_exit_ldpd_cmd); + install_element(LDP_NODE, &vtysh_quit_ldpd_cmd); + install_element(LDP_NODE, &vtysh_end_all_cmd); + +- install_node(&ldp_ipv4_node); + install_element(LDP_NODE, &ldp_address_family_ipv4_cmd); + install_element(LDP_IPV4_NODE, &vtysh_exit_ldpd_cmd); + install_element(LDP_IPV4_NODE, &vtysh_quit_ldpd_cmd); + install_element(LDP_IPV4_NODE, &ldp_exit_address_family_cmd); + install_element(LDP_IPV4_NODE, &vtysh_end_all_cmd); + +- install_node(&ldp_ipv6_node); + install_element(LDP_NODE, &ldp_address_family_ipv6_cmd); + install_element(LDP_IPV6_NODE, &vtysh_exit_ldpd_cmd); + install_element(LDP_IPV6_NODE, &vtysh_quit_ldpd_cmd); + install_element(LDP_IPV6_NODE, &ldp_exit_address_family_cmd); + install_element(LDP_IPV6_NODE, &vtysh_end_all_cmd); + +- install_node(&ldp_ipv4_iface_node); + install_element(LDP_IPV4_NODE, &ldp_interface_ifname_cmd); + install_element(LDP_IPV4_IFACE_NODE, &vtysh_exit_ldpd_cmd); + install_element(LDP_IPV4_IFACE_NODE, &vtysh_quit_ldpd_cmd); + install_element(LDP_IPV4_IFACE_NODE, &vtysh_end_all_cmd); + +- install_node(&ldp_ipv6_iface_node); + install_element(LDP_IPV6_NODE, &ldp_interface_ifname_cmd); + install_element(LDP_IPV6_IFACE_NODE, &vtysh_exit_ldpd_cmd); + install_element(LDP_IPV6_IFACE_NODE, &vtysh_quit_ldpd_cmd); + install_element(LDP_IPV6_IFACE_NODE, &vtysh_end_all_cmd); + +- install_node(&ldp_l2vpn_node); + install_element(CONFIG_NODE, &ldp_l2vpn_word_type_vpls_cmd); + install_element(LDP_L2VPN_NODE, &vtysh_exit_ldpd_cmd); + install_element(LDP_L2VPN_NODE, &vtysh_quit_ldpd_cmd); + install_element(LDP_L2VPN_NODE, &vtysh_end_all_cmd); + +- install_node(&ldp_pseudowire_node); + install_element(LDP_L2VPN_NODE, &ldp_member_pseudowire_ifname_cmd); + install_element(LDP_PSEUDOWIRE_NODE, &vtysh_exit_ldpd_cmd); + install_element(LDP_PSEUDOWIRE_NODE, &vtysh_quit_ldpd_cmd); +@@ -5186,7 +5196,6 @@ void vtysh_init_vty(void) + + /* eigrpd */ + #ifdef HAVE_EIGRPD +- install_node(&eigrp_node); + install_element(CONFIG_NODE, &router_eigrp_cmd); + install_element(EIGRP_NODE, &vtysh_exit_eigrpd_cmd); + install_element(EIGRP_NODE, &vtysh_quit_eigrpd_cmd); +@@ -5195,7 +5204,6 @@ void vtysh_init_vty(void) + + /* babeld */ + #ifdef HAVE_BABELD +- install_node(&babel_node); + install_element(CONFIG_NODE, &router_babel_cmd); + install_element(BABEL_NODE, &vtysh_exit_babeld_cmd); + install_element(BABEL_NODE, &vtysh_quit_babeld_cmd); +@@ -5204,25 +5212,21 @@ void vtysh_init_vty(void) + + /* isisd */ + #ifdef HAVE_ISISD +- install_node(&isis_node); + install_element(CONFIG_NODE, &router_isis_cmd); + install_element(ISIS_NODE, &vtysh_exit_isisd_cmd); + install_element(ISIS_NODE, &vtysh_quit_isisd_cmd); + install_element(ISIS_NODE, &vtysh_end_all_cmd); + +- install_node(&isis_flex_algo_node); + install_element(ISIS_NODE, &isis_flex_algo_cmd); + install_element(ISIS_FLEX_ALGO_NODE, &vtysh_exit_isis_flex_algo_cmd); + install_element(ISIS_FLEX_ALGO_NODE, &vtysh_quit_isis_flex_algo_cmd); + install_element(ISIS_FLEX_ALGO_NODE, &vtysh_end_all_cmd); + +- install_node(&isis_srv6_node); + install_element(ISIS_NODE, &isis_srv6_enable_cmd); + install_element(ISIS_SRV6_NODE, &isis_srv6_node_msd_cmd); + install_element(ISIS_SRV6_NODE, &vtysh_exit_isis_srv6_enable_cmd); + install_element(ISIS_SRV6_NODE, &vtysh_quit_isis_srv6_enable_cmd); + install_element(ISIS_SRV6_NODE, &vtysh_end_all_cmd); +- install_node(&isis_srv6_node_msd_node); + install_element(ISIS_SRV6_NODE_MSD_NODE, + &vtysh_exit_isis_srv6_node_msd_cmd); + install_element(ISIS_SRV6_NODE_MSD_NODE, +@@ -5232,7 +5236,6 @@ void vtysh_init_vty(void) + + /* fabricd */ + #ifdef HAVE_FABRICD +- install_node(&openfabric_node); + install_element(CONFIG_NODE, &router_openfabric_cmd); + install_element(OPENFABRIC_NODE, &vtysh_exit_fabricd_cmd); + install_element(OPENFABRIC_NODE, &vtysh_quit_fabricd_cmd); +@@ -5241,7 +5244,6 @@ void vtysh_init_vty(void) + + /* pbrd */ + #ifdef HAVE_PBRD +- install_node(&pbr_map_node); + install_element(CONFIG_NODE, &vtysh_pbr_map_cmd); + install_element(CONFIG_NODE, &vtysh_no_pbr_map_cmd); + install_element(PBRMAP_NODE, &vtysh_exit_pbr_map_cmd); +@@ -5251,37 +5253,28 @@ void vtysh_init_vty(void) + + /* bfdd */ + #if HAVE_BFDD > 0 +- install_node(&bfd_node); + install_element(CONFIG_NODE, &bfd_enter_cmd); + install_element(BFD_NODE, &vtysh_exit_bfdd_cmd); + install_element(BFD_NODE, &vtysh_quit_bfdd_cmd); + install_element(BFD_NODE, &vtysh_end_all_cmd); + +- install_node(&bfd_peer_node); + install_element(BFD_NODE, &bfd_peer_enter_cmd); + install_element(BFD_PEER_NODE, &vtysh_exit_bfdd_cmd); + install_element(BFD_PEER_NODE, &vtysh_quit_bfdd_cmd); + install_element(BFD_PEER_NODE, &vtysh_end_all_cmd); + +- install_node(&bfd_profile_node); + install_element(BFD_NODE, &bfd_profile_enter_cmd); + install_element(BFD_PROFILE_NODE, &vtysh_exit_bfdd_cmd); + install_element(BFD_PROFILE_NODE, &vtysh_quit_bfdd_cmd); + install_element(BFD_PROFILE_NODE, &vtysh_end_all_cmd); + #endif /* HAVE_BFDD */ + +- install_node(&segment_routing_node); + install_element(CONFIG_NODE, &segment_routing_cmd); + install_element(SEGMENT_ROUTING_NODE, &vtysh_exit_sr_cmd); + install_element(SEGMENT_ROUTING_NODE, &vtysh_quit_sr_cmd); + install_element(SEGMENT_ROUTING_NODE, &vtysh_end_all_cmd); + + #if defined(HAVE_PATHD) +- install_node(&sr_traffic_eng_node); +- install_node(&srte_segment_list_node); +- install_node(&srte_policy_node); +- install_node(&srte_candidate_dyn_node); +- + install_element(SR_TRAFFIC_ENG_NODE, &vtysh_exit_pathd_cmd); + install_element(SR_TRAFFIC_ENG_NODE, &vtysh_quit_pathd_cmd); + install_element(SR_SEGMENT_LIST_NODE, &vtysh_exit_pathd_cmd); +@@ -5302,11 +5295,6 @@ void vtysh_init_vty(void) + install_element(SR_TRAFFIC_ENG_NODE, &srte_policy_cmd); + install_element(SR_POLICY_NODE, &srte_policy_candidate_dyn_path_cmd); + +- install_node(&pcep_node); +- install_node(&pcep_pcc_node); +- install_node(&pcep_pce_node); +- install_node(&pcep_pce_config_node); +- + install_element(PCEP_NODE, &vtysh_exit_pathd_cmd); + install_element(PCEP_NODE, &vtysh_quit_pathd_cmd); + install_element(PCEP_PCC_NODE, &vtysh_exit_pathd_cmd); +@@ -5329,14 +5317,12 @@ void vtysh_init_vty(void) + #endif /* HAVE_PATHD */ + + /* keychain */ +- install_node(&keychain_node); + install_element(CONFIG_NODE, &key_chain_cmd); + install_element(KEYCHAIN_NODE, &key_chain_cmd); + install_element(KEYCHAIN_NODE, &vtysh_exit_keys_cmd); + install_element(KEYCHAIN_NODE, &vtysh_quit_keys_cmd); + install_element(KEYCHAIN_NODE, &vtysh_end_all_cmd); + +- install_node(&keychain_key_node); + install_element(KEYCHAIN_NODE, &key_cmd); + install_element(KEYCHAIN_KEY_NODE, &key_chain_cmd); + install_element(KEYCHAIN_KEY_NODE, &vtysh_exit_keys_cmd); +@@ -5344,7 +5330,6 @@ void vtysh_init_vty(void) + install_element(KEYCHAIN_KEY_NODE, &vtysh_end_all_cmd); + + /* nexthop-group */ +- install_node(&nh_group_node); + install_element(CONFIG_NODE, &vtysh_nexthop_group_cmd); + install_element(CONFIG_NODE, &vtysh_no_nexthop_group_cmd); + install_element(NH_GROUP_NODE, &vtysh_end_all_cmd); +@@ -5352,9 +5337,6 @@ void vtysh_init_vty(void) + install_element(NH_GROUP_NODE, &vtysh_quit_nexthop_group_cmd); + + /* zebra and all */ +- install_node(&zebra_node); +- +- install_node(&interface_node); + install_element(CONFIG_NODE, &vtysh_interface_cmd); + install_element(INTERFACE_NODE, &vtysh_end_all_cmd); + install_element(INTERFACE_NODE, &vtysh_exit_interface_cmd); +@@ -5362,7 +5344,6 @@ void vtysh_init_vty(void) + + /* pimd */ + #ifdef HAVE_PIMD +- install_node(&pim_node); + install_element(CONFIG_NODE, &router_pim_cmd); + install_element(PIM_NODE, &vtysh_exit_pimd_cmd); + install_element(PIM_NODE, &vtysh_quit_pimd_cmd); +@@ -5371,15 +5352,12 @@ void vtysh_init_vty(void) + + /* pim6d */ + #ifdef HAVE_PIM6D +- install_node(&pim6_node); + install_element(CONFIG_NODE, &router_pim6_cmd); + install_element(PIM6_NODE, &vtysh_exit_pim6d_cmd); + install_element(PIM6_NODE, &vtysh_quit_pim6d_cmd); + install_element(PIM6_NODE, &vtysh_end_all_cmd); + #endif /* HAVE_PIM6D */ + +- /* zebra and all, cont. */ +- install_node(&link_params_node); + install_element(INTERFACE_NODE, &vtysh_link_params_cmd); + install_element(LINK_PARAMS_NODE, &no_link_params_enable_cmd); + install_element(LINK_PARAMS_NODE, &exit_link_params_cmd); +@@ -5387,13 +5365,11 @@ void vtysh_init_vty(void) + install_element(LINK_PARAMS_NODE, &vtysh_exit_link_params_cmd); + install_element(LINK_PARAMS_NODE, &vtysh_quit_link_params_cmd); + +- install_node(&pw_node); + install_element(CONFIG_NODE, &vtysh_pseudowire_cmd); + install_element(PW_NODE, &vtysh_end_all_cmd); + install_element(PW_NODE, &vtysh_exit_pseudowire_cmd); + install_element(PW_NODE, &vtysh_quit_pseudowire_cmd); + +- install_node(&vrf_node); + install_element(CONFIG_NODE, &vtysh_vrf_cmd); + install_element(VRF_NODE, &exit_vrf_config_cmd); + install_element(VRF_NODE, &vtysh_end_all_cmd); +@@ -5401,7 +5377,6 @@ void vtysh_init_vty(void) + install_element(VRF_NODE, &vtysh_quit_vrf_cmd); + + #ifdef HAVE_BGPD +- install_node(&rpki_vrf_node); + install_element(VRF_NODE, &rpki_cmd); + install_element(RPKI_VRF_NODE, &rpki_exit_cmd); + install_element(RPKI_VRF_NODE, &rpki_quit_cmd); +@@ -5411,13 +5386,11 @@ void vtysh_init_vty(void) + install_element(CONFIG_NODE, &vtysh_affinity_map_cmd); + install_element(CONFIG_NODE, &vtysh_no_affinity_map_cmd); + +- install_node(&rmap_node); + install_element(CONFIG_NODE, &vtysh_route_map_cmd); + install_element(RMAP_NODE, &vtysh_exit_rmap_cmd); + install_element(RMAP_NODE, &vtysh_quit_rmap_cmd); + install_element(RMAP_NODE, &vtysh_end_all_cmd); + +- install_node(&vty_node); + install_element(CONFIG_NODE, &vtysh_line_vty_cmd); + install_element(VTY_NODE, &vtysh_exit_line_vty_cmd); + install_element(VTY_NODE, &vtysh_quit_line_vty_cmd); +@@ -5450,7 +5423,6 @@ void vtysh_init_vty(void) + install_element(ENABLE_NODE, &vtysh_end_all_cmd); + + /* SRv6 Data-plane */ +- install_node(&srv6_node); + install_element(SEGMENT_ROUTING_NODE, &srv6_cmd); + install_element(SRV6_NODE, &srv6_locators_cmd); + install_element(SRV6_NODE, &srv6_sid_formats_cmd); +@@ -5458,32 +5430,26 @@ void vtysh_init_vty(void) + install_element(SRV6_NODE, &vtysh_end_all_cmd); + install_element(SRV6_NODE, &srv6_encap_cmd); + +- install_node(&srv6_locs_node); + install_element(SRV6_LOCS_NODE, &srv6_locator_cmd); + install_element(SRV6_LOCS_NODE, &exit_srv6_locs_config_cmd); + install_element(SRV6_LOCS_NODE, &vtysh_end_all_cmd); + +- install_node(&srv6_loc_node); + install_element(SRV6_LOC_NODE, &exit_srv6_loc_config_cmd); + install_element(SRV6_LOC_NODE, &vtysh_end_all_cmd); + +- install_node(&srv6_encap_node); + install_element(SRV6_ENCAP_NODE, &exit_srv6_encap_cmd); + install_element(SRV6_ENCAP_NODE, &vtysh_end_all_cmd); + +- install_node(&srv6_sid_formats_node); + install_element(SRV6_SID_FORMATS_NODE, &srv6_sid_format_f3216_usid_cmd); + install_element(SRV6_SID_FORMATS_NODE, + &srv6_sid_format_f4024_uncompressed_cmd); + install_element(SRV6_SID_FORMATS_NODE, &exit_srv6_sid_formats_cmd); + install_element(SRV6_SID_FORMATS_NODE, &vtysh_end_all_cmd); + +- install_node(&srv6_sid_format_usid_f3216_node); + install_element(SRV6_SID_FORMAT_USID_F3216_NODE, + &exit_srv6_sid_format_cmd); + install_element(SRV6_SID_FORMAT_USID_F3216_NODE, &vtysh_end_all_cmd); + +- install_node(&srv6_sid_format_uncompressed_f4024_node); + install_element(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE, + &exit_srv6_sid_format_cmd); + install_element(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE, +diff --git a/vtysh/vtysh_main.c b/vtysh/vtysh_main.c +index 464d82cf7fee..64198132cc64 100644 +--- a/vtysh/vtysh_main.c ++++ b/vtysh/vtysh_main.c +@@ -489,7 +489,6 @@ int main(int argc, char **argv, char **env) + + /* Make vty structure and register commands. */ + vtysh_init_vty(); +- vtysh_init_cmd(); + vtysh_user_init(); + vtysh_config_init(); + diff --git a/src/sonic-frr/patch/0079-staticd-add-support-for-srv6.patch b/src/sonic-frr/patch/0079-staticd-add-support-for-srv6.patch new file mode 100644 index 00000000000..9c1803f13a2 --- /dev/null +++ b/src/sonic-frr/patch/0079-staticd-add-support-for-srv6.patch @@ -0,0 +1,2502 @@ +From 2ae4383755054e461fac727abf2ceea2b6ab3ae1 Mon Sep 17 00:00:00 2001 +From: Carmine Scarpitta +Date: Tue, 7 Jan 2025 14:23:34 +0100 +Subject: [PATCH] staticd: Add support for SRv6 + +Signed-off-by: Carmine Scarpitta +--- + lib/command.h | 1 + + staticd/static_main.c | 8 + + staticd/static_nb.c | 29 + + staticd/static_nb.h | 32 +- + staticd/static_nb_config.c | 194 ++++++ + staticd/static_srv6.c | 192 ++++++ + staticd/static_srv6.h | 125 ++++ + staticd/static_vrf.c | 2 + + staticd/static_vty.c | 320 +++++++++ + staticd/static_zebra.c | 636 ++++++++++++++++++ + staticd/static_zebra.h | 12 +- + staticd/subdir.am | 2 + + tests/topotests/static_srv6_sids/__init__.py | 0 + .../static_srv6_sids/expected_srv6_sids.json | 142 ++++ + .../topotests/static_srv6_sids/r1/mgmtd.conf | 0 + tests/topotests/static_srv6_sids/r1/setup.sh | 13 + + .../static_srv6_sids/r1/staticd.conf | 16 + + .../topotests/static_srv6_sids/r1/zebra.conf | 19 + + .../static_srv6_sids/test_static_srv6_sids.py | 89 +++ + vtysh/vtysh.c | 38 +- + yang/frr-staticd.yang | 59 +- + zebra/zebra_srv6.c | 124 +++- + 22 files changed, 2032 insertions(+), 21 deletions(-) + create mode 100644 staticd/static_srv6.c + create mode 100644 staticd/static_srv6.h + create mode 100644 tests/topotests/static_srv6_sids/__init__.py + create mode 100644 tests/topotests/static_srv6_sids/expected_srv6_sids.json + create mode 100644 tests/topotests/static_srv6_sids/r1/mgmtd.conf + create mode 100644 tests/topotests/static_srv6_sids/r1/setup.sh + create mode 100644 tests/topotests/static_srv6_sids/r1/staticd.conf + create mode 100644 tests/topotests/static_srv6_sids/r1/zebra.conf + create mode 100755 tests/topotests/static_srv6_sids/test_static_srv6_sids.py + +diff --git a/lib/command.h b/lib/command.h +index c60751789f..dfd732893b 100644 +--- a/lib/command.h ++++ b/lib/command.h +@@ -154,6 +154,7 @@ enum node_type { + PCEP_PCE_NODE, /* PCE configuration node */ + PCEP_PCC_NODE, /* PCC configuration node */ + SRV6_NODE, /* SRv6 node */ ++ SRV6_SIDS_NODE, /* SRv6 SIDs node */ + SRV6_LOCS_NODE, /* SRv6 locators node */ + SRV6_LOC_NODE, /* SRv6 locator node */ + SRV6_ENCAP_NODE, /* SRv6 encapsulation node */ +diff --git a/staticd/static_main.c b/staticd/static_main.c +index 9468a98b83..f01bc08fd8 100644 +--- a/staticd/static_main.c ++++ b/staticd/static_main.c +@@ -26,6 +26,7 @@ + #include "static_zebra.h" + #include "static_debug.h" + #include "static_nb.h" ++#include "static_srv6.h" + + #include "mgmt_be_client.h" + +@@ -76,6 +77,10 @@ static void sigint(void) + static_vrf_terminate(); + + static_zebra_stop(); ++ ++ /* clean up SRv6 data structures */ ++ static_srv6_cleanup(); ++ + frr_fini(); + + exit(0); +@@ -160,6 +165,9 @@ int main(int argc, char **argv, char **envp) + static_debug_init(); + static_vrf_init(); + ++ /* initialize SRv6 data structures */ ++ static_srv6_init(); ++ + static_zebra_init(); + static_vty_init(); + +diff --git a/staticd/static_nb.c b/staticd/static_nb.c +index e6aa71a77b..d607bd8888 100644 +--- a/staticd/static_nb.c ++++ b/staticd/static_nb.c +@@ -224,6 +224,35 @@ const struct frr_yang_module_info frr_staticd_info = { + .destroy = routing_control_plane_protocols_control_plane_protocol_staticd_route_list_src_list_path_list_frr_nexthops_nexthop_mpls_label_stack_entry_traffic_class_destroy, + } + }, ++ { ++ .xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids/sid", ++ .cbs = { ++ .apply_finish = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_apply_finish, ++ .create = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_create, ++ .destroy = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_destroy, ++ } ++ }, ++ { ++ .xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids/sid/behavior", ++ .cbs = { ++ .modify = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_behavior_modify, ++ .destroy = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_behavior_destroy, ++ } ++ }, ++ { ++ .xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids/sid/vrf-name", ++ .cbs = { ++ .modify = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_modify, ++ .destroy = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_destroy, ++ } ++ }, ++ { ++ .xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids/sid/locator-name", ++ .cbs = { ++ .modify = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_modify, ++ .destroy = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_destroy, ++ } ++ }, + { + .xpath = NULL, + }, +diff --git a/staticd/static_nb.h b/staticd/static_nb.h +index be75d9d38c..fca9f9952c 100644 +--- a/staticd/static_nb.h ++++ b/staticd/static_nb.h +@@ -118,6 +118,34 @@ int routing_control_plane_protocols_control_plane_protocol_staticd_route_list_sr + struct nb_cb_modify_args *args); + int routing_control_plane_protocols_control_plane_protocol_staticd_route_list_src_list_path_list_frr_nexthops_nexthop_mpls_label_stack_entry_traffic_class_destroy( + struct nb_cb_destroy_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_create( ++ struct nb_cb_create_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_destroy( ++ struct nb_cb_destroy_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_create( ++ struct nb_cb_create_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_destroy( ++ struct nb_cb_destroy_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_create( ++ struct nb_cb_create_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_destroy( ++ struct nb_cb_destroy_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_create( ++ struct nb_cb_create_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_destroy( ++ struct nb_cb_destroy_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_behavior_modify( ++ struct nb_cb_modify_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_behavior_destroy( ++ struct nb_cb_destroy_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_modify( ++ struct nb_cb_modify_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_destroy( ++ struct nb_cb_destroy_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_modify( ++ struct nb_cb_modify_args *args); ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_destroy( ++ struct nb_cb_destroy_args *args); + + /* Optional 'apply_finish' callbacks. */ + +@@ -125,6 +153,8 @@ void routing_control_plane_protocols_control_plane_protocol_staticd_route_list_p + struct nb_cb_apply_finish_args *args); + void routing_control_plane_protocols_control_plane_protocol_staticd_route_list_src_list_path_list_frr_nexthops_nexthop_apply_finish( + struct nb_cb_apply_finish_args *args); ++void routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_apply_finish( ++ struct nb_cb_apply_finish_args *args); + + /* Optional 'pre_validate' callbacks. */ + int routing_control_plane_protocols_control_plane_protocol_staticd_route_list_path_list_frr_nexthops_nexthop_pre_validate( +@@ -210,4 +240,4 @@ int routing_control_plane_protocols_name_validate( + } + #endif + +-#endif ++#endif +\ No newline at end of file +diff --git a/staticd/static_nb_config.c b/staticd/static_nb_config.c +index 7de5f0474a..a702dc48f8 100644 +--- a/staticd/static_nb_config.c ++++ b/staticd/static_nb_config.c +@@ -20,6 +20,8 @@ + #include "static_nb.h" + #include "static_zebra.h" + ++#include "static_srv6.h" ++ + + static int static_path_list_create(struct nb_cb_create_args *args) + { +@@ -1367,3 +1369,195 @@ int routing_control_plane_protocols_control_plane_protocol_staticd_route_list_sr + + return NB_OK; + } ++ ++/* ++ * XPath: ++ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing ++ */ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_create( ++ struct nb_cb_create_args *args) ++{ ++ return NB_OK; ++} ++ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_destroy( ++ struct nb_cb_destroy_args *args) ++{ ++ return NB_OK; ++} ++ ++/* ++ * XPath: ++ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6 ++ */ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_create( ++ struct nb_cb_create_args *args) ++{ ++ return NB_OK; ++} ++ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_destroy( ++ struct nb_cb_destroy_args *args) ++{ ++ return NB_OK; ++} ++ ++/* ++ * XPath: ++ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids ++ */ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_create( ++ struct nb_cb_create_args *args) ++{ ++ return NB_OK; ++} ++ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_destroy( ++ struct nb_cb_destroy_args *args) ++{ ++ return NB_OK; ++} ++ ++/* ++ * XPath: ++ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/locators/locator/local-sids/sid ++ */ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_create( ++ struct nb_cb_create_args *args) ++{ ++ struct static_srv6_sid *sid; ++ struct prefix_ipv6 sid_value; ++ ++ if (args->event != NB_EV_APPLY) ++ return NB_OK; ++ ++ yang_dnode_get_ipv6p(&sid_value, args->dnode, "sid"); ++ sid = static_srv6_sid_alloc(&sid_value); ++ nb_running_set_entry(args->dnode, sid); ++ ++ return NB_OK; ++} ++ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_destroy( ++ struct nb_cb_destroy_args *args) ++{ ++ struct static_srv6_sid *sid; ++ ++ if (args->event != NB_EV_APPLY) ++ return NB_OK; ++ ++ sid = nb_running_unset_entry(args->dnode); ++ listnode_delete(srv6_sids, sid); ++ static_srv6_sid_del(sid); ++ ++ return NB_OK; ++} ++ ++void routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_apply_finish( ++ struct nb_cb_apply_finish_args *args) ++{ ++ struct static_srv6_sid *sid; ++ struct static_srv6_locator *locator; ++ ++ sid = nb_running_get_entry(args->dnode, NULL, true); ++ ++ locator = static_srv6_locator_lookup(sid->locator_name); ++ if (!locator) { ++ zlog_info("Locator not found, trying to get locator information from zebra"); ++ static_zebra_srv6_manager_get_locator(sid->locator_name); ++ listnode_add(srv6_sids, sid); ++ return; ++ } ++ ++ sid->locator = locator; ++ ++ listnode_add(srv6_sids, sid); ++ static_zebra_request_srv6_sid(sid); ++} ++ ++/* ++ * XPath: ++ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/locators/locator/local-sids/sid/behavior ++ */ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_behavior_modify( ++ struct nb_cb_modify_args *args) ++{ ++ struct static_srv6_sid *sid; ++ ++ if (args->event != NB_EV_APPLY) ++ return NB_OK; ++ ++ sid = nb_running_get_entry(args->dnode, NULL, true); ++ ++ /* Release and uninstall existing SID, if any, before requesting the new one */ ++ static_zebra_release_srv6_sid(sid); ++ static_zebra_srv6_sid_uninstall(sid); ++ ++ sid->behavior = yang_dnode_get_enum(args->dnode, "../behavior"); ++ ++ return NB_OK; ++} ++ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_behavior_destroy( ++ struct nb_cb_destroy_args *args) ++{ ++ return NB_OK; ++} ++ ++/* ++ * XPath: ++ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/locators/locator/local-sids/sid/vrf-name ++ */ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_modify( ++ struct nb_cb_modify_args *args) ++{ ++ struct static_srv6_sid *sid; ++ ++ if (args->event != NB_EV_APPLY) ++ return NB_OK; ++ ++ sid = nb_running_get_entry(args->dnode, NULL, true); ++ ++ /* Release and uninstall existing SID, if any, before requesting the new one */ ++ static_zebra_release_srv6_sid(sid); ++ static_zebra_srv6_sid_uninstall(sid); ++ ++ strncpy(sid->attributes.vrf_name, yang_dnode_get_string(args->dnode, "../vrf-name"), sizeof(sid->attributes.vrf_name)); ++ ++ return NB_OK; ++} ++ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_destroy( ++ struct nb_cb_destroy_args *args) ++{ ++ return NB_OK; ++} ++ ++/* ++ * XPath: ++ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/locators/locator/local-sids/sid/vrf-name ++ */ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_modify( ++ struct nb_cb_modify_args *args) ++{ ++ struct static_srv6_sid *sid; ++ ++ if (args->event != NB_EV_APPLY) ++ return NB_OK; ++ ++ sid = nb_running_get_entry(args->dnode, NULL, true); ++ ++ /* Release and uninstall existing SID, if any, before requesting the new one */ ++ static_zebra_release_srv6_sid(sid); ++ static_zebra_srv6_sid_uninstall(sid); ++ ++ strncpy(sid->locator_name, yang_dnode_get_string(args->dnode, "../locator-name"), sizeof(sid->locator_name)); ++ ++ return NB_OK; ++} ++ ++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_destroy( ++ struct nb_cb_destroy_args *args) ++{ ++ return NB_OK; ++} +diff --git a/staticd/static_srv6.c b/staticd/static_srv6.c +new file mode 100644 +index 0000000000..eabc8655f7 +--- /dev/null ++++ b/staticd/static_srv6.c +@@ -0,0 +1,192 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++/* ++ * STATICd - Segment Routing over IPv6 (SRv6) code ++ */ ++#include ++ ++#include "vrf.h" ++#include "nexthop.h" ++ ++#include "static_routes.h" ++#include "static_srv6.h" ++#include "static_vrf.h" ++#include "static_zebra.h" ++ ++/* ++ * List of SRv6 SIDs. ++ */ ++struct list *srv6_locators = NULL; ++struct list *srv6_sids = NULL; ++ ++DEFINE_MTYPE_STATIC(STATIC, STATIC_SRV6_LOCATOR, "Static SRv6 locator"); ++DEFINE_MTYPE_STATIC(STATIC, STATIC_SRV6_SID, "Static SRv6 SID"); ++ ++/* ++ * Convert SRv6 behavior to human-friendly string. ++ */ ++const char * ++static_srv6_sid_behavior2str(enum static_srv6_sid_behavior_t behavior) ++{ ++ switch (behavior) { ++ case STATIC_SRV6_SID_BEHAVIOR_END: ++ return "End"; ++ case STATIC_SRV6_SID_BEHAVIOR_END_X: ++ return "End.X"; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT6: ++ return "End.DT6"; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT4: ++ return "End.DT4"; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT46: ++ return "End.DT46"; ++ case STATIC_SRV6_SID_BEHAVIOR_UN: ++ return "uN"; ++ case STATIC_SRV6_SID_BEHAVIOR_UA: ++ return "uA"; ++ case STATIC_SRV6_SID_BEHAVIOR_UDT6: ++ return "uDT6"; ++ case STATIC_SRV6_SID_BEHAVIOR_UDT4: ++ return "uDT4"; ++ case STATIC_SRV6_SID_BEHAVIOR_UDT46: ++ return "uDT46"; ++ case STATIC_SRV6_SID_BEHAVIOR_UNSPEC: ++ return "unspec"; ++ } ++ ++ return "unspec"; ++} ++ ++/* ++ * When an interface is enabled in the kernel, go through all the static SRv6 SIDs in ++ * the system that use this interface and install/remove them in the zebra RIB. ++ * ++ * ifp - The interface being enabled ++ * is_up - Whether the interface is up or down ++ */ ++void static_ifp_srv6_sids_update(struct interface *ifp, bool is_up) ++{ ++ struct static_srv6_locator *locator; ++ struct static_srv6_sid *sid; ++ struct listnode *node; ++ ++ if (!srv6_sids || !ifp) ++ return; ++ ++ zlog_info("Interface %s %s. %s SIDs that depend on the interface", (is_up) ? "enabled" : "disabled", (is_up) ? "Removing" : "disabled", ifp->name); ++ ++ /* iterate over the list of SRv6 SIDs and remove the SIDs that use this ++ * VRF from the zebra RIB */ ++ for (ALL_LIST_ELEMENTS_RO(srv6_sids, node, sid)) { ++ if (strcmp(sid->attributes.vrf_name, ifp->name) == 0 || ++ strncmp(ifp->name, "sr0", sizeof(ifp->name)) == 0 && ++ (sid->behavior == STATIC_SRV6_SID_BEHAVIOR_END || sid->behavior == STATIC_SRV6_SID_BEHAVIOR_UN)) ++ if (is_up) ++ static_zebra_srv6_sid_install(sid); ++ else ++ static_zebra_srv6_sid_uninstall(sid); ++ } ++} ++ ++/* ++ * Allocate an SRv6 SID object and initialize the fields common to all the ++ * behaviors (i.e., SID address and behavor). ++ */ ++struct static_srv6_sid *static_srv6_sid_alloc(struct prefix_ipv6 *addr) ++{ ++ struct static_srv6_sid *sid = NULL; ++ ++ sid = XCALLOC(MTYPE_STATIC_SRV6_SID, sizeof(struct static_srv6_sid)); ++ sid->addr = *addr; ++ ++ return sid; ++} ++ ++void static_srv6_sid_free(struct static_srv6_sid *sid) ++{ ++ XFREE(MTYPE_STATIC_SRV6_SID, sid); ++} ++ ++struct static_srv6_locator *static_srv6_locator_lookup(const char *name) ++{ ++ struct static_srv6_locator *locator; ++ struct listnode *node; ++ ++ for (ALL_LIST_ELEMENTS_RO(srv6_locators, node, locator)) ++ if (!strncmp(name, locator->name, SRV6_LOCNAME_SIZE)) ++ return locator; ++ return NULL; ++} ++ ++/* ++ * Look-up an SRv6 SID in the list of SRv6 SIDs. ++ */ ++struct static_srv6_sid *static_srv6_sid_lookup(struct prefix_ipv6 *sid_addr) ++{ ++ struct static_srv6_locator *locator; ++ struct static_srv6_sid *sid; ++ struct listnode *node1, *node2; ++ ++ for (ALL_LIST_ELEMENTS_RO(srv6_locators, node1, locator)) ++ for (ALL_LIST_ELEMENTS_RO(srv6_sids, node2, sid)) ++ if (memcmp(&sid->addr, sid_addr, sizeof(struct prefix_ipv6)) == 0) ++ return sid; ++ ++ return NULL; ++} ++ ++struct static_srv6_locator *static_srv6_locator_alloc(const char *name) ++{ ++ struct static_srv6_locator *locator = NULL; ++ ++ locator = XCALLOC(MTYPE_STATIC_SRV6_LOCATOR, sizeof(struct static_srv6_locator)); ++ strlcpy(locator->name, name, sizeof(locator->name)); ++ ++ return locator; ++} ++ ++void static_srv6_locator_free(struct static_srv6_locator *locator) ++{ ++ if (locator) { ++ XFREE(MTYPE_STATIC_SRV6_LOCATOR, locator); ++ } ++} ++ ++void delete_static_srv6_locator(void *val) ++{ ++ static_srv6_locator_free((struct static_srv6_locator *)val); ++} ++ ++/* ++ * Remove an SRv6 SID from the zebra RIB (if it was previously installed) and ++ * release the memory previously allocated for the SID. ++ */ ++void static_srv6_sid_del(struct static_srv6_sid *sid) ++{ ++ // if (CHECK_FLAG(sid->flags, STATIC_FLAG_SRV6_SID_SENT_TO_ZEBRA)) ++ static_zebra_release_srv6_sid(sid); ++ static_zebra_srv6_sid_uninstall(sid); ++ ++ XFREE(MTYPE_STATIC_SRV6_SID, sid); ++} ++ ++void delete_static_srv6_sid(void *val) ++{ ++ static_srv6_sid_free((struct static_srv6_sid *)val); ++} ++ ++/* ++ * Initialize SRv6 data structures. ++ */ ++void static_srv6_init(void) ++{ ++ srv6_locators = list_new(); ++ srv6_sids = list_new(); ++} ++ ++/* ++ * Clean up all the SRv6 data structures. ++ */ ++void static_srv6_cleanup(void) ++{ ++ list_delete(&srv6_locators); ++ list_delete(&srv6_sids); ++} +\ No newline at end of file +diff --git a/staticd/static_srv6.h b/staticd/static_srv6.h +new file mode 100644 +index 0000000000..9e9058b532 +--- /dev/null ++++ b/staticd/static_srv6.h +@@ -0,0 +1,125 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++/* ++ * STATICd - Segment Routing over IPv6 (SRv6) header ++ */ ++#ifndef __STATIC_SRV6_H__ ++#define __STATIC_SRV6_H__ ++ ++#include "vrf.h" ++#include "srv6.h" ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++/* ++ * The order for below macros should be in sync with ++ * yang model typedef srv6-behavior ++ */ ++enum static_srv6_sid_behavior_t { ++ STATIC_SRV6_SID_BEHAVIOR_UNSPEC = 0, ++ STATIC_SRV6_SID_BEHAVIOR_END = 1, ++ STATIC_SRV6_SID_BEHAVIOR_END_X = 2, ++ STATIC_SRV6_SID_BEHAVIOR_END_DT6 = 3, ++ STATIC_SRV6_SID_BEHAVIOR_END_DT4 = 4, ++ STATIC_SRV6_SID_BEHAVIOR_END_DT46 = 5, ++ STATIC_SRV6_SID_BEHAVIOR_UN = 6, ++ STATIC_SRV6_SID_BEHAVIOR_UA = 7, ++ STATIC_SRV6_SID_BEHAVIOR_UDT6 = 8, ++ STATIC_SRV6_SID_BEHAVIOR_UDT4 = 9, ++ STATIC_SRV6_SID_BEHAVIOR_UDT46 = 10, ++}; ++ ++/* Attributes for an SRv6 SID */ ++struct static_srv6_sid_attributes { ++ /* VRF name */ ++ char vrf_name[VRF_NAMSIZ]; ++ char ifname[IFNAMSIZ]; ++ struct in6_addr nh6; ++}; ++ ++/* Static SRv6 SID */ ++struct static_srv6_sid { ++ /* SRv6 SID address */ ++ struct prefix_ipv6 addr; ++ /* behavior bound to the SRv6 SID */ ++ enum static_srv6_sid_behavior_t behavior; ++ /* SID attributes */ ++ struct static_srv6_sid_attributes attributes; ++ ++ /* SRv6 SID flags */ ++ uint8_t flags; ++/* this SRv6 SID is valid and can be installed in the zebra RIB */ ++#define STATIC_FLAG_SRV6_SID_VALID (1 << 0) ++/* this SRv6 SID has been installed in the zebra RIB */ ++#define STATIC_FLAG_SRV6_SID_SENT_TO_ZEBRA (2 << 0) ++ ++ char locator_name[SRV6_LOCNAME_SIZE]; ++ struct static_srv6_locator *locator; ++}; ++ ++struct static_srv6_locator { ++ char name[SRV6_LOCNAME_SIZE]; ++ struct prefix_ipv6 prefix; ++ ++ /* ++ * Bit length of SRv6 locator described in ++ * draft-ietf-bess-srv6-services-05#section-3.2.1 ++ */ ++ uint8_t block_bits_length; ++ uint8_t node_bits_length; ++ uint8_t function_bits_length; ++ uint8_t argument_bits_length; ++ ++ uint8_t flags; ++#define SRV6_LOCATOR_USID (1 << 0) /* The SRv6 Locator is a uSID Locator */ ++ ++}; ++ ++/* List of SRv6 SIDs. */ ++extern struct list *srv6_locators; ++extern struct list *srv6_sids; ++ ++/* Allocate an SRv6 SID object and initialize its fields, SID address and ++ * behavor. */ ++extern struct static_srv6_sid * ++static_srv6_sid_alloc(struct prefix_ipv6 *addr); ++extern void ++static_srv6_sid_free(struct static_srv6_sid *sid); ++/* Look-up an SRv6 SID in the list of SRv6 SIDs. */ ++extern struct static_srv6_sid * ++static_srv6_sid_lookup(struct prefix_ipv6 *sid_addr); ++/* Remove an SRv6 SID from the zebra RIB (if it was previously installed) and ++ * release the memory previously allocated for the SID. */ ++extern void static_srv6_sid_del(struct static_srv6_sid *sid); ++ ++/* Convert SRv6 behavior to human-friendly string. */ ++const char * ++static_srv6_sid_behavior2str(enum static_srv6_sid_behavior_t action); ++ ++/* Initialize SRv6 data structures. */ ++extern void static_srv6_init(void); ++/* Clean up all the SRv6 data structures. */ ++extern void static_srv6_cleanup(void); ++ ++/* ++ * When an interface is enabled in the kernel, go through all the static SRv6 SIDs in ++ * the system that use this interface and install/remove them in the zebra RIB. ++ * ++ * ifp - The interface being enabled ++ * is_up - Whether the interface is up or down ++ */ ++void static_ifp_srv6_sids_update(struct interface *ifp, bool is_up); ++ ++struct static_srv6_locator *static_srv6_locator_alloc(const char *name); ++void static_srv6_locator_free(struct static_srv6_locator *locator); ++struct static_srv6_locator *static_srv6_locator_lookup(const char *name); ++ ++void delete_static_srv6_sid(void *val); ++void delete_static_srv6_locator(void *val); ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* __STATIC_SRV6_H__ */ +\ No newline at end of file +diff --git a/staticd/static_vrf.c b/staticd/static_vrf.c +index 710827a9ff..cf2c9eb73d 100644 +--- a/staticd/static_vrf.c ++++ b/staticd/static_vrf.c +@@ -125,6 +125,7 @@ static int static_vrf_enable(struct vrf *vrf) + { + static_zebra_vrf_register(vrf); + static_fixup_vrf_ids(vrf); ++ + return 0; + } + +@@ -132,6 +133,7 @@ static int static_vrf_disable(struct vrf *vrf) + { + static_cleanup_vrf_ids(vrf); + static_zebra_vrf_unregister(vrf); ++ + return 0; + } + +diff --git a/staticd/static_vty.c b/staticd/static_vty.c +index 07b8bc3d28..db112b6c0f 100644 +--- a/staticd/static_vty.c ++++ b/staticd/static_vty.c +@@ -27,6 +27,8 @@ + #include "static_debug.h" + #include "staticd/static_vty_clippy.c" + #include "static_nb.h" ++#include "static_srv6.h" ++#include "static_zebra.h" + + #define STATICD_STR "Static route daemon\n" + +@@ -1201,6 +1203,183 @@ DEFPY_YANG(ipv6_route_vrf, ipv6_route_vrf_cmd, + return static_route_nb_run(vty, &args); + } + ++DEFUN_NOSH (static_segment_routing, static_segment_routing_cmd, ++ "segment-routing", ++ "Segment Routing\n") ++{ ++ VTY_PUSH_CONTEXT_NULL(SEGMENT_ROUTING_NODE); ++ return CMD_SUCCESS; ++} ++ ++DEFUN_NOSH (static_srv6, static_srv6_cmd, ++ "srv6", ++ "Segment Routing SRv6\n") ++{ ++ VTY_PUSH_CONTEXT_NULL(SRV6_NODE); ++ return CMD_SUCCESS; ++} ++ ++DEFUN_YANG_NOSH (no_static_srv6, no_static_srv6_cmd, ++ "no srv6", ++ NO_STR ++ "Segment Routing SRv6\n") ++{ ++ char xpath[XPATH_MAXLEN]; ++ ++ snprintf(xpath, sizeof(xpath), "/frr-routing:routing/control-plane-protocols/control-plane-protocol[type='%s'][name='%s'][vrf='%s']/frr-staticd:staticd/segment-routing/srv6", ++ "frr-staticd:staticd", "staticd", VRF_DEFAULT_NAME); ++ ++ nb_cli_enqueue_change(vty, xpath, NB_OP_DESTROY, NULL); ++ ++ return nb_cli_apply_changes(vty, "%s", xpath); ++} ++ ++DEFUN_NOSH (static_srv6_sids, static_srv6_sids_cmd, ++ "static-sids", ++ "Segment Routing SRv6 SIDs\n") ++{ ++ VTY_PUSH_CONTEXT_NULL(SRV6_SIDS_NODE); ++ return CMD_SUCCESS; ++} ++ ++ ++static const char *seg6local_action2yang(uint32_t action) ++{ ++ switch (action) { ++ case STATIC_SRV6_SID_BEHAVIOR_UN: ++ return "un"; ++ case STATIC_SRV6_SID_BEHAVIOR_UA: ++ return "ua"; ++ case STATIC_SRV6_SID_BEHAVIOR_UDT6: ++ return "udt6"; ++ case STATIC_SRV6_SID_BEHAVIOR_UDT4: ++ return "udt4"; ++ case STATIC_SRV6_SID_BEHAVIOR_UDT46: ++ return "udt46"; ++ } ++ return "unspec"; ++} ++ ++DEFPY_YANG(srv6_sid, srv6_sid_cmd, ++ "sid X:X::X:X/M locator NAME$locator_name behavior ", ++ "Configure SRv6 SID\n" ++ "Specify SRv6 SID\n" ++ "Locator name\n" ++ "Specify Locator name\n" ++ "Specify SRv6 SID behavior\n" ++ "Apply the code to a uN SID\n" ++ "Apply the code to an uDT6 SID\n" ++ "Configure VRF name\n" ++ "Specify VRF name\n" ++ "Apply the code to an uDT4 SID\n" ++ "Configure VRF name\n" ++ "Specify VRF name\n" ++ "Apply the code to an uDT46 SID\n" ++ "Configure VRF name\n" ++ "Specify VRF name\n") ++{ ++ enum static_srv6_sid_behavior_t behavior = STATIC_SRV6_SID_BEHAVIOR_UNSPEC; ++ int idx = 0; ++ const char *vrf_name = NULL; ++ char xpath_sid[XPATH_MAXLEN]; ++ char xpath_behavior[XPATH_MAXLEN]; ++ char xpath_vrf_name[XPATH_MAXLEN]; ++ char xpath_locator_name[XPATH_MAXLEN]; ++ ++ if (argv_find(argv, argc, "uN", &idx)) { ++ behavior = STATIC_SRV6_SID_BEHAVIOR_UN; ++ } else if (argv_find(argv, argc, "uDT6", &idx)) { ++ behavior = STATIC_SRV6_SID_BEHAVIOR_UDT6; ++ vrf_name = argv[idx + 2]->arg; ++ } else if (argv_find(argv, argc, "uDT4", &idx)) { ++ behavior = STATIC_SRV6_SID_BEHAVIOR_UDT4; ++ vrf_name = argv[idx + 2]->arg; ++ } else if (argv_find(argv, argc, "uDT46", &idx)) { ++ behavior = STATIC_SRV6_SID_BEHAVIOR_UDT46; ++ vrf_name = argv[idx + 2]->arg; ++ } ++ ++ snprintf(xpath_sid, sizeof(xpath_sid), "/frr-routing:routing/control-plane-protocols/control-plane-protocol[type='%s'][name='%s'][vrf='%s']/frr-staticd:staticd/segment-routing/srv6/local-sids/sid[sid='%s']", ++ "frr-staticd:staticd", "staticd", VRF_DEFAULT_NAME, sid_str); ++ ++ snprintf(xpath_behavior, sizeof(xpath_behavior), "/frr-routing:routing/control-plane-protocols/control-plane-protocol[type='%s'][name='%s'][vrf='%s']/frr-staticd:staticd/segment-routing/srv6/local-sids/sid[sid='%s']/behavior", ++ "frr-staticd:staticd", "staticd", VRF_DEFAULT_NAME, sid_str); ++ ++ nb_cli_enqueue_change(vty, xpath_sid, ++ NB_OP_CREATE, sid_str); ++ ++ nb_cli_enqueue_change(vty, xpath_behavior, ++ NB_OP_MODIFY, seg6local_action2yang(behavior)); ++ ++ if (vrf_name) { ++ snprintf(xpath_vrf_name, sizeof(xpath_vrf_name), "/frr-routing:routing/control-plane-protocols/control-plane-protocol[type='%s'][name='%s'][vrf='%s']/frr-staticd:staticd/segment-routing/srv6/local-sids/sid[sid='%s']/vrf-name", ++ "frr-staticd:staticd", "staticd", VRF_DEFAULT_NAME, sid_str); ++ ++ nb_cli_enqueue_change(vty, xpath_vrf_name, ++ NB_OP_MODIFY, vrf_name); ++ } ++ ++ if (locator_name) { ++ snprintf(xpath_locator_name, sizeof(xpath_locator_name), "/frr-routing:routing/control-plane-protocols/control-plane-protocol[type='%s'][name='%s'][vrf='%s']/frr-staticd:staticd/segment-routing/srv6/local-sids/sid[sid='%s']/locator-name", ++ "frr-staticd:staticd", "staticd", VRF_DEFAULT_NAME, sid_str); ++ ++ nb_cli_enqueue_change(vty, xpath_locator_name, ++ NB_OP_MODIFY, locator_name); ++ } ++ ++ return nb_cli_apply_changes(vty, "%s", xpath_sid); ++} ++ ++DEFPY_YANG(no_srv6_sid, no_srv6_sid_cmd, ++ "no sid X:X::X:X/M [locator NAME$locator_name] [behavior ]", ++ NO_STR ++ "Configure SRv6 SID\n" ++ "Specify SRv6 SID\n" ++ "Locator name\n" ++ "Specify Locator name\n" ++ "Specify SRv6 SID behavior\n" ++ "Apply the code to a uN SID\n" ++ "Apply the code to an uDT6 SID\n" ++ "Configure VRF name\n" ++ "Specify VRF name\n" ++ "Apply the code to an uDT4 SID\n" ++ "Configure VRF name\n" ++ "Specify VRF name\n" ++ "Apply the code to an uDT46 SID\n" ++ "Configure VRF name\n" ++ "Specify VRF name\n") ++{ ++ char xpath[XPATH_MAXLEN + 37]; ++ ++ snprintf(xpath, sizeof(xpath), "/frr-routing:routing/control-plane-protocols/control-plane-protocol[type='%s'][name='%s'][vrf='%s']/frr-staticd:staticd/segment-routing/srv6/local-sids/sid[sid='%s']", ++ "frr-staticd:staticd", "staticd", VRF_DEFAULT_NAME, sid_str); ++ ++ nb_cli_enqueue_change(vty, xpath, NB_OP_DESTROY, NULL); ++ ++ return nb_cli_apply_changes(vty, NULL); ++} ++ ++static struct cmd_node sr_node = { ++ .name = "sr", ++ .node = SEGMENT_ROUTING_NODE, ++ .parent_node = CONFIG_NODE, ++ .prompt = "%s(config-sr)# ", ++}; ++ ++static struct cmd_node srv6_node = { ++ .name = "srv6", ++ .node = SRV6_NODE, ++ .parent_node = SEGMENT_ROUTING_NODE, ++ .prompt = "%s(config-srv6)# ", ++}; ++ ++static struct cmd_node srv6_sids_node = { ++ .name = "srv6-sids", ++ .node = SRV6_SIDS_NODE, ++ .parent_node = SRV6_NODE, ++ .prompt = "%s(config-srv6-sids)# ", ++}; ++ + #ifdef INCLUDE_MGMTD_CMDDEFS_ONLY + + static void static_cli_show(struct vty *vty, const struct lyd_node *dnode, +@@ -1545,6 +1724,104 @@ static int static_path_list_cli_cmp(const struct lyd_node *dnode1, + return (int)distance1 - (int)distance2; + } + ++static void static_segment_routing_cli_show(struct vty *vty, const struct lyd_node *dnode, ++ bool show_defaults) ++{ ++ vty_out(vty, "segment-routing\n"); ++} ++ ++static void static_segment_routing_cli_show_end(struct vty *vty, const struct lyd_node *dnode) ++{ ++ vty_out(vty, "exit\n"); ++ vty_out(vty, "!\n"); ++} ++ ++static void static_srv6_cli_show(struct vty *vty, const struct lyd_node *dnode, ++ bool show_defaults) ++{ ++ vty_out(vty, " srv6\n"); ++} ++ ++static void static_srv6_cli_show_end(struct vty *vty, const struct lyd_node *dnode) ++{ ++ vty_out(vty, " exit\n"); ++ vty_out(vty, " !\n"); ++} ++ ++static void static_sids_cli_show(struct vty *vty, const struct lyd_node *dnode, ++ bool show_defaults) ++{ ++ vty_out(vty, " static-sids\n"); ++} ++ ++static void static_sids_cli_show_end(struct vty *vty, const struct lyd_node *dnode) ++{ ++ vty_out(vty, " exit\n"); ++ vty_out(vty, " !\n"); ++} ++ ++static void srv6_sid_cli_show(struct vty *vty, const struct lyd_node *sid, ++ bool show_defaults) ++{ ++ enum static_srv6_sid_behavior_t srv6_behavior; ++ struct prefix_ipv6 sid_value; ++ ++ yang_dnode_get_ipv6p(&sid_value, sid, "sid"); ++ ++ vty_out(vty, " sid %pFX", &sid_value); ++ if (yang_dnode_exists(sid, "locator-name")) ++ vty_out(vty, " locator %s", yang_dnode_get_string(sid, "locator-name")); ++ ++ srv6_behavior = yang_dnode_get_enum(sid, "behavior"); ++ switch(srv6_behavior) { ++ case STATIC_SRV6_SID_BEHAVIOR_END: ++ vty_out(vty, " behavior End"); ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_X: ++ vty_out(vty, " behavior End.X"); ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT6: ++ vty_out(vty, " behavior End.DT6"); ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT4: ++ vty_out(vty, " behavior End.DT4"); ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT46: ++ vty_out(vty, " behavior End.DT46"); ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_UN: ++ vty_out(vty, " behavior uN"); ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_UA: ++ vty_out(vty, " behavior uA"); ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_UDT6: ++ vty_out(vty, " behavior uDT6"); ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_UDT4: ++ vty_out(vty, " behavior uDT4"); ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_UDT46: ++ vty_out(vty, " behavior uDT46"); ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_UNSPEC: ++ vty_out(vty, " behavior unknown"); ++ break; ++ } ++ ++ if (yang_dnode_exists(sid, "vrf-name")) ++ vty_out(vty, " vrf %s", yang_dnode_get_string(sid, "vrf-name")); ++ ++ vty_out(vty, "\n"); ++} ++ ++static void static_srv6_sid_cli_show(struct vty *vty, ++ const struct lyd_node *dnode, ++ bool show_defaults) ++{ ++ srv6_sid_cli_show(vty, dnode, show_defaults); ++} ++ + const struct frr_yang_module_info frr_staticd_cli_info = { + .name = "frr-staticd", + .ignore_cfg_cbs = true, +@@ -1594,6 +1871,33 @@ const struct frr_yang_module_info frr_staticd_cli_info = { + .cli_cmp = static_nexthop_cli_cmp, + } + }, ++ { ++ .xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing", ++ .cbs = { ++ .cli_show = static_segment_routing_cli_show, ++ .cli_show_end = static_segment_routing_cli_show_end, ++ } ++ }, ++ { ++ .xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6", ++ .cbs = { ++ .cli_show = static_srv6_cli_show, ++ .cli_show_end = static_srv6_cli_show_end, ++ } ++ }, ++ { ++ .xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids", ++ .cbs = { ++ .cli_show = static_sids_cli_show, ++ .cli_show_end = static_sids_cli_show_end, ++ } ++ }, ++ { ++ .xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids/sid", ++ .cbs = { ++ .cli_show = static_srv6_sid_cli_show, ++ } ++ }, + { + .xpath = NULL, + }, +@@ -1653,6 +1957,7 @@ void static_vty_init(void) + install_element(CONFIG_NODE, &debug_staticd_cmd); + install_element(ENABLE_NODE, &show_debugging_static_cmd); + install_element(ENABLE_NODE, &staticd_show_bfd_routes_cmd); ++ + #else /* else INCLUDE_MGMTD_CMDDEFS_ONLY */ + install_element(CONFIG_NODE, &ip_mroute_dist_cmd); + +@@ -1669,6 +1974,21 @@ void static_vty_init(void) + install_element(VRF_NODE, &ipv6_route_address_interface_vrf_cmd); + install_element(CONFIG_NODE, &ipv6_route_cmd); + install_element(VRF_NODE, &ipv6_route_vrf_cmd); ++ ++ install_node(&sr_node); ++ install_node(&srv6_node); ++ install_node(&srv6_sids_node); ++ install_default(SEGMENT_ROUTING_NODE); ++ install_default(SRV6_NODE); ++ install_default(SRV6_SIDS_NODE); ++ ++ install_element(CONFIG_NODE, &static_segment_routing_cmd); ++ install_element(SEGMENT_ROUTING_NODE, &static_srv6_cmd); ++ install_element(SEGMENT_ROUTING_NODE, &no_static_srv6_cmd); ++ install_element(SRV6_NODE, &static_srv6_sids_cmd); ++ install_element(SRV6_SIDS_NODE, &srv6_sid_cmd); ++ install_element(SRV6_SIDS_NODE, &no_srv6_sid_cmd); ++ + #endif /* ifndef INCLUDE_MGMTD_CMDDEFS_ONLY */ + + #ifndef INCLUDE_MGMTD_CMDDEFS_ONLY +diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c +index d76befc131..f86fd3b48a 100644 +--- a/staticd/static_zebra.c ++++ b/staticd/static_zebra.c +@@ -30,6 +30,9 @@ + #include "static_nht.h" + #include "static_vty.h" + #include "static_debug.h" ++#include "zclient.h" ++#include "static_srv6.h" ++#include "lib_errors.h" + + DEFINE_MTYPE_STATIC(STATIC, STATIC_NHT_DATA, "Static Nexthop tracking data"); + PREDECL_HASH(static_nht_hash); +@@ -113,6 +116,8 @@ static int static_ifp_up(struct interface *ifp) + { + static_ifindex_update(ifp, true); + ++ static_ifp_srv6_sids_update(ifp, true); ++ + return 0; + } + +@@ -120,6 +125,8 @@ static int static_ifp_down(struct interface *ifp) + { + static_ifindex_update(ifp, false); + ++ static_ifp_srv6_sids_update(ifp, false); ++ + return 0; + } + +@@ -530,10 +537,639 @@ extern void static_zebra_route_add(struct static_path *pn, bool install) + zclient, &api); + } + ++/** ++ * Send SRv6 SID to ZEBRA for installation or deletion. ++ * ++ * @param cmd ZEBRA_ROUTE_ADD or ZEBRA_ROUTE_DELETE ++ * @param sid SRv6 SID to install or delete ++ * @param prefixlen Prefix length ++ * @param oif Outgoing interface ++ * @param action SID action ++ * @param context SID context ++ */ ++static void static_zebra_send_localsid(int cmd, const struct in6_addr *sid, ++ uint16_t prefixlen, ifindex_t oif, ++ enum seg6local_action_t action, ++ const struct seg6local_context *context) ++{ ++ struct prefix_ipv6 p = {}; ++ struct zapi_route api = {}; ++ struct zapi_nexthop *znh; ++ ++ if (cmd != ZEBRA_ROUTE_ADD && cmd != ZEBRA_ROUTE_DELETE) { ++ flog_warn(EC_LIB_DEVELOPMENT, "%s: wrong ZEBRA command", ++ __func__); ++ return; ++ } ++ ++ if (prefixlen > IPV6_MAX_BITLEN) { ++ flog_warn(EC_LIB_DEVELOPMENT, "%s: wrong prefixlen %u", ++ __func__, prefixlen); ++ return; ++ } ++ ++ zlog_info(" |- %s SRv6 SID %pI6 behavior %s", ++ cmd == ZEBRA_ROUTE_ADD ? "Add" : "Delete", sid, ++ seg6local_action2str(action)); ++ ++ p.family = AF_INET6; ++ p.prefixlen = prefixlen; ++ p.prefix = *sid; ++ ++ api.vrf_id = VRF_DEFAULT; ++ api.type = ZEBRA_ROUTE_STATIC; ++ api.instance = 0; ++ api.safi = SAFI_UNICAST; ++ memcpy(&api.prefix, &p, sizeof(p)); ++ ++ if (cmd == ZEBRA_ROUTE_DELETE) ++ return (void)zclient_route_send(ZEBRA_ROUTE_DELETE, zclient, ++ &api); ++ ++ SET_FLAG(api.flags, ZEBRA_FLAG_ALLOW_RECURSION); ++ SET_FLAG(api.message, ZAPI_MESSAGE_NEXTHOP); ++ ++ znh = &api.nexthops[0]; ++ ++ memset(znh, 0, sizeof(*znh)); ++ ++ znh->type = NEXTHOP_TYPE_IFINDEX; ++ znh->ifindex = oif; ++ SET_FLAG(znh->flags, ZAPI_NEXTHOP_FLAG_SEG6LOCAL); ++ znh->seg6local_action = action; ++ memcpy(&znh->seg6local_ctx, context, sizeof(struct seg6local_context)); ++ ++ api.nexthop_num = 1; ++ ++ zclient_route_send(ZEBRA_ROUTE_ADD, zclient, &api); ++} ++ ++/** ++ * Install SRv6 SID in the forwarding plane through Zebra. ++ * ++ * @param sid SRv6 SID ++ */ ++void static_zebra_srv6_sid_install(struct static_srv6_sid *sid) ++{ ++ enum seg6local_action_t action = ZEBRA_SEG6_LOCAL_ACTION_UNSPEC; ++ struct seg6local_context ctx = {}; ++ struct interface *ifp = NULL; ++ struct vrf *vrf; ++ ++ if (!sid) ++ return; ++ ++ zlog_info("setting SRv6 SID %pFX", ++ &sid->addr); ++ ++ if (!sid->locator) { ++ zlog_err("Failed to install SID %pFX: missing locator information", &sid->addr); ++ return; ++ } ++ ++ switch (sid->behavior) { ++ case STATIC_SRV6_SID_BEHAVIOR_END: ++ action = ZEBRA_SEG6_LOCAL_ACTION_END; ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_UN: ++ action = ZEBRA_SEG6_LOCAL_ACTION_END; ++ SET_SRV6_FLV_OP(ctx.flv.flv_ops, ++ ZEBRA_SEG6_LOCAL_FLV_OP_NEXT_CSID); ++ ctx.flv.lcblock_len = sid->locator->block_bits_length; ++ ctx.flv.lcnode_func_len = sid->locator->node_bits_length; ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT6: ++ case STATIC_SRV6_SID_BEHAVIOR_UDT6: ++ action = ZEBRA_SEG6_LOCAL_ACTION_END_DT6; ++ vrf = vrf_lookup_by_name(sid->attributes.vrf_name); ++ if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) { ++ zlog_warn("Inactive vrf"); ++ return; ++ } ++ ctx.table = vrf->data.l.table_id; ++ ifp = if_get_vrf_loopback(vrf->vrf_id); ++ if (!ifp) { ++ zlog_warn("failed to get interface"); ++ return; ++ } ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT4: ++ case STATIC_SRV6_SID_BEHAVIOR_UDT4: ++ action = ZEBRA_SEG6_LOCAL_ACTION_END_DT4; ++ vrf = vrf_lookup_by_name(sid->attributes.vrf_name); ++ if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) { ++ zlog_warn("Inactive vrf"); ++ return; ++ } ++ ctx.table = vrf->data.l.table_id; ++ ifp = if_get_vrf_loopback(vrf->vrf_id); ++ if (!ifp) { ++ zlog_warn("failed to get interface"); ++ return; ++ } ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT46: ++ case STATIC_SRV6_SID_BEHAVIOR_UDT46: ++ action = ZEBRA_SEG6_LOCAL_ACTION_END_DT46; ++ vrf = vrf_lookup_by_name(sid->attributes.vrf_name); ++ if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) { ++ zlog_warn("Inactive vrf"); ++ return; ++ } ++ ctx.table = vrf->data.l.table_id; ++ ifp = if_get_vrf_loopback(vrf->vrf_id); ++ if (!ifp) { ++ zlog_warn("failed to get interface"); ++ return; ++ } ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_UNSPEC: ++ zlog_warn("unsupported behavior: %u", sid->behavior); ++ break; ++ } ++ ++ ctx.block_len = sid->locator->block_bits_length; ++ ctx.node_len = sid->locator->node_bits_length; ++ ctx.function_len = sid->locator->function_bits_length; ++ ctx.argument_len = sid->locator->argument_bits_length; ++ ++ /* Attach the SID to the SRv6 interface */ ++ if (!ifp) { ++ ifp = if_lookup_by_name("sr0", VRF_DEFAULT); ++ if (!ifp) { ++ zlog_warn( ++ "Failed to install SRv6 SID %pFX: %s interface not found", ++ &sid->addr, "sr0"); ++ return; ++ } ++ } ++ ++ /* Send the SID to zebra */ ++ static_zebra_send_localsid(ZEBRA_ROUTE_ADD, &sid->addr.prefix, sid->addr.prefixlen, ++ ifp->ifindex, action, &ctx); ++} ++ ++void static_zebra_srv6_sid_uninstall(struct static_srv6_sid *sid) ++{ ++ enum seg6local_action_t action = ZEBRA_SEG6_LOCAL_ACTION_UNSPEC; ++ struct interface *ifp = NULL; ++ struct seg6local_context ctx = {}; ++ struct vrf *vrf; ++ ++ if (!sid) ++ return; ++ ++ zlog_info("delete SID %pFX", &sid->addr); ++ ++ if (!sid->locator) { ++ zlog_err("Failed to uninstall SID %pFX: missing locator information", &sid->addr); ++ return; ++ } ++ ++ switch (sid->behavior) { ++ case STATIC_SRV6_SID_BEHAVIOR_END: ++ case STATIC_SRV6_SID_BEHAVIOR_UN: ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT6: ++ case STATIC_SRV6_SID_BEHAVIOR_UDT6: ++ vrf = vrf_lookup_by_name(sid->attributes.vrf_name); ++ if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) { ++ zlog_warn("Inactive vrf"); ++ return; ++ } ++ ifp = if_get_vrf_loopback(vrf->vrf_id); ++ if (!ifp) { ++ zlog_warn("failed to get interface"); ++ return; ++ } ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT4: ++ case STATIC_SRV6_SID_BEHAVIOR_UDT4: ++ vrf = vrf_lookup_by_name(sid->attributes.vrf_name); ++ if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) { ++ zlog_warn("Inactive vrf"); ++ return; ++ } ++ ifp = if_get_vrf_loopback(vrf->vrf_id); ++ if (!ifp) { ++ zlog_warn("failed to get interface"); ++ return; ++ } ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT46: ++ case STATIC_SRV6_SID_BEHAVIOR_UDT46: ++ vrf = vrf_lookup_by_name(sid->attributes.vrf_name); ++ if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) { ++ zlog_warn("Inactive vrf"); ++ return; ++ } ++ ifp = if_get_vrf_loopback(vrf->vrf_id); ++ if (!ifp) { ++ zlog_warn("failed to get interface"); ++ return; ++ } ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_UNSPEC: ++ zlog_warn("unsupported behavior: %u", sid->behavior); ++ break; ++ } ++ ++ /* The SID is attached to the SRv6 interface */ ++ if (!ifp) { ++ ifp = if_lookup_by_name("sr0", VRF_DEFAULT); ++ if (!ifp) { ++ zlog_warn("%s interface not found: nothing to uninstall", ++ "sr0"); ++ return; ++ } ++ } ++ ++ ctx.block_len = sid->locator->block_bits_length; ++ ctx.node_len = sid->locator->node_bits_length; ++ ctx.function_len = sid->locator->function_bits_length; ++ ctx.argument_len = sid->locator->argument_bits_length; ++ ++ zlog_info("delete SID %pFX", ++ &sid->addr); ++ ++ static_zebra_send_localsid(ZEBRA_ROUTE_DELETE, &sid->addr.prefix, sid->addr.prefixlen, ++ ifp->ifindex, action, &ctx); ++} ++ ++extern void static_zebra_request_srv6_sid(struct static_srv6_sid *sid) ++{ ++ struct srv6_sid_ctx ctx = {}; ++ int ret = 0; ++ struct vrf *vrf; ++ ++ if (!sid) ++ return; ++ ++ /* convert `static_srv6_sid_behavior_t` to `seg6local_action_t` */ ++ switch (sid->behavior) { ++ case STATIC_SRV6_SID_BEHAVIOR_UNSPEC: ++ ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_UNSPEC; ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END: ++ case STATIC_SRV6_SID_BEHAVIOR_UN: ++ ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END; ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT6: ++ case STATIC_SRV6_SID_BEHAVIOR_UDT6: ++ ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT6; ++ /* process SRv6 SID attributes */ ++ /* generate table ID from the VRF name, if configured */ ++ if (sid->attributes.vrf_name[0] != '\0') { ++ vrf = vrf_lookup_by_name(sid->attributes.vrf_name); ++ if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) ++ return; ++ ctx.vrf_id = vrf->vrf_id; ++ } ++ ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT4: ++ case STATIC_SRV6_SID_BEHAVIOR_UDT4: ++ ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT4; ++ /* process SRv6 SID attributes */ ++ /* generate table ID from the VRF name, if configured */ ++ if (sid->attributes.vrf_name[0] != '\0') { ++ vrf = vrf_lookup_by_name(sid->attributes.vrf_name); ++ if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) ++ return; ++ ctx.vrf_id = vrf->vrf_id; ++ } ++ ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT46: ++ case STATIC_SRV6_SID_BEHAVIOR_UDT46: ++ ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT46; ++ /* process SRv6 SID attributes */ ++ /* generate table ID from the VRF name, if configured */ ++ if (sid->attributes.vrf_name[0] != '\0') { ++ vrf = vrf_lookup_by_name(sid->attributes.vrf_name); ++ if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) ++ return; ++ ctx.vrf_id = vrf->vrf_id; ++ } ++ ++ break; ++ } ++ ++ zlog_info("calling srv6_manager_get_sid"); ++ ++ /* install the SRv6 SID in the zebra RIB */ ++ ret = srv6_manager_get_sid(zclient, &ctx, &sid->addr.prefix, sid->locator->name, NULL); ++ if (ret < 0) { ++ zlog_warn("%s: error getting SRv6 SID!", __func__); ++ } ++} ++ ++extern void static_zebra_release_srv6_sid(struct static_srv6_sid *sid) ++{ ++ struct srv6_sid_ctx ctx = {}; ++ struct vrf *vrf; ++ int ret = 0; ++ ++ if (!sid) ++ return; ++ ++ /* convert `static_srv6_sid_behavior_t` to `seg6local_action_t` */ ++ switch (sid->behavior) { ++ case STATIC_SRV6_SID_BEHAVIOR_UNSPEC: ++ ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_UNSPEC; ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END: ++ case STATIC_SRV6_SID_BEHAVIOR_UN: ++ ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END; ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT6: ++ case STATIC_SRV6_SID_BEHAVIOR_UDT6: ++ ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT6; ++ /* process SRv6 SID attributes */ ++ /* generate table ID from the VRF name, if configured */ ++ if (sid->attributes.vrf_name[0] != '\0') { ++ vrf = vrf_lookup_by_name(sid->attributes.vrf_name); ++ if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) ++ return; ++ ctx.vrf_id = vrf->vrf_id; ++ } ++ ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT4: ++ case STATIC_SRV6_SID_BEHAVIOR_UDT4: ++ ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT4; ++ /* process SRv6 SID attributes */ ++ /* generate table ID from the VRF name, if configured */ ++ if (sid->attributes.vrf_name[0] != '\0') { ++ vrf = vrf_lookup_by_name(sid->attributes.vrf_name); ++ if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) ++ return; ++ ctx.vrf_id = vrf->vrf_id; ++ } ++ ++ break; ++ case STATIC_SRV6_SID_BEHAVIOR_END_DT46: ++ case STATIC_SRV6_SID_BEHAVIOR_UDT46: ++ ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT46; ++ /* process SRv6 SID attributes */ ++ /* generate table ID from the VRF name, if configured */ ++ if (sid->attributes.vrf_name[0] != '\0') { ++ vrf = vrf_lookup_by_name(sid->attributes.vrf_name); ++ if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) ++ return; ++ ctx.vrf_id = vrf->vrf_id; ++ } ++ ++ break; ++ } ++ ++ /* remove the SRv6 SID from the zebra RIB */ ++ ret = srv6_manager_release_sid(zclient, &ctx); ++ if (ret == ZCLIENT_SEND_FAILURE) ++ flog_err(EC_LIB_ZAPI_SOCKET, ++ "zclient_send_get_srv6_sid() delete failed: %s", ++ safe_strerror(errno)); ++} ++ ++/** ++ * Ask the SRv6 Manager (zebra) about a specific locator ++ * ++ * @param name Locator name ++ * @return 0 on success, -1 otherwise ++ */ ++int static_zebra_srv6_manager_get_locator(const char *name) ++{ ++ if (!name) ++ return -1; ++ ++ /* ++ * Send the Get Locator request to the SRv6 Manager and return the ++ * result ++ */ ++ return srv6_manager_get_locator(zclient, name); ++} ++ ++static void request_srv6_sids(struct static_srv6_locator *locator) ++{ ++ struct static_srv6_sid *sid; ++ struct listnode *node; ++ ++ for (ALL_LIST_ELEMENTS_RO(srv6_sids, node, sid)) { ++ if (sid->locator == locator) ++ static_zebra_request_srv6_sid(sid); ++ } ++} ++ ++/** ++ * Internal function to process an SRv6 locator ++ * ++ * @param locator The locator to be processed ++ */ ++static int static_zebra_process_srv6_locator_internal(struct srv6_locator *locator) ++{ ++ struct static_srv6_locator *loc; ++ struct listnode *node; ++ struct static_srv6_sid *sid; ++ ++ if (!locator) ++ return -1; ++ ++ zlog_info("%s: Received SRv6 locator %s %pFX, loc-block-len=%u, loc-node-len=%u func-len=%u, arg-len=%u", ++ __func__, locator->name, &locator->prefix, ++ locator->block_bits_length, locator->node_bits_length, ++ locator->function_bits_length, locator->argument_bits_length); ++ ++ /* If we are already aware about the locator, nothing to do */ ++ loc = static_srv6_locator_lookup(locator->name); ++ if (loc) ++ return 0; ++ ++ loc = static_srv6_locator_alloc(locator->name); ++ ++ zlog_info("SRv6 locator (locator %s, prefix %pFX) set", ++ locator->name, &locator->prefix); ++ ++ /* Store the locator prefix */ ++ loc->prefix = locator->prefix; ++ loc->block_bits_length = locator->block_bits_length; ++ loc->node_bits_length = locator->node_bits_length; ++ loc->function_bits_length = locator->function_bits_length; ++ loc->argument_bits_length = 0; ++ loc->flags = locator->flags; ++ ++ listnode_add(srv6_locators, loc); ++ ++ for (ALL_LIST_ELEMENTS_RO(srv6_sids, node, sid)) { ++ if (strncmp(sid->locator_name, loc->name, sizeof(loc->name)) == 0) ++ sid->locator = loc; ++ } ++ ++ /* Request SIDs from the locator */ ++ request_srv6_sids(loc); ++ ++ return 0; ++} ++ ++/** ++ * Callback to process an SRv6 locator received from SRv6 Manager (zebra). ++ * ++ * @result 0 on success, -1 otherwise ++ */ ++static int static_zebra_process_srv6_locator_add(ZAPI_CALLBACK_ARGS) ++{ ++ struct srv6_locator loc = {}; ++ ++ if (!srv6_locators) ++ return -1; ++ ++ /* Decode the SRv6 locator */ ++ if (zapi_srv6_locator_decode(zclient->ibuf, &loc) < 0) ++ return -1; ++ ++ return static_zebra_process_srv6_locator_internal(&loc); ++} ++ ++/** ++ * Callback to process a notification from SRv6 Manager (zebra) of an SRv6 ++ * locator deleted. ++ * ++ * @result 0 on success, -1 otherwise ++ */ ++static int static_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS) ++{ ++ struct srv6_locator loc = {}; ++ struct listnode *node, *nnode; ++ struct listnode *node2, *nnode2; ++ struct static_srv6_sid *sid; ++ struct static_srv6_locator *locator; ++ ++ if (!srv6_locators) ++ return -1; ++ ++ /* Decode the received zebra message */ ++ if (zapi_srv6_locator_decode(zclient->ibuf, &loc) < 0) ++ return -1; ++ ++ zlog_info( ++ "SRv6 locator deleted in zebra: name %s, " ++ "prefix %pFX, block_len %u, node_len %u, func_len %u, arg_len %u", ++ loc.name, &loc.prefix, loc.block_bits_length, ++ loc.node_bits_length, loc.function_bits_length, ++ loc.argument_bits_length); ++ ++ locator = static_srv6_locator_lookup(loc.name); ++ if (!locator) ++ return 0; ++ ++ zlog_info("Deleting srv6 sids from locator %s", locator->name); ++ ++ /* Delete SRv6 SIDs */ ++ for (ALL_LIST_ELEMENTS(srv6_sids, node2, nnode2, ++ sid)) { ++ ++ if (sid->locator != locator) ++ continue; ++ ++ zlog_info( ++ "Deleting SRv6 SID (locator %s, sid %pFX)", ++ locator->name, ++ &sid->addr); ++ ++ /* Uninstall the SRv6 SID from the forwarding plane ++ * through Zebra */ ++ static_zebra_srv6_sid_uninstall(sid); ++ } ++ ++ listnode_delete(srv6_locators, locator); ++ static_srv6_locator_free(locator); ++ ++ return 0; ++} ++ ++static int static_zebra_srv6_sid_notify(ZAPI_CALLBACK_ARGS) ++{ ++ struct srv6_sid_ctx ctx; ++ struct in6_addr sid_addr; ++ enum zapi_srv6_sid_notify note; ++ uint32_t sid_func; ++ struct listnode *node; ++ char buf[256]; ++ struct static_srv6_locator *locator; ++ struct prefix_ipv6 tmp_prefix; ++ struct static_srv6_sid *sid; ++ char *loc_name; ++ ++ if (!srv6_locators) ++ return -1; ++ ++ /* Decode the received notification message */ ++ if (!zapi_srv6_sid_notify_decode(zclient->ibuf, &ctx, &sid_addr, ++ &sid_func, NULL, ¬e, &loc_name)) { ++ zlog_err("%s : error in msg decode", __func__); ++ return -1; ++ } ++ ++ zlog_info("%s: received SRv6 SID notify: ctx %s sid_value %pI6 sid_func %u note %s", ++ __func__, srv6_sid_ctx2str(buf, sizeof(buf), &ctx), &sid_addr, ++ sid_func, zapi_srv6_sid_notify2str(note)); ++ ++ /* Handle notification */ ++ switch (note) { ++ case ZAPI_SRV6_SID_ALLOCATED: ++ zlog_info("SRv6 SID %pI6 %s ALLOCATED", &sid_addr, ++ srv6_sid_ctx2str(buf, sizeof(buf), &ctx)); ++ ++ bool found = false; ++ for (ALL_LIST_ELEMENTS_RO(srv6_sids, node, sid)) { ++ if (IPV6_ADDR_SAME(&sid->addr.prefix, &sid_addr)) { ++ found = true; ++ break; ++ } ++ } ++ ++ if (!found) { ++ zlog_info("SRv6 SID %pI6 %s: not found", &sid_addr, ++ srv6_sid_ctx2str(buf, sizeof(buf), &ctx)); ++ return 0; ++ } ++ ++ /* ++ * Install the new SRv6 End SID in the forwarding plane through ++ * Zebra ++ */ ++ static_zebra_srv6_sid_install(sid); ++ ++ break; ++ case ZAPI_SRV6_SID_RELEASED: ++ zlog_info("SRv6 SID %pI6 %s: RELEASED", &sid_addr, ++ srv6_sid_ctx2str(buf, sizeof(buf), &ctx)); ++ break; ++ case ZAPI_SRV6_SID_FAIL_ALLOC: ++ zlog_info("SRv6 SID %pI6 %s: Failed to allocate", ++ &sid_addr, ++ srv6_sid_ctx2str(buf, sizeof(buf), &ctx)); ++ ++ /* Error will be logged by zebra module */ ++ break; ++ case ZAPI_SRV6_SID_FAIL_RELEASE: ++ zlog_warn("%s: SRv6 SID %pI6 %s failure to release", ++ __func__, &sid_addr, ++ srv6_sid_ctx2str(buf, sizeof(buf), &ctx)); ++ ++ /* Error will be logged by zebra module */ ++ break; ++ } ++ ++ return 0; ++} ++ + static zclient_handler *const static_handlers[] = { + [ZEBRA_INTERFACE_ADDRESS_ADD] = interface_address_add, + [ZEBRA_INTERFACE_ADDRESS_DELETE] = interface_address_delete, + [ZEBRA_ROUTE_NOTIFY_OWNER] = route_notify_owner, ++ [ZEBRA_SRV6_LOCATOR_ADD] = static_zebra_process_srv6_locator_add, ++ [ZEBRA_SRV6_LOCATOR_DELETE] = static_zebra_process_srv6_locator_delete, ++ [ZEBRA_SRV6_SID_NOTIFY] = static_zebra_srv6_sid_notify, + }; + + void static_zebra_init(void) +diff --git a/staticd/static_zebra.h b/staticd/static_zebra.h +index c4f4ebdcbc..7b00914499 100644 +--- a/staticd/static_zebra.h ++++ b/staticd/static_zebra.h +@@ -7,6 +7,8 @@ + #ifndef __STATIC_ZEBRA_H__ + #define __STATIC_ZEBRA_H__ + ++#include "static_srv6.h" ++ + #ifdef __cplusplus + extern "C" { + #endif +@@ -22,8 +24,16 @@ extern void static_zebra_stop(void); + extern void static_zebra_vrf_register(struct vrf *vrf); + extern void static_zebra_vrf_unregister(struct vrf *vrf); + ++extern int static_zebra_srv6_manager_get_locator(const char *name); ++ ++extern void static_zebra_request_srv6_sid(struct static_srv6_sid *sid); ++extern void static_zebra_release_srv6_sid(struct static_srv6_sid *sid); ++ ++extern void static_zebra_srv6_sid_install(struct static_srv6_sid *sid); ++extern void static_zebra_srv6_sid_uninstall(struct static_srv6_sid *sid); ++ + #ifdef __cplusplus + } + #endif + +-#endif ++#endif +\ No newline at end of file +diff --git a/staticd/subdir.am b/staticd/subdir.am +index 07ebe3c02c..bdbacbdd68 100644 +--- a/staticd/subdir.am ++++ b/staticd/subdir.am +@@ -19,6 +19,7 @@ staticd_libstatic_a_SOURCES = \ + staticd/static_vty.c \ + staticd/static_nb.c \ + staticd/static_nb_config.c \ ++ staticd/static_srv6.c \ + # end + + noinst_HEADERS += \ +@@ -29,6 +30,7 @@ noinst_HEADERS += \ + staticd/static_vty.h \ + staticd/static_vrf.h \ + staticd/static_nb.h \ ++ staticd/static_srv6.h \ + # end + + clippy_scan += \ +diff --git a/tests/topotests/static_srv6_sids/__init__.py b/tests/topotests/static_srv6_sids/__init__.py +new file mode 100644 +index 0000000000..e69de29bb2 +diff --git a/tests/topotests/static_srv6_sids/expected_srv6_sids.json b/tests/topotests/static_srv6_sids/expected_srv6_sids.json +new file mode 100644 +index 0000000000..e90709638f +--- /dev/null ++++ b/tests/topotests/static_srv6_sids/expected_srv6_sids.json +@@ -0,0 +1,142 @@ ++{ ++ "fcbb:bbbb:1::/48":[ ++ { ++ "prefix":"fcbb:bbbb:1::/48", ++ "prefixLen":48, ++ "protocol":"static", ++ "vrfId":0, ++ "vrfName":"default", ++ "selected":true, ++ "destSelected":true, ++ "distance":1, ++ "metric":0, ++ "installed":true, ++ "table":254, ++ "internalStatus":16, ++ "internalFlags":9, ++ "internalNextHopNum":1, ++ "internalNextHopActiveNum":1, ++ "nexthops":[ ++ { ++ "flags":3, ++ "fib":true, ++ "directlyConnected":true, ++ "interfaceName":"sr0", ++ "active":true, ++ "weight":1, ++ "seg6local":{ ++ "action":"End" ++ }, ++ "seg6localContext":{ ++ "USP":true ++ } ++ } ++ ] ++ } ++ ], ++ "fcbb:bbbb:1:fe10::/64":[ ++ { ++ "prefix":"fcbb:bbbb:1:fe10::/64", ++ "prefixLen":64, ++ "protocol":"static", ++ "vrfId":0, ++ "vrfName":"default", ++ "selected":true, ++ "destSelected":true, ++ "distance":1, ++ "metric":0, ++ "installed":true, ++ "table":254, ++ "internalStatus":16, ++ "internalFlags":9, ++ "internalNextHopNum":1, ++ "internalNextHopActiveNum":1, ++ "nexthops":[ ++ { ++ "flags":3, ++ "fib":true, ++ "directlyConnected":true, ++ "interfaceName":"Vrf10", ++ "active":true, ++ "weight":1, ++ "seg6local":{ ++ "action":"End.DT4" ++ }, ++ "seg6localContext":{ ++ "table":10 ++ } ++ } ++ ] ++ } ++ ], ++ "fcbb:bbbb:1:fe20::/64":[ ++ { ++ "prefix":"fcbb:bbbb:1:fe20::/64", ++ "prefixLen":64, ++ "protocol":"static", ++ "vrfId":0, ++ "vrfName":"default", ++ "selected":true, ++ "destSelected":true, ++ "distance":1, ++ "metric":0, ++ "installed":true, ++ "table":254, ++ "internalStatus":16, ++ "internalFlags":9, ++ "internalNextHopNum":1, ++ "internalNextHopActiveNum":1, ++ "nexthops":[ ++ { ++ "flags":3, ++ "fib":true, ++ "directlyConnected":true, ++ "interfaceName":"Vrf20", ++ "active":true, ++ "weight":1, ++ "seg6local":{ ++ "action":"End.DT6" ++ }, ++ "seg6localContext":{ ++ "table":20 ++ } ++ } ++ ] ++ } ++ ], ++ "fcbb:bbbb:1:fe30::/64":[ ++ { ++ "prefix":"fcbb:bbbb:1:fe30::/64", ++ "prefixLen":64, ++ "protocol":"static", ++ "vrfId":0, ++ "vrfName":"default", ++ "selected":true, ++ "destSelected":true, ++ "distance":1, ++ "metric":0, ++ "installed":true, ++ "table":254, ++ "internalStatus":16, ++ "internalFlags":9, ++ "internalNextHopNum":1, ++ "internalNextHopActiveNum":1, ++ "nexthops":[ ++ { ++ "flags":3, ++ "fib":true, ++ "directlyConnected":true, ++ "interfaceName":"Vrf30", ++ "active":true, ++ "weight":1, ++ "seg6local":{ ++ "action":"End.DT46" ++ }, ++ "seg6localContext":{ ++ "table":30 ++ } ++ } ++ ] ++ } ++ ] ++ } +\ No newline at end of file +diff --git a/tests/topotests/static_srv6_sids/r1/mgmtd.conf b/tests/topotests/static_srv6_sids/r1/mgmtd.conf +new file mode 100644 +index 0000000000..e69de29bb2 +diff --git a/tests/topotests/static_srv6_sids/r1/setup.sh b/tests/topotests/static_srv6_sids/r1/setup.sh +new file mode 100644 +index 0000000000..040be73914 +--- /dev/null ++++ b/tests/topotests/static_srv6_sids/r1/setup.sh +@@ -0,0 +1,13 @@ ++ip link add sr0 type dummy ++ip link set sr0 up ++ ++ip link add Vrf10 type vrf table 10 ++ip link set Vrf10 up ++ ++ip link add Vrf20 type vrf table 20 ++ip link set Vrf20 up ++ ++ip link add Vrf30 type vrf table 30 ++ip link set Vrf30 up ++ ++sysctl -w net.vrf.strict_mode=1 +diff --git a/tests/topotests/static_srv6_sids/r1/staticd.conf b/tests/topotests/static_srv6_sids/r1/staticd.conf +new file mode 100644 +index 0000000000..96d2f4e9a6 +--- /dev/null ++++ b/tests/topotests/static_srv6_sids/r1/staticd.conf +@@ -0,0 +1,16 @@ ++hostname r1 ++! ++log stdout notifications ++log commands ++log file staticd.log debugging ++! ++segment-routing ++ srv6 ++ static-sids ++ sid fcbb:bbbb:1::/48 locator MAIN behavior uN ++ sid fcbb:bbbb:1:fe10::/64 locator MAIN behavior uDT4 vrf Vrf10 ++ sid fcbb:bbbb:1:fe20::/64 locator MAIN behavior uDT6 vrf Vrf20 ++ sid fcbb:bbbb:1:fe30::/64 locator MAIN behavior uDT46 vrf Vrf30 ++ ! ++ ! ++! +diff --git a/tests/topotests/static_srv6_sids/r1/zebra.conf b/tests/topotests/static_srv6_sids/r1/zebra.conf +new file mode 100644 +index 0000000000..cf73e23744 +--- /dev/null ++++ b/tests/topotests/static_srv6_sids/r1/zebra.conf +@@ -0,0 +1,19 @@ ++hostname r1 ++! ++! debug zebra events ++! debug zebra rib detailed ++! ++log stdout notifications ++log commands ++log file zebra.log debugging ++! ++segment-routing ++ srv6 ++ locators ++ locator MAIN ++ prefix fcbb:bbbb:1::/48 block-len 32 node-len 16 func-bits 16 ++ behavior usid ++ ! ++ ! ++ ! ++! +\ No newline at end of file +diff --git a/tests/topotests/static_srv6_sids/test_static_srv6_sids.py b/tests/topotests/static_srv6_sids/test_static_srv6_sids.py +new file mode 100755 +index 0000000000..195ecf9385 +--- /dev/null ++++ b/tests/topotests/static_srv6_sids/test_static_srv6_sids.py +@@ -0,0 +1,89 @@ ++#!/usr/bin/env python ++# SPDX-License-Identifier: ISC ++ ++# ++# test_static_srv6_sids.py ++# ++# Copyright 2025 Carmine Scarpitta ++# ++ ++""" ++test_static_srv6_sids.py: ++Test for SRv6 static route on zebra ++""" ++ ++import os ++import sys ++import json ++import pytest ++import functools ++ ++CWD = os.path.dirname(os.path.realpath(__file__)) ++sys.path.append(os.path.join(CWD, "../")) ++ ++# pylint: disable=C0413 ++from lib import topotest ++from lib.topogen import Topogen, TopoRouter, get_topogen ++from lib.topolog import logger ++ ++pytestmark = [pytest.mark.staticd] ++ ++ ++def open_json_file(filename): ++ try: ++ with open(filename, "r") as f: ++ return json.load(f) ++ except IOError: ++ assert False, "Could not read file {}".format(filename) ++ ++ ++def setup_module(mod): ++ tgen = Topogen({None: "r1"}, mod.__name__) ++ tgen.start_topology() ++ for rname, router in tgen.routers().items(): ++ router.run("/bin/bash {}/{}/setup.sh".format(CWD, rname)) ++ router.load_config( ++ TopoRouter.RD_ZEBRA, os.path.join(CWD, "{}/zebra.conf".format(rname)) ++ ) ++ router.load_config( ++ TopoRouter.RD_MGMTD, os.path.join(CWD, "{}/mgmtd.conf".format(rname)) ++ ) ++ router.load_config( ++ TopoRouter.RD_STATIC, os.path.join(CWD, "{}/staticd.conf".format(rname)) ++ ) ++ tgen.start_router() ++ ++ ++def teardown_module(): ++ tgen = get_topogen() ++ tgen.stop_topology() ++ ++ ++def test_srv6_static_sids(): ++ tgen = get_topogen() ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ router = tgen.gears["r1"] ++ ++ def _check_srv6_static_sids(router, expected_route_file): ++ logger.info("checking zebra srv6 static sids") ++ output = json.loads(router.vtysh_cmd("show ipv6 route static json")) ++ expected = open_json_file("{}/{}".format(CWD, expected_route_file)) ++ return topotest.json_cmp(output, expected) ++ ++ def check_srv6_static_sids(router, expected_file): ++ func = functools.partial(_check_srv6_static_sids, router, expected_file) ++ _, result = topotest.run_and_expect(func, None, count=15, wait=1) ++ assert result is None, "Failed" ++ ++ # FOR DEVELOPER: ++ # If you want to stop some specific line and start interactive shell, ++ # please use tgen.mininet_cli() to start it. ++ ++ logger.info("Test for srv6 sids configuration") ++ check_srv6_static_sids(router, "expected_srv6_sids.json") ++ ++ ++if __name__ == "__main__": ++ args = ["-s"] + sys.argv[1:] ++ sys.exit(pytest.main(args)) +diff --git a/vtysh/vtysh.c b/vtysh/vtysh.c +index c460dea70c..a1b16c2b66 100644 +--- a/vtysh/vtysh.c ++++ b/vtysh/vtysh.c +@@ -1312,6 +1312,13 @@ static struct cmd_node srv6_node = { + .prompt = "%s(config-srv6)# ", + }; + ++static struct cmd_node srv6_sids_node = { ++ .name = "srv6-sids", ++ .node = SRV6_SIDS_NODE, ++ .parent_node = SRV6_NODE, ++ .prompt = "%s(config-srv6-sids)# ", ++}; ++ + static struct cmd_node srv6_locs_node = { + .name = "srv6-locators", + .node = SRV6_LOCS_NODE, +@@ -1685,7 +1692,7 @@ DEFUNSH(VTYSH_REALLYALL, vtysh_end_all, vtysh_end_all_cmd, "end", + return vtysh_end(); + } + +-DEFUNSH(VTYSH_ZEBRA, srv6, srv6_cmd, ++DEFUNSH(VTYSH_ZEBRA | VTYSH_MGMTD, srv6, srv6_cmd, + "srv6", + "Segment-Routing SRv6 configuration\n") + { +@@ -1693,6 +1700,14 @@ DEFUNSH(VTYSH_ZEBRA, srv6, srv6_cmd, + return CMD_SUCCESS; + } + ++DEFUNSH(VTYSH_MGMTD, srv6_sids, srv6_sids_cmd, ++ "static-sids", ++ "Segment-Routing SRv6 SIDs configuration\n") ++{ ++ vty->node = SRV6_SIDS_NODE; ++ return CMD_SUCCESS; ++} ++ + DEFUNSH(VTYSH_ZEBRA, srv6_locators, srv6_locators_cmd, + "locators", + "Segment-Routing SRv6 locators configuration\n") +@@ -2216,7 +2231,7 @@ DEFUNSH(VTYSH_FABRICD, router_openfabric, router_openfabric_cmd, "router openfab + } + #endif /* HAVE_FABRICD */ + +-DEFUNSH(VTYSH_SR, segment_routing, segment_routing_cmd, ++DEFUNSH(VTYSH_SR | VTYSH_MGMTD, segment_routing, segment_routing_cmd, + "segment-routing", + "Configure segment routing\n") + { +@@ -2535,7 +2550,7 @@ DEFUNSH(VTYSH_VRF, exit_vrf_config, exit_vrf_config_cmd, "exit-vrf", + return CMD_SUCCESS; + } + +-DEFUNSH(VTYSH_ZEBRA, exit_srv6_config, exit_srv6_config_cmd, "exit", ++DEFUNSH(VTYSH_ZEBRA | VTYSH_MGMTD, exit_srv6_config, exit_srv6_config_cmd, "exit", + "Exit from SRv6 configuration mode\n") + { + if (vty->node == SRV6_NODE) +@@ -2551,6 +2566,14 @@ DEFUNSH(VTYSH_ZEBRA, exit_srv6_locs_config, exit_srv6_locs_config_cmd, "exit", + return CMD_SUCCESS; + } + ++DEFUNSH(VTYSH_MGMTD, exit_srv6_sids_config, exit_srv6_sids_config_cmd, "exit", ++ "Exit from SRv6-SIDs configuration mode\n") ++{ ++ if (vty->node == SRV6_SIDS_NODE) ++ vty->node = SRV6_NODE; ++ return CMD_SUCCESS; ++} ++ + DEFUNSH(VTYSH_ZEBRA, exit_srv6_loc_config, exit_srv6_loc_config_cmd, "exit", + "Exit from SRv6-locators configuration mode\n") + { +@@ -2806,13 +2829,13 @@ DEFUNSH(VTYSH_KEYS, vtysh_quit_keys, vtysh_quit_keys_cmd, "quit", + return vtysh_exit_keys(self, vty, argc, argv); + } + +-DEFUNSH(VTYSH_SR, vtysh_exit_sr, vtysh_exit_sr_cmd, "exit", ++DEFUNSH(VTYSH_SR | VTYSH_MGMTD, vtysh_exit_sr, vtysh_exit_sr_cmd, "exit", + "Exit current mode and down to previous mode\n") + { + return vtysh_exit(vty); + } + +-DEFUNSH(VTYSH_SR, vtysh_quit_sr, vtysh_quit_sr_cmd, "quit", ++DEFUNSH(VTYSH_SR | VTYSH_MGMTD, vtysh_quit_sr, vtysh_quit_sr_cmd, "quit", + "Exit current mode and down to previous mode\n") + { + return vtysh_exit(vty); +@@ -4999,6 +5022,7 @@ void vtysh_init_vty(void) + install_node(&rmap_node); + install_node(&vty_node); + install_node(&srv6_node); ++ install_node(&srv6_sids_node); + install_node(&srv6_locs_node); + install_node(&srv6_loc_node); + install_node(&srv6_encap_node); +@@ -5442,6 +5466,10 @@ void vtysh_init_vty(void) + install_element(SRV6_NODE, &exit_srv6_config_cmd); + install_element(SRV6_NODE, &vtysh_end_all_cmd); + install_element(SRV6_NODE, &srv6_encap_cmd); ++ install_element(SRV6_NODE, &srv6_sids_cmd); ++ ++ install_element(SRV6_SIDS_NODE, &exit_srv6_sids_config_cmd); ++ install_element(SRV6_SIDS_NODE, &vtysh_end_all_cmd); + + install_element(SRV6_LOCS_NODE, &srv6_locator_cmd); + install_element(SRV6_LOCS_NODE, &exit_srv6_locs_config_cmd); +diff --git a/yang/frr-staticd.yang b/yang/frr-staticd.yang +index 1e6c54c006..ac3b04dede 100644 +--- a/yang/frr-staticd.yang ++++ b/yang/frr-staticd.yang +@@ -92,6 +92,41 @@ module frr-staticd { + } + } + ++ typedef srv6-behavior { ++ type enumeration { ++ enum end { ++ value 1; ++ } ++ enum end-x { ++ value 2; ++ } ++ enum end-dt6 { ++ value 3; ++ } ++ enum end-dt4 { ++ value 4; ++ } ++ enum end-dt46 { ++ value 5; ++ } ++ enum un { ++ value 6; ++ } ++ enum ua { ++ value 7; ++ } ++ enum udt6 { ++ value 8; ++ } ++ enum udt4 { ++ value 9; ++ } ++ enum udt46 { ++ value 10; ++ } ++ } ++ } ++ + augment "/frr-rt:routing/frr-rt:control-plane-protocols/frr-rt:control-plane-protocol" { + container staticd { + when "../frr-rt:type = 'frr-staticd:staticd'" { +@@ -144,6 +179,28 @@ module frr-staticd { + uses staticd-prefix-attributes; + } + } ++ ++ container segment-routing { ++ container srv6 { ++ container local-sids { ++ list sid { ++ key "sid"; ++ leaf sid { ++ type inet:ipv6-prefix; ++ } ++ leaf behavior { ++ type srv6-behavior; ++ } ++ leaf locator-name { ++ type string; ++ } ++ leaf vrf-name { ++ type string; ++ } ++ } ++ } ++ } ++ } + } + } +-} ++} +\ No newline at end of file +diff --git a/zebra/zebra_srv6.c b/zebra/zebra_srv6.c +index 624f60e815..e14cc1f5c1 100644 +--- a/zebra/zebra_srv6.c ++++ b/zebra/zebra_srv6.c +@@ -1488,14 +1488,15 @@ static bool alloc_srv6_sid_func_dynamic(struct zebra_srv6_sid_block *block, + */ + static int get_srv6_sid_explicit(struct zebra_srv6_sid **sid, + struct srv6_sid_ctx *ctx, +- struct in6_addr *sid_value) ++ struct in6_addr *sid_value, ++ struct srv6_locator *loc) + { + struct zebra_srv6 *srv6 = zebra_srv6_get_default(); + struct zebra_srv6_sid_ctx *s = NULL; + struct zebra_srv6_sid_ctx *zctx = NULL; + struct listnode *node; + uint32_t sid_func = 0, sid_func_wide = 0; +- struct srv6_locator *locator = NULL; ++ struct srv6_locator *locator = loc; + struct zebra_srv6_sid_block *block = NULL; + char buf[256]; + +@@ -1524,7 +1525,7 @@ static int get_srv6_sid_explicit(struct zebra_srv6_sid **sid, + * It is not allowed to allocate an explicit SID for a given context if the context + * is already associated with an explicit SID + */ +- if (s->sid->alloc_mode == SRV6_SID_ALLOC_MODE_EXPLICIT) { ++ if (s->ctx.behavior != ZEBRA_SEG6_LOCAL_ACTION_END && s->sid->alloc_mode == SRV6_SID_ALLOC_MODE_EXPLICIT) { + zlog_err("%s: cannot alloc SID %pI6 for ctx %s: ctx already associated with SID %pI6", + __func__, sid_value, + srv6_sid_ctx2str(buf, sizeof(buf), +@@ -1538,18 +1539,106 @@ static int get_srv6_sid_explicit(struct zebra_srv6_sid **sid, + } + } + +- /* Get parent locator and function of the provided SID */ +- if (!zebra_srv6_sid_decompose(sid_value, &block, &locator, &sid_func, +- &sid_func_wide)) { +- zlog_err("%s: invalid SM request arguments: parent block/locator not found for SID %pI6", +- __func__, sid_value); +- return -1; ++ if (!locator) { ++ /* Get parent locator and function of the provided SID */ ++ if (!zebra_srv6_sid_decompose(sid_value, &block, &locator, &sid_func, ++ &sid_func_wide)) { ++ zlog_err("%s: invalid SM request arguments: parent block/locator not found for SID %pI6", ++ __func__, sid_value); ++ return -1; ++ } ++ } else { ++ struct prefix_ipv6 tmp_prefix; ++ struct srv6_sid_format *format = locator->sid_format; ++ uint8_t offset, func_len; ++ ++ /* ++ * Build a temporary prefix_ipv6 object representing the SRv6 SID. ++ * This temporary prefix object is used below by the prefix_match ++ * function to check if the SID belongs to a specific locator. ++ */ ++ tmp_prefix.family = AF_INET6; ++ tmp_prefix.prefixlen = IPV6_MAX_BITLEN; ++ tmp_prefix.prefix = *sid_value; ++ ++ /* ++ * Check if the locator prefix includes the temporary prefix ++ * representing the SID. ++ */ ++ if (!prefix_match((struct prefix *)&locator->prefix, ++ (struct prefix *)&tmp_prefix)) { ++ zlog_err("%s: invalid SM request arguments: SID %pI6 does not belong to the specified locator '%s'", ++ __func__, sid_value, locator->name); ++ return -1; ++ } ++ ++ if (format) { ++ offset = format->block_len + format->node_len; ++ func_len = format->function_len; ++ } else { ++ offset = locator->block_bits_length + ++ locator->node_bits_length; ++ func_len = locator->function_bits_length; ++ } ++ ++ for (uint8_t idx = 0; idx < func_len; idx++) { ++ uint8_t tidx = offset + idx; ++ sid_func |= (sid_value->s6_addr[tidx / 8] & ++ (0x1 << (7 - tidx % 8))) ++ << (((func_len - 1 - idx) / 8) * 8); ++ } ++ ++ /* ++ * If function comes from the Wide LIB range, we also ++ * need to get the Wide function. ++ */ ++ if (format && format->type == SRV6_SID_FORMAT_TYPE_USID) { ++ if (sid_func >= format->config.usid.wlib_start && ++ sid_func <= format->config.usid.wlib_end) { ++ format = locator->sid_format; ++ ++ offset = format->block_len + ++ format->node_len + ++ format->function_len; ++ ++ for (uint8_t idx = 0; idx < 16; idx++) { ++ uint8_t tidx = offset + idx; ++ sid_func_wide |= ++ (sid_value->s6_addr[tidx / ++ 8] & ++ (0x1 << (7 - tidx % 8))) ++ << (((16 - 1 - idx) / 8) * ++ 8); ++ } ++ } ++ } ++ ++ block = locator->sid_block; + } + + if (ctx->behavior == ZEBRA_SEG6_LOCAL_ACTION_END) { +- zlog_err("%s: invalid SM request arguments: explicit SID allocation not allowed for End/uN behavior", +- __func__); +- return -1; ++ zctx = zebra_srv6_sid_ctx_alloc(); ++ zctx->ctx = *ctx; ++ ++ /* Allocate the SID to store SID information */ ++ *sid = zebra_srv6_sid_alloc(zctx, sid_value, locator, block, sid_func, ++ SRV6_SID_ALLOC_MODE_EXPLICIT); ++ if (!(*sid)) { ++ flog_err(EC_ZEBRA_SM_CANNOT_ASSIGN_SID, ++ "%s: failed to create SRv6 SID %s (%pI6)", __func__, ++ srv6_sid_ctx2str(buf, sizeof(buf), ctx), sid_value); ++ return -1; ++ } ++ (*sid)->ctx = zctx; ++ zctx->sid = *sid; ++ listnode_add(srv6->sids, zctx); ++ ++ if (IS_ZEBRA_DEBUG_PACKET) ++ zlog_debug("%s: allocated explicit SRv6 SID %pI6 for context %s", ++ __func__, &(*sid)->value, ++ srv6_sid_ctx2str(buf, sizeof(buf), ctx)); ++ ++ return 1; + } + + /* Allocate an explicit SID function for the SID */ +@@ -1749,7 +1838,16 @@ int get_srv6_sid(struct zebra_srv6_sid **sid, struct srv6_sid_ctx *ctx, + return -1; + } + +- ret = get_srv6_sid_explicit(sid, ctx, sid_value); ++ if (locator_name) { ++ locator = zebra_srv6_locator_lookup(locator_name); ++ if (!locator) { ++ zlog_err("%s: invalid SM request arguments: SRv6 locator '%s' does not exist", ++ __func__, locator_name); ++ return -1; ++ } ++ } ++ ++ ret = get_srv6_sid_explicit(sid, ctx, sid_value, locator); + + break; + case SRV6_SID_ALLOC_MODE_DYNAMIC: +-- +2.45.2 + diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series index 0cb3259b47d..605bfc4d8b3 100644 --- a/src/sonic-frr/patch/series +++ b/src/sonic-frr/patch/series @@ -6,30 +6,13 @@ 0006-Link-local-scope-was-not-set-while-binding-socket-for-bgp-ipv6-link-local-neighbors.patch 0007-ignore-route-from-default-table.patch 0008-Use-vrf_id-for-vrf-not-tabled_id.patch -0009-bgpd-Ensure-suppress-fib-pending-works-with-network-.patch 0010-bgpd-Change-log-level-for-graceful-restart-events.patch -0011-zebra-Static-routes-async-notification-do-not-need-t.patch -0012-zebra-Rename-vrf_lookup_by_tableid-to-zebra_vrf_look.patch -0013-zebra-Move-protodown_r_bit-to-a-better-spot.patch -0014-zebra-Remove-unused-dplane_intf_delete.patch -0015-zebra-Remove-unused-add-variable.patch -0016-zebra-Remove-duplicate-function-for-netlink-interfac.patch -0017-zebra-Add-code-to-get-set-interface-to-pass-up-from-.patch -0018-zebra-Use-zebra-dplane-for-RTM-link-and-addr.patch -0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch -0020-zebra-Fix-non-notification-of-better-admin-won.patch 0021-Disable-ipv6-src-address-test-in-pceplib.patch 0022-cross-compile-changes.patch -0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch -0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch 0025-bgp-community-memory-leak-fix.patch -0026-bgp-fib-suppress-announce-fix.patch -0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch 0028-zebra-fix-parse-attr-problems-for-encap.patch -0029-zebra-nhg-fix-on-intf-up.patch 0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch 0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch -0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch 0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch 0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch 0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch @@ -50,6 +33,29 @@ 0050-bgpd-backpressure-Avoid-use-after-free.patch 0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch 0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch -0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch -build-dplane-fpm-sonic-module.patch -bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch +0054-build-dplane-fpm-sonic-module.patch +0055-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch +0056-zebra-do-not-send-local-routes-to-fpm.patch +0057-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch +0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch +0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch +0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch +0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch +0062-zebra-lib-use-internal-rbtree-per-ns.patch +0063-Patch-to-send-tag-value-associated-with-route-via-ne.patch +0064-SRv6-BGP-SID-reachability.patch +0065-zebra-display-srv6-encapsulation-source-address-when-configured.patch +0066-lib-fix-srv6-locator-flags-propagated-to-isis.patch +0067-Add-support-for-SRv6-SID-Manager.patch +0068-bgpd-Extend-BGP-to-communicate-with-the-SRv6-SID-Manager-to-allocate-release-SRv6-SIDs.patch +0069-lib-nexthop-code-should-use-uint16_t-for-nexthop-cou.patch +0070-Allow-16-bit-size-for-nexthops.patch +0071-zebra-Only-notify-dplane-work-pthread-when-needed.patch +0072-Fix-up-improper-handling-of-nexthops-for-nexthop-tra.patch +0073-remove-in6addr-cmp.patch +0074-bgp-best-port-reordering.patch +0075-bgp-mp-info-changes.patch +0076-Optimizations-and-problem-fixing-for-large-scale-ecmp-from-bgp.patch +0077-frr-vtysh-dependencies-for-srv6-static-patches.patch +0078-vtysh-de-conditionalize-and-reorder-install-node.patch +0079-staticd-add-support-for-srv6.patch diff --git a/src/sonic-gnmi b/src/sonic-gnmi index e0f09241f7a..b017531f9de 160000 --- a/src/sonic-gnmi +++ b/src/sonic-gnmi @@ -1 +1 @@ -Subproject commit e0f09241f7ac15135cdc3ea0f16e7f217d1dd4b7 +Subproject commit b017531f9dee9a595f30410e7fbf356b57ecc9e6 diff --git a/src/sonic-host-services b/src/sonic-host-services index c05d43e24dc..0430ada2e36 160000 --- a/src/sonic-host-services +++ b/src/sonic-host-services @@ -1 +1 @@ -Subproject commit c05d43e24dca74fd2cae83dad9936232c1011cb3 +Subproject commit 0430ada2e369491a560538a10823a3da25401074 diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel index fe78170347f..416e7a4b358 160000 --- a/src/sonic-linux-kernel +++ b/src/sonic-linux-kernel @@ -1 +1 @@ -Subproject commit fe78170347f947f67828f94b75d3ff8e12f7fd43 +Subproject commit 416e7a4b358e50aefcb9cd28beeb23b67ca28eae diff --git a/src/sonic-platform-common b/src/sonic-platform-common index 9fc9c855e23..75c320d9e45 160000 --- a/src/sonic-platform-common +++ b/src/sonic-platform-common @@ -1 +1 @@ -Subproject commit 9fc9c855e230098ad24791b5368574357a8711ab +Subproject commit 75c320d9e457e60a5bfc2bce5d637c1e24f6fb85 diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons index e77218381d4..c61323f41ab 160000 --- a/src/sonic-platform-daemons +++ b/src/sonic-platform-daemons @@ -1 +1 @@ -Subproject commit e77218381d4d67c2ac89873e0ce47f32a186c121 +Subproject commit c61323f41abc9afefcc581e0586ea30fe656a147 diff --git a/src/sonic-py-common/sonic_py_common/daemon_base.py b/src/sonic-py-common/sonic_py_common/daemon_base.py index fd98a12b28e..1e65e47dd5c 100644 --- a/src/sonic-py-common/sonic_py_common/daemon_base.py +++ b/src/sonic-py-common/sonic_py_common/daemon_base.py @@ -26,7 +26,7 @@ def db_connect(db_name, namespace=EMPTY_NAMESPACE): from swsscommon import swsscommon - return swsscommon.DBConnector(db_name, REDIS_TIMEOUT_MSECS, True, namespace) + return swsscommon.DBConnector(db_name, REDIS_TIMEOUT_MSECS, False, namespace) # diff --git a/src/sonic-py-common/sonic_py_common/device_info.py b/src/sonic-py-common/sonic_py_common/device_info.py index 75e8dcb5761..238ab8dcdfd 100644 --- a/src/sonic-py-common/sonic_py_common/device_info.py +++ b/src/sonic-py-common/sonic_py_common/device_info.py @@ -168,6 +168,34 @@ def get_platform_and_hwsku(): return (platform, hwsku) +def get_platform_json_data(): + """ + Retrieve the data from platform.json file + + Returns: + A dictionary containing the key/value pairs as found in the platform.json file + """ + platform = get_platform() + if not platform: + return None + + platform_path = get_path_to_platform_dir() + if not platform_path: + return None + + platform_json = os.path.join(platform_path, PLATFORM_JSON_FILE) + if not os.path.isfile(platform_json): + return None + + try: + with open(platform_json, 'r') as f: + platform_data = json.loads(f.read()) + return platform_data + except (json.JSONDecodeError, IOError, TypeError, ValueError): + # Handle any file reading and JSON parsing errors + return None + + def get_asic_conf_file_path(): """ Retrieves the path to the ASIC configuration file on the device @@ -582,15 +610,30 @@ def is_smartswitch(): if not platform: return False - # get platform.json file path - platform_json = os.path.join(HOST_DEVICE_PATH, platform, "platform.json") - try: - with open(platform_json, 'r') as f: - platform_cfg = json.loads(f.read()) - return "DPUS" in platform_cfg - except IOError: + # Retrieve platform.json data + platform_data = get_platform_json_data() + if platform_data: + return "DPUS" in platform_data + + return False + + +def is_dpu(): + # Get platform + platform = get_platform() + if not platform: return False + if not is_smartswitch(): + return False + + # Retrieve platform.json data + platform_data = get_platform_json_data() + if platform_data: + return 'DPU' in platform_data + + return False + def is_supervisor(): platform_env_conf_file_path = get_platform_env_conf_file_path() @@ -892,37 +935,63 @@ def is_frontend_port_present_in_host(): return True +def get_dpu_info(): + """ + Retrieves the DPU information from platform.json file. + + Returns: + A dictionary containing the DPU information. + """ + + platform = get_platform() + if not platform: + return {} + + # Retrieve platform.json data + platform_data = get_platform_json_data() + if not platform_data: + return {} + + if "DPUS" in platform_data: + return platform_data["DPUS"] + elif 'DPU' in platform_data: + return platform_data['DPU'] + else: + return {} + + def get_num_dpus(): """ Retrieves the number of DPUs from platform.json file. - Args: - Returns: A integer to indicate the number of DPUs. """ - platform = get_platform() - if not platform: + if is_dpu(): return 0 - # Get Platform path. - platform_path = get_path_to_platform_dir() + dpu_info = get_dpu_info() + if dpu_info is not None and len(dpu_info) > 0: + return len(dpu_info) - if os.path.isfile(os.path.join(platform_path, PLATFORM_JSON_FILE)): - json_file = os.path.join(platform_path, PLATFORM_JSON_FILE) + return 0 - try: - with open(json_file, 'r') as file: - platform_data = json.load(file) - except (json.JSONDecodeError, IOError, TypeError, ValueError): - # Handle any file reading and JSON parsing errors - return 0 - - # Convert to lower case avoid case sensitive. - data = {k.lower(): v for k, v in platform_data.items()} - DPUs = data.get('dpus', None) - if DPUs is not None and len(DPUs) > 0: - return len(DPUs) - return 0 +def get_dpu_list(): + """ + Retrieves the list of DPUs from platform.json file. + + Returns: + A list indicating the list of DPUs. + For example, ['dpu0', 'dpu1', 'dpu2'] + """ + + if is_dpu(): + return [] + + dpu_info = get_dpu_info() + if dpu_info is not None and len(dpu_info) > 0: + return list(dpu_info) + + return [] diff --git a/src/sonic-py-common/sonic_py_common/multi_asic.py b/src/sonic-py-common/sonic_py_common/multi_asic.py index e9d5a6555b7..dcba7c3d51a 100644 --- a/src/sonic-py-common/sonic_py_common/multi_asic.py +++ b/src/sonic-py-common/sonic_py_common/multi_asic.py @@ -514,7 +514,7 @@ def get_asic_presence_list(): # This is supervisor card. Some fabric cards may not be inserted. # Get asic list from CHASSIS_ASIC_TABLE which lists only the asics # present based on Fabric card detection by the platform. - db = swsscommon.DBConnector(CHASSIS_STATE_DB, 0, True) + db = swsscommon.DBConnector(CHASSIS_STATE_DB, 0, False) asic_table = swsscommon.Table(db, CHASSIS_FABRIC_ASIC_INFO_TABLE) if asic_table: asics_presence_list = list(asic_table.getKeys()) diff --git a/src/sonic-py-common/tests/device_info_test.py b/src/sonic-py-common/tests/device_info_test.py index 8596acd178d..e7ac9e88c3c 100644 --- a/src/sonic-py-common/tests/device_info_test.py +++ b/src/sonic-py-common/tests/device_info_test.py @@ -10,6 +10,7 @@ import mock import pytest +import json from sonic_py_common import device_info @@ -162,6 +163,176 @@ def test_get_platform_info(self, mock_hwsku, mock_machine_info, mock_sonic_ver, assert mock_hwsku.called_once() mock_cfg_inst.get_table.assert_called_once_with("DEVICE_METADATA") + @mock.patch("os.path.isfile") + @mock.patch("{}.open".format(BUILTINS)) + @mock.patch("sonic_py_common.device_info.get_path_to_platform_dir") + @mock.patch("sonic_py_common.device_info.get_platform") + def test_get_platform_json_data(self, mock_get_platform, mock_get_path_to_platform_dir, mock_open, mock_isfile): + mock_get_platform.return_value = "x86_64-mlnx_msn2700-r0" + mock_get_path_to_platform_dir.return_value = "/usr/share/sonic/device" + mock_isfile.return_value = True + platform_json_data = { + "chassis": { + "name": "MSN2700" + } + } + open_mocked = mock.mock_open(read_data=json.dumps(platform_json_data)) + mock_open.side_effect = open_mocked + + result = device_info.get_platform_json_data() + assert result == platform_json_data + assert mock_open.call_count == 1 + + # Test case where platform is None + mock_get_platform.return_value = None + result = device_info.get_platform_json_data() + assert result is None + + # Test case where platform path is None + mock_get_platform.return_value = "x86_64-mlnx_msn2700-r0" + mock_get_path_to_platform_dir.return_value = None + result = device_info.get_platform_json_data() + assert result is None + + # Test case where platform.json file does not exist + mock_get_path_to_platform_dir.return_value = "/usr/share/sonic/device" + mock_isfile.return_value = False + result = device_info.get_platform_json_data() + assert result is None + + # Test case where JSON decoding fails + mock_isfile.return_value = True + open_mocked = mock.mock_open(read_data="invalid json") + mock_open.side_effect = open_mocked + result = device_info.get_platform_json_data() + assert result is None + + @mock.patch("sonic_py_common.device_info.get_platform_json_data") + @mock.patch("sonic_py_common.device_info.get_platform") + def test_is_smartswitch(self, mock_get_platform, mock_get_platform_json_data): + # Test case where platform is None + mock_get_platform.return_value = None + assert device_info.is_smartswitch() == False + + # Test case where platform.json data is None + mock_get_platform.return_value="x86_64-mlnx_msn2700-r0" + mock_get_platform_json_data.return_value=None + assert device_info.is_smartswitch() == False + + # Test case where platform.json data does not contain "DPUS" + mock_get_platform_json_data.return_value={} + assert device_info.is_smartswitch() == False + + # Test case where platform.json data contains "DPUS" + mock_get_platform_json_data.return_value={"DPUS": {}} + assert device_info.is_smartswitch() == True + + @mock.patch("sonic_py_common.device_info.get_platform_json_data") + @mock.patch("sonic_py_common.device_info.is_smartswitch") + @mock.patch("sonic_py_common.device_info.get_platform") + def test_is_dpu(self, mock_get_platform, mock_is_smartswitch, mock_get_platform_json_data): + # Test case where platform is None + mock_get_platform.return_value=None + assert device_info.is_dpu() == False + + # Test case where platform is not a smart switch + mock_get_platform.return_value="x86_64-mlnx_msn2700-r0" + mock_is_smartswitch.return_value=False + assert device_info.is_dpu() == False + + # Test case where platform is a smart switch but no DPU data in platform.json + mock_is_smartswitch.return_value=True + mock_get_platform_json_data.return_value={} + assert device_info.is_dpu() == False + + # Test case where platform is a smart switch and DPU data is present in platform.json + mock_get_platform_json_data.return_value={"DPU": {}} + assert device_info.is_dpu() == True + + # Test case where platform is a smart switch and DPU data is present in platform.json + mock_get_platform_json_data.return_value={"DPUS": {}} + assert device_info.is_dpu() == False + + @mock.patch("sonic_py_common.device_info.get_platform_json_data") + @mock.patch("sonic_py_common.device_info.get_platform") + def test_get_dpu_info(self, mock_get_platform, mock_get_platform_json_data): + # Test case where platform is None + mock_get_platform.return_value = None + assert device_info.get_dpu_info() == {} + + # Test case where platform.json data is None + mock_get_platform.return_value = "x86_64-mlnx_msn2700-r0" + mock_get_platform_json_data.return_value = None + assert device_info.get_dpu_info() == {} + + # Test case where platform.json data does not contain "DPUS" or "DPU" + mock_get_platform_json_data.return_value = {} + assert device_info.get_dpu_info() == {} + + # Test case where platform.json data contains "DPUS" + mock_get_platform_json_data.return_value = {"DPUS": {"dpu0": {}, "dpu1": {}}} + assert device_info.get_dpu_info() == {"dpu0": {}, "dpu1": {}} + + # Test case where platform.json data contains "DPU" + mock_get_platform_json_data.return_value = {"DPU": {"dpu0": {}}} + assert device_info.get_dpu_info() == {"dpu0": {}} + + # Test case where platform.json data does not contain "DPU" or "DPUS" + mock_get_platform_json_data.return_value = {"chassis": {}} + assert device_info.get_dpu_info() == {} + + @mock.patch("sonic_py_common.device_info.get_platform_json_data") + @mock.patch("sonic_py_common.device_info.is_dpu") + @mock.patch("sonic_py_common.device_info.get_platform") + def test_get_num_dpus(self, mock_get_platform, mock_is_dpu, mock_get_platform_json_data): + # Test case where platform is None + mock_get_platform.return_value = None + assert device_info.get_num_dpus() == 0 + + # Test case where platform is a DPU + mock_get_platform.return_value = "x86_64-mlnx_msn2700-r0" + mock_is_dpu.return_value = True + assert device_info.get_num_dpus() == 0 + + # Test case where platform.json data is None + mock_is_dpu.return_value = False + mock_get_platform_json_data.return_value = None + assert device_info.get_num_dpus() == 0 + + # Test case where platform.json data does not contain DPUs + mock_get_platform_json_data.return_value = {} + assert device_info.get_num_dpus() == 0 + + # Test case where platform.json data contains DPUs + mock_get_platform_json_data.return_value = {"DPUS": {"dpu0": {}, "dpu1": {}}} + assert device_info.get_num_dpus() == 2 + + @mock.patch("sonic_py_common.device_info.get_platform_json_data") + @mock.patch("sonic_py_common.device_info.is_dpu") + @mock.patch("sonic_py_common.device_info.get_platform") + def test_get_dpu_list(self, mock_get_platform, mock_is_dpu, mock_get_platform_json_data): + # Test case where platform is None + mock_get_platform.return_value = None + assert device_info.get_dpu_list() == [] + + # Test case where platform is a DPU + mock_get_platform.return_value = "x86_64-mlnx_msn2700-r0" + mock_is_dpu.return_value = True + assert device_info.get_dpu_list() == [] + + # Test case where platform.json data is None + mock_is_dpu.return_value = False + mock_get_platform_json_data.return_value = None + assert device_info.get_dpu_list() == [] + + # Test case where platform.json data does not contain DPUs + mock_get_platform_json_data.return_value = {} + assert device_info.get_dpu_list() == [] + + # Test case where platform.json data contains DPUs + mock_get_platform_json_data.return_value = {"DPUS": {"dpu0": {}, "dpu1": {}}} + assert device_info.get_dpu_list() == ["dpu0", "dpu1"] + @classmethod def teardown_class(cls): print("TEARDOWN") diff --git a/src/sonic-sairedis b/src/sonic-sairedis index 137b538e412..9697baf0cc4 160000 --- a/src/sonic-sairedis +++ b/src/sonic-sairedis @@ -1 +1 @@ -Subproject commit 137b538e412552ca090badc7470ee7cb1157b4f8 +Subproject commit 9697baf0cc43163c16ba5d4310300446bd433746 diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent index c5301b2cf94..9e2c50ad77f 160000 --- a/src/sonic-snmpagent +++ b/src/sonic-snmpagent @@ -1 +1 @@ -Subproject commit c5301b2cf94304deb8e09959d67af6a089155507 +Subproject commit 9e2c50ad77f8ba65e48f993631a48f4d666aeec9 diff --git a/src/sonic-stp b/src/sonic-stp new file mode 160000 index 00000000000..ea85d654d23 --- /dev/null +++ b/src/sonic-stp @@ -0,0 +1 @@ +Subproject commit ea85d654d23f17a6b628f70adf7ae27ff772dae1 diff --git a/src/sonic-swss b/src/sonic-swss index 1843de47c7c..4eb74f0082f 160000 --- a/src/sonic-swss +++ b/src/sonic-swss @@ -1 +1 @@ -Subproject commit 1843de47c7c71e6587a97c8c6ba6d94c76061687 +Subproject commit 4eb74f0082f0f8c4537fe58621ac902c870d217c diff --git a/src/sonic-swss-common b/src/sonic-swss-common index 378e8281816..5a4b4a573f3 160000 --- a/src/sonic-swss-common +++ b/src/sonic-swss-common @@ -1 +1 @@ -Subproject commit 378e82818165d75aa2fdc66961e72c4852eae69b +Subproject commit 5a4b4a573f32fbdad026acf01e0a8b7a900c7152 diff --git a/src/sonic-utilities b/src/sonic-utilities index 4a6d1218076..3aec51927b0 160000 --- a/src/sonic-utilities +++ b/src/sonic-utilities @@ -1 +1 @@ -Subproject commit 4a6d12180763af3a62c8ae773f140737052d0011 +Subproject commit 3aec51927b06fd8cce2d71adec0ec5ad7f2abf53 diff --git a/src/sonic-yang-mgmt/sonic_yang_ext.py b/src/sonic-yang-mgmt/sonic_yang_ext.py index c1624e69581..bb816326598 100644 --- a/src/sonic-yang-mgmt/sonic_yang_ext.py +++ b/src/sonic-yang-mgmt/sonic_yang_ext.py @@ -18,7 +18,8 @@ 'DSCP_TO_FC_MAP_LIST', 'EXP_TO_FC_MAP_LIST', 'CABLE_LENGTH_LIST', - 'MPLS_TC_TO_TC_MAP_LIST' + 'MPLS_TC_TO_TC_MAP_LIST', + 'TC_TO_DSCP_MAP_LIST' ] # Workaround for those fields who is defined as leaf-list in YANG model but have string value in config DB. diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md index 4ebae55c3ea..0a721774e3c 100644 --- a/src/sonic-yang-models/doc/Configuration.md +++ b/src/sonic-yang-models/doc/Configuration.md @@ -1,101 +1,102 @@ -======= # SONiC Configuration Database Manual -Table of Contents -================= - - * [Introduction](#introduction) - * [Configuration](#configuration) - * [Config Load and Save](#config-load-and-save) - - * [Incremental Configuration](#incremental-configuration) - * [Redis and Json Schema](#redis-and-json-schema) - - * [ACL and Mirroring](#acl-and-mirroring) - * [BGP BBR](#bgp-bbr) - * [ASIC SDK health event](#asic-sdk-health-event) - * [BGP Device Global](#bgp-device-global) - * [BGP Sessions](#bgp-sessions) - * [BUFFER_PG](#buffer_pg) - * [Buffer pool](#buffer-pool) - * [Buffer profile](#buffer-profile) - * [Buffer queue](#buffer-queue) - * [Buffer port ingress profile list](#buffer-port-ingress-profile-list) - * [Buffer port egress profile list](#buffer-port-egress-profile-list) - * [Cable length](#cable-length) - * [Chassis module](#chassis-module) - * [COPP_TABLE](#copp_table) - * [Console](#console) - * [CRM](#crm) - * [CRM DASH](#crm-dash) - * [Data Plane L3 Interfaces](#data-plane-l3-interfaces) - * [DEFAULT_LOSSLESS_BUFFER_PARAMETER](#DEFAULT_LOSSLESS_BUFFER_PARAMETER) - * [Device Metadata](#device-metadata) - * [Device neighbor metada](#device-neighbor-metada) - * [DHCP_RELAY](#dhcp_relay) - * [DHCP Server IPV4](#dhcp_server_ipv4) - * [BMP](#bmp) - * [DSCP_TO_TC_MAP](#dscp_to_tc_map) - * [FG_NHG](#fg_nhg) - * [FG_NHG_MEMBER](#fg_nhg_member) - * [FG_NHG_PREFIX](#fg_nhg_prefix) - * [FABRIC_MONITOR](#fabric-monitor) - * [FABRIC_PORT](#fabric-port) - * [FLEX_COUNTER_TABLE](#flex_counter_table) - * [Hash](#hash) - * [IPv6 Link-local] (#ipv6-link-local) - * [KDUMP](#kdump) - * [Kubernetes Master](#kubernetes-master) - * [L2 Neighbors](#l2-neighbors) - * [Loopback Interface](#loopback-interface) - * [LOSSLESS_TRAFFIC_PATTERN](#LOSSLESS_TRAFFIC_PATTERN) - * [Management Interface](#management-interface) - * [Management port](#management-port) - * [Management VRF](#management-vrf) - * [MAP_PFC_PRIORITY_TO_QUEUE](#map_pfc_priority_to_queue) - * [MUX_CABLE](#mux_cable) - * [MUX_LINKMGR](#mux_linkmgr) - * [NEIGH](#neigh) - * [NTP Global Configuration](#ntp-global-configuration) - * [NTP Servers](#ntp-servers) - * [Peer Switch](#peer-switch) - * [Policer](#policer) - * [Port](#port) - * [Port Channel](#port-channel) - * [Portchannel member](#portchannel-member) - * [Scheduler](#scheduler) - * [Port QoS Map](#port-qos-map) - * [Queue](#queue) - * [Syslog Global Configuration](#syslog-global-configuration) - * [Syslog Servers](#syslog-servers) - * [Sflow](#sflow) - * [Restapi](#restapi) - * [System Port](#system-port) - * [Tacplus Server](#tacplus-server) - * [TC to Priority group map](#tc-to-priority-group-map) - * [TC to Queue map](#tc-to-queue-map) - * [Telemetry](#telemetry) - * [Telemetry client](#telemetry-client) - * [Tunnel](#tunnel) - * [Versions](#versions) - * [VLAN](#vlan) - * [VLAN_MEMBER](#vlan_member) - * [VNET](#vnet) - * [VOQ Inband Interface](#voq-inband-interface) - * [VXLAN](#vxlan) - * [Virtual router](#virtual-router) - * [LOGGER](#logger) - * [WRED_PROFILE](#wred_profile) - * [XCVRD_LOG](#xcvrd_log) - * [PASSWORD_HARDENING](#password_hardening) - * [SSH_SERVER](#ssh_server) - * [SYSTEM_DEFAULTS table](#systemdefaults-table) - * [RADIUS](#radius) - * [Static DNS](#static-dns) - * [For Developers](#for-developers) - * [Generating Application Config by Jinja2 Template](#generating-application-config-by-jinja2-template) - * [Incremental Configuration by Subscribing to ConfigDB](#incremental-configuration-by-subscribing-to-configdb) +**Table of Contents** + +* [Introduction](#introduction) +* [Configuration](#configuration) +* [Config Load and Save](#config-load-and-save) + * [Incremental Configuration](#incremental-configuration) +* [Redis and Json Schema](#redis-and-json-schema) + * [ACL and Mirroring](#acl-and-mirroring) + * [BGP BBR](#bgp-bbr) + * [ASIC SDK health event](#asic-sdk-health-event) + * [BGP Device Global](#bgp-device-global) + * [BGP Sessions](#bgp-sessions) + * [BUFFER_PG](#buffer_pg) + * [Buffer pool](#buffer-pool) + * [Buffer profile](#buffer-profile) + * [Buffer queue](#buffer-queue) + * [Buffer port ingress profile list](#buffer-port-ingress-profile-list) + * [Buffer port egress profile list](#buffer-port-egress-profile-list) + * [Cable length](#cable-length) + * [Chassis module](#chassis-module) + * [COPP_TABLE](#copp_table) + * [Console](#console) + * [CRM](#crm) + * [CRM DASH](#crm-dash) + * [Data Plane L3 Interfaces](#data-plane-l3-interfaces) + * [DEFAULT_LOSSLESS_BUFFER_PARAMETER](#DEFAULT_LOSSLESS_BUFFER_PARAMETER) + * [Device Metadata](#device-metadata) + * [Device neighbor metada](#device-neighbor-metada) + * [DHCP_RELAY](#dhcp_relay) + * [DHCP Server IPV4](#dhcp_server_ipv4) + * [BMP](#bmp) + * [DSCP_TO_TC_MAP](#dscp_to_tc_map) + * [FG_NHG](#fg_nhg) + * [FG_NHG_MEMBER](#fg_nhg_member) + * [FG_NHG_PREFIX](#fg_nhg_prefix) + * [FABRIC_MONITOR](#fabric-monitor) + * [FABRIC_PORT](#fabric-port) + * [FLEX_COUNTER_TABLE](#flex_counter_table) + * [GRPCCLIENT](#grpcclient) + * [Hash](#hash) + * [IPv6 Link-local] (#ipv6-link-local) + * [KDUMP](#kdump) + * [Kubernetes Master](#kubernetes-master) + * [L2 Neighbors](#l2-neighbors) + * [Loopback Interface](#loopback-interface) + * [LOSSLESS_TRAFFIC_PATTERN](#LOSSLESS_TRAFFIC_PATTERN) + * [Memory Statistics](#memory-statistics) + * [Management Interface](#management-interface) + * [Management port](#management-port) + * [Management VRF](#management-vrf) + * [MAP_PFC_PRIORITY_TO_QUEUE](#map_pfc_priority_to_queue) + * [MUX_CABLE](#mux_cable) + * [MUX_LINKMGR](#mux_linkmgr) + * [NEIGH](#neigh) + * [NTP Global Configuration](#ntp-global-configuration) + * [NTP Servers](#ntp-servers) + * [Peer Switch](#peer-switch) + * [Policer](#policer) + * [Port](#port) + * [Port Channel](#port-channel) + * [Portchannel member](#portchannel-member) + * [Scheduler](#scheduler) + * [Port QoS Map](#port-qos-map) + * [Queue](#queue) + * [Syslog Global Configuration](#syslog-global-configuration) + * [Syslog Servers](#syslog-servers) + * [Sflow](#sflow) + * [Restapi](#restapi) + * [System Port](#system-port) + * [Tacplus Server](#tacplus-server) + * [TC to Priority group map](#tc-to-priority-group-map) + * [TC to Queue map](#tc-to-queue-map) + * [Telemetry](#telemetry) + * [Telemetry client](#telemetry-client) + * [Tunnel](#tunnel) + * [Versions](#versions) + * [VLAN](#vlan) + * [VLAN_MEMBER](#vlan_member) + * [VNET](#vnet) + * [VOQ Inband Interface](#voq-inband-interface) + * [VXLAN](#vxlan) + * [Virtual router](#virtual-router) + * [LOGGER](#logger) + * [WRED_PROFILE](#wred_profile) + * [XCVRD_LOG](#xcvrd_log) + * [PASSWORD_HARDENING](#password_hardening) + * [SSH_SERVER](#ssh_server) + * [SUBNET_DECAP](#subnet_decap) + * [SYSTEM_DEFAULTS table](#systemdefaults-table) + * [RADIUS](#radius) + * [Static DNS](#static-dns) + * [ASIC_SENSORS](#asic_sensors) + * [SRv6](#srv6) +* [For Developers](#for-developers) + * [Generating Application Config by Jinja2 Template](#generating-application-config-by-jinja2-template) + * [Incremental Configuration by Subscribing to ConfigDB](#incremental-configuration-by-subscribing-to-configdb) # Introduction @@ -342,7 +343,8 @@ and migration plan "MATCHES": [ "IN_PORTS", "OUT_PORTS", - "SRC_IP" + "SRC_IP", + "TUNNEL_TERM" ], "ACTIONS": [ "PACKET_ACTION", @@ -369,6 +371,7 @@ and migration plan "PRIORITY": "999", "PACKET_ACTION": "DROP", "SRC_IP": "1.1.1.1/32", + "TUNNEL_TERM": "true" } } } @@ -1479,6 +1482,25 @@ lossless traffic for dynamic buffer calculation } ``` +### Memory Statistics +The memory statistics configuration is stored in the **MEMORY_STATISTICS** table. This table is used by the memory statistics daemon to manage memory monitoring settings. The configuration allows enabling or disabling memory collection, specifying how frequently memory statistics are sampled, and defining how long the memory data is retained. + +``` +{ + "MEMORY_STATISTICS": { + "memory_statistics": { + "enabled": "false", + "sampling_interval": "5", + "retention_period": "15" + } + } +} + +``` +- **enabled**: Defines whether the memory statistics collection is active (true or false). +- **sampling_interval**: Interval between data collection. +- **retention_period**: Time to retain collected data. + ### Management Interface Management interfaces are defined in **MGMT_INTERFACE** table. Object @@ -2791,6 +2813,20 @@ The method could be: } ``` +### SUBNET_DECAP + +The **SUBNET_DECAP** table is used for subnet decap configuration. + +``` +"SUBNET_DECAP": { + "AZURE": { + "status": "enable", + "src_ip": "10.10.10.0/24", + "src_ip_v6": "20c1:ba8::/64" + } +} +``` + ### SYSTEM_DEFAULTS table To have a better management of the features in SONiC, a new table `SYSTEM_DEFAULTS` is introduced. @@ -2850,6 +2886,30 @@ The DNS_NAMESERVER table introduces static DNS nameservers configuration. } ``` +### SRv6 + +The **SRV6_MY_SIDS** and **SRV6_MY_LOCATORS** tables introduce Segment Routing over IPv6 configuration. +An example is as follows: +``` +{ + "SRV6_MY_LOCATORS" : { + "loc1" : { + "prefix" : "FCBB:BBBB:20::" + } + } + "SRV6_MY_SIDS" : { + "loc1|FCBB:BBBB:20::" : { + "action": "uN" + }, + "loc1|FCBB:BBBB:20:F1::" : { + "action": "uDT46", + "decap_vrf": "default", + "decap_dscp_mode": "pipe" + } + } +} +``` + ### FIPS The FIPS table introduces FIPS configuration. @@ -2896,18 +2956,31 @@ The DPUS table introduces the information on the DPUs (Data Processing Unit) ava } ``` -#### 5.2.3 Update value directly in db memory +### ASIC_SENSORS + +The ASIC_SENSORS table introduces the asic sensors polling configuration when they are available on the platform. + +```json +{ + "ASIC_SENSORS": { + "ASIC_SENSORS_POLLER_INTERVAL": { + "interval": "10" + }, + "ASIC_SENSORS_POLLER_STATUS": { + "admin_status": "enable" + } + } +} +``` + -For Developers -============== +# For Developers -Generating Application Config by Jinja2 Template ------------------------------------------------- +## Generating Application Config by Jinja2 Template To be added. -Incremental Configuration by Subscribing to ConfigDB ----------------------------------------------------- +## Incremental Configuration by Subscribing to ConfigDB Detail instruction to be added. A sample could be found in this [PR](https://github.com/Azure/sonic-buildimage/pull/861) that diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py index 5e130854eeb..5d9c64ad748 100644 --- a/src/sonic-yang-models/setup.py +++ b/src/sonic-yang-models/setup.py @@ -84,6 +84,7 @@ def run(self): cmdclass={'build_py': my_build_py}, data_files=[ ('yang-models', ['./yang-models/sonic-acl.yang', + './yang-models/sonic-ars.yang', './yang-models/sonic-auto_techsupport.yang', './yang-models/sonic-bgp-bbr.yang', './yang-models/sonic-banner.yang', @@ -137,6 +138,7 @@ def run(self): './yang-models/sonic-kubernetes_master.yang', './yang-models/sonic-loopback-interface.yang', './yang-models/sonic-lossless-traffic-pattern.yang', + './yang-models/sonic-memory-statistics.yang', './yang-models/sonic-mgmt_interface.yang', './yang-models/sonic-mgmt_port.yang', './yang-models/sonic-mgmt_vrf.yang', @@ -166,6 +168,7 @@ def run(self): './yang-models/sonic-system-tacacs.yang', './yang-models/sonic-system-radius.yang', './yang-models/sonic-system-ldap.yang', + './yang-models/sonic-subnet-decap.yang', './yang-models/sonic-telemetry.yang', './yang-models/sonic-telemetry_client.yang', './yang-models/sonic-gnmi.yang', @@ -194,6 +197,7 @@ def run(self): './yang-models/sonic-tc-priority-group-map.yang', './yang-models/sonic-tc-queue-map.yang', './yang-models/sonic-peer-switch.yang', + './yang-models/sonic-tc-dscp-map.yang', './yang-models/sonic-pfc-priority-queue-map.yang', './yang-models/sonic-pfc-priority-priority-group-map.yang', './yang-models/sonic-logger.yang', @@ -202,8 +206,10 @@ def run(self): './yang-models/sonic-system-port.yang', './yang-models/sonic-macsec.yang', './yang-models/sonic-bgp-sentinel.yang', + './yang-models/sonic-asic-sensors.yang', './yang-models/sonic-bmp.yang', './yang-models/sonic-xcvrd-log.yang', + './yang-models/sonic-grpcclient.yang', './yang-models/sonic-serial-console.yang', './yang-models/sonic-smart-switch.yang',]), ('cvlyang-models', ['./cvlyang-models/sonic-acl.yang', @@ -241,6 +247,7 @@ def run(self): './cvlyang-models/sonic-kubernetes_master.yang', './cvlyang-models/sonic-loopback-interface.yang', './cvlyang-models/sonic-mgmt_interface.yang', + './cvlyang-models/sonic-memory-statistics.yang', './cvlyang-models/sonic-mgmt_port.yang', './cvlyang-models/sonic-mgmt_vrf.yang', './cvlyang-models/sonic-ntp.yang', diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json index 93283acee58..4b332e9b13a 100644 --- a/src/sonic-yang-models/tests/files/sample_config_db.json +++ b/src/sonic-yang-models/tests/files/sample_config_db.json @@ -5,6 +5,13 @@ "vni" : "100" } }, + "SUBNET_DECAP": { + "AZURE": { + "status": "enable", + "src_ip": "10.10.10.0/24", + "src_ip_v6": "20c1:ba8::/64" + } + }, "DHCP_SERVER": { "192.0.0.8": {}, "192.0.0.8": {}, @@ -328,6 +335,12 @@ "SRC_IP": "1.1.1.1/32", "BTH_OPCODE": "0x11/0xbf", "AETH_SYNDROME": "0x60/0x60" + }, + "DATAACL|RULE0": { + "PRIORITY": "999", + "PACKET_ACTION": "FORWARD", + "TUNNEL_TERM": "true", + "DST_IP": "1.1.1.1/32" } }, "SWITCH_HASH": { @@ -1331,7 +1344,9 @@ "gnmi": { "client_auth": "true", "log_level": "2", - "port": "50051" + "port": "50051", + "enable_crl": "false", + "crl_expire_duration": "86400" } }, "TELEMETRY_CLIENT": { @@ -1368,7 +1383,9 @@ "gnmi": { "client_auth": "true", "log_level": "2", - "port": "50052" + "port": "50052", + "enable_crl": "false", + "crl_expire_duration": "86400" } }, "GNMI_CLIENT_CERT": { @@ -1761,6 +1778,9 @@ "default|ipv6_unicast": { "max_ebgp_paths": "2", "max_ibgp_paths": "2" + }, + "default|l2vpn_evpn": { + "advertise-all-vni": "true" } }, "BGP_GLOBALS_AF_AGGREGATE_ADDR": { @@ -2258,6 +2278,17 @@ } }, + "TC_TO_DSCP_MAP": { + "tc_to_dscp_map1": { + "1": "1", + "2": "2" + }, + "tc_to_dscp_map2": { + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { "pfc_prio_to_q_map1": { "1": "1", @@ -2752,6 +2783,19 @@ "log_verbosity": "notice" } }, + "GRPCCLIENT": { + "config": { + "type": "secure", + "auth_level": "server", + "log_level": "info" + }, + "certs": { + "client_crt": "grpcclient.crt", + "client_key": "grpcclient.key", + "ca_crt": "root.pem", + "grpc_ssl_credential": "azureclient.ms" + } + }, "BANNER_MESSAGE": { "global": { "state": "enabled", @@ -2759,7 +2803,73 @@ "motd": "Some message of the day", "logout": "Some logout message" } - } + }, + "MEMORY_STATISTICS": { + "memory_statistics": { + "enabled": "false", + "sampling_interval": "5", + "retention_period": "15" + } + }, + "ASIC_SENSORS": { + "ASIC_SENSORS_POLLER_INTERVAL": { + "interval": "10" + }, + "ASIC_SENSORS_POLLER_STATUS": { + "admin_status": "enable" + } + "ARS_PROFILE": { + "global": { + "algorithm": "ewma", + "max_flows": "2048", + "sampling_interval": "10", + "past_load_min_value": "0", + "past_load_max_value": "10", + "past_load_weight": "6", + "future_load_min_value": "10", + "future_load_max_value": "50", + "future_load_weight": "10", + "current_load_min_value": "20", + "current_load_max_value": "30", + "ipv4_enable": "true", + "ipv6_enable": "true" + } + }, + "ARS_QUANTIZATION_BANDS": { + "global|1": { + "min_value": "0", + "max_value": "25" + }, + "global|3": { + "min_value": "25", + "max_value": "50" + } + }, + "ARS_NEXTHOP_GROUP": { + "192.168.0.0/32|default": { + "profile_name": "global", + "assign_mode": "per_flowlet_quality", + "max_flows": "512", + "primary_path_threshold": "5", + "alternative_path_cost": "15", + "alternative_path_members":["1.1.1.1", "2.2.2.2"] + } + }, + "ARS_PORTCHANNEL": { + "PortChannel0003": { + "profile_name": "global", + "assign_mode": "per_flowlet_quality", + "max_flows": "1024", + "primary_path_threshold": "2", + "alternative_path_cost": "10", + "alternative_path_members":["Ethernet5", "Ethernet6"] + } + }, + "ARS_INTERFACE": { + "Ethernet1": {}, + "Ethernet3": {}, + "Ethernet10":{} + } }, "SAMPLE_CONFIG_DB_UNKNOWN": { "UNKNOWN_TABLE": { diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json b/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json index 309b64bb06a..0454700233d 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json @@ -174,5 +174,12 @@ }, "ACL_TABLE_L3V4V6_TABLE_TYPE": { "desc": "ACL_TABLE Validate type L3V4V6." + }, + "ACL_RULE_WITH_TUNNEL_TERMINATION_WRONG_TYPE": { + "desc": "ACL Rule with Tunnel Termination", + "eStrKey" : "InvalidValue" + }, + "ACL_RULE_WITH_TUNNEL_TERMINATION": { + "desc": "ACL Rule with Tunnel Termination" } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/ars.json b/src/sonic-yang-models/tests/yang_model_tests/tests/ars.json new file mode 100644 index 00000000000..811f5fb1fc7 --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/ars.json @@ -0,0 +1,44 @@ +{ + "ARS_TEST": { + "desc": "Sample config in ARS." + }, + "ARS_TEST_TOO_MANY_PROFILES": { + "desc": "ARS configuration with more than one profile ARS_PROFILE_LIST table.", + "eStr": "Too many ARS_PROFILE_LIST elements." + }, + "ARS_TEST_OBJECT_INVALID_MODE": { + "desc": "Object configuration with invalid mode value in ARS_OBJECT_LIST table.", + "eStrKey": "InvalidValue", + "eStr": [ + "assign_mode" + ] + }, + "ARS_TEST_BANDS_ILLEGAL_INDEX": { + "desc": "Quantization band configuration with invalid index in ARS_QUANTIZATION_BANDS_LIST table.", + "eStrKey": "Range", + "eStr": [ + "Value \"8\" does not satisfy the constraint" + ] + }, + "ARS_PREFIX_TEST_INVALID_PREFIX": { + "desc": "Prefix configuration with invalid value in ARS_NEXTHOP_GROUP_LIST table.", + "eStrKey": "InvalidValue", + "eStr": [ + "ip_prefix" + ] + }, + "ARS_INTERFACE_TEST_INVALID_LINK": { + "desc": "Interface configuration with invalid name in ARS_INTERFACE_LIST table.", + "eStrKey": "InvalidValue", + "eStr": [ + "if_name" + ] + }, + "ARS_TEST_LAG_INVALID_NAME": { + "desc": "LAG with invalid name in ARS_PORTCHANNEL_LIST table.", + "eStrKey": "LeafRef", + "eStr": [ + "PortChannel0001" + ] + } +} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/asic-sensors.json b/src/sonic-yang-models/tests/yang_model_tests/tests/asic-sensors.json new file mode 100644 index 00000000000..227904f4008 --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/asic-sensors.json @@ -0,0 +1,25 @@ +{ + "ASIC_SENSORS_TABLE": { + "desc": "Config DB interval parameters for ASIC Sensors polling" + }, + "ASIC_SENSORS_INVALID_POLLER_INTERVAL": { + "desc": "Configure an invalid ASIC Sensors polling interval", + "eStrKey" : "Pattern" + }, + "ASIC_SENSORS_INVALID_POLLER_ADMIN_STATUS": { + "desc": "Configure an invalid ASIC Sensors polling admin status", + "eStrKey" : "InvalidValue" + }, + "ASIC_SENSORS_POLLER_INTERVAL_BAD_LEN_MAX": { + "desc": "Configure an invalid ASIC Sensors polling interval: out of range value", + "eStrKey" : "InvalidValue" + }, + "ASIC_SENSORS_POLLER_INTERVAL_EMPTY_VALUE": { + "desc": "Configure an empty ASIC Sensors polling interval", + "eStrKey" : "InvalidValue" + }, + "ASIC_SENSORS_POLLER_ADMIN_STATUS_EMPTY_VALUE": { + "desc": "Configure an empty ASIC Sensors polling admin status", + "eStrKey" : "InvalidValue" + } +} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/bgp.json b/src/sonic-yang-models/tests/yang_model_tests/tests/bgp.json index 543a985670f..b360ce6309a 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/bgp.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/bgp.json @@ -2,6 +2,16 @@ "BGP_GLOBAL_VALID": { "desc": "Configure BGP global table." }, + "BGP_GLOBALS_AF_ADVERTISE_ALL_VNI_TRUE": { + "desc": "BGP Address Family l2vpn_evpn with advertise-all-vni set to true" + }, + "BGP_GLOBALS_AF_ADVERTISE_ALL_VNI_FALSE": { + "desc": "BGP Address Family l2vpn_evpn with advertise-all-vni set to false" + }, + "BGP_GLOBALS_AF_ADVERTISE_ALL_VNI_INVALID": { + "desc": "BGP Address Family l2vpn_evpn with advertise-all-vni set to an invalid value", + "eStr": "Invalid value \"invalid value\" in \"advertise-all-vni\" element." + }, "BGP_NEIGHBOR_ALL_VALID": { "desc": "Configure BGP neighbor table." }, @@ -158,43 +168,32 @@ "BGP_PEERRANGE_ALL_VALID": { "desc": "Configure BGP peer range table." }, - "BGP_ALLOWED_PREFIXES_COM_LIST_ALL_VALID": { + "BGP_ALLOWED_PREFIXES_ALL_VALID": { "desc": "Configue BGP allowed prefix list." }, - "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_DEPLOYMENT": { - "desc": "Invalid default action.", + "BGP_ALLOWED_PREFIXES_INVALID_DEPLOYMENT": { + "desc": "Invalid deployment.", "eStrKey" : "Pattern" }, - "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_DEFAULT_ACTION": { - "desc": "Invalid default action.", + "BGP_ALLOWED_PREFIXES_INVALID_ID": { + "desc": "Invalid id.", "eStrKey" : "InvalidValue", - "eStr" : ["default_action"] + "eStr" : ["id"] }, - "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_PREFIXES_IPV4": { - "desc": "Invalid IPv4 prefix.", - "eStrKey" : "Pattern" - }, - "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_PREFIXES_IPV6": { - "desc": "Invalid IPv6 prefix.", - "eStrKey" : "Pattern" - }, - "BGP_ALLOWED_PREFIXES_LIST_ALL_VALID": { - "desc": "Configue BGP allowed prefix list." - }, - "BGP_ALLOWED_PREFIXES_LIST_INVALID_DEPLOYMENT": { - "desc": "Invalid default action.", + "BGP_ALLOWED_PREFIXES_INVALID_NEIGHBOR": { + "desc": "Invalid neighbor.", "eStrKey" : "Pattern" }, - "BGP_ALLOWED_PREFIXES_LIST_INVALID_DEFAULT_ACTION": { + "BGP_ALLOWED_PREFIXES_INVALID_DEFAULT_ACTION": { "desc": "Invalid default action.", "eStrKey" : "InvalidValue", "eStr" : ["default_action"] }, - "BGP_ALLOWED_PREFIXES_LIST_INVALID_PREFIXES_IPV4": { + "BGP_ALLOWED_PREFIXES_INVALID_PREFIXES_IPV4": { "desc": "Invalid IPv4 prefix.", "eStrKey" : "Pattern" }, - "BGP_ALLOWED_PREFIXES_LIST_INVALID_PREFIXES_IPV6": { + "BGP_ALLOWED_PREFIXES_INVALID_PREFIXES_IPV6": { "desc": "Invalid IPv6 prefix.", "eStrKey" : "Pattern" }, diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json index 99310fecc6a..8e834ed08a9 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json @@ -175,6 +175,9 @@ "desc": "Verifying invalid create_only_config_db_buffers value", "eStrKey": "InvalidValue" }, + "DEVICE_METADATA_VALID_SUPPORTING_BULK_COUNTER_GROUPS": { + "desc": "Verifying the supporting_bulk_counter_groups value" + }, "DEVICE_METADATA_VALID_BGP_ROUTER_ID": { "desc": "Verifying bgp_router_id configuration." }, diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/flex_counter.json b/src/sonic-yang-models/tests/yang_model_tests/tests/flex_counter.json index 92d96b54f3a..a508400f26d 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/flex_counter.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/flex_counter.json @@ -7,6 +7,14 @@ "eStrKey": "Range", "eStr": "100..4294967295" }, + "FLEX_COUNTER_TABLE_WITH_VALID_BULK_CHUNK_SIZE": { + "desc": "FLEX_COUNTER_TABLE_WITH_VALID_BULK_CHUNK_SIZE no failure." + }, + "FLEX_COUNTER_TABLE_WITH_INVALID_BULK_CHUNK_SIZE": { + "desc": "Out of range bulk chunk size.", + "eStrKey": "Range", + "eStr": "1..4294967295" + }, "FLOW_COUNTER_ROUTE_PATTERN_TABLE_WITH_VRF": { "desc": "FLOW_COUNTER_ROUTE_PATTERN_TABLE_WITH_VRF no failure." }, diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/grpcclient.json b/src/sonic-yang-models/tests/yang_model_tests/tests/grpcclient.json new file mode 100644 index 00000000000..fd1a3a2ccd3 --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/grpcclient.json @@ -0,0 +1,5 @@ +{ + "GRPCCLIENT_CONFIG_CHANGE_VERBOSITY_LEVEL": { + "desc": "Consume verbosity level config changes. " + } +} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/loopback.json b/src/sonic-yang-models/tests/yang_model_tests/tests/loopback.json index 9fdbb0a5e35..e71ae255bd7 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/loopback.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/loopback.json @@ -9,5 +9,9 @@ }, "LOOPBACK_INTERFACE_VALID_NAT_ZONE_RANGE": { "desc": "Configure valid value for nat zone." + }, + "LOOPBACK_INVALID_INTERFACE_NAME_LENGTH": { + "desc": "Configure invalid value for loopback interface name length.", + "eStr" : "Invalid interface name length, it must not exceed 16 characters." } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/memory_statistics.json b/src/sonic-yang-models/tests/yang_model_tests/tests/memory_statistics.json new file mode 100644 index 00000000000..e466e9cf92c --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/memory_statistics.json @@ -0,0 +1,18 @@ +{ + "MEMORY_STATISTICS_VALID_CONFIG": { + "desc": "Configuring memory statistics with valid values." + }, + "MEMORY_STATISTICS_WITH_INVALID_SAMPLING_INTERVAL": { + "desc": "Configuring memory statistics with an invalid sampling_interval ( out of acceptable range).", + "eStrKey": "Range", + "eStr": "3..15" + }, + "MEMORY_STATISTICS_WITH_INVALID_RETENTION_PERIOD": { + "desc": "Configuring memory statistics with an invalid retention_period (out of acceptable range).", + "eStrKey": "Range", + "eStr": "1..30" + }, + "MEMORY_STATISTICS_WITH_ENABLE_FEATURE": { + "desc": "Enabling memory statistics feature with valid values." + } +} \ No newline at end of file diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/neigh.json b/src/sonic-yang-models/tests/yang_model_tests/tests/neigh.json index 33f87167d68..ebaec49a5eb 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/neigh.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/neigh.json @@ -3,9 +3,9 @@ "desc": "Load valid neighbors" }, - "NEIGH_MISSING_IP": { + "NEIGH_MISSING_IPV4": { "desc": "Load NEIGH missing IP address", - "eStr": ["Invalid JSON data"] + "eStr": ["neighbor"] }, "NEIGH_INVALID_VLAN": { diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/qosmaps.json b/src/sonic-yang-models/tests/yang_model_tests/tests/qosmaps.json index c89e8e89ce2..2997410384d 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/qosmaps.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/qosmaps.json @@ -109,5 +109,19 @@ "PORT_QOS_MAP_APPLY_INVALID_PFC": { "desc": "Configure port pfc enable with invalid pfc priority.", "eStrKey": "Pattern" + }, + + "TC_TO_DSCP_MAP_CRETAE": { + "desc": "Configure a Traffic class to DSCP map." + }, + + "TC_TO_DSCP_MAP_CREATE_INVALID_TC": { + "desc": "Configure a Traffic class to DSCP with invalid key.", + "eStr": "Invalid Traffic Class" + }, + + "TC_TO_DSCP_MAP_CREATE_INVALID_DSCP": { + "desc": "Configure a Traffic class to DSCP map with invalid value.", + "eStr": "Invalid DSCP" } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/srv6.json b/src/sonic-yang-models/tests/yang_model_tests/tests/srv6.json new file mode 100644 index 00000000000..d65d1c1cb7f --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/srv6.json @@ -0,0 +1,36 @@ +{ + "SRV6_VALID": { + "desc": "Valid config" + }, + "SRV6_MY_LOCATOR_INVALID_FUNC_LEN": { + "desc": "A locator configured with invalid func_len", + "eStrKey" : "Must" + }, + "SRV6_MY_LOCATOR_INVALID_VRF": { + "desc": "A locator configured with an invalid VRF name", + "eStrKey" : "InvalidValue", + "eStr": ["vrf"] + }, + "SRV6_MY_SID_INVALID_LOCATOR": { + "desc": "A SID configured with invalid locator identifier", + "eStrKey" : "LeafRef" + }, + "SRV6_MY_SID_INVALID_IP_ADDR": { + "desc": "A SID configured with invalid IPv6 address", + "eStrKey" : "Pattern" + }, + "SRV6_MY_SID_UNMATCHED_IP_ADDR": { + "desc": "A SID configured with an IPv6 Address that does not match with the prefix of the locator", + "eStrKey" : "Must" + }, + "SRV6_MY_SID_INVALID_ACTION": { + "desc": "A SID configured with invalid action", + "eStrKey" : "InvalidValue", + "eStr": ["action"] + }, + "SRV6_MY_SID_DSCP_MODE_WITH_UN": { + "desc": "A SID configured with dscp_mode and uN action", + "eStrKey" : "When", + "eStr": ["action"] + } +} \ No newline at end of file diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/subnet_decap.json b/src/sonic-yang-models/tests/yang_model_tests/tests/subnet_decap.json new file mode 100644 index 00000000000..d3ce0b72136 --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/subnet_decap.json @@ -0,0 +1,31 @@ +{ + "SUBNET_DECAP_DEFAULT_TEST": { + "desc": "Configure SUBNET_DECAP table." + }, + "SUBNET_DECAP_ENABLE_TEST": { + "desc": "Configure SUBNET_DECAP table with status as enable." + }, + "SUBNET_DECAP_DISABLE_TEST": { + "desc": "Configure SUBNET_DECAP table with status as disable." + }, + "SUBNET_DECAP_INVALID_STATUS_TEST": { + "desc": "Configure SUBNET_DECAP table with invalid status.", + "eStrKey": "InvalidValue" + }, + "SUBNET_DECAP_INVALID_IPV4": { + "desc": "Configure SUBNET_DECAP table with invalid src ipv4 prefix.", + "eStrKey": "Pattern" + }, + "SUBNET_DECAP_INVALID_IPV6": { + "desc": "Configure SUBNET_DECAP table with invalid src ipv6 prefix.", + "eStrKey": "Pattern" + }, + "SUBNET_DECAP_NO_IPV4": { + "desc": "Configure SUBNET_DECAP table without src ipv4 prefix.", + "eStrKey": "Mandatory" + }, + "SUBNET_DECAP_NO_IPV6": { + "desc": "Configure SUBNET_DECAP table without src ipv6 prefix.", + "eStrKey": "Mandatory" + } +} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json index a795a7e3b3c..9ca18040e22 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json @@ -11,6 +11,10 @@ "eStrKey" : "Pattern", "eStr": ["Vlan"] }, + "INVALID_LONG_VLAN_NAME": { + "desc": "INVALID VLAN_NAME FIELD IN VLAN TABLE.", + "eStrKey" : "Pattern" + }, "WRONG_FAMILY_WITH_IP_PREFIX": { "desc": "Configure Wrong family with ip-prefix for VLAN_Interface Table", "eStrKey" : "Must" @@ -93,7 +97,7 @@ }, "VLAN_CREATE_VLAN_WITH_MISSMATCHING_NAME": { "desc": "Create Vlan so that name doesn't match id", - "eStr": "The vlanid must correspond to the VLAN name" + "eStr": "The vlanid must correspond to the VLAN name" }, "IP_PREFIX_WITHOUT_CREATNG_VLAN": { "desc": "Create IP on not created Vlan", diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/vrf.json b/src/sonic-yang-models/tests/yang_model_tests/tests/vrf.json index 73e31ee109c..fb0bdc85a2c 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/vrf.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/vrf.json @@ -6,6 +6,10 @@ "desc": "Configure wrong value for vrf name.", "eStr" : ["Invalid", "VRF name"] }, + "VRF_TEST_INVALID_LONG__NAME": { + "desc": "Configure invalid length value for vrf name.", + "eStr" : "Invalid interface name length, it must not exceed 16 characters." + }, "VRF_TEST_WITH_FALLBACK": { "desc": "Configure VRF with fallback in VRF table." }, diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json index 778ab68a644..c064500fbfa 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json @@ -18,14 +18,19 @@ "eStrKey": "Range" }, "VXLAN_TUNNEL_NAME_VALID_TEST": { - "desc": "Tunnel Name string length 30 is valid" + "desc": "Tunnel Name string length 15 is valid" + }, + "VXLAN_TUNNEL_NAME_INVALID_LENGTH_TEST": { + "desc": "Tunnel Name string length exceeding 16 is invalid", + "eStr" : "Invalid interface name length, it must not exceed 16 characters." }, "VXLAN_TUNNEL_NAME_INVALID_TEST": { "desc": "Tunnel Name string length 0 is invalid", - "eStrKey": "Must" + "eStr" : "Invalid interface name length, it must not exceed 16 characters." }, "VXLAN_TUNNEL_NAME_VALID_DST_IPV4_TEST": { - "desc": "Valid IPv4 Destination Address" + "desc": "Valid IPv4 Destination Address", + "eStr" : "Invalid interface name length, it must not exceed 16 characters." }, "VXLAN_TUNNEL_NAME_VALID_DST_IPV6_TEST": { "desc": "Valid IPv6 Destination Address" diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json index c50fd8c71a6..75692f1a2dd 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json @@ -1698,5 +1698,55 @@ ] } } + }, + "ACL_RULE_WITH_TUNNEL_TERMINATION_WRONG_TYPE": { + "sonic-acl:sonic-acl": { + "sonic-acl:ACL_RULE": { + "ACL_RULE_LIST": [ + { + "ACL_TABLE_NAME": "TUNNEL_TERM_TABLE", + "PRIORITY": 9981, + "TUNNEL_TERM": "whatever", + "RULE_NAME": "Rule_1" + } + ] + }, + "sonic-acl:ACL_TABLE": { + "ACL_TABLE_LIST": [ + { + "ACL_TABLE_NAME": "TUNNEL_TERM_TABLE", + "policy_desc": "TUNNEL_TERM_TABLE", + "ports": [ "" ], + "stage": "INGRESS", + "type": "L3" + } + ] + } + } + }, + "ACL_RULE_WITH_TUNNEL_TERMINATION": { + "sonic-acl:sonic-acl": { + "sonic-acl:ACL_RULE": { + "ACL_RULE_LIST": [ + { + "ACL_TABLE_NAME": "TUNNEL_TERM_TABLE", + "PRIORITY": 9981, + "TUNNEL_TERM": "true", + "RULE_NAME": "Rule_1" + } + ] + }, + "sonic-acl:ACL_TABLE": { + "ACL_TABLE_LIST": [ + { + "ACL_TABLE_NAME": "TUNNEL_TERM_TABLE", + "policy_desc": "TUNNEL_TERM_TABLE", + "ports": [ "" ], + "stage": "INGRESS", + "type": "L3" + } + ] + } + } } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/ars.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/ars.json new file mode 100755 index 00000000000..3641e6e55bb --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/ars.json @@ -0,0 +1,274 @@ +{ + "ARS_TEST": { + "sonic-port:sonic-port": { + "sonic-port:PORT": { + "PORT_LIST": [ + { + "admin_status": "up", + "alias": "Ethernet1", + "description": "Ethernet1", + "lanes": "65", + "mtu": "9000", + "name": "Ethernet1", + "tpid": "0x8100", + "speed": "25000" + }, + { + "admin_status": "up", + "alias": "Ethernet2", + "description": "Ethernet2", + "lanes": "65", + "mtu": "9000", + "name": "Ethernet2", + "tpid": "0x8100", + "speed": "25000" + }, + { + "admin_status": "up", + "alias": "Ethernet3", + "description": "Ethernet3", + "lanes": "65", + "mtu": "9000", + "name": "Ethernet3", + "tpid": "0x8100", + "speed": "25000" + } + ] + } + }, + "sonic-portchannel:sonic-portchannel": { + "sonic-portchannel:PORTCHANNEL": { + "PORTCHANNEL_LIST": [ + { + "name": "PortChannel0001", + "admin_status": "up" + }, + { + "name": "PortChannel0002", + "admin_status": "up" + } + ] + }, + "sonic-portchannel:PORTCHANNEL_MEMBER": { + "PORTCHANNEL_MEMBER_LIST": [ + { + "name": "PortChannel0001", + "port": "Ethernet1" + }, + { + "name": "PortChannel0001", + "port": "Ethernet2" + }, + { + "name": "PortChannel0002", + "port": "Ethernet3" + } + ] + } + }, + "sonic-ars:sonic-ars": { + "sonic-ars:ARS_PROFILE": { + "ARS_PROFILE_LIST": [ + { + "profile_name": "global", + "algorithm": "ewma", + "max_flows": "2048" + } + ] + }, + "sonic-ars:ARS_QUANTIZATION_BANDS": { + "ARS_QUANTIZATION_BANDS_LIST": [ + { + "profile_name": "global", + "band_index": "1", + "min_value": "0", + "max_value": "200" + } + ] + }, + "sonic-ars:ARS_INTERFACE": { + "ARS_INTERFACE_LIST": [ + { + "if_name": "Ethernet1" + }, + { + "if_name": "PortChannel0002" + } + ] + }, + "sonic-ars:ARS_NEXTHOP_GROUP": { + "ARS_NEXTHOP_GROUP_LIST": [ + { + "ip_prefix": "10.0.0.0/24", + "vrf_name": "default", + "profile_name": "global", + "assign_mode": "per_flowlet_quality", + "max_flows": "512" + }, + { + "ip_prefix": "10.1.0.0/24", + "vrf_name": "default", + "profile_name": "global", + "assign_mode": "per_packet" + } + ] + }, + "sonic-ars:ARS_PORTCHANNEL": { + "ARS_PORTCHANNEL_LIST": [ + { + "if_name": "PortChannel0001", + "profile_name": "global", + "assign_mode": "per_flowlet_quality", + "max_flows": "512", + "alternative_path_members": ["Ethernet2"] + } + ] + } + } + }, + "ARS_TEST_TOO_MANY_PROFILES": { + "sonic-ars:sonic-ars": { + "sonic-ars:ARS_PROFILE": { + "ARS_PROFILE_LIST": [ + { + "profile_name": "group1", + "algorithm": "ewma" + }, + { + "profile_name": "group2", + "sampling_interval": "10" + } + ] + } + } + }, + "ARS_TEST_OBJECT_INVALID_MODE": { + "sonic-ars:sonic-ars": { + "sonic-ars:ARS_PROFILE": { + "ARS_PROFILE_LIST": [ + { + "profile_name": "group1", + "algorithm": "ewma" + } + ] + }, + "sonic-ars:ARS_NEXTHOP_GROUP": { + "ARS_NEXTHOP_GROUP_LIST": [ + { + "ip_prefix": "10.1.0.0/24", + "vrf_name": "default", + "profile_name": "group1", + "assign_mode": "illegal_mode" + } + ] + } + } + }, + "ARS_TEST_BANDS_ILLEGAL_INDEX": { + "sonic-ars:sonic-ars": { + "sonic-ars:ARS_PROFILE": { + "ARS_PROFILE_LIST": [ + { + "profile_name": "group1", + "algorithm": "ewma" + } + ] + }, + "sonic-ars:ARS_QUANTIZATION_BANDS": { + "ARS_QUANTIZATION_BANDS_LIST": [ + { + "profile_name": "group1", + "band_index": "0", + "min_value": "0" + }, + { + "profile_name": "group1", + "band_index": "1", + "min_value": "0" + }, + { + "profile_name": "group1", + "band_index": "2", + "min_value": "0" + }, + { + "profile_name": "group1", + "band_index": "3", + "min_value": "0" + }, + { + "profile_name": "group1", + "band_index": "4", + "min_value": "0" + }, + { + "profile_name": "group1", + "band_index": "5", + "min_value": "0" + }, + { + "profile_name": "group1", + "band_index": "6", + "min_value": "0" + }, + { + "profile_name": "group1", + "band_index": "7", + "min_value": "0" + }, + { + "profile_name": "group1", + "band_index": "8", + "min_value": "0" + } + ] + } + } + }, + "ARS_PREFIX_TEST_INVALID_PREFIX": { + "sonic-ars:sonic-ars": { + "sonic-ars:ARS_NEXTHOP_GROUP": { + "ARS_NEXTHOP_GROUP_LIST": [ + { + "ip_prefix": "invalid_prefix", + "vrf_name": "default", + "profile_name": "global" + } + ] + } + } + }, + "ARS_INTERFACE_TEST_INVALID_LINK": { + "sonic-ars:sonic-ars": { + "sonic-ars:ARS_INTERFACE": { + "ARS_INTERFACE_LIST": [ + { + "if_name": "EthernetXXX" + } + ] + } + } + }, + "ARS_TEST_LAG_INVALID_NAME": { + "sonic-ars:sonic-ars": { + "sonic-ars:ARS_PROFILE": { + "ARS_PROFILE_LIST": [ + { + "profile_name": "group1", + "algorithm": "ewma" + } + ] + }, + "sonic-ars:ARS_PORTCHANNEL": { + "ARS_PORTCHANNEL_LIST": [ + { + "if_name": "PortChannel0001", + "profile_name": "group1", + "assign_mode": "per_flowlet_quality", + "max_flows": "512" + } + ] + } + } + } +} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/asic-sensors.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/asic-sensors.json new file mode 100644 index 00000000000..e9985c69ccc --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/asic-sensors.json @@ -0,0 +1,74 @@ +{ + "ASIC_SENSORS_TABLE": { + "sonic-asic-sensors:sonic-asic-sensors": { + "sonic-asic-sensors:ASIC_SENSORS": { + "ASIC_SENSORS_POLLER_INTERVAL": { + "interval": "10" + }, + "ASIC_SENSORS_POLLER_STATUS": { + "admin_status": "enable" + } + } + } + }, + "ASIC_SENSORS_INVALID_POLLER_INTERVAL": { + "sonic-asic-sensors:sonic-asic-sensors": { + "sonic-asic-sensors:ASIC_SENSORS": { + "ASIC_SENSORS_POLLER_INTERVAL": { + "interval": "0" + }, + "ASIC_SENSORS_POLLER_STATUS": { + "admin_status": "enable" + } + } + } + }, + "ASIC_SENSORS_INVALID_POLLER_ADMIN_STATUS": { + "sonic-asic-sensors:sonic-asic-sensors": { + "sonic-asic-sensors:ASIC_SENSORS": { + "ASIC_SENSORS_POLLER_INTERVAL": { + "interval": "10" + }, + "ASIC_SENSORS_POLLER_STATUS": { + "admin_status": "testing" + } + } + } + }, + "ASIC_SENSORS_POLLER_INTERVAL_BAD_LEN_MAX": { + "sonic-asic-sensors:sonic-asic-sensors": { + "sonic-asic-sensors:ASIC_SENSORS": { + "ASIC_SENSORS_POLLER_INTERVAL": { + "interval": "1010101010101010101010" + }, + "ASIC_SENSORS_POLLER_STATUS": { + "admin_status": "enable" + } + } + } + }, + "ASIC_SENSORS_POLLER_INTERVAL_EMPTY_VALUE": { + "sonic-asic-sensors:sonic-asic-sensors": { + "sonic-asic-sensors:ASIC_SENSORS": { + "ASIC_SENSORS_POLLER_INTERVAL": { + "interval": "" + }, + "ASIC_SENSORS_POLLER_STATUS": { + "admin_status": "enable" + } + } + } + }, + "ASIC_SENSORS_POLLER_ADMIN_STATUS_EMPTY_VALUE": { + "sonic-asic-sensors:sonic-asic-sensors": { + "sonic-asic-sensors:ASIC_SENSORS": { + "ASIC_SENSORS_POLLER_INTERVAL": { + "interval": "10" + }, + "ASIC_SENSORS_POLLER_STATUS": { + "admin_status": "" + } + } + } + } +} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp.json index 6ecc90c3869..fbc41ae127c 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp.json @@ -81,7 +81,69 @@ } } }, - + "BGP_GLOBALS_AF_ADVERTISE_ALL_VNI_TRUE": { + "sonic-bgp-global:sonic-bgp-global": { + "sonic-bgp-global:BGP_GLOBALS": { + "BGP_GLOBALS_LIST": [ + { + "vrf_name":"default", + "local_asn": 65001 + } + ] + }, + "sonic-bgp-global:BGP_GLOBALS_AF": { + "BGP_GLOBALS_AF_LIST": [ + { + "vrf_name": "default", + "afi_safi": "l2vpn_evpn", + "advertise-all-vni": "true" + } + ] + } + } + }, + "BGP_GLOBALS_AF_ADVERTISE_ALL_VNI_FALSE": { + "sonic-bgp-global:sonic-bgp-global": { + "sonic-bgp-global:BGP_GLOBALS": { + "BGP_GLOBALS_LIST": [ + { + "vrf_name":"default", + "local_asn": 65001 + } + ] + }, + "sonic-bgp-global:BGP_GLOBALS_AF": { + "BGP_GLOBALS_AF_LIST": [ + { + "vrf_name": "default", + "afi_safi": "l2vpn_evpn", + "advertise-all-vni": "false" + } + ] + } + } + }, + "BGP_GLOBALS_AF_ADVERTISE_ALL_VNI_INVALID": { + "sonic-bgp-global:sonic-bgp-global": { + "sonic-bgp-global:BGP_GLOBALS": { + "BGP_GLOBALS_LIST": [ + { + "vrf_name":"default", + "local_asn": 65001 + } + ] + }, + "sonic-bgp-global:BGP_GLOBALS_AF": { + "BGP_GLOBALS_AF_LIST": [ + { + "vrf_name": "default", + "afi_safi": "l2vpn_evpn", + "advertise-all-vni": "invalid value" + } + ] + } + } + }, "BGP_NEIGHBOR_ALL_VALID": { "sonic-port:sonic-port": { "sonic-port:PORT": { @@ -1422,95 +1484,228 @@ } }, - "BGP_ALLOWED_PREFIXES_COM_LIST_ALL_VALID": { + "BGP_ALLOWED_PREFIXES_ALL_VALID": { "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": { "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": { + "BGP_ALLOWED_PREFIXES_LIST": [ + { + "deployment": "DEPLOYMENT_ID", + "id": "4", + "default_action": "permit", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } + ], + "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [ + { + "deployment": "DEPLOYMENT_ID", + "id": "4", + "neighbor": "NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", + "default_action": "permit", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } + ], "BGP_ALLOWED_PREFIXES_COM_LIST": [ { "deployment": "DEPLOYMENT_ID", "id": "4", "community": "123:123", "default_action": "permit", - "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24"], - "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"] - }, + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } + ], + "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [ { "deployment": "DEPLOYMENT_ID", - "id": "5", - "community": "456:456", + "id": "4", + "neighbor": "NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", + "community": "123:123", "default_action": "permit", - "prefixes_v4": ["10.10.0.0/24", "10.11.0.0/24"], - "prefixes_v6": ["fc00:f1::/64", "fc00:a1::/64"] + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] } ] } } }, - "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_DEPLOYMENT": { + "BGP_ALLOWED_PREFIXES_INVALID_DEPLOYMENT": { "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": { "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": { + "BGP_ALLOWED_PREFIXES_LIST": [ + { + "deployment": "INVALID_DEPLOYMENT", + "id": "4", + "default_action": "permit", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } + ], + "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [ + { + "deployment": "INVALID_DEPLOYMENT", + "id": "4", + "neighbor": "NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", + "default_action": "permit", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } + ], "BGP_ALLOWED_PREFIXES_COM_LIST": [ { - "deployment": "DEPLOYMENTID", + "deployment": "INVALID_DEPLOYMENT", "id": "4", "community": "123:123", - "default_action": "permitall", + "default_action": "permit", "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24"], "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"] } + ], + "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [ + { + "deployment": "INVALID_DEPLOYMENT", + "id": "4", + "neighbor": "NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", + "community": "123:123", + "default_action": "permit", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } ] } } }, - "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_DEFAULT_ACTION": { + "BGP_ALLOWED_PREFIXES_INVALID_ID": { "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": { "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": { + "BGP_ALLOWED_PREFIXES_LIST": [ + { + "deployment": "DEPLOYMENT_ID", + "id": "INVALID_ID", + "default_action": "permit", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } + ], + "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [ + { + "deployment": "DEPLOYMENT_ID", + "id": "INVALID_ID", + "neighbor": "NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", + "default_action": "permit", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } + ], "BGP_ALLOWED_PREFIXES_COM_LIST": [ { "deployment": "DEPLOYMENT_ID", - "id": "4", + "id": "INVALID_ID", "community": "123:123", - "default_action": "permitall", + "default_action": "permit", "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24"], "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"] } + ], + "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [ + { + "deployment": "DEPLOYMENT_ID", + "id": "INVALID_ID", + "neighbor": "NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", + "community": "123:123", + "default_action": "permit", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } ] } } }, - "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_PREFIXES_IPV4": { + "BGP_ALLOWED_PREFIXES_INVALID_NEIGHBOR": { "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": { "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": { - "BGP_ALLOWED_PREFIXES_COM_LIST": [ + "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [ + { + "deployment": "DEPLOYMENT_ID", + "id": "4", + "neighbor": "INVALID_NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", + "default_action": "permit", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } + ], + "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [ { "deployment": "DEPLOYMENT_ID", "id": "4", + "neighbor": "INVALID_NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", "community": "123:123", "default_action": "permit", - "prefixes_v4": ["10.0.0.0/48", "10.1.0.0/24"], - "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"] + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] } ] } } }, - "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_PREFIXES_IPV6": { + "BGP_ALLOWED_PREFIXES_INVALID_DEFAULT_ACTION": { "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": { "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": { + "BGP_ALLOWED_PREFIXES_LIST": [ + { + "deployment": "DEPLOYMENT_ID", + "id": "4", + "default_action": "INVALID_DEFAULT_ACTION", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } + ], + "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [ + { + "deployment": "DEPLOYMENT_ID", + "id": "4", + "neighbor": "NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", + "default_action": "INVALID_DEFAULT_ACTION", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } + ], "BGP_ALLOWED_PREFIXES_COM_LIST": [ { "deployment": "DEPLOYMENT_ID", "id": "4", "community": "123:123", - "default_action": "permit", - "prefixes_v4": ["10.0.0.0/24", "10.1.0.0./24"], - "prefixes_v6": ["fc00:f0::/129", "fc00:a0::/64"] + "default_action": "INVALID_DEFAULT_ACTION", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } + ], + "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [ + { + "deployment": "DEPLOYMENT_ID", + "id": "4", + "neighbor": "NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", + "community": "123:123", + "default_action": "INVALID_DEFAULT_ACTION", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] } ] } } }, - "BGP_ALLOWED_PREFIXES_LIST_ALL_VALID": { + "BGP_ALLOWED_PREFIXES_INVALID_PREFIXES_IPV4": { "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": { "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": { "BGP_ALLOWED_PREFIXES_LIST": [ @@ -1518,51 +1713,47 @@ "deployment": "DEPLOYMENT_ID", "id": "4", "default_action": "permit", - "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24"], - "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"] - }, + "prefixes_v4": ["10.0.0.0/100"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] + } + ], + "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [ { "deployment": "DEPLOYMENT_ID", - "id": "5", + "id": "4", + "neighbor": "NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", "default_action": "permit", - "prefixes_v4": ["10.10.0.0/24", "10.11.0.0/24"], - "prefixes_v6": ["fc00:f1::/64", "fc00:a1::/64"] + "prefixes_v4": ["10.1.0.0/24 ge 100"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] } - ] - } - } - }, - "BGP_ALLOWED_PREFIXES_LIST_INVALID_DEPLOYMENT": { - "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": { - "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": { - "BGP_ALLOWED_PREFIXES_LIST": [ + ], + "BGP_ALLOWED_PREFIXES_COM_LIST": [ { - "deployment": "DEPLOYMENTID", + "deployment": "DEPLOYMENT_ID", "id": "4", - "default_action": "permitall", - "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24"], - "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"] + "community": "123:123", + "default_action": "permit", + "prefixes_v4": ["10.2.0.0/24 le 100"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] } - ] - } - } - }, - "BGP_ALLOWED_PREFIXES_LIST_INVALID_DEFAULT_ACTION": { - "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": { - "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": { - "BGP_ALLOWED_PREFIXES_LIST": [ + ], + "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [ { "deployment": "DEPLOYMENT_ID", "id": "4", - "default_action": "permitall", - "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24"], - "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"] + "neighbor": "NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", + "community": "123:123", + "default_action": "permit", + "prefixes_v4": ["10.2.0.0/24 eq 28"], + "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"] } ] } } }, - "BGP_ALLOWED_PREFIXES_LIST_INVALID_PREFIXES_IPV4": { + "BGP_ALLOWED_PREFIXES_INVALID_PREFIXES_IPV6": { "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": { "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": { "BGP_ALLOWED_PREFIXES_LIST": [ @@ -1570,23 +1761,41 @@ "deployment": "DEPLOYMENT_ID", "id": "4", "default_action": "permit", - "prefixes_v4": ["10.0.0.0/48", "10.1.0.0/24"], - "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"] + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:f0::/200"] } - ] - } - } - }, - "BGP_ALLOWED_PREFIXES_LIST_INVALID_PREFIXES_IPV6": { - "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": { - "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": { - "BGP_ALLOWED_PREFIXES_LIST": [ + ], + "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [ + { + "deployment": "DEPLOYMENT_ID", + "id": "4", + "neighbor": "NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", + "default_action": "permit", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:a0::/64 ge 200", "fc00:b0::/64 le 96"] + } + ], + "BGP_ALLOWED_PREFIXES_COM_LIST": [ + { + "deployment": "DEPLOYMENT_ID", + "id": "4", + "community": "123:123", + "default_action": "permit", + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:b0::/64 le 200"] + } + ], + "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [ { "deployment": "DEPLOYMENT_ID", "id": "4", + "neighbor": "NEIGHBOR_TYPE", + "neighbor_type": "DUMMY_NEIGHBOR_TYPE", + "community": "123:123", "default_action": "permit", - "prefixes_v4": ["10.0.0.0/24", "10.1.0.0./24"], - "prefixes_v6": ["fc00:f0::/129", "fc00:a0::/64"] + "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"], + "prefixes_v6": ["fc00:b0::/64 eq 96"] } ] } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json index 44f0966c8b1..9662741046b 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json @@ -482,6 +482,15 @@ } } }, + "DEVICE_METADATA_VALID_SUPPORTING_BULK_COUNTER_GROUPS": { + "sonic-device_metadata:sonic-device_metadata": { + "sonic-device_metadata:DEVICE_METADATA": { + "sonic-device_metadata:localhost": { + "supporting_bulk_counter_groups": ["QUEUE_WATERMARK_STAT_COUNTER","PG_WATERMARK_STAT_COUNTER"] + } + } + } + }, "DEVICE_METADATA_VALID_BGP_ROUTER_ID": { "sonic-device_metadata:sonic-device_metadata": { "sonic-device_metadata:DEVICE_METADATA": { diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json index 60386bdd72e..cd39cd899c7 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json @@ -137,6 +137,150 @@ } } }, + "FLEX_COUNTER_TABLE_WITH_VALID_BULK_CHUNK_SIZE": { + "sonic-flex_counter:sonic-flex_counter": { + "sonic-flex_counter:FLEX_COUNTER_TABLE": { + "BUFFER_POOL_WATERMARK": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 10000 + }, + "DEBUG_COUNTER": { + "FLEX_COUNTER_STATUS": "enable" + }, + "PFCWD": { + "FLEX_COUNTER_STATUS": "enable" + }, + "PG_DROP": { + "FLEX_COUNTER_STATUS": "enable", + "BULK_CHUNK_SIZE": 100, + "POLL_INTERVAL": 10000 + }, + "PG_WATERMARK": { + "FLEX_COUNTER_STATUS": "enable", + "BULK_CHUNK_SIZE": 100, + "POLL_INTERVAL": 10000 + }, + "PORT": { + "FLEX_COUNTER_STATUS": "enable", + "BULK_CHUNK_SIZE": 100, + "POLL_INTERVAL": 1000 + }, + "PORT_BUFFER_DROP": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 60000 + }, + "PORT_RATES": { + "FLEX_COUNTER_STATUS": "enable" + }, + "QUEUE": { + "FLEX_COUNTER_STATUS": "enable", + "BULK_CHUNK_SIZE": 100, + "POLL_INTERVAL": 10000 + }, + "QUEUE_WATERMARK": { + "FLEX_COUNTER_STATUS": "enable", + "BULK_CHUNK_SIZE": 100, + "POLL_INTERVAL": 10000 + }, + "ACL": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 10000 + }, + "TUNNEL": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 10000 + }, + "FLOW_CNT_TRAP": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 10000 + }, + "FLOW_CNT_ROUTE": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 10000 + }, + "WRED_ECN_QUEUE": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 10000 + }, + "WRED_ECN_PORT": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 1000 + } + } + } + }, + "FLEX_COUNTER_TABLE_WITH_INVALID_BULK_CHUNK_SIZE": { + "sonic-flex_counter:sonic-flex_counter": { + "sonic-flex_counter:FLEX_COUNTER_TABLE": { + "BUFFER_POOL_WATERMARK": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 10000 + }, + "DEBUG_COUNTER": { + "FLEX_COUNTER_STATUS": "enable" + }, + "PFCWD": { + "FLEX_COUNTER_STATUS": "enable" + }, + "PG_DROP": { + "FLEX_COUNTER_STATUS": "enable", + "BULK_CHUNK_SIZE": 0, + "POLL_INTERVAL": 10000 + }, + "PG_WATERMARK": { + "FLEX_COUNTER_STATUS": "enable", + "BULK_CHUNK_SIZE": 0, + "POLL_INTERVAL": 10000 + }, + "PORT": { + "FLEX_COUNTER_STATUS": "enable", + "BULK_CHUNK_SIZE": 0, + "POLL_INTERVAL": 1000 + }, + "PORT_BUFFER_DROP": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 60000 + }, + "PORT_RATES": { + "FLEX_COUNTER_STATUS": "enable" + }, + "QUEUE": { + "FLEX_COUNTER_STATUS": "enable", + "BULK_CHUNK_SIZE": 0, + "POLL_INTERVAL": 10000 + }, + "QUEUE_WATERMARK": { + "FLEX_COUNTER_STATUS": "enable", + "BULK_CHUNK_SIZE": 0, + "POLL_INTERVAL": 10000 + }, + "ACL": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 10000 + }, + "TUNNEL": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 10000 + }, + "FLOW_CNT_TRAP": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 10000 + }, + "FLOW_CNT_ROUTE": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 10000 + }, + "WRED_ECN_QUEUE": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 10000 + }, + "WRED_ECN_PORT": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": 1000 + } + } + } + }, "FLOW_COUNTER_ROUTE_PATTERN_TABLE_WITH_VRF": { "sonic-vrf:sonic-vrf":{ "sonic-vrf:VRF": { diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json index cdad6fe31f5..0c8327a8991 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json @@ -10,7 +10,9 @@ "gnmi": { "client_auth": "true", "log_level": "2", - "port": "50052" + "port": "50052", + "enable_crl": "true", + "crl_expire_duration": "86400" } } } @@ -26,7 +28,9 @@ "gnmi": { "client_auth": "up", "log_level": "2", - "port": "50052" + "port": "50052", + "enable_crl": "true", + "crl_expire_duration": "86400" } } } @@ -42,7 +46,9 @@ "gnmi": { "client_auth": "true", "log_level": "2", - "port": "abc" + "port": "abc", + "enable_crl": "true", + "crl_expire_duration": "86400" } } } @@ -59,7 +65,9 @@ "client_auth": "true", "log_level": "2", "port": "50051", - "save_on_set": "wrong" + "save_on_set": "wrong", + "enable_crl": "true", + "crl_expire_duration": "86400" } } } @@ -76,7 +84,9 @@ "client_auth": "true", "log_level": "2", "port": "50052", - "save_on_set": "false" + "save_on_set": "false", + "enable_crl": "true", + "crl_expire_duration": "86400" } } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/grpcclient.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/grpcclient.json new file mode 100644 index 00000000000..79d92d1212a --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/grpcclient.json @@ -0,0 +1,12 @@ +{ + "GRPCCLIENT_CONFIG_CHANGE_VERBOSITY_LEVEL": { + "sonic-grpcclient:sonic-grpcclient": { + "sonic-grpcclient:GRPCCLIENT": { + "sonic-grpcclient:config": + { + "log_level": "info" + } + } + } + } +} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/loopback.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/loopback.json index 9ebb4855625..274b5254846 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/loopback.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/loopback.json @@ -52,5 +52,25 @@ ] } } + }, + "LOOPBACK_INVALID_INTERFACE_NAME_LENGTH": { + "sonic-loopback-interface:sonic-loopback-interface": { + "sonic-loopback-interface:LOOPBACK_INTERFACE": { + "LOOPBACK_INTERFACE_IPPREFIX_LIST": [ + { + "family": "IPv4", + "ip-prefix": "10.0.0.1/30", + "name": "lo1lo1lo1lo1lo1lo1", + "scope": "global" + } + ], + "LOOPBACK_INTERFACE_LIST": [ + { + "name": "lo1lo1lo1lo1lo1lo1", + "nat_zone": "2" + } + ] + } + } } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/memory_statistics.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/memory_statistics.json new file mode 100644 index 00000000000..22529187c95 --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/memory_statistics.json @@ -0,0 +1,47 @@ +{ + "MEMORY_STATISTICS_VALID_CONFIG": { + "sonic-memory-statistics:sonic-memory-statistics": { + "sonic-memory-statistics:MEMORY_STATISTICS": { + "memory_statistics":{ + "enabled": "false", + "sampling_interval": "5", + "retention_period": "15" + } + } + } + }, + "MEMORY_STATISTICS_WITH_INVALID_SAMPLING_INTERVAL": { + "sonic-memory-statistics:sonic-memory-statistics": { + "sonic-memory-statistics:MEMORY_STATISTICS": { + "memory_statistics":{ + "enabled": "true", + "sampling_interval": "45", + "retention_period": "20" + } + } + } + }, + "MEMORY_STATISTICS_WITH_INVALID_RETENTION_PERIOD": { + "sonic-memory-statistics:sonic-memory-statistics": { + "sonic-memory-statistics:MEMORY_STATISTICS": { + "memory_statistics":{ + "enabled": "true", + "sampling_interval": "5", + "retention_period": "45" + } + } + } + }, + "MEMORY_STATISTICS_WITH_ENABLE_FEATURE": { + "sonic-memory-statistics:sonic-memory-statistics": { + "sonic-memory-statistics:MEMORY_STATISTICS": { + "memory_statistics":{ + "enabled": "true", + "sampling_interval": "5", + "retention_period": "30" + } + } + } + } + +} \ No newline at end of file diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/qosmaps.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/qosmaps.json index 355187b497d..b67a559ac5f 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/qosmaps.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/qosmaps.json @@ -855,6 +855,92 @@ ] } } - } + }, + "TC_TO_DSCP_MAP_CRETAE": { + "sonic-tc-dscp-map:sonic-tc-dscp-map": { + "sonic-tc-dscp-map:TC_TO_DSCP_MAP": { + "TC_TO_DSCP_MAP_LIST": [ + { + "name": "map1", + "TC_TO_DSCP_MAP": [ + { + "tc": "1", + "dscp": "1" + }, + { + "tc":"2", + "dscp":"2" + }, + { + "tc": "8", + "dscp": "8" + } + ] + }, + { + "name": "map2", + "TC_TO_DSCP_MAP": [ + { + "tc": "1", + "dscp": "1" + }, + { + "tc":"2", + "dscp":"2" + }, + { + "tc": "8", + "dscp": "8" + } + ] + } + ] + } + } + }, + + "TC_TO_DSCP_MAP_CREATE_INVALID_TC": { + "sonic-tc-dscp-map:sonic-tc-dscp-map": { + "sonic-tc-dscp-map:TC_TO_DSCP_MAP": { + "TC_TO_DSCP_MAP_LIST": [ + { + "name": "map3", + "TC_TO_DSCP_MAP": [ + { + "tc": "16", + "dscp": "1" + }, + { + "tc":"2", + "dscp":"2" + } + ] + } + ] + } + } + }, + + "TC_TO_DSCP_MAP_CREATE_INVALID_DSCP": { + "sonic-tc-dscp-map:sonic-tc-dscp-map": { + "sonic-tc-dscp-map:TC_TO_DSCP_MAP": { + "TC_TO_DSCP_MAP_LIST": [ + { + "name": "map3", + "TC_TO_DSCP_MAP": [ + { + "tc": "1", + "dscp": "64" + }, + { + "tc":"2", + "dscp":"2" + } + ] + } + ] + } + } + } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/srv6.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/srv6.json new file mode 100644 index 00000000000..5185d41007c --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/srv6.json @@ -0,0 +1,213 @@ +{ + "SRV6_VALID": { + "sonic-srv6:sonic-srv6": { + "sonic-srv6:SRV6_MY_LOCATORS": { + "SRV6_MY_LOCATORS_LIST": [ + { + "locator_name": "MAIN", + "prefix": "FCBB:BBBB:20::" + } + ] + }, + "sonic-srv6:SRV6_MY_SIDS": { + "SRV6_MY_SIDS_LIST": [ + { + "ip_address": "FCBB:BBBB:20::", + "locator": "MAIN", + "action": "uN" + }, + { + "ip_address": "FCBB:BBBB:20:F1::", + "locator": "MAIN", + "action": "uDT46" + } + ] + } + } + }, + "SRV6_MY_LOCATOR_INVALID_FUNC_LEN": { + "sonic-srv6:sonic-srv6": { + "sonic-srv6:SRV6_MY_LOCATORS": { + "SRV6_MY_LOCATORS_LIST": [ + { + "locator_name": "MAIN", + "prefix": "FCBB:BBBB:20::", + "func_len": 127 + } + ] + }, + "sonic-srv6:SRV6_MY_SIDS": { + "SRV6_MY_SIDS_LIST": [ + { + "ip_address": "FCBB:BBBB:20::", + "locator": "MAIN", + "action": "uN" + }, + { + "ip_address": "FCBB:BBBB:20:F1::", + "locator": "MAIN", + "action": "uDT46" + } + ] + } + } + }, + "SRV6_MY_LOCATOR_INVALID_VRF": { + "sonic-srv6:sonic-srv6": { + "sonic-srv6:SRV6_MY_LOCATORS": { + "SRV6_MY_LOCATORS_LIST": [ + { + "locator_name": "MAIN", + "prefix": "FCBB:BBBB:20::", + "vrf": "Vrf1" + } + ] + }, + "sonic-srv6:SRV6_MY_SIDS": { + "SRV6_MY_SIDS_LIST": [ + { + "ip_address": "FCBB:BBBB:20::", + "locator": "MAIN", + "action": "uN" + }, + { + "ip_address": "FCBB:BBBB:20:F1::", + "locator": "MAIN", + "action": "uDT46" + } + ] + } + } + }, + "SRV6_MY_SID_INVALID_LOCATOR": { + "sonic-srv6:sonic-srv6": { + "sonic-srv6:SRV6_MY_LOCATORS": { + "SRV6_MY_LOCATORS_LIST": [ + { + "locator_name": "MAIN", + "prefix": "FCBB:BBBB:20::" + } + ] + }, + "sonic-srv6:SRV6_MY_SIDS": { + "SRV6_MY_SIDS_LIST": [ + { + "ip_address": "FCBB:BBBB:20::", + "locator": "None", + "action": "uN" + }, + { + "ip_address": "FCBB:BBBB:20:F1::", + "locator": "MAIN", + "action": "uDT46" + } + ] + } + } + }, + "SRV6_MY_SID_INVALID_IP_ADDR": { + "sonic-srv6:sonic-srv6": { + "sonic-srv6:SRV6_MY_LOCATORS": { + "SRV6_MY_LOCATORS_LIST": [ + { + "locator_name": "MAIN", + "prefix": "FCBB:BBBB:20::" + } + ] + }, + "sonic-srv6:SRV6_MY_SIDS": { + "SRV6_MY_SIDS_LIST": [ + { + "ip_address": "FCBB:BBBB:200001::", + "locator": "MAIN", + "action": "uN" + }, + { + "ip_address": "FCBB:BBBB:20:F1::", + "locator": "MAIN", + "action": "uDT46" + } + ] + } + } + }, + "SRV6_MY_SID_UNMATCHED_IP_ADDR": { + "sonic-srv6:sonic-srv6": { + "sonic-srv6:SRV6_MY_LOCATORS": { + "SRV6_MY_LOCATORS_LIST": [ + { + "locator_name": "MAIN", + "prefix": "FCBB:BBBB:20::" + } + ] + }, + "sonic-srv6:SRV6_MY_SIDS": { + "SRV6_MY_SIDS_LIST": [ + { + "ip_address": "FCBB:BBBB:21::", + "locator": "MAIN", + "action": "uN" + }, + { + "ip_address": "FCBB:BBBB:20:F1::", + "locator": "MAIN", + "action": "uDT46" + } + ] + } + } + }, + "SRV6_MY_SID_INVALID_ACTION": { + "sonic-srv6:sonic-srv6": { + "sonic-srv6:SRV6_MY_LOCATORS": { + "SRV6_MY_LOCATORS_LIST": [ + { + "locator_name": "MAIN", + "prefix": "FCBB:BBBB:20::" + } + ] + }, + "sonic-srv6:SRV6_MY_SIDS": { + "SRV6_MY_SIDS_LIST": [ + { + "ip_address": "FCBB:BBBB:20::", + "locator": "MAIN", + "action": "uA" + }, + { + "ip_address": "FCBB:BBBB:20:F1::", + "locator": "MAIN", + "action": "uDT46" + } + ] + } + } + }, + "SRV6_MY_SID_DSCP_MODE_WITH_UN": { + "sonic-srv6:sonic-srv6": { + "sonic-srv6:SRV6_MY_LOCATORS": { + "SRV6_MY_LOCATORS_LIST": [ + { + "locator_name": "MAIN", + "prefix": "FCBB:BBBB:20::" + } + ] + }, + "sonic-srv6:SRV6_MY_SIDS": { + "SRV6_MY_SIDS_LIST": [ + { + "ip_address": "FCBB:BBBB:20::", + "locator": "MAIN", + "action": "uN", + "decap_dscp_mode": "uniform" + }, + { + "ip_address": "FCBB:BBBB:20:F1::", + "locator": "MAIN", + "action": "uDT46" + } + ] + } + } + } +} \ No newline at end of file diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/subnet_decap.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/subnet_decap.json new file mode 100644 index 00000000000..6b8373d7ad3 --- /dev/null +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/subnet_decap.json @@ -0,0 +1,111 @@ +{ + "SUBNET_DECAP_DEFAULT_TEST": { + "sonic-subnet-decap:sonic-subnet-decap": { + "sonic-subnet-decap:SUBNET_DECAP": { + "SUBNET_DECAP_LIST": [ + { + "name": "AZURE", + "src_ip": "10.10.10.0/24", + "src_ip_v6": "20c1:ba8::/64" + } + ] + } + } + }, + "SUBNET_DECAP_ENABLE_TEST": { + "sonic-subnet-decap:sonic-subnet-decap": { + "sonic-subnet-decap:SUBNET_DECAP": { + "SUBNET_DECAP_LIST": [ + { + "name": "AZURE", + "status": "enable", + "src_ip": "10.10.10.0/24", + "src_ip_v6": "20c1:ba8::/64" + } + ] + } + } + }, + "SUBNET_DECAP_DISABLE_TEST": { + "sonic-subnet-decap:sonic-subnet-decap": { + "sonic-subnet-decap:SUBNET_DECAP": { + "SUBNET_DECAP_LIST": [ + { + "name": "AZURE", + "status": "disable", + "src_ip": "10.10.10.0/24", + "src_ip_v6": "20c1:ba8::/64" + } + ] + } + } + }, + "SUBNET_DECAP_INVALID_STATUS_TEST": { + "sonic-subnet-decap:sonic-subnet-decap": { + "sonic-subnet-decap:SUBNET_DECAP": { + "SUBNET_DECAP_LIST": [ + { + "name": "AZURE", + "status": "enabled", + "src_ip": "10.10.10.0/24", + "src_ip_v6": "20c1:ba8::/64" + } + ] + } + } + }, + "SUBNET_DECAP_INVALID_IPV4": { + "sonic-subnet-decap:sonic-subnet-decap": { + "sonic-subnet-decap:SUBNET_DECAP": { + "SUBNET_DECAP_LIST": [ + { + "name": "AZURE", + "status": "enable", + "src_ip": "10.10.10.01111/24", + "src_ip_v6": "20c1:ba8::/64" + } + ] + } + } + }, + "SUBNET_DECAP_INVALID_IPV6": { + "sonic-subnet-decap:sonic-subnet-decap": { + "sonic-subnet-decap:SUBNET_DECAP": { + "SUBNET_DECAP_LIST": [ + { + "name": "AZURE", + "status": "enable", + "src_ip": "10.10.10.0/24", + "src_ip_v6": "20c1:ba8::01111/64" + } + ] + } + } + }, + "SUBNET_DECAP_NO_IPV4": { + "sonic-subnet-decap:sonic-subnet-decap": { + "sonic-subnet-decap:SUBNET_DECAP": { + "SUBNET_DECAP_LIST": [ + { + "name": "AZURE", + "status": "enable", + "src_ip_v6": "20c1:ba8::/64" + } + ] + } + } + }, + "SUBNET_DECAP_NO_IPV6": { + "sonic-subnet-decap:sonic-subnet-decap": { + "sonic-subnet-decap:SUBNET_DECAP": { + "SUBNET_DECAP_LIST": [ + { + "name": "AZURE", + "status": "enable", + "src_ip": "10.10.10.0/24" + } + ] + } + } + } +} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json index 18e708262e7..2d3bd08f5d2 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json @@ -10,7 +10,9 @@ "gnmi": { "client_auth": "true", "log_level": "2", - "port": "50051" + "port": "50051", + "enable_crl": "true", + "crl_expire_duration": "86400" } } } @@ -26,7 +28,9 @@ "gnmi": { "client_auth": "up", "log_level": "2", - "port": "50051" + "port": "50051", + "enable_crl": "true", + "crl_expire_duration": "86400" } } } @@ -42,7 +46,9 @@ "gnmi": { "client_auth": "true", "log_level": "2", - "port": "abc" + "port": "abc", + "enable_crl": "true", + "crl_expire_duration": "86400" } } } @@ -59,7 +65,9 @@ "client_auth": "true", "log_level": "2", "port": "50051", - "save_on_set": "wrong" + "save_on_set": "wrong", + "enable_crl": "true", + "crl_expire_duration": "86400" } } } @@ -76,7 +84,9 @@ "client_auth": "true", "log_level": "2", "port": "50051", - "save_on_set": "false" + "save_on_set": "false", + "enable_crl": "true", + "crl_expire_duration": "86400" } } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json index b4288472cfa..762287c82cd 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json @@ -45,6 +45,23 @@ } } }, + "INVALID_LONG_VLAN_NAME": { + "sonic-vlan:sonic-vlan": { + "sonic-vlan:VLAN": { + "VLAN_LIST": [ + { + "admin_status": "up", + "description": "server_vlan", + "dhcp_servers": [ + "10.186.72.56" + ], + "mtu": "9100", + "name": "Vlan123456789012" + } + ] + } + } + }, "DHCP_SERVER_INCORRECT_FORMAT": { "sonic-vlan:sonic-vlan": { "sonic-vlan:VLAN": { @@ -827,7 +844,7 @@ "type": "SPAN", "src_port": "Ethernet1", "dst_port": "Ethernet2" - }] + }] } } }, diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vrf.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vrf.json index 082ec022f81..09ca521fe82 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vrf.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vrf.json @@ -19,6 +19,16 @@ } }, + "VRF_TEST_INVALID_LONG__NAME": { + "sonic-vrf:sonic-vrf": { + "sonic-vrf:VRF": { + "VRF_LIST": [{ + "name": "VrfNameTooLong!!!" + }] + } + } + }, + "VRF_TEST_WITH_FALLBACK": { "sonic-vrf:sonic-vrf": { "sonic-vrf:VRF": { diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json index 64c26d3e9ef..79046b11672 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json @@ -166,6 +166,37 @@ } }, "VXLAN_TUNNEL_NAME_VALID_TEST": { + "sonic-vlan:sonic-vlan": { + "sonic-vlan:VLAN": { + "VLAN_LIST": [ + { + "name": "Vlan100" + } + ] + } + }, + "sonic-vxlan:sonic-vxlan": { + "sonic-vxlan:VXLAN_TUNNEL": { + "VXLAN_TUNNEL_LIST": [ + { + "name": "15CharsLongName", + "src_ip": "1.2.3.4" + } + ] + }, + "sonic-vxlan:VXLAN_TUNNEL_MAP": { + "VXLAN_TUNNEL_MAP_LIST": [ + { + "name": "15CharsLongName", + "mapname": "map_100_Vlan100", + "vlan": "Vlan100", + "vni": "16777214" + } + ] + } + } + }, + "VXLAN_TUNNEL_NAME_INVALID_LENGTH_TEST": { "sonic-vlan:sonic-vlan": { "sonic-vlan:VLAN": { "VLAN_LIST": [ diff --git a/src/sonic-yang-models/yang-models/sonic-ars.yang b/src/sonic-yang-models/yang-models/sonic-ars.yang new file mode 100644 index 00000000000..b74a7a5eb7e --- /dev/null +++ b/src/sonic-yang-models/yang-models/sonic-ars.yang @@ -0,0 +1,324 @@ +module sonic-ars { + namespace "http://github.com/sonic-net/sonic-ars"; + prefix sars; + yang-version 1.1; + + import ietf-yang-types { + prefix yang; + } + + import ietf-inet-types { + prefix inet; + } + + import sonic-types { + prefix stypes; + } + + import sonic-vrf { + prefix vrf; + } + + import sonic-port { + prefix port; + } + + import sonic-portchannel { + prefix lag; + } + + organization + "SONiC"; + + contact + "SONiC"; + + description + "SONIC Adaptive Routing and Switching"; + + revision 2024-10-01 { + description + "Initial revision."; + } + + container sonic-ars { + + container ARS_PROFILE { + + list ARS_PROFILE_LIST { + + key "profile_name"; + max-elements 1; + + leaf profile_name { + description "ARS Profile Name"; + type string; + } + + leaf algorithm { + description "ARS quality algorithm"; + type enumeration { + enum ewma { + description "Exponentially Weighted Moving Average algorithm"; + } + } + } + + leaf max_flows { + type uint32; + description "Maximum number of flows that can be maintained per ARS profile."; + } + + leaf sampling_interval { + type uint32; + description "Sampling interval in microseconds for quality measure computation."; + } + + leaf past_load_min_value { + type uint16; + description "Past load min value."; + } + + leaf past_load_max_value { + type uint16; + description "Past load max value."; + } + + leaf past_load_weight { + type uint16; + description "Past load weight."; + } + + leaf future_load_min_value { + type uint16; + description "Future load min value."; + } + + leaf future_load_max_value { + type uint16; + description "Future load max value."; + } + + leaf future_load_weight { + type uint16; + description "Future load weight."; + } + + leaf current_load_min_value { + type uint16; + description "Current load min value."; + } + + leaf current_load_max_value { + type uint16; + description "Current load max value."; + } + + leaf ipv4_enable { + type boolean; + description "Whether ARS is enabled over IPv4 packets"; + } + + leaf ipv6_enable { + type boolean; + description "Whether ARS is enabled over IPv6 packets"; + } + } + /* end of list ARS_PORIFLE_LIST */ + } + /* end of container ARS_PORIFLE */ + + container ARS_QUANTIZATION_BANDS { + + list ARS_QUANTIZATION_BANDS_LIST { + key "profile_name band_index"; + max-elements 8; + + leaf profile_name { + description "ARS profile Name"; + type leafref { + path "/sars:sonic-ars/sars:ARS_PROFILE/sars:ARS_PROFILE_LIST/sars:profile_name"; + } + } + + leaf band_index { + type uint8 { + range "0 .. 7"; + } + description "Index of the qunatization band"; + } + + leaf min_value { + type uint16; + description "Minimum value in Mbps to use for the qunatization band creation"; + } + + leaf max_value { + type uint16; + description "Minimum value in Mbps to use for the qunatization band creation"; + } + } + /* end of list ARS_QUANTIZATION_BANDS_LIST */ + } + /* end of container ARS_QUANTIZATION_BANDS */ + + container ARS_INTERFACE { + + list ARS_INTERFACE_LIST { + description "List of interfaces participating in ARS"; + key "if_name"; + + leaf if_name { + type union { + type leafref { + path "/port:sonic-port/port:PORT/port:PORT_LIST/port:name"; + } + type leafref { + path "/lag:sonic-portchannel/lag:PORTCHANNEL/lag:PORTCHANNEL_LIST/lag:name"; + } + } + description "ARS-enabled interface name"; + } + } + /* end of list ARS_INTERFACE_LIST */ + } + /* end of container ARS_INTERFACE */ + + container ARS_NEXTHOP_GROUP { + + description "ARS-enabled Nexthop Groups"; + + list ARS_NEXTHOP_GROUP_LIST { + + key "ip_prefix vrf_name"; + + leaf ip_prefix{ + type stypes:sonic-ip-prefix; + description "Ip prefix which identifies nexthop group for which ARS behavior is desired"; + } + + leaf vrf_name { + type union { + type string { + pattern "default"; + } + type leafref { + path "/vrf:sonic-vrf/vrf:VRF/vrf:VRF_LIST/vrf:name"; + } + } + description "VRF name"; + } + + leaf profile_name { + description "ARS profile Name"; + type leafref { + path "/sars:sonic-ars/sars:ARS_PROFILE/sars:ARS_PROFILE_LIST/sars:profile_name"; + } + } + + leaf assign_mode { + type enumeration { + enum per_flowlet_quality{ + description "Per flow-let assignment based on flow quality"; + } + enum per_packet { + description "Per packet flow assignment based on port load"; + } + } + } + + leaf flowlet_idle_time { + type uint16; + description "Idle duration in microseconds. This duration is to classifying a flow-let in a macro flow."; + } + + leaf max_flows { + type uint32; + description "Maximum number of flow states that can be maintained per ARS object."; + } + + leaf primary_path_threshold { + type uint32; + description "Primary path metric"; + } + + leaf alternative_path_cost { + type uint32; + description "Alternative path cost"; + } + + leaf-list alternative_path_members { + type inet:ip-address; + description "NHG members participating in alternative path"; + } + } + /* end of list ARS_NEXTHOP_GROUP_LIST */ + } + /* end of container ARS_NEXTHOP_GROUP */ + + + container ARS_PORTCHANNEL { + + description "ARS-enabled LAGs"; + + list ARS_PORTCHANNEL_LIST { + + key "if_name"; + + leaf if_name{ + type leafref { + path "/lag:sonic-portchannel/lag:PORTCHANNEL/lag:PORTCHANNEL_LIST/lag:name"; + } + description "Interface name which identifies LAG for which ARS behavior is desired"; + } + + leaf profile_name { + description "ARS profile Name"; + type leafref { + path "/sars:sonic-ars/sars:ARS_PROFILE/sars:ARS_PROFILE_LIST/sars:profile_name"; + } + } + + leaf assign_mode { + type enumeration { + enum per_flowlet_quality{ + description "Per flow-let assignment based on flow quality"; + } + enum per_packet { + description "Per packet flow assignment based on port load"; + } + } + } + + leaf flowlet_idle_time { + type uint16; + description "Idle duration in microseconds. This duration is to classifying a flow-let in a macro flow."; + } + + leaf max_flows { + type uint32; + description "Maximum number of flow states that can be maintained per ARS object."; + } + + leaf primary_path_threshold { + type uint32; + description "Primary path metric"; + } + + leaf alternative_path_cost { + type uint32; + description "Alternative path cost"; + } + + leaf-list alternative_path_members { + type leafref { + path "/port:sonic-port/port:PORT/port:PORT_LIST/port:name"; + } + description "Members of the LAG participating in alternative path"; + } + } + /* end of list ARS_PORTCHANNEL_LIST */ + } + /* end of container ARS_PORTCHANNEL */ + } +} diff --git a/src/sonic-yang-models/yang-models/sonic-asic-sensors.yang b/src/sonic-yang-models/yang-models/sonic-asic-sensors.yang new file mode 100644 index 00000000000..afc25bf4bec --- /dev/null +++ b/src/sonic-yang-models/yang-models/sonic-asic-sensors.yang @@ -0,0 +1,41 @@ +module sonic-asic-sensors { + yang-version 1.1; + namespace "http://github.com/sonic-net/sonic-asic-sensors"; + prefix asic-sensors; + + import sonic-types { + prefix stypes; + } + + description "ASIC SENSORs config yang Module for SONiC OS"; + + revision 2024-11-19 { + description "First Revision"; + } + + container sonic-asic-sensors { + container ASIC_SENSORS { + description "ASIC_SENSORS part of config_db.json"; + + container ASIC_SENSORS_POLLER_INTERVAL { + leaf interval { + description "ASIC SENSORS polling interval"; + type uint32 { + range "1..999"; + } + units seconds; + default "10 "; + } + } /* ASIC_SENSORS_POLLER_INTERVAL */ + + container ASIC_SENSORS_POLLER_STATUS { + leaf admin_status { + description "ASIC SENSORS polling administrative status"; + type stypes:mode-status; + default "enable"; + } /* admin_status */ + } /* ASIC_SENSORS_POLLER_STATUS */ + + } /* end of ASIC_SENSORS */ + } /* end of container sonic-asic-sensors */ +} /* end of module sonic-asic-sensors */ diff --git a/src/sonic-yang-models/yang-models/sonic-bgp-allowed-prefix.yang b/src/sonic-yang-models/yang-models/sonic-bgp-allowed-prefix.yang index 65f5dab7473..ace3ddc2f1d 100644 --- a/src/sonic-yang-models/yang-models/sonic-bgp-allowed-prefix.yang +++ b/src/sonic-yang-models/yang-models/sonic-bgp-allowed-prefix.yang @@ -29,8 +29,125 @@ module sonic-bgp-allowed-prefix { "Initial revision."; } + typedef bgp-allowed-ipv4-prefix { + type string { + pattern + '(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\.){3}' + + '([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])' + + '/(([0-9])|([1-2][0-9])|(3[0-2]))' + + '( (le|ge) (([0-9])|([1-2][0-9])|(3[0-2])))?'; + } + description + "The bgp-allowed-ipv4-prefix type represents an IPv4 address prefix + in BGP allowed prefix format. + + The string format is an inet:ipv4-prefix (defined in RFC 6991) value + appended with an optional suffix. + + The optional suffix consists of a string 'le' or 'ge' followed by a + number which is less than or equal to 32."; + } + + typedef bgp-allowed-ipv6-prefix { + type string { + pattern '((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}' + + '((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|' + + '(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\.){3}' + + '(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))' + + '(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))' + + '( (le|ge) (([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))?'; + pattern '(([^:]+:){6}(([^:]+:[^:]+)|(.*\..*)))|' + + '((([^:]+:)*[^:]+)?::(([^:]+:)*[^:]+)?)' + + '(/.+)' + + '( (le|ge) (([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))?'; + } + description + "The bgp-allowed-ipv6-prefix type represents an IPv6 address prefix + in BGP allowed prefix format. + + The string format is an inet:ipv6-prefix (defined in RFC 6991) value + appended with an optional suffix. + + The optional suffix consists of a string 'le' or 'ge' followed by a + number which is less than or equal to 128."; + } + container sonic-bgp-allowed-prefix { container BGP_ALLOWED_PREFIXES { + list BGP_ALLOWED_PREFIXES_LIST { + key "deployment id"; + + leaf deployment { + type string { + pattern "DEPLOYMENT_ID"; + } + description "BGP allowed prefix list key type"; + } + + leaf id { + type uint32; + description "BGP allowed prefix list deployment id"; + } + + leaf default_action { + type rpolsets:routing-policy-action-type; + description "Permit/Deny action for BGP allow prefix list"; + } + + leaf-list prefixes_v4 { + type bgp-allowed-ipv4-prefix; + description "BGP V4 allowed prefix list"; + } + + leaf-list prefixes_v6 { + type bgp-allowed-ipv6-prefix; + description "BGP V6 allowed prefix list"; + } + } + + list BGP_ALLOWED_PREFIXES_NEIGH_LIST { + key "deployment id neighbor neighbor_type"; + + leaf deployment { + type string { + pattern "DEPLOYMENT_ID"; + } + description "BGP allowed prefix list key type"; + } + + leaf id { + type uint32; + description "BGP allowed prefix list deployment id"; + } + + leaf neighbor { + type string { + pattern "NEIGHBOR_TYPE"; + } + description "BGP allowed prefix list neighbor"; + } + + leaf neighbor_type { + type string; + description "BGP allowed prefix list neighbor type"; + } + + leaf default_action { + type rpolsets:routing-policy-action-type; + description "Permit/Deny action for BGP allow prefix list"; + } + + leaf-list prefixes_v4 { + type bgp-allowed-ipv4-prefix; + description "BGP V4 allowed prefix list"; + } + + leaf-list prefixes_v6 { + type bgp-allowed-ipv6-prefix; + description "BGP V6 allowed prefix list"; + } + } + list BGP_ALLOWED_PREFIXES_COM_LIST { key "deployment id community"; @@ -57,18 +174,18 @@ module sonic-bgp-allowed-prefix { } leaf-list prefixes_v4 { - type inet:ipv4-prefix; + type bgp-allowed-ipv4-prefix; description "BGP V4 allowed prefix list"; } leaf-list prefixes_v6 { - type inet:ipv6-prefix; + type bgp-allowed-ipv6-prefix; description "BGP V6 allowed prefix list"; } } - list BGP_ALLOWED_PREFIXES_LIST { - key "deployment id"; + list BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST { + key "deployment id neighbor neighbor_type community"; leaf deployment { type string { @@ -82,18 +199,35 @@ module sonic-bgp-allowed-prefix { description "BGP allowed prefix list deployment id"; } + leaf neighbor { + type string { + pattern "NEIGHBOR_TYPE"; + } + description "BGP allowed prefix list neighbor"; + } + + leaf neighbor_type { + type string; + description "BGP allowed prefix list neighbor type"; + } + + leaf community { + type string; + description "BGP allowed prefix list deployment community"; + } + leaf default_action { type rpolsets:routing-policy-action-type; description "Permit/Deny action for BGP allow prefix list"; } leaf-list prefixes_v4 { - type inet:ipv4-prefix; + type bgp-allowed-ipv4-prefix; description "BGP V4 allowed prefix list"; } leaf-list prefixes_v6 { - type inet:ipv6-prefix; + type bgp-allowed-ipv6-prefix; description "BGP V6 allowed prefix list"; } } diff --git a/src/sonic-yang-models/yang-models/sonic-bgp-global.yang b/src/sonic-yang-models/yang-models/sonic-bgp-global.yang index db6c02356aa..fe10d0ad65b 100644 --- a/src/sonic-yang-models/yang-models/sonic-bgp-global.yang +++ b/src/sonic-yang-models/yang-models/sonic-bgp-global.yang @@ -445,6 +445,11 @@ module sonic-bgp-global { } description "Maximum duration to suppress a stable route"; } + + leaf advertise-all-vni { + type boolean; + description "L2VPN advertise all VNIs"; + } } } diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang index 0d0607fd3ca..0f2f53e8d58 100644 --- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang +++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang @@ -250,6 +250,11 @@ module sonic-device_metadata { created, regardless of the CONFIG_DB buffers configuration."; } + leaf-list supporting_bulk_counter_groups { + type string; + description "This field contains a list of counter groups that support bulk operation."; + } + leaf bgp_router_id { type inet:ipv4-address; description "BGP Router identifier"; diff --git a/src/sonic-yang-models/yang-models/sonic-events-host.yang b/src/sonic-yang-models/yang-models/sonic-events-host.yang index 1992d829bff..12d52e236d2 100644 --- a/src/sonic-yang-models/yang-models/sonic-events-host.yang +++ b/src/sonic-yang-models/yang-models/sonic-events-host.yang @@ -93,6 +93,7 @@ module sonic-events-host { leaf fail_type { type enumeration { enum "read_only"; + enum "disk_full"; } description "Type of failure"; } diff --git a/src/sonic-yang-models/yang-models/sonic-flex_counter.yang b/src/sonic-yang-models/yang-models/sonic-flex_counter.yang index 11e09f9f2a9..2288782e0d6 100644 --- a/src/sonic-yang-models/yang-models/sonic-flex_counter.yang +++ b/src/sonic-yang-models/yang-models/sonic-flex_counter.yang @@ -41,6 +41,12 @@ module sonic-flex_counter { } } + typedef bulk_chunk_size { + type uint32 { + range 1..4294967295; + } + } + description "FLEX_COUNTER_TABLE part of config_db.json"; /* below are in alphabetical order */ @@ -102,6 +108,9 @@ module sonic-flex_counter { leaf POLL_INTERVAL { type poll_interval; } + leaf BULK_CHUNK_SIZE { + type bulk_chunk_size; + } } container PG_WATERMARK { @@ -115,6 +124,9 @@ module sonic-flex_counter { leaf POLL_INTERVAL { type poll_interval; } + leaf BULK_CHUNK_SIZE { + type bulk_chunk_size; + } } container PORT { @@ -128,6 +140,9 @@ module sonic-flex_counter { leaf POLL_INTERVAL { type poll_interval; } + leaf BULK_CHUNK_SIZE { + type bulk_chunk_size; + } } container PORT_RATES { @@ -151,6 +166,9 @@ module sonic-flex_counter { leaf POLL_INTERVAL { type poll_interval; } + leaf BULK_CHUNK_SIZE { + type bulk_chunk_size; + } } container QUEUE { @@ -164,6 +182,9 @@ module sonic-flex_counter { leaf POLL_INTERVAL { type poll_interval; } + leaf BULK_CHUNK_SIZE { + type bulk_chunk_size; + } } container QUEUE_WATERMARK { @@ -177,6 +198,9 @@ module sonic-flex_counter { leaf POLL_INTERVAL { type poll_interval; } + leaf BULK_CHUNK_SIZE { + type bulk_chunk_size; + } } container RIF { @@ -265,7 +289,7 @@ module sonic-flex_counter { leaf POLL_INTERVAL { type poll_interval; } - } + } container WRED_ECN_PORT { /* WRED_ECN_QUEUE_FLEX_COUNTER_GROUP */ @@ -280,6 +304,31 @@ module sonic-flex_counter { } } + container ARS_LAG { + /* ARS_LAG_STAT_COUNTER_FLEX_COUNTER_GROUP */ + leaf FLEX_COUNTER_STATUS { + type flex_status; + } + leaf FLEX_COUNTER_DELAY_STATUS { + type flex_delay_status; + } + leaf POLL_INTERVAL { + type poll_interval; + } + } + + container ARS_NEXTHOP_GROUP { + /* ARS_NEXTHOP_GROUP_FLEX_COUNTER_GROUP */ + leaf FLEX_COUNTER_STATUS { + type flex_status; + } + leaf FLEX_COUNTER_DELAY_STATUS { + type flex_delay_status; + } + leaf POLL_INTERVAL { + type poll_interval; + } + } } /* end of container FLEX_COUNTER_TABLE */ @@ -330,6 +379,55 @@ module sonic-flex_counter { } } /* end of container FLOW_COUNTER_ROUTE_PATTERN */ + + + container ARS_NEXTHOP_GROUP_COUNTER_ROUTE_PATTERN { + description "Flow counter route pattern of config_db.json"; + + list ARS_NEXTHOP_GROUP_COUNTER_ROUTE_PATTERN_LIST { + + key "ip_prefix"; + + leaf ip_prefix { + type inet:ip-prefix; + } + + leaf max_match_count { + type uint32 { + range 1..50; + } + } + + } + + list FLOW_COUNTER_ROUTE_PATTERN_VRF_LIST { + + key "vrf_name ip_prefix"; + + leaf vrf_name { + /* + We don't use vrf_name reference here because: + 1. User is allowed to configure a VRF that does not exist yet here, orchagent is designed to resolve the VRF name once the VRF is created. + 2. The field vrf_name accept both VRF name and VNET name. + */ + type string { + length 0..16; + } + } + + leaf ip_prefix { + type inet:ip-prefix; + } + + leaf max_match_count { + type uint32 { + range 1..50; + } + } + + } + } + /* end of container FLOW_COUNTER_ROUTE_PATTERN */ } /* end of top level container */ } diff --git a/src/sonic-yang-models/yang-models/sonic-gnmi.yang b/src/sonic-yang-models/yang-models/sonic-gnmi.yang index f7c4fef33c5..d33ea35083d 100644 --- a/src/sonic-yang-models/yang-models/sonic-gnmi.yang +++ b/src/sonic-yang-models/yang-models/sonic-gnmi.yang @@ -76,6 +76,15 @@ module sonic-gnmi { description "Flag for enabling save on set."; } + leaf enable_crl { + type boolean; + description "Flag for enable certificate revocation list."; + } + + leaf crl_expire_duration { + type uint32; + description "Certificate revocation list cache expire duration."; + } } } diff --git a/src/sonic-yang-models/yang-models/sonic-grpcclient.yang b/src/sonic-yang-models/yang-models/sonic-grpcclient.yang new file mode 100644 index 00000000000..69d7b83d267 --- /dev/null +++ b/src/sonic-yang-models/yang-models/sonic-grpcclient.yang @@ -0,0 +1,79 @@ +module sonic-grpcclient { + namespace "http://github.com/sonic-net/sonic-grpcclient"; + prefix grpcclient; + yang-version 1.1; + + organization + "SONiC"; + + contact + "SONiC"; + + description + "SONiC DualToR grpc client configuration data"; + + revision 2024-10-14 { + description + "Initial revision"; + } + + container sonic-grpcclient { + + container GRPCCLIENT { + + container config { + + leaf type { + type enumeration { + enum secure; + enum insecure; + } + description "grpc client security level. "; + } + + leaf auth_level { + type enumeration { + enum server; + enum client; + } + description "grpc client auth level. "; + } + + leaf log_level { + type enumeration { + enum info; + enum notice; + enum debug; + enum warning; + enum critical; + } + description "grpc client log level. "; + } + } + + container certs { + + leaf client_crt { + type string; + description "grpc client certificate file name "; + + } + + leaf client_key { + type string; + description "grpc client key file name "; + } + + leaf ca_crt { + type string; + description "grpc client root cert"; + } + + leaf grpc_ssl_credential { + type string; + description "grpc client ssl credential"; + } + } + } + } +} diff --git a/src/sonic-yang-models/yang-models/sonic-logger.yang b/src/sonic-yang-models/yang-models/sonic-logger.yang index 76c7afde883..691bbb59cf8 100644 --- a/src/sonic-yang-models/yang-models/sonic-logger.yang +++ b/src/sonic-yang-models/yang-models/sonic-logger.yang @@ -67,6 +67,11 @@ module sonic-logger{ } default SYSLOG; } + + leaf require_manual_refresh { + type stypes:boolean_type; + description "When updating the log level, will refresh configuration via SIGHUP sent to the process."; + } }/* end of list LOGGER_LIST */ }/* end of LOGGER container */ }/* end of sonic-logger container */ diff --git a/src/sonic-yang-models/yang-models/sonic-loopback-interface.yang b/src/sonic-yang-models/yang-models/sonic-loopback-interface.yang index 5d64b61c59c..4a012b89433 100644 --- a/src/sonic-yang-models/yang-models/sonic-loopback-interface.yang +++ b/src/sonic-yang-models/yang-models/sonic-loopback-interface.yang @@ -36,7 +36,7 @@ module sonic-loopback-interface { key "name"; leaf name{ - type string; + type stypes:interface_name; } leaf vrf_name { diff --git a/src/sonic-yang-models/yang-models/sonic-memory-statistics.yang b/src/sonic-yang-models/yang-models/sonic-memory-statistics.yang new file mode 100644 index 00000000000..f69344db53b --- /dev/null +++ b/src/sonic-yang-models/yang-models/sonic-memory-statistics.yang @@ -0,0 +1,47 @@ +module sonic-memory-statistics { + yang-version 1.1; + + namespace "http://github.com/sonic-net/sonic-memory-statistics"; + prefix memstats; + + import sonic-types { + prefix stypes; + } + + description "YANG module for configuring memory statistics in SONiC-based OS."; + + revision 2024-07-22 { + description "First Revision"; + } + + container sonic-memory-statistics { + container MEMORY_STATISTICS { + description "Memory statistics configuration parameters."; + container memory_statistics{ + leaf enabled { + type boolean; + default false; + description "Flag to enable or disable memory statistics collection. If set to false, the memory statistics collection will stop."; + } + + leaf sampling_interval { + type uint8 { + range "3..15"; + } + units "minutes"; + default 5; + description "Time interval in minutes for sampling memory statistics. Valid range, is between 3 minutes to 30 minutes."; + } + + leaf retention_period { + type uint8 { + range "1..30"; + } + units "days"; + default 15; + description "Retention period for memory statistics data, defined in days. Valid range is from 1 day to 30 days."; + } + } + } + } +} \ No newline at end of file diff --git a/src/sonic-yang-models/yang-models/sonic-portchannel.yang b/src/sonic-yang-models/yang-models/sonic-portchannel.yang index 2c61f4eb54a..2694abb544e 100644 --- a/src/sonic-yang-models/yang-models/sonic-portchannel.yang +++ b/src/sonic-yang-models/yang-models/sonic-portchannel.yang @@ -53,7 +53,6 @@ module sonic-portchannel { leaf name { type string { - length 1..128; pattern 'PortChannel[0-9]{1,4}'; } } @@ -63,7 +62,7 @@ module sonic-portchannel { range 1..1024; } } - + leaf mode { description "PortChannel SwitchPort Mode possible values are routed|access|trunk. Default value for mode is routed."; type stypes:switchport_mode; diff --git a/src/sonic-yang-models/yang-models/sonic-srv6.yang b/src/sonic-yang-models/yang-models/sonic-srv6.yang new file mode 100644 index 00000000000..2ef9c3ac6df --- /dev/null +++ b/src/sonic-yang-models/yang-models/sonic-srv6.yang @@ -0,0 +1,139 @@ +module sonic-srv6 { + namespace "http://github.com/sonic-net/sonic-srv6"; + prefix srv6; + yang-version 1.1; + + import ietf-yang-types { + prefix yang; + } + + import ietf-inet-types { + prefix inet; + } + + import sonic-vrf { + prefix vrf; + } + + revision 2024-12-05 { + description + "Initial revision."; + } + + container sonic-srv6 { + + container SRV6_MY_LOCATORS { + list SRV6_MY_LOCATORS_LIST { + key "locator_name"; + + leaf locator_name { + type string; + } + + leaf prefix { + type inet:ipv6-address; + mandatory true; + } + + leaf block_len { + type uint8 { + range "1..128"; + } + + default 32; + } + + leaf node_len { + type uint8 { + range "1..128"; + } + + default 16; + } + + leaf func_len { + type uint8 { + range "1..128"; + } + + default 16; + } + + leaf arg_len { + type uint8 { + range "0..128"; + } + + default 0; + } + + must 'block_len + node_len + func_len + arg_len <= 128'; + + leaf vrf { + type union { + type leafref { + path "/vrf:sonic-vrf/vrf:VRF/vrf:VRF_LIST/vrf:name"; + } + type string { + pattern 'default'; + } + } + description "VRF name"; + + default "default"; + } + } + } + + container SRV6_MY_SIDS { + list SRV6_MY_SIDS_LIST { + key "locator ip_address"; + + leaf ip_address { + type inet:ipv6-address; + } + + leaf locator { + type leafref { + path "/srv6:sonic-srv6/srv6:SRV6_MY_LOCATORS/srv6:SRV6_MY_LOCATORS_LIST/srv6:locator_name"; + } + } + + leaf action { + type enumeration { + enum uN; + enum uDT46; + } + } + + leaf decap_vrf { + type union { + type leafref { + path "/vrf:sonic-vrf/vrf:VRF/vrf:VRF_LIST/vrf:name"; + } + type string { + pattern 'default'; + } + } + description "VRF name used for decapsulation"; + + default "default"; + } + + leaf decap_dscp_mode { + type enumeration { + enum uniform; + enum pipe; + } + when "../action = 'uDT46'"; + + default "uniform"; + } + + must 'starts-with(./ip_address, + substring-before(/srv6:sonic-srv6/SRV6_MY_LOCATORS/SRV6_MY_LOCATORS_LIST[current()/locator]/prefix, "::"))'; + } + } + + } +} \ No newline at end of file diff --git a/src/sonic-yang-models/yang-models/sonic-subnet-decap.yang b/src/sonic-yang-models/yang-models/sonic-subnet-decap.yang new file mode 100644 index 00000000000..c14c6b21846 --- /dev/null +++ b/src/sonic-yang-models/yang-models/sonic-subnet-decap.yang @@ -0,0 +1,57 @@ +module sonic-subnet-decap { + + yang-version 1.1; + + namespace "http://github.com/sonic-net/sonic-subnet-decap"; + + prefix subnet-decap; + + import ietf-inet-types { + prefix inet; + } + + import sonic-types { + prefix stypes; + } + + description "Subnet decap configuration for SONiC OS."; + + revision 2024-12-19 { + description "Initial version"; + } + + container sonic-subnet-decap { + container SUBNET_DECAP { + + description "CONFIG_DB subnet decap configuration."; + + list SUBNET_DECAP_LIST { + + key "name"; + + leaf name { + type string; + description "Subnet Decap config name."; + } + + leaf status { + type stypes:mode-status; + default disable; + description "Subnet Decap status."; + } + + leaf src_ip { + type inet:ipv4-prefix; + description "Subnet decap term source IPv4 prefix."; + mandatory true; + } + + leaf src_ip_v6 { + type inet:ipv6-prefix; + description "Subnet decap term source IPv6 prefix."; + mandatory true; + } + } + } + } +} diff --git a/src/sonic-yang-models/yang-models/sonic-tc-dscp-map.yang b/src/sonic-yang-models/yang-models/sonic-tc-dscp-map.yang new file mode 100644 index 00000000000..3698fe04b3e --- /dev/null +++ b/src/sonic-yang-models/yang-models/sonic-tc-dscp-map.yang @@ -0,0 +1,67 @@ +module sonic-tc-dscp-map { + + yang-version 1.1; + + namespace "http://github.com/sonic-net/sonic-tc-dscp-map"; + + prefix tdm; + + import sonic-types { + prefix stypes; + } + + organization + "SONiC"; + + contact + "SONiC"; + + description + "TC_TO_DSCP_MAP yang Module for SONiC OS"; + + revision 2025-01-10 { + description + "Initial revision."; + } + + container sonic-tc-dscp-map { + + container TC_TO_DSCP_MAP { + + description "TC_TO_DSCP_MAP part of config_db.json"; + + list TC_TO_DSCP_MAP_LIST { + + key "name"; + + leaf name { + type string { + pattern '[a-zA-Z0-9]{1}([-a-zA-Z0-9_]{0,31})'; + length 1..32 { + error-message "Invalid length for map name."; + error-app-tag map-name-invalid-length; + } + } + } + + list TC_TO_DSCP_MAP { //this is list inside list for storing mapping between two fields + + key "tc"; + + leaf tc { + type stypes:tc_type; + } + + leaf dscp { + type string { + pattern "6[0-3]|[1-5][0-9]?|[0-9]?" { + error-message "Invalid DSCP"; + error-app-tag dscp-invalid; + } + } + } + } + } + } + } +} diff --git a/src/sonic-yang-models/yang-models/sonic-telemetry.yang b/src/sonic-yang-models/yang-models/sonic-telemetry.yang index 5cbdf2bd933..239f23666dd 100644 --- a/src/sonic-yang-models/yang-models/sonic-telemetry.yang +++ b/src/sonic-yang-models/yang-models/sonic-telemetry.yang @@ -76,6 +76,15 @@ module sonic-telemetry { description "Flag for enabling save on set."; } + leaf enable_crl { + type boolean; + description "Flag for enable certificate revocation list."; + } + + leaf crl_expire_duration { + type uint32; + description "Certificate revocation list cache expire duration."; + } } } diff --git a/src/sonic-yang-models/yang-models/sonic-vlan.yang b/src/sonic-yang-models/yang-models/sonic-vlan.yang index ff3a1f2f64a..5d6f898c768 100644 --- a/src/sonic-yang-models/yang-models/sonic-vlan.yang +++ b/src/sonic-yang-models/yang-models/sonic-vlan.yang @@ -266,7 +266,7 @@ module sonic-vlan { path "/lag:sonic-portchannel/lag:PORTCHANNEL/lag:PORTCHANNEL_LIST/lag:name"; } } - must "not(/sms:sonic-mirror-session/sms:MIRROR_SESSION/sms:MIRROR_SESSION_LIST[sms:dst_port=current()])" + must "not(/sms:sonic-mirror-session/sms:MIRROR_SESSION/sms:MIRROR_SESSION_LIST[sms:dst_port=current()])" { error-message "Port is used as a destination port in a mirror session."; } diff --git a/src/sonic-yang-models/yang-models/sonic-vrf.yang b/src/sonic-yang-models/yang-models/sonic-vrf.yang index 83836a81c1c..33fe100097f 100644 --- a/src/sonic-yang-models/yang-models/sonic-vrf.yang +++ b/src/sonic-yang-models/yang-models/sonic-vrf.yang @@ -6,6 +6,10 @@ module sonic-vrf { prefix sonic-ext; } + import sonic-types { + prefix stypes; + } + organization "SONiC"; @@ -28,7 +32,7 @@ module sonic-vrf { key "name"; leaf name { - type string { + type stypes:interface_name { pattern "Vrf[a-zA-Z0-9_-]+" { error-message "Invalid VRF name"; error-app-tag vrf-name-invalid; diff --git a/src/sonic-yang-models/yang-models/sonic-vxlan.yang b/src/sonic-yang-models/yang-models/sonic-vxlan.yang index 7e0b0339561..75ae6dc83ec 100644 --- a/src/sonic-yang-models/yang-models/sonic-vxlan.yang +++ b/src/sonic-yang-models/yang-models/sonic-vxlan.yang @@ -49,9 +49,8 @@ module sonic-vxlan { max-elements 1; leaf name { - type string; + type stypes:interface_name; } - must "string-length(name) != 0"; leaf src_ip { type inet:ip-address; diff --git a/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2 index ebaffe96e8d..70b626972f5 100644 --- a/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2 +++ b/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2 @@ -282,6 +282,118 @@ module sonic-acl { pattern '0[xX][0-9a-fA-F]{1,2}/0[xX][0-9a-fA-F]{1,2}'; } } + + leaf TUNNEL_TERM { + description "Tunnel Termination Flag"; + type boolean; + } + + leaf DISABLE_ARS_FORWARDING { + description "Disable ARS forwarding on matching packets"; + type boolean; + default false; + } + } + /* end of container ACL_RULE */ + + container ACL_TABLE_TYPE { + list ACL_TABLE_TYPE_LIST { + key "ACL_TABLE_TYPE_NAME"; + + leaf ACL_TABLE_TYPE_NAME { + type string; + } + + leaf-list MATCHES { + type string; + min-elements 1; + } + + leaf-list ACTIONS { + type string; + default ""; + } + + leaf-list BIND_POINTS { + type enumeration { + enum PORT; + enum PORTCHANNEL; + } + min-elements 1; + } + } + } + + container ACL_TABLE { + + description "ACL_TABLE part of config_db.json"; + + list ACL_TABLE_LIST { + + key "ACL_TABLE_NAME"; + + leaf ACL_TABLE_NAME { + type string; + } + + leaf policy_desc { + type string { + length 1..255; + } + } + + leaf type { + mandatory true; + type union { + type leafref { + path "/acl:sonic-acl/acl:ACL_TABLE_TYPE/acl:ACL_TABLE_TYPE_LIST/acl:ACL_TABLE_TYPE_NAME"; + } + type stypes:acl_table_type; + } + } + + leaf stage { + type string { + pattern "ingress|egress|INGRESS|EGRESS"; + } + default "INGRESS"; + } + + leaf-list services { + type string; + } + + /* Validating 'services' exist if ACL type is 'CTRLPLANE' */ + must "(not(type = 'CTRLPLANE')) or (boolean(services))"; + + leaf-list ports { + /* union of leafref is allowed in YANG 1.1 */ + type union { + type leafref { + path /port:sonic-port/port:PORT/port:PORT_LIST/port:name; + } + type leafref { + path /lag:sonic-portchannel/lag:PORTCHANNEL/lag:PORTCHANNEL_LIST/lag:name; + } + type string { + pattern ""; + } + } + /* Today in SONiC, we do not delete the list once + * created, instead we set to empty list. Due to that + * below default values are needed. + */ + default ""; + } + } + /* end of ACL_TABLE_LIST */ + } + /* end of container ACL_TABLE */ + } + /* end of container sonic-acl */ +} +/* end of module sonic-acl */ + } /* end of ACL_RULE_LIST */ } diff --git a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 index df9b3c91dd8..7a5b0b5a03e 100644 --- a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 +++ b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 @@ -316,6 +316,16 @@ module sonic-types { } } + typedef interface_name { + description "Represents IFNAMSIZ defined in "; + type string { + length 1..15 { + error-message "Invalid interface name length, it must not exceed 16 characters."; + error-app-tag invalid-interface-name-length; + } + } + } + typedef hash-field { description "Represents native hash field"; type enumeration { diff --git a/src/system-health/health_checker/sysmonitor.py b/src/system-health/health_checker/sysmonitor.py index c07b58b5489..1f95006befc 100755 --- a/src/system-health/health_checker/sysmonitor.py +++ b/src/system-health/health_checker/sysmonitor.py @@ -104,6 +104,11 @@ def task_worker(self): logger.log_info("Start Listening to systemd bus (pid {0})".format(os.getpid())) self.subscribe_sysbus() + def task_stop(self): + # FIXME: Gracefully stop `loop.run()`. + self._task_process.kill() + return True + def task_notify(self, msg): if self.task_stopping_event.is_set(): return @@ -481,9 +486,11 @@ def system_service(self): from queue import Empty # Queue to receive the STATEDB and Systemd state change event - while not self.task_stopping_event.is_set(): + while True: try: msg = self.myQ.get(timeout=QUEUE_TIMEOUT) + if msg == "stop": + break event = msg["unit"] event_src = msg["evt_src"] event_time = msg["time"] @@ -503,15 +510,10 @@ def system_service(self): monitor_statedb_table.task_stop() def task_worker(self): - if self.task_stopping_event.is_set(): - return self.system_service() def task_stop(self): - # Signal the process to stop - self.task_stopping_event.set() - #Clear the resources of mpmgr- Queue - self.mpmgr.shutdown() + self.myQ.put("stop") # Wait for the process to exit self._task_process.join(self._stop_timeout_secs) @@ -519,12 +521,8 @@ def task_stop(self): # If the process didn't exit, attempt to kill it if self._task_process.is_alive(): logger.log_notice("Attempting to kill sysmon main process with pid {}".format(self._task_process.pid)) - os.kill(self._task_process.pid, signal.SIGKILL) - - if self._task_process.is_alive(): - logger.log_error("Sysmon main process with pid {} could not be killed".format(self._task_process.pid)) + self._task_process.kill() + self._task_process.join() return False return True - - diff --git a/src/system-health/scripts/healthd b/src/system-health/scripts/healthd index 28bffeb7129..3d250be6a8e 100644 --- a/src/system-health/scripts/healthd +++ b/src/system-health/scripts/healthd @@ -5,6 +5,9 @@ System health monitor daemon for SONiC """ +from swsscommon.swsscommon import RestartWaiter +RestartWaiter.waitAdvancedBootDone() + import signal import threading import time diff --git a/src/system-health/tests/test_system_health.py b/src/system-health/tests/test_system_health.py index 4aeb3b18f04..17997184490 100644 --- a/src/system-health/tests/test_system_health.py +++ b/src/system-health/tests/test_system_health.py @@ -22,6 +22,7 @@ from .mock_connector import MockConnector swsscommon.SonicV2Connector = MockConnector +swsscommon.RestartWaiter = MagicMock() test_path = os.path.dirname(os.path.abspath(__file__)) telemetry_path = os.path.join(test_path, 'telemetry') @@ -48,7 +49,7 @@ snmp-subagent EXITED Oct 19 01:53 AM """ device_info.get_platform = MagicMock(return_value='unittest') - + device_runtime_metadata = {"DEVICE_RUNTIME_METADATA": {"ETHERNET_PORTS_PRESENT":True}} def no_op(*args, **kwargs): @@ -843,7 +844,7 @@ def test_publish_system_status_allowed_status(): sysmon = Sysmonitor() sysmon.publish_system_status('UP') sysmon.publish_system_status('DOWN') - + expected_calls = [ (("UP",), {}), (("DOWN",), {}) @@ -856,7 +857,7 @@ def test_publish_system_status(): sysmon = Sysmonitor() sysmon.publish_system_status('UP') result = swsscommon.SonicV2Connector.get(MockConnector, 0, "SYSTEM_READY|SYSTEM_STATE", 'Status') - assert result == "UP" + assert result == "UP" @patch('health_checker.sysmonitor.Sysmonitor.get_all_system_status', test_get_all_system_status_ok()) @patch('health_checker.sysmonitor.Sysmonitor.publish_system_status', test_publish_system_status()) diff --git a/src/systemd-sonic-generator/ssg-test.cc b/src/systemd-sonic-generator/ssg-test.cc index 5e336fe2dac..692271f88a2 100644 --- a/src/systemd-sonic-generator/ssg-test.cc +++ b/src/systemd-sonic-generator/ssg-test.cc @@ -231,6 +231,7 @@ class SsgMainTest : public SsgFunctionTest { while (getline(file, line) && !found) { if (str == line) { found = true; + break; } } return found; @@ -364,6 +365,32 @@ class SsgMainTest : public SsgFunctionTest { "system", !cfg.is_smart_switch_npu && !cfg.is_smart_switch_dpu, cfg.num_dpus, false); } + void validate_environment_variable(const SsgMainConfig &cfg) { + std::unordered_map env_vars; + env_vars["IS_DPU_DEVICE"] = (cfg.is_smart_switch_dpu ? "true" : "false"); + env_vars["NUM_DPU"] = std::to_string(cfg.num_dpus); + + std::vector checked_service_list; + + checked_service_list.insert(checked_service_list.end(), common_service_list.begin(), common_service_list.end()); + if (cfg.num_dpus > 0) { + checked_service_list.insert(checked_service_list.end(), npu_service_list.begin(), npu_service_list.end()); + } + if (cfg.num_asics > 1) { + checked_service_list.insert(checked_service_list.end(), multi_asic_service_list.begin(), multi_asic_service_list.end()); + } + + for (const auto &target: checked_service_list) { + if (find_string_in_file("[Service]", target)) { + for (const auto& item : env_vars) { + std::string str = "Environment=\"" + item.first + "=" + item.second + "\""; + EXPECT_EQ(find_string_in_file(str, target), true) + << "Error validating " + str + " in " + target; + } + } + } + } + /* ssg_main test routine. * input: num_asics number of asics */ @@ -431,6 +458,9 @@ class SsgMainTest : public SsgFunctionTest { /* Validate Test Unit file for dependency creation. */ validate_depedency_in_unit_file(cfg); + + /* Validate environment variables */ + validate_environment_variable(cfg); } /* Save global variables before running tests */ @@ -719,7 +749,6 @@ TEST_F(SsgMainTest, ssg_main_argv) { std::vector arguments = { "ssg_main", }; - /* Create argv list for ssg_main. */ for (const auto& arg : arguments) { argv_.push_back((char*)arg.data()); diff --git a/src/systemd-sonic-generator/systemd-sonic-generator.cpp b/src/systemd-sonic-generator/systemd-sonic-generator.cpp index ffef213cd10..a3b3765eeab 100644 --- a/src/systemd-sonic-generator/systemd-sonic-generator.cpp +++ b/src/systemd-sonic-generator/systemd-sonic-generator.cpp @@ -11,6 +11,9 @@ #include #include #include +#include +#include +#include #define MAX_NUM_TARGETS 48 #define MAX_NUM_INSTALL_LINES 48 @@ -385,6 +388,56 @@ static void replace_multi_inst_dep(const char *src) { rename(tmp_file_path, src); } +static void update_environment(const std::string &src) +{ + std::ifstream src_file(src); + std::ofstream tmp_file(src + ".tmp"); + bool has_service_section = false; + std::string line; + + // locate the [Service] section + while (std::getline(src_file, line)) { + tmp_file << line << std::endl; + if (line.find("[Service]") != std::string::npos) { + has_service_section = true; + break; + } + } + + if (!has_service_section) { + tmp_file << "[Service]" << std::endl; + } + + std::unordered_map env_vars; + env_vars["IS_DPU_DEVICE"] = (smart_switch_dpu ? "true" : "false"); + env_vars["NUM_DPU"] = std::to_string(num_dpus); + + for (const auto& [key, value] : env_vars) { + tmp_file << "Environment=\"" << key << "=" << value << "\"" << std::endl; + } + + // copy the rest of the file + if (has_service_section) { + const static std::regex env_var_regex("Environment=\"?(\\w+)"); + while (std::getline(src_file, line)) { + // skip the existing environment variables + std::smatch match; + if (std::regex_search(line, match, env_var_regex)) { + if (env_vars.find(match[1]) != env_vars.end()) { + continue; + } + } + tmp_file << line << std::endl; + } + } + + src_file.close(); + tmp_file.close(); + // remove the original file and rename the temporary file + remove(src.c_str()); + rename((src + ".tmp").c_str(), src.c_str()); +} + int get_install_targets(std::string unit_file, char* targets[]) { /*** Returns install targets for a unit file @@ -1155,6 +1208,8 @@ int ssg_main(int argc, char **argv) { free(targets[j]); } + update_environment(get_unit_file_prefix() + unit_instance); + free(unit_files[i]); }